Help with modifying the FPGA for custom use

[p-avital]

Hello,

I've cloned the repo and been trying to get my head around the FPGA part trying to figure which parts are relevant to me, but it's being quite challenging.

I'm trying to listen to a wide RF band and, using FIR filters and a selector, send a few of the highest power channels for processing using GNUradio.

So basically, I'm looking for ways to get the signal from RX (I only need one antenna), and to send the processed signals to the computer.
In short, what I'm looking for is the signal from RX, and where to send my altered signal for it to be sent to USB.

If possible, I'd like to keep using the osmocom source with the Soapy drivers, so maintaining compatibility with how data is sent normally would be a plus. Is there something I have to take into account before multiplexing my signal ?
It seems the bitrate for a signal is 24 times its sample rate, that would suggest that two 12bits ADC samples are used to make one Complex sample in GNU Radio. Should my multiplexing look like mux(a,b)=[(a[i], a[i+1], b[i], b[i+1]) for i in [0:end:2]], which the GNU Radio SDR source block should convert to a complex signal where a and b samples are alternated as [a,b,a,b...], decimating the signal with step=2 ? Or am I mistaken ?

Thanks in advance for any help you would take the time to provide.

[p-avital]

Ok, I've done some more prying, please do correct me if I'm wrong:

The LMS chip sends IQ data alternatively through LMS_DIQ2_D[11..0], with LMS_DIQ2_IQSEL2 telling whether the current data is 0: I or 1: Q (or reversed, can't tell that much yet). This pretty much answers my question about multiplexing, I guess, so no need to bother with it anymore. I presume the quadrature is calculated using the center frequency that would be set from GNU Radio?

Wouldn't intercepting that bus between the input and the rx_path element from the Stream out buffer section to apply processing to it be the simplest way for me to do whatever math I feel like doing before sending it to GNU Radio?

As I haven't done much DSP on FPGAs before, would anyone have some tips to give me on implementing an IQ FIR filter on FPGA? It seems the ones available in the IP catalog I have are made to work with real signal.

Again, thanks for any help you find time to provide.