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THUMB new instructions MOVW and MOVT discovered #76

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fdx1601 opened this issue Mar 24, 2019 · 0 comments
Open

THUMB new instructions MOVW and MOVT discovered #76

fdx1601 opened this issue Mar 24, 2019 · 0 comments

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@fdx1601
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fdx1601 commented Mar 24, 2019

Hi!

Continuing to play around with my little serial monitor I was able to test support of two
interesting instructions MOVW and MOVT which the THUMB compiler actually doesn't support.

Both are composed of 2 16-bit instructions as documented in the tables below.

I am able to assemble and run them interactively on the device, so I am sure that both
are supported and working as expected.

Syntax: MOVW Rd,#Imm16

+------------------------+----+---------+-------------------+-------------------+
| 15   14   13   12   11 | 10 | 09   08 | 07   06   05   04 | 03   02   01   00 |
+------------------------+----+---------+-------------------+-------------------+
|  1    1    1    1    0 |  i |  1    0 |  0    1    0    0 |    Imm16[15:12]   |
+----+--------------+----+----+---------+-------------------+-------------------+
|  0 | Imm16[10:8]  |        Rd         |               Imm16[7:0]              |
+----+--------------+-------------------+---------------------------------------+
Syntax: MOVT Rd,#Imm16

+------------------------+----+---------+-------------------+-------------------+
| 15   14   13   12   11 | 10 | 09   08 | 07   06   05   04 | 03   02   01   00 |
+------------------------+----+---------+-------------------+-------------------+
|  1    1    1    1    0 |  i |  1    0 |  1    1    0    0 |    Imm16[15:12]   |
+----+--------------+----+----+---------+-------------------+-------------------+
|  0 | Imm16[10:8]  |        Rd         |               Imm16[7:0]              |
+----+--------------+-------------------+---------------------------------------+

EDIT: After further investigation I figured out that the bit #11 of the 16-bit immediate has to be encoded in bit #10 of the first instruction.

You find this information on page 4-166 in the "ARM Architecture Reference Manual Thumb-2 Supplement".

The following code shows a working instruction sequence, where first the lower halfword of R7 is loaded with a 16-bit immediate value using MOVW.

Then another 16-bit immediate value is loaded into the upper halfword of R7 using the MOVT instruction.

Using this two instructions, it is possible to load a 32-bit immediate value into any register, except PC.

It is important to follow this sequence, since MOVW erases the contents of the entire register before writing into the lower halfword, where MOVT preserves the content.

$20001000: F245 6778  MOVW R7,#$5678        
$20001004: F2C1 2734  MOVT R7,#$1234        
$20001008: 46F7       MOV PC,LR
$2000100A: BF00       NOP

Call executed on the real device (STM32F103C8 Cortex-M3) where you can see
the two 16-bit immediate values combined in R7.

CALL

Address: 20001000

CPU Registers:
R00: --------    R01: --------    R02: --------    R03: --------
R04: --------    R05: --------    R06: --------    R07: 12345678
R08: --------    R09: --------    R10: --------    R11: --------
R12: --------    R13: --------    R14: --------    R15: --------

It would be nice having support for them in the THUMB assembler.

Regards.

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