diff --git a/aten/src/ATen/NestedTensorImpl.cpp b/aten/src/ATen/NestedTensorImpl.cpp index a6e4309e58e7a..2f73b7b304ee3 100644 --- a/aten/src/ATen/NestedTensorImpl.cpp +++ b/aten/src/ATen/NestedTensorImpl.cpp @@ -81,7 +81,7 @@ inline std::vector construct_opt_sizes(const at::Tensor& sizes) { std::vector result(1, sizes.sizes()[0]); if (sizes.dim() > 0) { size_t nested_dim = result.size(); - int64_t* sizes_ptr = sizes.data_ptr(); + const int64_t* sizes_ptr = sizes.const_data_ptr(); result.resize(nested_dim + sizes.sizes()[1]); int64_t sizes_size_0 = sizes.sizes()[0]; int64_t sizes_size_1 = sizes.sizes()[1]; @@ -114,7 +114,7 @@ at::Tensor construct_nested_strides(const at::Tensor& sizes) { return sizes; } at::Tensor strides = sizes.new_empty(sizes.sizes()); - const int64_t* sizes_ptr = sizes.data_ptr(); + const int64_t* sizes_ptr = sizes.const_data_ptr(); int64_t* strides_ptr = strides.data_ptr(); for (int64_t i = 0; i < sizes.size(0); i++) { strides_ptr[orig_dim - 1] = 1; @@ -152,7 +152,7 @@ at::Tensor construct_offsets(const at::Tensor& sizes) { std::iota(offsets_ptr, offsets_ptr + ntensors, 0); return offsets; } - const int64_t* sizes_ptr = sizes.data_ptr(); + const int64_t* sizes_ptr = sizes.const_data_ptr(); offsets_ptr[0] = 0; for (const auto i : c10::irange(ntensors - 1)) { const int64_t row_product = std::accumulate(sizes_ptr, sizes_ptr + orig_dim, 1, std::multiplies()); @@ -344,7 +344,7 @@ int64_t get_numel_from_nested_size_tensor(const at::Tensor& tensor) { static_cast(std::numeric_limits::max()), static_cast(std::numeric_limits::max())); - const int64_t* sizes_ptr = tensor.data_ptr(); + const int64_t* sizes_ptr = tensor.const_data_ptr(); const auto nt_dim = tensor.size(1); uint64_t num_elements{0}; diff --git a/aten/src/ATen/NestedTensorImpl.h b/aten/src/ATen/NestedTensorImpl.h index ee096591edf7a..0bd3d98e73c5c 100644 --- a/aten/src/ATen/NestedTensorImpl.h +++ b/aten/src/ATen/NestedTensorImpl.h @@ -228,7 +228,8 @@ inline bool nested_tensor_impl_is_contiguous(const NestedTensorImpl* nt) { } const Tensor &sizemat = nt->get_nested_sizes(), &stridemat = nt->get_nested_strides(); - int64_t* offsets_ptr = nt->get_storage_offsets().data_ptr(); + const int64_t* offsets_ptr = + nt->get_storage_offsets().const_data_ptr(); int64_t orig_dim = sizemat.size(1); // nesting scalars if (orig_dim == 0) { @@ -243,8 +244,8 @@ inline bool nested_tensor_impl_is_contiguous(const NestedTensorImpl* nt) { // nesting tensors else { // if any underlying tensor is non-contiguous - const int64_t *sizemat_ptr = sizemat.data_ptr(), - *stridemat_ptr = stridemat.data_ptr(); + const int64_t *sizemat_ptr = sizemat.const_data_ptr(), + *stridemat_ptr = stridemat.const_data_ptr(); for (int64_t i = 0; i < ntensors; i++) { if (stridemat_ptr[orig_dim - 1] != 1) { return false; @@ -263,8 +264,8 @@ inline bool nested_tensor_impl_is_contiguous(const NestedTensorImpl* nt) { if (offsets_ptr[0] != 0) { return false; } - sizemat_ptr = sizemat.data_ptr(); - stridemat_ptr = stridemat.data_ptr(); + sizemat_ptr = sizemat.const_data_ptr(); + stridemat_ptr = stridemat.const_data_ptr(); for (int64_t i = 1; i < ntensors; i++) { if (offsets_ptr[i] != offsets_ptr[i - 1] + *sizemat_ptr * *stridemat_ptr) { diff --git a/aten/src/ATen/core/Formatting.cpp b/aten/src/ATen/core/Formatting.cpp index 29bf49bbb6a16..824640705238a 100644 --- a/aten/src/ATen/core/Formatting.cpp +++ b/aten/src/ATen/core/Formatting.cpp @@ -72,7 +72,7 @@ static std::tuple __printFormat(std::ostream& stream, const Tensor& return std::make_tuple(1., 0); } bool intMode = true; - auto self_p = self.data_ptr(); + auto self_p = self.const_data_ptr(); for (const auto i : c10::irange(size)) { auto z = self_p[i]; if(std::isfinite(z)) { @@ -189,7 +189,7 @@ static void __printMatrix(std::ostream& stream, const Tensor& self, int64_t line } for (const auto l : c10::irange(self.size(0))) { Tensor row = self.select(0,l); - double *row_ptr = row.data_ptr(); + const double *row_ptr = row.const_data_ptr(); for (const auto c : c10::irange(firstColumn, lastColumn+1)) { stream << std::setw(sz) << row_ptr[c]/scale; if(c == lastColumn) { @@ -279,7 +279,7 @@ std::ostream& print(std::ostream& stream, const Tensor & tensor_, int64_t linesi tensor = tensor_.to(kCPU, kDouble).contiguous(); } if(tensor.ndimension() == 0) { - stream << defaultfloat << tensor.data_ptr()[0] << '\n'; + stream << defaultfloat << tensor.const_data_ptr()[0] << '\n'; stream << "[ " << tensor_.toString() << "{}"; } else if(tensor.ndimension() == 1) { if (tensor.numel() > 0) { @@ -287,7 +287,7 @@ std::ostream& print(std::ostream& stream, const Tensor & tensor_, int64_t linesi if(scale != 1) { printScale(stream, scale); } - double* tensor_p = tensor.data_ptr(); + const double* tensor_p = tensor.const_data_ptr(); for (const auto i : c10::irange(tensor.size(0))) { stream << std::setw(sz) << tensor_p[i]/scale << '\n'; } diff --git a/aten/src/ATen/native/BatchLinearAlgebra.cpp b/aten/src/ATen/native/BatchLinearAlgebra.cpp index caa15e5c5b181..40e6b34dc9725 100644 --- a/aten/src/ATen/native/BatchLinearAlgebra.cpp +++ b/aten/src/ATen/native/BatchLinearAlgebra.cpp @@ -1516,7 +1516,7 @@ void _linalg_check_errors( } else { // Find the first non-zero info auto infos_cpu = infos.to(at::kCPU); - auto ptr = infos_cpu.data_ptr(); + auto ptr = infos_cpu.const_data_ptr(); auto n = infos.numel(); auto info_ptr = std::find_if(ptr, ptr + n, [](int32_t x) { return x != 0; }); info = *info_ptr; @@ -2794,13 +2794,13 @@ static void linalg_eig_make_complex_eigenvectors_impl(Tensor& result, const Tens auto matrix_stride = matrixStride(real_vectors); auto result_data = result.data_ptr>(); - auto real_vectors_data = real_vectors.data_ptr(); - auto values_data = complex_values.data_ptr>(); + auto real_vectors_data = real_vectors.const_data_ptr(); + auto values_data = complex_values.const_data_ptr>(); for (auto b = decltype(batch_size){0}; b < batch_size; b++) { - scalar_t* vecs = &real_vectors_data[b * matrix_stride]; + const scalar_t* vecs = &real_vectors_data[b * matrix_stride]; c10::complex* res = &result_data[b * matrix_stride]; - c10::complex* vals = &values_data[b * n]; + const c10::complex* vals = &values_data[b * n]; for (auto j = decltype(n){0}; j < n; j++) { if (vals[j].imag() == 0.0) { // eigenvalue is real, then v(j) = VR(:,j) for (auto i = decltype(n){0}; i < n; i++) { diff --git a/aten/src/ATen/native/ForeachUtils.h b/aten/src/ATen/native/ForeachUtils.h index 9c22c35ee9401..4e8963da05521 100644 --- a/aten/src/ATen/native/ForeachUtils.h +++ b/aten/src/ATen/native/ForeachUtils.h @@ -216,7 +216,7 @@ inline std::vector convert_tensor_to_scalar_list( scalarList_.scalar_type(), "convert_tensor_to_scalar_list", [&]() { - const scalar_t* scalar_data = scalarList_.data_ptr(); + const scalar_t* scalar_data = scalarList_.const_data_ptr(); TORCH_CHECK( (expect_length == scalarList_.size(0)), "Expected length of scalars to match input of length ", diff --git a/aten/src/ATen/native/QuantizedLinear.cpp b/aten/src/ATen/native/QuantizedLinear.cpp index c2ccdc7ddfe71..5fa45f3099844 100644 --- a/aten/src/ATen/native/QuantizedLinear.cpp +++ b/aten/src/ATen/native/QuantizedLinear.cpp @@ -64,7 +64,7 @@ Tensor fbgemm_linear_int8_weight_fp32_activation( "and will be removed in a future PyTorch release.") const Tensor input_contig = input.contiguous(); - const float* input_ptr = input_contig.data_ptr(); + const float* input_ptr = input_contig.const_data_ptr(); TORCH_CHECK(input.dim() >= 2); // NOLINTNEXTLINE(bugprone-narrowing-conversions,cppcoreguidelines-narrowing-conversions) @@ -305,7 +305,7 @@ Tensor fbgemm_pack_quantized_matrix(const Tensor& weight) { const int64_t K = weight.size(1); const int64_t N = weight.size(0); const Tensor weight_contig = weight.contiguous(); - const int8_t* weight_ptr = weight_contig.data_ptr(); + const int8_t* weight_ptr = weight_contig.const_data_ptr(); auto ptr = std::make_unique>( /*trans=*/fbgemm::matrix_op_t::Transpose, /*nRow=*/K, @@ -424,7 +424,7 @@ Tensor fbgemm_linear_fp16_weight_fp32_activation( TORCH_CHECK(fbgemm::fbgemmSupportedCPU(), "Your CPU doesn't support FBGEMM."); const Tensor input_contig = input.contiguous(); - const float* input_ptr = input_contig.data_ptr(); + const float* input_ptr = input_contig.const_data_ptr(); // Pull out the PackedGemmMatrixFP16 instance from the owning tensor const fbgemm::PackedGemmMatrixFP16& packed_weight_fp16 = diff --git a/aten/src/ATen/native/SummaryOps.cpp b/aten/src/ATen/native/SummaryOps.cpp index 81a0ccd6d8337..4c158f81a47e9 100644 --- a/aten/src/ATen/native/SummaryOps.cpp +++ b/aten/src/ATen/native/SummaryOps.cpp @@ -43,7 +43,7 @@ Tensor _bincount_cpu_template( int64_t nbins = static_cast(*self.max().data_ptr()) + 1L; nbins = std::max(nbins, minlength); // at least minlength # of bins - const input_t* self_p = self.data_ptr(); + const input_t* self_p = self.const_data_ptr(); if (has_weights) { output = at::zeros( {nbins}, @@ -52,7 +52,7 @@ Tensor _bincount_cpu_template( weights.options().device_opt(), weights.options().pinned_memory_opt()); weights_t* output_p = output.data_ptr(); - const weights_t* weights_p = weights.data_ptr(); + const weights_t* weights_p = weights.const_data_ptr(); for (const auto i : c10::irange(self_size)) { output_p[self_p[i]] += weights_p[i]; } diff --git a/aten/src/ATen/native/TensorConversions.cpp b/aten/src/ATen/native/TensorConversions.cpp index b2fb4d7c5261d..c555706f4ced8 100644 --- a/aten/src/ATen/native/TensorConversions.cpp +++ b/aten/src/ATen/native/TensorConversions.cpp @@ -1479,7 +1479,7 @@ void convert_indices_from_coo_to_csr_cpu( const Tensor& input, const int64_t size) { int64_t numel = input.numel(); - const input_t* data_in = input.data_ptr(); + const input_t* data_in = input.const_data_ptr(); output_t* data_out = result.data_ptr(); if (numel == 0) { @@ -1525,7 +1525,7 @@ void convert_indices_from_csr_to_coo_cpu( batch_indices.copy_(at::sparse::full_coo_indices(crow_indices.sizes().slice(0, batch_ndim), crow_indices.options()) .repeat_interleave(nnz, 1)); } - const input_t* crow_indices_data_in = crow_indices_->data_ptr(); + const input_t* crow_indices_data_in = crow_indices_->const_data_ptr(); TORCH_INTERNAL_ASSERT(indices.is_contiguous()); auto row0 = indices.select(0, transpose ? batch_ndim + 1 : batch_ndim + 0); auto row1 = indices.select(0, transpose ? batch_ndim + 0 : batch_ndim + 1); diff --git a/aten/src/ATen/native/TensorShape.cpp b/aten/src/ATen/native/TensorShape.cpp index 1873201d2001a..b7d8eeb00fc75 100644 --- a/aten/src/ATen/native/TensorShape.cpp +++ b/aten/src/ATen/native/TensorShape.cpp @@ -2058,7 +2058,7 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in // fill in src_int_idx, sorted_int_idx, int_counts { const auto sorted_len = sorted.numel(); - const auto* ptr_sorted = sorted.data_ptr(); + const auto* ptr_sorted = sorted.const_data_ptr(); const auto* ptr_sorted_start = ptr_sorted; const auto* ptr_sorted_end = ptr_sorted + sorted_len; @@ -2121,7 +2121,7 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in auto* ptr_selected_src = selected_src.data_ptr(); const auto thread_offsets = compressed_int_counts.cumsum(0).sub_(compressed_int_counts); - const auto* ptr_sorted_idx = sorted_idx.data_ptr(); + const auto* ptr_sorted_idx = sorted_idx.const_data_ptr(); at::parallel_for(0, n_threads_src, 1, [&](int64_t tid, C10_UNUSED int64_t _) { const auto start = tid * chunk_size_src; const auto end = std::min(start + chunk_size_src, src_len); @@ -2163,7 +2163,7 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in bool run_in_parallel = true) -> Tensor { auto cidx = at::empty({len + 1}, idx.options()); - const auto* ptr_idx = idx.data_ptr(); + const auto* ptr_idx = idx.const_data_ptr(); auto* ptr_cidx = cidx.data_ptr(); const auto idx_len = idx.numel(); @@ -2202,7 +2202,7 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in } else { auto* ptr_counts = counts.data_ptr(); - const auto* ptr_vals = t.data_ptr(); + const auto* ptr_vals = t.const_data_ptr(); for (C10_UNUSED const auto _ : c10::irange(t.numel())) { ++ptr_counts[*ptr_vals++]; } @@ -2310,10 +2310,10 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in const auto src_idx_len = src_intersection_offsets.const_data_ptr()[size - 1]; auto src_idx = at::empty({src_idx_len}, src.options()); - const auto* ptr_src = src.data_ptr(); - const auto* ptr_intersection_counts = intersection_counts.data_ptr(); - const auto* ptr_src_intersection_counts = src_intersection_counts.data_ptr(); - const auto* ptr_src_intersection_offsets = src_intersection_offsets.data_ptr(); + const auto* ptr_src = src.const_data_ptr(); + const auto* ptr_intersection_counts = intersection_counts.const_data_ptr(); + const auto* ptr_src_intersection_counts = src_intersection_counts.const_data_ptr(); + const auto* ptr_src_intersection_offsets = src_intersection_offsets.const_data_ptr(); auto* ptr_src_idx = src_idx.data_ptr(); const auto src_len = src.numel(); @@ -2362,16 +2362,16 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in auto counts_per_thread = idx_counts_per_thread.mul_(src_counts).sum(-1); return counts_per_thread.cumsum(0).sub_(counts_per_thread); }(); - const auto* ptr_thread_offset = thread_offset.data_ptr(); + const auto* ptr_thread_offset = thread_offset.const_data_ptr(); auto idx_selected = at::empty({res_len}, idx.options()); auto src_selected = at::empty({res_len}, src.options()); - const auto* ptr_idx = idx.data_ptr(); - const auto* ptr_src_counts = src_counts.data_ptr(); - const auto* ptr_intersection_counts = intersection_counts.data_ptr(); - const auto* ptr_src_idx = src_idx.data_ptr(); - const auto* ptr_src_idx_offsets = src_idx_offsets.data_ptr(); + const auto* ptr_idx = idx.const_data_ptr(); + const auto* ptr_src_counts = src_counts.const_data_ptr(); + const auto* ptr_intersection_counts = intersection_counts.const_data_ptr(); + const auto* ptr_src_idx = src_idx.const_data_ptr(); + const auto* ptr_src_idx_offsets = src_idx_offsets.const_data_ptr(); auto* ptr_idx_selected = idx_selected.data_ptr(); auto* ptr_src_selected = src_selected.data_ptr(); @@ -2433,8 +2433,8 @@ Tensor index_select_sparse_cpu(const Tensor& self, int64_t dim, const Tensor& in } }(); - const auto* ptr_outer = outer.data_ptr(); - const auto* ptr_inner = inner.data_ptr(); + const auto* ptr_outer = outer.const_data_ptr(); + const auto* ptr_inner = inner.const_data_ptr(); // NOTE: if very critical, replace std::vector with // a data structure that operates on stack up to some limit. auto outer_selected_idx = std::vector(); diff --git a/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_prepack.cpp b/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_prepack.cpp index bedf2f4461f3a..8f80d920e3652 100644 --- a/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_prepack.cpp +++ b/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_prepack.cpp @@ -186,7 +186,7 @@ PackedLinearWeightQnnp::PackedLinearWeightQnnp( std::tie(w_zero_points_, w_scales_) = make_zero_points_and_scales_tensor(weight_contig); - const float* weight_scales_data = w_scales_.data_ptr(); + const float* weight_scales_data = w_scales_.const_data_ptr(); at::Tensor qnnp_weight = at::_empty_affine_quantized( weight_contig.sizes(), at::device(c10::kCPU).dtype(c10::kQUInt8), diff --git a/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_serialize.cpp b/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_serialize.cpp index e557ec3994134..d5790b5bc223e 100644 --- a/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_serialize.cpp +++ b/aten/src/ATen/native/ao_sparse/quantized/cpu/qlinear_serialize.cpp @@ -160,7 +160,7 @@ BCSRSerializationType PackedLinearWeight::serialize() { BCSRSerializationType PackedLinearWeightQnnp::serialize() { at::Tensor w_scales_compact; at::Tensor w_zero_points_compact; - const float* w_scales_data_ptr = w_scales_.data_ptr(); + const float* w_scales_data_ptr = w_scales_.const_data_ptr(); std::function subtract_128 = [](uint8_t v) { return static_cast(static_cast(v) - 128); }; diff --git a/aten/src/ATen/native/cpu/HistogramKernel.cpp b/aten/src/ATen/native/cpu/HistogramKernel.cpp index 73a16746e1efd..196bfd5647a76 100644 --- a/aten/src/ATen/native/cpu/HistogramKernel.cpp +++ b/aten/src/ATen/native/cpu/HistogramKernel.cpp @@ -292,10 +292,10 @@ void infer_bin_edges_from_input(const Tensor& input, const int64_t N, TORCH_INTERNAL_ASSERT(min.is_contiguous() && max.is_contiguous()); - const scalar_t *min_data = min.data_ptr(); + const scalar_t *min_data = min.const_data_ptr(); std::copy(min_data, min_data + N, leftmost_edges.begin()); - const scalar_t *max_data = max.data_ptr(); + const scalar_t *max_data = max.const_data_ptr(); std::copy(max_data, max_data + N, rightmost_edges.begin()); } diff --git a/aten/src/ATen/native/cpu/MultinomialKernel.cpp b/aten/src/ATen/native/cpu/MultinomialKernel.cpp index 0e469d38af610..1c4054abdf239 100644 --- a/aten/src/ATen/native/cpu/MultinomialKernel.cpp +++ b/aten/src/ATen/native/cpu/MultinomialKernel.cpp @@ -140,7 +140,7 @@ multinomial_with_replacement_apply( /* cumulative probability distribution vector */ Tensor cum_dist = at::empty({n_categories}, self.options().dtype(kFloat)); - const scalar_t* const self_ptr = self.data_ptr(); + const scalar_t* const self_ptr = self.const_data_ptr(); float* const cum_dist_ptr = cum_dist.data_ptr(); int64_t* const result_ptr = result.data_ptr(); diff --git a/aten/src/ATen/native/cpu/SparseFactories.cpp b/aten/src/ATen/native/cpu/SparseFactories.cpp index 8f938e545f27a..2c0b54b8dd7af 100644 --- a/aten/src/ATen/native/cpu/SparseFactories.cpp +++ b/aten/src/ATen/native/cpu/SparseFactories.cpp @@ -29,7 +29,7 @@ void _spdiags_kernel_cpu( "spdiags_cpu", [&] { auto* const values_write_ptr = values.data_ptr(); - const auto* const diagonals_ptr = diagonals.data_ptr(); + const auto* const diagonals_ptr = diagonals.const_data_ptr(); cpu_kernel( iter, diff --git a/aten/src/ATen/native/cpu/UpSampleKernelAVXAntialias.h b/aten/src/ATen/native/cpu/UpSampleKernelAVXAntialias.h index 53ee6a603b9f3..726a83c20963d 100644 --- a/aten/src/ATen/native/cpu/UpSampleKernelAVXAntialias.h +++ b/aten/src/ATen/native/cpu/UpSampleKernelAVXAntialias.h @@ -66,7 +66,7 @@ at::Tensor unpack_rgb(const at::Tensor& packed_tensor) { // into as 32 bits. This generalizes to num_channels <= 4 and also works for // non-channels_last tensors. - const uint8_t* packed = (const uint8_t*)packed_tensor.data_ptr(); + const uint8_t* packed = (const uint8_t*)packed_tensor.const_data_ptr(); auto num_pixels = packed_tensor.size(1) * packed_tensor.size(2); auto num_channels = packed_tensor.size(0); @@ -180,18 +180,18 @@ void ImagingResampleHorizontal( // Although this may not be needed if / when we port all this code to use // Vec.h since this would potentially give us another fall-back implem - const int16_t* kk = (int16_t*)(horiz_indices_weights[3].data_ptr()); + const int16_t* kk = (int16_t*)(horiz_indices_weights[3].const_data_ptr()); auto xout = unpacked_output.size(2); auto yout = unpacked_output.size(1); auto xin = unpacked_input.size(2); TORCH_INTERNAL_ASSERT(num_channels == unpacked_input.size(0)); - const int64_t* idx_ptr_xmin = horiz_indices_weights[0].data_ptr(); - const int64_t* idx_ptr_size = horiz_indices_weights[1].data_ptr(); + const int64_t* idx_ptr_xmin = horiz_indices_weights[0].const_data_ptr(); + const int64_t* idx_ptr_size = horiz_indices_weights[1].const_data_ptr(); uint8_t* unpacked_output_p = unpacked_output.data_ptr(); - const uint8_t* unpacked_input_p = unpacked_input.data_ptr(); + const uint8_t* unpacked_input_p = unpacked_input.const_data_ptr(); int64_t yy = 0; auto xout_stride = xout * num_channels; @@ -255,13 +255,13 @@ void ImagingResampleVertical( // basic_loop_aa_vertical) // Although this may not be needed if / when we port all this code to use // Vec.h since this would potentially give us another fall-back implem - const int16_t* kk = (int16_t*)(vert_indices_weights[3].data_ptr()); + const int16_t* kk = (int16_t*)(vert_indices_weights[3].const_data_ptr()); - const int64_t* idx_ptr_xmin = vert_indices_weights[0].data_ptr(); - const int64_t* idx_ptr_size = vert_indices_weights[1].data_ptr(); + const int64_t* idx_ptr_xmin = vert_indices_weights[0].const_data_ptr(); + const int64_t* idx_ptr_size = vert_indices_weights[1].const_data_ptr(); uint8_t* unpacked_output_p = unpacked_output.data_ptr(); - const uint8_t* unpacked_input_p = unpacked_input.data_ptr(); + const uint8_t* unpacked_input_p = unpacked_input.const_data_ptr(); auto xout = unpacked_output.size(2); auto yout = unpacked_output.size(1); diff --git a/aten/src/ATen/native/cpu/group_norm_kernel.cpp b/aten/src/ATen/native/cpu/group_norm_kernel.cpp index 92a940dce6d22..f6b7f2a5d4813 100644 --- a/aten/src/ATen/native/cpu/group_norm_kernel.cpp +++ b/aten/src/ATen/native/cpu/group_norm_kernel.cpp @@ -1377,11 +1377,11 @@ void GroupNormBackwardKernelImplChannelsLastInternal( TORCH_CHECK(!gamma.defined() || gamma.numel() == C); int64_t D = C / group; int64_t G = group; - const T* dY_data = dY.data_ptr(); - const T* X_data = X.data_ptr(); - const PT* mean_data = mean.data_ptr(); - const PT* rstd_data = rstd.data_ptr(); - const PT* gamma_data = gamma.defined() ? gamma.data_ptr() : nullptr; + const T* dY_data = dY.const_data_ptr(); + const T* X_data = X.const_data_ptr(); + const PT* mean_data = mean.const_data_ptr(); + const PT* rstd_data = rstd.const_data_ptr(); + const PT* gamma_data = gamma.defined() ? gamma.const_data_ptr() : nullptr; T* dX_data = dX.defined() ? dX.data_ptr() : nullptr; PT* dgamma_data = dgamma.defined() ? dgamma.data_ptr() : nullptr; PT* dbeta_data = dbeta.defined() ? dbeta.data_ptr() : nullptr; diff --git a/aten/src/ATen/native/cpu/int4mm_kernel.cpp b/aten/src/ATen/native/cpu/int4mm_kernel.cpp index 57e485ab02459..acb4b927f23f5 100644 --- a/aten/src/ATen/native/cpu/int4mm_kernel.cpp +++ b/aten/src/ATen/native/cpu/int4mm_kernel.cpp @@ -613,10 +613,10 @@ void int4pack_mm_kernel_( const Tensor& qScaleAndZeros, int N, int K) { - const auto* A_data = A.data_ptr(); - const auto* B_data = reinterpret_cast(B.data_ptr()); + const auto* A_data = A.const_data_ptr(); + const auto* B_data = reinterpret_cast(B.const_data_ptr()); auto* C_data = C.data_ptr(); - const auto* S_data = qScaleAndZeros.data_ptr(); + const auto* S_data = qScaleAndZeros.const_data_ptr(); int M = A.size(0); diff --git a/aten/src/ATen/native/cpu/int8mm_kernel.cpp b/aten/src/ATen/native/cpu/int8mm_kernel.cpp index 935a8180bc83c..4ef6cde4a8799 100644 --- a/aten/src/ATen/native/cpu/int8mm_kernel.cpp +++ b/aten/src/ATen/native/cpu/int8mm_kernel.cpp @@ -284,10 +284,10 @@ void int8pack_mm_kernel_( const Tensor& B, const Tensor& scales) { - const auto* A_data = A.data_ptr(); - const auto* B_data = B.data_ptr(); + const auto* A_data = A.const_data_ptr(); + const auto* B_data = B.const_data_ptr(); auto* C_data = C.data_ptr(); - const auto* S_data = scales.data_ptr(); + const auto* S_data = scales.const_data_ptr(); int M = A.size(0); int N = B.size(0); diff --git a/aten/src/ATen/native/cuda/TensorShape.cu b/aten/src/ATen/native/cuda/TensorShape.cu index db6590fdfefd6..97cf4dade1638 100644 --- a/aten/src/ATen/native/cuda/TensorShape.cu +++ b/aten/src/ATen/native/cuda/TensorShape.cu @@ -186,7 +186,7 @@ static inline std::vector get_split_base_addrs( const at::Tensor& tensor, at::IntArrayRef split_sizes, int64_t dim) { - const auto* data_ptr = static_cast(tensor.data_ptr()); + const auto* data_ptr = static_cast(tensor.const_data_ptr()); const auto strides = tensor.strides(); const auto element_sz = tensor.element_size(); int64_t off = 0; diff --git a/aten/src/ATen/native/cuda/fused_adam_amsgrad_impl.cu b/aten/src/ATen/native/cuda/fused_adam_amsgrad_impl.cu index 43527938fc045..9cebb82e512a8 100644 --- a/aten/src/ATen/native/cuda/fused_adam_amsgrad_impl.cu +++ b/aten/src/ATen/native/cuda/fused_adam_amsgrad_impl.cu @@ -85,7 +85,7 @@ void _fused_adam_amsgrad_cuda_impl_( grad_scale.has_value() ? grad_scale->data_ptr() : nullptr; const float* found_inf_ptr = found_inf.has_value() ? found_inf->data_ptr() : nullptr; - const float* lr_ptr = lr.data_ptr(); + const float* lr_ptr = lr.const_data_ptr(); AT_DISPATCH_FLOATING_TYPES_AND2( kHalf, diff --git a/aten/src/ATen/native/cuda/fused_adam_impl.cu b/aten/src/ATen/native/cuda/fused_adam_impl.cu index 41fc1c304da1e..7f2843b3b4ee4 100644 --- a/aten/src/ATen/native/cuda/fused_adam_impl.cu +++ b/aten/src/ATen/native/cuda/fused_adam_impl.cu @@ -75,7 +75,7 @@ void _fused_adam_cuda_impl_( grad_scale.has_value() ? grad_scale->data_ptr() : nullptr; const float* found_inf_ptr = found_inf.has_value() ? found_inf->data_ptr() : nullptr; - const float* lr_ptr = lr.data_ptr(); + const float* lr_ptr = lr.const_data_ptr(); AT_DISPATCH_FLOATING_TYPES_AND2( kHalf, diff --git a/aten/src/ATen/native/cuda/fused_adamw_amsgrad_impl.cu b/aten/src/ATen/native/cuda/fused_adamw_amsgrad_impl.cu index 052d1cee7deae..376711c39db6d 100644 --- a/aten/src/ATen/native/cuda/fused_adamw_amsgrad_impl.cu +++ b/aten/src/ATen/native/cuda/fused_adamw_amsgrad_impl.cu @@ -86,7 +86,7 @@ void _fused_adamw_amsgrad_cuda_impl_( grad_scale.has_value() ? grad_scale->data_ptr() : nullptr; const float* found_inf_ptr = found_inf.has_value() ? found_inf->data_ptr() : nullptr; - const float* lr_ptr = lr.data_ptr(); + const float* lr_ptr = lr.const_data_ptr(); AT_DISPATCH_FLOATING_TYPES_AND2( kHalf, diff --git a/aten/src/ATen/native/cuda/fused_adamw_impl.cu b/aten/src/ATen/native/cuda/fused_adamw_impl.cu index 0411cc82eb4ca..cc4feaa145122 100644 --- a/aten/src/ATen/native/cuda/fused_adamw_impl.cu +++ b/aten/src/ATen/native/cuda/fused_adamw_impl.cu @@ -76,7 +76,7 @@ void _fused_adamw_cuda_impl_( grad_scale.has_value() ? grad_scale->data_ptr() : nullptr; const float* found_inf_ptr = found_inf.has_value() ? found_inf->data_ptr() : nullptr; - const float* lr_ptr = lr.data_ptr(); + const float* lr_ptr = lr.const_data_ptr(); AT_DISPATCH_FLOATING_TYPES_AND2( kHalf, diff --git a/aten/src/ATen/native/nested/NestedTensorBackward.cpp b/aten/src/ATen/native/nested/NestedTensorBackward.cpp index 54304c8f4f33f..e4465b792c21e 100644 --- a/aten/src/ATen/native/nested/NestedTensorBackward.cpp +++ b/aten/src/ATen/native/nested/NestedTensorBackward.cpp @@ -137,7 +137,7 @@ Tensor _nested_sum_backward_cpu( AT_DISPATCH_ALL_TYPES_AND2( ScalarType::Half, ScalarType::BFloat16, self_grad_buffer.scalar_type(), "nested_sum_dim_cpu", [&]() { auto* self_grad_data = self_grad_buffer.data_ptr(); - const auto* output_grad_data = grad_buffer.data_ptr(); + const auto* output_grad_data = grad_buffer.const_data_ptr(); int64_t out_idx = 0, in_idx = 0; for (const auto i : c10::irange(ntensors)) { int64_t segments = num_segments[i].item(); diff --git a/aten/src/ATen/native/nested/NestedTensorMath.cpp b/aten/src/ATen/native/nested/NestedTensorMath.cpp index bc88d732e91e2..7d3e826ef53e9 100644 --- a/aten/src/ATen/native/nested/NestedTensorMath.cpp +++ b/aten/src/ATen/native/nested/NestedTensorMath.cpp @@ -403,7 +403,7 @@ Tensor NestedTensor_sum_dim_CPU( AT_DISPATCH_ALL_TYPES_AND2( ScalarType::Half, ScalarType::BFloat16, buffer.scalar_type(), "nested_sum_dim_cpu", [&]() { auto* output_data = output_buffer.data_ptr(); - const auto* input_data = buffer.data_ptr(); + const auto* input_data = buffer.const_data_ptr(); int64_t out_idx = 0, in_idx = 0; for (const auto i : c10::irange(ntensors)) { int64_t segments = num_segments[i].item(); diff --git a/aten/src/ATen/native/nested/NestedTensorUtils.h b/aten/src/ATen/native/nested/NestedTensorUtils.h index f4d19128abba1..3b4f18f11b64b 100644 --- a/aten/src/ATen/native/nested/NestedTensorUtils.h +++ b/aten/src/ATen/native/nested/NestedTensorUtils.h @@ -119,7 +119,7 @@ inline std::vector NestedTensor_get_sizes( if (orig_dim == 0) { return sizes; } - const int64_t* sizemat_ptr = sizemat.data_ptr(); + const int64_t* sizemat_ptr = sizemat.const_data_ptr(); for (const auto i : c10::irange(ntensors)) { sizes[i] = IntArrayRef(sizemat_ptr, sizemat_ptr + orig_dim); @@ -152,7 +152,7 @@ inline std::vector NestedTensor_get_strides( if (orig_dim == 0) { return strides; } - const int64_t* stridemat_ptr = stridemat.data_ptr(); + const int64_t* stridemat_ptr = stridemat.const_data_ptr(); for (const auto i : c10::irange(ntensors)) { strides[i] = IntArrayRef(stridemat_ptr, stridemat_ptr + orig_dim); stridemat_ptr += orig_dim; diff --git a/aten/src/ATen/native/nested/cuda/NestedTensorBinaryOps.cu b/aten/src/ATen/native/nested/cuda/NestedTensorBinaryOps.cu index f7055d7fd0330..350c3a27e77b0 100644 --- a/aten/src/ATen/native/nested/cuda/NestedTensorBinaryOps.cu +++ b/aten/src/ATen/native/nested/cuda/NestedTensorBinaryOps.cu @@ -85,8 +85,8 @@ void _nested_op_dense_esuhm_kernel(Tensor& result, const Tensor& self, const Ten auto result_offsets = at::cat({offsets, at::tensor(self_ptr->numel())}); result_offsets = result_offsets.to(kCUDA); - const scalar_t* self_data_ptr = self_buffer.data_ptr(); - const scalar_t* other_data_ptr = other.data_ptr(); + const scalar_t* self_data_ptr = self_buffer.const_data_ptr(); + const scalar_t* other_data_ptr = other.const_data_ptr(); scalar_t* result_data_ptr = result_buffer.data_ptr(); int64_t* result_offsets_ptr = result_offsets.data_ptr(); diff --git a/aten/src/ATen/native/nested/cuda/NestedTensorMatmul.cu b/aten/src/ATen/native/nested/cuda/NestedTensorMatmul.cu index e1a364b310f36..252e3741c5c7d 100644 --- a/aten/src/ATen/native/nested/cuda/NestedTensorMatmul.cu +++ b/aten/src/ATen/native/nested/cuda/NestedTensorMatmul.cu @@ -335,7 +335,7 @@ Tensor bmm_nested_cuda(const Tensor& self, const Tensor& mat2) { Tensor output = wrap_buffer(out_buffer, out_sizemat); auto out_ptr = get_nested_tensor_impl(output); - const int64_t *out_offsets_ptr = out_ptr->get_storage_offsets().data_ptr(); + const int64_t *out_offsets_ptr = out_ptr->get_storage_offsets().const_data_ptr(); #ifndef USE_ROCM #ifndef _WIN32 diff --git a/aten/src/ATen/native/nested/cuda/NestedTensorTransformerFunctions.cpp b/aten/src/ATen/native/nested/cuda/NestedTensorTransformerFunctions.cpp index 8955585b432e8..0da0c3e361d1f 100644 --- a/aten/src/ATen/native/nested/cuda/NestedTensorTransformerFunctions.cpp +++ b/aten/src/ATen/native/nested/cuda/NestedTensorTransformerFunctions.cpp @@ -28,7 +28,7 @@ namespace { int64_t padded_tensor_numel(const Tensor& sizes) { const auto sizes_num_rows = sizes.sizes()[0]; const auto sizes_row_length = sizes.sizes()[1]; - const auto* sizes_data = sizes.data_ptr(); + const auto* sizes_data = sizes.const_data_ptr(); int64_t numel = 0; for (const auto row_num : c10::irange(sizes_num_rows)) { const auto* row_ptr = sizes_data + row_num * sizes_row_length; diff --git a/aten/src/ATen/native/nested/cuda/NestedTensorTransformerUtils.cpp b/aten/src/ATen/native/nested/cuda/NestedTensorTransformerUtils.cpp index 0e26a3e6a545c..f708920d04dfa 100644 --- a/aten/src/ATen/native/nested/cuda/NestedTensorTransformerUtils.cpp +++ b/aten/src/ATen/native/nested/cuda/NestedTensorTransformerUtils.cpp @@ -133,8 +133,8 @@ int64_t get_nnz(Tensor nestedtensor) { } // Check the offsets are a constant multiple from the previous numels - const int64_t* tensor_size_ptr = tensor_sizes.data_ptr(); - const int64_t* tensor_stride_ptr = tensor_strides.data_ptr(); + const int64_t* tensor_size_ptr = tensor_sizes.const_data_ptr(); + const int64_t* tensor_stride_ptr = tensor_strides.const_data_ptr(); int64_t numel_0 = (tensor_size_ptr[0] * tensor_stride_ptr[0]); TORCH_INTERNAL_ASSERT(numel_0 > 0, "numels must be positive!"); diff --git a/aten/src/ATen/native/quantized/QTensor.cpp b/aten/src/ATen/native/quantized/QTensor.cpp index b8841214fdcb2..9705de0a4a54d 100644 --- a/aten/src/ATen/native/quantized/QTensor.cpp +++ b/aten/src/ATen/native/quantized/QTensor.cpp @@ -344,7 +344,7 @@ std::tuple choose_qparams_optimized( TORCH_CHECK(numel <= input_tensor.numel(), "numel ", numel, " greater than input_tensor.numel() ", input_tensor.numel()); - const float* input_row = input_tensor.data_ptr(); + const float* input_row = input_tensor.const_data_ptr(); float xmin = *std::min_element(input_row, input_row + numel); float xmax = *std::max_element(input_row, input_row + numel); @@ -352,7 +352,7 @@ std::tuple choose_qparams_optimized( // NOLINTNEXTLINE(cppcoreguidelines-narrowing-conversions,bugprone-narrowing-conversions) int min_bins = n_bins * (1.0 - (float) ratio); Tensor input_tensor_contig = input_tensor.contiguous(); - const float* input = input_tensor_contig.data_ptr(); + const float* input = input_tensor_contig.const_data_ptr(); std::vector q_input(numel); float loss = diff --git a/aten/src/ATen/native/quantized/cpu/IntReprQuant.cpp b/aten/src/ATen/native/quantized/cpu/IntReprQuant.cpp index 9867a8f48a9ea..cfcce3465a731 100644 --- a/aten/src/ATen/native/quantized/cpu/IntReprQuant.cpp +++ b/aten/src/ATen/native/quantized/cpu/IntReprQuant.cpp @@ -32,7 +32,7 @@ Tensor int_repr_quantized_cpu(const Tensor& self) { {out_size}, self.options().dtype(UNDERLYING_TYPE), self.suggest_memory_format()); - const underlying_t* qdata = reinterpret_cast(self.data_ptr()); + const underlying_t* qdata = reinterpret_cast(self.const_data_ptr()); for (const auto i : c10::irange(dst.numel())) { dst[i] = static_cast(qdata[i]); } diff --git a/aten/src/ATen/native/quantized/cpu/Normalization.cpp b/aten/src/ATen/native/quantized/cpu/Normalization.cpp index 05a9585274306..0f5fb9884a9c5 100644 --- a/aten/src/ATen/native/quantized/cpu/Normalization.cpp +++ b/aten/src/ATen/native/quantized/cpu/Normalization.cpp @@ -80,8 +80,8 @@ Tensor q_batch_norm1d_impl( TORCH_CHECK(weight.numel() == C, "Expect weight size to match C"); TORCH_CHECK(bias.numel() == C, "Expect weight size to match C"); - const float* weight_data = weight.template data_ptr(); - const float* bias_data = bias.template data_ptr(); + const float* weight_data = weight.template const_data_ptr(); + const float* bias_data = bias.template const_data_ptr(); TORCH_CHECK(mean.numel() == C, "Mean size must match channel dimension"); TORCH_CHECK(var.numel() == C, "Variance size must match channel dimension"); @@ -91,8 +91,8 @@ Tensor q_batch_norm1d_impl( float* alpha_data = alpha.mutable_data_ptr(); float* beta_data = beta.data_ptr(); - const float* mean_data = mean.template data_ptr(); - const float* var_data = var.template data_ptr(); + const float* mean_data = mean.template const_data_ptr(); + const float* var_data = var.template const_data_ptr(); if (ndim == 2) { // create a fake H and W dimension so we can use NHWC @@ -189,8 +189,8 @@ Tensor q_batch_norm2d_impl( TORCH_CHECK(weight.numel() == C, "Expect weight size to match C"); TORCH_CHECK(bias.numel() == C, "Expect weight size to match C"); - const float* weight_data = weight.template data_ptr(); - const float* bias_data = bias.template data_ptr(); + const float* weight_data = weight.template const_data_ptr(); + const float* bias_data = bias.template const_data_ptr(); TORCH_CHECK(mean.numel() == C, "Mean size must match channel dimension"); TORCH_CHECK(var.numel() == C, "Variance size must match channel dimension"); @@ -200,8 +200,8 @@ Tensor q_batch_norm2d_impl( float* alpha_data = alpha.mutable_data_ptr(); float* beta_data = beta.data_ptr(); - const float* mean_data = mean.template data_ptr(); - const float* var_data = var.template data_ptr(); + const float* mean_data = mean.template const_data_ptr(); + const float* var_data = var.template const_data_ptr(); auto oSizes = qx.sizes(); auto qx_nhwc = qx.contiguous(MemoryFormat::ChannelsLast); @@ -285,8 +285,8 @@ Tensor q_batch_norm3d_impl( TORCH_CHECK(weight.numel() == C, "Expect weight size to match C"); TORCH_CHECK(bias.numel() == C, "Expect weight size to match C"); - const float* weight_data = weight.template data_ptr(); - const float* bias_data = bias.template data_ptr(); + const float* weight_data = weight.template const_data_ptr(); + const float* bias_data = bias.template const_data_ptr(); TORCH_CHECK(mean.numel() == C, "Mean size must match channel dimension"); TORCH_CHECK(var.numel() == C, "Variance size must match channel dimension"); @@ -296,8 +296,8 @@ Tensor q_batch_norm3d_impl( float* alpha_data = alpha.mutable_data_ptr(); float* beta_data = beta.data_ptr(); - const float* mean_data = mean.template data_ptr(); - const float* var_data = var.template data_ptr(); + const float* mean_data = mean.template const_data_ptr(); + const float* var_data = var.template const_data_ptr(); auto oSizes = qx.sizes(); auto qx_nhwc = qx.contiguous(MemoryFormat::ChannelsLast3d); diff --git a/aten/src/ATen/native/quantized/cpu/fused_obs_fake_quant.cpp b/aten/src/ATen/native/quantized/cpu/fused_obs_fake_quant.cpp index 77c60141b0655..409f6e38d3e0b 100644 --- a/aten/src/ATen/native/quantized/cpu/fused_obs_fake_quant.cpp +++ b/aten/src/ATen/native/quantized/cpu/fused_obs_fake_quant.cpp @@ -41,8 +41,8 @@ void calculate_moving_average( } else { std::tie(x_min, x_max) = at::aminmax(x); } - const float* min_curr_val = x_min.data_ptr(); - const float* max_curr_val = x_max.data_ptr(); + const float* min_curr_val = x_min.const_data_ptr(); + const float* max_curr_val = x_max.const_data_ptr(); // Moving Average Min/Max observer for input tensor float* running_min_val = running_min.data_ptr(); float* running_max_val = running_max.data_ptr(); diff --git a/aten/src/ATen/native/quantized/cpu/kernels/QuantizedOpKernels.cpp b/aten/src/ATen/native/quantized/cpu/kernels/QuantizedOpKernels.cpp index fee759c3a968c..dc9063ecf46f1 100644 --- a/aten/src/ATen/native/quantized/cpu/kernels/QuantizedOpKernels.cpp +++ b/aten/src/ATen/native/quantized/cpu/kernels/QuantizedOpKernels.cpp @@ -2797,8 +2797,8 @@ void quantized_normalize_kernel( "Unexpected size of beta"); scalar_t* X_data = X.data_ptr(); - const float* gamma_data = gamma.defined() ? gamma.data_ptr() : nullptr; - const float* beta_data = beta.defined() ? beta.data_ptr() : nullptr; + const float* gamma_data = gamma.defined() ? gamma.const_data_ptr() : nullptr; + const float* beta_data = beta.defined() ? beta.const_data_ptr() : nullptr; scalar_t* Y_data = Y->data_ptr(); const bool gamma_null = gamma_data == nullptr; const bool beta_null = beta_data == nullptr; @@ -3085,8 +3085,8 @@ void quantized_groupnorm_nhwc_kernel( "Unexpected size of beta"); scalar_t* X_data = X.data_ptr(); - const float* gamma_data = gamma.defined() ? gamma.data_ptr() : nullptr; - const float* beta_data = beta.defined() ? beta.data_ptr() : nullptr; + const float* gamma_data = gamma.defined() ? gamma.const_data_ptr() : nullptr; + const float* beta_data = beta.defined() ? beta.const_data_ptr() : nullptr; scalar_t* Y_data = Y->data_ptr(); const bool gamma_null = gamma_data == nullptr; const bool beta_null = beta_data == nullptr; @@ -3336,7 +3336,7 @@ void quantize_tensor_per_tensor_affine_cpu( AT_DISPATCH_QINT_TYPES( qtensor.scalar_type(), "quantize_tensor_per_tensor_affine_cpu", [&]() { check_tensor_memory_format(rtensor, qtensor); - const float* rd = rtensor.data_ptr(); + const float* rd = rtensor.const_data_ptr(); auto qd = reinterpret_cast(qtensor.data_ptr()); // NOLINTNEXTLINE(cppcoreguidelines-pro-type-member-init) fbgemm::TensorQuantizationParams qparams; @@ -3668,7 +3668,7 @@ void quantize_tensor_per_tensor_affine_cpu( double scale, int64_t zero_point) { check_tensor_memory_format(rtensor, qtensor); - const float* rdata = rtensor.data_ptr(); + const float* rdata = rtensor.const_data_ptr(); int numel = rtensor.numel(); #if defined(__ARM_NEON__) || defined(__aarch64__) AT_DISPATCH_QINT_TYPES( @@ -3707,7 +3707,7 @@ void dequantize_tensor_per_tensor_affine_cpu( #if defined(__ARM_NEON__) || defined(__aarch64__) AT_DISPATCH_QINT_TYPES( qtensor.scalar_type(), "dequantize_tensor_per_tensor_affine_cpu", [&]() { - const scalar_t* qdata = qtensor.data_ptr(); + const scalar_t* qdata = qtensor.const_data_ptr(); auto dequantize_range = [&](int64_t begin, int64_t end) { dequantize_tensor_arm( qdata + begin, rdata + begin, end - begin, scale, zero_point); @@ -3722,7 +3722,7 @@ void dequantize_tensor_per_tensor_affine_cpu( // Fallback path AT_DISPATCH_QINT_TYPES( qtensor.scalar_type(), "dequantize_tensor_per_tensor_affine_cpu", [&]() { - const scalar_t* qdata = qtensor.data_ptr(); + const scalar_t* qdata = qtensor.const_data_ptr(); for (const auto i : c10::irange(numel)) { rdata[i] = dequantize_val(scale, zero_point, qdata[i]); } @@ -3752,7 +3752,7 @@ void quantize_tensor_per_channel_impl( int64_t channels = rtensor.size(axis); auto scales_data = scales.data_ptr(); auto zero_points_data = zero_points.data_ptr(); - const float* in = rtensor.data_ptr(); + const float* in = rtensor.const_data_ptr(); auto out = qtensor.data_ptr(); if (axis == 1 && (rtensor.is_contiguous(MemoryFormat::ChannelsLast) || @@ -3804,7 +3804,7 @@ void quantize_tensor_per_channel_impl( int64_t channels = rtensor.size(axis); auto scales_data = scales.data_ptr(); auto zero_points_data = zero_points.data_ptr(); - const float* in = rtensor.data_ptr(); + const float* in = rtensor.const_data_ptr(); auto out = (uint8_t*)qtensor.data_ptr(); #if defined(__ARM_NEON__) // magic float and magic int to take care of rounding @@ -4022,7 +4022,7 @@ void dequantize_per_channel_affine_kernel( auto scales_data = scales.data_ptr(); auto zero_points_data = zero_points.data_ptr(); check_tensor_memory_format(qtensor, rtensor); - const auto* qd = qtensor.data_ptr(); + const auto* qd = qtensor.const_data_ptr(); float* rd = rtensor.data_ptr(); const auto elem_per_byte = 8 / bit_width; if (axis == 1 && (rtensor.is_contiguous(MemoryFormat::ChannelsLast) || @@ -4099,7 +4099,7 @@ void quantize_tensor_per_channel_float_qparams_cpu( auto scales_data = scales.data_ptr(); auto zero_points_data = zero_points.data_ptr(); check_tensor_memory_format(rtensor, qtensor); - const float* rdata = rtensor.data_ptr(); + const float* rdata = rtensor.const_data_ptr(); auto qdata = reinterpret_cast(qtensor.data_ptr()); const auto elem_per_byte = CHAR_BIT / bit_width; int qvalue = 0; @@ -4163,7 +4163,7 @@ void quantize_tensor_per_tensor_affine_sub_byte_cpu( AT_DISPATCH_QINT_AND_SUB_BYTE_TYPES( qtensor.scalar_type(), "quantize_tensor_per_tensor_affine_sub_byte_cpu", [&]() { check_tensor_memory_format(rtensor, qtensor); - const float* const rdata = rtensor.data_ptr(); + const float* const rdata = rtensor.const_data_ptr(); auto qdata = reinterpret_cast(qtensor.data_ptr()); auto numel = rtensor.numel(); const auto elem_per_byte = CHAR_BIT / bit_width; @@ -4196,7 +4196,7 @@ void dequantize_tensor_per_tensor_affine_sub_byte_cpu( qtensor.scalar_type(), "dequantize_tensor_per_tensor_affine_sub_byte_cpu", [&]() { check_tensor_memory_format(rtensor, qtensor); auto rdata = rtensor.data_ptr(); - const underlying_t* qdata = reinterpret_cast(qtensor.data_ptr()); + const underlying_t* qdata = reinterpret_cast(qtensor.const_data_ptr()); auto numel = rtensor.numel(); const auto elem_per_byte = CHAR_BIT / bit_width; diff --git a/aten/src/ATen/native/quantized/cpu/qconv.cpp b/aten/src/ATen/native/quantized/cpu/qconv.cpp index 596b16370dfeb..50155d85d4473 100644 --- a/aten/src/ATen/native/quantized/cpu/qconv.cpp +++ b/aten/src/ATen/native/quantized/cpu/qconv.cpp @@ -647,7 +647,7 @@ at::Tensor PackedConvWeightsQnnp::apply_impl_xnnp( // create an empty tensor for packing the weights const at::Tensor weight_contig = orig_weight.contiguous(c10::MemoryFormat::ChannelsLast); - const float* w_scales_data = w_scales.data_ptr(); + const float* w_scales_data = w_scales.const_data_ptr(); underlying_t w_zp = 0; at::Tensor weight_tensor; diff --git a/aten/src/ATen/native/quantized/cpu/qembeddingbag_unpack.cpp b/aten/src/ATen/native/quantized/cpu/qembeddingbag_unpack.cpp index 3612f8eba2f88..7c1093a1c4c1a 100644 --- a/aten/src/ATen/native/quantized/cpu/qembeddingbag_unpack.cpp +++ b/aten/src/ATen/native/quantized/cpu/qembeddingbag_unpack.cpp @@ -37,7 +37,7 @@ at::Tensor PackedEmbeddingBagWeight::unpack() { scale_bias_bytes = 4; } - const auto* input = packed_weight.data_ptr(); + const auto* input = packed_weight.const_data_ptr(); // Calculate the output shape, accounting for the last n bytes to be used // for scale/bias rest of the entries are packed depending on the bit_width. std::vector output_shape = { @@ -125,7 +125,7 @@ Tensor& qembeddingbag_byte_unpack_out(Tensor& output, const Tensor& packed_weigh // The last 2 values are used to store the FP32 scale and zero_point values // per row. const int32_t output_columns = input_columns - 2 * sizeof(float); - const auto* input_data = packed_weight.data_ptr(); + const auto* input_data = packed_weight.const_data_ptr(); std::vector output_shape = packed_weight_sizes.vec(); output_shape[col_dim] = output_columns; @@ -187,7 +187,7 @@ Tensor _qembeddingbag_nbit_unpack_helper( int BIT_RATE) { const auto input_rows = packed_weight.size(0); const auto input_columns = packed_weight.size(1); - const auto* input_data = packed_weight.data_ptr(); + const auto* input_data = packed_weight.const_data_ptr(); int NUM_ELEM_PER_BYTE = 8 / BIT_RATE; // The last 4 bytes per row are two fp16 scale and zero_point. diff --git a/aten/src/ATen/native/quantized/cpu/qlinear.cpp b/aten/src/ATen/native/quantized/cpu/qlinear.cpp index 29e6726c47ee9..166d0fd617c06 100644 --- a/aten/src/ATen/native/quantized/cpu/qlinear.cpp +++ b/aten/src/ATen/native/quantized/cpu/qlinear.cpp @@ -316,7 +316,7 @@ at::Tensor PackedLinearWeight::apply_with_input_q_dq_qweight_dq_output_fp32_impl fbgemm::fbgemmSupportedCPU(), "Your CPU does not support FBGEMM."); auto input_contig = input.expect_contiguous(); - const auto* input_ptr = input_contig->data_ptr(); + const auto* input_ptr = input_contig->const_data_ptr(); TORCH_CHECK( input.dim() >= 2, @@ -485,7 +485,7 @@ at::Tensor PackedLinearWeightsQnnp::apply_impl_xnnp( xnn_operator_t xnnp_op = nullptr; - const float* weight_scales_data = w_scales.data_ptr(); + const float* weight_scales_data = w_scales.const_data_ptr(); // prepare weights underlying_t w_zp = static_cast( diff --git a/aten/src/ATen/native/quantized/cpu/qlinear_dynamic.cpp b/aten/src/ATen/native/quantized/cpu/qlinear_dynamic.cpp index 3c267c7ebc0f8..935ad081bd908 100644 --- a/aten/src/ATen/native/quantized/cpu/qlinear_dynamic.cpp +++ b/aten/src/ATen/native/quantized/cpu/qlinear_dynamic.cpp @@ -46,7 +46,7 @@ at::Tensor PackedLinearWeight::apply_dynamic_impl( // TODO: contiguous is called for further jit optimizations. auto input_contig = input.contiguous(); - const auto* input_ptr = input_contig.data_ptr(); + const auto* input_ptr = input_contig.const_data_ptr(); TORCH_CHECK( input.dim() >= 2, @@ -269,7 +269,7 @@ at::Tensor PackedLinearWeightsQnnp::apply_dynamic_impl( TORCH_CHECK(bias_vec.dim() == 1, "bias should be a vector (1D Tensor)"); auto bias_contig = bias_vec.contiguous(); - const float* bias_ptr = bias_contig.data_ptr(); + const float* bias_ptr = bias_contig.const_data_ptr(); // Calculate statistics for quantization of input Tensor // TODO: optimized kernel @@ -410,7 +410,7 @@ at::Tensor& PackedLinearWeightFp16::apply_dynamic_impl( const at::Tensor& input, at::Tensor& output) { const at::Tensor input_contig = input.contiguous(); - const float* input_ptr = input_contig.data_ptr(); + const float* input_ptr = input_contig.const_data_ptr(); auto& packed_weight_fp16 = *w; diff --git a/aten/src/ATen/native/quantized/cuda/EmbeddingBag.cu b/aten/src/ATen/native/quantized/cuda/EmbeddingBag.cu index 0580c47b8c627..3574bfe28f505 100644 --- a/aten/src/ATen/native/quantized/cuda/EmbeddingBag.cu +++ b/aten/src/ATen/native/quantized/cuda/EmbeddingBag.cu @@ -545,7 +545,7 @@ Tensor qembeddingbag_4bit_unpack(const Tensor& packed_weight) { int BIT_RATE = 4; const auto input_rows = packed_weight.size(0); const auto input_columns = packed_weight.size(1); - const auto* input_data = packed_weight.data_ptr(); + const auto* input_data = packed_weight.const_data_ptr(); int NUM_ELEM_PER_BYTE = 8 / BIT_RATE; // The last 4 bytes per row are two fp16 scale and zero_point. diff --git a/aten/src/ATen/native/sparse/FlattenIndicesCommon.h b/aten/src/ATen/native/sparse/FlattenIndicesCommon.h index 26c4f02902604..0e79ed809ae6d 100644 --- a/aten/src/ATen/native/sparse/FlattenIndicesCommon.h +++ b/aten/src/ATen/native/sparse/FlattenIndicesCommon.h @@ -62,7 +62,7 @@ Tensor _flatten_indices_impl(const Tensor& indices, IntArrayRef size) { .build(); { - const auto* RESTRICT ptr_indices = indices.data_ptr(); + const auto* RESTRICT ptr_indices = indices.const_data_ptr(); KernelLauncher::launch(iter, // NOTE: capture by value required by CUDA diff --git a/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionCommon.h b/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionCommon.h index 2a1ca9e2e5683..8782031c49aa1 100644 --- a/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionCommon.h +++ b/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionCommon.h @@ -270,7 +270,7 @@ void _sparse_binary_op_intersection_kernel_impl( .build(); { - const auto* RESTRICT ptr_indices = indices.data_ptr(); + const auto* RESTRICT ptr_indices = indices.const_data_ptr(); KernelLauncher::launch(iter, // NOTE: capture by value required by CUDA @@ -348,8 +348,8 @@ void _sparse_binary_op_intersection_kernel_impl( .build(); { - const auto* RESTRICT ptr_indices = source_indices.data_ptr(); - const auto* RESTRICT ptr_sorted_hash = sorted_hash.data_ptr(); + const auto* RESTRICT ptr_indices = source_indices.const_data_ptr(); + const auto* RESTRICT ptr_sorted_hash = sorted_hash.const_data_ptr(); const auto sorted_hash_len = sorted_hash.numel(); auto* RESTRICT ptr_intersection_count = intersection_count.data_ptr(); auto* RESTRICT ptr_intersection_first_idx = intersection_first_idx.data_ptr(); diff --git a/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionKernel.cpp b/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionKernel.cpp index b48822e32f301..2db8c9e9404cc 100644 --- a/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionKernel.cpp +++ b/aten/src/ATen/native/sparse/SparseBinaryOpIntersectionKernel.cpp @@ -76,7 +76,7 @@ struct CPUValueSelectionIntersectionKernel { const auto* ptr_rhs_values_bytes = data[3]; const auto* ptr_rhs_select_idx_bytes = data[4]; const auto* ptr_intersection_counts_bytes = data[5]; - const auto* ptr_argsort = argsort.data_ptr(); + const auto* ptr_argsort = argsort.const_data_ptr(); for (int64_t i = 0; i < n; ++i) { // Exctract data diff --git a/aten/src/ATen/native/sparse/ValidateCompressedIndicesCommon.h b/aten/src/ATen/native/sparse/ValidateCompressedIndicesCommon.h index 49ea0e1a19e36..ec4c084a39cc1 100644 --- a/aten/src/ATen/native/sparse/ValidateCompressedIndicesCommon.h +++ b/aten/src/ATen/native/sparse/ValidateCompressedIndicesCommon.h @@ -312,7 +312,7 @@ void _validate_compressed_sparse_indices_kernel( idx.scalar_type(), NAME, [&iter, &idx, dim, nnz, idx_ndims, &idx_sizes, &idx_strides]() { - const auto* RESTRICT ptr_idx = idx.data_ptr(); + const auto* RESTRICT ptr_idx = idx.const_data_ptr(); const auto zero = index_t{0}; KernelLauncher::launch( iter, diff --git a/aten/src/ATen/native/sparse/cuda/SparseCsrTensorMath.cu b/aten/src/ATen/native/sparse/cuda/SparseCsrTensorMath.cu index 7ea6823b62f1c..75474e77ea848 100644 --- a/aten/src/ATen/native/sparse/cuda/SparseCsrTensorMath.cu +++ b/aten/src/ATen/native/sparse/cuda/SparseCsrTensorMath.cu @@ -67,7 +67,7 @@ __global__ void convert_indices_from_coo_to_csr_cuda_kernel(output_t* data_out, template void convert_indices_from_coo_to_csr_cuda(const Tensor& result, const Tensor& input, const int64_t size) { int64_t numel = input.numel(); - const input_t* data_in = input.data_ptr(); + const input_t* data_in = input.const_data_ptr(); output_t* data_out = result.data_ptr(); if (numel == 0) { @@ -113,7 +113,7 @@ void convert_indices_from_csr_to_coo_cuda(const Tensor& indices, const Tensor& c } auto crow_indices_ = crow_indices.expect_contiguous(); - const input_t* crow_indices_data_in = crow_indices_->data_ptr(); + const input_t* crow_indices_data_in = crow_indices_->const_data_ptr(); TORCH_INTERNAL_ASSERT(indices.is_contiguous()); auto row0 = indices.select(0, transpose?batch_ndim + 1:batch_ndim + 0); auto row1 = indices.select(0, transpose?batch_ndim + 0:batch_ndim + 1); diff --git a/aten/src/ATen/native/vulkan/ops/Mm.cpp b/aten/src/ATen/native/vulkan/ops/Mm.cpp index 33181aef2ff31..e5893e8172875 100644 --- a/aten/src/ATen/native/vulkan/ops/Mm.cpp +++ b/aten/src/ATen/native/vulkan/ops/Mm.cpp @@ -181,7 +181,7 @@ vTensor pack_biases_quantized_weights( if (bias_arg) { const Tensor bias = bias_arg->contiguous(); const IntArrayRef b_sizes = bias.sizes(); - const float* const src_bias_ptr = bias.data_ptr(); + const float* const src_bias_ptr = bias.const_data_ptr(); /* Source */ int64_t src_kb_sz = 0; diff --git a/aten/src/ATen/native/vulkan/ops/Mm.h b/aten/src/ATen/native/vulkan/ops/Mm.h index f7ffd1a5fc7c6..b4fcb31bc315c 100644 --- a/aten/src/ATen/native/vulkan/ops/Mm.h +++ b/aten/src/ATen/native/vulkan/ops/Mm.h @@ -26,7 +26,7 @@ void stage_pack_weights( const int64_t src_matrix_sz = src_kw_sz * src_kh_sz; const int64_t dst_plane_sz = dst_kw_sz * dst_kh_sz; const int64_t dst_matrix_sz = dst_plane_sz * 4; - const T* const src_weight_ptr = weight.data_ptr(); + const T* const src_weight_ptr = weight.const_data_ptr(); api::StorageBuffer staging(context, api::kFloat, v_weight.gpu_numel()); { api::MemoryMap mapping(staging.buffer(), api::MemoryAccessType::WRITE); diff --git a/aten/src/ATen/test/quantized_test.cpp b/aten/src/ATen/test/quantized_test.cpp index 2363f8313702d..0262052d52efb 100644 --- a/aten/src/ATen/test/quantized_test.cpp +++ b/aten/src/ATen/test/quantized_test.cpp @@ -316,7 +316,7 @@ TEST(TestQTensor, TestArmVectorizedQuantizeDequantize) { quantize_val_with_datatype(scale, zero_point, x_values[i]).val_); } const Tensor r = q.dequantize(); - const float* r_data = r.data_ptr(); + const float* r_data = r.const_data_ptr(); for (const auto i : c10::irange(numel)) { ASSERT_FLOAT_EQ( r_data[i], diff --git a/test/cpp/c10d/ProcessGroupGlooAsyncTest.cpp b/test/cpp/c10d/ProcessGroupGlooAsyncTest.cpp index 0815de7e6b648..0059560a602ab 100644 --- a/test/cpp/c10d/ProcessGroupGlooAsyncTest.cpp +++ b/test/cpp/c10d/ProcessGroupGlooAsyncTest.cpp @@ -243,7 +243,7 @@ void runAsyncBroadcastTest( for (const auto i : c10::irange(numProcesses)) { auto tensors = tests[i].getTensors(); for (const auto& tensor : tensors) { - const auto* const data = tensor.data_ptr(); + const auto* const data = tensor.const_data_ptr(); for (const auto k : c10::irange(tensor.numel())) { EXPECT_EQ(data[k], expected); } diff --git a/test/cpp/c10d/ProcessGroupNCCLTest.cpp b/test/cpp/c10d/ProcessGroupNCCLTest.cpp index 305a774aaef13..d2dc02d323869 100644 --- a/test/cpp/c10d/ProcessGroupNCCLTest.cpp +++ b/test/cpp/c10d/ProcessGroupNCCLTest.cpp @@ -417,7 +417,7 @@ void testAllreduce(const std::string& path, int rank, int size) { const auto expected = (totalNumGPUs * (totalNumGPUs - 1)) / 2; const auto tensors = test.getTensors(); for (const auto& tensor : tensors) { - const auto* const data = tensor.data_ptr(); + const auto* const data = tensor.const_data_ptr(); for (const auto k : c10::irange(tensor.numel())) { EXPECT_EQ(data[k], expected) << "Allreduce outputs do not match expected outputs"; @@ -463,7 +463,7 @@ void testSparseAllreduce(const std::string& path, int rank, int size) { } // validate all tensor values are expected value - const auto* const data = values.data_ptr(); + const auto* const data = values.const_data_ptr(); for (const auto k : c10::irange(values.numel())) { EXPECT_EQ(data[k], expected) << "Allreduce outputs do not match expected outputs"; @@ -514,7 +514,7 @@ void testSparseAllreduceLarge(const std::string& path, int rank, int size) { } // validate all tensor values are expected value - const auto* const data = values.data_ptr(); + const auto* const data = values.const_data_ptr(); for (const auto k : c10::irange(values.numel())) { EXPECT_EQ(data[k], expected) << "Allreduce outputs do not match expected outputs"; @@ -544,7 +544,7 @@ void testBroadcast(const std::string& path, int rank, int size) { const auto expected = (rootRank * numDevices + rootTensor); const auto tensors = test.getTensors(); for (const auto& tensor : tensors) { - const auto* const data = tensor.data_ptr(); + const auto* const data = tensor.const_data_ptr(); for (const auto k : c10::irange(tensor.numel())) { EXPECT_EQ(data[k], expected) << "Broadcast outputs do not match expected outputs"; @@ -703,7 +703,7 @@ void testSplittingCommunicator(const std::string& path, int rank, int size) { const auto expected = (rootRank * numDevices + rootTensor); const auto tensors = test->getTensors(); for (const auto& tensor : tensors) { - const auto* const data = tensor.data_ptr(); + const auto* const data = tensor.const_data_ptr(); for (const auto k : c10::irange(tensor.numel())) { EXPECT_EQ(data[k], expected) << "Broadcast outputs do not match expected outputs"; diff --git a/test/cpp/jit/test_custom_class_registrations.cpp b/test/cpp/jit/test_custom_class_registrations.cpp index e92c397a03466..8b83b7f0a84c1 100644 --- a/test/cpp/jit/test_custom_class_registrations.cpp +++ b/test/cpp/jit/test_custom_class_registrations.cpp @@ -131,7 +131,7 @@ struct TensorQueue : torch::CustomClassHolder { const std::string key = "queue"; at::Tensor size_tensor; size_tensor = dict.at(std::string(key + "/size")).cpu(); - const auto* size_tensor_acc = size_tensor.data_ptr(); + const auto* size_tensor_acc = size_tensor.const_data_ptr(); int64_t queue_size = size_tensor_acc[0]; for (const auto index : c10::irange(queue_size)) { diff --git a/torch/csrc/cuda/nccl.cpp b/torch/csrc/cuda/nccl.cpp index f47f9502a5b6c..f9b29c38dce5a 100644 --- a/torch/csrc/cuda/nccl.cpp +++ b/torch/csrc/cuda/nccl.cpp @@ -818,7 +818,7 @@ void all2all_single_equal_split( auto type = to_nccl_data_type(input); size_t count = input.numel() / size; size_t rankdiff = input.nbytes() / size; - const auto* sendbuff = reinterpret_cast(input.data_ptr()); + const auto* sendbuff = reinterpret_cast(input.const_data_ptr()); auto* recvbuff = reinterpret_cast(output.data_ptr()); auto comm = to_nccl_comm(_comm); #if defined(USE_ROCM) && ROCM_VERSION >= 50000 @@ -1040,7 +1040,7 @@ void gather( size_t count = inputs.numel(); auto type = to_nccl_data_type(inputs); - const auto* sendbuff = reinterpret_cast(inputs.data_ptr()); + const auto* sendbuff = reinterpret_cast(inputs.const_data_ptr()); NCCL_CHECK(ncclGroupStart()); @@ -1097,7 +1097,8 @@ void scatter( if (r != root) { size_t send_count = inputs[r].numel(); auto send_type = to_nccl_data_type(inputs[r]); - const auto* sendbuff = reinterpret_cast(inputs[r].data_ptr()); + const auto* sendbuff = + reinterpret_cast(inputs[r].const_data_ptr()); NCCL_CHECK(ncclSend(sendbuff, send_count, send_type, r, comm, stream)); } else { // on its own rank, simply copy it to the output