From 4f2e92061c3110116cc981e5fe1f411f87ba1a09 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 7 Dec 2024 17:06:29 -0500 Subject: [PATCH 01/26] First version of code to combine TBs from 8 -> 2 --- TestBenches/Macros.h | 18 ++++--- TestBenches/TrackBuilder_test.cpp | 39 +++----------- TrackletAlgorithm/Constants.h | 2 +- TrackletAlgorithm/TrackBuilder.h | 85 +++++++++++++++++++++++++++--- TrackletAlgorithm/TrackFitMemory.h | 4 +- emData/download.sh | 6 +-- emData/generate_MP.py | 14 ++++- emData/generate_TB.py | 6 +-- project/script_TB.tcl | 12 ++--- 9 files changed, 118 insertions(+), 68 deletions(-) diff --git a/TestBenches/Macros.h b/TestBenches/Macros.h index afa101da975..34846729f60 100644 --- a/TestBenches/Macros.h +++ b/TestBenches/Macros.h @@ -35,14 +35,16 @@ X(PC_D3D4ABCD_, "PC_D3D4ABCD") \ X(PC_L1D1ABCD_, "PC_L1D1ABCD") \ X(PC_L1D1EFGH_, "PC_L1D1EFGH") \ X(PC_L2D1ABCD_, "PC_L2D1ABCD") \ -X(FT_D1D2_, "FT_D1D2") \ -X(FT_D3D4_, "FT_D3D4") \ -X(FT_L1D1_, "FT_L1D1") \ -X(FT_L1L2_, "FT_L1L2") \ -X(FT_L2D1_, "FT_L2D1") \ -X(FT_L2L3_, "FT_L2L3") \ -X(FT_L3L4_, "FT_L3L4") \ -X(FT_L5L6_, "FT_L5L6") \ +X(TB_D1D2_, "TB_D1D2") \ +X(TB_D3D4_, "TB_D3D4") \ +X(TB_L1D1_, "TB_L1D1") \ +X(TB_L1L2_, "TB_L1L2") \ +X(TB_L2D1_, "TB_L2D1") \ +X(TB_L2L3_, "TB_L2L3") \ +X(TB_L3L4_, "TB_L3L4") \ +X(TB_L5L6_, "TB_L5L6") \ +X(TB_AAAA_, "TB_AAAA") \ +X(TB_BBBB_, "TB_BBBB") \ X(IR_2S_1_A_, "IR_2S_1_A") \ X(IR_2S_1_B_, "IR_2S_1_B") \ X(IR_2S_2_A_, "IR_2S_2_A") \ diff --git a/TestBenches/TrackBuilder_test.cpp b/TestBenches/TrackBuilder_test.cpp index 846e4b24247..b0557bc704b 100644 --- a/TestBenches/TrackBuilder_test.cpp +++ b/TestBenches/TrackBuilder_test.cpp @@ -4,49 +4,24 @@ #include "Macros.h" #include "FileReadUtility.h" -const int nevents = 100; //number of events to run +const int nevents = 5; //number of events to run using namespace std; // No macros can be defined from the command line in the case of C/RTL // cosimulation, so we define defaults here. #if !defined SEED_ - #define SEED_ L1L2_ + #define SEED_ AAAA_ #endif #if !defined MODULE_ - #define MODULE_ FT_L1L2_ + #define MODULE_ TB_AAAA_ #endif #if !defined TOP_FUNC_ - #define TOP_FUNC_ TrackBuilder_L1L2 + #define TOP_FUNC_ TrackBuilder_AAAA #endif -#if SEED_ == L1L2_ - constexpr int kNBarrelStubs = 4; - constexpr int kNDiskStubs = 4; -#elif SEED_ == L2L3_ - constexpr int kNBarrelStubs = 3; - constexpr int kNDiskStubs = 4; -#elif SEED_ == L3L4_ - constexpr int kNBarrelStubs = 4; - constexpr int kNDiskStubs = 2; -#elif SEED_ == L5L6_ - constexpr int kNBarrelStubs = 4; - constexpr int kNDiskStubs = 0; -#elif SEED_ == D1D2_ - constexpr int kNBarrelStubs = 2; - constexpr int kNDiskStubs = 3; -#elif SEED_ == D3D4_ - constexpr int kNBarrelStubs = 1; - constexpr int kNDiskStubs = 3; -#elif SEED_ == L1D1_ - constexpr int kNBarrelStubs = 0; - constexpr int kNDiskStubs = 4; -#elif SEED_ == L2D1_ - constexpr int kNBarrelStubs = 1; - constexpr int kNDiskStubs = 3; -#else -# error "Undefined seed" -#endif + constexpr int kNBarrelStubs = 6; + constexpr int kNDiskStubs = 5; typedef TrackFit TrackFit_t; typedef TrackFitMemory TrackFitMemory_t; @@ -94,7 +69,7 @@ void compareStubsWithFile<0>(int &err, ifstream &fout, const int pos, const Trac int main() { - TBHelper tb(string("FT/") + module_name[MODULE_]); + TBHelper tb(string("TB/") + module_name[MODULE_]); // error counts int err = 0; diff --git a/TrackletAlgorithm/Constants.h b/TrackletAlgorithm/Constants.h index 6e2661af384..bb1abc376b8 100644 --- a/TrackletAlgorithm/Constants.h +++ b/TrackletAlgorithm/Constants.h @@ -286,7 +286,7 @@ enum regionType {BARRELPS, BARREL2S, BARRELOL, BARREL, DISKPS, DISK2S, DISK, BAR namespace TF { // List of seeds - enum seed {UNDEF_SEED, L1L2 = 0, L2L3 = 1, L3L4 = 2, L5L6 = 3, D1D2 = 4, D3D4 = 5, L1D1 = 6, L2D1 = 7}; + enum seed {UNDEF_SEED, L1L2 = 0, L2L3 = 1, L3L4 = 2, L5L6 = 3, D1D2 = 4, D3D4 = 5, L1D1 = 6, L2D1 = 7, AAAA = 8, BBBB = 9}; // List of layers and disks enum layerDisk {L1 = 0, L2 = 1, L3 = 2, L4 = 3, L5 = 4, L6 = 5, D1 = 6, D2 = 7, D3 = 8, D4 = 9, D5 = 10}; diff --git a/TrackletAlgorithm/TrackBuilder.h b/TrackletAlgorithm/TrackBuilder.h index 7af4c27d237..d26947f1e2c 100644 --- a/TrackletAlgorithm/TrackBuilder.h +++ b/TrackletAlgorithm/TrackBuilder.h @@ -234,13 +234,73 @@ void TrackBuilder( // with the minimum tracklet ID. const TCIDType &TCID = (min_id != kInvalidTrackletID) ? (min_id >> kNBits_MemAddr) : TrackletIDType(0); const ITCType &iTC = TCID.range(kNBitsITC - 1, 0); - const auto mparNPages = getMPARNPages(iTC); - const auto mparMem = getMPARMem(iTC); - const auto mparPage = getMPARPage(iTC); + typename TrackFit::TFSEEDTYPE iseed = TCID >> kNBitsITC; //TCID.range(3+kNBitsITC-1,kNBitsITC); + auto mparNPages = getMPARNPages(iTC); + auto mparMem = getMPARMem(iTC); + auto mparPage = getMPARPage(iTC); + //This block is for AAAA + if (iseed==0) { + if (iTC==0) {mparNPages=3; mparMem=0; mparPage=0;} + if (iTC==1) {mparNPages=3; mparMem=0; mparPage=1;} + if (iTC==2) {mparNPages=3; mparMem=0; mparPage=2;} + if (iTC==3) {mparNPages=2; mparMem=0; mparPage=0;} + if (iTC==4) {mparNPages=2; mparMem=0; mparPage=1;} + if (iTC==5) {mparNPages=1; mparMem=0; mparPage=0;} + if (iTC==6) {mparNPages=1; mparMem=1; mparPage=0;} + if (iTC==7) {mparNPages=2; mparMem=1; mparPage=0;} + if (iTC==8) {mparNPages=2; mparMem=1; mparPage=1;} + if (iTC==9) {mparNPages=3; mparMem=1; mparPage=0;} + if (iTC==10) {mparNPages=3; mparMem=1; mparPage=1;} + if (iTC==11) {mparNPages=3; mparMem=1; mparPage=2;} + } + if (iseed==1) { + if (iTC==0) {mparNPages=4; mparMem=0; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=0; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=0; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=0; mparPage=3;} + } + if (iseed==3) { + if (iTC==0) {mparNPages=4; mparMem=1; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=1; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=1; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=1; mparPage=3;} + } + if (iseed==7) { + if (iTC==0) {mparNPages=4; mparMem=2; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=2; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=2; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=2; mparPage=3;} + } + //This block is for BBBB + if (iseed==2) { + if (iTC==0) {mparNPages=2; mparMem=0; mparPage=0;} + if (iTC==1) {mparNPages=2; mparMem=0; mparPage=1;} + if (iTC==2) {mparNPages=2; mparMem=1; mparPage=0;} + if (iTC==3) {mparNPages=2; mparMem=1; mparPage=1;} + } + if (iseed==4) { + if (iTC==0) {mparNPages=4; mparMem=0; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=0; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=0; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=0; mparPage=3;} + } + if (iseed==5) { + if (iTC==0) {mparNPages=4; mparMem=1; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=1; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=1; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=1; mparPage=3;} + } + if (iseed==6) { + if (iTC==0) {mparNPages=4; mparMem=2; mparPage=0;} + if (iTC==1) {mparNPages=4; mparMem=2; mparPage=1;} + if (iTC==2) {mparNPages=4; mparMem=2; mparPage=2;} + if (iTC==3) {mparNPages=4; mparMem=2; mparPage=3;} + } + const IndexType &trackletIndex = (min_id != kInvalidTrackletID) ? (min_id & TrackletIDType(0x7F)) : TrackletIDType(0); - const typename TrackFit::TFPHIREGION phiRegionOuter = iTC / (Seed == TF::L1L2 ? 3 : (Seed == TF::L1D1 ? 2 : 1)); - - TrackFit track(typename TrackFit::TFSEEDTYPE(TCID >> kNBitsITC)); + const typename TrackFit::TFPHIREGION phiRegionOuter = iTC / (iseed == TF::L1L2 ? 3 : (iseed == TF::L1D1 ? 2 : 1)); + + TrackFit track(iseed); track.setPhiRegionOuter(phiRegionOuter); if ((TPARMask & 0x1) && mparNPages == 1) { const auto &tpar = trackletParameters1[mparMem].read_mem(bx, trackletIndex); @@ -267,7 +327,7 @@ void TrackBuilder( //This is a hack to match the emulation where for D1D2 seeds //We don't use both L2 and D3 matches bool barrelD1D2Match1 = false; - + barrel_stub_association : for (short j = 0; j < NBarrelStubs; j++) { const auto &barrel_stub = merger_L_top[j].peek(); @@ -374,7 +434,7 @@ void TrackBuilder( // Only tracks with at least two matches are valid. track.setTrackValid(!done && (nMatches >= kMinNMatches)); - // Output the track word and eight stub words associated with the TrackFit + // Output the track word and eleven stub words associated with the TrackFit // object that was constructed. trackWord[nTracks] = track.getTrackWord(); barrel_stub_words: for (short j = 0 ; NBarrelStubs > 0 && j < NBarrelStubs; j++) { // Note: need to have NBarrelStubs > 0 to prevent compilation error due to -Werror=type-limits flag in CMSSW @@ -391,6 +451,12 @@ void TrackBuilder( case 3: barrelStubWords[j][nTracks] = track.template getBarrelStubWord<3>(); break; + case 4: + barrelStubWords[j][nTracks] = track.template getBarrelStubWord<4>(); + break; + case 5: + barrelStubWords[j][nTracks] = track.template getBarrelStubWord<5>(); + break; } } disk_stub_words: for (short j = 0 ; NDiskStubs > 0 && j < NDiskStubs; j++) { // Note: need to have NDiskStubs > 0 to prevent compilation error due to -Werror=type-limits flag in CMSSW @@ -407,6 +473,9 @@ void TrackBuilder( case 3: diskStubWords[j][nTracks] = track.template getDiskStubWord(); break; + case 4: + diskStubWords[j][nTracks] = track.template getDiskStubWord(); + break; } } nTracks += (track.getTrackValid() ? 1 : 0); diff --git a/TrackletAlgorithm/TrackFitMemory.h b/TrackletAlgorithm/TrackFitMemory.h index 8468dbc7363..de137301a74 100644 --- a/TrackletAlgorithm/TrackFitMemory.h +++ b/TrackletAlgorithm/TrackFitMemory.h @@ -25,7 +25,7 @@ class TrackFitBase kTFZ0Size = 10, kTFTSize = 14, kTFHitCountSize = 3, - kTFHitMapSize = kTFHitCountSize * 8, + kTFHitMapSize = kTFHitCountSize * kNStubs, // Bit size for stub word fields kTFTrackIndexSize = 7, kTFStubIndexSize = 10, @@ -89,7 +89,7 @@ class TrackFitBits : public TrackFitBase return (kTFStubValidLSB(i) + TrackFitBase::kTFValidSize - 1); } static constexpr unsigned kTFHitCountSizeLSB(const int i) { - return (kTFStubValidMSB(0) + (7 - i) * TrackFitBase::kTFHitCountSize + 1); + return (kTFStubValidMSB(0) + (kNStubs -1 - i) * TrackFitBase::kTFHitCountSize + 1); } static constexpr unsigned kTFHitCountSizeMSB(const int i) { return (kTFHitCountSizeLSB(i) + TrackFitBase::kTFHitCountSize - 1); diff --git a/emData/download.sh b/emData/download.sh index fa91268ddd4..089ff7f7a6d 100755 --- a/emData/download.sh +++ b/emData/download.sh @@ -6,8 +6,8 @@ set -e memprints_url_cm="https://cernbox.cern.ch/remote.php/dav/public-files/P2URd03nlGDfpDt/MemPrints.tar.gz" luts_url_cm="https://ahart.web.cern.ch/ahart/tf/test_vectors/LUTs_Combined_231208.tgz" # Split modules - i.e. with PC and VMSMER -memprints_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/MUMRM6yWEBSDWiQ/MemPrints_Split_241116.tgz" -luts_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/lKAs7GNBTXKfR9d/LUTs_Split_241116.tgz" +memprints_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/l6gnLJvrUqy2PFB/MemPrints_Split_241207.tgz" +luts_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/k8e3BOB6RPwN4Ym/LUTs_Split_241207.tgz" # Reduced Combined modules memprints_url_reducedcm="https://cernbox.cern.ch/remote.php/dav/public-files/kv2U49bw93chvZG/MemPrints_CMReduced_040424.tar.gz" luts_url_reducedcm="https://ahart.web.cern.ch/ahart/tf/test_vectors/LUTs_CMReduced_240121.tgz" @@ -286,7 +286,7 @@ fi # https://forums.xilinx.com/t5/Installation-and-Licensing/Vivado-2016-4-on-Ubuntu-16-04-LTS-quot-awk-symbol-lookup-error/td-p/747165 unset LD_LIBRARY_PATH -mod_types=(IR FT PD VMRCM VMSMER TP MP PC) +mod_types=(IR TB PD VMRCM VMSMER TP MP PC) for module_type in ${mod_types[@]} do diff --git a/emData/generate_MP.py b/emData/generate_MP.py index 6f940f8ba4d..01ff79e01bb 100755 --- a/emData/generate_MP.py +++ b/emData/generate_MP.py @@ -11,8 +11,18 @@ import sys import argparse -TF_index = ['L1L2', 'L2L3', 'L3L4', 'L5L6', 'D1D2', 'D3D4', 'L1D1', 'L2D1'] -TF_index = {k:v for v,k in enumerate(TF_index)} +TF_index = {} +TF_index['L1L2'] = 0 +TF_index['L2L3'] = 0 +TF_index['L3L4'] = 1 +TF_index['L5L6'] = 0 +TF_index['D1D2'] = 1 +TF_index['D3D4'] = 1 +TF_index['L1D1'] = 1 +TF_index['L2D1'] = 0 +TF_index['AAAA'] = 0 +TF_index['BBBB'] = 1 + maxTPMems = "constexpr int maxTPMemories[" maxFMMems = "constexpr int maxFMMemories[" diff --git a/emData/generate_TB.py b/emData/generate_TB.py index b6c68bbbf9d..7f01ff04652 100755 --- a/emData/generate_TB.py +++ b/emData/generate_TB.py @@ -64,10 +64,10 @@ class ITC(Enum): barrelFMMems = {} diskFMMems = {} for line in wiresFile: - if " FT_" not in line: + if " TB_" not in line: continue line = line.rstrip() - tbName = re.sub(r".*FT_(....).*", r"FT_\1", line) + tbName = re.sub(r".*TB_(....).*", r"TB_\1", line) seed = tbName.split("_")[1] memName = line.split()[0] partype = "TPAR" @@ -129,7 +129,7 @@ class ITC(Enum): # Calculate parameters and print out top function for each TB. for tbName in sorted(tparMems.keys()): - seed = re.sub(r"FT_(....)", r"\1", tbName) + seed = re.sub(r"TB_(....)", r"\1", tbName) seedNumber = None if seed == "L1L2": seedNumber = 0 diff --git a/project/script_TB.tcl b/project/script_TB.tcl index ff7064ea036..cbbe7fc36a4 100644 --- a/project/script_TB.tcl +++ b/project/script_TB.tcl @@ -9,14 +9,8 @@ source env_hls.tcl # FIXME: FT_D1D2 is excluded for now because it currently produces extra # entries compared to the emulation set modules_to_test { - {FT_L1L2} - {FT_L2L3} - {FT_L3L4} - {FT_L5L6} - {FT_D1D2} - {FT_D3D4} - {FT_L1D1} - {FT_L2D1} + {TB_AAAA} + {TB_BBBB} } # module_to_export must correspond to the default macros set at the top of the # test bench; otherwise, the C/RTL cosimulation will fail @@ -31,7 +25,7 @@ add_files ../TopFunctions/CombinedConfig_FPGA2/TrackBuilderTop.cc -cflags "$CFLA add_files -tb ../TestBenches/TrackBuilder_test.cpp -cflags "$CFLAGS" # data files -add_files -tb ../emData/FT/ +add_files -tb ../emData/TB/ foreach i $modules_to_test { puts [join [list "======== TESTING " $i " ========"] ""] From 2fb19d6f361d79dc717a64e95e35f7c8257c50ac Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 7 Dec 2024 17:10:31 -0500 Subject: [PATCH 02/26] Fix typo --- TrackletAlgorithm/TrackFitMemory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TrackletAlgorithm/TrackFitMemory.h b/TrackletAlgorithm/TrackFitMemory.h index de137301a74..641cbaa0ce8 100644 --- a/TrackletAlgorithm/TrackFitMemory.h +++ b/TrackletAlgorithm/TrackFitMemory.h @@ -89,7 +89,7 @@ class TrackFitBits : public TrackFitBase return (kTFStubValidLSB(i) + TrackFitBase::kTFValidSize - 1); } static constexpr unsigned kTFHitCountSizeLSB(const int i) { - return (kTFStubValidMSB(0) + (kNStubs -1 - i) * TrackFitBase::kTFHitCountSize + 1); + return (kTFStubValidMSB(0) + (NBarrelStubs + NDiskStubs -1 - i) * TrackFitBase::kTFHitCountSize + 1); } static constexpr unsigned kTFHitCountSizeMSB(const int i) { return (kTFHitCountSizeLSB(i) + TrackFitBase::kTFHitCountSize - 1); From 6788111e1816de489c5f9cd4b545ce8866766bc7 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 7 Dec 2024 17:27:47 -0500 Subject: [PATCH 03/26] Fixes to MP to produce new combined FM --- TestBenches/MatchProcessor_test.cpp | 2 +- TrackletAlgorithm/MatchProcessor.h | 46 ++++------------------------- 2 files changed, 6 insertions(+), 42 deletions(-) diff --git a/TestBenches/MatchProcessor_test.cpp b/TestBenches/MatchProcessor_test.cpp index 6bd1d246a86..7e7a8515c89 100644 --- a/TestBenches/MatchProcessor_test.cpp +++ b/TestBenches/MatchProcessor_test.cpp @@ -19,7 +19,7 @@ #define TOP_FUNC_ MatchProcessor_D1PHIC #endif -const int nevents = 100; //number of events to run +const int nevents = 5; //number of events to run using namespace std; diff --git a/TrackletAlgorithm/MatchProcessor.h b/TrackletAlgorithm/MatchProcessor.h index 4eefa42b5f1..d44af670563 100644 --- a/TrackletAlgorithm/MatchProcessor.h +++ b/TrackletAlgorithm/MatchProcessor.h @@ -1128,47 +1128,11 @@ void MatchCalculator(BXType bx, } if(goodmatch) { // Write out only the best match, based on the seeding - switch (proj_seed) { - case 0: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L1L2 seed - } - break; - case 1: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L2L3 seed - } - break; - case 2: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L3L4 seed - } - break; - case 3: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L5L6 seed - } - break; - case 4: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // D1D2 seed - } - break; - case 5: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // D3D4 seed - } - break; - case 6: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L1D1 seed - } - break; - case 7: - if(FMMask()) { - fullmatch[FMCount()].write_mem_new(bx,fm,savedMatch); // L2D1 seed - } - break; + + if (proj_seed == TF::L1L2 || proj_seed == TF::L2L3 || proj_seed == TF::L5L6 || proj_seed == TF::L2D1 ) { + fullmatch[0].write_mem_new(bx,fm,savedMatch); // AAAA FM + } else { + fullmatch[1].write_mem_new(bx,fm,savedMatch); // BBBB FM } savedMatch = 1; } From 1682b5c245297bf85bedbf7c403fb446bfc9382f Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 7 Dec 2024 17:38:22 -0500 Subject: [PATCH 04/26] Add new bodge files for the combined TBs --- emData/project_generation_scripts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/emData/project_generation_scripts b/emData/project_generation_scripts index 91256ad3c11..d360074c3ff 160000 --- a/emData/project_generation_scripts +++ b/emData/project_generation_scripts @@ -1 +1 @@ -Subproject commit 91256ad3c11e5322fa019a484a4f7781756db9fe +Subproject commit d360074c3ff74dbaf0df6fe3b05f03c4993b2b45 From 966432f90b07d69472b5904a179eda475f415f42 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 7 Dec 2024 17:42:44 -0500 Subject: [PATCH 05/26] Restore testing 100 events --- TestBenches/MatchProcessor_test.cpp | 2 +- TestBenches/TrackBuilder_test.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/TestBenches/MatchProcessor_test.cpp b/TestBenches/MatchProcessor_test.cpp index 7e7a8515c89..6bd1d246a86 100644 --- a/TestBenches/MatchProcessor_test.cpp +++ b/TestBenches/MatchProcessor_test.cpp @@ -19,7 +19,7 @@ #define TOP_FUNC_ MatchProcessor_D1PHIC #endif -const int nevents = 5; //number of events to run +const int nevents = 100; //number of events to run using namespace std; diff --git a/TestBenches/TrackBuilder_test.cpp b/TestBenches/TrackBuilder_test.cpp index b0557bc704b..640438b0723 100644 --- a/TestBenches/TrackBuilder_test.cpp +++ b/TestBenches/TrackBuilder_test.cpp @@ -4,7 +4,7 @@ #include "Macros.h" #include "FileReadUtility.h" -const int nevents = 5; //number of events to run +const int nevents = 100; //number of events to run using namespace std; From 29a0f6c165b31b1eebfdf09dd214e729ececa794 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 8 Dec 2024 05:27:50 -0500 Subject: [PATCH 06/26] Remove the 'bodge' files as no longer needed --- emData/project_generation_scripts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/emData/project_generation_scripts b/emData/project_generation_scripts index d360074c3ff..5a08387f246 160000 --- a/emData/project_generation_scripts +++ b/emData/project_generation_scripts @@ -1 +1 @@ -Subproject commit d360074c3ff74dbaf0df6fe3b05f03c4993b2b45 +Subproject commit 5a08387f246fb11ddbd7845d1601c2596411303b From 61e955e5768aeadc11296fd5e29a1d8f00e62ab6 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 8 Dec 2024 05:33:13 -0500 Subject: [PATCH 07/26] Changes for building project with new combined TB --- IntegrationTests/CombinedConfig_FPGA2/script/Makefile | 2 +- .../CombinedConfig_FPGA2/script/makeProject.tcl | 11 ++--------- IntegrationTests/common/hdl/FileWriterFIFO.vhd | 6 +++--- 3 files changed, 6 insertions(+), 13 deletions(-) diff --git a/IntegrationTests/CombinedConfig_FPGA2/script/Makefile b/IntegrationTests/CombinedConfig_FPGA2/script/Makefile index fa36d21923e..51a37e1e50d 100644 --- a/IntegrationTests/CombinedConfig_FPGA2/script/Makefile +++ b/IntegrationTests/CombinedConfig_FPGA2/script/Makefile @@ -3,7 +3,7 @@ FIRMWARE=$(shell git rev-parse --show-toplevel) # MODIFY THESE LINES WHEN COPYING AND PASTING THIS MAKEFILE TOP_FUNCS=$(FIRMWARE)/TopFunctions/CombinedConfig_FPGA2 -MODULES=ProjectionCalculator_L1L2ABC ProjectionCalculator_L1L2DE ProjectionCalculator_L1L2F ProjectionCalculator_L1L2G ProjectionCalculator_L1L2HI ProjectionCalculator_L1L2JKL ProjectionCalculator_L2L3ABCD ProjectionCalculator_L3L4AB ProjectionCalculator_L3L4CD ProjectionCalculator_L5L6ABCD ProjectionCalculator_D1D2ABCD ProjectionCalculator_D3D4ABCD ProjectionCalculator_L1D1ABCD ProjectionCalculator_L1D1EFGH ProjectionCalculator_L2D1ABCD MatchProcessor_L1PHIA MatchProcessor_L1PHIB MatchProcessor_L1PHIC MatchProcessor_L1PHID MatchProcessor_L1PHIE MatchProcessor_L1PHIF MatchProcessor_L1PHIG MatchProcessor_L1PHIH MatchProcessor_L2PHIA MatchProcessor_L2PHIB MatchProcessor_L2PHIC MatchProcessor_L2PHID MatchProcessor_L3PHIA MatchProcessor_L3PHIB MatchProcessor_L3PHIC MatchProcessor_L3PHID MatchProcessor_L4PHIA MatchProcessor_L4PHIB MatchProcessor_L4PHIC MatchProcessor_L4PHID MatchProcessor_L5PHIA MatchProcessor_L5PHIB MatchProcessor_L5PHIC MatchProcessor_L5PHID MatchProcessor_L6PHIA MatchProcessor_L6PHIB MatchProcessor_L6PHIC MatchProcessor_L6PHID MatchProcessor_D1PHIA MatchProcessor_D1PHIB MatchProcessor_D1PHIC MatchProcessor_D1PHID MatchProcessor_D2PHIA MatchProcessor_D2PHIB MatchProcessor_D2PHIC MatchProcessor_D2PHID MatchProcessor_D3PHIA MatchProcessor_D3PHIB MatchProcessor_D3PHIC MatchProcessor_D3PHID MatchProcessor_D4PHIA MatchProcessor_D4PHIB MatchProcessor_D4PHIC MatchProcessor_D4PHID MatchProcessor_D5PHIA MatchProcessor_D5PHIB MatchProcessor_D5PHIC MatchProcessor_D5PHID TrackBuilder_L1L2 TrackBuilder_L2L3 TrackBuilder_L3L4 TrackBuilder_L5L6 TrackBuilder_D1D2 TrackBuilder_D3D4 TrackBuilder_L1D1 TrackBuilder_L2D1 VMStubMERouterTop_L1PHIA VMStubMERouterTop_L1PHIB VMStubMERouterTop_L1PHIC VMStubMERouterTop_L1PHID VMStubMERouterTop_L1PHIE VMStubMERouterTop_L1PHIF VMStubMERouterTop_L1PHIG VMStubMERouterTop_L1PHIH VMStubMERouterTop_L2PHIA VMStubMERouterTop_L2PHIB VMStubMERouterTop_L2PHIC VMStubMERouterTop_L2PHID VMStubMERouterTop_L3PHIA VMStubMERouterTop_L3PHIB VMStubMERouterTop_L3PHIC VMStubMERouterTop_L3PHID VMStubMERouterTop_L4PHIA VMStubMERouterTop_L4PHIB VMStubMERouterTop_L4PHIC VMStubMERouterTop_L4PHID VMStubMERouterTop_L5PHIA VMStubMERouterTop_L5PHIB VMStubMERouterTop_L5PHIC VMStubMERouterTop_L5PHID VMStubMERouterTop_L6PHIA VMStubMERouterTop_L6PHIB VMStubMERouterTop_L6PHIC VMStubMERouterTop_L6PHID VMStubMERouterTop_D1PHIA VMStubMERouterTop_D1PHIB VMStubMERouterTop_D1PHIC VMStubMERouterTop_D1PHID VMStubMERouterTop_D2PHIA VMStubMERouterTop_D2PHIB VMStubMERouterTop_D2PHIC VMStubMERouterTop_D2PHID VMStubMERouterTop_D3PHIA VMStubMERouterTop_D3PHIB VMStubMERouterTop_D3PHIC VMStubMERouterTop_D3PHID VMStubMERouterTop_D4PHIA VMStubMERouterTop_D4PHIB VMStubMERouterTop_D4PHIC VMStubMERouterTop_D4PHID VMStubMERouterTop_D5PHIA VMStubMERouterTop_D5PHIB VMStubMERouterTop_D5PHIC VMStubMERouterTop_D5PHID +MODULES=ProjectionCalculator_L1L2ABC ProjectionCalculator_L1L2DE ProjectionCalculator_L1L2F ProjectionCalculator_L1L2G ProjectionCalculator_L1L2HI ProjectionCalculator_L1L2JKL ProjectionCalculator_L2L3ABCD ProjectionCalculator_L3L4AB ProjectionCalculator_L3L4CD ProjectionCalculator_L5L6ABCD ProjectionCalculator_D1D2ABCD ProjectionCalculator_D3D4ABCD ProjectionCalculator_L1D1ABCD ProjectionCalculator_L1D1EFGH ProjectionCalculator_L2D1ABCD MatchProcessor_L1PHIA MatchProcessor_L1PHIB MatchProcessor_L1PHIC MatchProcessor_L1PHID MatchProcessor_L1PHIE MatchProcessor_L1PHIF MatchProcessor_L1PHIG MatchProcessor_L1PHIH MatchProcessor_L2PHIA MatchProcessor_L2PHIB MatchProcessor_L2PHIC MatchProcessor_L2PHID MatchProcessor_L3PHIA MatchProcessor_L3PHIB MatchProcessor_L3PHIC MatchProcessor_L3PHID MatchProcessor_L4PHIA MatchProcessor_L4PHIB MatchProcessor_L4PHIC MatchProcessor_L4PHID MatchProcessor_L5PHIA MatchProcessor_L5PHIB MatchProcessor_L5PHIC MatchProcessor_L5PHID MatchProcessor_L6PHIA MatchProcessor_L6PHIB MatchProcessor_L6PHIC MatchProcessor_L6PHID MatchProcessor_D1PHIA MatchProcessor_D1PHIB MatchProcessor_D1PHIC MatchProcessor_D1PHID MatchProcessor_D2PHIA MatchProcessor_D2PHIB MatchProcessor_D2PHIC MatchProcessor_D2PHID MatchProcessor_D3PHIA MatchProcessor_D3PHIB MatchProcessor_D3PHIC MatchProcessor_D3PHID MatchProcessor_D4PHIA MatchProcessor_D4PHIB MatchProcessor_D4PHIC MatchProcessor_D4PHID MatchProcessor_D5PHIA MatchProcessor_D5PHIB MatchProcessor_D5PHIC MatchProcessor_D5PHID TrackBuilder_AAAA TrackBuilder_BBBB VMStubMERouterTop_L1PHIA VMStubMERouterTop_L1PHIB VMStubMERouterTop_L1PHIC VMStubMERouterTop_L1PHID VMStubMERouterTop_L1PHIE VMStubMERouterTop_L1PHIF VMStubMERouterTop_L1PHIG VMStubMERouterTop_L1PHIH VMStubMERouterTop_L2PHIA VMStubMERouterTop_L2PHIB VMStubMERouterTop_L2PHIC VMStubMERouterTop_L2PHID VMStubMERouterTop_L3PHIA VMStubMERouterTop_L3PHIB VMStubMERouterTop_L3PHIC VMStubMERouterTop_L3PHID VMStubMERouterTop_L4PHIA VMStubMERouterTop_L4PHIB VMStubMERouterTop_L4PHIC VMStubMERouterTop_L4PHID VMStubMERouterTop_L5PHIA VMStubMERouterTop_L5PHIB VMStubMERouterTop_L5PHIC VMStubMERouterTop_L5PHID VMStubMERouterTop_L6PHIA VMStubMERouterTop_L6PHIB VMStubMERouterTop_L6PHIC VMStubMERouterTop_L6PHID VMStubMERouterTop_D1PHIA VMStubMERouterTop_D1PHIB VMStubMERouterTop_D1PHIC VMStubMERouterTop_D1PHID VMStubMERouterTop_D2PHIA VMStubMERouterTop_D2PHIB VMStubMERouterTop_D2PHIC VMStubMERouterTop_D2PHID VMStubMERouterTop_D3PHIA VMStubMERouterTop_D3PHIB VMStubMERouterTop_D3PHIC VMStubMERouterTop_D3PHID VMStubMERouterTop_D4PHIA VMStubMERouterTop_D4PHIB VMStubMERouterTop_D4PHIC VMStubMERouterTop_D4PHID VMStubMERouterTop_D5PHIA VMStubMERouterTop_D5PHIB VMStubMERouterTop_D5PHIC VMStubMERouterTop_D5PHID # Include rules for making the project. diff --git a/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl b/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl index 43cbea626c7..0e7c217c1ac 100644 --- a/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl +++ b/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl @@ -124,15 +124,8 @@ create_ip -name MatchProcessor_D5PHIA -module_name MP_D5PHIA -vendor xilinx.com create_ip -name MatchProcessor_D5PHIB -module_name MP_D5PHIB -vendor xilinx.com -library hls -version 1.0 create_ip -name MatchProcessor_D5PHIC -module_name MP_D5PHIC -vendor xilinx.com -library hls -version 1.0 create_ip -name MatchProcessor_D5PHID -module_name MP_D5PHID -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L1L2 -module_name FT_L1L2 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L2L3 -module_name FT_L2L3 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L3L4 -module_name FT_L3L4 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L5L6 -module_name FT_L5L6 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_D1D2 -module_name FT_D1D2 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_D3D4 -module_name FT_D3D4 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L1D1 -module_name FT_L1D1 -vendor xilinx.com -library hls -version 1.0 -create_ip -name TrackBuilder_L2D1 -module_name FT_L2D1 -vendor xilinx.com -library hls -version 1.0 - +create_ip -name TrackBuilder_AAAA -module_name TB_AAAA -vendor xilinx.com -library hls -version 1.0 +create_ip -name TrackBuilder_BBBB -module_name TB_BBBB -vendor xilinx.com -library hls -version 1.0 # Provide name of top-level HDL (without .vhd extension). #set topLevelHDL "SectorProcessor" diff --git a/IntegrationTests/common/hdl/FileWriterFIFO.vhd b/IntegrationTests/common/hdl/FileWriterFIFO.vhd index 9c9ba87a2c5..ee71df3de90 100644 --- a/IntegrationTests/common/hdl/FileWriterFIFO.vhd +++ b/IntegrationTests/common/hdl/FileWriterFIFO.vhd @@ -65,7 +65,7 @@ begin write(LINE_OUT, string'("TIME (ns)"), right, TXT_WIDTH); write(LINE_OUT, string'("BX") , right, TXT_WIDTH); write(LINE_OUT, string'("ADDR") , right, TXT_WIDTH); - write(LINE_OUT, string'("DATA") , right, 11*TXT_WIDTH); + write(LINE_OUT, string'("DATA") , right, TXT_WIDTH); writeline(FILE_OUT, LINE_OUT); end if; @@ -75,8 +75,8 @@ begin -- Valid data, so write it to file. write(LINE_OUT, NOW , right, TXT_WIDTH); write(LINE_OUT, BX_CNT, right, TXT_WIDTH); - write(LINE_OUT, to_hexstring(ADDR), right, TXT_WIDTH); - write(LINE_OUT, to_hexstring(DATA), right, 11*TXT_WIDTH); + write(LINE_OUT, to_hexstring(ADDR)&" ", right, TXT_WIDTH); + write(LINE_OUT, to_hexstring(DATA), right, 1+to_hexstring(DATA)'length); writeline(FILE_OUT, LINE_OUT); ADDR := std_logic_vector(unsigned(ADDR) + "1"); end if; From b9db7ce113a654e3d9f577aab505ddbb0a17cb83 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 8 Dec 2024 12:08:29 -0500 Subject: [PATCH 08/26] Updated floorplan for new TrackBuilders --- .../CombinedConfig_FPGA2/script/floorplan.xdc | 647 ++++++------------ 1 file changed, 210 insertions(+), 437 deletions(-) diff --git a/IntegrationTests/CombinedConfig_FPGA2/script/floorplan.xdc b/IntegrationTests/CombinedConfig_FPGA2/script/floorplan.xdc index 41d96c73171..f87c34267f7 100644 --- a/IntegrationTests/CombinedConfig_FPGA2/script/floorplan.xdc +++ b/IntegrationTests/CombinedConfig_FPGA2/script/floorplan.xdc @@ -1173,73 +1173,105 @@ resize_pblock [get_pblocks pblock_MPD5B] -add {CLOCKREGION_X2Y4:CLOCKREGION_X6Y7 resize_pblock [get_pblocks pblock_MPD5C] -add {CLOCKREGION_X2Y4:CLOCKREGION_X6Y7} resize_pblock [get_pblocks pblock_MPD5D] -add {CLOCKREGION_X2Y4:CLOCKREGION_X6Y7} -create_pblock pblock_FTL1L2 -add_cells_to_pblock [get_pblocks pblock_FTL1L2] [get_cells -quiet [list \ - FT_L1L2 \ - FM_L1L2_L3PHIA_DELAY \ - FM_L1L2_L3PHIA \ - FM_L1L2_L3PHIB_DELAY \ - FM_L1L2_L3PHIB \ - FM_L1L2_L3PHIC_DELAY \ - FM_L1L2_L3PHIC \ - FM_L1L2_L3PHID_DELAY \ - FM_L1L2_L3PHID \ - FM_L1L2_L4PHIA_DELAY \ - FM_L1L2_L4PHIA \ - FM_L1L2_L4PHIB_DELAY \ - FM_L1L2_L4PHIB \ - FM_L1L2_L4PHIC_DELAY \ - FM_L1L2_L4PHIC \ - FM_L1L2_L4PHID_DELAY \ - FM_L1L2_L4PHID \ - FM_L1L2_L5PHIA_DELAY \ - FM_L1L2_L5PHIA \ - FM_L1L2_L5PHIB_DELAY \ - FM_L1L2_L5PHIB \ - FM_L1L2_L5PHIC_DELAY \ - FM_L1L2_L5PHIC \ - FM_L1L2_L5PHID_DELAY \ - FM_L1L2_L5PHID \ - FM_L1L2_L6PHIA_DELAY \ - FM_L1L2_L6PHIA \ - FM_L1L2_L6PHIB_DELAY \ - FM_L1L2_L6PHIB \ - FM_L1L2_L6PHIC_DELAY \ - FM_L1L2_L6PHIC \ - FM_L1L2_L6PHID_DELAY \ - FM_L1L2_L6PHID \ - FM_L1L2_D1PHIA_DELAY \ - FM_L1L2_D1PHIA \ - FM_L1L2_D1PHIB_DELAY \ - FM_L1L2_D1PHIB \ - FM_L1L2_D1PHIC_DELAY \ - FM_L1L2_D1PHIC \ - FM_L1L2_D1PHID_DELAY \ - FM_L1L2_D1PHID \ - FM_L1L2_D2PHIA_DELAY \ - FM_L1L2_D2PHIA \ - FM_L1L2_D2PHIB_DELAY \ - FM_L1L2_D2PHIB \ - FM_L1L2_D2PHIC_DELAY \ - FM_L1L2_D2PHIC \ - FM_L1L2_D2PHID_DELAY \ - FM_L1L2_D2PHID \ - FM_L1L2_D3PHIA_DELAY \ - FM_L1L2_D3PHIA \ - FM_L1L2_D3PHIB_DELAY \ - FM_L1L2_D3PHIB \ - FM_L1L2_D3PHIC_DELAY \ - FM_L1L2_D3PHIC \ - FM_L1L2_D3PHID_DELAY \ - FM_L1L2_D3PHID \ - FM_L1L2_D4PHIA_DELAY \ - FM_L1L2_D4PHIA \ - FM_L1L2_D4PHIB_DELAY \ - FM_L1L2_D4PHIB \ - FM_L1L2_D4PHIC_DELAY \ - FM_L1L2_D4PHIC \ - FM_L1L2_D4PHID_DELAY \ - FM_L1L2_D4PHID \ +create_pblock pblock_TBAAAA +add_cells_to_pblock [get_pblocks pblock_TBAAAA] [get_cells -quiet [list \ + TB_AAAA \ + FM_AAAA_L1PHIA_DELAY \ + FM_AAAA_L1PHIA \ + FM_AAAA_L1PHIB_DELAY \ + FM_AAAA_L1PHIB \ + FM_AAAA_L1PHIC_DELAY \ + FM_AAAA_L1PHIC \ + FM_AAAA_L1PHID_DELAY \ + FM_AAAA_L1PHID \ + FM_AAAA_L1PHIE_DELAY \ + FM_AAAA_L1PHIE \ + FM_AAAA_L1PHIF_DELAY \ + FM_AAAA_L1PHIF \ + FM_AAAA_L1PHIG_DELAY \ + FM_AAAA_L1PHIG \ + FM_AAAA_L1PHIH_DELAY \ + FM_AAAA_L1PHIH \ + FM_AAAA_L2PHIA_DELAY \ + FM_AAAA_L2PHIA \ + FM_AAAA_L2PHIB_DELAY \ + FM_AAAA_L2PHIB \ + FM_AAAA_L2PHIC_DELAY \ + FM_AAAA_L2PHIC \ + FM_AAAA_L2PHID_DELAY \ + FM_AAAA_L2PHID \ + FM_AAAA_L3PHIA_DELAY \ + FM_AAAA_L3PHIA \ + FM_AAAA_L3PHIB_DELAY \ + FM_AAAA_L3PHIB \ + FM_AAAA_L3PHIC_DELAY \ + FM_AAAA_L3PHIC \ + FM_AAAA_L3PHID_DELAY \ + FM_AAAA_L3PHID \ + FM_AAAA_L4PHIA_DELAY \ + FM_AAAA_L4PHIA \ + FM_AAAA_L4PHIB_DELAY \ + FM_AAAA_L4PHIB \ + FM_AAAA_L4PHIC_DELAY \ + FM_AAAA_L4PHIC \ + FM_AAAA_L4PHID_DELAY \ + FM_AAAA_L4PHID \ + FM_AAAA_L5PHIA_DELAY \ + FM_AAAA_L5PHIA \ + FM_AAAA_L5PHIB_DELAY \ + FM_AAAA_L5PHIB \ + FM_AAAA_L5PHIC_DELAY \ + FM_AAAA_L5PHIC \ + FM_AAAA_L5PHID_DELAY \ + FM_AAAA_L5PHID \ + FM_AAAA_L6PHIA_DELAY \ + FM_AAAA_L6PHIA \ + FM_AAAA_L6PHIB_DELAY \ + FM_AAAA_L6PHIB \ + FM_AAAA_L6PHIC_DELAY \ + FM_AAAA_L6PHIC \ + FM_AAAA_L6PHID_DELAY \ + FM_AAAA_L6PHID \ + FM_AAAA_D1PHIA_DELAY \ + FM_AAAA_D1PHIA \ + FM_AAAA_D1PHIB_DELAY \ + FM_AAAA_D1PHIB \ + FM_AAAA_D1PHIC_DELAY \ + FM_AAAA_D1PHIC \ + FM_AAAA_D1PHID_DELAY \ + FM_AAAA_D1PHID \ + FM_AAAA_D2PHIA_DELAY \ + FM_AAAA_D2PHIA \ + FM_AAAA_D2PHIB_DELAY \ + FM_AAAA_D2PHIB \ + FM_AAAA_D2PHIC_DELAY \ + FM_AAAA_D2PHIC \ + FM_AAAA_D2PHID_DELAY \ + FM_AAAA_D2PHID \ + FM_AAAA_D3PHIA_DELAY \ + FM_AAAA_D3PHIA \ + FM_AAAA_D3PHIB_DELAY \ + FM_AAAA_D3PHIB \ + FM_AAAA_D3PHIC_DELAY \ + FM_AAAA_D3PHIC \ + FM_AAAA_D3PHID_DELAY \ + FM_AAAA_D3PHID \ + FM_AAAA_D4PHIA_DELAY \ + FM_AAAA_D4PHIA \ + FM_AAAA_D4PHIB_DELAY \ + FM_AAAA_D4PHIB \ + FM_AAAA_D4PHIC_DELAY \ + FM_AAAA_D4PHIC \ + FM_AAAA_D4PHID_DELAY \ + FM_AAAA_D4PHID \ + FM_AAAA_D5PHIA_DELAY \ + FM_AAAA_D5PHIA \ + FM_AAAA_D5PHIB_DELAY \ + FM_AAAA_D5PHIB \ + FM_AAAA_D5PHIC_DELAY \ + FM_AAAA_D5PHIC \ + FM_AAAA_D5PHID_DELAY \ + FM_AAAA_D5PHID \ MPAR_L1L2ABC_DELAY \ MPAR_L1L2ABC \ MPAR_L1L2DE_DELAY \ @@ -1252,389 +1284,130 @@ add_cells_to_pblock [get_pblocks pblock_FTL1L2] [get_cells -quiet [list \ MPAR_L1L2HI \ MPAR_L1L2JKL_DELAY \ MPAR_L1L2JKL \ - ]] - -create_pblock pblock_FTL2L3 -add_cells_to_pblock [get_pblocks pblock_FTL2L3] [get_cells -quiet [list \ - FT_L2L3 \ - FM_L2L3_L1PHIA_DELAY \ - FM_L2L3_L1PHIA \ - FM_L2L3_L1PHIB_DELAY \ - FM_L2L3_L1PHIB \ - FM_L2L3_L1PHIC_DELAY \ - FM_L2L3_L1PHIC \ - FM_L2L3_L1PHID_DELAY \ - FM_L2L3_L1PHID \ - FM_L2L3_L1PHIE_DELAY \ - FM_L2L3_L1PHIE \ - FM_L2L3_L1PHIF_DELAY \ - FM_L2L3_L1PHIF \ - FM_L2L3_L1PHIG_DELAY \ - FM_L2L3_L1PHIG \ - FM_L2L3_L1PHIH_DELAY \ - FM_L2L3_L1PHIH \ - FM_L2L3_L4PHIA_DELAY \ - FM_L2L3_L4PHIA \ - FM_L2L3_L4PHIB_DELAY \ - FM_L2L3_L4PHIB \ - FM_L2L3_L4PHIC_DELAY \ - FM_L2L3_L4PHIC \ - FM_L2L3_L4PHID_DELAY \ - FM_L2L3_L4PHID \ - FM_L2L3_L5PHIA_DELAY \ - FM_L2L3_L5PHIA \ - FM_L2L3_L5PHIB_DELAY \ - FM_L2L3_L5PHIB \ - FM_L2L3_L5PHIC_DELAY \ - FM_L2L3_L5PHIC \ - FM_L2L3_L5PHID_DELAY \ - FM_L2L3_L5PHID \ - FM_L2L3_D1PHIA_DELAY \ - FM_L2L3_D1PHIA \ - FM_L2L3_D1PHIB_DELAY \ - FM_L2L3_D1PHIB \ - FM_L2L3_D1PHIC_DELAY \ - FM_L2L3_D1PHIC \ - FM_L2L3_D1PHID_DELAY \ - FM_L2L3_D1PHID \ - FM_L2L3_D2PHIA_DELAY \ - FM_L2L3_D2PHIA \ - FM_L2L3_D2PHIB_DELAY \ - FM_L2L3_D2PHIB \ - FM_L2L3_D2PHIC_DELAY \ - FM_L2L3_D2PHIC \ - FM_L2L3_D2PHID_DELAY \ - FM_L2L3_D2PHID \ - FM_L2L3_D3PHIA_DELAY \ - FM_L2L3_D3PHIA \ - FM_L2L3_D3PHIB_DELAY \ - FM_L2L3_D3PHIB \ - FM_L2L3_D3PHIC_DELAY \ - FM_L2L3_D3PHIC \ - FM_L2L3_D3PHID_DELAY \ - FM_L2L3_D3PHID \ - FM_L2L3_D4PHIA_DELAY \ - FM_L2L3_D4PHIA \ - FM_L2L3_D4PHIB_DELAY \ - FM_L2L3_D4PHIB \ - FM_L2L3_D4PHIC_DELAY \ - FM_L2L3_D4PHIC \ - FM_L2L3_D4PHID_DELAY \ - FM_L2L3_D4PHID \ MPAR_L2L3ABCD_DELAY \ MPAR_L2L3ABCD \ + MPAR_L5L6ABCD_DELAY \ + MPAR_L5L6ABCD \ + MPAR_L2D1ABCD_DELAY \ + MPAR_L2D1ABCD \ ]] - -create_pblock pblock_FTL3L4 -add_cells_to_pblock [get_pblocks pblock_FTL3L4] [get_cells -quiet [list \ - FT_L3L4 \ - FM_L3L4_L1PHIA_DELAY \ - FM_L3L4_L1PHIA \ - FM_L3L4_L1PHIB_DELAY \ - FM_L3L4_L1PHIB \ - FM_L3L4_L1PHIC_DELAY \ - FM_L3L4_L1PHIC \ - FM_L3L4_L1PHID_DELAY \ - FM_L3L4_L1PHID \ - FM_L3L4_L1PHIE_DELAY \ - FM_L3L4_L1PHIE \ - FM_L3L4_L1PHIF_DELAY \ - FM_L3L4_L1PHIF \ - FM_L3L4_L1PHIG_DELAY \ - FM_L3L4_L1PHIG \ - FM_L3L4_L1PHIH_DELAY \ - FM_L3L4_L1PHIH \ - FM_L3L4_L2PHIA_DELAY \ - FM_L3L4_L2PHIA \ - FM_L3L4_L2PHIB_DELAY \ - FM_L3L4_L2PHIB \ - FM_L3L4_L2PHIC_DELAY \ - FM_L3L4_L2PHIC \ - FM_L3L4_L2PHID_DELAY \ - FM_L3L4_L2PHID \ - FM_L3L4_L5PHIA_DELAY \ - FM_L3L4_L5PHIA \ - FM_L3L4_L5PHIB_DELAY \ - FM_L3L4_L5PHIB \ - FM_L3L4_L5PHIC_DELAY \ - FM_L3L4_L5PHIC \ - FM_L3L4_L5PHID_DELAY \ - FM_L3L4_L5PHID \ - FM_L3L4_L6PHIA_DELAY \ - FM_L3L4_L6PHIA \ - FM_L3L4_L6PHIB_DELAY \ - FM_L3L4_L6PHIB \ - FM_L3L4_L6PHIC_DELAY \ - FM_L3L4_L6PHIC \ - FM_L3L4_L6PHID_DELAY \ - FM_L3L4_L6PHID \ - FM_L3L4_D1PHIA_DELAY \ - FM_L3L4_D1PHIA \ - FM_L3L4_D1PHIB_DELAY \ - FM_L3L4_D1PHIB \ - FM_L3L4_D1PHIC_DELAY \ - FM_L3L4_D1PHIC \ - FM_L3L4_D1PHID_DELAY \ - FM_L3L4_D1PHID \ - FM_L3L4_D2PHIA_DELAY \ - FM_L3L4_D2PHIA \ - FM_L3L4_D2PHIB_DELAY \ - FM_L3L4_D2PHIB \ - FM_L3L4_D2PHIC_DELAY \ - FM_L3L4_D2PHIC \ - FM_L3L4_D2PHID_DELAY \ - FM_L3L4_D2PHID \ + +create_pblock pblock_TBBBBB +add_cells_to_pblock [get_pblocks pblock_TBBBBB] [get_cells -quiet [list \ + TB_BBBB \ + FM_BBBB_L1PHIA_DELAY \ + FM_BBBB_L1PHIA \ + FM_BBBB_L1PHIB_DELAY \ + FM_BBBB_L1PHIB \ + FM_BBBB_L1PHIC_DELAY \ + FM_BBBB_L1PHIC \ + FM_BBBB_L1PHID_DELAY \ + FM_BBBB_L1PHID \ + FM_BBBB_L1PHIE_DELAY \ + FM_BBBB_L1PHIE \ + FM_BBBB_L1PHIF_DELAY \ + FM_BBBB_L1PHIF \ + FM_BBBB_L1PHIG_DELAY \ + FM_BBBB_L1PHIG \ + FM_BBBB_L1PHIH_DELAY \ + FM_BBBB_L1PHIH \ + FM_BBBB_L2PHIA_DELAY \ + FM_BBBB_L2PHIA \ + FM_BBBB_L2PHIB_DELAY \ + FM_BBBB_L2PHIB \ + FM_BBBB_L2PHIC_DELAY \ + FM_BBBB_L2PHIC \ + FM_BBBB_L2PHID_DELAY \ + FM_BBBB_L2PHID \ + FM_BBBB_L3PHIA_DELAY \ + FM_BBBB_L3PHIA \ + FM_BBBB_L3PHIB_DELAY \ + FM_BBBB_L3PHIB \ + FM_BBBB_L3PHIC_DELAY \ + FM_BBBB_L3PHIC \ + FM_BBBB_L3PHID_DELAY \ + FM_BBBB_L3PHID \ + FM_BBBB_L4PHIA_DELAY \ + FM_BBBB_L4PHIA \ + FM_BBBB_L4PHIB_DELAY \ + FM_BBBB_L4PHIB \ + FM_BBBB_L4PHIC_DELAY \ + FM_BBBB_L4PHIC \ + FM_BBBB_L4PHID_DELAY \ + FM_BBBB_L4PHID \ + FM_BBBB_L5PHIA_DELAY \ + FM_BBBB_L5PHIA \ + FM_BBBB_L5PHIB_DELAY \ + FM_BBBB_L5PHIB \ + FM_BBBB_L5PHIC_DELAY \ + FM_BBBB_L5PHIC \ + FM_BBBB_L5PHID_DELAY \ + FM_BBBB_L5PHID \ + FM_BBBB_L6PHIA_DELAY \ + FM_BBBB_L6PHIA \ + FM_BBBB_L6PHIB_DELAY \ + FM_BBBB_L6PHIB \ + FM_BBBB_L6PHIC_DELAY \ + FM_BBBB_L6PHIC \ + FM_BBBB_L6PHID_DELAY \ + FM_BBBB_L6PHID \ + FM_BBBB_D1PHIA_DELAY \ + FM_BBBB_D1PHIA \ + FM_BBBB_D1PHIB_DELAY \ + FM_BBBB_D1PHIB \ + FM_BBBB_D1PHIC_DELAY \ + FM_BBBB_D1PHIC \ + FM_BBBB_D1PHID_DELAY \ + FM_BBBB_D1PHID \ + FM_BBBB_D2PHIA_DELAY \ + FM_BBBB_D2PHIA \ + FM_BBBB_D2PHIB_DELAY \ + FM_BBBB_D2PHIB \ + FM_BBBB_D2PHIC_DELAY \ + FM_BBBB_D2PHIC \ + FM_BBBB_D2PHID_DELAY \ + FM_BBBB_D2PHID \ + FM_BBBB_D3PHIA_DELAY \ + FM_BBBB_D3PHIA \ + FM_BBBB_D3PHIB_DELAY \ + FM_BBBB_D3PHIB \ + FM_BBBB_D3PHIC_DELAY \ + FM_BBBB_D3PHIC \ + FM_BBBB_D3PHID_DELAY \ + FM_BBBB_D3PHID \ + FM_BBBB_D4PHIA_DELAY \ + FM_BBBB_D4PHIA \ + FM_BBBB_D4PHIB_DELAY \ + FM_BBBB_D4PHIB \ + FM_BBBB_D4PHIC_DELAY \ + FM_BBBB_D4PHIC \ + FM_BBBB_D4PHID_DELAY \ + FM_BBBB_D4PHID \ + FM_BBBB_D5PHIA_DELAY \ + FM_BBBB_D5PHIA \ + FM_BBBB_D5PHIB_DELAY \ + FM_BBBB_D5PHIB \ + FM_BBBB_D5PHIC_DELAY \ + FM_BBBB_D5PHIC \ + FM_BBBB_D5PHID_DELAY \ + FM_BBBB_D5PHID \ MPAR_L3L4AB_DELAY \ MPAR_L3L4AB \ MPAR_L3L4CD_DELAY \ MPAR_L3L4CD \ - ]] - -create_pblock pblock_FTL5L6 -add_cells_to_pblock [get_pblocks pblock_FTL5L6] [get_cells -quiet [list \ - FT_L5L6 \ - FM_L5L6_L1PHIA_DELAY \ - FM_L5L6_L1PHIA \ - FM_L5L6_L1PHIB_DELAY \ - FM_L5L6_L1PHIB \ - FM_L5L6_L1PHIC_DELAY \ - FM_L5L6_L1PHIC \ - FM_L5L6_L1PHID_DELAY \ - FM_L5L6_L1PHID \ - FM_L5L6_L1PHIE_DELAY \ - FM_L5L6_L1PHIE \ - FM_L5L6_L1PHIF_DELAY \ - FM_L5L6_L1PHIF \ - FM_L5L6_L1PHIG_DELAY \ - FM_L5L6_L1PHIG \ - FM_L5L6_L1PHIH_DELAY \ - FM_L5L6_L1PHIH \ - FM_L5L6_L2PHIA_DELAY \ - FM_L5L6_L2PHIA \ - FM_L5L6_L2PHIB_DELAY \ - FM_L5L6_L2PHIB \ - FM_L5L6_L2PHIC_DELAY \ - FM_L5L6_L2PHIC \ - FM_L5L6_L2PHID_DELAY \ - FM_L5L6_L2PHID \ - FM_L5L6_L3PHIA_DELAY \ - FM_L5L6_L3PHIA \ - FM_L5L6_L3PHIB_DELAY \ - FM_L5L6_L3PHIB \ - FM_L5L6_L3PHIC_DELAY \ - FM_L5L6_L3PHIC \ - FM_L5L6_L3PHID_DELAY \ - FM_L5L6_L3PHID \ - FM_L5L6_L4PHIA_DELAY \ - FM_L5L6_L4PHIA \ - FM_L5L6_L4PHIB_DELAY \ - FM_L5L6_L4PHIB \ - FM_L5L6_L4PHIC_DELAY \ - FM_L5L6_L4PHIC \ - FM_L5L6_L4PHID_DELAY \ - FM_L5L6_L4PHID \ - MPAR_L5L6ABCD_DELAY \ - MPAR_L5L6ABCD \ - ]] - -create_pblock pblock_FTD1D2 -add_cells_to_pblock [get_pblocks pblock_FTD1D2] [get_cells -quiet [list \ - FT_D1D2 \ - FM_D1D2_L1PHIA_DELAY \ - FM_D1D2_L1PHIA \ - FM_D1D2_L1PHIB_DELAY \ - FM_D1D2_L1PHIB \ - FM_D1D2_L1PHIC_DELAY \ - FM_D1D2_L1PHIC \ - FM_D1D2_L1PHID_DELAY \ - FM_D1D2_L1PHID \ - FM_D1D2_L1PHIE_DELAY \ - FM_D1D2_L1PHIE \ - FM_D1D2_L1PHIF_DELAY \ - FM_D1D2_L1PHIF \ - FM_D1D2_L1PHIG_DELAY \ - FM_D1D2_L1PHIG \ - FM_D1D2_L1PHIH_DELAY \ - FM_D1D2_L1PHIH \ - FM_D1D2_L2PHIA_DELAY \ - FM_D1D2_L2PHIA \ - FM_D1D2_L2PHIB_DELAY \ - FM_D1D2_L2PHIB \ - FM_D1D2_L2PHIC_DELAY \ - FM_D1D2_L2PHIC \ - FM_D1D2_L2PHID_DELAY \ - FM_D1D2_L2PHID \ - FM_D1D2_D3PHIA_DELAY \ - FM_D1D2_D3PHIA \ - FM_D1D2_D3PHIB_DELAY \ - FM_D1D2_D3PHIB \ - FM_D1D2_D3PHIC_DELAY \ - FM_D1D2_D3PHIC \ - FM_D1D2_D3PHID_DELAY \ - FM_D1D2_D3PHID \ - FM_D1D2_D4PHIA_DELAY \ - FM_D1D2_D4PHIA \ - FM_D1D2_D4PHIB_DELAY \ - FM_D1D2_D4PHIB \ - FM_D1D2_D4PHIC_DELAY \ - FM_D1D2_D4PHIC \ - FM_D1D2_D4PHID_DELAY \ - FM_D1D2_D4PHID \ - FM_D1D2_D5PHIA_DELAY \ - FM_D1D2_D5PHIA \ - FM_D1D2_D5PHIB_DELAY \ - FM_D1D2_D5PHIB \ - FM_D1D2_D5PHIC_DELAY \ - FM_D1D2_D5PHIC \ - FM_D1D2_D5PHID_DELAY \ - FM_D1D2_D5PHID \ MPAR_D1D2ABCD_DELAY \ MPAR_D1D2ABCD \ - ]] - -create_pblock pblock_FTD3D4 -add_cells_to_pblock [get_pblocks pblock_FTD3D4] [get_cells -quiet [list \ - FT_D3D4 \ - FM_D3D4_L1PHIA_DELAY \ - FM_D3D4_L1PHIA \ - FM_D3D4_L1PHIB_DELAY \ - FM_D3D4_L1PHIB \ - FM_D3D4_L1PHIC_DELAY \ - FM_D3D4_L1PHIC \ - FM_D3D4_L1PHID_DELAY \ - FM_D3D4_L1PHID \ - FM_D3D4_L1PHIE_DELAY \ - FM_D3D4_L1PHIE \ - FM_D3D4_L1PHIF_DELAY \ - FM_D3D4_L1PHIF \ - FM_D3D4_L1PHIG_DELAY \ - FM_D3D4_L1PHIG \ - FM_D3D4_L1PHIH_DELAY \ - FM_D3D4_L1PHIH \ - FM_D3D4_D1PHIA_DELAY \ - FM_D3D4_D1PHIA \ - FM_D3D4_D1PHIB_DELAY \ - FM_D3D4_D1PHIB \ - FM_D3D4_D1PHIC_DELAY \ - FM_D3D4_D1PHIC \ - FM_D3D4_D1PHID_DELAY \ - FM_D3D4_D1PHID \ - FM_D3D4_D2PHIA_DELAY \ - FM_D3D4_D2PHIA \ - FM_D3D4_D2PHIB_DELAY \ - FM_D3D4_D2PHIB \ - FM_D3D4_D2PHIC_DELAY \ - FM_D3D4_D2PHIC \ - FM_D3D4_D2PHID_DELAY \ - FM_D3D4_D2PHID \ - FM_D3D4_D5PHIA_DELAY \ - FM_D3D4_D5PHIA \ - FM_D3D4_D5PHIB_DELAY \ - FM_D3D4_D5PHIB \ - FM_D3D4_D5PHIC_DELAY \ - FM_D3D4_D5PHIC \ - FM_D3D4_D5PHID_DELAY \ - FM_D3D4_D5PHID \ MPAR_D3D4ABCD_DELAY \ MPAR_D3D4ABCD \ + MPAR_L1D1AB_DELAY \ + MPAR_L1D1AB \ + MPAR_L1D1CD_DELAY \ + MPAR_L1D1CD \ ]] -create_pblock pblock_FTL1D1 -add_cells_to_pblock [get_pblocks pblock_FTL1D1] [get_cells -quiet [list \ - FT_L1D1 \ - FM_L1D1_D2PHIA_DELAY \ - FM_L1D1_D2PHIA \ - FM_L1D1_D2PHIB_DELAY \ - FM_L1D1_D2PHIB \ - FM_L1D1_D2PHIC_DELAY \ - FM_L1D1_D2PHIC \ - FM_L1D1_D2PHID_DELAY \ - FM_L1D1_D2PHID \ - FM_L1D1_D3PHIA_DELAY \ - FM_L1D1_D3PHIA \ - FM_L1D1_D3PHIB_DELAY \ - FM_L1D1_D3PHIB \ - FM_L1D1_D3PHIC_DELAY \ - FM_L1D1_D3PHIC \ - FM_L1D1_D3PHID_DELAY \ - FM_L1D1_D3PHID \ - FM_L1D1_D4PHIA_DELAY \ - FM_L1D1_D4PHIA \ - FM_L1D1_D4PHIB_DELAY \ - FM_L1D1_D4PHIB \ - FM_L1D1_D4PHIC_DELAY \ - FM_L1D1_D4PHIC \ - FM_L1D1_D4PHID_DELAY \ - FM_L1D1_D4PHID \ - FM_L1D1_D5PHIA_DELAY \ - FM_L1D1_D5PHIA \ - FM_L1D1_D5PHIB_DELAY \ - FM_L1D1_D5PHIB \ - FM_L1D1_D5PHIC_DELAY \ - FM_L1D1_D5PHIC \ - FM_L1D1_D5PHID_DELAY \ - FM_L1D1_D5PHID \ - MPAR_L1D1ABCD_DELAY \ - MPAR_L1D1ABCD \ - MPAR_L1D1EFGH_DELAY \ - MPAR_L1D1EFGH \ - ]] - -create_pblock pblock_FTL2D1 -add_cells_to_pblock [get_pblocks pblock_FTL2D1] [get_cells -quiet [list \ - FT_L2D1 \ - FM_L2D1_L1PHIA_DELAY \ - FM_L2D1_L1PHIA \ - FM_L2D1_L1PHIB_DELAY \ - FM_L2D1_L1PHIB \ - FM_L2D1_L1PHIC_DELAY \ - FM_L2D1_L1PHIC \ - FM_L2D1_L1PHID_DELAY \ - FM_L2D1_L1PHID \ - FM_L2D1_L1PHIE_DELAY \ - FM_L2D1_L1PHIE \ - FM_L2D1_L1PHIF_DELAY \ - FM_L2D1_L1PHIF \ - FM_L2D1_L1PHIG_DELAY \ - FM_L2D1_L1PHIG \ - FM_L2D1_L1PHIH_DELAY \ - FM_L2D1_L1PHIH \ - FM_L2D1_D2PHIA_DELAY \ - FM_L2D1_D2PHIA \ - FM_L2D1_D2PHIB_DELAY \ - FM_L2D1_D2PHIB \ - FM_L2D1_D2PHIC_DELAY \ - FM_L2D1_D2PHIC \ - FM_L2D1_D2PHID_DELAY \ - FM_L2D1_D2PHID \ - FM_L2D1_D3PHIA_DELAY \ - FM_L2D1_D3PHIA \ - FM_L2D1_D3PHIB_DELAY \ - FM_L2D1_D3PHIB \ - FM_L2D1_D3PHIC_DELAY \ - FM_L2D1_D3PHIC \ - FM_L2D1_D3PHID_DELAY \ - FM_L2D1_D3PHID \ - FM_L2D1_D4PHIA_DELAY \ - FM_L2D1_D4PHIA \ - FM_L2D1_D4PHIB_DELAY \ - FM_L2D1_D4PHIB \ - FM_L2D1_D4PHIC_DELAY \ - FM_L2D1_D4PHIC \ - FM_L2D1_D4PHID_DELAY \ - FM_L2D1_D4PHID \ - MPAR_L2D1ABCD_DELAY \ - MPAR_L2D1ABCD \ - ]] - -resize_pblock [get_pblocks pblock_FTL2L3] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y3} -resize_pblock [get_pblocks pblock_FTL3L4] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y3} -resize_pblock [get_pblocks pblock_FTL5L6] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y3} -resize_pblock [get_pblocks pblock_FTL1D1] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y3} -resize_pblock [get_pblocks pblock_FTL1L2] -add {CLOCKREGION_X1Y4:CLOCKREGION_X2Y7} -resize_pblock [get_pblocks pblock_FTD1D2] -add {CLOCKREGION_X1Y4:CLOCKREGION_X2Y7} -resize_pblock [get_pblocks pblock_FTD3D4] -add {CLOCKREGION_X1Y4:CLOCKREGION_X2Y7} -resize_pblock [get_pblocks pblock_FTL2D1] -add {CLOCKREGION_X1Y4:CLOCKREGION_X2Y7} + +resize_pblock [get_pblocks pblock_TBAAAA] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y7} +resize_pblock [get_pblocks pblock_TBBBBB] -add {CLOCKREGION_X1Y0:CLOCKREGION_X2Y7} set_property IS_SOFT FALSE [get_pblocks pblock_*] From e66d151b979cf63f78080a642c0c3a593f7eb6d8 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Mon, 9 Dec 2024 07:06:19 -0500 Subject: [PATCH 09/26] Correction to script_TB.tcl file --- project/script_TB.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/project/script_TB.tcl b/project/script_TB.tcl index cbbe7fc36a4..04ed042543d 100644 --- a/project/script_TB.tcl +++ b/project/script_TB.tcl @@ -14,7 +14,7 @@ set modules_to_test { } # module_to_export must correspond to the default macros set at the top of the # test bench; otherwise, the C/RTL cosimulation will fail -set module_to_export FT_L1L2 +set module_to_export TB_AAAA # create new project (deleting any existing one of same name) open_project -reset trackBuilder From b3ccddca117203c98a01439824d12a91584f45e3 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Tue, 10 Dec 2024 04:41:08 -0500 Subject: [PATCH 10/26] Some cleanup of the write_mem methods --- TestBenches/FileReadUtility.h | 13 +-- TestBenches/InputRouter_test.cpp | 1 + TestBenches/MatchProcessor_test.cpp | 8 +- TestBenches/ProjectionCalculator_test.cpp | 14 ++- TestBenches/TrackBuilder_test.cpp | 4 +- TestBenches/TrackletProcessor_test.cpp | 13 ++- TestBenches/VMRouterCM_test.cpp | 3 + TestBenches/VMStubMERouter_test.cpp | 2 + TrackletAlgorithm/InputRouter.h | 23 +---- TrackletAlgorithm/MatchProcessor.h | 4 +- TrackletAlgorithm/MemoryTemplate.h | 111 ++++++++++++++------- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 85 ++++++---------- TrackletAlgorithm/MemoryTemplateTPROJ.h | 93 +++++------------ TrackletAlgorithm/ProjectionCalculator.h | 20 ++-- TrackletAlgorithm/TrackletProcessor.h | 18 ++-- TrackletAlgorithm/VMRouterCM.h | 32 +----- TrackletAlgorithm/VMSMERouter.h | 5 +- 17 files changed, 194 insertions(+), 255 deletions(-) diff --git a/TestBenches/FileReadUtility.h b/TestBenches/FileReadUtility.h index a441819b101..cf254a63e95 100644 --- a/TestBenches/FileReadUtility.h +++ b/TestBenches/FileReadUtility.h @@ -105,6 +105,7 @@ void writeMemFromFile(MemType& memory, std::ifstream& fin, int ievt, int base=16 } memory.clear(); + memory.setWriteBX(ievt); while (getline(fin, line)) { @@ -115,12 +116,8 @@ void writeMemFromFile(MemType& memory, std::ifstream& fin, int ievt, int base=16 if (line.find("Event") != std::string::npos) { return; } else { - if (split(line,' ').size()==4) { - memory.write_mem(ievt, line, base); - } else { - const std::string datastr = split(line, ' ').back(); - memory.write_mem(ievt, datastr, base); - } + std::vector split_line = split(line, ' '); + memory.write_mem(split_line, base); } } @@ -611,12 +608,12 @@ unsigned int compareMemWithTwoFiles(const MemType& memory, std::vector 1){ for (int j = 0; j < memory_ref2.getEntries(0); ++j){ auto data_ref2 = memory_ref2.read_mem(0, j); - memory_ref.write_mem(0, data_ref2, j + memory_ref1.getEntries(0)); + memory_ref.write_mem(data_ref2, j + memory_ref1.getEntries(0)); } } diff --git a/TestBenches/InputRouter_test.cpp b/TestBenches/InputRouter_test.cpp index d8d7e4bd01d..db1a08d7e00 100644 --- a/TestBenches/InputRouter_test.cpp +++ b/TestBenches/InputRouter_test.cpp @@ -660,6 +660,7 @@ int main(int argc, char * argv[]) for( unsigned int cIndx=0; cIndx < (unsigned int)hNmemories ; cIndx++) { hMemories[cIndx].clear(); + hMemories[cIndx].setWriteBX(cEvId); } BXType hBx = cEvId&0x7; BXType hBx_o; diff --git a/TestBenches/MatchProcessor_test.cpp b/TestBenches/MatchProcessor_test.cpp index 6bd1d246a86..945b294d841 100644 --- a/TestBenches/MatchProcessor_test.cpp +++ b/TestBenches/MatchProcessor_test.cpp @@ -45,11 +45,11 @@ int main() // input memories const auto nTrackletProjections = tb.nFiles(trackletProjectionPattern); vector> tprojarray(nTrackletProjections); + const auto nAllStub = tb.nFiles(allStubPatternarray); vector> allstub(nAllStub); const auto nVMStubs = tb.nFiles(vmStubPatternarray); VMStubMemory vmstub; // barrel - // output memories const auto nFullMatches = tb.nFiles(fullMatchPattern); vector > fullmatcharray(nFullMatches); @@ -87,9 +87,11 @@ int main() writeMemFromFile>(vmstub, fin_VMStubs.at(0), ievt); // barrel // clear allarray, output memories before starting - for (unsigned int i = 0; i < nFullMatches; i++) + for (unsigned int i = 0; i < nFullMatches; i++){ fullmatcharray[i].clear(); - + fullmatcharray[i].setWriteBX(ievt); + } + // Unit Under Test TOP_FUNC_(bx, tprojarray.data(), vmstub, allstub.data(), bx_out, fullmatcharray.data()); diff --git a/TestBenches/ProjectionCalculator_test.cpp b/TestBenches/ProjectionCalculator_test.cpp index 15a2ed43446..c2687b88bdf 100644 --- a/TestBenches/ProjectionCalculator_test.cpp +++ b/TestBenches/ProjectionCalculator_test.cpp @@ -72,13 +72,19 @@ int main() writeMemFromFile(trackletParameters, fin_tpar.at(0), ievt); // clear all output memories before starting - for (unsigned i = 0; i < TP::N_PROJOUT_BARRELPS; i++) + for (unsigned i = 0; i < TP::N_PROJOUT_BARRELPS; i++) { tproj_barrel_ps[i].clear(); - for (unsigned i = 0; i < TP::N_PROJOUT_BARREL2S; i++) + tproj_barrel_ps[i].setWriteBX(ievt); + } + for (unsigned i = 0; i < TP::N_PROJOUT_BARREL2S; i++) { tproj_barrel_2s[i].clear(); - for (unsigned i = 0; i < TP::N_PROJOUT_DISK; i++) + tproj_barrel_2s[i].setWriteBX(ievt); + } + for (unsigned i = 0; i < TP::N_PROJOUT_DISK; i++) { tproj_disk[i].clear(); - + tproj_disk[i].setWriteBX(ievt); + } + // bx BXType bx = ievt; BXType bx_o; diff --git a/TestBenches/TrackBuilder_test.cpp b/TestBenches/TrackBuilder_test.cpp index 640438b0723..32abfe128d7 100644 --- a/TestBenches/TrackBuilder_test.cpp +++ b/TestBenches/TrackBuilder_test.cpp @@ -132,6 +132,7 @@ int main() diskStubWords[j][i] = TrackFit_t::DiskStubWord(0); } tracksMem.clear(); + tracksMem.setWriteBX(ievt); // read event and write to memories for (unsigned i = 0; i < nTPar1Mems; i++) @@ -167,14 +168,13 @@ int main() done ); - unsigned nTracks = 0; for (unsigned short i = 0; i < kMaxProc; i++) { TrackFit_t track; track.setTrackWord(trackWord[i]); setBarrelStubs(track, barrelStubWords, i); setDiskStubs(track, diskStubWords, i); if (track.getTrackValid()) - tracksMem.write_mem(bx, track, nTracks++); + tracksMem.write_mem(track); } const auto &pos = fout_tracks.at(0).tellg(); diff --git a/TestBenches/TrackletProcessor_test.cpp b/TestBenches/TrackletProcessor_test.cpp index bed3968e8f8..6307aed137c 100644 --- a/TestBenches/TrackletProcessor_test.cpp +++ b/TestBenches/TrackletProcessor_test.cpp @@ -147,12 +147,19 @@ std::cout< hStbWrd phiBn = cBn; } -// clear internal counters -template -void ClearCounters(unsigned int nMemories - , ap_uint nEntries[nEntriesSize]) -{ -#pragma HLS inline -#pragma HLS array_partition variable = nEntries complete - LOOP_ClearCounters: - for (unsigned int cIndx = 0; cIndx < nEntriesSize ; cIndx++) - { -#pragma HLS unroll - nEntries[cIndx]=0; - } -} - // internal memory counter template void CountMemories(const ap_uint hPhBnWord @@ -314,9 +299,6 @@ void InputRouter( const BXType bx unsigned int nMems=0; unsigned int nMemsPerLyr[kMaxLyrsPerDTC]; CountMemories(hPhBnWord, nMems, nMemsPerLyr); - // clear stub counters - ap_uint hNStubs[nOMems]; - ClearCounters(nMems, hNStubs); LOOP_ProcessIR: for (int cStubCounter = 0; cStubCounter < kMaxProc; cStubCounter++) @@ -397,11 +379,8 @@ void InputRouter( const BXType bx #endif #endif - // update counters - auto hEntries = hNStubs[cMemIndx]; - hNStubs[cMemIndx] = hEntries + 1; // fill memory - (&hOutputStubs[cMemIndx])->write_mem(bx, hMemWord, hEntries); + (&hOutputStubs[cMemIndx])->write_mem(hMemWord); } // update output bx port bx_o = bx; diff --git a/TrackletAlgorithm/MatchProcessor.h b/TrackletAlgorithm/MatchProcessor.h index d44af670563..50f63684790 100644 --- a/TrackletAlgorithm/MatchProcessor.h +++ b/TrackletAlgorithm/MatchProcessor.h @@ -1130,9 +1130,9 @@ void MatchCalculator(BXType bx, if(goodmatch) { // Write out only the best match, based on the seeding if (proj_seed == TF::L1L2 || proj_seed == TF::L2L3 || proj_seed == TF::L5L6 || proj_seed == TF::L2D1 ) { - fullmatch[0].write_mem_new(bx,fm,savedMatch); // AAAA FM + fullmatch[0].write_mem(fm,savedMatch); // AAAA FM } else { - fullmatch[1].write_mem_new(bx,fm,savedMatch); // BBBB FM + fullmatch[1].write_mem(fm,savedMatch); // BBBB FM } savedMatch = 1; } diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index db6337eccf3..019fd10dc8b 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -3,6 +3,8 @@ #define TrackletAlgorithm_MemoryTemplate_h #include +#include +#include //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... @@ -48,6 +50,7 @@ class MemoryTemplate DataType dataarray_[DEPTH_BX][DEPTH_ADDR]; // data array NEntryT nentries_[DEPTH_BX]; // number of entries + BunchXingT write_bx_; //BX for writing public: @@ -59,6 +62,10 @@ class MemoryTemplate return nentries_[bx]; } + void setWriteBX(const BunchXingT& ibx) { + write_bx_ = ibx; + } + const DataType (&get_mem() const)[DEPTH_BX][DEPTH_ADDR] {return dataarray_;} DataType read_mem(BunchXingT ibx, ap_uint index) const @@ -67,86 +74,114 @@ class MemoryTemplate if(!NBIT_BX) ibx = 0; return dataarray_[ibx][index]; } - + /* template - bool write_mem(BunchXingT ibx, SpecType data) + bool write_mem(SpecType data) { #pragma HLS inline const NEntryT addr_index = #ifdef __SYNTHESIS__ 0; #else - nentries_[ibx]; + nentries_[write_bx_]; #endif - return write_mem(ibx,data,addr_index); + return write_mem(data,addr_index); } - + */ + /* template - bool write_mem(BunchXingT ibx, SpecType data, NEntryT addr_index) + bool write_mem(SpecType data, NEntryT addr_index) { #pragma HLS inline - if(!NBIT_BX) ibx = 0; + if(!NBIT_BX) write_bx_ = 0; static_assert( std::is_same::value || (std::is_same >::value && std::is_same >::value) || (std::is_same >::value && std::is_same >::value) , "Invalid conversion between data types"); DataType sameData(data.raw()); - return write_mem(ibx,sameData,addr_index); + return write_mem(sameData,addr_index); } + */ - bool write_mem(BunchXingT ibx, DataType data) + /* + bool write_mem(DataType data) { #pragma HLS inline const NEntryT addr_index = #ifdef __SYNTHESIS__ 0; #else - nentries_[ibx]; + nentries_[write_bx_]; #endif - return write_mem(ibx,data,addr_index); + return write_mem(data,addr_index); } + */ - bool write_mem(BunchXingT ibx, DataType data, NEntryT addr_index) + /* + bool write_mem(DataType data) { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if(!NBIT_BX) ibx = 0; - if (addr_index < DEPTH_ADDR) { + if(!NBIT_BX) write_bx_ = 0; + if (nentries_[write_bx_] < DEPTH_ADDR) { #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhd memory implementation will write to the correct address!! - dataarray_[ibx][0] = data; + dataarray_[write_bx_][0] = data; #else - dataarray_[ibx][nentries_[ibx]++] = data; + dataarray_[write_bx_][nentries_[write_bx_]++] = data; #endif -#ifndef __SYNTHESIS__ - nentries_[ibx] = addr_index + 1; -#endif + //#ifndef __SYNTHESIS__ + //nentries_[write_bx_] = addr_index + 1; + //#endif return true; } else { return false; } } - - bool write_mem_new(BunchXingT ibx, DataType data, ap_uint<1> overwrite) + */ + /* + bool write_mem_new(DataType data, ap_uint<1> overwrite=0) { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if(!NBIT_BX) ibx = 0; - if (nentries_[ibx] < DEPTH_ADDR) { + if(!NBIT_BX) write_bx_ = 0; + if (nentries_[write_bx_] < DEPTH_ADDR) { #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhd memory implementation will write to the correct address!! - dataarray_[ibx][0] = data; + dataarray_[write_bx_][0] = data; #else if(overwrite == 0) { - dataarray_[ibx][nentries_[ibx]++] = data; + dataarray_[write_bx_][nentries_[write_bx_]++] = data; } else { - dataarray_[ibx][nentries_[ibx]-1] = data; + dataarray_[write_bx_][nentries_[write_bx_]-1] = data; + } +#endif + return true; + } else { + return false; + } + } + */ + + bool write_mem(DataType data, ap_uint<1> overwrite=0) + { +#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 +#pragma HLS inline + if(!NBIT_BX) write_bx_ = 0; + if (nentries_[write_bx_] < DEPTH_ADDR) { +#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH + //The vhd memory implementation will write to the correct address!! + dataarray_[write_bx_][0] = data; +#else + if(overwrite == 0) { + dataarray_[write_bx_][nentries_[write_bx_]++] = data; + } else { + dataarray_[write_bx_][nentries_[write_bx_]-1] = data; } #endif - return true; } else { return false; @@ -165,28 +200,32 @@ class MemoryTemplate void clear() { DataType data("0",16); + setWriteBX(0); MEM_RST: for (size_t ibx=0; ibx& split_line, int base=16) { + assert(split_line.size()==3); + DataType data(split_line.back().c_str(), base); + + return write_mem(data); } // print memory contents diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index cf1a28d1a4d..f99f605552d 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -65,6 +65,7 @@ class MemoryTemplateBinnedCM{ }; DataType dataarray_[NCP][kNBxBins][kNMemDepth]; // data array + BunchXingT write_bx_; //BX for writing ap_uint<8> binmask8_[kNBxBins][1< nentries_[slots]; @@ -77,6 +78,10 @@ class MemoryTemplateBinnedCM{ unsigned int getNEntryPerBin() const {return (1<<(NBIT_ADDR-NBIT_BIN));} unsigned int getNCopy() const {return NCOPY;} + void setWriteBX(const BunchXingT& ibx) { + write_bx_ = ibx; + } + NEntryT getEntries(BunchXingT bx, ap_uint slot) const { ap_uint ibin; ap_uint ireg; @@ -128,53 +133,43 @@ class MemoryTemplateBinnedCM{ return dataarray_[icopy][ibx][getNEntryPerBin()*slot+index]; } - bool write_mem(BunchXingT ibx, ap_uint slot, DataType data, unsigned int nentry_ibx) { + bool write_mem(ap_uint slot, DataType data) { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 #pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if (isCMSSW && !NBIT_BX) {ibx = 0;} - if (nentry_ibx < getNEntryPerBin()-1) { // Max 15 stubs in each memory due to 4 bit nentries + if (isCMSSW && !NBIT_BX) {write_bx_ = 0;} #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH - dataarray_[0][ibx][getNEntryPerBin()*slot] = data; + dataarray_[0][write_bx_][getNEntryPerBin()*slot] = data; #else - // write address for slot: getNEntryPerBin() * slot + nentry_ibx + // write address for slot: getNEntryPerBin() * slot + nentry_ibx - ap_uint ibin; - ap_uint ireg; - (ibin,ireg)=slot; + ap_uint ibin; + ap_uint ireg; + (ibin,ireg)=slot; - unsigned int nentry = nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); + unsigned int nentry = nentries_[write_bx_*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); - if (nentry == ((1 << (NBIT_ADDR-NBIT_BIN)) - 1)) return false; + if (nentry == ((1 << (NBIT_ADDR-NBIT_BIN)) - 1)) return false; - nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; - if (ibin!=0) { - nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; - } - binmask8_[ibx][ibin].set_bit(ireg,true); + nentries_[write_bx_*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; + if (ibin!=0) { + nentries_[write_bx_*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; + } + binmask8_[write_bx_][ibin].set_bit(ireg,true); - //icopy comparison must be signed int or future SW fails - writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { + //icopy comparison must be signed int or future SW fails + writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { #pragma HLS unroll - dataarray_[icopy][ibx][getNEntryPerBin()*slot+nentry] = data; - } -#endif - return true; - } - else { -#ifndef __SYNTHESIS__ - if (data.raw() != 0) { // To avoid lots of prints when we're clearing the memories - edm::LogVerbatim("L1trackHLS") << "Warning out of range. nentry_ibx = "<=MAX_TPROJ_PAGE_SIZE) { - return false; - } - dataarray_[ibx][DEPTH_ADDR*page+nentries_[ibx*NPAGE+page]++] = data; - mask_[ibx].set(page); - -#endif - - return true; - } else { + //NBIT_BX==1 is to identify the projection memories + if (NBIT_BX==1 && nentries_[write_bx_*NPAGE+page]>=MAX_TPROJ_PAGE_SIZE) { return false; } + dataarray_[write_bx_][DEPTH_ADDR*page+nentries_[write_bx_*NPAGE+page]++] = data; + mask_[write_bx_].set(page); +#endif + return true; + } // Methods for C simulation only @@ -161,50 +146,18 @@ class MemoryTemplateTPROJ } } - bool write_mem_clear(BunchXingT ibx, DataType data, NEntryT addr_index, unsigned int page) + bool write_mem(const std::vector& split_line, int base=16) { - if(!NBIT_BX) ibx = 0; - if (addr_index < DEPTH_ADDR) { - //FIXME - shoudl this method be removed? - return true; - } else { - return false; - } - } - - - // write memory from text file - bool write_mem(BunchXingT ibx, const char* datastr, int base=16, unsigned int page = 0 ) { - + assert(split_line.size()==4); - if(!NBIT_BX) ibx = 0; + const std::string datastr = split_line.back(); - DataType data(datastr, base); - NEntryT nent = nentries_[ibx*NPAGE+page]; - bool success = write_mem(ibx, data, nent, page); + unsigned int page = (int)strtol(split_line.front().c_str(), nullptr, base); // Convert string (in hexadecimal) to int - return success; - } - - bool write_mem(BunchXingT ibx, const std::string& line, int base=16) - { - assert(split(line,' ').size()==4); - - const std::string datastr = split(line,' ').back(); - - const std::string pagestr = split(line,' ').front(); - - unsigned int page = NPAGE; - if (pagestr=="0x00") page = 0; - if (pagestr=="0x01") page = 1; - if (pagestr=="0x02") page = 2; - if (pagestr=="0x03") page = 3; - assert(page < NPAGE); - - if(!NBIT_BX) ibx = 0; + if(!NBIT_BX) write_bx_ = 0; DataType data(datastr.c_str(), base); - NEntryT nent = nentries_[ibx*NPAGE+page]; - bool success = write_mem(ibx, data, nent, page); + + bool success = write_mem(data, page); return success; } diff --git a/TrackletAlgorithm/ProjectionCalculator.h b/TrackletAlgorithm/ProjectionCalculator.h index 84288d7b0fe..695041089e2 100644 --- a/TrackletAlgorithm/ProjectionCalculator.h +++ b/TrackletAlgorithm/ProjectionCalculator.h @@ -41,24 +41,22 @@ PC::addProj(const TrackletProjection &proj, const BXType bx, Tracklet int ipage = trackletIndex >> kNBits_MemAddr; - trackletIndex = trackletIndex&((1 << kNBits_MemAddr) -1); - if (NProjOut > 0 && TPROJMask & (0x1 << 0) && success && proj_success && phi == 0) - projout[0].write_mem(bx, proj, trackletIndex, ipage); + projout[0].write_mem(proj, ipage); if (NProjOut > 1 && TPROJMask & (0x1 << 1) && success && proj_success && phi == 1) - projout[1].write_mem(bx, proj, trackletIndex, ipage); + projout[1].write_mem(proj, ipage); if (NProjOut > 2 && TPROJMask & (0x1 << 2) && success && proj_success && phi == 2) - projout[2].write_mem(bx, proj, trackletIndex, ipage); + projout[2].write_mem(proj, ipage); if (NProjOut > 3 && TPROJMask & (0x1 << 3) && success && proj_success && phi == 3) - projout[3].write_mem(bx, proj, trackletIndex, ipage); + projout[3].write_mem(proj, ipage); if (NProjOut > 4 && TPROJMask & (0x1 << 4) && success && proj_success && phi == 4) - projout[4].write_mem(bx, proj, trackletIndex, ipage); + projout[4].write_mem(proj, ipage); if (NProjOut > 5 && TPROJMask & (0x1 << 5) && success && proj_success && phi == 5) - projout[5].write_mem(bx, proj, trackletIndex, ipage); + projout[5].write_mem(proj, ipage); if (NProjOut > 6 && TPROJMask & (0x1 << 6) && success && proj_success && phi == 6) - projout[6].write_mem(bx, proj, trackletIndex, ipage); + projout[6].write_mem(proj, ipage); if (NProjOut > 7 && TPROJMask & (0x1 << 7) && success && proj_success && phi == 7) - projout[7].write_mem(bx, proj, trackletIndex, ipage); + projout[7].write_mem(proj, ipage); return (success && proj_success); } @@ -85,7 +83,7 @@ template< int ipage = trackletIndex >> 7; - tparout.write_mem(bx, tpar, trackletIndex&((1 << kNBits_MemAddr) -1), ipage); + tparout.write_mem(tpar, ipage); // Load the initial track parameters (phi0, z0, t, rinv) TrackletParameters::PHI0PAR phi0 = tpar.getPhi0(); diff --git a/TrackletAlgorithm/TrackletProcessor.h b/TrackletAlgorithm/TrackletProcessor.h index 1ee9317f3ff..3b7fa4146a2 100644 --- a/TrackletAlgorithm/TrackletProcessor.h +++ b/TrackletAlgorithm/TrackletProcessor.h @@ -476,21 +476,21 @@ TP::addProj(const TrackletProjection &proj, const BXType bx, Tracklet phi >>= 3; if (NProjOut > 0 && TPROJMask & (0x1 << 0) && success && proj_success && phi == 0) - projout[0].write_mem(bx, proj, 0); + projout[0].write_mem(proj,0); if (NProjOut > 1 && TPROJMask & (0x1 << 1) && success && proj_success && phi == 1) - projout[1].write_mem(bx, proj, 0); + projout[1].write_mem(proj,0); if (NProjOut > 2 && TPROJMask & (0x1 << 2) && success && proj_success && phi == 2) - projout[2].write_mem(bx, proj, 0); + projout[2].write_mem(proj,0); if (NProjOut > 3 && TPROJMask & (0x1 << 3) && success && proj_success && phi == 3) - projout[3].write_mem(bx, proj, 0); + projout[3].write_mem(proj,0); if (NProjOut > 4 && TPROJMask & (0x1 << 4) && success && proj_success && phi == 4) - projout[4].write_mem(bx, proj, 0); + projout[4].write_mem(proj,0); if (NProjOut > 5 && TPROJMask & (0x1 << 5) && success && proj_success && phi == 5) - projout[5].write_mem(bx, proj, 0); + projout[5].write_mem(proj,0); if (NProjOut > 6 && TPROJMask & (0x1 << 6) && success && proj_success && phi == 6) - projout[6].write_mem(bx, proj, 0); + projout[6].write_mem(proj,0); if (NProjOut > 7 && TPROJMask & (0x1 << 7) && success && proj_success && phi == 7) - projout[7].write_mem(bx, proj, 0); + projout[7].write_mem(proj,0); return (success && proj_success); } @@ -552,7 +552,7 @@ TP::processStubPair( // Write the tracklet parameters and projections to the output memories. const TrackletParameters tpar(phiRegion, stubIndex1, stubIndex2, rinv, phi0, z0, t); if (success) { - trackletParameters->write_mem(bx, tpar, 0); + trackletParameters->write_mem(tpar,0); } bool addL3 = false, addL4 = false, addL5 = false, addL6 = false; diff --git a/TrackletAlgorithm/VMRouterCM.h b/TrackletAlgorithm/VMRouterCM.h index d89b8012d18..9f5df861d7f 100644 --- a/TrackletAlgorithm/VMRouterCM.h +++ b/TrackletAlgorithm/VMRouterCM.h @@ -219,27 +219,6 @@ void VMRouterCM(const BXType bx, BXType& bx_o, //Create variables that keep track of which memory address to read and write to ap_uint read_addr(0); // Reading of input stubs - ap_uint addrCountASI[nAllInnerVariants]; // Writing of Inner Allstubs - ap_uint<5> addrCountME[1 << (rzSizeME + phiRegSize)]; // Writing of ME stubs, number of bits taken from whatever is defined in the memories: (4+rzSize + phiRegSize)-(rzSize + phiRegSize)+1 - ap_uint<5> addrCountTE[1 << (rzSizeTE + phiRegSize)]; // Writing of TE stubs -#pragma HLS array_partition variable=addrCountASI complete dim=0 -#pragma HLS array_partition variable=addrCountME complete dim=0 -#pragma HLS array_partition variable=addrCountTE complete dim=0 - - if (nAllInnerVariants) { - for (int i = 0; i < nAllInnerVariants; i++) { -#pragma HLS unroll - addrCountASI[i] = 0; - } - } - for (int i = 0; i < 1 << (rzSizeME + phiRegSize); i++) { -#pragma HLS unroll - addrCountME[i] = 0; - } - for (int i = 0; i < 1 << (rzSizeTE + phiRegSize); i++) { -#pragma HLS unroll - addrCountTE[i] = 0; - } ///////////////////////////////////// // Main Loop @@ -294,7 +273,7 @@ void VMRouterCM(const BXType bx, BXType& bx_o, if (nAllCopies > 0) { for (int n = 0; n < nAllCopies; n++) { #pragma HLS UNROLL - memoriesAS[n].write_mem(bx, allstub, i); + memoriesAS[n].write_mem(allstub); } } @@ -370,8 +349,7 @@ void VMRouterCM(const BXType bx, BXType& bx_o, } if (passPhiCut && passSpecialCut) { - memoriesASInner[inner_mem_index].write_mem(bx, allstubinner, addrCountASI[inner_mem_index]); - addrCountASI[inner_mem_index]++; + memoriesASInner[inner_mem_index].write_mem(allstubinner); } inner_mem_index++; @@ -396,8 +374,7 @@ void VMRouterCM(const BXType bx, BXType& bx_o, createVMStub, InType, OutType, Layer, Disk, true>(stub, i, negDisk, METable, phiCorrTable, slotME); // Write the ME stub - memoryME->write_mem(bx, slotME, stubME, addrCountME[slotME]); - addrCountME[slotME] += 1; + memoryME->write_mem(slotME, stubME); #if !defined(__SYNTHESIS__) && defined(VMRCM_DEBUG) edm::LogVerbatim("L1trackHLS") << "ME stub " << std::hex << stubME.raw() << std::dec << " to slot " << slotME; @@ -419,9 +396,8 @@ void VMRouterCM(const BXType bx, BXType& bx_o, // Write stub to all TE memory copies for (int n = 0; n < nTEOCopies; n++) { #pragma HLS UNROLL - memoriesTEO[n].write_mem(bx, slotTE, stubTEO, addrCountTE[slotTE]); + memoriesTEO[n].write_mem(slotTE, stubTEO); } - addrCountTE[slotTE] += 1; #if !defined(__SYNTHESIS__) && defined(VMRCM_DEBUG) edm::LogVerbatim("L1trackHLS") << "TEOuter stub " << std::hex << stubTEO.raw() << std::dec << " to slot " << slotTE; diff --git a/TrackletAlgorithm/VMSMERouter.h b/TrackletAlgorithm/VMSMERouter.h index 55d3be2f379..151c47e5ae7 100644 --- a/TrackletAlgorithm/VMSMERouter.h +++ b/TrackletAlgorithm/VMSMERouter.h @@ -185,8 +185,7 @@ void VMSMERouter(const BXType bx, BXType& bx_o, // It seems that the if (nAllCopies > 0) should not be needed, // but if nAllCopies is zero it generates an error in vivado_hls if (valid) { - ap_uint<7> ap_index(index); - memoriesAS.write_mem(bx, stub_copy, ap_index); + memoriesAS.write_mem(stub_copy); } constexpr bool isDisk = (Disk > 0); @@ -210,7 +209,7 @@ void VMSMERouter(const BXType bx, BXType& bx_o, createVMStubME, InType, Layer, Disk>(allStub, index, negDisk, METable, phiCorrTable, slotME); // Write the ME stub - memoryME->write_mem(bx, slotME, stubME, 0); + memoryME->write_mem(slotME, stubME); } From ddd88bf0f84931ef97d88a6795b9b98238513435 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Tue, 10 Dec 2024 08:09:34 -0500 Subject: [PATCH 11/26] Fix TrackMerger so that it runs. Still need more TLC --- TestBenches/TrackMerger_test.cpp | 49 ++++++++++++++++++-------------- TrackletAlgorithm/TrackHandler.h | 6 ++-- emData/generate_TP.py | 21 +------------- 3 files changed, 32 insertions(+), 44 deletions(-) diff --git a/TestBenches/TrackMerger_test.cpp b/TestBenches/TrackMerger_test.cpp index 3c75c32d8a5..18234dda365 100644 --- a/TestBenches/TrackMerger_test.cpp +++ b/TestBenches/TrackMerger_test.cpp @@ -20,24 +20,24 @@ int main(){ // Input memories TrackFitType::TrackWord trackWord[kMaxTrack]; - TrackFitType::BarrelStubWord barrelStubWords[kMaxTrack][4]; - TrackFitType::DiskStubWord diskStubWords[kMaxTrack][4]; + TrackFitType::BarrelStubWord barrelStubWords[kMaxTrack][6]; + TrackFitType::DiskStubWord diskStubWords[kMaxTrack][5]; TrackFitMemory inputTracks; // Output memories TrackFitType::TrackWord trackWord_o[kMaxTrack]; - TrackFitType::BarrelStubWord barrelStubWords_o[kMaxTrack][4]; - TrackFitType::DiskStubWord diskStubWords_o[kMaxTrack][4]; + TrackFitType::BarrelStubWord barrelStubWords_o[kMaxTrack][6]; + TrackFitType::DiskStubWord diskStubWords_o[kMaxTrack][5]; TrackFitMemory outputTracks; // int outputNumber; TBHelper tb("../../../../../emData/PD/PD/"); // Open input files - auto &fin_inputTracks = tb.files("TrackFit_TF_L1L2*"); + auto &fin_inputTracks = tb.files("TrackFit_TF_AAAA*"); - auto &fout_outputTracks = tb.files("CleanTrack_CT_L1L2*"); + auto &fout_outputTracks = tb.files("CleanTrack_CT_AAAA*"); for (unsigned int ievt = 0; ievt < nevents; ++ievt) { cout << "Event: " << dec << ievt << endl; @@ -45,15 +45,18 @@ int main(){ trackWord[i] = TrackFitType::TrackWord(0); trackWord_o[i] = TrackFitType::TrackWord(0); - for (unsigned short nStub = 0; nStub < 4; nStub++){ + for (unsigned short nStub = 0; nStub < 6; nStub++){ barrelStubWords[i][nStub] = TrackFitType::BarrelStubWord(0); - diskStubWords[i][nStub] = TrackFitType::DiskStubWord(0); barrelStubWords_o[i][nStub] = TrackFitType::BarrelStubWord(0); - diskStubWords_o[i][nStub] = TrackFitType::DiskStubWord(0); + if ( nStub != 5 ) { + diskStubWords[i][nStub] = TrackFitType::DiskStubWord(0); + diskStubWords_o[i][nStub] = TrackFitType::DiskStubWord(0); + } } } outputTracks.clear(); + outputTracks.setWriteBX(ievt); // Read in next event from input writeMemFromFile> (inputTracks, fin_inputTracks.at(0), ievt); @@ -75,10 +78,13 @@ int main(){ barrelStubWords[i][1] = track.getBarrelStubWord<1>(); barrelStubWords[i][2] = track.getBarrelStubWord<2>(); barrelStubWords[i][3] = track.getBarrelStubWord<3>(); - diskStubWords[i][0] = track.getDiskStubWord<4>(); - diskStubWords[i][1] = track.getDiskStubWord<5>(); - diskStubWords[i][2] = track.getDiskStubWord<6>(); - diskStubWords[i][3] = track.getDiskStubWord<7>(); + barrelStubWords[i][4] = track.getBarrelStubWord<4>(); + barrelStubWords[i][5] = track.getBarrelStubWord<5>(); + diskStubWords[i][0] = track.getDiskStubWord<6>(); + diskStubWords[i][1] = track.getDiskStubWord<7>(); + diskStubWords[i][2] = track.getDiskStubWord<8>(); + diskStubWords[i][3] = track.getDiskStubWord<9>(); + diskStubWords[i][4] = track.getDiskStubWord<10>(); } // Unit under test @@ -95,7 +101,6 @@ int main(){ bool truncation = false; // Filling outputs - unsigned nTracks = 0; for (unsigned short i = 0; i < kMaxTrack; i++){ TrackFitType track; track.setTrackWord(trackWord_o[i]); @@ -103,13 +108,15 @@ int main(){ track.setBarrelStubWord<1>(barrelStubWords_o[i][1]); track.setBarrelStubWord<2>(barrelStubWords_o[i][2]); track.setBarrelStubWord<3>(barrelStubWords_o[i][3]); - track.setDiskStubWord<4>(diskStubWords_o[i][0]); - track.setDiskStubWord<5>(diskStubWords_o[i][1]); - track.setDiskStubWord<6>(diskStubWords_o[i][2]); - track.setDiskStubWord<7>(diskStubWords_o[i][3]); + track.setBarrelStubWord<4>(barrelStubWords_o[i][4]); + track.setBarrelStubWord<5>(barrelStubWords_o[i][5]); + track.setDiskStubWord<6>(diskStubWords_o[i][0]); + track.setDiskStubWord<7>(diskStubWords_o[i][1]); + track.setDiskStubWord<8>(diskStubWords_o[i][2]); + track.setDiskStubWord<9>(diskStubWords_o[i][3]); + track.setDiskStubWord<10>(diskStubWords_o[i][4]); - outputTracks.write_mem(bx, track, nTracks ); - ++nTracks; + outputTracks.write_mem(track); } @@ -122,4 +129,4 @@ int main(){ // if (err_count > 255) err_count = 255; // return err_count; -} \ No newline at end of file +} diff --git a/TrackletAlgorithm/TrackHandler.h b/TrackletAlgorithm/TrackHandler.h index 67bb15f79f7..1a002406d6f 100644 --- a/TrackletAlgorithm/TrackHandler.h +++ b/TrackletAlgorithm/TrackHandler.h @@ -2,8 +2,8 @@ #define TrackletAlgorithm_TrackHandler_h #include "TrackFitMemory.h" #include "hls_stream.h" -const int NBarrelStub = 4; -const int NDiskStub = 4; +const int NBarrelStub = 6; +const int NDiskStub = 5; typedef TrackFit TrackFitType; const unsigned int kFullBarrelStubSize = TrackFitType::kBarrelStubSize * NBarrelStub; const unsigned int kFullDiskStubSize = TrackFitType::kDiskStubSize * NDiskStub; @@ -65,4 +65,4 @@ class TrackHandler { -#endif \ No newline at end of file +#endif diff --git a/emData/generate_TP.py b/emData/generate_TP.py index 9f1e730e03e..6e9fe230fd4 100755 --- a/emData/generate_TP.py +++ b/emData/generate_TP.py @@ -197,19 +197,6 @@ class ProjoutIndexDisk(Enum): asInnerMems[tpName].sort() asOuterMems[tpName].sort() - # TPROJ masks for barrel and disks - tprojMaskBarrel = 0 - for projout in ProjoutIndexBarrel: - projoutName = "TPROJ_" + seed + iTC + "_" + projout.name - projoutIndex = projout.value - if projoutName in tprojMems[tpName]: - tprojMaskBarrel = tprojMaskBarrel | (1 << projoutIndex) - tprojMaskDisk = 0 - for projout in ProjoutIndexDisk: - projoutName = "TPROJ_" + seed + iTC + "_" + projout.name - projoutIndex = projout.value - if projoutName in tprojMems[tpName]: - tprojMaskDisk = tprojMaskDisk | (1 << projoutIndex) # figure out sizes of LUTs by reading .tab files, do once per seed type if seed not in seedlist: LUTSize[seed] = str(sum(1 for _ in open(arguments.LUTsDir+"/TP_{0}.tab".format(seed))) - 2) @@ -219,12 +206,6 @@ class ProjoutIndexDisk(Enum): # Print out parameters for this TP. parametersFile.write( ("\n" - "template<> constexpr uint32_t TPROJMaskBarrel() {\n" - " return 0x%X;\n" - "}\n" - "template<> constexpr uint32_t TPROJMaskDisk() {\n" - " return 0x%X;\n" - "}\n" 'template<> inline const ap_uint<10>* getLUT(){\n' '#ifndef __SYNTHESIS__\n' '#ifdef CMSSW_GIT_HASH\n' @@ -288,7 +269,7 @@ class ProjoutIndexDisk(Enum): 'template<> constexpr int nASMemInner(){\n' ' return ' + str(nASMemInner) + ';\n' '}\n' -)% (tprojMaskBarrel, tprojMaskDisk) +) ) if seed not in seedlist: seedlist.append(seed) From d9748d25d844d8b20278fdbe8f5a2b6824280c3a Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Tue, 10 Dec 2024 15:28:59 -0500 Subject: [PATCH 12/26] Restore TP barrel and disk masks --- emData/generate_TP.py | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/emData/generate_TP.py b/emData/generate_TP.py index 6e9fe230fd4..78e7811bdf7 100755 --- a/emData/generate_TP.py +++ b/emData/generate_TP.py @@ -196,6 +196,21 @@ class ProjoutIndexDisk(Enum): asOuterMask = 0 asInnerMems[tpName].sort() asOuterMems[tpName].sort() + + # TPROJ masks for barrel and disks + tprojMaskBarrel = 0 + tprojMaskDisk = 0 + if tpName in tprojMems : + for projout in ProjoutIndexBarrel: + projoutName = "TPROJ_" + seed + iTC + "_" + projout.name + projoutIndex = projout.value + if projoutName in tprojMems[tpName]: + tprojMaskBarrel = tprojMaskBarrel | (1 << projoutIndex) + for projout in ProjoutIndexDisk: + projoutName = "TPROJ_" + seed + iTC + "_" + projout.name + projoutIndex = projout.value + if projoutName in tprojMems[tpName]: + tprojMaskDisk = tprojMaskDisk | (1 << projoutIndex) # figure out sizes of LUTs by reading .tab files, do once per seed type if seed not in seedlist: @@ -206,6 +221,12 @@ class ProjoutIndexDisk(Enum): # Print out parameters for this TP. parametersFile.write( ("\n" + "template<> constexpr uint32_t TPROJMaskBarrel() {\n" + " return 0x%X;\n" + "}\n" + "template<> constexpr uint32_t TPROJMaskDisk() {\n" + " return 0x%X;\n" + "}\n" 'template<> inline const ap_uint<10>* getLUT(){\n' '#ifndef __SYNTHESIS__\n' '#ifdef CMSSW_GIT_HASH\n' @@ -269,7 +290,7 @@ class ProjoutIndexDisk(Enum): 'template<> constexpr int nASMemInner(){\n' ' return ' + str(nASMemInner) + ';\n' '}\n' -) +)% (tprojMaskBarrel, tprojMaskDisk) ) if seed not in seedlist: seedlist.append(seed) From 72f0091f8d6b4d0fcbb6e7daf0624127d19e3583 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Tue, 10 Dec 2024 16:53:18 -0500 Subject: [PATCH 13/26] Some further code cleanup --- TrackletAlgorithm/MemoryTemplate.h | 117 ++------------------- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 71 +++++-------- TrackletAlgorithm/MemoryTemplateTPROJ.h | 29 +++-- 3 files changed, 47 insertions(+), 170 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index 019fd10dc8b..0634ea8e311 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -57,7 +57,7 @@ class MemoryTemplate unsigned int getDepth() const {return DEPTH_ADDR;} unsigned int getNBX() const {return DEPTH_BX;} - NEntryT getEntries(BunchXingT bx) const { + NEntryT getEntries(const BunchXingT& bx) const { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 return nentries_[bx]; } @@ -68,105 +68,14 @@ class MemoryTemplate const DataType (&get_mem() const)[DEPTH_BX][DEPTH_ADDR] {return dataarray_;} - DataType read_mem(BunchXingT ibx, ap_uint index) const + DataType read_mem(const BunchXingT& ibx, const ap_uint &index) const { // TODO: check if valid - if(!NBIT_BX) ibx = 0; + if(!NBIT_BX) assert(ibx == 0); return dataarray_[ibx][index]; } - /* - template - bool write_mem(SpecType data) - { -#pragma HLS inline - const NEntryT addr_index = -#ifdef __SYNTHESIS__ - 0; -#else - nentries_[write_bx_]; -#endif - return write_mem(data,addr_index); - } - */ - /* - template - bool write_mem(SpecType data, NEntryT addr_index) - { -#pragma HLS inline - if(!NBIT_BX) write_bx_ = 0; - static_assert( - std::is_same::value - || (std::is_same >::value && std::is_same >::value) - || (std::is_same >::value && std::is_same >::value) - , "Invalid conversion between data types"); - DataType sameData(data.raw()); - return write_mem(sameData,addr_index); - } - */ - - /* - bool write_mem(DataType data) - { -#pragma HLS inline - const NEntryT addr_index = -#ifdef __SYNTHESIS__ - 0; -#else - nentries_[write_bx_]; -#endif - return write_mem(data,addr_index); - } - */ - - /* - bool write_mem(DataType data) - { -#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 -#pragma HLS inline - if(!NBIT_BX) write_bx_ = 0; - if (nentries_[write_bx_] < DEPTH_ADDR) { -#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH - //The vhd memory implementation will write to the correct address!! - dataarray_[write_bx_][0] = data; -#else - dataarray_[write_bx_][nentries_[write_bx_]++] = data; -#endif - - //#ifndef __SYNTHESIS__ - //nentries_[write_bx_] = addr_index + 1; - //#endif - - return true; - } else { - return false; - } - } - */ - /* - bool write_mem_new(DataType data, ap_uint<1> overwrite=0) - { -#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 -#pragma HLS inline - if(!NBIT_BX) write_bx_ = 0; - if (nentries_[write_bx_] < DEPTH_ADDR) { -#if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH - //The vhd memory implementation will write to the correct address!! - dataarray_[write_bx_][0] = data; -#else - if(overwrite == 0) { - dataarray_[write_bx_][nentries_[write_bx_]++] = data; - } else { - dataarray_[write_bx_][nentries_[write_bx_]-1] = data; - } -#endif - return true; - } else { - return false; - } - } - */ - bool write_mem(DataType data, ap_uint<1> overwrite=0) + bool write_mem(const DataType& data, ap_uint<1> overwrite=0) { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline @@ -208,18 +117,6 @@ class MemoryTemplate } } } - /* - // write memory from text file - bool write_mem(const char* datastr, int base=16) - { - if(!NBIT_BX) write_bx_ = 0; - DataType data(datastr, base); - NEntryT nent = nentries_[write_bx_]; - bool success = write_mem(data, nent); - - return success; - } - */ bool write_mem(const std::vector& split_line, int base=16) { assert(split_line.size()==3); @@ -229,18 +126,18 @@ class MemoryTemplate } // print memory contents - void print_data(const DataType data) const + void print_data(const DataType& data) const { edm::LogVerbatim("L1trackHLS") << std::hex << data.raw() << std::endl; // TODO: overload '<<' in data class } - void print_entry(BunchXingT bx, NEntryT index) const + void print_entry(const BunchXingT& bx, NEntryT index) const { print_data(dataarray_[bx][index]); } - void print_mem(BunchXingT bx) const + void print_mem(const BunchXingT& bx) const { for (unsigned int i = 0; i < nentries_[bx]; ++i) { edm::LogVerbatim("L1trackHLS") << bx << " " << i << " "; diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index f99f605552d..be067341ba6 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -13,6 +13,10 @@ #endif #endif +#include +#include +#include + //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... #include "SynthesisOptions.h" @@ -82,23 +86,23 @@ class MemoryTemplateBinnedCM{ write_bx_ = ibx; } - NEntryT getEntries(BunchXingT bx, ap_uint slot) const { + NEntryT getEntries(const BunchXingT& bx, ap_uint slot) const { ap_uint ibin; ap_uint ireg; (ireg,ibin)=slot; return nentries_[bx][ibin].range(ireg*4+3,ireg*4); } - ap_uint<64> getEntries(BunchXingT bx, ap_uint ibin) const { + ap_uint<64> getEntries(const BunchXingT& bx, ap_uint ibin) const { return nentries_[bx*(1< getBinMask8(BunchXingT bx, ap_uint ibin) const { + ap_uint<8> getBinMask8(const BunchXingT& bx, ap_uint ibin) const { #pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 return binmask8_[bx][ibin]; } - NEntryT getEntries(BunchXingT bx) const { + NEntryT getEntries(const BunchXingT& bx) const { NEntryT val = 0; for ( auto i = 0; i < getDepth(); ++i ) { val += getEntries(bx, i); @@ -118,22 +122,22 @@ class MemoryTemplateBinnedCM{ } #endif - DataType read_mem(unsigned int icopy, BunchXingT ibx, ap_uint index) const { + DataType read_mem(unsigned int icopy, const BunchXingT& ibx, ap_uint index) const { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 // TODO: check if valid - if (isCMSSW) {ibx = 0; icopy = 0;} + if (isCMSSW) {assert(ibx == 0 && icopy == 0);} return dataarray_[icopy][ibx][index]; } - DataType read_mem(unsigned int icopy, BunchXingT ibx, ap_uint slot, - ap_uint index) const { + DataType read_mem(unsigned int icopy, const BunchXingT& ibx, + ap_uint slot, ap_uint index) const { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 // TODO: check if valid - if (isCMSSW) {ibx = 0; icopy = 0;} + if (isCMSSW) {assert(ibx == 0 && icopy == 0);} return dataarray_[icopy][ibx][getNEntryPerBin()*slot+index]; } - bool write_mem(ap_uint slot, DataType data) { + bool write_mem(ap_uint slot, const DataType& data) { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 #pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 @@ -142,12 +146,11 @@ class MemoryTemplateBinnedCM{ if (isCMSSW && !NBIT_BX) {write_bx_ = 0;} #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH - + //The vhdl implementation will write to the correct address dataarray_[0][write_bx_][getNEntryPerBin()*slot] = data; #else - // write address for slot: getNEntryPerBin() * slot + nentry_ibx ap_uint ibin; ap_uint ireg; @@ -185,17 +188,20 @@ class MemoryTemplateBinnedCM{ DataType data("0",16); for (size_t ibx=0; ibx<(kNBxBins); ++ibx) { - for (size_t icopy=0; icopy < NCP; icopy++) { - for (size_t ibin=0; ibin < kNMemDepth; ibin++) { + for (size_t ibin=0; ibin < (1< index) const + void print_entry(const BunchXingT& bx, ap_uint index) const { print_data(dataarray_[bx][index]); } - //These are broken - comment out for now (ryd, 2024-10-27) - /* - void print_mem(BunchXingT bx) const { - for(unsigned int ibin=0;ibin<8;ibin++) { - for(unsigned int ireg=0;ireg<8;ireg++) { - for (unsigned int i = 0; i < nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); ++i) { - edm::LogVerbatim("L1trackHLS") << bx << " " << i << " "; - print_entry(bx, i + slot*getNEntryPerBin() ); - } - } - } - } - - void print_mem() const { - for (unsigned int ibx = 0; ibx < kNBxBins; ++ibx) { - for (unsigned int i = 0; i < 8; ++i) { - edm::LogVerbatim("L1trackHLS") << ibx << " " << i << " "; - print_entry(ibx,i); - } - } - } - */ - static constexpr int getWidth() {return DataType::getWidth();} #endif diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index f16a9701557..28b8337434d 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -1,17 +1,17 @@ -// Class template for memory module +// Class template for memory module with pages #ifndef TrackletAlgorithm_MemoryTemplateTPROJ_h #define TrackletAlgorithm_MemoryTemplateTPROJ_h #include -#include "../TestBenches/FileReadUtility.h" +#include +#include + //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... #include "SynthesisOptions.h" -template class AllStub; - #ifndef __SYNTHESIS__ #ifdef CMSSW_GIT_HASH #include "FWCore/MessageLogger/interface/MessageLogger.h" @@ -81,13 +81,13 @@ class MemoryTemplateTPROJ write_bx_ = ibx; } - NEntryT getEntries(BunchXingT bx, unsigned int page = 0) const { + NEntryT getEntries(const BunchXingT& bx, unsigned int page = 0) const { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline return nentries_[bx*NPAGE+page]; } - ap_uint getMask(BunchXingT bx) const { + ap_uint getMask(const BunchXingT& bx) const { #pragma HLS ARRAY_PARTITION variable=mask__ complete dim=0 #pragma HLS inline return mask_[bx]; @@ -95,19 +95,17 @@ class MemoryTemplateTPROJ const DataType (&get_mem() const)[DEPTH_BX][(DEPTH_ADDR)*NPAGE] {return dataarray_;} - DataType read_mem(BunchXingT ibx, ap_uint index, unsigned int page = 0) const + DataType read_mem(const BunchXingT& ibx, ap_uint index, unsigned int page = 0) const { - //assert(page < NPAGE); // TODO: check if valid - if(!NBIT_BX) ibx = 0; + if(!NBIT_BX) assert(ibx == 0); return dataarray_[ibx][DEPTH_ADDR*page+index]; } - bool write_mem(DataType data, unsigned int page) + bool write_mem(const DataType& data, unsigned int page) { - //assert(page < NPAGE); #pragma HLS inline - if(!NBIT_BX) write_bx_ = 0; + if(!NBIT_BX) assert(write_bx_ == 0); #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhd memory implementation will write to the correct address!! dataarray_[write_bx_][0] = data; @@ -154,7 +152,6 @@ class MemoryTemplateTPROJ unsigned int page = (int)strtol(split_line.front().c_str(), nullptr, base); // Convert string (in hexadecimal) to int - if(!NBIT_BX) write_bx_ = 0; DataType data(datastr.c_str(), base); bool success = write_mem(data, page); @@ -163,18 +160,18 @@ class MemoryTemplateTPROJ } // print memory contents - void print_data(const DataType data) const + void print_data(const DataType& data) const { edm::LogVerbatim("L1trackHLS") << std::hex << data.raw() << std::endl; // TODO: overload '<<' in data class } - void print_entry(BunchXingT bx, NEntryT index, unsigned int page = 0) const + void print_entry(const BunchXingT& bx, NEntryT index, unsigned int page = 0) const { print_data(dataarray_[bx][DEPTH_ADDR*page+index]); } - void print_mem(BunchXingT bx) const { + void print_mem(const BunchXingT& bx) const { for (unsigned int page = 0; page < NPAGE; ++page) { for (unsigned int i = 0; i < nentries_[bx*NPAGE+page]; ++i) { edm::LogVerbatim("L1trackHLS") << bx << " " << i << " "; From 32c5cb924dca20ff7728ee36f93c440e6e349df4 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Wed, 11 Dec 2024 10:57:51 -0500 Subject: [PATCH 14/26] Adding missing #include and add hack to work around vivado hard crash --- TrackletAlgorithm/MemoryTemplate.h | 1 + TrackletAlgorithm/MemoryTemplateBinnedCM.h | 1 + TrackletAlgorithm/MemoryTemplateTPROJ.h | 2 +- emData/generate_TP.py | 9 +++++++++ 4 files changed, 12 insertions(+), 1 deletion(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index 0634ea8e311..cced8738387 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -5,6 +5,7 @@ #include #include #include +#include //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index be067341ba6..7a021e362c7 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -16,6 +16,7 @@ #include #include #include +#include //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index 28b8337434d..7d78b5f5b92 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -5,7 +5,7 @@ #include #include #include - +#include //This is a bit of a hack, but until we find a cleaner //way to implement this we will use this... diff --git a/emData/generate_TP.py b/emData/generate_TP.py index 78e7811bdf7..f2bf96bfddd 100755 --- a/emData/generate_TP.py +++ b/emData/generate_TP.py @@ -211,6 +211,15 @@ class ProjoutIndexDisk(Enum): projoutIndex = projout.value if projoutName in tprojMems[tpName]: tprojMaskDisk = tprojMaskDisk | (1 << projoutIndex) + else: + #This corresponds to the case where we don't have projections the + #configuration because they are now done in the PC. However, we are + #maintaining the possibility to have projections for compatibility + #with the new emulation code. In any rational world we would set + #these masks below to zero, but this leads to a hard crash in vivado + #documented in email between ryd and ahart on Dec. 10&11 2024. + tprojMaskBarrel = 1 + tprojMaskDisk = 1 # figure out sizes of LUTs by reading .tab files, do once per seed type if seed not in seedlist: From d9fd5c2e93c9924b54b914639133fd45fd690c95 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Thu, 12 Dec 2024 08:02:33 -0500 Subject: [PATCH 15/26] Fixes so that we reach II=1 on test benches - this involved some hacks around HLS limitations --- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 19 ++++++++++++++++++- TrackletAlgorithm/MemoryTemplateTPROJ.h | 5 +++-- 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index 7a021e362c7..e70f19f5a9b 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -75,6 +75,8 @@ class MemoryTemplateBinnedCM{ ap_uint<8> binmask8_[kNBxBins][1< nentries_[slots]; + ap_uint<4> nentriestmp_[1< ibin; ap_uint ireg; (ibin,ireg)=slot; - unsigned int nentry = nentries_[write_bx_*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); + unsigned int nentry = nentriestmp_[slot]; if (nentry == ((1 << (NBIT_ADDR-NBIT_BIN)) - 1)) return false; nentries_[write_bx_*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; + //The next ifdef is a real hack. In order to meet II=1 for test benches + //where we write to a VM memory we don't properly fill the nentries_ + //array. This works because the test benches does not check the nentries_ + //However, in a testbench when we read in a VM memory we need the + //nentries_ to be properly set for use in the TP or MP modules +#if !defined __SYNTHESIS__ if (ibin!=0) { nentries_[write_bx_*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; } +#endif + + nentriestmp_[slot] = nentry+1; + binmask8_[write_bx_][ibin].set_bit(ireg,true); //icopy comparison must be signed int or future SW fails @@ -199,6 +212,10 @@ class MemoryTemplateBinnedCM{ } } + for (size_t ibin=0; ibin < (1< getMask(const BunchXingT& bx) const { -#pragma HLS ARRAY_PARTITION variable=mask__ complete dim=0 #pragma HLS inline return mask_[bx]; } @@ -104,6 +103,8 @@ class MemoryTemplateTPROJ bool write_mem(const DataType& data, unsigned int page) { +#pragma HLS ARRAY_PARTITION variable=mask_ complete dim=0 +#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline if(!NBIT_BX) assert(write_bx_ == 0); #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH @@ -115,7 +116,7 @@ class MemoryTemplateTPROJ return false; } dataarray_[write_bx_][DEPTH_ADDR*page+nentries_[write_bx_*NPAGE+page]++] = data; - mask_[write_bx_].set(page); + mask_[write_bx_].set_bit(page,true); #endif return true; From 509577dd56524e7de933564d0e44a4728c9c23ce Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 14 Dec 2024 07:55:31 -0500 Subject: [PATCH 16/26] First steps towards supporting multiple MPs --- TestBenches/Macros.h | 12 +++++++++ TestBenches/VMStubMERouter_test.cpp | 24 ++++++++++++------ TrackletAlgorithm/Constants.h | 4 +-- TrackletAlgorithm/VMSMERouter.h | 16 ++++++++---- emData/download.sh | 4 +-- emData/generate_MP.py | 10 +++++--- emData/generate_VMSMER.py | 39 +++++++++++++++++++++++------ project/script_MP.tcl | 12 +++++++++ 8 files changed, 93 insertions(+), 28 deletions(-) diff --git a/TestBenches/Macros.h b/TestBenches/Macros.h index 34846729f60..0a1cdda5dd2 100644 --- a/TestBenches/Macros.h +++ b/TestBenches/Macros.h @@ -196,11 +196,15 @@ X(MP_D2PHIC_, "MP_D2PHIC") \ X(MP_D2PHID_, "MP_D2PHID") \ X(MP_D3PHIA_, "MP_D3PHIA") \ X(MP_D3PHIB_, "MP_D3PHIB") \ +X(MP_D3PHIB_E_, "MP_D3PHIB_E") \ X(MP_D3PHIC_, "MP_D3PHIC") \ +X(MP_D3PHIC_E_, "MP_D3PHIC_E") \ X(MP_D3PHID_, "MP_D3PHID") \ X(MP_D4PHIA_, "MP_D4PHIA") \ X(MP_D4PHIB_, "MP_D4PHIB") \ +X(MP_D4PHIB_E_, "MP_D4PHIB_E") \ X(MP_D4PHIC_, "MP_D4PHIC") \ +X(MP_D4PHIC_E_, "MP_D4PHIC_E") \ X(MP_D4PHID_, "MP_D4PHID") \ X(MP_D5PHIA_, "MP_D5PHIA") \ X(MP_D5PHIB_, "MP_D5PHIB") \ @@ -220,19 +224,27 @@ X(MP_L2PHIC_, "MP_L2PHIC") \ X(MP_L2PHID_, "MP_L2PHID") \ X(MP_L3PHIA_, "MP_L3PHIA") \ X(MP_L3PHIB_, "MP_L3PHIB") \ +X(MP_L3PHIB_E_, "MP_L3PHIB_E") \ X(MP_L3PHIC_, "MP_L3PHIC") \ +X(MP_L3PHIC_E_, "MP_L3PHIC_E") \ X(MP_L3PHID_, "MP_L3PHID") \ X(MP_L4PHIA_, "MP_L4PHIA") \ X(MP_L4PHIB_, "MP_L4PHIB") \ +X(MP_L4PHIB_E_, "MP_L4PHIB_E") \ X(MP_L4PHIC_, "MP_L4PHIC") \ +X(MP_L4PHIC_E_, "MP_L4PHIC_E") \ X(MP_L4PHID_, "MP_L4PHID") \ X(MP_L5PHIA_, "MP_L5PHIA") \ X(MP_L5PHIB_, "MP_L5PHIB") \ +X(MP_L5PHIB_E_, "MP_L5PHIB_E") \ X(MP_L5PHIC_, "MP_L5PHIC") \ +X(MP_L5PHIC_E_, "MP_L5PHIC_E") \ X(MP_L5PHID_, "MP_L5PHID") \ X(MP_L6PHIA_, "MP_L6PHIA") \ X(MP_L6PHIB_, "MP_L6PHIB") \ +X(MP_L6PHIB_E_, "MP_L6PHIB_E") \ X(MP_L6PHIC_, "MP_L6PHIC") \ +X(MP_L6PHIC_E_, "MP_L6PHIC_E_") \ X(MP_L6PHID_, "MP_L6PHID") #define X(module, name) module, diff --git a/TestBenches/VMStubMERouter_test.cpp b/TestBenches/VMStubMERouter_test.cpp index a7e768b8d80..8f98990522b 100644 --- a/TestBenches/VMStubMERouter_test.cpp +++ b/TestBenches/VMStubMERouter_test.cpp @@ -45,6 +45,10 @@ int main() { auto &fin_allstubs = tb.files(allStubPattern); auto &fout_vmstubme = tb.files(mePattern); + const auto nMECopies = tb.nFiles(mePattern); + + assert(nMECopies==NOutCopy); + /////////////////////////// // Declare memories @@ -52,8 +56,8 @@ int main() { static AllStubMemory memoriesAS; // Output memories - static VMStubMemory memoryME; - static AllStubMemory memoriesASCopy; + static VMStubMemory memoryME[NOutCopy]; + static AllStubMemory memoriesASCopy[NOutCopy]; /////////////////////////// // Loop over events @@ -67,10 +71,12 @@ int main() { cout << "Event: " << dec << ievt << endl; // Clear output memories - memoryME.clear(); - memoryME.setWriteBX(ievt); - memoriesASCopy.clear(); - memoriesASCopy.setWriteBX(ievt); + for(unsigned int i=0; i>(memoryME, fout_vmstubme[0], ievt, "VMStubME", truncation); + for(unsigned int i=0; i>(memoryME[i], fout_vmstubme[i], ievt, "VMStubME", truncation); + } } // End of event loop diff --git a/TrackletAlgorithm/Constants.h b/TrackletAlgorithm/Constants.h index bb1abc376b8..d98aeb3523d 100644 --- a/TrackletAlgorithm/Constants.h +++ b/TrackletAlgorithm/Constants.h @@ -297,8 +297,8 @@ namespace TF { // List of layer and disk regions constexpr regionType layerDiskRegion[trklet::N_LAYER + trklet::N_DISK] = {BARREL, BARREL, BARREL, BARREL, BARREL, BARREL, DISK, DISK, DISK, DISK, DISK}; - // List of phi regions - enum phiRegion {UNDEF_PHI, A = 0, B = 1, C = 2, D = 3, E = 4, F = 5, G = 6, H = 7, I = 8, J = 9, K = 10, L = 11, M = 12, N = 13, O = 14}; + // List of phi regions //WARNING B_E and C_E should be B and C + 16!!! + enum phiRegion {UNDEF_PHI, A = 0, B = 1, C = 2, D = 3, E = 4, F = 5, G = 6, H = 7, I = 8, J = 9, K = 10, L = 11, M = 12, N = 13, O = 14, B_E = 17, C_E = 18}; } // Layers used for each of the seeds diff --git a/TrackletAlgorithm/VMSMERouter.h b/TrackletAlgorithm/VMSMERouter.h index 151c47e5ae7..16537a692b9 100644 --- a/TrackletAlgorithm/VMSMERouter.h +++ b/TrackletAlgorithm/VMSMERouter.h @@ -150,15 +150,15 @@ inline T createVMStubME(const AllStub& allStub, // Main function // Two input region types InType and DISK2S due to the disks having both 2S and PS inputs. -template +template void VMSMERouter(const BXType bx, BXType& bx_o, // LUTs const int METable[], const int phiCorrTable[], // Input memories AllStub& allStub, - VMStubMemory *memoryME, - AllStubMemory& memoriesAS, + VMStubMemory memoryME[], + AllStubMemory memoriesAS[], // Array to count how many VMStubs written in each slot unsigned int index, bool valid @@ -185,7 +185,10 @@ void VMSMERouter(const BXType bx, BXType& bx_o, // It seems that the if (nAllCopies > 0) should not be needed, // but if nAllCopies is zero it generates an error in vivado_hls if (valid) { - memoriesAS.write_mem(stub_copy); + for (unsigned int i=0; i 0); @@ -209,7 +212,10 @@ void VMSMERouter(const BXType bx, BXType& bx_o, createVMStubME, InType, Layer, Disk>(allStub, index, negDisk, METable, phiCorrTable, slotME); // Write the ME stub - memoryME->write_mem(slotME, stubME); + for (unsigned int i=0; i((kLAYER) ? kLAYER-1 : trklet::N_LAYER+kDISK-1);\n" @@ -90,8 +111,8 @@ def writeTopHeader(vmr, output_dir): " // Input memories\n" " AllStub& allStub,\n" " // Output memories\n" - " VMStubMemory *memoryME,\n" - " AllStubMemory& memoriesAS,\n" + " VMStubMemory memoryME[],\n" + " AllStubMemory memoriesAS[],\n" " // Index of AllStub\n" " unsigned int index,\n" " // Bool if valid stub\n" @@ -130,8 +151,8 @@ def writeTopFile(vmr, output_dir): " // Input memories\n" " AllStub& allStub,\n" " // Output memories\n" - " VMStubMemory *memoryME,\n" - " AllStubMemory& memoriesAS,\n" + " VMStubMemory memoryME[],\n" + " AllStubMemory memoriesAS[],\n" " // Index of AllStub\n" " unsigned int index,\n" " // Bool if valid stub\n" @@ -162,7 +183,7 @@ def writeTopFile(vmr, output_dir): " /////////////////////////\n" " // Main function\n" "\n" - " VMSMERouter%s(\n" %LD +\ + " VMSMERouter%s(\n" %LD +\ " bx, bx_o,\n" " // LUTs\n" " METable,\n" @@ -224,6 +245,8 @@ def writeTopFile(vmr, output_dir): if "VMSMER" not in vmr: raise IndexError("Unit under test has to be a VMSMER.") + nallstubmem = getNAllStubMem(args.wireconfig, vmr) + # Create and write the files - writeTopHeader(vmr, args.outputdir) + writeTopHeader(vmr, nallstubmem, args.outputdir) writeTopFile(vmr, args.outputdir) diff --git a/project/script_MP.tcl b/project/script_MP.tcl index 8536b95bf81..7e3b8bc8cf0 100644 --- a/project/script_MP.tcl +++ b/project/script_MP.tcl @@ -10,24 +10,36 @@ set modules_to_test { {MP_L1PHIB} {MP_L2PHIB} {MP_L3PHIB} + {MP_L3PHIB_E} {MP_L4PHIB} + {MP_L4PHIB_E} {MP_L5PHIB} + {MP_L5PHIB_E} {MP_L6PHIB} + {MP_L6PHIB_E} {MP_D1PHIB} {MP_D2PHIB} {MP_D3PHIB} + {MP_D3PHIB_E} {MP_D4PHIB} + {MP_D4PHIB_E} {MP_D5PHIB} {MP_L1PHIC} {MP_L2PHIC} {MP_L3PHIC} + {MP_L3PHIC_E} {MP_L4PHIC} + {MP_L4PHIC_E} {MP_L5PHIC} + {MP_L5PHIC_E} {MP_L6PHIC} + {MP_L6PHIC_E} {MP_D1PHIC} {MP_D2PHIC} {MP_D3PHIC} + {MP_D3PHIC_E} {MP_D4PHIC} + {MP_D4PHIC_E} {MP_D5PHIC} } From d558427c10cd0eef38968cd01e9c0a45f86caf5f Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sat, 14 Dec 2024 08:01:23 -0500 Subject: [PATCH 17/26] Minor logic fix in string parsing --- emData/project_generation_scripts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/emData/project_generation_scripts b/emData/project_generation_scripts index 5a08387f246..bba0f12e54d 160000 --- a/emData/project_generation_scripts +++ b/emData/project_generation_scripts @@ -1 +1 @@ -Subproject commit 5a08387f246fb11ddbd7845d1601c2596411303b +Subproject commit bba0f12e54d4dc44d258bf6809022d8527dcd939 From bbf51d4d479c0dfd37748a6041f4b0132fe60ba2 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 15 Dec 2024 04:57:39 -0500 Subject: [PATCH 18/26] Generalize the TrackBuilder so that it can handle the duplicate MPs --- TrackletAlgorithm/TrackBuilder.h | 396 +++++++++++++++++++------------ emData/generate_TB.py | 23 +- 2 files changed, 266 insertions(+), 153 deletions(-) diff --git a/TrackletAlgorithm/TrackBuilder.h b/TrackletAlgorithm/TrackBuilder.h index d26947f1e2c..885f33bfba3 100644 --- a/TrackletAlgorithm/TrackBuilder.h +++ b/TrackletAlgorithm/TrackBuilder.h @@ -74,13 +74,13 @@ class Merger { if (!valid_A_) { in_A_ = in_A; valid_A_ = valid_A; - read_A = true; + read_A = valid_A; } if (!valid_B_) { in_B_ = in_B; valid_B_ = valid_B; - read_B = true; + read_B = valid_B; } first_A_ = (valid_A_ && valid_B_ @@ -104,7 +104,9 @@ class Merger { }; // TrackBuilder top template function -template +// NFMPerStubBarrel/Disk uses 3 bits for each layer and disk +// +template void TrackBuilder( const BXType bx, const TrackletParameterMemory1 trackletParameters1[], @@ -121,63 +123,127 @@ void TrackBuilder( ) { - // The ordered merges are currently configured assuming four FM memories per - // layer/disk or potentially eight in the first layer. Other numbers would - // require setting up the code differently. - static_assert(NFMPerStubBarrel0 == 4 - || NFMPerStubBarrel0 == 8 - || NFMPerStubBarrel == 4 - || NFMPerStubDisk == 4, - "Ordered merges require 4 or 8 FM memories per layer/disk."); + constexpr unsigned int mergerDepth = 3; + constexpr unsigned int maxFMLayer = (1<>4)&15, + (NFMPerStubBarrel>>8)&15, + (NFMPerStubBarrel>>12)&15, + (NFMPerStubBarrel>>16)&15, + (NFMPerStubBarrel>>20)&15 + }; + + constexpr unsigned int NFMDisk[NDiskStubs] = { + NFMPerStubDisk&15, + (NFMPerStubDisk>>4)&15, + (NFMPerStubDisk>>8)&15, + (NFMPerStubDisk>>12)&15, + (NFMPerStubDisk>>16)&15}; + + constexpr unsigned int FMBarrelStart[NBarrelStubs] = { + 0, + NFMBarrel[0], + NFMBarrel[0]+NFMBarrel[1], + NFMBarrel[0]+NFMBarrel[1]+NFMBarrel[2], + NFMBarrel[0]+NFMBarrel[1]+NFMBarrel[2]+NFMBarrel[3], + NFMBarrel[0]+NFMBarrel[1]+NFMBarrel[2]+NFMBarrel[3]+NFMBarrel[4]}; + + constexpr unsigned int FMDiskStart[NDiskStubs] = { + 0, + NFMDisk[0], + NFMDisk[0]+NFMDisk[1], + NFMDisk[0]+NFMDisk[1]+NFMDisk[2], + NFMDisk[0]+NFMDisk[1]+NFMDisk[2]+NFMDisk[3]}; + + /* + std::cout << "NFMBarrel:"; + for(unsigned int i=0; i > merger_L_top[NBarrelStubs], // root node - merger_L_b1[NBarrelStubs], merger_L_b2[NBarrelStubs], // first level - merger_L_b1_b1, merger_L_b1_b2, merger_L_b2_b1, merger_L_b2_b2; // second level (only used for the first layer) - + Merger > + merger_L_top[NBarrelStubs], // root node + merger_L_b1[NBarrelStubs], + merger_L_b2[NBarrelStubs], // first level + merger_L_b1_b1[NBarrelStubs], + merger_L_b1_b2[NBarrelStubs], + merger_L_b2_b1[NBarrelStubs], + merger_L_b2_b2[NBarrelStubs]; + + Merger > + merger_D_top[NDiskStubs], // root node + merger_D_b1[NDiskStubs], + merger_D_b2[NDiskStubs], // first level + merger_D_b1_b1[NDiskStubs], + merger_D_b1_b2[NDiskStubs], + merger_D_b2_b1[NDiskStubs], + merger_D_b2_b2[NDiskStubs]; + + // counters for each possible leaf node in the merge tree // (up to eight for stub 0) - int count_L_0[NBarrelStubs], - count_L_1[NBarrelStubs], - count_L_2[NBarrelStubs], - count_L_3[NBarrelStubs], - count_L_4[NBarrelStubs], - count_L_5[NBarrelStubs], - count_L_6[NBarrelStubs], - count_L_7[NBarrelStubs]; + int count_barrel[NBarrelStubs][maxFMLayer]; initialize_barrel_mergers : for (short i = 0; NBarrelStubs > 0 && i < NBarrelStubs; i++) { #pragma HLS unroll merger_L_top[i].reset(); merger_L_b1[i].reset(); merger_L_b2[i].reset(); - count_L_0[i] = count_L_1[i] = count_L_2[i] = count_L_3[i] = count_L_4[i] = count_L_5[i] = count_L_6[i] = count_L_7[i] = 0; + merger_L_b1_b1[i].reset(); + merger_L_b1_b2[i].reset(); + merger_L_b2_b1[i].reset(); + merger_L_b2_b2[i].reset(); + for(unsigned int j=0; j > merger_D_top[NDiskStubs], // root node - merger_D_b1[NDiskStubs], merger_D_b2[NDiskStubs]; // first level - + // counters for each possible leaf node in the merge tree - int count_D_0[NDiskStubs], - count_D_1[NDiskStubs], - count_D_2[NDiskStubs], - count_D_3[NDiskStubs]; + int count_disk[NDiskStubs][maxFMLayer]; initialize_disk_mergers : for (short i = 0; NDiskStubs > 0 && i < NDiskStubs; i++) { #pragma HLS unroll merger_D_top[i].reset(); merger_D_b1[i].reset(); merger_D_b2[i].reset(); - count_D_0[i] = count_D_1[i] = count_D_2[i] = count_D_3[i] = 0; + merger_D_b1_b1[i].reset(); + merger_D_b1_b2[i].reset(); + merger_D_b2_b1[i].reset(); + merger_D_b2_b2[i].reset(); + for(unsigned int j=0; j> kNBits_MemAddr) : TrackletIDType(0); const ITCType &iTC = TCID.range(kNBitsITC - 1, 0); typename TrackFit::TFSEEDTYPE iseed = TCID >> kNBitsITC; //TCID.range(3+kNBitsITC-1,kNBitsITC); + + //These are actually not needed any more... auto mparNPages = getMPARNPages(iTC); auto mparMem = getMPARMem(iTC); auto mparPage = getMPARPage(iTC); //This block is for AAAA + //This should be automatically generate by the generate_TB.py script... if (iseed==0) { if (iTC==0) {mparNPages=3; mparMem=0; mparPage=0;} if (iTC==1) {mparNPages=3; mparMem=0; mparPage=1;} @@ -378,7 +449,8 @@ void TrackBuilder( break; } } - disk_stub_association : for (short j = 0; j < NDiskStubs; j++) { + + disk_stub_association : for (short j = 0; j < NDiskStubs; j++) { const auto &disk_stub = merger_D_top[j].peek(); bool disk_stub_valid = merger_D_top[j].valid() && smallest[j+NBarrelStubs]; @@ -416,7 +488,7 @@ void TrackBuilder( track.template setDiskStub(disk_stub_valid, disk_stub_index, disk_stub_r, disk_phi_res, disk_z_res); track.template setTrackIndex(nTracks); break; - case 5: + case 5: //should never get here? track.template setDiskStub(disk_stub_valid, disk_stub_index, disk_stub_r, disk_phi_res, disk_z_res); track.template setTrackIndex(nTracks); break; @@ -459,6 +531,7 @@ void TrackBuilder( break; } } + disk_stub_words: for (short j = 0 ; NDiskStubs > 0 && j < NDiskStubs; j++) { // Note: need to have NDiskStubs > 0 to prevent compilation error due to -Werror=type-limits flag in CMSSW switch (j) { case 0: @@ -482,6 +555,7 @@ void TrackBuilder( // Do the next set of pairwise comparisons in the merge trees. barrel_merger : for (unsigned short j = 0; j < NBarrelStubs; j++) { +#pragma HLS unroll bool read_1, read_2; @@ -489,96 +563,74 @@ void TrackBuilder( merger_L_b2[j].peek(), merger_L_b2[j].valid(), read_2, smallest[j]); - // We use the second layer of the merge tree only when there are eight FM - // memories per layer, which should only occur for the first layer. - if (NFMPerStubBarrel0 == 8 && j == 0) { - - bool read_b1_1, read_b1_2, read_b2_1, read_b2_2, - read_b1_b1_1, read_b1_b1_2, read_b1_b2_1, read_b1_b2_2, - read_b2_b1_1, read_b2_b1_2, read_b2_b2_1, read_b2_b2_2; - - merger_L_b1[0].next(merger_L_b1_b1.peek(), merger_L_b1_b1.valid(), read_b1_1, - merger_L_b1_b2.peek(), merger_L_b1_b2.valid(), read_b1_2, - read_1); - - merger_L_b1_b1.next(barrelFullMatches[0].read_mem(bx,count_L_0[j]), - count_L_0[j] < barrelFullMatches[0].getEntries(bx), - read_b1_b1_1, - barrelFullMatches[1].read_mem(bx,count_L_1[j]), - count_L_1[j] < barrelFullMatches[1].getEntries(bx), - read_b1_b1_2, - read_b1_1); - - if (read_b1_b1_1) count_L_0[j]++; - if (read_b1_b1_2) count_L_1[j]++; - - merger_L_b1_b2.next(barrelFullMatches[2].read_mem(bx,count_L_2[j]), - count_L_2[j] < barrelFullMatches[2].getEntries(bx), - read_b1_b2_1, - barrelFullMatches[3].read_mem(bx,count_L_3[j]), - count_L_3[j] < barrelFullMatches[3].getEntries(bx), - read_b1_b2_2, - read_b1_2); - - if (read_b1_b2_1) count_L_2[j]++; - if (read_b1_b2_2) count_L_3[j]++; - - merger_L_b2[0].next(merger_L_b2_b1.peek(), merger_L_b2_b1.valid(), read_b2_1, - merger_L_b2_b2.peek(), merger_L_b2_b2.valid(), read_b2_2, - read_2); - - merger_L_b2_b1.next(barrelFullMatches[4].read_mem(bx,count_L_4[j]), - count_L_4[j] < barrelFullMatches[4].getEntries(bx), - read_b2_b1_1, - barrelFullMatches[5].read_mem(bx,count_L_5[j]), - count_L_5[j] < barrelFullMatches[5].getEntries(bx), - read_b2_b1_2, - read_b2_1); - - if (read_b2_b1_1) count_L_4[j]++; - if (read_b2_b1_2) count_L_5[j]++; - - merger_L_b2_b2.next(barrelFullMatches[6].read_mem(bx,count_L_6[j]), - count_L_6[j] < barrelFullMatches[6].getEntries(bx), - read_b2_b2_1, - barrelFullMatches[7].read_mem(bx,count_L_7[j]), - count_L_7[j] < barrelFullMatches[7].getEntries(bx), - read_b2_b2_2, - read_b2_2); - - if (read_b2_b2_1) count_L_6[j]++; - if (read_b2_b2_2) count_L_7[j]++; + bool read_b1_1, read_b1_2, read_b2_1, read_b2_2, + read_b1_b1_1, read_b1_b1_2, read_b1_b2_1, read_b1_b2_2, + read_b2_b1_1, read_b2_b1_2, read_b2_b2_1, read_b2_b2_2; + + merger_L_b1[j].next(merger_L_b1_b1[j].peek(), merger_L_b1_b1[j].valid(), read_b1_1, + merger_L_b1_b2[j].peek(), merger_L_b1_b2[j].valid(), read_b1_2, + read_1); + bool validmatch[maxFMLayer]={false}; + FullMatch fullmatch[maxFMLayer]; + for (unsigned int k=0; k < NFMBarrel[j]; k++) { +#pragma HLS unroll + validmatch[k] = count_barrel[j][k] < barrelFullMatches[k+FMBarrelStart[j]].getEntries(bx); + fullmatch[k] = barrelFullMatches[k+FMBarrelStart[j]].read_mem(bx,count_barrel[j][k]); } - else { - if (NFMPerStubBarrel0 != 8 || i > 0) { - bool read_b1_1, read_b1_2, read_b2_1, read_b2_2; - - merger_L_b1[j].next(barrelFullMatches[NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].read_mem(bx,count_L_0[j]), - count_L_0[j] < barrelFullMatches[NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].getEntries(bx), - read_b1_1, - barrelFullMatches[1+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].read_mem(bx,count_L_1[j]), - count_L_1[j] < barrelFullMatches[1+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].getEntries(bx), - read_b1_2, - read_1); - - if (read_b1_1) count_L_0[j]++; - if (read_b1_2) count_L_1[j]++; - - merger_L_b2[j].next(barrelFullMatches[2+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].read_mem(bx,count_L_2[j]), - count_L_2[j] < barrelFullMatches[2+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].getEntries(bx), - read_b2_1, - barrelFullMatches[3+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].read_mem(bx,count_L_3[j]), - count_L_3[j] < barrelFullMatches[3+NFMPerStubBarrel0-NFMPerStubBarrel+j*NFMPerStubBarrel].getEntries(bx), - read_b2_2, - read_2); - - if (read_b2_1) count_L_2[j]++; - if (read_b2_2) count_L_3[j]++; - } - } + + merger_L_b1_b1[j].next(fullmatch[0], + validmatch[0], + read_b1_b1_1, + fullmatch[1], + validmatch[1], + read_b1_b1_2, + read_b1_1); + + if (read_b1_b1_1) count_barrel[j][0]++; + if (read_b1_b1_2) count_barrel[j][1]++; + + merger_L_b1_b2[j].next(fullmatch[2], + validmatch[2], + read_b1_b2_1, + fullmatch[3], + validmatch[3], + read_b1_b2_2, + read_b1_2); + + if (read_b1_b2_1) count_barrel[j][2]++; + if (read_b1_b2_2) count_barrel[j][3]++; + + merger_L_b2[j].next(merger_L_b2_b1[j].peek(), merger_L_b2_b1[j].valid(), read_b2_1, + merger_L_b2_b2[j].peek(), merger_L_b2_b2[j].valid(), read_b2_2, + read_2); + + merger_L_b2_b1[j].next(fullmatch[4], + validmatch[4], + read_b2_b1_1, + fullmatch[5], + validmatch[5], + read_b2_b1_2, + read_b2_1); + + if (read_b2_b1_1) count_barrel[j][4]++; + if (read_b2_b1_2) count_barrel[j][5]++; + + merger_L_b2_b2[j].next(fullmatch[6], + validmatch[6], + read_b2_b2_1, + fullmatch[7], + validmatch[7], + read_b2_b2_2, + read_b2_2); + + if (read_b2_b2_1) count_barrel[j][6]++; + if (read_b2_b2_2) count_barrel[j][7]++; + } - disk_merger : for (unsigned int j = 0 ; j < NDiskStubs; j++) { + + disk_merger : for (unsigned int j = 0 ; j < NDiskStubs; j++) { +#pragma HLS unroll bool read_1, read_2; @@ -586,32 +638,72 @@ void TrackBuilder( merger_D_b2[j].peek(), merger_D_b2[j].valid(), read_2, smallest[j+NBarrelStubs]); - if (NFMPerStubBarrel0 != 8 || i > 0) { - bool read_b1_1, read_b1_2, read_b2_1, read_b2_2; - - merger_D_b1[j].next(diskFullMatches[0+j*NFMPerStubDisk].read_mem(bx,count_D_0[j]), - count_D_0[j] < diskFullMatches[0+j*NFMPerStubDisk].getEntries(bx), - read_b1_1, - diskFullMatches[1+j*NFMPerStubDisk].read_mem(bx,count_D_1[j]), - count_D_1[j] < diskFullMatches[1+j*NFMPerStubDisk].getEntries(bx), - read_b1_2, - read_1); - - if (read_b1_1) count_D_0[j]++; - if (read_b1_2) count_D_1[j]++; - - merger_D_b2[j].next(diskFullMatches[2+j*NFMPerStubDisk].read_mem(bx,count_D_2[j]), - count_D_2[j] < diskFullMatches[2+j*NFMPerStubDisk].getEntries(bx), - read_b2_1, - diskFullMatches[3+j*NFMPerStubDisk].read_mem(bx,count_D_3[j]), - count_D_3[j] < diskFullMatches[3+j*NFMPerStubDisk].getEntries(bx), - read_b2_2, - read_2); - - if (read_b2_1) count_D_2[j]++; - if (read_b2_2) count_D_3[j]++; + bool read_b1_1, read_b1_2, read_b2_1, read_b2_2, + read_b1_b1_1, read_b1_b1_2, read_b1_b2_1, read_b1_b2_2, + read_b2_b1_1, read_b2_b1_2, read_b2_b2_1, read_b2_b2_2; + + merger_D_b1[j].next(merger_D_b1_b1[j].peek(), merger_D_b1_b1[j].valid(), read_b1_1, + merger_D_b1_b2[j].peek(), merger_D_b1_b2[j].valid(), read_b1_2, + read_1); + + bool validmatch[maxFMLayer]={false}; + FullMatch fullmatch[maxFMLayer]; + for (unsigned int k=0; k 0 else "" nBarrelFMMemPerStub0 = barrelFMs.count(barrelFM0) barrelFMs = [fm for fm in barrelFMs if fm != barrelFM0] @@ -337,7 +358,7 @@ class ITC(Enum): "#pragma HLS stream variable=diskStubWords depth=1 dim=2\n" "#pragma HLS interface register port=done\n" "\n" - "TB_" + seed + ": TrackBuilder(\n" + "TB_" + seed + ": TrackBuilder(\n" " bx,\n" " trackletParameters1,\n" " trackletParameters2,\n" From 3b63fdce32991c43e307a055a0bd9aee7b08fb59 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 15 Dec 2024 09:15:08 -0500 Subject: [PATCH 19/26] Correct mistake in scrpt_MP.tcl --- project/script_MP.tcl | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/project/script_MP.tcl b/project/script_MP.tcl index 7e3b8bc8cf0..2c1fcdfbd0c 100644 --- a/project/script_MP.tcl +++ b/project/script_MP.tcl @@ -60,8 +60,9 @@ add_files -tb ../emData/MP/ foreach i $modules_to_test { set layerDisk [string range $i 3 4] - set iMP [string range $i 8 9] - set top_func [join [list "MatchProcessor_" $layerDisk "PHI" $iMP] ""] + set iMP [string range $i 8 8] + set extra [string range $i 9 10] + set top_func [join [list "MatchProcessor_" $layerDisk "PHI" $iMP $extra] ""] puts [join [list "======== TESTING " $i " ========"] ""] puts [join [list "layerDisk = " $layerDisk] ""] puts [join [list "iMP = " $iMP] ""] From a1a2f81fe6b23e670682c44b910473db36feba33 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Sun, 15 Dec 2024 17:19:02 -0500 Subject: [PATCH 20/26] Add missing return for integration builds --- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 1 + 1 file changed, 1 insertion(+) diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index e70f19f5a9b..8efc7557332 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -151,6 +151,7 @@ class MemoryTemplateBinnedCM{ #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhdl implementation will write to the correct address dataarray_[0][write_bx_][getNEntryPerBin()*slot] = data; + return true; #else From 7622107791caf6aa9f9d47d282cfe5114c141515 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Wed, 18 Dec 2024 01:28:13 -0500 Subject: [PATCH 21/26] Updates to allow the integrated FPGA2 project to build --- .../CombinedConfig_FPGA2/script/Makefile | 2 +- .../CombinedConfig_FPGA2/script/makeProject.tcl | 12 ++++++++++++ TrackletAlgorithm/MemoryTemplate.h | 15 ++++++++++----- TrackletAlgorithm/MemoryTemplateTPROJ.h | 8 ++++++-- emData/generate_VMSMER.py | 8 ++++---- 5 files changed, 33 insertions(+), 12 deletions(-) diff --git a/IntegrationTests/CombinedConfig_FPGA2/script/Makefile b/IntegrationTests/CombinedConfig_FPGA2/script/Makefile index 51a37e1e50d..674b31f8865 100644 --- a/IntegrationTests/CombinedConfig_FPGA2/script/Makefile +++ b/IntegrationTests/CombinedConfig_FPGA2/script/Makefile @@ -3,7 +3,7 @@ FIRMWARE=$(shell git rev-parse --show-toplevel) # MODIFY THESE LINES WHEN COPYING AND PASTING THIS MAKEFILE TOP_FUNCS=$(FIRMWARE)/TopFunctions/CombinedConfig_FPGA2 -MODULES=ProjectionCalculator_L1L2ABC ProjectionCalculator_L1L2DE ProjectionCalculator_L1L2F ProjectionCalculator_L1L2G ProjectionCalculator_L1L2HI ProjectionCalculator_L1L2JKL ProjectionCalculator_L2L3ABCD ProjectionCalculator_L3L4AB ProjectionCalculator_L3L4CD ProjectionCalculator_L5L6ABCD ProjectionCalculator_D1D2ABCD ProjectionCalculator_D3D4ABCD ProjectionCalculator_L1D1ABCD ProjectionCalculator_L1D1EFGH ProjectionCalculator_L2D1ABCD MatchProcessor_L1PHIA MatchProcessor_L1PHIB MatchProcessor_L1PHIC MatchProcessor_L1PHID MatchProcessor_L1PHIE MatchProcessor_L1PHIF MatchProcessor_L1PHIG MatchProcessor_L1PHIH MatchProcessor_L2PHIA MatchProcessor_L2PHIB MatchProcessor_L2PHIC MatchProcessor_L2PHID MatchProcessor_L3PHIA MatchProcessor_L3PHIB MatchProcessor_L3PHIC MatchProcessor_L3PHID MatchProcessor_L4PHIA MatchProcessor_L4PHIB MatchProcessor_L4PHIC MatchProcessor_L4PHID MatchProcessor_L5PHIA MatchProcessor_L5PHIB MatchProcessor_L5PHIC MatchProcessor_L5PHID MatchProcessor_L6PHIA MatchProcessor_L6PHIB MatchProcessor_L6PHIC MatchProcessor_L6PHID MatchProcessor_D1PHIA MatchProcessor_D1PHIB MatchProcessor_D1PHIC MatchProcessor_D1PHID MatchProcessor_D2PHIA MatchProcessor_D2PHIB MatchProcessor_D2PHIC MatchProcessor_D2PHID MatchProcessor_D3PHIA MatchProcessor_D3PHIB MatchProcessor_D3PHIC MatchProcessor_D3PHID MatchProcessor_D4PHIA MatchProcessor_D4PHIB MatchProcessor_D4PHIC MatchProcessor_D4PHID MatchProcessor_D5PHIA MatchProcessor_D5PHIB MatchProcessor_D5PHIC MatchProcessor_D5PHID TrackBuilder_AAAA TrackBuilder_BBBB VMStubMERouterTop_L1PHIA VMStubMERouterTop_L1PHIB VMStubMERouterTop_L1PHIC VMStubMERouterTop_L1PHID VMStubMERouterTop_L1PHIE VMStubMERouterTop_L1PHIF VMStubMERouterTop_L1PHIG VMStubMERouterTop_L1PHIH VMStubMERouterTop_L2PHIA VMStubMERouterTop_L2PHIB VMStubMERouterTop_L2PHIC VMStubMERouterTop_L2PHID VMStubMERouterTop_L3PHIA VMStubMERouterTop_L3PHIB VMStubMERouterTop_L3PHIC VMStubMERouterTop_L3PHID VMStubMERouterTop_L4PHIA VMStubMERouterTop_L4PHIB VMStubMERouterTop_L4PHIC VMStubMERouterTop_L4PHID VMStubMERouterTop_L5PHIA VMStubMERouterTop_L5PHIB VMStubMERouterTop_L5PHIC VMStubMERouterTop_L5PHID VMStubMERouterTop_L6PHIA VMStubMERouterTop_L6PHIB VMStubMERouterTop_L6PHIC VMStubMERouterTop_L6PHID VMStubMERouterTop_D1PHIA VMStubMERouterTop_D1PHIB VMStubMERouterTop_D1PHIC VMStubMERouterTop_D1PHID VMStubMERouterTop_D2PHIA VMStubMERouterTop_D2PHIB VMStubMERouterTop_D2PHIC VMStubMERouterTop_D2PHID VMStubMERouterTop_D3PHIA VMStubMERouterTop_D3PHIB VMStubMERouterTop_D3PHIC VMStubMERouterTop_D3PHID VMStubMERouterTop_D4PHIA VMStubMERouterTop_D4PHIB VMStubMERouterTop_D4PHIC VMStubMERouterTop_D4PHID VMStubMERouterTop_D5PHIA VMStubMERouterTop_D5PHIB VMStubMERouterTop_D5PHIC VMStubMERouterTop_D5PHID +MODULES=ProjectionCalculator_L1L2ABC ProjectionCalculator_L1L2DE ProjectionCalculator_L1L2F ProjectionCalculator_L1L2G ProjectionCalculator_L1L2HI ProjectionCalculator_L1L2JKL ProjectionCalculator_L2L3ABCD ProjectionCalculator_L3L4AB ProjectionCalculator_L3L4CD ProjectionCalculator_L5L6ABCD ProjectionCalculator_D1D2ABCD ProjectionCalculator_D3D4ABCD ProjectionCalculator_L1D1ABCD ProjectionCalculator_L1D1EFGH ProjectionCalculator_L2D1ABCD MatchProcessor_L3PHIB_E MatchProcessor_L3PHIC_E MatchProcessor_L4PHIB_E MatchProcessor_L4PHIC_E MatchProcessor_L5PHIB_E MatchProcessor_L5PHIC_E MatchProcessor_L6PHIB_E MatchProcessor_L6PHIC_E MatchProcessor_D3PHIB_E MatchProcessor_D3PHIC_E MatchProcessor_D4PHIB_E MatchProcessor_D4PHIC_E MatchProcessor_L1PHIA MatchProcessor_L1PHIB MatchProcessor_L1PHIC MatchProcessor_L1PHID MatchProcessor_L1PHIE MatchProcessor_L1PHIF MatchProcessor_L1PHIG MatchProcessor_L1PHIH MatchProcessor_L2PHIA MatchProcessor_L2PHIB MatchProcessor_L2PHIC MatchProcessor_L2PHID MatchProcessor_L3PHIA MatchProcessor_L3PHIB MatchProcessor_L3PHIC MatchProcessor_L3PHID MatchProcessor_L4PHIA MatchProcessor_L4PHIB MatchProcessor_L4PHIC MatchProcessor_L4PHID MatchProcessor_L5PHIA MatchProcessor_L5PHIB MatchProcessor_L5PHIC MatchProcessor_L5PHID MatchProcessor_L6PHIA MatchProcessor_L6PHIB MatchProcessor_L6PHIC MatchProcessor_L6PHID MatchProcessor_D1PHIA MatchProcessor_D1PHIB MatchProcessor_D1PHIC MatchProcessor_D1PHID MatchProcessor_D2PHIA MatchProcessor_D2PHIB MatchProcessor_D2PHIC MatchProcessor_D2PHID MatchProcessor_D3PHIA MatchProcessor_D3PHIB MatchProcessor_D3PHIC MatchProcessor_D3PHID MatchProcessor_D4PHIA MatchProcessor_D4PHIB MatchProcessor_D4PHIC MatchProcessor_D4PHID MatchProcessor_D5PHIA MatchProcessor_D5PHIB MatchProcessor_D5PHIC MatchProcessor_D5PHID TrackBuilder_AAAA TrackBuilder_BBBB VMStubMERouterTop_L1PHIA VMStubMERouterTop_L1PHIB VMStubMERouterTop_L1PHIC VMStubMERouterTop_L1PHID VMStubMERouterTop_L1PHIE VMStubMERouterTop_L1PHIF VMStubMERouterTop_L1PHIG VMStubMERouterTop_L1PHIH VMStubMERouterTop_L2PHIA VMStubMERouterTop_L2PHIB VMStubMERouterTop_L2PHIC VMStubMERouterTop_L2PHID VMStubMERouterTop_L3PHIA VMStubMERouterTop_L3PHIB VMStubMERouterTop_L3PHIC VMStubMERouterTop_L3PHID VMStubMERouterTop_L4PHIA VMStubMERouterTop_L4PHIB VMStubMERouterTop_L4PHIC VMStubMERouterTop_L4PHID VMStubMERouterTop_L5PHIA VMStubMERouterTop_L5PHIB VMStubMERouterTop_L5PHIC VMStubMERouterTop_L5PHID VMStubMERouterTop_L6PHIA VMStubMERouterTop_L6PHIB VMStubMERouterTop_L6PHIC VMStubMERouterTop_L6PHID VMStubMERouterTop_D1PHIA VMStubMERouterTop_D1PHIB VMStubMERouterTop_D1PHIC VMStubMERouterTop_D1PHID VMStubMERouterTop_D2PHIA VMStubMERouterTop_D2PHIB VMStubMERouterTop_D2PHIC VMStubMERouterTop_D2PHID VMStubMERouterTop_D3PHIA VMStubMERouterTop_D3PHIB VMStubMERouterTop_D3PHIC VMStubMERouterTop_D3PHID VMStubMERouterTop_D4PHIA VMStubMERouterTop_D4PHIB VMStubMERouterTop_D4PHIC VMStubMERouterTop_D4PHID VMStubMERouterTop_D5PHIA VMStubMERouterTop_D5PHIB VMStubMERouterTop_D5PHIC VMStubMERouterTop_D5PHID # Include rules for making the project. diff --git a/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl b/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl index 0e7c217c1ac..cb43115a3ad 100644 --- a/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl +++ b/IntegrationTests/CombinedConfig_FPGA2/script/makeProject.tcl @@ -124,6 +124,18 @@ create_ip -name MatchProcessor_D5PHIA -module_name MP_D5PHIA -vendor xilinx.com create_ip -name MatchProcessor_D5PHIB -module_name MP_D5PHIB -vendor xilinx.com -library hls -version 1.0 create_ip -name MatchProcessor_D5PHIC -module_name MP_D5PHIC -vendor xilinx.com -library hls -version 1.0 create_ip -name MatchProcessor_D5PHID -module_name MP_D5PHID -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L3PHIB_E -module_name MP_L3PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L3PHIC_E -module_name MP_L3PHIC_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L4PHIB_E -module_name MP_L4PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L4PHIC_E -module_name MP_L4PHIC_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L5PHIB_E -module_name MP_L5PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L5PHIC_E -module_name MP_L5PHIC_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L6PHIB_E -module_name MP_L6PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_L6PHIC_E -module_name MP_L6PHIC_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_D3PHIB_E -module_name MP_D3PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_D3PHIC_E -module_name MP_D3PHIC_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_D4PHIB_E -module_name MP_D4PHIB_E -vendor xilinx.com -library hls -version 1.0 +create_ip -name MatchProcessor_D4PHIC_E -module_name MP_D4PHIC_E -vendor xilinx.com -library hls -version 1.0 create_ip -name TrackBuilder_AAAA -module_name TB_AAAA -vendor xilinx.com -library hls -version 1.0 create_ip -name TrackBuilder_BBBB -module_name TB_BBBB -vendor xilinx.com -library hls -version 1.0 diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index cced8738387..dd99dc27349 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -51,7 +51,9 @@ class MemoryTemplate DataType dataarray_[DEPTH_BX][DEPTH_ADDR]; // data array NEntryT nentries_[DEPTH_BX]; // number of entries +#if !(defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH) BunchXingT write_bx_; //BX for writing +#endif public: @@ -63,9 +65,11 @@ class MemoryTemplate return nentries_[bx]; } +#if !(defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH) void setWriteBX(const BunchXingT& ibx) { write_bx_ = ibx; } +#endif const DataType (&get_mem() const)[DEPTH_BX][DEPTH_ADDR] {return dataarray_;} @@ -78,24 +82,25 @@ class MemoryTemplate bool write_mem(const DataType& data, ap_uint<1> overwrite=0) { -#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if(!NBIT_BX) write_bx_ = 0; - if (nentries_[write_bx_] < DEPTH_ADDR) { #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhd memory implementation will write to the correct address!! - dataarray_[write_bx_][0] = data; + dataarray_[0][0] = data; + return true; #else +#pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 + if(!NBIT_BX) write_bx_ = 0; + if (nentries_[write_bx_] < DEPTH_ADDR) { if(overwrite == 0) { dataarray_[write_bx_][nentries_[write_bx_]++] = data; } else { dataarray_[write_bx_][nentries_[write_bx_]-1] = data; } -#endif return true; } else { return false; } +#endif } // Methods for C simulation only diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index 66f60f0e1de..8764b213172 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -69,7 +69,9 @@ class MemoryTemplateTPROJ DataType dataarray_[DEPTH_BX][NPAGE*DEPTH_ADDR]; // data array NEntryT nentries_[DEPTH_BX*NPAGE]; // number of entries ap_uint mask_[DEPTH_BX]; //bitmask for hits +#if !(defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH) BunchXingT write_bx_; //BX for writing +#endif public: @@ -77,9 +79,11 @@ class MemoryTemplateTPROJ unsigned int getNBX() const {return DEPTH_BX;} unsigned int getNPage() const {return NPAGE;} +#if !(defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH) void setWriteBX(const BunchXingT& ibx) { write_bx_ = ibx; } +#endif NEntryT getEntries(const BunchXingT& bx, unsigned int page = 0) const { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 @@ -106,11 +110,11 @@ class MemoryTemplateTPROJ #pragma HLS ARRAY_PARTITION variable=mask_ complete dim=0 #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if(!NBIT_BX) assert(write_bx_ == 0); #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhd memory implementation will write to the correct address!! - dataarray_[write_bx_][0] = data; + dataarray_[0][0] = data; #else + if(!NBIT_BX) assert(write_bx_ == 0); //NBIT_BX==1 is to identify the projection memories if (NBIT_BX==1 && nentries_[write_bx_*NPAGE+page]>=MAX_TPROJ_PAGE_SIZE) { return false; diff --git a/emData/generate_VMSMER.py b/emData/generate_VMSMER.py index 31a192da1b9..4a5e2a8234f 100755 --- a/emData/generate_VMSMER.py +++ b/emData/generate_VMSMER.py @@ -111,8 +111,8 @@ def writeTopHeader(vmr, noutcopy, output_dir): " // Input memories\n" " AllStub& allStub,\n" " // Output memories\n" - " VMStubMemory memoryME[],\n" - " AllStubMemory memoriesAS[],\n" + " VMStubMemory memoryME[NOutCopy],\n" + " AllStubMemory memoriesAS[NOutCopy],\n" " // Index of AllStub\n" " unsigned int index,\n" " // Bool if valid stub\n" @@ -151,8 +151,8 @@ def writeTopFile(vmr, output_dir): " // Input memories\n" " AllStub& allStub,\n" " // Output memories\n" - " VMStubMemory memoryME[],\n" - " AllStubMemory memoriesAS[],\n" + " VMStubMemory memoryME[NOutCopy],\n" + " AllStubMemory memoriesAS[NOutCopy],\n" " // Index of AllStub\n" " unsigned int index,\n" " // Bool if valid stub\n" From fb8dc5531def227bbfbf001cb6652392d9a3d780 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Wed, 18 Dec 2024 01:36:31 -0500 Subject: [PATCH 22/26] Cleanup printout when running download.sh --- emData/download.sh | 58 +++++++++++++++++++++++-------------------- emData/generate_MP.py | 2 -- emData/generate_PC.py | 2 -- 3 files changed, 31 insertions(+), 31 deletions(-) diff --git a/emData/download.sh b/emData/download.sh index cb01b0b7877..c2bea4a359a 100755 --- a/emData/download.sh +++ b/emData/download.sh @@ -252,33 +252,37 @@ cd ../ if [[ $tables_only == 0 ]] then - echo "Getting MemPrints tar balls" - # Get memory test data: download and unpack the tarball. - wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_split} - tar -xzmf MemPrints.tgz - mv MemPrints MemPrintsSplit - rm -f MemPrints.tgz - - wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_reducedcm} - tar -xzmf MemPrints.tgz - mv MemPrints MemPrintsReducedCM - rm -f MemPrints.tgz - - wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cm2} - tar -xzmf MemPrints.tgz - mv MemPrints MemPrintsReducedCM2 - - wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cmbarrel} - tar -xzmf MemPrints.tgz - mv MemPrints MemPrintsCMBarrel - rm -f MemPrints.tgz - - wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cm} - tar -xzmf MemPrints.tgz - mv MemPrints MemPrintsCM - rm -f MemPrints.tgz - - echo "Done getting MemPrints tar balls" + # Get memory test data: download and unpack the tarball. + echo "Getting MemPrints tar balls Split" + wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_split} + tar -xzmf MemPrints.tgz + mv MemPrints MemPrintsSplit + rm -f MemPrints.tgz + + echo "Getting MemPrints tar balls Reduced CM" + wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_reducedcm} + tar -xzmf MemPrints.tgz + mv MemPrints MemPrintsReducedCM + rm -f MemPrints.tgz + + echo "Getting MemPrints tar balls Reduced CM2" + wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cm2} + tar -xzmf MemPrints.tgz + mv MemPrints MemPrintsReducedCM2 + + echo "Getting MemPrints tar balls Reduced CM Barrel" + wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cmbarrel} + tar -xzmf MemPrints.tgz + mv MemPrints MemPrintsCMBarrel + rm -f MemPrints.tgz + + echo "Getting MemPrints tar balls Reduced CM" + wget --no-check-certificate -O MemPrints.tgz --quiet ${memprints_url_cm} + tar -xzmf MemPrints.tgz + mv MemPrints MemPrintsCM + rm -f MemPrints.tgz + + echo "Done getting MemPrints tar balls" fi diff --git a/emData/generate_MP.py b/emData/generate_MP.py index 886ce589b8d..f52ad25f2af 100755 --- a/emData/generate_MP.py +++ b/emData/generate_MP.py @@ -161,12 +161,10 @@ def FMRegion(region): NPageSum = 0 index = 0 for TPROJ in TPMems[mpName]: - print(mpName, TPROJ) npage = len(TPROJ)-17 if TPROJ.endswith("_E"): npage = len(TPROJ)-19 NPageSum += npage - print("TPROJ npage", TPROJ, npage) NPage = NPage | ((npage-1) << (2*index)) index+=1 diff --git a/emData/generate_PC.py b/emData/generate_PC.py index 882f16eeead..36bbb220956 100755 --- a/emData/generate_PC.py +++ b/emData/generate_PC.py @@ -144,10 +144,8 @@ ) # Calculate parameters and print out parameters and top function for each TP. for pcName in sorted(tprojMems): - print(pcName,tprojMems[pcName]) seed = pcName[0:4] iTC = pcName[4:] - print("pcName:", pcName, seed, iTC) # # numbers of memories # nASMemInner = len(asInnerMems[pcName]) # nASMemOuter = len(asOuterMems[pcName]) From 3aa8e717beda6ecd7ecaa4f5e18c77292acb5714 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Wed, 18 Dec 2024 08:04:07 -0500 Subject: [PATCH 23/26] Correct typo --- TestBenches/Macros.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TestBenches/Macros.h b/TestBenches/Macros.h index 0a1cdda5dd2..fe9cfc69c84 100644 --- a/TestBenches/Macros.h +++ b/TestBenches/Macros.h @@ -244,7 +244,7 @@ X(MP_L6PHIA_, "MP_L6PHIA") \ X(MP_L6PHIB_, "MP_L6PHIB") \ X(MP_L6PHIB_E_, "MP_L6PHIB_E") \ X(MP_L6PHIC_, "MP_L6PHIC") \ -X(MP_L6PHIC_E_, "MP_L6PHIC_E_") \ +X(MP_L6PHIC_E_, "MP_L6PHIC_E") \ X(MP_L6PHID_, "MP_L6PHID") #define X(module, name) module, From 2b66bf026783095c77ca7f4054ec942ac38d4f6a Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Thu, 19 Dec 2024 16:01:26 -0500 Subject: [PATCH 24/26] Fix missing pragma for building integrated project --- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 11 ++++++++--- TrackletAlgorithm/VMSMERouter.h | 2 ++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index 8efc7557332..26fdd4e2c08 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -70,12 +70,14 @@ class MemoryTemplateBinnedCM{ }; DataType dataarray_[NCP][kNBxBins][kNMemDepth]; // data array - BunchXingT write_bx_; //BX for writing ap_uint<8> binmask8_[kNBxBins][1< nentries_[slots]; +#if !(defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH) ap_uint<4> nentriestmp_[1< slot) const { ap_uint ibin; @@ -146,17 +150,18 @@ class MemoryTemplateBinnedCM{ #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline - if (isCMSSW && !NBIT_BX) {write_bx_ = 0;} #if defined __SYNTHESIS__ && !defined SYNTHESIS_TEST_BENCH //The vhdl implementation will write to the correct address - dataarray_[0][write_bx_][getNEntryPerBin()*slot] = data; + dataarray_[0][0][getNEntryPerBin()*slot] = data; return true; #else #pragma HLS ARRAY_PARTITION variable=nentriestmp_ complete dim=0 + if (isCMSSW && !NBIT_BX) {write_bx_ = 0;} + ap_uint ibin; ap_uint ireg; (ibin,ireg)=slot; diff --git a/TrackletAlgorithm/VMSMERouter.h b/TrackletAlgorithm/VMSMERouter.h index 16537a692b9..dbb73d2a31d 100644 --- a/TrackletAlgorithm/VMSMERouter.h +++ b/TrackletAlgorithm/VMSMERouter.h @@ -165,6 +165,8 @@ void VMSMERouter(const BXType bx, BXType& bx_o, ) { #pragma HLS inline +#pragma HLS array_partition variable=memoryME complete dim=1 +#pragma HLS array_partition variable=memoriesAS complete dim=1 bool disk2S = false; // Used to determine if DISK2S From 9cdc7abfcf541d1a4d4a8f6d13d48ccb50f6ccad Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Thu, 19 Dec 2024 17:27:52 -0500 Subject: [PATCH 25/26] Updated to fix problem with integrated project --- TrackletAlgorithm/MemoryTemplateTPROJ.h | 1 + 1 file changed, 1 insertion(+) diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index 8764b213172..154446802c2 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -92,6 +92,7 @@ class MemoryTemplateTPROJ } ap_uint getMask(const BunchXingT& bx) const { +#pragma HLS ARRAY_PARTITION variable=mask_ complete dim=0 #pragma HLS inline return mask_[bx]; } From 54688a11463387b78c81bfde26a44d88bc942bf0 Mon Sep 17 00:00:00 2001 From: Anders Ryd Date: Fri, 10 Jan 2025 08:49:35 -0500 Subject: [PATCH 26/26] Update to use new test vectors from 14_2_0_pre4 --- emData/download.sh | 6 ++++-- project/script_MP.tcl | 27 +++++++++++++++------------ 2 files changed, 19 insertions(+), 14 deletions(-) diff --git a/emData/download.sh b/emData/download.sh index c2bea4a359a..13d7e3cf92c 100755 --- a/emData/download.sh +++ b/emData/download.sh @@ -6,8 +6,10 @@ set -e memprints_url_cm="https://cernbox.cern.ch/remote.php/dav/public-files/P2URd03nlGDfpDt/MemPrints.tar.gz" luts_url_cm="https://ahart.web.cern.ch/ahart/tf/test_vectors/LUTs_Combined_231208.tgz" # Split modules - i.e. with PC and VMSMER -memprints_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/OQ2KBOdsn9McbGq/MemPrints_Split_241213.tgz" -luts_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/Y86N9sy98BsBRJe/LUTs_Split_241213.tgz" +memprints_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/eDZdLpG02odPlzS/MemPrints_Split_250110.tgz" +luts_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/0VlJN4Qro7OL4Y2/LUTs_Split_250110.tgz" +#memprints_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/OQ2KBOdsn9McbGq/MemPrints_Split_241213.tgz" +#luts_url_split="https://cernbox.cern.ch/remote.php/dav/public-files/Y86N9sy98BsBRJe/LUTs_Split_241213.tgz" # Reduced Combined modules memprints_url_reducedcm="https://cernbox.cern.ch/remote.php/dav/public-files/kv2U49bw93chvZG/MemPrints_CMReduced_040424.tar.gz" luts_url_reducedcm="https://ahart.web.cern.ch/ahart/tf/test_vectors/LUTs_CMReduced_240121.tgz" diff --git a/project/script_MP.tcl b/project/script_MP.tcl index 2c1fcdfbd0c..f2039a60b41 100644 --- a/project/script_MP.tcl +++ b/project/script_MP.tcl @@ -10,39 +10,42 @@ set modules_to_test { {MP_L1PHIB} {MP_L2PHIB} {MP_L3PHIB} - {MP_L3PHIB_E} {MP_L4PHIB} - {MP_L4PHIB_E} {MP_L5PHIB} - {MP_L5PHIB_E} {MP_L6PHIB} - {MP_L6PHIB_E} {MP_D1PHIB} {MP_D2PHIB} {MP_D3PHIB} - {MP_D3PHIB_E} {MP_D4PHIB} - {MP_D4PHIB_E} {MP_D5PHIB} {MP_L1PHIC} {MP_L2PHIC} {MP_L3PHIC} - {MP_L3PHIC_E} {MP_L4PHIC} - {MP_L4PHIC_E} {MP_L5PHIC} - {MP_L5PHIC_E} {MP_L6PHIC} - {MP_L6PHIC_E} {MP_D1PHIC} {MP_D2PHIC} {MP_D3PHIC} - {MP_D3PHIC_E} {MP_D4PHIC} - {MP_D4PHIC_E} {MP_D5PHIC} } +#Add these if using extra MPs +# {MP_L3PHIB_E} +# {MP_L4PHIB_E} +# {MP_L5PHIB_E} +# {MP_L6PHIB_E} +# {MP_D3PHIB_E} +# {MP_D4PHIB_E} +# {MP_L3PHIC_E} +# {MP_L4PHIC_E} +# {MP_L5PHIC_E} +# {MP_L6PHIC_E} +# {MP_D3PHIC_E} +# {MP_D4PHIC_E} + + # module_to_export must correspond to the default macros set at the top of the # test bench; otherwise, the C/RTL cosimulation will fail set module_to_export MP_D1PHIC