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Incorrect access details for fcvtn2 #2588

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Rot127 opened this issue Dec 18, 2024 · 0 comments
Open

Incorrect access details for fcvtn2 #2588

Rot127 opened this issue Dec 18, 2024 · 0 comments
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AArch64 Arch bug Something is not working as it should
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@Rot127
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Rot127 commented Dec 18, 2024

Work environment

Questions Answers
OS/arch/bits .
Architecture AArch64
Source of Capstone .
Version/git commit next

Instruction bytes giving faulty results

 0  01 68 61 4e  fcvtn2	v1.4s, v0.2d
	ID: 367 (fcvtn2)
	op_count: 2
		operands[0].type: REG = q1 (vreg)
		operands[0].access: READ | WRITE
			Vector Arrangement Specifier: 0x420
		operands[1].type: REG = q0 (vreg)
		operands[1].access: READ
			Vector Arrangement Specifier: 0x240
	Write-back: True
	Registers read: fpcr q1 q0
	Registers modified: q1
	Groups: HasNEON

operands[0] should be WRITE only. More variants of this instruction may be effected, I just haven't verified this:

Expected results

 0  01 68 61 4e  fcvtn2	v1.4s, v0.2d
	ID: 367 (fcvtn2)
	op_count: 2
		operands[0].type: REG = q1 (vreg)
		operands[0].access: WRITE
			Vector Arrangement Specifier: 0x420
		operands[1].type: REG = q0 (vreg)
		operands[1].access: READ
			Vector Arrangement Specifier: 0x240
	Write-back: True
	Registers read: fpcr q1 q0
	Registers modified: q1
	Groups: HasNEON

Steps to get the wrong result

cstool

Additional Logs, screenshots, source code, configuration dump, ...

Transferred from #2472
Mentioned in https://github.com/capstone-engine/capstone/blob/next/docs/cs_v6_release_guide.md#known-bugs-in-the-alpha

@Rot127 Rot127 added bug Something is not working as it should AArch64 Arch labels Dec 18, 2024
@Rot127 Rot127 added this to the v6 - Beta milestone Dec 18, 2024
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