diff --git a/doc/source/API/Application.rst b/doc/source/API/Application.rst index 7d838212d35..bb367ab2eed 100644 --- a/doc/source/API/Application.rst +++ b/doc/source/API/Application.rst @@ -27,7 +27,6 @@ Available PyAEDT apps are: ansys.aedt.core.maxwellcircuit.MaxwellCircuit ansys.aedt.core.emit.Emit ansys.aedt.core.twinbuilder.TwinBuilder - ansys.aedt.core.filtersolutions.FilterSolutions All other classes and methods are inherited into the app class. AEDT, which is also referred to as the desktop app, is implicitly launched in any PyAEDT app. diff --git a/doc/source/API/FilterSolutions.rst b/doc/source/API/FilterSolutions.rst index 56a3b0e397f..bdf0b2c6ea6 100644 --- a/doc/source/API/FilterSolutions.rst +++ b/doc/source/API/FilterSolutions.rst @@ -1,22 +1,20 @@ Filter design -========================== -The ``FilterSolutions`` module contains all classes needed to create and edit an object including. +==================== +This section lists classes for creating and modifying ``FilterSolutions`` parameters. -* ``Attributes`` to defines attributes and parameters of filters. -* ``DllInterface`` to interface with the FilterSolutions DLL. -* ``GraphSetup`` to define the frequency and time limits of the exported responses. -* ``IdealResponse`` to return the data for available ideal filter responses. -* ``MultipleBandsTable`` to manipulate access to the entries of multiple bands table. -* ``TransmissionZeros`` to manipulates access to ratio and bandwidth entries in the transmission zeros table. -* ``LumpedTopology`` to define attributes and parameters of filters implemented with lumped topology. -* ``LumpedParasitics`` to define attributes of the lumped element parasitic values. -* ``LumpedNodesandLeads`` to define attributes of the lumped node capacitors and lead inductors. -* ``LumpedTerminationImpedance`` to manipulate access to the entries of source and load complex impedance table. -* ``ExportToAedt`` to define attributes and parameters of the export page for exporting to AEDT. -* ``OptimizationGoalsTable`` to manipulate access to the entries of the optimization goals table. - +Base filter design +~~~~~~~~~~~~~~~~~~~ +The ``FilterDesignBase`` module provides all the essential classes for creating and modifying the primary parameters applicable to all design types. +* ``Attributes`` to defines attributes and parameters of filters. +* ``DllInterface`` to establish an interface with the FilterSolutions DLL. +* ``GraphSetup`` to define the frequency and time graph parameters of the exported responses. +* ``IdealResponse`` to return the data for the available ideal filter responses. +* ``MultipleBandsTable`` to manage access to the entries of multiple bands table. +* ``TransmissionZeros`` to manage access to ratio and bandwidth entries in the transmission zeros table. +* ``ExportToAedt`` to define attributes and parameters for the export page when exporting to AEDT. +* ``OptimizationGoalsTable`` to manage access to the entries in the optimization goals table. They are accessible through: @@ -27,15 +25,91 @@ They are accessible through: :toctree: _autosummary :nosignatures: + attributes.Attributes dll_interface.DllInterface graph_setup.GraphSetup ideal_response.IdealResponse multiple_bands_table.MultipleBandsTable transmission_zeros.TransmissionZeros + export_to_aedt.ExportToAedt + optimization_goals_table.OptimizationGoalsTable + + + +Lumped design +~~~~~~~~~~~~~~~~~~~ + +The ``LumpedDesign`` module includes all the necessary classes for creating and modifying parameters used in lumped filter designs. + +* ``LumpedTopology`` to define attributes and parameters of filters implemented using a lumped topology. +* ``LumpedParasitics`` to define attributes of parasitic values associated with lumped elements. +* ``LumpedNodesandLeads`` to define attributes of the lumped node capacitors and lead inductors. +* ``LumpedTerminationImpedance`` to manage access to the entries of source and load complex impedance table. + +They are accessible through: + + +.. currentmodule:: ansys.aedt.core.filtersolutions_core + +.. autosummary:: + :toctree: _autosummary + :nosignatures: + + lumped_topology.LumpedTopology lumped_parasitics.LumpedParasitics lumped_nodes_and_leads.LumpedNodesandLeads lumped_termination_impedance_table.LumpedTerminationImpedance - export_to_aedt.ExportToAedt - optimization_goals_table.OptimizationGoalsTable + +``Lumped Filter`` example: + +.. code:: python + + import ansys.aedt.core + import ansys.aedt.core.filtersolutions + # This call returns an instance of the LempedDesign class + design = ansys.aedt.core.FilterSolutions.LumpedDesign(version= "2025.1") + # This property in the Attributes class specifies the filter class as band pass + design.attributes.filter_class = FilterClass.BAND_PASS + # This property in the Attributes class specifies the filter type as Elliptic + design.attributes.filter_type = FilterType.ELLIPTIC + # This property in the LumpedTopology class enables the trap topology by setting it to true + design.topology.trap_topology = True + ... + + + +Distributed design +~~~~~~~~~~~~~~~~~~~ +The ``DistributedDesign`` module includes all the necessary classes for creating and modifying parameters used in distributed filter designs. + +* ``DistributedTopology`` to define attributes and parameters of filters implemented using a distributeded topology. + +They are accessible through: + + +.. currentmodule:: ansys.aedt.core.filtersolutions_core + +.. autosummary:: + :toctree: _autosummary + :nosignatures: + + + distributed_topology.DistributedTopology + +``Distributed Filter`` example: + +.. code:: python + + import ansys.aedt.core + import ansys.aedt.core.filtersolutions + # This call returns an instance of the DistributedDesign class + design = ansys.aedt.core.FilterSolutions.DistributedDesign(version= "2025.2") + # This property in the Attributes class specifies the filter class as band pass + design.attributes.filter_class = FilterClass.BAND_PASS + # This property in the Attributes class specifies the filter type as Elliptic + design.attributes.filter_type = FilterType.ELLIPTIC + # This property in the DistributedTopology class sets the load resistance to 50 ohms. + design.topology.load_resistance = "50" + ... \ No newline at end of file diff --git a/src/ansys/aedt/core/filtersolutions.py b/src/ansys/aedt/core/filtersolutions.py index a2e79e9f208..a129f489f20 100644 --- a/src/ansys/aedt/core/filtersolutions.py +++ b/src/ansys/aedt/core/filtersolutions.py @@ -44,10 +44,6 @@ class FilterDesignBase: This class has access to ideal filter attributes and calculated output parameters. """ - # See Also - # -------- - # :doc:`filtersolutions` - def __init__(self, version=None): self.version = version ansys.aedt.core.filtersolutions_core._dll_interface(version) diff --git a/src/ansys/aedt/core/filtersolutions_core/distributed_topology.py b/src/ansys/aedt/core/filtersolutions_core/distributed_topology.py index 1dbc3ca2670..68f4f705b07 100644 --- a/src/ansys/aedt/core/filtersolutions_core/distributed_topology.py +++ b/src/ansys/aedt/core/filtersolutions_core/distributed_topology.py @@ -609,7 +609,7 @@ def via_ends(self, via_ends: bool): @property def resonator_line_width(self) -> str: - """Line width to set in ``Haripin``, ``Miniature Hairpin``, and ``Ring Resonator`` topologies + """Line width to set in ``Hairpin``, ``Miniature Hairpin``, and ``Ring Resonator`` topologies of band pass filters. The default is ``1.27 mm``. Returns @@ -642,7 +642,7 @@ def resonator_rotation_angle(self, resonator_rotation_angle_string): @property def mitered_corners(self) -> bool: """Flag indicating if mitered corners are implemented. - This parameter is applicable for the ``Haripin``, ``Miniature Hairpin``, and ``Ring Resonator`` topologies + This parameter is applicable for the ``Hairpin``, ``Miniature Hairpin``, and ``Ring Resonator`` topologies of band pass filters. Returns @@ -661,7 +661,7 @@ def mitered_corners(self, mitered_corners: bool): @property def hairpin_gap_width(self) -> str: - """Gap width to set in ``Haripin`` topology of band pass filters. The default is ``2.54 mm``. + """Gap width to set in ``Hairpin`` topology of band pass filters. The default is ``2.54 mm``. Returns ------- @@ -676,7 +676,7 @@ def hairpin_gap_width(self, hairpin_gap_width_string): @property def miniature_hairpin_gap_width(self) -> str: - """Gap width to set in ``Miniature Haripin`` topology of band pass filters. The default is ``635 um``. + """Gap width to set in ``Miniature Hairpin`` topology of band pass filters. The default is ``635 um``. Returns ------- @@ -706,7 +706,7 @@ def ring_resonator_gap_width(self, ring_resonator_gap_width_string): @property def hairpin_extension_length(self) -> str: - """Extension length to set in ``Haripin`` topology of band pass filters for tuning purpose. + """Extension length to set in ``Hairpin`` topology of band pass filters for tuning purpose. The default is ``0 mm``. Returns @@ -722,7 +722,7 @@ def hairpin_extension_length(self, hairpin_extension_length_string): @property def miniature_hairpin_end_curl_extension(self) -> str: - """End curl extension length to set in ``Miniature Haripin`` topology of band pass filters for tuning purpose. + """End curl extension length to set in ``Miniature Hairpin`` topology of band pass filters for tuning purpose. The default is ``0 mm``. Returns @@ -762,7 +762,7 @@ def ring_resonator_end_gap_extension(self, ring_resonator_end_gap_extension_stri @property def tuning_type_1(self) -> bool: - """Flag indicating if both legs of the outer hairpins are set for tuning in ``Haripin`` + """Flag indicating if both legs of the outer hairpins are set for tuning in ``Hairpin`` topology of band pass filters. If ``False``, only the outer legs of the outer hairpins are set. Returns