diff --git a/searchindex.js b/searchindex.js
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@@ -1 +1 @@
-Search.setIndex({"alltitles": {"1. Introduction": [[41, "introduction"]], "2. Coding style": [[41, "coding-style"]], "3. Annexes": [[41, "annexes"]], "4. References": [[41, "references"]], "A. Layout": [[41, "a-layout"]], "AD463x": [[32, null]], "AD738x": [[33, null]], "AD7606": [[34, null]], "AD7616 Test bench": [[35, null]], "ADI Testbenches coding guidelines": [[41, null]], "ADI VIPs": [[17, null]], "AMD VIPs": [[22, null]], "AXIS Sequencers": [[27, null]], "About the tools we use": [[46, "about-the-tools-we-use"]], "Adding a new configuration to a test bench": [[39, "adding-a-new-configuration-to-a-test-bench"]], "Adding a new test program to a test bench": [[39, "adding-a-new-test-program-to-a-test-bench"]], "Additional notes": [[16, "additional-notes"]], "Annex 1 System Verilog file format": [[41, "annex-1-system-verilog-file-format"]], "Available configurations & tests combinations": [[27, "available-configurations-tests-combinations"], [28, "available-configurations-tests-combinations"], [30, "available-configurations-tests-combinations"], [31, "available-configurations-tests-combinations"], [32, "available-configurations-tests-combinations"], [33, "available-configurations-tests-combinations"], [34, "available-configurations-tests-combinations"], [37, "available-configurations-tests-combinations"], [38, "available-configurations-tests-combinations"]], "B. Naming Conventions": [[41, "b-naming-conventions"]], "Base": [[28, null]], "Block design": [[27, "block-design"], [28, "block-design"], [30, "block-design"], [31, "block-design"], [32, "block-design"], [33, "block-design"], [34, "block-design"], [37, "block-design"], [38, "block-design"]], "Block diagram": [[27, "block-diagram"], [28, "block-diagram"], [30, "block-diagram"], [31, "block-diagram"], [32, "block-diagram"], [33, "block-diagram"], [34, "block-diagram"], [37, "block-diagram"], [38, "block-diagram"]], "Build a test bench": [[40, null]], "Build parameters": [[27, "build-parameters"], [28, "build-parameters"], [30, "build-parameters"], [31, "build-parameters"], [32, "build-parameters"], [33, "build-parameters"], [34, "build-parameters"], [37, "build-parameters"], [38, "build-parameters"]], "Building a test bench": [[40, "building-a-test-bench"]], "Building the test bench": [[27, "building-the-test-bench"], [28, "building-the-test-bench"], [30, "building-the-test-bench"], [31, "building-the-test-bench"], [32, "building-the-test-bench"], [33, "building-the-test-bench"], [34, "building-the-test-bench"], [37, "building-the-test-bench"], [38, "building-the-test-bench"]], "C. Comments": [[41, "c-comments"]], "CPU/Memory interconnect addresses": [[32, "cpu-memory-interconnect-addresses"], [33, "cpu-memory-interconnect-addresses"], [34, "cpu-memory-interconnect-addresses"], [37, "cpu-memory-interconnect-addresses"]], "CPU/Memory interconnects addresses": [[27, "cpu-memory-interconnects-addresses"], [28, "cpu-memory-interconnects-addresses"], [30, "cpu-memory-interconnects-addresses"], [31, "cpu-memory-interconnects-addresses"], [38, "cpu-memory-interconnects-addresses"]], "CRC Configuration Test": [[34, "crc-configuration-test"]], "Clock scheme": [[30, "clock-scheme"], [32, "clock-scheme"], [38, "clock-scheme"]], "Common": [[3, null]], "Common sections": [[42, "common-sections"]], "Configuration files": [[27, "configuration-files"], [28, "configuration-files"], [30, "configuration-files"], [31, "configuration-files"], [32, "configuration-files"], [33, "configuration-files"], [34, "configuration-files"], [37, "configuration-files"], [38, "configuration-files"]], "Configuration parameters": [[18, "configuration-parameters"]], "Configuration parameters and modes": [[27, "configuration-parameters-and-modes"], [28, "configuration-parameters-and-modes"], [30, "configuration-parameters-and-modes"], [31, "configuration-parameters-and-modes"], [32, "configuration-parameters-and-modes"], [33, "configuration-parameters-and-modes"], [34, "configuration-parameters-and-modes"], [37, "configuration-parameters-and-modes"], [38, "configuration-parameters-and-modes"]], "Contents": [[2, "contents"], [3, "contents"], [9, "contents"], [14, "contents"], [15, "contents"], [17, "contents"], [22, "contents"], [24, "contents"], [26, "contents"], [29, "contents"], [36, "contents"], [44, "contents"]], "Creating a modified block design in the same project folder": [[39, "creating-a-modified-block-design-in-the-same-project-folder"]], "Creating a new testbench": [[39, "creating-a-new-testbench"]], "D. General": [[41, "d-general"]], "DMAC": [[8, null]], "Data Offload": [[7, null]], "Documentation guidelines": [[42, null]], "Drivers": [[9, null], [13, "drivers"]], "Environment": [[40, "environment"]], "Environment Bringup": [[27, "environment-bringup"], [28, "environment-bringup"], [31, "environment-bringup"], [32, "environment-bringup"], [33, "environment-bringup"], [34, "environment-bringup"], [37, "environment-bringup"]], "FIFO SPI Test": [[32, "fifo-spi-test"], [33, "fifo-spi-test"], [37, "fifo-spi-test"]], "Features": [[18, "features"]], "File structure of a project": [[39, "file-structure-of-a-project"]], "Files": [[18, "files"], [19, "files"], [19, "id1"], [20, "files"], [20, "id1"]], "Folder structure": [[43, "folder-structure"]], "Functions": [[6, "functions"], [16, "functions"], [18, "functions"], [19, "functions"], [19, "id2"], [20, "functions"], [20, "id2"]], "HDL Testbenches": [[2, null]], "HDL related dependencies": [[31, "hdl-related-dependencies"], [32, "hdl-related-dependencies"], [33, "hdl-related-dependencies"], [34, "hdl-related-dependencies"], [37, "hdl-related-dependencies"]], "IP Based": [[29, null]], "IP Based Testbenches": [[26, "ip-based-testbenches"]], "IP based test bench template": [[30, null]], "Interface": [[18, "interface"]], "Interrupts": [[27, "interrupts"], [28, "interrupts"], [30, "interrupts"], [31, "interrupts"], [32, "interrupts"], [33, "interrupts"], [34, "interrupts"], [37, "interrupts"], [38, "interrupts"]], "Introduction": [[45, null]], "JESD": [[10, null]], "Known Issues": [[18, "known-issues"]], "Legend": [[34, null], [37, null]], "Library": [[13, null]], "Linux environment setup": [[40, "linux-environment-setup"]], "Monitor": [[4, null]], "More information": [[0, null], [27, "more-information"], [28, "more-information"], [30, "more-information"], [31, "more-information"], [32, "more-information"], [33, "more-information"], [34, "more-information"], [37, "more-information"], [38, "more-information"]], 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\ No newline at end of file
+Search.setIndex({"alltitles": {"1. Introduction": [[41, "introduction"]], "2. Coding style": [[41, "coding-style"]], "3. Annexes": [[41, "annexes"]], "4. References": [[41, "references"]], "A. Layout": [[41, "a-layout"]], "AD463x": [[32, null]], "AD738x": [[33, null]], "AD7606": [[34, null]], "AD7616 Test bench": [[35, null]], "ADI Testbenches coding guidelines": [[41, null]], "ADI VIPs": [[17, null]], "AMD VIPs": [[22, null]], "AXIS Sequencers": [[27, null]], "About the tools we use": [[46, "about-the-tools-we-use"]], "Adding a new configuration to a test bench": [[39, "adding-a-new-configuration-to-a-test-bench"]], "Adding a new test program to a test bench": [[39, "adding-a-new-test-program-to-a-test-bench"]], "Additional notes": [[16, "additional-notes"]], "Annex 1 System Verilog file format": [[41, "annex-1-system-verilog-file-format"]], "Available configurations & tests combinations": [[27, "available-configurations-tests-combinations"], [28, "available-configurations-tests-combinations"], [30, "available-configurations-tests-combinations"], [31, "available-configurations-tests-combinations"], [32, "available-configurations-tests-combinations"], [33, "available-configurations-tests-combinations"], [34, "available-configurations-tests-combinations"], [37, "available-configurations-tests-combinations"], [38, "available-configurations-tests-combinations"]], "B. Naming Conventions": [[41, "b-naming-conventions"]], "Base": [[28, null]], "Block design": [[27, "block-design"], [28, "block-design"], [30, "block-design"], [31, "block-design"], [32, "block-design"], [33, "block-design"], [34, "block-design"], [37, "block-design"], [38, "block-design"]], "Block diagram": [[27, "block-diagram"], [28, "block-diagram"], [30, "block-diagram"], [31, "block-diagram"], [32, "block-diagram"], [33, "block-diagram"], [34, "block-diagram"], [37, "block-diagram"], [38, "block-diagram"]], "Build a test bench": [[40, null]], "Build parameters": [[27, "build-parameters"], [28, "build-parameters"], [30, "build-parameters"], [31, "build-parameters"], [32, "build-parameters"], [33, "build-parameters"], [34, "build-parameters"], [37, "build-parameters"], [38, "build-parameters"]], "Building a test bench": [[40, "building-a-test-bench"]], "Building the test bench": [[27, "building-the-test-bench"], [28, "building-the-test-bench"], [30, "building-the-test-bench"], [31, "building-the-test-bench"], [32, "building-the-test-bench"], [33, "building-the-test-bench"], [34, "building-the-test-bench"], [37, "building-the-test-bench"], [38, "building-the-test-bench"]], "C. Comments": [[41, "c-comments"]], "CPU/Memory interconnect addresses": [[32, "cpu-memory-interconnect-addresses"], [33, "cpu-memory-interconnect-addresses"], [34, "cpu-memory-interconnect-addresses"], [37, "cpu-memory-interconnect-addresses"]], "CPU/Memory interconnects addresses": [[27, "cpu-memory-interconnects-addresses"], [28, "cpu-memory-interconnects-addresses"], [30, "cpu-memory-interconnects-addresses"], [31, "cpu-memory-interconnects-addresses"], [38, "cpu-memory-interconnects-addresses"]], "CRC Configuration Test": [[34, "crc-configuration-test"]], "Clock scheme": [[30, "clock-scheme"], [32, "clock-scheme"], [38, "clock-scheme"]], "Common": [[3, null]], "Common sections": [[42, "common-sections"]], "Configuration files": [[27, "configuration-files"], [28, "configuration-files"], [30, "configuration-files"], [31, "configuration-files"], [32, "configuration-files"], [33, "configuration-files"], [34, "configuration-files"], [37, "configuration-files"], [38, "configuration-files"]], "Configuration parameters": [[18, "configuration-parameters"]], "Configuration parameters and modes": [[27, "configuration-parameters-and-modes"], [28, "configuration-parameters-and-modes"], [30, "configuration-parameters-and-modes"], [31, "configuration-parameters-and-modes"], [32, "configuration-parameters-and-modes"], [33, "configuration-parameters-and-modes"], [34, "configuration-parameters-and-modes"], [37, "configuration-parameters-and-modes"], [38, "configuration-parameters-and-modes"]], "Contents": [[2, "contents"], [3, "contents"], [9, "contents"], [14, "contents"], [15, "contents"], [17, "contents"], [22, "contents"], [24, "contents"], [26, "contents"], [29, "contents"], [36, "contents"], [44, "contents"]], "Creating a modified block design in the same project folder": [[39, "creating-a-modified-block-design-in-the-same-project-folder"]], "Creating a new testbench": [[39, "creating-a-new-testbench"]], "D. General": [[41, "d-general"]], "DMAC": [[8, null]], "Data Offload": [[7, null]], "Documentation guidelines": [[42, null]], "Drivers": [[9, null], [13, "drivers"]], "Environment": [[40, "environment"]], "Environment Bringup": [[27, "environment-bringup"], [28, "environment-bringup"], [31, "environment-bringup"], [32, "environment-bringup"], [33, "environment-bringup"], [34, "environment-bringup"], [37, "environment-bringup"], [38, "environment-bringup"]], "FIFO SPI Test": [[32, "fifo-spi-test"], [33, "fifo-spi-test"], [37, "fifo-spi-test"]], "Features": [[18, "features"]], "File structure of a project": [[39, "file-structure-of-a-project"]], "Files": [[18, "files"], [19, "files"], [19, "id1"], [20, "files"], [20, "id1"]], "Folder structure": [[43, "folder-structure"]], "Functions": [[6, "functions"], [16, "functions"], [18, "functions"], [19, "functions"], [19, "id2"], [20, "functions"], [20, "id2"]], "HDL Testbenches": [[2, null]], "HDL related dependencies": [[31, "hdl-related-dependencies"], [32, "hdl-related-dependencies"], [33, "hdl-related-dependencies"], [34, "hdl-related-dependencies"], [37, "hdl-related-dependencies"], [38, "hdl-related-dependencies"]], "IP Based": [[29, null]], "IP Based Testbenches": [[26, "ip-based-testbenches"]], "IP based test bench template": [[30, null]], "Interface": [[18, "interface"]], "Interrupts": [[27, "interrupts"], [28, "interrupts"], [30, "interrupts"], [31, "interrupts"], [32, "interrupts"], [33, "interrupts"], [34, "interrupts"], [37, "interrupts"], [38, "interrupts"]], "Introduction": [[45, null]], "JESD": [[10, null]], "Known Issues": [[18, "known-issues"]], "Legend": [[34, null], [37, null], [38, null]], "Library": [[13, null]], "Linux environment setup": [[40, "linux-environment-setup"]], "Monitor": [[4, null]], "More information": [[0, null], [27, "more-information"], [28, "more-information"], [30, "more-information"], [31, "more-information"], [32, "more-information"], [33, "more-information"], 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"SPI VIP", "Xilinx AXI Verification IP (VIP)", "Xilinx AXI Stream Verification IP (VIP)", "Xilinx Clock Verification IP (VIP)", "AMD VIPs", "Xilinx Reset Verification IP (VIP)", "Verification IPs (VIP)", "<no title>", "Testbenches", "AXIS Sequencers", "Base", "IP Based", "IP based test bench template", "Util Pack", "AD463x", "AD738x", "AD7606", "AD7616 Test bench", "Project Based", "PulSAR ADC PMDZ", "Project based test bench template", "Testbenches Architecture", "Build a test bench", "ADI Testbenches coding guidelines", "Documentation guidelines", "Testbenches Git repository", "User Guide", "Introduction", "Releases"], "titleterms": {"0": 6, "1": 41, "2": 41, "3": 41, "31": 6, "4": 41, "A": 41, "about": 46, "ad": 39, "ad463x": 32, "ad738x": 33, "ad7606": 34, "ad7616": 35, "adc": 37, "addit": 16, "address": [27, 28, 30, 31, 32, 33, 34, 37, 38], "adi": [17, 41], "amd": 22, "annex": 41, "anoth": 46, "architectur": 39, "avail": [27, 28, 30, 31, 32, 33, 34, 37, 38], "axi": [19, 20, 27], "b": 41, "base": [26, 28, 29, 30, 36, 38], "bench": [27, 28, 30, 31, 32, 33, 34, 35, 37, 38, 39, 40], "bit": 6, "block": [27, 28, 30, 31, 32, 33, 34, 37, 38, 39], "branch": [43, 46], "bringup": [27, 28, 31, 32, 33, 34, 37, 38], "build": [27, 28, 30, 31, 32, 33, 34, 37, 38, 40], "c": 41, "clock": [21, 30, 32, 38], "code": 41, "combin": [27, 28, 30, 31, 32, 33, 34, 37, 38], "comment": 41, "common": [3, 42], "configur": [18, 27, 28, 30, 31, 32, 33, 34, 37, 38, 39], "content": [2, 3, 9, 14, 15, 17, 22, 24, 26, 29, 36, 44], "convent": 41, "cpu": [27, 28, 30, 31, 32, 33, 34, 37, 38], "crc": 34, "creat": 39, "d": 41, "data": 7, "depend": [27, 28, 31, 32, 33, 34, 37, 38], "design": [27, 28, 30, 31, 32, 33, 34, 37, 38, 39], "diagram": [27, 28, 30, 31, 32, 33, 34, 37, 38], "dmac": 8, "document": 42, "driver": [9, 13], "engin": 11, "environ": [16, 27, 28, 31, 32, 33, 34, 37, 38, 40], "featur": 18, "fifo": [32, 33, 37], "file": [18, 19, 20, 27, 28, 30, 31, 32, 33, 34, 37, 38, 39, 41], "folder": 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"program": 39, "project": [26, 36, 38, 39], "pulsar": 37, "recommend": 6, "refer": [18, 19, 20, 21, 23, 41], "registermap": [13, 14], "relat": [27, 28, 31, 32, 33, 34, 37, 38], "releas": [43, 46], "repositori": [40, 43], "reset": [6, 23], "resourc": [27, 28, 30, 31, 32, 33, 34, 37, 38], "run": 16, "s_axi_sequenc": [19, 20], "same": 39, "saniti": [32, 33, 34, 37, 38], "scheme": [30, 32, 38], "scoreboard": 5, "section": 42, "sequenc": 27, "set": 40, "setup": 40, "simpl": 34, "simul": 16, "spi": [11, 18, 32, 33, 37], "start": [6, 16], "statu": 34, "stimulu": [27, 28, 30, 31, 32, 33, 34, 37, 38], "stop": [6, 16], "stream": 20, "string": 6, "structur": [16, 39, 43], "style": 41, "support": [1, 6, 16, 18, 27, 28, 30, 31, 32, 33, 34, 37, 38], "sys_reset": 16, "system": 41, "task": [6, 16], "technic": 18, "templat": [30, 38, 42], "test": [16, 27, 28, 30, 31, 32, 33, 34, 35, 37, 38, 39, 40], "test_c_run": 16, "testbench": [2, 26, 27, 28, 31, 32, 33, 34, 37, 38, 39, 40, 41, 43], "timer": 6, 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\ No newline at end of file
diff --git a/testbenches/project_based/template/index.html b/testbenches/project_based/template/index.html
index 27d78fc9..abf780db 100644
--- a/testbenches/project_based/template/index.html
+++ b/testbenches/project_based/template/index.html
@@ -115,9 +115,17 @@
 <li><a class="reference internal" href="#interrupts">Interrupts</a></li>
 </ul>
 </li>
+<li><a class="reference internal" href="#test-stimulus">Test stimulus</a><ul>
+<li><a class="reference internal" href="#environment-bringup">Environment Bringup</a></li>
+<li><a class="reference internal" href="#sanity-test">Sanity Test</a></li>
+</ul>
+</li>
 <li><a class="reference internal" href="#building-the-test-bench">Building the test bench</a></li>
-<li><a class="reference internal" href="#test-stimulus">Test stimulus</a></li>
-<li><a class="reference internal" href="#resources">Resources</a></li>
+<li><a class="reference internal" href="#resources">Resources</a><ul>
+<li><a class="reference internal" href="#hdl-related-dependencies">HDL related dependencies</a></li>
+<li><a class="reference internal" href="#testbenches-related-dependencies">Testbenches related dependencies</a></li>
+</ul>
+</li>
 <li><a class="reference internal" href="#more-information">More information</a></li>
 <li><a class="reference internal" href="#support">Support</a></li>
 </ul>
@@ -237,18 +245,36 @@
 <span id="project-based-template"></span><h1>Project based test bench template<a class="headerlink" href="#project-based-test-bench-template" title="Link to this heading">#</a></h1>
 <section id="overview">
 <h2>Overview<a class="headerlink" href="#overview" title="Link to this heading">#</a></h2>
+<p><strong>*This section must contain: the purpose of the testbench/ type of interface
+it’s validating, the corresponding hdl project and the HDL Github documentation
+page.</strong>*</p>
 </section>
 <section id="block-design">
 <h2>Block design<a class="headerlink" href="#block-design" title="Link to this heading">#</a></h2>
+<p><strong>*Mention the HDL and SV components of the testbench .</strong>*</p>
 <section id="block-diagram">
 <h3>Block diagram<a class="headerlink" href="#block-diagram" title="Link to this heading">#</a></h3>
+<p>If the testbench has multiple configurations that change the block design
+itself, then make subsections for each of these configuration-block design
+pairs.
+Example: project is configured in serial mode or parallel mode. If there are
+many configuration options on how the block design looks, try to find ways to
+generalize them (eg. multiple interfaces of the same type are enabled by a
+parameter).</p>
+<p>*** KEEP THIS PARAGRAPH ***
+The data path and clock domains are depicted in the below diagram:</p>
 <a class="reference internal image-reference" href="../../../_images/project_based_template_bd.svg"><img alt="Template/Testbench block diagram" class="align-center" src="../../../_images/project_based_template_bd.svg" style="width: 800px;" />
 </a>
+<p>** MUST: Use SVG format for the diagram **</p>
+<p>** TIP: Block diagrams should contain subtitles only if there are at least two
+different diagrams **</p>
 </section>
 <section id="configuration-parameters-and-modes">
 <h3>Configuration parameters and modes<a class="headerlink" href="#configuration-parameters-and-modes" title="Link to this heading">#</a></h3>
+<p>*** MENTION IF THERE ARE ANY CONFIGURATION PARAMETERS AND/OR MODES ***</p>
 <section id="build-parameters">
 <h4>Build parameters<a class="headerlink" href="#build-parameters" title="Link to this heading">#</a></h4>
+<p>*** THIS IS JUST AN EXAMPLE ***</p>
 <p>The following are the parameters of this project that can be configured:</p>
 <ul class="simple">
 <li><p>CLK_MODE: defines clocking mode of the device’s digital interface:
@@ -267,6 +293,8 @@ <h4>Build parameters<a class="headerlink" href="#build-parameters" title="Link t
 </section>
 <section id="configuration-files">
 <h4>Configuration files<a class="headerlink" href="#configuration-files" title="Link to this heading">#</a></h4>
+<p>*** MENTION IF ANY CONFIGURATION FILES ARE AVAILABLE***</p>
+<p>*** THIS IS JUST AN EXAMPLE ***</p>
 <p>The following are available configurations for the test bench:</p>
 <blockquote>
 <div><div class="table-wrapper docutils container">
@@ -405,12 +433,79 @@ <h4>Available configurations &amp; tests combinations<a class="headerlink" href=
 </section>
 <section id="clock-scheme">
 <h3>Clock scheme<a class="headerlink" href="#clock-scheme" title="Link to this heading">#</a></h3>
+<p>*** MENTION IF ANY CLOCKING CONFIGURATIONS ARE BEING USED***</p>
 </section>
 <section id="cpu-memory-interconnects-addresses">
 <h3>CPU/Memory interconnects addresses<a class="headerlink" href="#cpu-memory-interconnects-addresses" title="Link to this heading">#</a></h3>
+<p>*** THIS IS JUST AND EXAMPLE ***</p>
+<p>Below are the CPU/Memory interconnect addresses used in this project:</p>
+<div class="table-wrapper docutils container">
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Instance</p></th>
+<th class="head"><p>Address</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>spi_ad7616_axi_regmap</p></td>
+<td><p>0x44A0_0000</p></td>
+</tr>
+<tr class="row-odd"><td><p>axi_ad7606x_dma</p></td>
+<td><p>0x44A3_0000</p></td>
+</tr>
+<tr class="row-even"><td><p>spi_clkgen</p></td>
+<td><p>0x44A7_0000</p></td>
+</tr>
+<tr class="row-odd"><td><p>ad7606_pwm_gen</p></td>
+<td><p>0x44B0_0000</p></td>
+</tr>
+</tbody>
+</table>
+</div>
 </section>
 <section id="interrupts">
 <h3>Interrupts<a class="headerlink" href="#interrupts" title="Link to this heading">#</a></h3>
+<p>*** THIS IS JUST AND EXAMPLE ***</p>
+<p>Below are the Programmable Logic interrupts used in this project:</p>
+<div class="table-wrapper docutils container">
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Instance name</p></th>
+<th class="head"><p>HDL</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>axi_ad7606_dma</p></td>
+<td><p>13</p></td>
+</tr>
+<tr class="row-odd"><td><p>spi_ad7606</p></td>
+<td><p>12</p></td>
+</tr>
+</tbody>
+</table>
+</div>
+</section>
+</section>
+<section id="test-stimulus">
+<h2>Test stimulus<a class="headerlink" href="#test-stimulus" title="Link to this heading">#</a></h2>
+<p>*** LIST AND EXPLAIN ALL THE TESTS COMPRISED IN THE test_program FILE ***</p>
+<p>*** THIS IS JUST AND EXAMPLE ***</p>
+<p>The test program is structured into several tests as follows:</p>
+<section id="environment-bringup">
+<h3>Environment Bringup<a class="headerlink" href="#environment-bringup" title="Link to this heading">#</a></h3>
+<p>The steps of the environment bringup are:</p>
+<ul class="simple">
+<li><p>Create the environment</p></li>
+<li><p>Start the environment</p></li>
+<li><p>Start the clocks</p></li>
+<li><p>Assert the resets</p></li>
+</ul>
+</section>
+<section id="sanity-test">
+<h3>Sanity Test<a class="headerlink" href="#sanity-test" title="Link to this heading">#</a></h3>
+<p>This test is used to check the communication with the AXI REGMAP module of the
+AD7606 SPI Engine interface, by reading the core VERSION register, along with
+writing and reading the SCRATCH register.</p>
 </section>
 </section>
 <section id="building-the-test-bench">
@@ -478,11 +573,106 @@ <h2>Building the test bench<a class="headerlink" href="#building-the-test-bench"
 <p>Then the subfolder under <code class="docutils literal notranslate"><span class="pre">runs</span></code> name will be:</p>
 <p><code class="docutils literal notranslate"><span class="pre">cfg_pi</span></code></p>
 </section>
-<section id="test-stimulus">
-<h2>Test stimulus<a class="headerlink" href="#test-stimulus" title="Link to this heading">#</a></h2>
-</section>
 <section id="resources">
 <h2>Resources<a class="headerlink" href="#resources" title="Link to this heading">#</a></h2>
+<section id="hdl-related-dependencies">
+<h3>HDL related dependencies<a class="headerlink" href="#hdl-related-dependencies" title="Link to this heading">#</a></h3>
+<p>*** THIS IS JUST AND EXAMPLE ***</p>
+<div class="table-wrapper colwidths-given docutils container">
+<table class="docutils align-default">
+<colgroup>
+<col style="width: 30.0%" />
+<col style="width: 45.0%" />
+<col style="width: 25.0%" />
+</colgroup>
+<thead>
+<tr class="row-odd"><th class="head"><p>IP name</p></th>
+<th class="head"><p>Source code link</p></th>
+<th class="head"><p>Documentation link</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>SYNC_BITS</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/util_cdc/sync_bits.v">library/util_cdc/sync_bits.v</a> **</p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-odd"><td><p>AD_EDGE_DETECT</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/common/ad_edge_detect.v">library/common/ad_edge_detect.v</a></p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-even"><td><p>AXI_AD7606x</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_ad7606x">library/axi_ad7606x</a> *</p></td>
+<td><p><a class="reference external" href="https://wiki.analog.com/resources/fpga/docs/axi_ad7606x">[Wiki]</a></p></td>
+</tr>
+<tr class="row-odd"><td><p>AXI_CLKGEN</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_clkgen">library/axi_clkgen</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_clkgen/index.html#axi-clkgen" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>AXI_DMAC</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_dmac">library/axi_dmac</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_dmac/index.html#axi-dmac" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p>AXI_HDMI_TX</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_hdmi_tx">library/axi_hdmi_tx</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_hdmi_tx/index.html#axi-hdmi-tx" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>AXI_I2S_ADI</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_i2s_adi">library/axi_i2s_adi</a></p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-odd"><td><p>AXI_PWM_GEN</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_pwm_gen">library/axi_pwm_gen</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_pwm_gen/index.html#axi-pwm-gen" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>AXI_SPDIF_TX</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_spdif_tx">library/axi_spdif_tx</a></p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-odd"><td><p>AXI_SYSID</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/axi_sysid">library/axi_sysid</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_sysid/index.html#axi-sysid" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>AXI_SPI_ENGINE</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/spi_engine/axi_spi_engine">library/spi_engine/axi_spi_engine</a>  **</p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/spi_engine/axi_spi_engine.html#spi-engine-axi" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p>SPI_ENGINE_EXECUTION</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/spi_engine/spi_engine_execution">library/spi_engine/spi_engine_execution</a> **</p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/spi_engine/spi_engine_execution.html#spi-engine-execution" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>SPI_ENGINE_INTERCONNECT</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/spi_engine/spi_engine_interconnect">library/spi_engine/spi_engine_interconnect</a> **</p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/spi_engine/spi_engine_interconnect.html#spi-engine-interconnect" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p>SPI_ENGINE_OFFLOAD</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/spi_engine/spi_engine_offload">library/spi_engine/spi_engine_offload</a> **</p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/spi_engine/spi_engine_offload.html#spi-engine-offload" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p>SYSID_ROM</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/sysid_rom">library/sysid_rom</a></p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/axi_sysid/index.html#axi-sysid" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p>UTIL_I2C_MIXER</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/util_i2c_mixer">library/util_i2c_mixer</a></p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-even"><td><p>UTIL_CPACK2</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/hdl/tree/main/library/util_pack/util_cpack2">library/util_pack/util_cpack2</a> *</p></td>
+<td><p><a class="reference external" href="https://analogdevicesinc.github.io/hdl/library/util_pack/util_cpack2.html#util-cpack2" title="(in HDL)"><span class="xref std std-ref">here</span></a></p></td>
+</tr>
+</tbody>
+</table>
+</div>
+<div class="note admonition">
+<p class="admonition-title">Legend</p>
+<ul class="simple">
+<li><p><code class="docutils literal notranslate"><span class="pre">*</span></code> instantiated only for INTF=0 (parallel interface)</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">**</span></code> instantiated only for INTF=1 (serial interface)</p></li>
+</ul>
+</div>
+</section>
+<section id="testbenches-related-dependencies">
+<h3>Testbenches related dependencies<a class="headerlink" href="#testbenches-related-dependencies" title="Link to this heading">#</a></h3>
 <p>Common with most testbenches:</p>
 <div class="table-wrapper colwidths-given docutils container">
 <table class="docutils align-default">
@@ -530,6 +720,33 @@ <h2>Resources<a class="headerlink" href="#resources" title="Link to this heading
 </table>
 </div>
 <p>Testbench specific dependencies:</p>
+<p>*** THIS IS JUST AND EXAMPLE ***</p>
+<div class="table-wrapper colwidths-given docutils container">
+<table class="docutils align-default">
+<colgroup>
+<col style="width: 30.0%" />
+<col style="width: 45.0%" />
+<col style="width: 25.0%" />
+</colgroup>
+<thead>
+<tr class="row-odd"><th class="head"><p>SV dependency name</p></th>
+<th class="head"><p>Source code link</p></th>
+<th class="head"><p>Documentation link</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>ADI_REGMAP_CLKGEN_PKG</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/testbenches/tree/main/library/regmaps/adi_regmap_clkgen_pkg.sv">library/regmaps/adi_regmap_clkgen_pkg.sv</a></p></td>
+<td><p>—</p></td>
+</tr>
+<tr class="row-odd"><td><p>ADI_REGMAP_DMAC_PKG</p></td>
+<td><p><a class="icon git reference external" href="https://github.com/analogdevicesinc/testbenches/tree/main/library/regmaps/adi_regmap_dmac_pkg.sv">library/regmaps/adi_regmap_dmac_pkg.sv</a></p></td>
+<td><p>—</p></td>
+</tr>
+</tbody>
+</table>
+</div>
+</section>
 </section>
 <section id="more-information">
 <h2>More information<a class="headerlink" href="#more-information" title="Link to this heading">#</a></h2>