diff --git a/projects/ad3552r_evb/Readme.md b/projects/ad3552r_evb/Readme.md
index 4c92e827e6..07f9eaf08e 100755
--- a/projects/ad3552r_evb/Readme.md
+++ b/projects/ad3552r_evb/Readme.md
@@ -1,8 +1,18 @@
 # AD3552R-EVB HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad3552r)
-  * Parts : [ AD3552R Dual Channel, 16-Bit, 33 MUPS, Multispan, Multi-IO SPI DAC ](https://www.analog.com/en/products/ad3552r.html)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/dac/ad3552r_eval_zed
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/dac/ad3552r_eval_zed
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-dac/axi-ad3552r
\ No newline at end of file
+  * Evaluation board product page: [EVAL-AD3552R-EVB](https://www.analog.com/eval-ad3552r)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/dac/ad3552r_eval_zed
+  * HDL project documentation: [source code](../../docs/projects/ad3552r_evb/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad3552r_evb/index.html)
+
+## Supported parts
+
+  * [AD3552R](https://www.analog.com/ad3552r): Dual Channel, 16-Bit, 33 MUPS, Multispan, Multi-IO SPI DAC
+
+## Building the project
+
+This project is supported only on FPGA Avnet ZedBoard.
+
+```
+hdl/projects/ad3552r_evb/zed> make
+```
diff --git a/projects/ad411x_ad717x/README.md b/projects/ad411x_ad717x/README.md
new file mode 100755
index 0000000000..e9e591c3ba
--- /dev/null
+++ b/projects/ad411x_ad717x/README.md
@@ -0,0 +1,39 @@
+# AD411x-AD717x HDL project
+
+  * Evaluation board product pages:
+    * [EVAL-AD4111-ARDZ](https://www.analog.com/eval-ad4111-ardz)
+    * [EVAL-AD4112-ARDZ](https://www.analog.com/eval-ad4112-ardz)
+    * [EVAL-AD4114-SDZ](https://www.analog.com/eval-ad4114-sdz)
+    * [EVAL-AD4115-SDZ](https://www.analog.com/eval-ad4115-sdz)
+    * [EVAL-AD4116-ASDZ](https://www.analog.com/eval-ad4116-asdz)
+    * [EVAL-AD7173-8ARDZ](https://www.analog.com/eval-ad7173-8ardz)
+    * [EVAL-AD7175-8ARDZ](https://www.analog.com/eval-ad7175-8ardz)
+  * System documentation: https://wiki.analog.com/resources/eval/10-lead-pulsar-adc-evaluation-board
+  * HDL project documentation: [source code](../../docs/projects/ad411x_ad717x/index.rst)
+    or [online](https://analogdevicesinc.github.io/hdl/projects/ad411x_ad717x/index.html)
+
+## Supported parts
+
+| Part name                                   | Resolution | Description                                                                             |
+|---------------------------------------------|:----------:|-----------------------------------------------------------------------------------------|
+| [AD4111](https://www.analog.com/ad4111)     | 24-bit     | Single Supply, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs, Open Wire Detection |
+| [AD4112](https://www.analog.com/ad4112)     | 24-bit     | Single Supply, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs |
+| [AD4113](https://www.analog.com/ad4113)     | ?          |  ? |
+| [AD4114](https://www.analog.com/ad4114)     |            | Single Supply, Multichannel, 31.25 kSPS, Sigma-Delta ADC with ±10 V Inputs |
+| [AD4115](https://www.analog.com/ad4115)     | 24-bit     | Single-Supply, Multichannel, 125 kSPS, Sigma-Delta ADC with ±10 V Inputs |
+| [AD4116](https://www.analog.com/ad4116)     | 24-bit     | Single Supply, Sigma-Delta ADC with ±10 V, 10 MΩ Inputs and Buffered Low Level Inputs |
+| [AD7172-2](https://www.analog.com/ad7172-2) | 24-bit     | Low Power, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers |
+| [AD7172-4](https://www.analog.com/ad7172-4) | 24-bit     | Low Power,  with 4- or 8-channel, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers |
+| [AD7173-8](https://www.analog.com/ad7173-8) | 24-bit     | Low Power, 8-/16-Channel, 31.25 kSPS, Highly Integrated Sigma-Delta ADC
+| [AD7175-2](https://www.analog.com/ad7175-2) | 24-bit     | 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers |
+| [AD7175-8](https://www.analog.com/ad7175-8) | 24-bit     | 8-/16-Channel, 250 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers |
+| [AD7176-2](https://www.analog.com/ad7176-2) | 24-bit     | 250 kSPS Sigma Delta ADC with 20 µs Settling |
+| [AD7177-2](https://www.analog.com/ad7177-2) | 32-bit     | 10 kSPS, Sigma-Delta ADC with 100 µs Settling and True Rail-to-Rail Buffers |
+
+## Building the project
+
+This project is supported only on FPGA Intel DE10-Nano.
+
+```
+hdl/projects/ad411x_ad717x/de10nano> make
+```
\ No newline at end of file
diff --git a/projects/ad469x_fmc/Readme.md b/projects/ad469x_fmc/Readme.md
index 25f9b2d166..2fb80a40f0 100755
--- a/projects/ad469x_fmc/Readme.md
+++ b/projects/ad469x_fmc/Readme.md
@@ -1,20 +1,29 @@
 # AD469X-FMC HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad4696)
-  * Parts : [AD4696, 16-Bit, 16-Channel, 1 MSPS, Easy Drive Multiplexed SAR ADC](https://www.analog.com/ad4696)
-  * Parts : [AD4695, 16-Bit, 16-Channel, 500 kSPS, Easy Drive Multiplexed SAR ADC](https://www.analog.com/ad4695)
-  * Parts : [AD4697, 16-Bit, 8-Channel, 500 kSPS, Easy Drive Multiplexed SAR ADC](https://www.analog.com/ad4697)
-  * Parts : [AD4698, 16-Bit, 8-Channel, 1 MSPS, Easy Drive Multiplexed SAR ADC](https://www.analog.com/ad4698)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad469x
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad469x
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers-all
-# Building, Generating Bit Files
-
-How to use over-writable parameter from the environment:
+  * Evaluation board product page: [EVAL-AD4696](https://www.analog.com/eval-ad4696)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/ad469x
+  * HDL project documentation: [source code](../../docs/projects/ad469x_fmc/index.rst)
+    or [online](https://analogdevicesinc.github.io/hdl/projects/ad469x_fmc/index.html)
+
+## Supported parts
+
+| Part name                               | Description                                                 |
+|-----------------------------------------|-------------------------------------------------------------|
+| [AD4696](https://www.analog.com/ad4696) | 16-Bit, 16-Channel, 1 MSPS, Easy Drive Multiplexed SAR ADC  |
+| [AD4695](https://www.analog.com/ad4695) | 16-Bit, 16-Channel, 500 kSPS, Easy Drive Multiplexed SAR ADC|
+| [AD4697](https://www.analog.com/ad4697) | 16-Bit, 8-Channel, 500 kSPS, Easy Drive Multiplexed SAR ADC |
+| [AD4698](https://www.analog.com/ad4698) | 16-Bit, 8-Channel, 1 MSPS, Easy Drive Multiplexed SAR ADC   |
+
+## Building the project
+
+This project is supported only on FPGA Avnet ZedBoard.
+
+How to use overwritable parameter from the environment:
+
+**SPI_4WIRE** - Defines if CNV signal is linked to PWM or to SPI_CS
+* 0 - CNV signal is linked to PWM (default option)
+* 1 - CNV signal is linked to SPI_CS
+
 ```
 hdl/projects/ad469x_fmc/zed> make SPI_4WIRE=0
 ```
-SPI_4WIRE - Defines if CNV signal is linked to PWM or to SPI_CS
-* 0 - CNV signal is linked to PWM
-* 1 - CNV signal is linked to SPI_CS
\ No newline at end of file
diff --git a/projects/ad485x_fmcz/Readme.md b/projects/ad485x_fmcz/Readme.md
index fd51178739..a93614f915 100755
--- a/projects/ad485x_fmcz/Readme.md
+++ b/projects/ad485x_fmcz/Readme.md
@@ -1,8 +1,50 @@
 # AD485x HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad4858)
-  * Parts : [AD485x(1-8)](https://www.analog.com/ad4858)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad4858_fmcz
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad4858_fmcz/ad4858_fmcz_hdl
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/axi-adc-hdl
+  * Evaluation board product page: [EVAL-AD4858](https://www.analog.com/eval-ad4858)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/ad4858_fmcz/ad4858_fmcz_hdl
+  * HDL project documentation: [source code](../../docs/projects/ad485x_fmcz/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad485x_fmcz/index.html)
+
+## Supported parts
+
+| Part name                               | No. of lanes | Resolution | Description                                           |
+|-----------------------------------------|:------------:|:----------:|-------------------------------------------------------|
+| [AD4858](https://www.analog.com/ad4858) | 8            | 20-bit     | Buffered, 8-Channel Simultaneous Sampling, 1 MSPS DAS |
+| [AD4857](https://www.analog.com/ad4857) | 8            | 16-bit     | Buffered, 8-Channel Simultaneous Sampling, 1 MSPS DAS |
+| AD4856                                  | 8            | 20-bit     | Buffered, 8-Channel Simultaneous Sampling, 250 kSPS DAS |
+| AD4855                                  | 8            | 16-bit     | Buffered, 8-Channel Simultaneous Sampling, 250 kSPS DAS |
+| AD4854                                  | 4            | 20-bit     | Buffered, 4-Channel Simultaneous Sampling, 1 MSPS DAS |
+| AD4853                                  | 4            | 16-bit     | Buffered, 4-Channel Simultaneous Sampling, 1 MSPS DAS |
+| AD4852                                  | 4            | 20-bit     | Buffered, 4-Channel Simultaneous Sampling, 250 kSPS DAS |
+| AD4851                                  | 4            | 16-bit     | Buffered, 4-Channel Simultaneous Sampling, 250 kSPS DAS |
+
+## Building the project
+
+This project is supported only on FPGA Avnet ZedBoard.
+
+How to use overwritable parameters from the environment:
+
+**LVDS_CMOS_N**:
+  * 0 - CMOS (default option)
+  * 1 - LVDS
+
+**DEVICE**:
+  * AD4858 (default option)
+  * AD4857
+  * AD4856
+  * AD4855
+  * AD4854
+  * AD4853
+  * AD4852
+  * AD4851
+
+```
+// default option is AD4858 and CMOS
+hdl/projects/ad485x_fmcz/zed> make
+
+// selected device is AD4857 and CMOS
+hdl/projects/ad485x_fmcz/zed> make DEVICE=AD4857
+
+// selected device is AD4858 and LVDS
+hdl/projects/ad485x_fmcz/zed> make DEVICE=AD4858 LVDS_CMOS_N=1
+```
\ No newline at end of file
diff --git a/projects/ad719x_asdz/README.md b/projects/ad719x_asdz/README.md
index e97f46a980..bc4efd9ce4 100644
--- a/projects/ad719x_asdz/README.md
+++ b/projects/ad719x_asdz/README.md
@@ -1,14 +1,25 @@
-# EVAL-AD719X-ASDZ HDL Project
-
-This project supports EVAL-AD7190, EVAL-AD7193 and EVAL-AD7195.
-
-Here are some pointers to help you:
-  * [EVAL-AD7190 Board Product Page](https://www.analog.com/eval-ad7190)
-  * [EVAL-AD7193 Board Product Page](https://www.analog.com/eval-ad7193)
-  * [EVAL-AD7195 Board Product Page](https://www.analog.com/eval-ad7195)
-  * Parts: AD7190 [Sigma-Delta ADC, SPI interface, 24-bit resolution, Data rate between 4.7Hz - 4.8kHz](https://www.analog.com/ad7190)
-  * Parts: AD7193 [4-channel Sigma-Delta ADC, SPI interface, 24-bit resolution, Data rate between 4.7Hz - 4.8kHz](https://www.analog.com/ad7193)
-  * Parts: AD7195 [Sigma-Delta ADC, SPI interface, 24-bit resolution, Data rate between 4.7Hz - 4.8kHz](https://www.analog.com/ad7195)
-  * Project Doc: https://wiki.analog.com/resources/eval/adc/ad719x_asdz
-  * HDL Doc: https://wiki.analog.com/resources/eval/adc/ad719x_asdz 
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers-all
+# AD719x-ASDZ HDL Project
+
+  * Evaluation board product pages:
+    * [EVAL-AD7190](https://www.analog.com/eval-ad7190)
+    * [EVAL-AD7193](https://www.analog.com/eval-ad7193)
+    * [EVAL-AD7195](https://www.analog.com/eval-ad7195)
+  * System documentation: https://wiki.analog.com/resources/eval/adc/ad719x_asdz 
+  * HDL project documentation: [source code](../../docs/projects/ad719x_asdz/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad719x_asdz/index.html)
+
+## Supported parts
+
+| Part name                               | Resolution | Description                                      |
+|-----------------------------------------|:----------:|--------------------------------------------------|
+| [AD7190](https://www.analog.com/ad7190) | 24-bit     | 4.8 kHz Ultralow Noise, Sigma-Delta ADC with PGA |
+| [AD7193](https://www.analog.com/ad7193) | 24-bit     | 4-Channel, 4.8 kHz, Ultralow Noise, Sigma-Delta ADC with PGA |
+| [AD7195](https://www.analog.com/ad7195) | 24-bit     | 4.8 kHz, Ultralow Noise, Sigma-Delta ADC with PGA and AC Excitation |
+
+## Building the project
+
+This project is supported only on FPGA Xilinx Cora Z7S.
+
+```
+hdl/projects/ad719x_asdz/cora> make
+```
\ No newline at end of file
diff --git a/projects/ad738x_fmc/Readme.md b/projects/ad738x_fmc/Readme.md
index ad1b9a741a..84fd5e5469 100755
--- a/projects/ad738x_fmc/Readme.md
+++ b/projects/ad738x_fmc/Readme.md
@@ -1,37 +1,54 @@
-# AD738X-FMC HDL Project
-
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad738xfmcz)
-  * Parts : [AD7380, 4MSPS Dual Simultaneous Sampling, 16-BIT SAR ADC, Differential Input](https://www.analog.com/ad7380)
-  * Parts : [AD7380-4, 4MSPS Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC, Differential Input](https://www.analog.com/ad7380-4)
-  * Parts : [AD7381, 4MSPS Dual Simultaneous Sampling, 14-BIT SAR ADC, Differential Input](https://www.analog.com/ad7381)
-  * Parts : [AD7381-4, 4MSPS Quad, 14-Bit, Simultaneous Sampling, SAR ADC, Differential Input](https://www.analog.com/ad7381-4)
-  * Parts : [AD7383-4, 4MSPS Quad, Simultaneous Sampling, 16-Bit, SAR ADC, Pseudo Differential Input](https://www.analog.com/ad7383-4)
-  * Parts : [AD7384-4, 4MSPS Quad, Simultaneous Sampling, 14-Bit, SAR ADC, Pseudo Differential Input](https://www.analog.com/ad7384-4)
-  * Parts : [AD7386, 4-Channel, 4 MSPS, 16-Bit Dual Simultaneous Sampling SAR ADC](https://www.analog.com/ad7386)
-  * Parts : [AD7387, 4-Channel, 4 MSPS, 14-Bit, Dual, Simultaneous Sampling SAR ADC](https://www.analog.com/ad7387)
-  * Parts : [AD7388, 4-Channel, 4 MSPS, 12-Bit, Dual, Simultaneous Sampling SAR ADCs](https://www.analog.com/ad7388)
-  * Parts : [AD7389-4, 4MSPS Quad, Internal Reference Simultaneous Sampling, 16-Bit SAR ADC, Differential Input](https://www.analog.com/ad7389-4)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad738x
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad738x
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad738x
-# Building, Generating Bit Files
-
-How to use over-writable parameters from the environment:
+# AD738x-FMC HDL Project
+
+  * Evaluation board product page: [EVAL-AD738x-FMCZ](https://www.analog.com/eval-ad738xfmcz)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/ad738x
+  * HDL project documentation: [source code](../../docs/projects/ad738x_fmc/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad738x_fmc/index.html)
+
+## Supported parts
+
+| Part name                                   | Resolution | Description                                                      |
+|---------------------------------------------|:----------:|------------------------------------------------------------------|
+| [AD7380](https://www.analog.com/ad7380)     | 16-bit     | 4MSPS Dual Simultaneous Sampling, SAR ADC, Differential Input |
+| [AD7380-4](https://www.analog.com/ad7380-4) | 16-bit     | 4MSPS Quad, External Reference Simultaneous Sampling, SAR ADC, Differential Input |
+| [AD7381](https://www.analog.com/ad7381)     | 14-bit     | 4MSPS Dual Simultaneous Sampling, SAR ADC, Differential Input |
+| [AD7381-4](https://www.analog.com/ad7381-4) | 14-bit     | 4MSPS Quad, Simultaneous Sampling, SAR ADC, Differential Input |
+| [AD7383-4](https://www.analog.com/ad7383-4) | 16-bit     | 4MSPS Quad, Simultaneous Sampling, SAR ADC, Pseudo Differential Input |
+| [AD7384-4](https://www.analog.com/ad7384-4) | 14-bit     | 4MSPS Quad, Simultaneous Sampling, SAR ADC, Pseudo Differential Input |
+| [AD7386](https://www.analog.com/ad7386)     | 16-bit     | 4-Channel, 4 MSPS, Dual Simultaneous Sampling SAR ADC |
+| [AD7387](https://www.analog.com/ad7387)     | 14-bit     | 4-Channel, 4 MSPS, Dual, Simultaneous Sampling SAR ADC |
+| [AD7388](https://www.analog.com/ad7388)     | 12-bit     | 4-Channel, 4 MSPS, Dual, Simultaneous Sampling SAR ADCs |
+| [AD7389-4](https://www.analog.com/ad7389-4) | 16-bit     | 4MSPS Quad, Internal Reference Simultaneous Sampling, SAR ADC, Differential Input |
+
+## Building the project
+
+This project is supported only on FPGA Avnet ZedBoard.
+
+How to use overwritable parameters from the environment:
+
+**ALERT_SPI_N** - SDOB-SDOD/ALERT pin can operate as a serial data output pin or alert indication output depending on its value:
+  * 0 - SDOB-SDOD (default option)
+  * 1 - ALERT
+
+**NUM_OF_SDI** - defines the number of SDI lines used:
+  * 1 (default option)
+  * 2
+  * 4
+
+> [!NOTE]
+> * For the ALERT functionality, the following parameters will be used in make command: ALERT_SPI_N
+> * For the serial data output functionality, the following parameters will be used in make command: ALERT_SPI_N, NUM_OF_SDI
+
 ```
+// default configuration
+hdl/projects/ad738x_fmc/zed> make
+
+// pin is in SDOB-SDOD and 4 lines of SDI are used
 hdl/projects/ad738x_fmc/zed> make ALERT_SPI_N=0 NUM_OF_SDI=4
 ```
 
-SDOB-SDOD/ALERT pin can operate as a serial data output pin or alert indication output depending on its value:
-* 0 - SDOB-SDOD
-* 1 - ALERT
-
-NUM_OF_SDI - Defines the number of SDI lines used: 1, 2, 4
-
-For the ALERT functionality, the following parameters will be used in make command: ALERT_SPI_N
-For the serial data output functionality, the following parameters will be used in make command: ALERT_SPI_N, NUM_OF_SDI
+### Example configurations
 
-**Example:**
 ```
 make ALERT_SPI_N=0 NUM_OF_SDI=1
 make ALERT_SPI_N=0 NUM_OF_SDI=2
diff --git a/projects/ad777x_ardz/Readme.md b/projects/ad777x_ardz/Readme.md
index c95afbd789..e4ad45c6a1 100644
--- a/projects/ad777x_ardz/Readme.md
+++ b/projects/ad777x_ardz/Readme.md
@@ -1,12 +1,28 @@
 # AD777x-ARDZ HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/EVAL-AD7770-AD7779)
-  * Parts : [AD7771: 8-Channel, 24-Bit, Simultaneous Sampling ADC](https://www.analog.com/AD7771)
-            [AD7779: 8-Channel, 24-Bit, Simultaneous Sampling ADC](https://www.analog.com/ad7779)
-            [AD7770: 8-Channel, 24-Bit, Simultaneous Sampling ADC](https://www.analog.com/AD7770)
-  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad777x-ardz
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad777x-ardz
-             [AXI_AD777x](https://wiki.analog.com/resources/fpga/docs/ad777x)
-  * NO-OS Drivers: [AD777x - No-OS Driver](https://wiki.analog.com/resources/tools-software/uc-drivers/ad7779)
-                   
\ No newline at end of file
+  * Evaluation board product page: [EVAL-AD7770-AD7779](https://www.analog.com/EVAL-AD7770-AD7779)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/ad777x-ardz
+  * HDL project documentation: [source code](../../docs/projects/ad777x_ardz/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad777x_ardz/index.html)
+
+## Supported parts
+
+| Part name                             | Resolution | Description                                  |
+|---------------------------------------|:----------:|----------------------------------------------|
+[AD7770](https://www.analog.com/AD7770) | 24-Bit     | 8-Channel, 32 kSPS Simultaneous Sampling ADC |
+[AD7771](https://www.analog.com/AD7771) | 24-Bit     | 8-Channel, 128 kSPS Simultaneous Sampling ADC |
+[AD7779](https://www.analog.com/ad7779) | 24-Bit     | 8-Channel, 16 kSPS Simultaneous Sampling ADC |
+
+## Building the project
+
+### DE10-Nano
+
+```
+hdl/projects/ad777x_ardz/de10nano> make
+```
+
+### Zed
+
+```
+hdl/projects/ad777x_ardz/zed> make
+```
\ No newline at end of file
diff --git a/projects/ad_gmsl2eth_sl/Readme.md b/projects/ad_gmsl2eth_sl/Readme.md
index 7a86850cb0..92955450f8 100644
--- a/projects/ad_gmsl2eth_sl/Readme.md
+++ b/projects/ad_gmsl2eth_sl/Readme.md
@@ -1,20 +1,28 @@
-# AD-GMSL2ETH-SL HDL Project:
-
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/ad-gmsl2eth-sl)
-  * Parts : [MAX96724, Quad Tunneling GMSL2/1 to CSI-2 Deserializer](https://www.analog.com/max96724)
-  * Parts : [MAX20087, Dual/Quad Camera Power Protectors](https://www.analog.com/max20087)
-  * Parts : [AD9545, Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and Jitter Cleaner](https://www.analog.com/ad9545)
-  * Parts : [ADM7154, 600 mA, Ultralow Noise, High PSRR, RF Linear Regulator](https://www.analog.com/adm7154)
-  * Parts : [MAX31827, Low-Power Temperature Switch with I2C Interface](https://www.analog.com/max31827)
-  * Parts : [LTC3303, 5V, 4A Synchronous Step-Down Regulator in 2mm × 2mm FCQFN](https://www.analog.com/ltc3303)
-  * Parts : [MAX25206, Versatile Automotive 60V/70V 2.2MHz Buck Controller with 7µA IQ and Optional Bypass Mode ](https://www.analog.com/max25206)
-  * Parts : [MAX17573, 4.5V to 60V, 3.5A, High-Efficiency, Synchronous Step-Down DC-DC Converter with Internal Compensation](https://www.analog.com/max17573)
-  * Parts : [LTC4355, Positive High Voltage Ideal Diode-OR with Input Supply and Fuse Monitors](https://www.analog.com/ltc4355)
-
-## Building, Generating Bit Files
+# AD-GMSL2ETH-SL HDL Project
+
+  * Evaluation board product page: [AD-GMSL2ETH-SL](https://www.analog.com/ad-gmsl2eth-sl)
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/ad-gmsl2eth-sl-guide
+  * HDL project documentation: [source code](../../docs/projects/ad_gmsl2eth_sl/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/ad_gmsl2eth_sl/index.html)
+
+## Involved parts
+
+| Part name                                   | Description                                  |
+|---------------------------------------------|----------------------------------------------|
+| [MAX96724](https://www.analog.com/max96724) | Quad Tunneling GMSL2/1 to CSI-2 Deserializer |
+| [MAX20087](https://www.analog.com/max20087) | Dual/Quad Camera Power Protectors |
+| [AD9545](https://www.analog.com/ad9545)     | Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and Jitter Cleaner |
+| [ADM7154](https://www.analog.com/adm7154)   | 600 mA, Ultralow Noise, High PSRR, RF Linear Regulator |
+| [MAX31827](https://www.analog.com/max31827) | Low-Power Temperature Switch with I2C Interface |
+| [LTC3303](https://www.analog.com/ltc3303)   | 5V, 4A Synchronous Step-Down Regulator in 2mm × 2mm FCQFN |
+| [MAX25206](https://www.analog.com/max25206) | Versatile Automotive 60V/70V 2.2MHz Buck Controller with 7µA IQ and Optional Bypass Mode |
+| [MAX17573](https://www.analog.com/max17573) | 4.5V to 60V, 3.5A, High-Efficiency, Synchronous Step-Down DC-DC Converter with Internal Compensation |
+| [LTC4355](https://www.analog.com/ltc4355)   | Positive High Voltage Ideal Diode-OR with Input Supply and Fuse Monitors |
+
+## Building and generating the bit files
 
 This project uses [Corundum NIC](https://github.com/corundum/corundum) and it needs to be cloned alongside this repository.
+This project is supported only on FPGA AMD Xilinx K26.
 
 ```
 hdl/../> git clone https://github.com/corundum/corundum.git
diff --git a/projects/ad_quadmxfe1_ebz/Readme.md b/projects/ad_quadmxfe1_ebz/Readme.md
index f4456be18a..27f2bacc9c 100644
--- a/projects/ad_quadmxfe1_ebz/Readme.md
+++ b/projects/ad_quadmxfe1_ebz/Readme.md
@@ -1,21 +1,43 @@
 # QUAD-MxFE Platform HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/quad-mxfe)
-  * Parts :
-           * MxFE
-            [Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC](https://www.analog.com/AD9081)
-            [Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC](https://www.analog.com/ad9082)
-           * ADF4371
-            [Microwave Wideband Synthesizer with Integrated VCO](https://www.analog.com/adf4371)
-           * HMC7043
-            [High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C](https://www.analog.com/hmc7043)
-           * LTM4633
-            [Triple 10A Step-Down DC/DC μModule (Power Module) Regulator](https://www.analog.com/ltm4633)
-           * LTM8063
-            [40 VIN, 2A Silent Switcher µModule Regulator](https://www.analog.com/ltm8063)
-           * LTM8053
-            [40 VIN, 3.5A/6A Step-Down Silent Switcher μModule Regulator](https://www.analog.com/ltm8053)
-  * Project Doc : https://wiki.analog.com/resources/eval/user-guides/quadmxfe
-  * HDL Doc : https://wiki.analog.com/resources/eval/user-guides/ad_quadmxfe1_ebz/ad_quadmxfe1_ebz_hdl
-  * Linux Drivers : https://wiki.analog.com/resources/eval/user-guides/quadmxfe/quick-start
+  * Evaluation board product page: [QUAD-MxFE](https://www.analog.com/quad-mxfe)
+  * User guide: https://wiki.analog.com/resources/eval/user-guides/quadmxfe
+  * System documentation: https://wiki.analog.com/resources/eval/user-guides/quadmxfe/quick-start
+  * HDL project documentation: [on wiki](https://wiki.analog.com/resources/eval/user-guides/ad_quadmxfe1_ebz/ad_quadmxfe1_ebz_hdl)
+
+## Involved parts
+
+| Part name                                      | Description                                                  |
+|------------------------------------------------|--------------------------------------------------------------|
+| [AD9081 (MxFE)](https://www.analog.com/ad9081) | Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC |
+| [AD9082 (MxFE)](https://www.analog.com/ad9082) | Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC |
+| [ADF4371](https://www.analog.com/adf4371)      | Microwave Wideband Synthesizer with Integrated VCO |
+| [HMC7043](https://www.analog.com/hmc7043)      | High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C |
+| [LTM4633](https://www.analog.com/ltm4633)      | Triple 10A Step-Down DC/DC μModule (Power Module) Regulator | 
+| [LTM8063](https://www.analog.com/ltm8063)      | 40 VIN, 2A Silent Switcher µModule Regulator | 
+| [LTM8053](https://www.analog.com/ltm8053)      | 40 VIN, 3.5A/6A Step-Down Silent Switcher μModule Regulator | 
+
+## Building the project
+
+This project is supported only on FPGA AMD Xilinx VCU118.
+
+This project is parameterized, and it can have many configurations.
+For detailed information, check the HDL project documentation.
+
+The parameters configurable through the `make` command, can be found in the **system_project.tcl** file;
+it contains the default configuration.
+
+```
+// default configuration
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make
+```
+
+### Example configurations
+
+```
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make JESD_MODE=8B10B  RX_JESD_L=4 RX_JESD_M=8 TX_JESD_L=4 TX_JESD_M=8
+
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make JESD_MODE=64B66B RX_JESD_L=2 RX_JESD_M=8 TX_JESD_L=4 TX_JESD_M=16
+
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make JESD_MODE=64B66B RX_LANE_RATE=24.75 TX_LANE_RATE=24.75 REF_CLK_RATE=250 RX_JESD_M=4 RX_JESD_L=4 RX_JESD_S=2 RX_JESD_NP=12 TX_JESD_M=4 TX_JESD_L=4 TX_JESD_S=2 TX_JESD_NP=12 RX_PLL_SEL=1 TX_PLL_SEL=1
+```
diff --git a/projects/common/README.md b/projects/common/README.md
new file mode 100755
index 0000000000..619c9841d5
--- /dev/null
+++ b/projects/common/README.md
@@ -0,0 +1,72 @@
+# TEMPLATE HDL Project
+
+  * Evaluation board product page: [EVAL-AD400x-FMCZ](https://www.analog.com/eval-ad400x-fmcz)
+  * System documentation: https://wiki.analog.com/resources/eval/10-lead-pulsar-adc-evaluation-board
+  * HDL project documentation: [source code](../../docs/projects/pulsar_adc/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/pulsar_adc/index.html)
+
+## Supported parts
+
+| Part name                                   | Resolution | On CoraZ7S | On Zed | Description                                                      |
+|---------------------------------------------|:----------:|:----------:|:------:|------------------------------------------------------------------|
+| [AD4000](https://www.analog.com/ad4000)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+
+## Involved parts (if applicable)
+
+| Part name                                      | Description                                                  |
+|------------------------------------------------|--------------------------------------------------------------|
+| [AD9081 (MxFE)](https://www.analog.com/ad9081) | Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC |
+| [AD9082 (MxFE)](https://www.analog.com/ad9082) | Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC |
+| [ADF4371](https://www.analog.com/adf4371)      | Microwave Wideband Synthesizer with Integrated VCO |
+| [HMC7043](https://www.analog.com/hmc7043)      | High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C |
+
+## Building the project
+
+:warning: Make sure that you set up your required ADC resolution in [../common/pulsar_adc_bd.tcl](../common/pulsar_adc_bd.tcl)
+
+> [!NOTE]
+> * For the ALERT functionality, the following parameters will be used in make command: ALERT_SPI_N
+
+This project is supported only on FPGA AMD Xilinx VCU118.
+
+This project is parameterized, and it can have many configurations.
+For detailed information, check the HDL project documentation.
+
+The parameters configurable through the `make` command, can be found in the **system_project.tcl** file;
+it contains the default configuration.
+
+```
+// default configuration
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make
+```
+
+### Example configurations
+
+```
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make JESD_MODE=8B10B  RX_JESD_L=4 RX_JESD_M=8 TX_JESD_L=4 TX_JESD_M=8
+
+hdl/projects/ad_quadmxfe1_ebz/vcu118> make JESD_MODE=64B66B RX_JESD_L=2 RX_JESD_M=8 TX_JESD_L=4 TX_JESD_M=16
+```
+
+### CoraZ7S
+
+```
+// default configuration
+hdl/projects/pulsar_adc/coraz7s> make
+```
+
+### Zed
+
+How to use overwritable parameter from the environment:
+
+**AD40XX_ADAQ400X_N** - selects the evaluation board to be used:
+  * 1 - EVAL-AD40XX-FMCZ (default option)
+  * 0 - EVAL-ADAQ400x
+
+```
+// default option (1), building project for EVAL-AD40XX-FMCZ
+hdl/projects/pulsar_adc/zed> make AD40XX_ADAQ400X_N
+
+// building project for EVAL-ADAQ400x
+hdl/projects/pulsar_adc/zed> make AD40XX_ADAQ400X_N=0
+```
diff --git a/projects/pulsar_adc/Readme.md b/projects/pulsar_adc/Readme.md
index 4abfe5c599..0a325db369 100755
--- a/projects/pulsar_adc/Readme.md
+++ b/projects/pulsar_adc/Readme.md
@@ -1,68 +1,64 @@
-# PULSAR_ADC HDL Project
+# PULSAR-ADC HDL Project
 
-Here are some pointers to help you:
-  * [Board Product Page](https://www.analog.com/eval-ad400x-fmcz)
-  * Parts : [AD7942:   14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/LFCSP](https://www.analog.com/ad7942)
-  * Parts : [AD7946:   14-Bit, 500 kSPS PulSAR ADC in MSOP](https://www.analog.com/ad7946)
-  * Parts : [AD7988-1: 16-Bit Lower Power PulSAR ADCs in MSOP/LFCSP](https://www.analog.com/ad7988-1)
-  * Parts : [AD7685:   16-Bit, 250 kSPS PulSAR ADC in MSOP/QFN](https://www.analog.com/ad7685)
-  * Parts : [AD7687:   16-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN](https://www.analog.com/ad7687)
-  * Parts : [AD7691:   18-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN](https://www.analog.com/ad7691)
-  * Parts : [AD7686:   500 kSPS 16-BIT PulSAR A/D Converter in MSOP/QFN](https://www.analog.com/ad7686)
-  * Parts : [AD7688:   500 kSPS 16- BIT Differential PulSAR A/D Converter in µSOIC/QFN](https://www.analog.com/ad7688)
-  * Parts : [AD7693:   16-Bit, ±0.5 LSB, 500 kSPS PulSAR Differential A/D Converter in MSOP/QFN](https://www.analog.com/ad7693)
-  * Parts : [AD7988-5: 16-Bit Lower Power PulSAR ADCs in MSOP/LFCSP](https://www.analog.com/ad7988-5)
-  * Parts : [AD7980:   16-Bit, 1 MSPS, PulSAR ADC in MSOP/LFCSP](https://www.analog.com/ad7980)
-  * Parts : [AD7983:   16-Bit, 1.33 MSPS PulSAR ADC in MSOP/LFCSP](https://www.analog.com/ad7983)
-  * Parts : [AD7690:   18-Bit, 1.5 LSB INL, 400 kSPS PulSAR Differential ADC in MSOP/QFN](https://www.analog.com/ad7690)
-  * Parts : [AD7689:   16-Bit, 8-Channel, 250 kSPS PulSAR ADC](https://www.analog.com/ad7689)
-  * Parts : [AD4000:   16-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4000)
-  * Parts : [AD4001:   16-Bit, 2 MSPS/1 MSPS, Precision, Differential SAR ADCs](https://www.analog.com/ad4001)
-  * Parts : [AD4002:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4002)
-  * Parts : [AD4003:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs](https://www.analog.com/ad4003)
-  * Parts : [AD4004:   16-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4004)
-  * Parts : [AD4005:   16-Bit, 2 MSPS/1 MSPS, Precision, Differential SAR ADCs](https://www.analog.com/ad4005)
-  * Parts : [AD4006:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4006)
-  * Parts : [AD4007:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs](https://www.analog.com/ad4007)
-  * Parts : [AD4008:   16-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4008)
-  * Parts : [AD4010:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs](https://www.analog.com/ad4010)
-  * Parts : [AD4011:   18-Bit, 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs](https://www.analog.com/ad4011)
-  * Parts : [ADAQ4003: 18-Bit, 2 MSPS, Precision DAQ, Differential SAR ADCs](https://www.analog.com/adaq4003)
-  * Parts : [AD4020:   20-Bit, 1.8 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs](https://www.analog.com/ad4020)
-
-  * Project Doc: https://wiki.analog.com/resources/eval/10-lead-pulsar-adc-evaluation-board
-  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/pulsar_adc_pmods_hdl
-  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad7476a
+  * Evaluation board product page: [EVAL-AD400x-FMCZ](https://www.analog.com/eval-ad400x-fmcz)
+  * System documentation: https://wiki.analog.com/resources/eval/10-lead-pulsar-adc-evaluation-board
+  * HDL project documentation: [source code](../../docs/projects/pulsar_adc/index.rst)
+    or [online](http://analogdevicesinc.github.io/hdl/projects/pulsar_adc/index.html)
 
 ## Supported parts
 
-  * AD7942
-  * AD7946
-  * AD7988-1
-  * AD7685
-  * AD7687
-  * AD7691
-  * AD7686
-  * AD7688
-  * AD7693
-  * AD7988-5
-  * AD7980
-  * AD7983
-  * AD7690
-  * AD7982
-  * AD7984
-  * AD7682
-  * AD7689
-  * AD4000
-  * AD4001
-  * AD4002
-  * AD4003
-  * AD4004
-  * AD4005
-  * AD4006
-  * AD4007
-  * AD4008
-  * AD4010
-  * AD4011
-  * ADAQ4003
-  * AD4020
\ No newline at end of file
+| Part name                                   | Resolution | On CoraZ7S | On Zed | Description                                                      |
+|---------------------------------------------|:----------:|:----------:|:------:|------------------------------------------------------------------|
+| [AD4000](https://www.analog.com/ad4000)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4001](https://www.analog.com/ad4001)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS, Precision, Differential SAR ADCs |
+| [AD4002](https://www.analog.com/ad4002)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4003](https://www.analog.com/ad4003)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs |
+| [AD4004](https://www.analog.com/ad4004)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4005](https://www.analog.com/ad4005)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS, Precision, Differential SAR ADCs |
+| [AD4006](https://www.analog.com/ad4006)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4007](https://www.analog.com/ad4007)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs |
+| [AD4008](https://www.analog.com/ad4008)     | 16-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4010](https://www.analog.com/ad4010)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs |
+| [AD4011](https://www.analog.com/ad4011)     | 18-bit     |            | Yes    | 2 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs |
+| [AD4020](https://www.analog.com/ad4020)     | 20-bit     |            | Yes    | 1.8 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs |
+| [ADAQ4003](https://www.analog.com/adaq4003) | 18-bit     |            | Yes    | 2 MSPS, Precision DAQ, Differential SAR ADCs |
+| [AD7685](https://www.analog.com/ad7685)     | 16-bit     | Yes        |        | 250 kSPS PulSAR ADC in MSOP/QFN |
+| [AD7686](https://www.analog.com/ad7686)     | 16-bit     | Yes        |        | 500 kSPS PulSAR A/D Converter in MSOP/QFN |
+| [AD7687](https://www.analog.com/ad7687)     | 16-bit     | Yes        |        | 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN |
+| [AD7688](https://www.analog.com/ad7688)     | 16-bit     | Yes        |        | 500 kSPS Differential PulSAR A/D Converter in µSOIC/QFN |
+| [AD7689](https://www.analog.com/ad7689)     | 16-bit     | Yes        |        | 8-Channel, 250 kSPS PulSAR ADC |
+| [AD7690](https://www.analog.com/ad7690)     | 18-bit     | Yes        |        | 1.5 LSB INL, 400 kSPS PulSAR Differential ADC in MSOP/QFN |
+| [AD7691](https://www.analog.com/ad7691)     | 18-bit     | Yes        |        | 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN |
+| [AD7693](https://www.analog.com/ad7693)     | 16-bit     | Yes        |        | ±0.5 LSB, 500 kSPS PulSAR Differential A/D Converter in MSOP/QFN |
+| [AD7942](https://www.analog.com/ad7942)     | 14-bit     | Yes        |        | 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/LFCSP |
+| [AD7946](https://www.analog.com/ad7946)     | 14-bit     | Yes        |        | 500 kSPS PulSAR ADC in MSOP |
+| [AD7980](https://www.analog.com/ad7980)     | 16-bit     | Yes        |        | 1 MSPS, PulSAR ADC in MSOP/LFCSP |
+| [AD7983](https://www.analog.com/ad7983)     | 16-bit     | Yes        |        | 1.33 MSPS PulSAR ADC in MSOP/LFCSP |
+| [AD7988-1](https://www.analog.com/ad7988-1) | 16-bit     | Yes        |        | Lower Power PulSAR ADCs in MSOP/LFCSP |
+| [AD7988-5](https://www.analog.com/ad7988-5) | 16-bit     | Yes        |        | Lower Power PulSAR ADCs in MSOP/LFCSP |
+
+## Building the project
+
+:warning: Make sure that you set up your required ADC resolution in [../common/pulsar_adc_bd.tcl](../common/pulsar_adc_bd.tcl)
+
+### CoraZ7S
+
+```
+hdl/projects/pulsar_adc/coraz7s> make
+```
+
+### Zed
+
+How to use overwritable parameter from the environment:
+
+**AD40XX_ADAQ400X_N** - selects the evaluation board to be used:
+  * 1 - EVAL-AD40XX-FMCZ (default option)
+  * 0 - EVAL-ADAQ400x
+
+```
+// default option (1), building project for EVAL-AD40XX-FMCZ
+hdl/projects/pulsar_adc/zed> make AD40XX_ADAQ400X_N
+
+// building project for EVAL-ADAQ400x
+hdl/projects/pulsar_adc/zed> make AD40XX_ADAQ400X_N=0
+```