From 615f523ef41d1b1c87dad8775e7273f6990daa58 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Tue, 29 Oct 2024 13:37:03 -0700 Subject: [PATCH] pass no_split_complex_ports to hierarchy command --- frontends/verific/verific.cc | 7 ++++--- frontends/verific/verific.h | 2 +- passes/hierarchy/hierarchy.cc | 9 +++++++-- 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 9c7b6d93778..56f3fcf3116 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -2938,7 +2938,7 @@ void verific_cleanup() verific_import_pending = false; } -std::string verific_import(Design *design, const std::map ¶meters, std::string top, bool opt) +std::string verific_import(Design *design, const std::map ¶meters, std::string top, bool opt, bool no_split_complex_port) { verific_sva_fsm_limit = 16; @@ -2964,8 +2964,9 @@ std::string verific_import(Design *design, const std::mapChangePortBusStructures(1 /* hierarchical */); + if (!no_split_complex_port) + for (auto nl : nl_todo) + nl.second->ChangePortBusStructures(1 /* hierarchical */); VerificExtNets worker; for (auto nl : nl_todo) diff --git a/frontends/verific/verific.h b/frontends/verific/verific.h index 77d9c3e6eef..65c3bfb7cd1 100644 --- a/frontends/verific/verific.h +++ b/frontends/verific/verific.h @@ -27,7 +27,7 @@ YOSYS_NAMESPACE_BEGIN extern int verific_verbose; extern bool verific_import_pending; -extern std::string verific_import(Design *design, const std::map ¶meters, std::string top = std::string(), bool opt = true); +extern std::string verific_import(Design *design, const std::map ¶meters, std::string top = std::string(), bool opt = true, bool no_split_complex_ports = true); extern pool verific_sva_prims; diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index aeb748b3cbb..641eb7d7f09 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -825,6 +825,7 @@ struct HierarchyPass : public Pass { log_header(design, "Executing HIERARCHY pass (managing design hierarchy).\n"); bool flag_opt = false; + bool flag_no_split_complex_ports = false; bool flag_check = false; bool flag_simcheck = false; bool flag_smtcheck = false; @@ -940,6 +941,10 @@ struct HierarchyPass : public Pass { flag_opt = true; continue; } + if (args[argidx] == "-no_split_complex_ports") { + flag_no_split_complex_ports = true; + continue; + } if (args[argidx] == "-chparam" && argidx+2 < args.size()) { const std::string &key = args[++argidx]; const std::string &value = args[++argidx]; @@ -989,7 +994,7 @@ struct HierarchyPass : public Pass { if (top_mod == nullptr && !load_top_mod.empty()) { #ifdef YOSYS_ENABLE_VERIFIC if (verific_import_pending) { - load_top_mod = verific_import(design, parameters, load_top_mod, flag_opt); + load_top_mod = verific_import(design, parameters, load_top_mod, flag_opt, flag_no_split_complex_ports); top_mod = design->module(RTLIL::escape_id(load_top_mod)); } #endif @@ -998,7 +1003,7 @@ struct HierarchyPass : public Pass { } else { #ifdef YOSYS_ENABLE_VERIFIC if (verific_import_pending) - verific_import(design, parameters, std::string(), flag_opt); + verific_import(design, parameters, std::string(), flag_opt, flag_no_split_complex_ports); #endif }