From 920bd8a872ef552b36c4bb6e5525efe89ce2b03f Mon Sep 17 00:00:00 2001 From: lorne smith Date: Tue, 16 Jun 2020 18:23:35 -0500 Subject: [PATCH] June 16, 2020 Release (file set 2) --- Libraries/Boards/MAX78000/Include/pb.h | 2 +- Libraries/Boards/MAX78000/Include/s26k.h | 6 +- Libraries/PeriphDrivers/Source/ADC/adc_reva.c | 4 - Libraries/PeriphDrivers/Source/AES/aes_revb.c | 8 +- Libraries/PeriphDrivers/Source/AES/aes_revb.h | 3 +- .../Source/CAMERAIF/cameraif_reva.c | 50 +- Libraries/PeriphDrivers/Source/CRC/crc_me17.c | 30 +- .../PeriphDrivers/Source/CTB/ctb_common.c | 8 +- Libraries/PeriphDrivers/Source/CTB/ctb_reva.c | 462 ++++++++-------- Libraries/PeriphDrivers/Source/CTB/ctb_reva.h | 4 +- Libraries/PeriphDrivers/Source/DMA/dma_me17.c | 84 +-- Libraries/PeriphDrivers/Source/DMA/dma_reva.c | 180 +++--- .../PeriphDrivers/Source/EMAC/emac_reva.c | 318 +++++------ .../PeriphDrivers/Source/FLC/flc_common.c | 44 +- Libraries/PeriphDrivers/Source/FLC/flc_me17.c | 186 +++---- Libraries/PeriphDrivers/Source/FLC/flc_reva.c | 76 +-- .../PeriphDrivers/Source/HTMR/htmr_reva.c | 108 ++-- Libraries/PeriphDrivers/Source/I2S/i2s_reva.c | 6 +- Libraries/PeriphDrivers/Source/I2S/i2s_reva.h | 4 +- .../PeriphDrivers/Source/ICC/icc_common.c | 2 +- Libraries/PeriphDrivers/Source/ICC/icc_me17.c | 14 +- Libraries/PeriphDrivers/Source/ICC/icc_reva.c | 18 +- Libraries/PeriphDrivers/Source/LP/lp_me17.c | 92 ++-- Libraries/PeriphDrivers/Source/OWM/owm_reva.c | 180 +++--- Libraries/PeriphDrivers/Source/PT/pt_me17.c | 80 +-- Libraries/PeriphDrivers/Source/PT/pt_reva.c | 78 +-- Libraries/PeriphDrivers/Source/RTC/rtc_me17.c | 52 +- Libraries/PeriphDrivers/Source/RTC/rtc_reva.c | 48 +- .../PeriphDrivers/Source/SDHC/sdhc_reva.c | 108 ++-- .../PeriphDrivers/Source/SEMA/sema_me17.c | 18 +- .../PeriphDrivers/Source/SEMA/sema_reva.c | 14 +- Libraries/PeriphDrivers/Source/SFE/sfe_reva.c | 6 +- .../PeriphDrivers/Source/SKBD/skbd_reva.c | 52 +- .../PeriphDrivers/Source/SPIXF/spixf_reva.c | 516 +++++++++--------- .../PeriphDrivers/Source/SPIXR/spixr_reva.c | 214 ++++---- .../PeriphDrivers/Source/SRCC/srcc_reva.c | 10 +- .../PeriphDrivers/Source/SYS/mxc_assert.c | 2 +- Libraries/PeriphDrivers/Source/SYS/mxc_lock.c | 8 +- .../PeriphDrivers/Source/SYS/nvic_table.c | 20 +- .../PeriphDrivers/Source/TMR/tmr_common.c | 42 +- Libraries/PeriphDrivers/Source/TMR/tmr_reva.c | 70 +-- .../PeriphDrivers/Source/TRNG/trng_revb.c | 41 +- .../PeriphDrivers/Source/TRNG/trng_revb.h | 3 +- .../PeriphDrivers/Source/UART/uart_common.c | 12 +- .../PeriphDrivers/Source/UART/uart_reva.c | 488 ++++++++--------- Libraries/PeriphDrivers/Source/WDT/wdt_me17.c | 72 +-- Libraries/PeriphDrivers/Source/WDT/wdt_reva.c | 40 +- Libraries/PeriphDrivers/Source/WDT/wdt_revb.c | 68 +-- Libraries/PeriphDrivers/Source/WUT/wut_me17.c | 12 +- 49 files changed, 1986 insertions(+), 1977 deletions(-) diff --git a/Libraries/Boards/MAX78000/Include/pb.h b/Libraries/Boards/MAX78000/Include/pb.h index 262e40016..0dd052b9c 100644 --- a/Libraries/Boards/MAX78000/Include/pb.h +++ b/Libraries/Boards/MAX78000/Include/pb.h @@ -73,7 +73,7 @@ int PB_Init(void); * @param pb Pointer to the push button index that triggered the * callback. */ -typedef void (*pb_callback)(void *pb); +typedef void (*pb_callback)(void* pb); /** * @brief Register or Unregister a callback handler for events on the @p pb push button. diff --git a/Libraries/Boards/MAX78000/Include/s26k.h b/Libraries/Boards/MAX78000/Include/s26k.h index 80f45f15f..381363683 100644 --- a/Libraries/Boards/MAX78000/Include/s26k.h +++ b/Libraries/Boards/MAX78000/Include/s26k.h @@ -112,7 +112,7 @@ int S26K_Write16(uint32_t addr, uint16_t data); * @param len Number of bytes to write. * @returns #E_NO_ERROR if erase succeeded. #E_UNKNOWN otherwise. */ -int S26K_Write(uint32_t addr, uint16_t *data, unsigned len); +int S26K_Write(uint32_t addr, uint16_t* data, unsigned len); /** * @brief Read the s26k ID. @@ -120,7 +120,7 @@ int S26K_Write(uint32_t addr, uint16_t *data, unsigned len); * @param data Pointer to store the ID. * @param len Number of ID bytes to read. */ -void S26K_GetID(uint32_t offset, uint16_t *data, unsigned len); +void S26K_GetID(uint32_t offset, uint16_t* data, unsigned len); /** * @brief Read the s26k CFI. @@ -128,7 +128,7 @@ void S26K_GetID(uint32_t offset, uint16_t *data, unsigned len); * @param data Pointer to store the CFI. * @param len Number of CFI bytes to read. */ -void S26K_GetCFI(uint32_t offset, uint16_t *data, unsigned len); +void S26K_GetCFI(uint32_t offset, uint16_t* data, unsigned len); uint16_t S26K_GetSectorProtection(uint32_t addr); diff --git a/Libraries/PeriphDrivers/Source/ADC/adc_reva.c b/Libraries/PeriphDrivers/Source/ADC/adc_reva.c index 6e64ffa62..09a049ca0 100644 --- a/Libraries/PeriphDrivers/Source/ADC/adc_reva.c +++ b/Libraries/PeriphDrivers/Source/ADC/adc_reva.c @@ -77,8 +77,6 @@ int MXC_ADC_RevA_Init(void) MXC_ADC->ctrl |= MXC_F_ADC_CTRL_PWR; //turn on reference buffer power MXC_ADC->ctrl |= MXC_F_ADC_CTRL_REFBUF_PWR; - //turn on charge pump enable - MXC_ADC->ctrl |= MXC_F_ADC_CTRL_CHGPUMP_PWR; //wait until hardware set adc_intr.ref_ready_if to 1 while (!(MXC_ADC->intr & MXC_F_ADC_INTR_REF_READY_IF)); @@ -104,8 +102,6 @@ int MXC_ADC_RevA_Shutdown(void) MXC_ADC->ctrl &= ~MXC_F_ADC_CTRL_PWR; // Disable Reference Buffer Power MXC_ADC->ctrl &= ~MXC_F_ADC_CTRL_REFBUF_PWR; - // Disable ADC Charge Pump - MXC_ADC->ctrl &= ~MXC_F_ADC_CTRL_CHGPUMP_PWR; // Disable ADC Clock MXC_ADC->ctrl &= ~MXC_F_ADC_CTRL_CLK_EN; diff --git a/Libraries/PeriphDrivers/Source/AES/aes_revb.c b/Libraries/PeriphDrivers/Source/AES/aes_revb.c index 7ac41f68b..08661a533 100644 --- a/Libraries/PeriphDrivers/Source/AES/aes_revb.c +++ b/Libraries/PeriphDrivers/Source/AES/aes_revb.c @@ -131,12 +131,18 @@ void MXC_AES_RevB_Start() MXC_AES->ctrl |= MXC_F_AES_CTRL_START; } -void MXC_AES_RevB_IntEnable(uint32_t interrupt) +void MXC_AES_RevB_EnableInt(uint32_t interrupt) { MXC_AES->inten |= (interrupt & (MXC_F_AES_INTEN_DONE | MXC_F_AES_INTEN_KEY_CHANGE | \ MXC_F_AES_INTEN_KEY_ZERO | MXC_F_AES_INTEN_OV)); } +void MXC_AES_RevB_DisableInt(uint32_t interrupt) +{ + MXC_AES->inten &= ~(interrupt & (MXC_F_AES_INTEN_DONE | MXC_F_AES_INTEN_KEY_CHANGE | \ + MXC_F_AES_INTEN_KEY_ZERO | MXC_F_AES_INTEN_OV)); +} + uint32_t MXC_AES_RevB_GetFlags() { return MXC_AES->intfl; diff --git a/Libraries/PeriphDrivers/Source/AES/aes_revb.h b/Libraries/PeriphDrivers/Source/AES/aes_revb.h index 17999abcc..57c4adfb5 100644 --- a/Libraries/PeriphDrivers/Source/AES/aes_revb.h +++ b/Libraries/PeriphDrivers/Source/AES/aes_revb.h @@ -34,7 +34,8 @@ #include "aes.h" int MXC_AES_RevB_Init (); -void MXC_AES_RevB_IntEnable (uint32_t interrupt); +void MXC_AES_RevB_EnableInt (uint32_t interrupt); +void MXC_AES_RevB_DisableInt (uint32_t interrupt); int MXC_AES_RevB_IsBusy (); int MXC_AES_RevB_Shutdown (); void MXC_AES_RevB_GenerateKey(); diff --git a/Libraries/PeriphDrivers/Source/CAMERAIF/cameraif_reva.c b/Libraries/PeriphDrivers/Source/CAMERAIF/cameraif_reva.c index 0a341f982..83fde588d 100644 --- a/Libraries/PeriphDrivers/Source/CAMERAIF/cameraif_reva.c +++ b/Libraries/PeriphDrivers/Source/CAMERAIF/cameraif_reva.c @@ -51,63 +51,63 @@ /* **** Functions **** */ -int MXC_PCIF_RevA_Init (void) +int MXC_PCIF_RevA_Init(void) { - MXC_SYS_ClockEnable (MXC_SYS_PERIPH_CLOCK_PCIF); - MXC_GPIO_Config (&gpio_cfg_pcif_P0); - MXC_GPIO_Config (&gpio_cfg_pcif_P1); - MXC_GPIO_Config (&gpio_cfg_pcif_hsync); - MXC_GPIO_Config (&gpio_cfg_pcif_vsync); - MXC_GPIO_Config (&gpio_cfg_pcif_pclk); - MXC_GPIO_Config (&gpio_cfg_pcif_pwrdwn); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_PCIF); + MXC_GPIO_Config(&gpio_cfg_pcif_P0); + MXC_GPIO_Config(&gpio_cfg_pcif_P1); + MXC_GPIO_Config(&gpio_cfg_pcif_hsync); + MXC_GPIO_Config(&gpio_cfg_pcif_vsync); + MXC_GPIO_Config(&gpio_cfg_pcif_pclk); + MXC_GPIO_Config(&gpio_cfg_pcif_pwrdwn); - MXC_GPIO_OutClr (gpio_cfg_pcif_pwrdwn.port, gpio_cfg_pcif_pwrdwn.mask); + MXC_GPIO_OutClr(gpio_cfg_pcif_pwrdwn.port, gpio_cfg_pcif_pwrdwn.mask); return 0; } -void MXC_PCIF_RevA_SetDatawith (mxc_pcif_datawith_t datawith) +void MXC_PCIF_RevA_SetDatawith(mxc_pcif_datawith_t datawith) { - MXC_CAMERAIF0->ctrl &= ~ (MXC_F_CAMERAIF_CTRL_DATA_WIDTH); + MXC_CAMERAIF0->ctrl &= ~(MXC_F_CAMERAIF_CTRL_DATA_WIDTH); MXC_CAMERAIF0->ctrl |= (datawith << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS); } -void MXC_PCIF_RevA_SetTimingSel (mxc_pcif_timingsel_t timingsel) +void MXC_PCIF_RevA_SetTimingSel(mxc_pcif_timingsel_t timingsel) { - MXC_CAMERAIF0->ctrl &= ~ (MXC_F_CAMERAIF_CTRL_DS_TIMING_EN); + MXC_CAMERAIF0->ctrl &= ~(MXC_F_CAMERAIF_CTRL_DS_TIMING_EN); MXC_CAMERAIF0->ctrl |= (timingsel << MXC_F_CAMERAIF_CTRL_DS_TIMING_EN_POS); } -void MXC_PCIF_RevA_SetTreshhold (int fifo_thrsh) +void MXC_PCIF_RevA_SetTreshhold(int fifo_thrsh) { - MXC_CAMERAIF0->ctrl &= ~ (MXC_F_CAMERAIF_CTRL_FIFO_THRSH); - MXC_CAMERAIF0->ctrl |= ( (fifo_thrsh << MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS) & MXC_F_CAMERAIF_CTRL_FIFO_THRSH); + MXC_CAMERAIF0->ctrl &= ~(MXC_F_CAMERAIF_CTRL_FIFO_THRSH); + MXC_CAMERAIF0->ctrl |= ((fifo_thrsh << MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS) & MXC_F_CAMERAIF_CTRL_FIFO_THRSH); } -void MXC_PCIF_RevA_EnableInt (uint32_t flags) +void MXC_PCIF_RevA_EnableInt(uint32_t flags) { MXC_CAMERAIF0->int_en |= (flags & PCIF_IE_MASK); } -void MXC_PCIF_RevA_DisableInt (uint32_t flags) +void MXC_PCIF_RevA_DisableInt(uint32_t flags) { - MXC_CAMERAIF0->int_en &= ~ (flags & PCIF_IE_MASK); + MXC_CAMERAIF0->int_en &= ~(flags & PCIF_IE_MASK); } -void MXC_PCIF_RevA_Start (mxc_pcif_readmode_t readmode) +void MXC_PCIF_RevA_Start(mxc_pcif_readmode_t readmode) { - MXC_CAMERAIF0->ctrl &= ~ (MXC_F_CAMERAIF_CTRL_READ_MODE); + MXC_CAMERAIF0->ctrl &= ~(MXC_F_CAMERAIF_CTRL_READ_MODE); MXC_CAMERAIF0->ctrl |= (readmode & MXC_F_CAMERAIF_CTRL_READ_MODE); } -void MXC_PCIF_RevA_Stop (void) +void MXC_PCIF_RevA_Stop(void) { - MXC_CAMERAIF0->ctrl &= ~ (MXC_F_CAMERAIF_CTRL_READ_MODE); + MXC_CAMERAIF0->ctrl &= ~(MXC_F_CAMERAIF_CTRL_READ_MODE); } -unsigned int MXC_PCIF_RevA_GetData (void) +unsigned int MXC_PCIF_RevA_GetData(void) { - return (unsigned int) (MXC_CAMERAIF0->fifo_data); + return (unsigned int)(MXC_CAMERAIF0->fifo_data); } diff --git a/Libraries/PeriphDrivers/Source/CRC/crc_me17.c b/Libraries/PeriphDrivers/Source/CRC/crc_me17.c index 678644610..3db651273 100644 --- a/Libraries/PeriphDrivers/Source/CRC/crc_me17.c +++ b/Libraries/PeriphDrivers/Source/CRC/crc_me17.c @@ -44,70 +44,70 @@ /* Global Control/Configuration functions */ /* ************************************************************************* */ -int MXC_CRC_Init (void) +int MXC_CRC_Init(void) { MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_CRC); - + MXC_CRC_RevA_Init(); - + return E_NO_ERROR; } -int MXC_CRC_Shutdown (void) +int MXC_CRC_Shutdown(void) { int error = MXC_CRC_RevA_Shutdown(); MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_CRC); - + return error; } -int MXC_CRC_Handler (int ch, int error) +int MXC_CRC_Handler(int ch, int error) { return MXC_CRC_RevA_Handler(ch, error); } -void MXC_CRC_SetDirection (mxc_crc_bitorder_t bitOrder) +void MXC_CRC_SetDirection(mxc_crc_bitorder_t bitOrder) { MXC_CRC_RevA_SetDirection(bitOrder); } -mxc_crc_bitorder_t MXC_CRC_GetDirection (void) +mxc_crc_bitorder_t MXC_CRC_GetDirection(void) { return MXC_CRC_RevA_GetDirection(); } -void MXC_CRC_SwapDataIn (mxc_crc_bitorder_t bitOrder) +void MXC_CRC_SwapDataIn(mxc_crc_bitorder_t bitOrder) { MXC_CRC_RevA_SwapDataIn(bitOrder); } -void MXC_CRC_SwapDataOut (mxc_crc_bitorder_t bitOrder) +void MXC_CRC_SwapDataOut(mxc_crc_bitorder_t bitOrder) { MXC_CRC_RevA_SwapDataOut(bitOrder); } -void MXC_CRC_SetPoly (uint32_t poly) +void MXC_CRC_SetPoly(uint32_t poly) { MXC_CRC_RevA_SetPoly(poly); } -uint32_t MXC_CRC_GetPoly (void) +uint32_t MXC_CRC_GetPoly(void) { return MXC_CRC_RevA_GetPoly(); } -uint32_t MXC_CRC_GetResult (void) +uint32_t MXC_CRC_GetResult(void) { return MXC_CRC_RevA_GetResult(); } -int MXC_CRC_Compute (mxc_crc_req_t* req) +int MXC_CRC_Compute(mxc_crc_req_t* req) { return MXC_CRC_RevA_Compute(req); } -int MXC_CRC_ComputeAsync (mxc_crc_req_t* req) +int MXC_CRC_ComputeAsync(mxc_crc_req_t* req) { return MXC_CRC_RevA_ComputeAsync(req); } \ No newline at end of file diff --git a/Libraries/PeriphDrivers/Source/CTB/ctb_common.c b/Libraries/PeriphDrivers/Source/CTB/ctb_common.c index fe4fe0f61..d158a7c11 100644 --- a/Libraries/PeriphDrivers/Source/CTB/ctb_common.c +++ b/Libraries/PeriphDrivers/Source/CTB/ctb_common.c @@ -36,7 +36,7 @@ /* ************************************************************************* */ -unsigned int MXC_CTB_Common_Hash_GetBlockSize (mxc_ctb_hash_func_t function) +unsigned int MXC_CTB_Common_Hash_GetBlockSize(mxc_ctb_hash_func_t function) { // Block size in bytes indexed by hash function switch (function) { @@ -63,7 +63,7 @@ unsigned int MXC_CTB_Common_Hash_GetBlockSize (mxc_ctb_hash_func_t function) return 0; } -unsigned int MXC_CTB_Common_Hash_GetDigestSize (mxc_ctb_hash_func_t function) +unsigned int MXC_CTB_Common_Hash_GetDigestSize(mxc_ctb_hash_func_t function) { // Digest length in bytes indexed by hash function switch (function) { @@ -90,7 +90,7 @@ unsigned int MXC_CTB_Common_Hash_GetDigestSize (mxc_ctb_hash_func_t function) return 0; } -unsigned int MXC_CTB_Common_Cipher_GetKeySize (mxc_ctb_cipher_t cipher) +unsigned int MXC_CTB_Common_Cipher_GetKeySize(mxc_ctb_cipher_t cipher) { switch (cipher) { case MXC_CTB_CIPHER_DIS: @@ -116,7 +116,7 @@ unsigned int MXC_CTB_Common_Cipher_GetKeySize (mxc_ctb_cipher_t cipher) return 0; } -unsigned int MXC_CTB_Common_Cipher_GetBlockSize (mxc_ctb_cipher_t cipher) +unsigned int MXC_CTB_Common_Cipher_GetBlockSize(mxc_ctb_cipher_t cipher) { switch (cipher) { case MXC_CTB_CIPHER_DIS: diff --git a/Libraries/PeriphDrivers/Source/CTB/ctb_reva.c b/Libraries/PeriphDrivers/Source/CTB/ctb_reva.c index 1a9b64563..95a0bffe5 100644 --- a/Libraries/PeriphDrivers/Source/CTB/ctb_reva.c +++ b/Libraries/PeriphDrivers/Source/CTB/ctb_reva.c @@ -77,16 +77,16 @@ static uint32_t enabled_features = 0; /***** Function Prototypes *****/ -static int MXC_CTB_ECC_Compare (mxc_ctb_ecc_req_t* req); -static void MXC_CTB_Hash_SendBlock (mxc_ctb_hash_req_t* req); -static int MXC_CTB_Cipher_EncDecAsc (mxc_ctb_cipher_req_t* req); +static int MXC_CTB_ECC_Compare(mxc_ctb_ecc_req_t* req); +static void MXC_CTB_Hash_SendBlock(mxc_ctb_hash_req_t* req); +static int MXC_CTB_Cipher_EncDecAsc(mxc_ctb_cipher_req_t* req); /* ************************************************************************* */ /* Global Control/Configuration functions */ /* ************************************************************************* */ -int MXC_CTB_RevA_Init (uint32_t features) +int MXC_CTB_RevA_Init(uint32_t features) { MXC_CTB->ctrl = MXC_F_CTB_CTRL_RST; @@ -95,7 +95,7 @@ int MXC_CTB_RevA_Init (uint32_t features) enabled_features |= features; if (features & MXC_CTB_FEATURE_DMA) { - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[DMA_ID]); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[DMA_ID]); dma_cb_func = DMA_CALLBACK_DISABLED; } @@ -104,56 +104,56 @@ int MXC_CTB_RevA_Init (uint32_t features) } if (features & MXC_CTB_FEATURE_HASH) { - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[HSH_ID]); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[HSH_ID]); } if (features & MXC_CTB_FEATURE_CIPHER) { - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[CPH_ID]); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[CPH_ID]); } if (features & MXC_CTB_FEATURE_TRNG) { - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[RNG_ID]); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[RNG_ID]); } // Clear done flags - MXC_CTB_DoneClear (features); + MXC_CTB_DoneClear(features); return E_NO_ERROR; } -static int MXC_CTB_CheckInterrupts (void) +static int MXC_CTB_CheckInterrupts(void) { return MXC_CTB->ctrl & MXC_F_CTB_CTRL_INTR; } -void MXC_CTB_RevA_IntEnable () +void MXC_CTB_RevA_EnableInt() { // Clear pending interrupts - MXC_CTB_DoneClear (MXC_CTB_FEATURE_DMA | MXC_CTB_FEATURE_ECC | MXC_CTB_FEATURE_HASH - | MXC_CTB_FEATURE_CRC | MXC_CTB_FEATURE_CIPHER); - + MXC_CTB_DoneClear(MXC_CTB_FEATURE_DMA | MXC_CTB_FEATURE_ECC | MXC_CTB_FEATURE_HASH + | MXC_CTB_FEATURE_CRC | MXC_CTB_FEATURE_CIPHER); + // Enable device interrupts MXC_CTB->ctrl |= MXC_F_CTB_CTRL_INTR; // Enable IRQ - NVIC_EnableIRQ (CRYPTO_IRQn); + NVIC_EnableIRQ(CRYPTO_IRQn); } -void MXC_CTB_RevA_IntDisable () +void MXC_CTB_RevA_DisableInt() { // Disable IRQ - NVIC_DisableIRQ (CRYPTO_IRQn); + NVIC_DisableIRQ(CRYPTO_IRQn); // Disable device interrupts MXC_CTB->ctrl &= ~MXC_F_CTB_CTRL_INTR; } -int MXC_CTB_RevA_Ready (void) +int MXC_CTB_RevA_Ready(void) { - return !! (MXC_CTB->ctrl & MXC_F_CTB_CTRL_RDY); + return !!(MXC_CTB->ctrl & MXC_F_CTB_CTRL_RDY); } -void MXC_CTB_RevA_DoneClear (uint32_t features) +void MXC_CTB_RevA_DoneClear(uint32_t features) { uint32_t mask = 0; uint32_t w1c = (MXC_F_CTB_CTRL_HSH_DONE | MXC_F_CTB_CTRL_CPH_DONE @@ -175,7 +175,7 @@ void MXC_CTB_RevA_DoneClear (uint32_t features) MXC_CTB->ctrl = (MXC_CTB->ctrl & ~w1c) | mask; } -uint32_t MXC_CTB_RevA_Done (void) +uint32_t MXC_CTB_RevA_Done(void) { uint32_t features = 0; @@ -194,31 +194,31 @@ uint32_t MXC_CTB_RevA_Done (void) return features; } -void MXC_CTB_RevA_Reset (uint32_t features) +void MXC_CTB_RevA_Reset(uint32_t features) { - MXC_CTB_Shutdown (features); - MXC_CTB_Init (features); + MXC_CTB_Shutdown(features); + MXC_CTB_Init(features); } -void MXC_CTB_RevA_CacheInvalidate (void) +void MXC_CTB_RevA_CacheInvalidate(void) { // Write non-zero value to invalidate MXC_ICC->invalidate = 1; // Wait for completion of invalidation - while ( (MXC_ICC->ctrl & MXC_F_ICC_CTRL_RDY) == 0); + while ((MXC_ICC->ctrl & MXC_F_ICC_CTRL_RDY) == 0); } -int MXC_CTB_RevA_Shutdown (uint32_t features) +int MXC_CTB_RevA_Shutdown(uint32_t features) { enabled_features &= ~features; if (features & MXC_CTB_FEATURE_CIPHER) { - MXC_CTB_Cipher_SetCipher (MXC_CTB_CIPHER_DIS); + MXC_CTB_Cipher_SetCipher(MXC_CTB_CIPHER_DIS); } if (features & MXC_CTB_FEATURE_HASH) { - MXC_CTB_Hash_SetFunction (MXC_CTB_HASH_DIS); + MXC_CTB_Hash_SetFunction(MXC_CTB_HASH_DIS); } if (features & MXC_CTB_FEATURE_DMA) { @@ -228,12 +228,12 @@ int MXC_CTB_RevA_Shutdown (uint32_t features) return E_NO_ERROR; } -uint32_t MXC_CTB_RevA_GetEnabledFeatures (void) +uint32_t MXC_CTB_RevA_GetEnabledFeatures(void) { return enabled_features; } -void MXC_CTB_RevA_Handler (void) +void MXC_CTB_RevA_Handler(void) { void* req; uint32_t temp; @@ -243,58 +243,58 @@ void MXC_CTB_RevA_Handler (void) if (features & MXC_CTB_FEATURE_HASH) { req = saved_requests[HSH_ID]; - MXC_CTB_DoneClear (MXC_CTB_FEATURE_HASH | MXC_CTB_FEATURE_DMA); + MXC_CTB_DoneClear(MXC_CTB_FEATURE_HASH | MXC_CTB_FEATURE_DMA); features &= ~MXC_CTB_FEATURE_DMA; async_i++; if (async_i != async_numBlocks) { - MXC_CTB_Hash_SendBlock ( (mxc_ctb_hash_req_t*) req); + MXC_CTB_Hash_SendBlock((mxc_ctb_hash_req_t*) req); } else { - MXC_CTB_Hash_GetResult ( ( (mxc_ctb_hash_req_t*) req)->hash, (int*) &temp); + MXC_CTB_Hash_GetResult(((mxc_ctb_hash_req_t*) req)->hash, (int*) &temp); cb = MXC_CTB_Callbacks[HSH_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[HSH_ID]); - cb (req, 0); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[HSH_ID]); + cb(req, 0); } } if (features & MXC_CTB_FEATURE_CIPHER) { req = saved_requests[CPH_ID]; - MXC_CTB_DoneClear (MXC_CTB_FEATURE_CIPHER | MXC_CTB_FEATURE_DMA); + MXC_CTB_DoneClear(MXC_CTB_FEATURE_CIPHER | MXC_CTB_FEATURE_DMA); features &= ~MXC_CTB_FEATURE_DMA; - if (MXC_CTB_Cipher_EncDecAsc (req)) { + if (MXC_CTB_Cipher_EncDecAsc(req)) { cb = MXC_CTB_Callbacks[CPH_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[CPH_ID]); - cb (req, 0); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[CPH_ID]); + cb(req, 0); } } if (features & MXC_CTB_FEATURE_DMA) { req = saved_requests[DMA_ID]; - MXC_CTB_DoneClear (MXC_CTB_FEATURE_DMA); + MXC_CTB_DoneClear(MXC_CTB_FEATURE_DMA); switch (dma_cb_func) { case DMA_CALLBACK_ECC_Compute: - ( (mxc_ctb_ecc_req_t*) req)->checksum = MXC_CTB_ECC_GetResult(); + ((mxc_ctb_ecc_req_t*) req)->checksum = MXC_CTB_ECC_GetResult(); cb = MXC_CTB_Callbacks[DMA_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[DMA_ID]); - cb (req, 0); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[DMA_ID]); + cb(req, 0); break; case DMA_CALLBACK_ECC_Error: - temp = MXC_CTB_ECC_Compare ( (mxc_ctb_ecc_req_t*) req); + temp = MXC_CTB_ECC_Compare((mxc_ctb_ecc_req_t*) req); cb = MXC_CTB_Callbacks[DMA_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[DMA_ID]); - cb (req, temp); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[DMA_ID]); + cb(req, temp); break; case DMA_CALLBACK_CRC: - ( (mxc_ctb_crc_req_t*) req)->resultCRC = MXC_CTB_CRC_GetResult(); + ((mxc_ctb_crc_req_t*) req)->resultCRC = MXC_CTB_CRC_GetResult(); cb = MXC_CTB_Callbacks[DMA_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[DMA_ID]); - cb (req, 0); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[DMA_ID]); + cb(req, 0); break; case DMA_CALLBACK_DISABLED: @@ -305,25 +305,25 @@ void MXC_CTB_RevA_Handler (void) if (features == 0) { /* interrupt caused by TRNG */ // if this is last block, disable interrupt before reading MXC_TRNG->data - if (TRNG_maxLength <= TRNG_count+4) { + if (TRNG_maxLength <= TRNG_count + 4) { MXC_TRNG->cn &= ~MXC_F_TRNG_CN_RND_IRQ_EN; } temp = MXC_TRNG->data; - if ( (TRNG_count+3) < TRNG_maxLength) { - memcpy (& (TRNG_data[TRNG_count]), (uint8_t*) (&temp), 4); + if ((TRNG_count + 3) < TRNG_maxLength) { + memcpy(& (TRNG_data[TRNG_count]), (uint8_t*)(&temp), 4); TRNG_count += 4; } else { - memcpy (& (TRNG_data[TRNG_count]), (uint8_t*) (&temp), TRNG_maxLength & 0x03); + memcpy(& (TRNG_data[TRNG_count]), (uint8_t*)(&temp), TRNG_maxLength & 0x03); TRNG_count += (TRNG_maxLength & 0x03); } if (TRNG_maxLength == TRNG_count) { cb = MXC_CTB_Callbacks[RNG_ID]; - MXC_FreeLock ( (void*) &MXC_CTB_Callbacks[RNG_ID]); - cb (0, 0); + MXC_FreeLock((void*) &MXC_CTB_Callbacks[RNG_ID]); + cb(0, 0); } } } @@ -332,72 +332,72 @@ void MXC_CTB_RevA_Handler (void) /* CTB DMA - Used for all features */ /************************************/ -void MXC_CTB_RevA_DMA_SetReadSource (mxc_ctb_dma_read_source_t source) +void MXC_CTB_RevA_DMA_SetReadSource(mxc_ctb_dma_read_source_t source) { - MXC_SETFIELD (MXC_CTB->ctrl, MXC_F_CTB_CTRL_RDSRC, source << MXC_F_CTB_CTRL_RDSRC_POS); + MXC_SETFIELD(MXC_CTB->ctrl, MXC_F_CTB_CTRL_RDSRC, source << MXC_F_CTB_CTRL_RDSRC_POS); } -mxc_ctb_dma_read_source_t MXC_CTB_RevA_DMA_GetReadSource (void) +mxc_ctb_dma_read_source_t MXC_CTB_RevA_DMA_GetReadSource(void) { return (MXC_CTB->ctrl & MXC_F_CTB_CTRL_RDSRC) >> MXC_F_CTB_CTRL_RDSRC_POS; } -void MXC_CTB_RevA_DMA_SetWriteSource (mxc_ctb_dma_write_source_t source) +void MXC_CTB_RevA_DMA_SetWriteSource(mxc_ctb_dma_write_source_t source) { - MXC_SETFIELD (MXC_CTB->ctrl, MXC_F_CTB_CTRL_WRSRC, source << MXC_F_CTB_CTRL_WRSRC_POS); + MXC_SETFIELD(MXC_CTB->ctrl, MXC_F_CTB_CTRL_WRSRC, source << MXC_F_CTB_CTRL_WRSRC_POS); } -mxc_ctb_dma_write_source_t MXC_CTB_RevA_DMA_GetWriteSource (void) +mxc_ctb_dma_write_source_t MXC_CTB_RevA_DMA_GetWriteSource(void) { return (MXC_CTB->ctrl & MXC_F_CTB_CTRL_WRSRC) >> MXC_F_CTB_CTRL_WRSRC_POS; } -void MXC_CTB_RevA_DMA_SetSource (uint8_t* source) +void MXC_CTB_RevA_DMA_SetSource(uint8_t* source) { MXC_CTB->dma_src = (uint32_t) source; } -void MXC_CTB_RevA_DMA_SetDestination (uint8_t* dest) +void MXC_CTB_RevA_DMA_SetDestination(uint8_t* dest) { MXC_CTB->dma_dest = (uint32_t) dest; } -void MXC_CTB_RevA_DMA_StartTransfer (uint32_t length) +void MXC_CTB_RevA_DMA_StartTransfer(uint32_t length) { MXC_CTB->dma_cnt = length; } -int MXC_CTB_RevA_DMA_SetupOperation (mxc_ctb_dma_req_t* req) +int MXC_CTB_RevA_DMA_SetupOperation(mxc_ctb_dma_req_t* req) { if (req == NULL) { return E_NULL_PTR; } - MXC_CTB_DMA_SetReadSource (MXC_CTB_DMA_READ_FIFO_DMA); + MXC_CTB_DMA_SetReadSource(MXC_CTB_DMA_READ_FIFO_DMA); if (req->destBuffer == NULL) { - MXC_CTB_DMA_SetWriteSource (MXC_CTB_DMA_WRITE_FIFO_NONE); + MXC_CTB_DMA_SetWriteSource(MXC_CTB_DMA_WRITE_FIFO_NONE); } - MXC_CTB_DMA_SetSource (req->sourceBuffer); - MXC_CTB_DMA_SetDestination (req->destBuffer); + MXC_CTB_DMA_SetSource(req->sourceBuffer); + MXC_CTB_DMA_SetDestination(req->destBuffer); return E_NO_ERROR; } -int MXC_CTB_RevA_DMA_DoOperation (mxc_ctb_dma_req_t* req) +int MXC_CTB_RevA_DMA_DoOperation(mxc_ctb_dma_req_t* req) { if (req == NULL) { return E_NULL_PTR; } - MXC_CTB_DMA_SetupOperation (req); + MXC_CTB_DMA_SetupOperation(req); - MXC_CTB_DMA_StartTransfer (req->length); + MXC_CTB_DMA_StartTransfer(req->length); - while (! (MXC_CTB_Done() & MXC_CTB_FEATURE_DMA)); + while (!(MXC_CTB_Done() & MXC_CTB_FEATURE_DMA)); - MXC_CTB_DoneClear (MXC_CTB_FEATURE_DMA); + MXC_CTB_DoneClear(MXC_CTB_FEATURE_DMA); return E_NO_ERROR; } @@ -406,14 +406,14 @@ int MXC_CTB_RevA_DMA_DoOperation (mxc_ctb_dma_req_t* req) /* True Random Number Generator (TRNG) functions */ /* ************************************************************************* */ -int MXC_CTB_RevA_TRNG_RandomInt (void) +int MXC_CTB_RevA_TRNG_RandomInt(void) { - while (! (MXC_TRNG->st & MXC_F_TRNG_ST_RND_RDY)); + while (!(MXC_TRNG->st & MXC_F_TRNG_ST_RND_RDY)); return (int) MXC_TRNG->data; } -int MXC_CTB_RevA_TRNG_Random (uint8_t* data, uint32_t len) +int MXC_CTB_RevA_TRNG_Random(uint8_t* data, uint32_t len) { unsigned int i, temp; @@ -421,30 +421,30 @@ int MXC_CTB_RevA_TRNG_Random (uint8_t* data, uint32_t len) return E_NULL_PTR; } - for (i = 0; i+3 < len; i+=4) { + for (i = 0; i + 3 < len; i += 4) { temp = MXC_CTB_TRNG_RandomInt(); - memcpy (& (data[i]), (uint8_t*) (&temp), 4); + memcpy(& (data[i]), (uint8_t*)(&temp), 4); } if (len & 0x03) { temp = MXC_CTB_TRNG_RandomInt(); - memcpy (& (data[i]), (uint8_t*) (&temp), len & 0x03); + memcpy(& (data[i]), (uint8_t*)(&temp), len & 0x03); } return E_NO_ERROR; } -void MXC_CTB_RevA_TRNG_RandomAsync (uint8_t* data, uint32_t len, mxc_ctb_complete_cb_t callback) +void MXC_CTB_RevA_TRNG_RandomAsync(uint8_t* data, uint32_t len, mxc_ctb_complete_cb_t callback) { - MXC_ASSERT (data && callback); + MXC_ASSERT(data && callback); if (len == 0) { return; } - while (MXC_GetLock ( (void*) &MXC_CTB_Callbacks[RNG_ID], 1) != E_NO_ERROR); + while (MXC_GetLock((void*) &MXC_CTB_Callbacks[RNG_ID], 1) != E_NO_ERROR); - NVIC_DisableIRQ (TRNG_IRQn); + NVIC_DisableIRQ(TRNG_IRQn); TRNG_data = data; TRNG_count = 0; @@ -453,7 +453,7 @@ void MXC_CTB_RevA_TRNG_RandomAsync (uint8_t* data, uint32_t len, mxc_ctb_complet // Enable interrupts MXC_TRNG->cn |= MXC_F_TRNG_CN_RND_IRQ_EN; - NVIC_EnableIRQ (TRNG_IRQn); + NVIC_EnableIRQ(TRNG_IRQn); } /* ************************************************************************* */ @@ -464,7 +464,7 @@ void MXC_CTB_RevA_TRNG_RandomAsync (uint8_t* data, uint32_t len, mxc_ctb_complet /* Low Level Functions */ /*******************************/ -void MXC_CTB_RevA_ECC_Enable () +void MXC_CTB_RevA_ECC_Enable() { MXC_CTB->crc_ctrl |= MXC_F_CTB_CRC_CTRL_HRST; @@ -473,12 +473,12 @@ void MXC_CTB_RevA_ECC_Enable () MXC_CTB->crc_ctrl |= MXC_F_CTB_CRC_CTRL_HAM; } -void MXC_CTB_RevA_ECC_Disable () +void MXC_CTB_RevA_ECC_Disable() { MXC_CTB->crc_ctrl &= ~MXC_F_CTB_CRC_CTRL_HAM; } -uint32_t MXC_CTB_RevA_ECC_GetResult (void) +uint32_t MXC_CTB_RevA_ECC_GetResult(void) { // Include bit 16 to aid error correction return MXC_CTB->ham_ecc; @@ -488,7 +488,7 @@ uint32_t MXC_CTB_RevA_ECC_GetResult (void) /* High Level Functions */ /*******************************/ -static int MXC_CTB_ECC_Compare (mxc_ctb_ecc_req_t* req) +static int MXC_CTB_ECC_Compare(mxc_ctb_ecc_req_t* req) { if (req == NULL) { return E_NULL_PTR; @@ -519,7 +519,7 @@ static int MXC_CTB_ECC_Compare (mxc_ctb_ecc_req_t* req) return E_NO_ERROR; } -static int MXC_CTB_ECC_Setup (mxc_ctb_ecc_req_t* req) +static int MXC_CTB_ECC_Setup(mxc_ctb_ecc_req_t* req) { mxc_ctb_dma_req_t dma_req; int enabled; @@ -537,25 +537,25 @@ static int MXC_CTB_ECC_Setup (mxc_ctb_ecc_req_t* req) } enabled = MXC_CTB_CheckInterrupts(); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); - MXC_CTB_ECC_Enable (); + MXC_CTB_ECC_Enable(); dma_req.sourceBuffer = req->dataBuffer; dma_req.length = req->dataLen; - MXC_CTB_DMA_DoOperation (&dma_req); + MXC_CTB_DMA_DoOperation(&dma_req); if (enabled) { - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); } return E_NO_ERROR; } -int MXC_CTB_RevA_ECC_Compute (mxc_ctb_ecc_req_t* req) +int MXC_CTB_RevA_ECC_Compute(mxc_ctb_ecc_req_t* req) { - uint32_t error = MXC_CTB_ECC_Setup (req); + uint32_t error = MXC_CTB_ECC_Setup(req); if (error != E_NO_ERROR) { return error; @@ -565,53 +565,53 @@ int MXC_CTB_RevA_ECC_Compute (mxc_ctb_ecc_req_t* req) return E_NO_ERROR; } -int MXC_CTB_RevA_ECC_ErrorCheck (mxc_ctb_ecc_req_t* req) +int MXC_CTB_RevA_ECC_ErrorCheck(mxc_ctb_ecc_req_t* req) { - uint32_t error = MXC_CTB_ECC_Setup (req); + uint32_t error = MXC_CTB_ECC_Setup(req); if (error != E_NO_ERROR) { return error; } - return MXC_CTB_ECC_Compare (req); + return MXC_CTB_ECC_Compare(req); } -static void MXC_CTB_ECC_SetupAsync (mxc_ctb_ecc_req_t* req) +static void MXC_CTB_ECC_SetupAsync(mxc_ctb_ecc_req_t* req) { mxc_ctb_dma_req_t dma_req; - MXC_ASSERT (req); - MXC_ASSERT (req->callback && req->dataBuffer); + MXC_ASSERT(req); + MXC_ASSERT(req->callback && req->dataBuffer); - while (MXC_GetLock ( (void*) &MXC_CTB_Callbacks[DMA_ID], 1) != E_NO_ERROR); + while (MXC_GetLock((void*) &MXC_CTB_Callbacks[DMA_ID], 1) != E_NO_ERROR); - MXC_CTB_IntDisable (0); + MXC_CTB_DisableInt(0); MXC_CTB_Callbacks[DMA_ID] = req->callback; saved_requests[DMA_ID] = req; dma_req.sourceBuffer = req->dataBuffer; - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetupOperation(&dma_req); - MXC_CTB_ECC_Enable (); - MXC_CTB_IntEnable (); + MXC_CTB_ECC_Enable(); + MXC_CTB_EnableInt(); } -void MXC_CTB_RevA_ECC_ComputeAsync (mxc_ctb_ecc_req_t* req) +void MXC_CTB_RevA_ECC_ComputeAsync(mxc_ctb_ecc_req_t* req) { - MXC_CTB_ECC_SetupAsync (req); + MXC_CTB_ECC_SetupAsync(req); dma_cb_func = DMA_CALLBACK_ECC_Compute; - MXC_CTB_DMA_StartTransfer (req->dataLen); + MXC_CTB_DMA_StartTransfer(req->dataLen); } -void MXC_CTB_RevA_ECC_ErrorCheckAsync (mxc_ctb_ecc_req_t* req) +void MXC_CTB_RevA_ECC_ErrorCheckAsync(mxc_ctb_ecc_req_t* req) { - MXC_CTB_ECC_SetupAsync (req); + MXC_CTB_ECC_SetupAsync(req); dma_cb_func = DMA_CALLBACK_ECC_Error; - MXC_CTB_DMA_StartTransfer (req->dataLen); + MXC_CTB_DMA_StartTransfer(req->dataLen); } @@ -623,27 +623,27 @@ void MXC_CTB_RevA_ECC_ErrorCheckAsync (mxc_ctb_ecc_req_t* req) /* Low Level Functions */ /*******************************/ -void MXC_CTB_RevA_CRC_SetDirection (mxc_ctb_crc_bitorder_t bitOrder) +void MXC_CTB_RevA_CRC_SetDirection(mxc_ctb_crc_bitorder_t bitOrder) { - MXC_SETFIELD (MXC_CTB->crc_ctrl, MXC_F_CTB_CRC_CTRL_MSB, bitOrder << MXC_F_CTB_CRC_CTRL_MSB_POS); + MXC_SETFIELD(MXC_CTB->crc_ctrl, MXC_F_CTB_CRC_CTRL_MSB, bitOrder << MXC_F_CTB_CRC_CTRL_MSB_POS); } -mxc_ctb_crc_bitorder_t MXC_CTB_RevA_CRC_GetDirection (void) +mxc_ctb_crc_bitorder_t MXC_CTB_RevA_CRC_GetDirection(void) { return (MXC_CTB->crc_ctrl & MXC_F_CTB_CRC_CTRL_MSB); } -void MXC_CTB_RevA_CRC_SetPoly (uint32_t poly) +void MXC_CTB_RevA_CRC_SetPoly(uint32_t poly) { MXC_CTB->crc_poly = poly; } -uint32_t MXC_CTB_RevA_CRC_GetPoly (void) +uint32_t MXC_CTB_RevA_CRC_GetPoly(void) { return MXC_CTB->crc_poly; } -uint32_t MXC_CTB_RevA_CRC_GetResult (void) +uint32_t MXC_CTB_RevA_CRC_GetResult(void) { return MXC_CTB->crc_val; } @@ -652,7 +652,7 @@ uint32_t MXC_CTB_RevA_CRC_GetResult (void) /* High Level Functions */ /*******************************/ -int MXC_CTB_RevA_CRC_Compute (mxc_ctb_crc_req_t* req) +int MXC_CTB_RevA_CRC_Compute(mxc_ctb_crc_req_t* req) { mxc_ctb_dma_req_t dma_req; int enabled; @@ -662,35 +662,35 @@ int MXC_CTB_RevA_CRC_Compute (mxc_ctb_crc_req_t* req) } enabled = MXC_CTB_CheckInterrupts(); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); MXC_CTB->ctrl |= MXC_F_CTB_CTRL_RST; dma_req.sourceBuffer = req->dataBuffer; dma_req.length = req->dataLen; - MXC_CTB_DMA_DoOperation (&dma_req); + MXC_CTB_DMA_DoOperation(&dma_req); // Store the crc value req->resultCRC = MXC_CTB_CRC_GetResult(); if (enabled) { - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); } return E_SUCCESS; } -void MXC_CTB_RevA_CRC_ComputeAsync (mxc_ctb_crc_req_t* req) +void MXC_CTB_RevA_CRC_ComputeAsync(mxc_ctb_crc_req_t* req) { mxc_ctb_dma_req_t dma_req; - MXC_ASSERT (req); - MXC_ASSERT (req->callback); + MXC_ASSERT(req); + MXC_ASSERT(req->callback); - while (MXC_GetLock ( (void*) &MXC_CTB_Callbacks[DMA_ID], 1) != E_NO_ERROR); + while (MXC_GetLock((void*) &MXC_CTB_Callbacks[DMA_ID], 1) != E_NO_ERROR); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); MXC_CTB_Callbacks[DMA_ID] = req->callback; saved_requests[DMA_ID] = req; @@ -700,11 +700,11 @@ void MXC_CTB_RevA_CRC_ComputeAsync (mxc_ctb_crc_req_t* req) dma_req.sourceBuffer = req->dataBuffer; - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetupOperation(&dma_req); - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); - MXC_CTB_DMA_StartTransfer (req->dataLen); + MXC_CTB_DMA_StartTransfer(req->dataLen); } /* ************************************************************************* */ @@ -715,48 +715,48 @@ void MXC_CTB_RevA_CRC_ComputeAsync (mxc_ctb_crc_req_t* req) /* Low Level Functions */ /***********************/ -void MXC_CTB_RevA_Hash_SetFunction (mxc_ctb_hash_func_t function) +void MXC_CTB_RevA_Hash_SetFunction(mxc_ctb_hash_func_t function) { - MXC_SETFIELD (MXC_CTB->hash_ctrl, MXC_F_CTB_HASH_CTRL_HASH, function << MXC_F_CTB_HASH_CTRL_HASH_POS); + MXC_SETFIELD(MXC_CTB->hash_ctrl, MXC_F_CTB_HASH_CTRL_HASH, function << MXC_F_CTB_HASH_CTRL_HASH_POS); } -mxc_ctb_hash_func_t MXC_CTB_RevA_Hash_GetFunction (void) +mxc_ctb_hash_func_t MXC_CTB_RevA_Hash_GetFunction(void) { return (MXC_CTB->hash_ctrl & MXC_F_CTB_HASH_CTRL_HASH) >> MXC_F_CTB_HASH_CTRL_HASH_POS; } -void MXC_CTB_RevA_Hash_SetAutoPad (int pad) +void MXC_CTB_RevA_Hash_SetAutoPad(int pad) { - MXC_SETFIELD (MXC_CTB->hash_ctrl, MXC_F_CTB_HASH_CTRL_LAST, (!!pad) << MXC_F_CTB_HASH_CTRL_LAST_POS); + MXC_SETFIELD(MXC_CTB->hash_ctrl, MXC_F_CTB_HASH_CTRL_LAST, (!!pad) << MXC_F_CTB_HASH_CTRL_LAST_POS); } -int MXC_CTB_RevA_Hash_GetAutoPad (void) +int MXC_CTB_RevA_Hash_GetAutoPad(void) { - return !! (MXC_CTB->hash_ctrl & MXC_F_CTB_HASH_CTRL_LAST); + return !!(MXC_CTB->hash_ctrl & MXC_F_CTB_HASH_CTRL_LAST); } -void MXC_CTB_RevA_Hash_GetResult (uint8_t* digest, int* len) +void MXC_CTB_RevA_Hash_GetResult(uint8_t* digest, int* len) { - *len = MXC_CTB_Hash_GetDigestSize (MXC_CTB_Hash_GetFunction()); - memcpy (digest, (uint8_t *) &MXC_CTB->hash_digest[0], *len); + *len = MXC_CTB_Hash_GetDigestSize(MXC_CTB_Hash_GetFunction()); + memcpy(digest, (uint8_t*) &MXC_CTB->hash_digest[0], *len); } -void MXC_CTB_RevA_Hash_SetMessageSize (uint32_t size) +void MXC_CTB_RevA_Hash_SetMessageSize(uint32_t size) { MXC_CTB->hash_msg_sz[0] = size; } -void MXC_CTB_RevA_Hash_SetSource (mxc_ctb_hash_source_t source) +void MXC_CTB_RevA_Hash_SetSource(mxc_ctb_hash_source_t source) { - MXC_SETFIELD (MXC_CTB->ctrl, MXC_F_CTB_CTRL_SRC, (!!source) << MXC_F_CTB_CTRL_SRC_POS); + MXC_SETFIELD(MXC_CTB->ctrl, MXC_F_CTB_CTRL_SRC, (!!source) << MXC_F_CTB_CTRL_SRC_POS); } -mxc_ctb_hash_source_t MXC_CTB_RevA_Hash_GetSource (void) +mxc_ctb_hash_source_t MXC_CTB_RevA_Hash_GetSource(void) { return (MXC_CTB->ctrl & MXC_F_CTB_CTRL_SRC) >> MXC_F_CTB_CTRL_SRC_POS; } -void MXC_CTB_RevA_Hash_InitializeHash (void) +void MXC_CTB_RevA_Hash_InitializeHash(void) { MXC_CTB->hash_ctrl |= MXC_F_CTB_HASH_CTRL_INIT; @@ -767,7 +767,7 @@ void MXC_CTB_RevA_Hash_InitializeHash (void) /* High Level Functions */ /************************/ -int MXC_CTB_RevA_Hash_Compute (mxc_ctb_hash_req_t* req) +int MXC_CTB_RevA_Hash_Compute(mxc_ctb_hash_req_t* req) { int i, block, numBlocks, blockSize, lastBlockSize; mxc_ctb_dma_req_t dma_req; @@ -776,7 +776,7 @@ int MXC_CTB_RevA_Hash_Compute (mxc_ctb_hash_req_t* req) return E_NULL_PTR; } - if (! (req->msg && req->hash)) { + if (!(req->msg && req->hash)) { return E_NULL_PTR; } @@ -785,14 +785,14 @@ int MXC_CTB_RevA_Hash_Compute (mxc_ctb_hash_req_t* req) } int enabled = MXC_CTB_CheckInterrupts(); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); - MXC_CTB_Hash_SetMessageSize (req->len); - MXC_CTB_Hash_SetSource (MXC_CTB_HASH_SOURCE_INFIFO); + MXC_CTB_Hash_SetMessageSize(req->len); + MXC_CTB_Hash_SetSource(MXC_CTB_HASH_SOURCE_INFIFO); MXC_CTB_Hash_InitializeHash(); - blockSize = MXC_CTB_Hash_GetBlockSize (MXC_CTB_Hash_GetFunction()); - numBlocks = ( (int) req->len - 1) / blockSize + 1; + blockSize = MXC_CTB_Hash_GetBlockSize(MXC_CTB_Hash_GetFunction()); + numBlocks = ((int) req->len - 1) / blockSize + 1; lastBlockSize = req->len % blockSize; if (lastBlockSize == 0) { @@ -801,74 +801,74 @@ int MXC_CTB_RevA_Hash_Compute (mxc_ctb_hash_req_t* req) dma_req.sourceBuffer = req->msg; - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetupOperation(&dma_req); for (block = 0; block < numBlocks; block++) { if (block != numBlocks - 1) { // Send data to the crypto data register 32-bits at a time - MXC_CTB_DMA_StartTransfer (blockSize); + MXC_CTB_DMA_StartTransfer(blockSize); } else { // Set the last req->msg bit for auto padding the msg - MXC_CTB_Hash_SetAutoPad (1); + MXC_CTB_Hash_SetAutoPad(1); - MXC_CTB_DMA_StartTransfer (lastBlockSize); + MXC_CTB_DMA_StartTransfer(lastBlockSize); } // Wait until operation is complete - while (! (MXC_CTB_Done() & MXC_CTB_FEATURE_HASH)); + while (!(MXC_CTB_Done() & MXC_CTB_FEATURE_HASH)); } // Get the msg digest // Note: i is throwaway - MXC_CTB_Hash_GetResult (req->hash, &i); + MXC_CTB_Hash_GetResult(req->hash, &i); if (enabled) { - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); } return E_NO_ERROR; } -static void MXC_CTB_Hash_SendBlock (mxc_ctb_hash_req_t* req) +static void MXC_CTB_Hash_SendBlock(mxc_ctb_hash_req_t* req) { if (async_i != async_numBlocks - 1) { - MXC_CTB_DMA_StartTransfer (async_blockSize); + MXC_CTB_DMA_StartTransfer(async_blockSize); } else { // Set the last bit for auto padding the msg - MXC_CTB_Hash_SetAutoPad (1); + MXC_CTB_Hash_SetAutoPad(1); - MXC_CTB_DMA_StartTransfer (async_lastBlockSize); + MXC_CTB_DMA_StartTransfer(async_lastBlockSize); } } -void MXC_CTB_RevA_Hash_ComputeAsync (mxc_ctb_hash_req_t* req) +void MXC_CTB_RevA_Hash_ComputeAsync(mxc_ctb_hash_req_t* req) { mxc_ctb_dma_req_t dma_req; - MXC_ASSERT (req); - MXC_ASSERT (req->msg && req->hash && req->callback); + MXC_ASSERT(req); + MXC_ASSERT(req->msg && req->hash && req->callback); if (req->len <= 0) { return; } - while (MXC_GetLock ( (void*) &MXC_CTB_Callbacks[HSH_ID], 1) != E_NO_ERROR); + while (MXC_GetLock((void*) &MXC_CTB_Callbacks[HSH_ID], 1) != E_NO_ERROR); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); MXC_CTB_Callbacks[HSH_ID] = req->callback; saved_requests[HSH_ID] = req; - MXC_CTB_Hash_SetMessageSize (req->len); - MXC_CTB_Hash_SetSource (MXC_CTB_HASH_SOURCE_INFIFO); + MXC_CTB_Hash_SetMessageSize(req->len); + MXC_CTB_Hash_SetSource(MXC_CTB_HASH_SOURCE_INFIFO); MXC_CTB_Hash_InitializeHash(); - async_blockSize = MXC_CTB_Hash_GetBlockSize (MXC_CTB_Hash_GetFunction()); - async_numBlocks = ( (int) req->len - 1) / async_blockSize + 1; + async_blockSize = MXC_CTB_Hash_GetBlockSize(MXC_CTB_Hash_GetFunction()); + async_numBlocks = ((int) req->len - 1) / async_blockSize + 1; async_lastBlockSize = req->len % async_blockSize; async_i = 0; @@ -877,11 +877,11 @@ void MXC_CTB_RevA_Hash_ComputeAsync (mxc_ctb_hash_req_t* req) } dma_req.sourceBuffer = req->msg; - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetupOperation(&dma_req); - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); - MXC_CTB_Hash_SendBlock (req); + MXC_CTB_Hash_SendBlock(req); } /* ************************************************************************* */ @@ -892,37 +892,37 @@ void MXC_CTB_RevA_Hash_ComputeAsync (mxc_ctb_hash_req_t* req) /* Low Level Functions */ /************************/ -void MXC_CTB_RevA_Cipher_SetMode (mxc_ctb_cipher_mode_t mode) +void MXC_CTB_RevA_Cipher_SetMode(mxc_ctb_cipher_mode_t mode) { - MXC_SETFIELD (MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_MODE, mode << MXC_F_CTB_CIPHER_CTRL_MODE_POS); + MXC_SETFIELD(MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_MODE, mode << MXC_F_CTB_CIPHER_CTRL_MODE_POS); } -mxc_ctb_cipher_mode_t MXC_CTB_RevA_Cipher_GetMode (void) +mxc_ctb_cipher_mode_t MXC_CTB_RevA_Cipher_GetMode(void) { return (MXC_CTB->cipher_ctrl & MXC_F_CTB_CIPHER_CTRL_MODE) >> MXC_F_CTB_CIPHER_CTRL_MODE_POS; } -void MXC_CTB_RevA_Cipher_SetCipher (mxc_ctb_cipher_t cipher) +void MXC_CTB_RevA_Cipher_SetCipher(mxc_ctb_cipher_t cipher) { - MXC_SETFIELD (MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_CIPHER, cipher << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS); + MXC_SETFIELD(MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_CIPHER, cipher << MXC_F_CTB_CIPHER_CTRL_CIPHER_POS); } -mxc_ctb_cipher_t MXC_CTB_RevA_Cipher_GetCipher (void) +mxc_ctb_cipher_t MXC_CTB_RevA_Cipher_GetCipher(void) { return (MXC_CTB->cipher_ctrl & MXC_F_CTB_CIPHER_CTRL_CIPHER) >> MXC_F_CTB_CIPHER_CTRL_CIPHER_POS; } -void MXC_CTB_RevA_Cipher_SetKeySource (mxc_ctb_cipher_key_t source) +void MXC_CTB_RevA_Cipher_SetKeySource(mxc_ctb_cipher_key_t source) { - MXC_SETFIELD (MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_SRC, source << MXC_F_CTB_CIPHER_CTRL_SRC_POS); + MXC_SETFIELD(MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_SRC, source << MXC_F_CTB_CIPHER_CTRL_SRC_POS); } -mxc_ctb_cipher_key_t MXC_CTB_RevA_Cipher_GetKeySource (void) +mxc_ctb_cipher_key_t MXC_CTB_RevA_Cipher_GetKeySource(void) { return (MXC_CTB->cipher_ctrl & MXC_F_CTB_CIPHER_CTRL_SRC) >> MXC_F_CTB_CIPHER_CTRL_SRC_POS; } -void MXC_CTB_RevA_Cipher_LoadKey (void) +void MXC_CTB_RevA_Cipher_LoadKey(void) { if (MXC_CTB_Cipher_GetKeySource() == MXC_CTB_CIPHER_KEY_SOFTWARE) { return; @@ -931,35 +931,35 @@ void MXC_CTB_RevA_Cipher_LoadKey (void) MXC_CTB->cipher_ctrl |= MXC_F_CTB_CIPHER_CTRL_KEY; } -void MXC_CTB_RevA_Cipher_SetOperation (mxc_ctb_cipher_operation_t operation) +void MXC_CTB_RevA_Cipher_SetOperation(mxc_ctb_cipher_operation_t operation) { - MXC_SETFIELD (MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_ENC, (!operation) << MXC_F_CTB_CIPHER_CTRL_ENC_POS); + MXC_SETFIELD(MXC_CTB->cipher_ctrl, MXC_F_CTB_CIPHER_CTRL_ENC, (!operation) << MXC_F_CTB_CIPHER_CTRL_ENC_POS); } -void MXC_CTB_RevA_Cipher_SetKey (uint8_t* key, uint32_t len) +void MXC_CTB_RevA_Cipher_SetKey(uint8_t* key, uint32_t len) { if (MXC_CTB_Cipher_GetKeySource() != MXC_CTB_CIPHER_KEY_SOFTWARE) { return; } - memcpy ( (uint8_t *) &MXC_CTB->cipher_key[0], key, len); + memcpy((uint8_t*) &MXC_CTB->cipher_key[0], key, len); } -void MXC_CTB_RevA_Cipher_SetIV (uint8_t* iv, uint32_t len) +void MXC_CTB_RevA_Cipher_SetIV(uint8_t* iv, uint32_t len) { - memcpy ( (uint8_t *) &MXC_CTB->cipher_init[0], iv, len); + memcpy((uint8_t*) &MXC_CTB->cipher_init[0], iv, len); } -void MXC_CTB_RevA_Cipher_GetIV (uint8_t* ivOut, uint32_t len) +void MXC_CTB_RevA_Cipher_GetIV(uint8_t* ivOut, uint32_t len) { - memcpy (ivOut, (uint8_t*) &MXC_CTB->cipher_init[0], len); + memcpy(ivOut, (uint8_t*) &MXC_CTB->cipher_init[0], len); } /************************/ /* High Level Functions */ /************************/ -static int MXC_CTB_Cipher_Generic (mxc_ctb_cipher_req_t* req, int op) +static int MXC_CTB_Cipher_Generic(mxc_ctb_cipher_req_t* req, int op) { int i, enabled; mxc_ctb_dma_req_t dma_req; @@ -968,7 +968,7 @@ static int MXC_CTB_Cipher_Generic (mxc_ctb_cipher_req_t* req, int op) return E_NULL_PTR; } - if (! (req->plaintext && req->ciphertext)) { + if (!(req->plaintext && req->ciphertext)) { return E_NULL_PTR; } @@ -977,10 +977,10 @@ static int MXC_CTB_Cipher_Generic (mxc_ctb_cipher_req_t* req, int op) } enabled = MXC_CTB_CheckInterrupts(); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); - int dataLength = MXC_CTB_Cipher_GetBlockSize (MXC_CTB_Cipher_GetCipher()); - int numBlocks = ( (int) req->ptLen - 1) / dataLength + 1; + int dataLength = MXC_CTB_Cipher_GetBlockSize(MXC_CTB_Cipher_GetCipher()); + int numBlocks = ((int) req->ptLen - 1) / dataLength + 1; // Load Initial Vector if necessary if (MXC_CTB_Cipher_GetMode() != MXC_CTB_MODE_ECB) { @@ -988,48 +988,48 @@ static int MXC_CTB_Cipher_Generic (mxc_ctb_cipher_req_t* req, int op) return E_NULL_PTR; } - MXC_CTB_Cipher_SetIV (req->iv, dataLength); + MXC_CTB_Cipher_SetIV(req->iv, dataLength); } // Configure for encryption/decryption - MXC_CTB_Cipher_SetOperation (op); + MXC_CTB_Cipher_SetOperation(op); dma_req.sourceBuffer = req->plaintext; dma_req.destBuffer = req->ciphertext; dma_req.length = dataLength; - MXC_CTB_DMA_SetWriteSource (MXC_CTB_DMA_WRITE_FIFO_CIPHER); - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetWriteSource(MXC_CTB_DMA_WRITE_FIFO_CIPHER); + MXC_CTB_DMA_SetupOperation(&dma_req); for (i = 0; i < numBlocks; i++) { // Wait until ready for data while (!MXC_CTB_Ready()); - MXC_CTB_DMA_StartTransfer (dataLength); + MXC_CTB_DMA_StartTransfer(dataLength); // Wait until operation is complete - while (! (MXC_CTB_Done() & MXC_CTB_FEATURE_CIPHER)); + while (!(MXC_CTB_Done() & MXC_CTB_FEATURE_CIPHER)); } if (enabled) { - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); } return E_NO_ERROR; } -int MXC_CTB_RevA_Cipher_Encrypt (mxc_ctb_cipher_req_t* req) +int MXC_CTB_RevA_Cipher_Encrypt(mxc_ctb_cipher_req_t* req) { - return MXC_CTB_Cipher_Generic (req, 1); + return MXC_CTB_Cipher_Generic(req, 1); } -int MXC_CTB_RevA_Cipher_Decrypt (mxc_ctb_cipher_req_t* req) +int MXC_CTB_RevA_Cipher_Decrypt(mxc_ctb_cipher_req_t* req) { - return MXC_CTB_Cipher_Generic (req, 0); + return MXC_CTB_Cipher_Generic(req, 0); } -static int MXC_CTB_Cipher_EncDecAsc (mxc_ctb_cipher_req_t* req) +static int MXC_CTB_Cipher_EncDecAsc(mxc_ctb_cipher_req_t* req) { async_i++; @@ -1037,58 +1037,58 @@ static int MXC_CTB_Cipher_EncDecAsc (mxc_ctb_cipher_req_t* req) return 1; } - MXC_CTB_DMA_StartTransfer (async_dataLength); + MXC_CTB_DMA_StartTransfer(async_dataLength); return 0; } -static void MXC_CTB_Cipher_GenericAsync (mxc_ctb_cipher_req_t* req, int op) +static void MXC_CTB_Cipher_GenericAsync(mxc_ctb_cipher_req_t* req, int op) { mxc_ctb_dma_req_t dma_req; - MXC_ASSERT (req); - MXC_ASSERT (req->plaintext && req->ciphertext && req->callback); + MXC_ASSERT(req); + MXC_ASSERT(req->plaintext && req->ciphertext && req->callback); - while (MXC_GetLock ( (void*) &MXC_CTB_Callbacks[CPH_ID], 1) != E_NO_ERROR); + while (MXC_GetLock((void*) &MXC_CTB_Callbacks[CPH_ID], 1) != E_NO_ERROR); - MXC_CTB_IntDisable (); + MXC_CTB_DisableInt(); MXC_CTB_Callbacks[CPH_ID] = req->callback; saved_requests[CPH_ID] = req; - async_dataLength = MXC_CTB_Cipher_GetBlockSize (MXC_CTB_Cipher_GetCipher()); - async_numBlocks = ( (int) req->ptLen - 1) / async_dataLength + 1; + async_dataLength = MXC_CTB_Cipher_GetBlockSize(MXC_CTB_Cipher_GetCipher()); + async_numBlocks = ((int) req->ptLen - 1) / async_dataLength + 1; async_i = 0; // Load Initial Vector if necessary if (MXC_CTB_Cipher_GetMode() != MXC_CTB_MODE_ECB) { - MXC_ASSERT (req->iv); + MXC_ASSERT(req->iv); - MXC_CTB_Cipher_SetIV (req->iv, async_dataLength); + MXC_CTB_Cipher_SetIV(req->iv, async_dataLength); } // Configure for encryption - MXC_CTB_Cipher_SetOperation (op); + MXC_CTB_Cipher_SetOperation(op); dma_req.sourceBuffer = req->plaintext; dma_req.destBuffer = req->ciphertext; - MXC_CTB_DMA_SetWriteSource (MXC_CTB_DMA_WRITE_FIFO_CIPHER); - MXC_CTB_DMA_SetupOperation (&dma_req); + MXC_CTB_DMA_SetWriteSource(MXC_CTB_DMA_WRITE_FIFO_CIPHER); + MXC_CTB_DMA_SetupOperation(&dma_req); - MXC_CTB_IntEnable (); + MXC_CTB_EnableInt(); // Wait until ready for data while (!MXC_CTB_Ready()); - MXC_CTB_DMA_StartTransfer (async_dataLength); + MXC_CTB_DMA_StartTransfer(async_dataLength); } -void MXC_CTB_RevA_Cipher_EncryptAsync (mxc_ctb_cipher_req_t* req) +void MXC_CTB_RevA_Cipher_EncryptAsync(mxc_ctb_cipher_req_t* req) { - MXC_CTB_Cipher_GenericAsync (req, 1); + MXC_CTB_Cipher_GenericAsync(req, 1); } -void MXC_CTB_RevA_Cipher_DecryptAsync (mxc_ctb_cipher_req_t* req) +void MXC_CTB_RevA_Cipher_DecryptAsync(mxc_ctb_cipher_req_t* req) { - MXC_CTB_Cipher_GenericAsync (req, 0); + MXC_CTB_Cipher_GenericAsync(req, 0); } diff --git a/Libraries/PeriphDrivers/Source/CTB/ctb_reva.h b/Libraries/PeriphDrivers/Source/CTB/ctb_reva.h index 4b76c0703..f37504c3a 100644 --- a/Libraries/PeriphDrivers/Source/CTB/ctb_reva.h +++ b/Libraries/PeriphDrivers/Source/CTB/ctb_reva.h @@ -38,8 +38,8 @@ /* ************************************************************************* */ int MXC_CTB_RevA_Init (uint32_t features); -void MXC_CTB_RevA_IntEnable (); -void MXC_CTB_RevA_IntDisable (); +void MXC_CTB_RevA_EnableInt (); +void MXC_CTB_RevA_DisableInt (); int MXC_CTB_RevA_Ready (void); void MXC_CTB_RevA_DoneClear (uint32_t features); uint32_t MXC_CTB_RevA_Done (void); diff --git a/Libraries/PeriphDrivers/Source/DMA/dma_me17.c b/Libraries/PeriphDrivers/Source/DMA/dma_me17.c index 7e2ebbb92..5026164b0 100644 --- a/Libraries/PeriphDrivers/Source/DMA/dma_me17.c +++ b/Libraries/PeriphDrivers/Source/DMA/dma_me17.c @@ -50,102 +50,102 @@ /****** Functions ******/ -int MXC_DMA_Init (void) +int MXC_DMA_Init(void) { - MXC_SYS_ClockEnable (MXC_SYS_PERIPH_CLOCK_DMA); - MXC_SYS_Reset_Periph (MXC_SYS_RESET0_DMA); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_DMA); + MXC_SYS_Reset_Periph(MXC_SYS_RESET0_DMA); return MXC_DMA_RevA_Init(); } -int MXC_DMA_AcquireChannel (void) +int MXC_DMA_AcquireChannel(void) { return MXC_DMA_RevA_AcquireChannel(); } -int MXC_DMA_ReleaseChannel (int ch) +int MXC_DMA_ReleaseChannel(int ch) { - return MXC_DMA_RevA_ReleaseChannel (ch); + return MXC_DMA_RevA_ReleaseChannel(ch); } -int MXC_DMA_ConfigChannel (mxc_dma_config_t config, mxc_dma_srcdst_t srcdst) +int MXC_DMA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst) { - return MXC_DMA_RevA_ConfigChannel (config, srcdst); + return MXC_DMA_RevA_ConfigChannel(config, srcdst); } -int MXC_DMA_AdvConfigChannel (mxc_dma_adv_config_t advConfig) +int MXC_DMA_AdvConfigChannel(mxc_dma_adv_config_t advConfig) { - return MXC_DMA_RevA_AdvConfigChannel (advConfig); + return MXC_DMA_RevA_AdvConfigChannel(advConfig); } -int MXC_DMA_SetSrcDst (mxc_dma_srcdst_t srcdst) +int MXC_DMA_SetSrcDst(mxc_dma_srcdst_t srcdst) { - return MXC_DMA_RevA_SetSrcDst (srcdst); + return MXC_DMA_RevA_SetSrcDst(srcdst); } -int MXC_DMA_GetSrcDst (mxc_dma_srcdst_t srcdst) +int MXC_DMA_GetSrcDst(mxc_dma_srcdst_t srcdst) { - return MXC_DMA_RevA_GetSrcDst (srcdst); + return MXC_DMA_RevA_GetSrcDst(srcdst); } -int MXC_DMA_SetSrcReload (mxc_dma_srcdst_t srcdst) +int MXC_DMA_SetSrcReload(mxc_dma_srcdst_t srcdst) { - return MXC_DMA_RevA_SetSrcReload (srcdst); + return MXC_DMA_RevA_SetSrcReload(srcdst); } -int MXC_DMA_GetSrcReload (mxc_dma_srcdst_t srcdst) +int MXC_DMA_GetSrcReload(mxc_dma_srcdst_t srcdst) { - return MXC_DMA_RevA_GetSrcReload (srcdst); + return MXC_DMA_RevA_GetSrcReload(srcdst); } -int MXC_DMA_SetCallback (int ch, void (*callback) (int, int)) +int MXC_DMA_SetCallback(int ch, void (*callback)(int, int)) { - return MXC_DMA_RevA_SetCallback (ch, callback); + return MXC_DMA_RevA_SetCallback(ch, callback); } -int MXC_DMA_ChannelEnableInt (int ch, int flags) +int MXC_DMA_ChannelEnableInt(int ch, int flags) { - return MXC_DMA_RevA_ChannelEnableInt (ch, flags); + return MXC_DMA_RevA_ChannelEnableInt(ch, flags); } -int MXC_DMA_ChannelDisableInt (int ch, int flags) +int MXC_DMA_ChannelDisableInt(int ch, int flags) { - return MXC_DMA_RevA_ChannelDisableInt (ch, flags); + return MXC_DMA_RevA_ChannelDisableInt(ch, flags); } -int MXC_DMA_ChannelGetFlags (int ch) +int MXC_DMA_ChannelGetFlags(int ch) { - return MXC_DMA_RevA_ChannelGetFlags (ch); + return MXC_DMA_RevA_ChannelGetFlags(ch); } -int MXC_DMA_ChannelClearFlags (int ch, int flags) +int MXC_DMA_ChannelClearFlags(int ch, int flags) { - return MXC_DMA_RevA_ChannelClearFlags (ch, flags); + return MXC_DMA_RevA_ChannelClearFlags(ch, flags); } -int MXC_DMA_EnableInt (int ch) +int MXC_DMA_EnableInt(int ch) { - return MXC_DMA_RevA_EnableInt (ch); + return MXC_DMA_RevA_EnableInt(ch); } -int MXC_DMA_DisableInt (int ch) +int MXC_DMA_DisableInt(int ch) { - return MXC_DMA_RevA_DisableInt (ch); + return MXC_DMA_RevA_DisableInt(ch); } -int MXC_DMA_Start (int ch) +int MXC_DMA_Start(int ch) { - return MXC_DMA_RevA_Start (ch); + return MXC_DMA_RevA_Start(ch); } -int MXC_DMA_Stop (int ch) +int MXC_DMA_Stop(int ch) { - return MXC_DMA_RevA_Stop (ch); + return MXC_DMA_RevA_Stop(ch); } -mxc_dma_ch_regs_t* MXC_DMA_GetCHRegs (int ch) +mxc_dma_ch_regs_t* MXC_DMA_GetCHRegs(int ch) { - return MXC_DMA_RevA_GetCHRegs (ch); + return MXC_DMA_RevA_GetCHRegs(ch); } void MXC_DMA_Handler() @@ -153,12 +153,12 @@ void MXC_DMA_Handler() return MXC_DMA_RevA_Handler(); } -int MXC_DMA_MemCpy (void* dest, void* src, int len, mxc_dma_complete_cb_t callback) +int MXC_DMA_MemCpy(void* dest, void* src, int len, mxc_dma_complete_cb_t callback) { - return MXC_DMA_RevA_MemCpy (dest, src, len, callback); + return MXC_DMA_RevA_MemCpy(dest, src, len, callback); } -int MXC_DMA_DoTransfer (mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback) +int MXC_DMA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback) { - return MXC_DMA_RevA_DoTransfer (config, firstSrcDst, callback); + return MXC_DMA_RevA_DoTransfer(config, firstSrcDst, callback); } diff --git a/Libraries/PeriphDrivers/Source/DMA/dma_reva.c b/Libraries/PeriphDrivers/Source/DMA/dma_reva.c index 50745fe72..12757500f 100644 --- a/Libraries/PeriphDrivers/Source/DMA/dma_reva.c +++ b/Libraries/PeriphDrivers/Source/DMA/dma_reva.c @@ -50,11 +50,11 @@ typedef struct { } mxc_dma_highlevel_t; typedef struct { - unsigned int valid; // Flag to invalidate this resource - unsigned int instance; // Hardware instance of this DMA controller - unsigned int id; // Channel ID, which matches the index into the underlying hardware - mxc_dma_ch_regs_t *regs; // Pointer to the registers for this channel - void (*cb) (int, int); // Pointer to a callback function type + unsigned int valid; // Flag to invalidate this resource + unsigned int instance; // Hardware instance of this DMA controller + unsigned int id; // Channel ID, which matches the index into the underlying hardware + mxc_dma_ch_regs_t* regs; // Pointer to the registers for this channel + void (*cb)(int, int); // Pointer to a callback function type } mxc_dma_channel_t; /******* Globals *******/ @@ -64,10 +64,10 @@ static mxc_dma_highlevel_t memcpy_resource[MXC_DMA_CHANNELS]; static uint32_t dma_lock; /****** Functions ******/ -static void memcpy_callback (int ch, int error); -static void transfer_callback (int ch, int error); +static void memcpy_callback(int ch, int error); +static void transfer_callback(int ch, int error); -int MXC_DMA_RevA_Init (void) +int MXC_DMA_RevA_Init(void) { int i; @@ -76,9 +76,9 @@ int MXC_DMA_RevA_Init (void) } /* Initialize mutex */ - MXC_FreeLock (&dma_lock); + MXC_FreeLock(&dma_lock); - if (MXC_GetLock (&dma_lock, 1) != E_NO_ERROR) { + if (MXC_GetLock(&dma_lock, 1) != E_NO_ERROR) { return E_BUSY; } @@ -89,7 +89,7 @@ int MXC_DMA_RevA_Init (void) dma_resource[i].valid = 0; dma_resource[i].instance = 0; dma_resource[i].id = i; - dma_resource[i].regs = (mxc_dma_ch_regs_t *) &MXC_DMA->ch[i]; + dma_resource[i].regs = (mxc_dma_ch_regs_t*) &MXC_DMA->ch[i]; dma_resource[i].regs->ctrl = 0; dma_resource[i].regs->status = dma_resource[i].regs->status; @@ -97,12 +97,12 @@ int MXC_DMA_RevA_Init (void) } dma_initialized++; - MXC_FreeLock (&dma_lock); + MXC_FreeLock(&dma_lock); return E_NO_ERROR; } -int MXC_DMA_RevA_AcquireChannel (void) +int MXC_DMA_RevA_AcquireChannel(void) { int i, channel; @@ -112,7 +112,7 @@ int MXC_DMA_RevA_AcquireChannel (void) } /* If DMA is locked return busy */ - if (MXC_GetLock (&dma_lock, 1) != E_NO_ERROR) { + if (MXC_GetLock(&dma_lock, 1) != E_NO_ERROR) { return E_BUSY; } @@ -132,22 +132,22 @@ int MXC_DMA_RevA_AcquireChannel (void) } } - MXC_FreeLock (&dma_lock); + MXC_FreeLock(&dma_lock); return channel; } -int MXC_DMA_RevA_ReleaseChannel (int ch) +int MXC_DMA_RevA_ReleaseChannel(int ch) { - if (CHECK_HANDLE (ch)) { - if (MXC_GetLock (&dma_lock, 1) != E_NO_ERROR) { + if (CHECK_HANDLE(ch)) { + if (MXC_GetLock(&dma_lock, 1) != E_NO_ERROR) { return E_BUSY; } dma_resource[ch].valid = 0; dma_resource[ch].regs->ctrl = 0; dma_resource[ch].regs->status = dma_resource[ch].regs->status; - MXC_FreeLock (&dma_lock); + MXC_FreeLock(&dma_lock); } else { return E_BAD_PARAM; @@ -156,34 +156,34 @@ int MXC_DMA_RevA_ReleaseChannel (int ch) return E_NO_ERROR; } -int MXC_DMA_RevA_ConfigChannel (mxc_dma_config_t config, mxc_dma_srcdst_t srcdst) +int MXC_DMA_RevA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst) { - if (CHECK_HANDLE (config.ch)) { + if (CHECK_HANDLE(config.ch)) { /* Designed to be safe, not speedy. Should not be called often */ dma_resource[config.ch].regs->ctrl = - ( (config.srcinc_en ? MXC_F_DMA_CTRL_SRCINC : 0) | - (config.dstinc_en ? MXC_F_DMA_CTRL_DSTINC : 0) | - config.reqsel | - (config.srcwd << MXC_F_DMA_CTRL_SRCWD_POS) | - (config.dstwd << MXC_F_DMA_CTRL_DSTWD_POS)); + ((config.srcinc_en ? MXC_F_DMA_CTRL_SRCINC : 0) | + (config.dstinc_en ? MXC_F_DMA_CTRL_DSTINC : 0) | + config.reqsel | + (config.srcwd << MXC_F_DMA_CTRL_SRCWD_POS) | + (config.dstwd << MXC_F_DMA_CTRL_DSTWD_POS)); } else { return E_BAD_PARAM; } - return MXC_DMA_RevA_SetSrcDst (srcdst); + return MXC_DMA_RevA_SetSrcDst(srcdst); } -int MXC_DMA_RevA_AdvConfigChannel (mxc_dma_adv_config_t advConfig) +int MXC_DMA_RevA_AdvConfigChannel(mxc_dma_adv_config_t advConfig) { - if (CHECK_HANDLE (advConfig.ch) && (advConfig.burst_size > 0)) { - dma_resource[advConfig.ch].regs->ctrl &= ~ (0x1F00FC0C); // Clear all fields we set here + if (CHECK_HANDLE(advConfig.ch) && (advConfig.burst_size > 0)) { + dma_resource[advConfig.ch].regs->ctrl &= ~(0x1F00FC0C); // Clear all fields we set here /* Designed to be safe, not speedy. Should not be called often */ dma_resource[advConfig.ch].regs->ctrl |= - ( (advConfig.reqwait_en ? MXC_F_DMA_CTRL_TO_WAIT : 0) | - advConfig.prio | advConfig.tosel | advConfig.pssel | - ( ( (advConfig.burst_size - 1) << MXC_F_DMA_CTRL_BURST_SIZE_POS) & MXC_F_DMA_CTRL_BURST_SIZE)); + ((advConfig.reqwait_en ? MXC_F_DMA_CTRL_TO_WAIT : 0) | + advConfig.prio | advConfig.tosel | advConfig.pssel | + (((advConfig.burst_size - 1) << MXC_F_DMA_CTRL_BURST_SIZE_POS) & MXC_F_DMA_CTRL_BURST_SIZE)); } else { return E_BAD_PARAM; @@ -193,9 +193,9 @@ int MXC_DMA_RevA_AdvConfigChannel (mxc_dma_adv_config_t advConfig) } -int MXC_DMA_RevA_SetSrcDst (mxc_dma_srcdst_t srcdst) +int MXC_DMA_RevA_SetSrcDst(mxc_dma_srcdst_t srcdst) { - if (CHECK_HANDLE (srcdst.ch)) { + if (CHECK_HANDLE(srcdst.ch)) { dma_resource[srcdst.ch].regs->src = (unsigned int) srcdst.source; dma_resource[srcdst.ch].regs->dst = (unsigned int) srcdst.dest; dma_resource[srcdst.ch].regs->cnt = srcdst.len; @@ -208,9 +208,9 @@ int MXC_DMA_RevA_SetSrcDst (mxc_dma_srcdst_t srcdst) } -int MXC_DMA_RevA_GetSrcDst (mxc_dma_srcdst_t srcdst) +int MXC_DMA_RevA_GetSrcDst(mxc_dma_srcdst_t srcdst) { - if (CHECK_HANDLE (srcdst.ch)) { + if (CHECK_HANDLE(srcdst.ch)) { srcdst.source = (void*) dma_resource[srcdst.ch].regs->src; srcdst.dest = (void*) dma_resource[srcdst.ch].regs->dst; srcdst.len = (dma_resource[srcdst.ch].regs->cnt) & ~MXC_F_DMA_CNTRLD_EN; @@ -223,9 +223,9 @@ int MXC_DMA_RevA_GetSrcDst (mxc_dma_srcdst_t srcdst) } -int MXC_DMA_RevA_SetSrcReload (mxc_dma_srcdst_t srcdst) +int MXC_DMA_RevA_SetSrcReload(mxc_dma_srcdst_t srcdst) { - if (CHECK_HANDLE (srcdst.ch)) { + if (CHECK_HANDLE(srcdst.ch)) { dma_resource[srcdst.ch].regs->srcrld = (unsigned int) srcdst.source; dma_resource[srcdst.ch].regs->dstrld = (unsigned int) srcdst.dest; @@ -246,9 +246,9 @@ int MXC_DMA_RevA_SetSrcReload (mxc_dma_srcdst_t srcdst) } -int MXC_DMA_RevA_GetSrcReload (mxc_dma_srcdst_t srcdst) +int MXC_DMA_RevA_GetSrcReload(mxc_dma_srcdst_t srcdst) { - if (CHECK_HANDLE (srcdst.ch)) { + if (CHECK_HANDLE(srcdst.ch)) { srcdst.source = (void*) dma_resource[srcdst.ch].regs->srcrld; srcdst.dest = (void*) dma_resource[srcdst.ch].regs->dstrld; srcdst.len = (dma_resource[srcdst.ch].regs->cntrld) & ~MXC_F_DMA_CNTRLD_EN; @@ -261,9 +261,9 @@ int MXC_DMA_RevA_GetSrcReload (mxc_dma_srcdst_t srcdst) } -int MXC_DMA_RevA_SetCallback (int ch, void (*callback) (int, int)) +int MXC_DMA_RevA_SetCallback(int ch, void (*callback)(int, int)) { - if (CHECK_HANDLE (ch)) { + if (CHECK_HANDLE(ch)) { /* Callback for interrupt handler, no checking is done, as NULL is valid for (none) */ dma_resource[ch].cb = callback; } @@ -274,21 +274,21 @@ int MXC_DMA_RevA_SetCallback (int ch, void (*callback) (int, int)) return E_NO_ERROR; } -int MXC_DMA_RevA_SetChannelInterruptEn (int ch, int chdis, int ctz) +int MXC_DMA_RevA_SetChannelInterruptEn(int ch, int chdis, int ctz) { return E_NOT_SUPPORTED; } -int MXC_DMA_RevA_GetChannelInterruptEn (int ch) +int MXC_DMA_RevA_GetChannelInterruptEn(int ch) { return E_NOT_SUPPORTED; } -int MXC_DMA_RevA_ChannelEnableInt (int ch, int flags) +int MXC_DMA_RevA_ChannelEnableInt(int ch, int flags) { - if (CHECK_HANDLE (ch)) { - dma_resource[ch].regs->ctrl |= (flags & (MXC_F_DMA_CTRL_DIS_IE|MXC_F_DMA_CTRL_CTZ_IE)); + if (CHECK_HANDLE(ch)) { + dma_resource[ch].regs->ctrl |= (flags & (MXC_F_DMA_CTRL_DIS_IE | MXC_F_DMA_CTRL_CTZ_IE)); } else { return E_BAD_PARAM; @@ -297,10 +297,10 @@ int MXC_DMA_RevA_ChannelEnableInt (int ch, int flags) return E_NO_ERROR; } -int MXC_DMA_RevA_ChannelDisableInt (int ch, int flags) +int MXC_DMA_RevA_ChannelDisableInt(int ch, int flags) { - if (CHECK_HANDLE (ch)) { - dma_resource[ch].regs->ctrl &= ~ (flags & (MXC_F_DMA_CTRL_DIS_IE|MXC_F_DMA_CTRL_CTZ_IE)); + if (CHECK_HANDLE(ch)) { + dma_resource[ch].regs->ctrl &= ~(flags & (MXC_F_DMA_CTRL_DIS_IE | MXC_F_DMA_CTRL_CTZ_IE)); } else { return E_BAD_PARAM; @@ -309,9 +309,9 @@ int MXC_DMA_RevA_ChannelDisableInt (int ch, int flags) return E_NO_ERROR; } -int MXC_DMA_RevA_EnableInt (int ch) +int MXC_DMA_RevA_EnableInt(int ch) { - if (CHECK_HANDLE (ch)) { + if (CHECK_HANDLE(ch)) { MXC_DMA->inten |= (1 << ch); } else { @@ -321,10 +321,10 @@ int MXC_DMA_RevA_EnableInt (int ch) return E_NO_ERROR; } -int MXC_DMA_RevA_DisableInt (int ch) +int MXC_DMA_RevA_DisableInt(int ch) { - if (CHECK_HANDLE (ch)) { - MXC_DMA->inten &= ~ (1 << ch); + if (CHECK_HANDLE(ch)) { + MXC_DMA->inten &= ~(1 << ch); } else { return E_BAD_PARAM; @@ -333,9 +333,9 @@ int MXC_DMA_RevA_DisableInt (int ch) return E_NO_ERROR; } -int MXC_DMA_RevA_ChannelGetFlags (int ch) +int MXC_DMA_RevA_ChannelGetFlags(int ch) { - if (CHECK_HANDLE (ch)) { + if (CHECK_HANDLE(ch)) { return dma_resource[ch].regs->status; } else { @@ -345,10 +345,10 @@ int MXC_DMA_RevA_ChannelGetFlags (int ch) return E_NO_ERROR; } -int MXC_DMA_RevA_ChannelClearFlags (int ch, int flags) +int MXC_DMA_RevA_ChannelClearFlags(int ch, int flags) { - if (CHECK_HANDLE (ch)) { - dma_resource[ch].regs->status |= (flags & 0x5F); // Mask for Interrupt flags + if (CHECK_HANDLE(ch)) { + dma_resource[ch].regs->status |= (flags & 0x5F); // Mask for Interrupt flags } else { return E_BAD_PARAM; @@ -357,10 +357,10 @@ int MXC_DMA_RevA_ChannelClearFlags (int ch, int flags) return E_NO_ERROR; } -int MXC_DMA_RevA_Start (int ch) +int MXC_DMA_RevA_Start(int ch) { - if (CHECK_HANDLE (ch)) { - MXC_DMA_ChannelClearFlags (ch, MXC_DMA_RevA_ChannelGetFlags (ch)); + if (CHECK_HANDLE(ch)) { + MXC_DMA_ChannelClearFlags(ch, MXC_DMA_RevA_ChannelGetFlags(ch)); if (dma_resource[ch].regs->cntrld) { dma_resource[ch].regs->ctrl |= (MXC_F_DMA_CTRL_EN | MXC_F_DMA_CTRL_RLDEN); @@ -376,9 +376,9 @@ int MXC_DMA_RevA_Start (int ch) return E_NO_ERROR; } -int MXC_DMA_RevA_Stop (int ch) +int MXC_DMA_RevA_Stop(int ch) { - if (CHECK_HANDLE (ch)) { + if (CHECK_HANDLE(ch)) { dma_resource[ch].regs->ctrl &= ~MXC_F_DMA_CTRL_EN; } else { @@ -388,9 +388,9 @@ int MXC_DMA_RevA_Stop (int ch) return E_NO_ERROR; } -mxc_dma_ch_regs_t* MXC_DMA_RevA_GetCHRegs (int ch) +mxc_dma_ch_regs_t* MXC_DMA_RevA_GetCHRegs(int ch) { - if (CHECK_HANDLE (ch)) { + if (CHECK_HANDLE(ch)) { return dma_resource[ch].regs; } else { @@ -402,35 +402,35 @@ void MXC_DMA_RevA_Handler() { /* Do callback, if enabled */ for (int i = 0; i < MXC_DMA_CHANNELS; i++) { - if (CHECK_HANDLE (i)) { + if (CHECK_HANDLE(i)) { if (MXC_DMA->intfl & (0x1 << i)) { if (dma_resource[i].cb != NULL) { - dma_resource[i].cb (i, E_NO_ERROR); + dma_resource[i].cb(i, E_NO_ERROR); } - MXC_DMA_ChannelClearFlags (i, MXC_DMA_RevA_ChannelGetFlags (i)); + MXC_DMA_ChannelClearFlags(i, MXC_DMA_RevA_ChannelGetFlags(i)); break; } } } } -void memcpy_callback (int ch, int error) +void memcpy_callback(int ch, int error) { mxc_dma_complete_cb_t callback; callback = (mxc_dma_complete_cb_t) memcpy_resource[ch].userCallback; if (error != E_NO_ERROR) { - callback (NULL); + callback(NULL); } - callback (memcpy_resource[ch].dest); + callback(memcpy_resource[ch].dest); callback = NULL; - MXC_DMA_ReleaseChannel (ch); + MXC_DMA_ReleaseChannel(ch); } -int MXC_DMA_RevA_MemCpy (void* dest, void* src, int len, mxc_dma_complete_cb_t callback) +int MXC_DMA_RevA_MemCpy(void* dest, void* src, int len, mxc_dma_complete_cb_t callback) { int retval; mxc_dma_config_t config; @@ -439,7 +439,7 @@ int MXC_DMA_RevA_MemCpy (void* dest, void* src, int len, mxc_dma_complete_cb_t c if (memcpy_resource[channel].userCallback != NULL) { // We acquired a channel we haven't cleared yet - MXC_DMA_ReleaseChannel (channel); + MXC_DMA_ReleaseChannel(channel); return E_UNKNOWN; } @@ -455,33 +455,33 @@ int MXC_DMA_RevA_MemCpy (void* dest, void* src, int len, mxc_dma_complete_cb_t c config.srcinc_en = 1; config.dstinc_en = 1; - retval = MXC_DMA_ConfigChannel (config, transfer); + retval = MXC_DMA_ConfigChannel(config, transfer); if (retval != E_NO_ERROR) { return retval; } - retval = MXC_DMA_EnableInt (channel); + retval = MXC_DMA_EnableInt(channel); if (retval != E_NO_ERROR) { return retval; } - retval = MXC_DMA_ChannelEnableInt (channel, MXC_F_DMA_CTRL_CTZ_IE); + retval = MXC_DMA_ChannelEnableInt(channel, MXC_F_DMA_CTRL_CTZ_IE); if (retval != E_NO_ERROR) { return retval; } - MXC_DMA_SetCallback (channel, memcpy_callback); + MXC_DMA_SetCallback(channel, memcpy_callback); memcpy_resource[channel].userCallback = (void*) callback; memcpy_resource[channel].dest = dest; - return MXC_DMA_Start (channel); + return MXC_DMA_Start(channel); } -void transfer_callback (int ch, int error) +void transfer_callback(int ch, int error) { // Unimplemented // Check for reason @@ -491,38 +491,38 @@ void transfer_callback (int ch, int error) while (1); } -int MXC_DMA_RevA_DoTransfer (mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback) +int MXC_DMA_RevA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback) { int retval; int channel = MXC_DMA_AcquireChannel(); if (memcpy_resource[channel].userCallback != NULL) { // We acquired a channel we haven't cleared yet - MXC_DMA_ReleaseChannel (channel); + MXC_DMA_ReleaseChannel(channel); return E_UNKNOWN; } - retval = MXC_DMA_ConfigChannel (config, firstSrcDst); + retval = MXC_DMA_ConfigChannel(config, firstSrcDst); if (retval != E_NO_ERROR) { return retval; } - retval = MXC_DMA_EnableInt (channel); + retval = MXC_DMA_EnableInt(channel); if (retval != E_NO_ERROR) { return retval; } - retval = MXC_DMA_ChannelEnableInt (channel, MXC_F_DMA_CTRL_CTZ_IE); + retval = MXC_DMA_ChannelEnableInt(channel, MXC_F_DMA_CTRL_CTZ_IE); if (retval != E_NO_ERROR) { return retval; } - MXC_DMA_SetCallback (channel, transfer_callback); + MXC_DMA_SetCallback(channel, transfer_callback); memcpy_resource[channel].userCallback = (void*) callback; - return MXC_DMA_Start (channel); + return MXC_DMA_Start(channel); } diff --git a/Libraries/PeriphDrivers/Source/EMAC/emac_reva.c b/Libraries/PeriphDrivers/Source/EMAC/emac_reva.c index fc207cd6e..79052d326 100644 --- a/Libraries/PeriphDrivers/Source/EMAC/emac_reva.c +++ b/Libraries/PeriphDrivers/Source/EMAC/emac_reva.c @@ -38,72 +38,72 @@ /******* Variables *******/ mxc_emac_device_t mxc_emac_context; -static mxc_emac_device_t *emac = &mxc_emac_context; +static mxc_emac_device_t* emac = &mxc_emac_context; /******* Functions *******/ /* ************************************************************************* */ /* Private Functions */ /* ************************************************************************* */ -static void emac_mdio_write (unsigned char reg, unsigned short value) +static void emac_mdio_write(unsigned char reg, unsigned short value) { unsigned int netctl; unsigned int netstat; unsigned int frame; - netctl = EMAC_READL (emac, cn); - netctl |= EMAC_BIT (CN, MPEN); - EMAC_WRITEL (emac, cn, netctl); + netctl = EMAC_READL(emac, cn); + netctl |= EMAC_BIT(CN, MPEN); + EMAC_WRITEL(emac, cn, netctl); - frame = (EMAC_BF (PHY_MT, SOP, 1) |\ - EMAC_BF (PHY_MT, OP, 1) |\ - EMAC_BF (PHY_MT, PHYADDR, emac->phy_addr) |\ - EMAC_BF (PHY_MT, REGADDR, reg) |\ - EMAC_BF (PHY_MT, CODE, 2) |\ - EMAC_BF (PHY_MT, DATA, value)); - EMAC_WRITEL (emac, phy_mt, frame); + frame = (EMAC_BF(PHY_MT, SOP, 1) | \ + EMAC_BF(PHY_MT, OP, 1) | \ + EMAC_BF(PHY_MT, PHYADDR, emac->phy_addr) | \ + EMAC_BF(PHY_MT, REGADDR, reg) | \ + EMAC_BF(PHY_MT, CODE, 2) | \ + EMAC_BF(PHY_MT, DATA, value)); + EMAC_WRITEL(emac, phy_mt, frame); do { - netstat = EMAC_READL (emac, status); + netstat = EMAC_READL(emac, status); } - while (! (netstat & EMAC_BIT (STATUS, IDLE))); + while (!(netstat & EMAC_BIT(STATUS, IDLE))); - netctl = EMAC_READL (emac, cn); - netctl &= ~EMAC_BIT (CN, MPEN); - EMAC_WRITEL (emac, cn, netctl); + netctl = EMAC_READL(emac, cn); + netctl &= ~EMAC_BIT(CN, MPEN); + EMAC_WRITEL(emac, cn, netctl); } -static unsigned short emac_mdio_read (unsigned char reg) +static unsigned short emac_mdio_read(unsigned char reg) { unsigned int netctl; unsigned int netstat; unsigned int frame; - netctl = EMAC_READL (emac, cn); - netctl |= EMAC_BIT (CN, MPEN); - EMAC_WRITEL (emac, cn, netctl); + netctl = EMAC_READL(emac, cn); + netctl |= EMAC_BIT(CN, MPEN); + EMAC_WRITEL(emac, cn, netctl); - frame = (EMAC_BF (PHY_MT, SOP, 1) |\ - EMAC_BF (PHY_MT, OP, 2) |\ - EMAC_BF (PHY_MT, PHYADDR, emac->phy_addr) |\ - EMAC_BF (PHY_MT, REGADDR, reg) |\ - EMAC_BF (PHY_MT, CODE, 2)); - EMAC_WRITEL (emac, phy_mt, frame); + frame = (EMAC_BF(PHY_MT, SOP, 1) | \ + EMAC_BF(PHY_MT, OP, 2) | \ + EMAC_BF(PHY_MT, PHYADDR, emac->phy_addr) | \ + EMAC_BF(PHY_MT, REGADDR, reg) | \ + EMAC_BF(PHY_MT, CODE, 2)); + EMAC_WRITEL(emac, phy_mt, frame); do { - netstat = EMAC_READL (emac, status); + netstat = EMAC_READL(emac, status); } - while (! (netstat & EMAC_BIT (STATUS, IDLE))); + while (!(netstat & EMAC_BIT(STATUS, IDLE))); - frame = EMAC_READL (emac, phy_mt); + frame = EMAC_READL(emac, phy_mt); - netctl = EMAC_READL (emac, cn); - netctl &= ~EMAC_BIT (CN, MPEN); - EMAC_WRITEL (emac, cn, netctl); + netctl = EMAC_READL(emac, cn); + netctl &= ~EMAC_BIT(CN, MPEN); + EMAC_WRITEL(emac, cn, netctl); - return EMAC_BFEXT (PHY_MT, DATA, frame); + return EMAC_BFEXT(PHY_MT, DATA, frame); } -static void emac_reclaim_rx_buffers (unsigned int new_tail) +static void emac_reclaim_rx_buffers(unsigned int new_tail) { unsigned int i; @@ -127,27 +127,27 @@ static void emac_reclaim_rx_buffers (unsigned int new_tail) emac->rx_tail = new_tail; } -static void emac_phy_reset (void) +static void emac_phy_reset(void) { unsigned short status; int i; - emac_mdio_write (MII_ADVERTISE, (ADVERTISE_CSMA | ADVERTISE_ALL)); - emac_mdio_write (MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART)); + emac_mdio_write(MII_ADVERTISE, (ADVERTISE_CSMA | ADVERTISE_ALL)); + emac_mdio_write(MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART)); for (i = 0; i < (CONFIG_SYS_EMAC_AUTONEG_TIMEOUT / 100); i++) { - status = emac_mdio_read (MII_BMSR); + status = emac_mdio_read(MII_BMSR); if (status & BMSR_ANEGCOMPLETE) { break; } - emac->delay_us (100); + emac->delay_us(100); } } #ifdef CONFIG_EMAC_SEARCH_PHY -static int emac_phy_find (void) +static int emac_phy_find(void) { int i; unsigned short phy_id; @@ -155,7 +155,7 @@ static int emac_phy_find (void) for (i = 0; i < 32; i++) { emac->phy_addr = i; - phy_id = emac_mdio_read (MII_PHYSID1); + phy_id = emac_mdio_read(MII_PHYSID1); if (0xffff != phy_id) { return E_NO_ERROR; @@ -166,7 +166,7 @@ static int emac_phy_find (void) } #endif //CONFIG_EMAC_SEARCH_PHY -static unsigned int emac_mii_nway_result (unsigned int negotiated) +static unsigned int emac_mii_nway_result(unsigned int negotiated) { unsigned int ret; @@ -189,7 +189,7 @@ static unsigned int emac_mii_nway_result (unsigned int negotiated) return ret; } -static int emac_phy_init (void) +static int emac_phy_init(void) { int result = E_NO_ERROR; unsigned short phy_id; @@ -211,54 +211,54 @@ static int emac_phy_init (void) #endif //CONFIG_EMAC_SEARCH_PHY - phy_id = emac_mdio_read (MII_PHYSID1); + phy_id = emac_mdio_read(MII_PHYSID1); if (0xffff == phy_id) { return E_NO_DEVICE; } - status = emac_mdio_read (MII_BMSR); + status = emac_mdio_read(MII_BMSR); - if (! (status & BMSR_LSTATUS)) { + if (!(status & BMSR_LSTATUS)) { emac_phy_reset(); for (i = 0; i < (CONFIG_SYS_EMAC_AUTONEG_TIMEOUT / 100); i++) { - status = emac_mdio_read (MII_BMSR); + status = emac_mdio_read(MII_BMSR); if (status & BMSR_LSTATUS) { break; } - emac->delay_us (100); + emac->delay_us(100); } } - if (! (status & BMSR_LSTATUS)) { + if (!(status & BMSR_LSTATUS)) { return E_NO_RESPONSE; //PHY Link Down } else { - adv = emac_mdio_read (MII_ADVERTISE); - lpa = emac_mdio_read (MII_LPA); + adv = emac_mdio_read(MII_ADVERTISE); + lpa = emac_mdio_read(MII_LPA); - media = emac_mii_nway_result (lpa & adv); + media = emac_mii_nway_result(lpa & adv); speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 1 : 0); duplex = (media & ADVERTISE_FULL) ? 1 : 0; - ncfgr = EMAC_READL (emac, cfg); - ncfgr &= ~ (EMAC_BIT (CFG, SPD) | EMAC_BIT (CFG, FULLDPLX)); + ncfgr = EMAC_READL(emac, cfg); + ncfgr &= ~(EMAC_BIT(CFG, SPD) | EMAC_BIT(CFG, FULLDPLX)); if (speed) { - ncfgr |= EMAC_BIT (CFG, SPD); + ncfgr |= EMAC_BIT(CFG, SPD); } if (duplex) { - ncfgr |= EMAC_BIT (CFG, FULLDPLX); + ncfgr |= EMAC_BIT(CFG, FULLDPLX); } /* Discard FCS Field */ - ncfgr |= EMAC_BIT (CFG, DCRXFCS); + ncfgr |= EMAC_BIT(CFG, DCRXFCS); - EMAC_WRITEL (emac, cfg, ncfgr); + EMAC_WRITEL(emac, cfg, ncfgr); } return result; @@ -267,7 +267,7 @@ static int emac_phy_init (void) /* ************************************************************************* */ /* Control/Configuration Functions */ /* ************************************************************************* */ -int MXC_EMAC_RevA_Init (mxc_emac_config_t *config) +int MXC_EMAC_RevA_Init(mxc_emac_config_t* config) { int result = E_UNKNOWN; unsigned int ncfgr, emac_pclk_rate, clk_div; @@ -296,37 +296,37 @@ int MXC_EMAC_RevA_Init (mxc_emac_config_t *config) clk_div = EMAC_CLK_DIV64; } - ncfgr = EMAC_BF (CFG, MDCCLK, clk_div); - EMAC_WRITEL (emac, cfg, ncfgr); + ncfgr = EMAC_BF(CFG, MDCCLK, clk_div); + EMAC_WRITEL(emac, cfg, ncfgr); /* Initialization to be finished */ emac->first_init = 1; } /* Set configuration */ - result = MXC_EMAC_RevA_SetConfiguration (config); + result = MXC_EMAC_RevA_SetConfiguration(config); return result; } -int MXC_EMAC_RevA_SetConfiguration (mxc_emac_config_t *config) +int MXC_EMAC_RevA_SetConfiguration(mxc_emac_config_t* config) { if (!emac->first_init) { return E_UNINITIALIZED; } - if (! (config->rx_buff) || ! (config->rx_ring_buff) || ! (config->tx_ring_buff)) { + if (!(config->rx_buff) || !(config->rx_ring_buff) || !(config->tx_ring_buff)) { return E_NULL_PTR; } - if ( (config->rx_ring_buff_size % sizeof (mxc_emac_dma_desc_t)) || - (config->tx_ring_buff_size % sizeof (mxc_emac_dma_desc_t)) || + if ((config->rx_ring_buff_size % sizeof(mxc_emac_dma_desc_t)) || + (config->tx_ring_buff_size % sizeof(mxc_emac_dma_desc_t)) || (config->rx_buff_size % EMAC_RX_BUFFER_SIZE)) { return E_INVALID; } - if ( ( (config->rx_ring_buff_size / sizeof (mxc_emac_dma_desc_t)) > MAX_SYS_EMAC_RX_RING_SIZE) || - ( (config->tx_ring_buff_size / sizeof (mxc_emac_dma_desc_t)) > MAX_SYS_EMAC_TX_RING_SIZE) || + if (((config->rx_ring_buff_size / sizeof(mxc_emac_dma_desc_t)) > MAX_SYS_EMAC_RX_RING_SIZE) || + ((config->tx_ring_buff_size / sizeof(mxc_emac_dma_desc_t)) > MAX_SYS_EMAC_TX_RING_SIZE) || (config->rx_buff_size > MAX_SYS_EMAC_RX_BUFFER_SIZE)) { return E_INVALID; } @@ -335,34 +335,34 @@ int MXC_EMAC_RevA_SetConfiguration (mxc_emac_config_t *config) return E_INVALID; } - emac->rx_buffer = (void *) (config->rx_buff); - emac->rx_buffer_dma = (unsigned int) (config->rx_buff); + emac->rx_buffer = (void*)(config->rx_buff); + emac->rx_buffer_dma = (unsigned int)(config->rx_buff); emac->rx_buffer_size = config->rx_buff_size; - emac->rx_ring = (mxc_emac_dma_desc_t *) (config->rx_ring_buff); - emac->rx_ring_dma = (unsigned int) (config->rx_ring_buff); - emac->rx_ring_size = (config->rx_ring_buff_size / sizeof (mxc_emac_dma_desc_t)); + emac->rx_ring = (mxc_emac_dma_desc_t*)(config->rx_ring_buff); + emac->rx_ring_dma = (unsigned int)(config->rx_ring_buff); + emac->rx_ring_size = (config->rx_ring_buff_size / sizeof(mxc_emac_dma_desc_t)); - emac->tx_ring = (mxc_emac_dma_desc_t *) (config->tx_ring_buff); - emac->tx_ring_dma = (unsigned int) (config->tx_ring_buff); - emac->tx_ring_size = (config->tx_ring_buff_size / sizeof (mxc_emac_dma_desc_t)); + emac->tx_ring = (mxc_emac_dma_desc_t*)(config->tx_ring_buff); + emac->tx_ring_dma = (unsigned int)(config->tx_ring_buff); + emac->tx_ring_size = (config->tx_ring_buff_size / sizeof(mxc_emac_dma_desc_t)); emac->phy_addr = config->phy_addr; emac->delay_us = config->delay_us; if (config->interrupt_mode) { - memcpy ( (void *) &emac->cb_funcs, (const void *) &config->conf_cb_funcs, sizeof (mxc_emac_cb_funcs_tbl_t)); - MXC_EMAC_RevA_EnableInterruptEvents (config->interrupt_events); + memcpy((void*) &emac->cb_funcs, (const void*) &config->conf_cb_funcs, sizeof(mxc_emac_cb_funcs_tbl_t)); + MXC_EMAC_RevA_EnableInterruptEvents(config->interrupt_events); } else { - memset ( (void *) &emac->cb_funcs, 0, sizeof (mxc_emac_cb_funcs_tbl_t)); - MXC_EMAC_RevA_DisableInterruptEvents (0xFFFFFFFF); + memset((void*) &emac->cb_funcs, 0, sizeof(mxc_emac_cb_funcs_tbl_t)); + MXC_EMAC_RevA_DisableInterruptEvents(0xFFFFFFFF); } return E_NO_ERROR; } -int MXC_EMAC_RevA_SetHwAddr (unsigned char *enetaddr) +int MXC_EMAC_RevA_SetHwAddr(unsigned char* enetaddr) { unsigned short hwaddr_top; unsigned int hwaddr_bottom; @@ -372,19 +372,19 @@ int MXC_EMAC_RevA_SetHwAddr (unsigned char *enetaddr) } /* Set Hardware Address */ - hwaddr_bottom = ( (enetaddr[0]) |\ - (enetaddr[1] << 8) |\ - (enetaddr[2] << 16) |\ - (enetaddr[3] << 24)); - EMAC_WRITEL (emac, sa1l, hwaddr_bottom); + hwaddr_bottom = ((enetaddr[0]) | \ + (enetaddr[1] << 8) | \ + (enetaddr[2] << 16) | \ + (enetaddr[3] << 24)); + EMAC_WRITEL(emac, sa1l, hwaddr_bottom); hwaddr_top = (enetaddr[4] | (enetaddr[5] << 8)); - EMAC_WRITEL (emac, sa1h, hwaddr_top); + EMAC_WRITEL(emac, sa1h, hwaddr_top); return E_NO_ERROR; } -int MXC_EMAC_RevA_EnableInterruptEvents (unsigned int events) +int MXC_EMAC_RevA_EnableInterruptEvents(unsigned int events) { unsigned int ier, imr; @@ -393,16 +393,16 @@ int MXC_EMAC_RevA_EnableInterruptEvents (unsigned int events) } /* First Read from Interrupt Mask Register */ - imr = EMAC_READL (emac, int_mask); + imr = EMAC_READL(emac, int_mask); /* IER is Write-Only */ ier = ~imr | events; - EMAC_WRITEL (emac, int_en, ier); + EMAC_WRITEL(emac, int_en, ier); return E_NO_ERROR; } -int MXC_EMAC_RevA_DisableInterruptEvents (unsigned int events) +int MXC_EMAC_RevA_DisableInterruptEvents(unsigned int events) { unsigned int idr, imr; @@ -411,11 +411,11 @@ int MXC_EMAC_RevA_DisableInterruptEvents (unsigned int events) } /* First Read from Interrupt Mask Register */ - imr = EMAC_READL (emac, int_mask); + imr = EMAC_READL(emac, int_mask); /* IDR is Write-Only */ idr = imr | events; - EMAC_WRITEL (emac, int_dis, idr); + EMAC_WRITEL(emac, int_dis, idr); return E_NO_ERROR; } @@ -423,7 +423,7 @@ int MXC_EMAC_RevA_DisableInterruptEvents (unsigned int events) /* ************************************************************************* */ /* Low-Level Functions */ /* ************************************************************************* */ -int MXC_EMAC_RevA_Start (void) +int MXC_EMAC_RevA_Start(void) { int result = E_UNKNOWN; unsigned int i; @@ -438,7 +438,7 @@ int MXC_EMAC_RevA_Start (void) paddr = emac->rx_buffer_dma; for (i = 0; i < emac->rx_ring_size; i++) { - if ( (emac->rx_ring_size - 1) == i) { + if ((emac->rx_ring_size - 1) == i) { paddr |= RXADDR_WRAP; } @@ -451,7 +451,7 @@ int MXC_EMAC_RevA_Start (void) for (i = 0; i < emac->tx_ring_size; i++) { emac->tx_ring[i].addr = 0; - if ( (emac->tx_ring_size - 1) == i) { + if ((emac->tx_ring_size - 1) == i) { emac->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP; } else { @@ -463,11 +463,11 @@ int MXC_EMAC_RevA_Start (void) emac->tx_head = 0; emac->rx_tail = 0; - EMAC_WRITEL (emac, rxbuf_ptr, emac->rx_ring_dma); - EMAC_WRITEL (emac, txbuf_ptr, emac->tx_ring_dma); + EMAC_WRITEL(emac, rxbuf_ptr, emac->rx_ring_dma); + EMAC_WRITEL(emac, txbuf_ptr, emac->tx_ring_dma); #ifdef CONFIG_EMAC_MII_MODE - EMAC_WRITEL (emac, usrio, EMAC_BIT (USRIO, MII)); + EMAC_WRITEL(emac, usrio, EMAC_BIT(USRIO, MII)); #endif result = emac_phy_init(); @@ -475,54 +475,54 @@ int MXC_EMAC_RevA_Start (void) if (E_NO_ERROR == result) { /* For Diagnostic */ #ifdef CONFIG_EMAC_LOCAL_LOOPBACK_MODE - ncr = EMAC_READL (emac, cn); + ncr = EMAC_READL(emac, cn); - ncr &= ~EMAC_BIT (CN, LB); - ncr |= EMAC_BIT (CN, LBL); + ncr &= ~EMAC_BIT(CN, LB); + ncr |= EMAC_BIT(CN, LBL); - EMAC_WRITEL (emac, cn, ncr); + EMAC_WRITEL(emac, cn, ncr); #endif /* Enable TX and RX */ - ncr = EMAC_READL (emac, cn); - ncr |= EMAC_BIT (CN, TXEN); - ncr |= EMAC_BIT (CN, TXSTART); - EMAC_WRITEL (emac, cn, ncr); + ncr = EMAC_READL(emac, cn); + ncr |= EMAC_BIT(CN, TXEN); + ncr |= EMAC_BIT(CN, TXSTART); + EMAC_WRITEL(emac, cn, ncr); - ncr = EMAC_READL (emac, cn); - ncr |= EMAC_BIT (CN, RXEN); - EMAC_WRITEL (emac, cn, ncr); + ncr = EMAC_READL(emac, cn); + ncr |= EMAC_BIT(CN, RXEN); + EMAC_WRITEL(emac, cn, ncr); } return result; } -int MXC_EMAC_RevA_Stop (void) +int MXC_EMAC_RevA_Stop(void) { unsigned int ncr; unsigned int tsr; /* Halt the Controller and Wait for Any Ongoing Transmission to End */ - ncr = EMAC_READL (emac, cn); - ncr |= EMAC_BIT (CN, TXHALT); - EMAC_WRITEL (emac, cn, ncr); + ncr = EMAC_READL(emac, cn); + ncr |= EMAC_BIT(CN, TXHALT); + EMAC_WRITEL(emac, cn, ncr); do { - tsr = EMAC_READL (emac, tx_st); + tsr = EMAC_READL(emac, tx_st); } - while (tsr & EMAC_BIT (TX_ST, TXGO)); + while (tsr & EMAC_BIT(TX_ST, TXGO)); /* Clear Statistics */ - EMAC_WRITEL (emac, cn, EMAC_BIT (CN, CLST)); + EMAC_WRITEL(emac, cn, EMAC_BIT(CN, CLST)); return E_NO_ERROR; } -int MXC_EMAC_RevA_ReadLinkStatus (void) +int MXC_EMAC_RevA_ReadLinkStatus(void) { int result = E_UNKNOWN; unsigned short status; - status = emac_mdio_read (MII_BMSR); + status = emac_mdio_read(MII_BMSR); if (status & BMSR_LSTATUS) { result = E_NO_ERROR; @@ -537,7 +537,7 @@ int MXC_EMAC_RevA_ReadLinkStatus (void) /* ************************************************************************* */ /* Transaction-Level Functions */ /* ************************************************************************* */ -int MXC_EMAC_RevA_SendSync (const void *packet, unsigned int length) +int MXC_EMAC_RevA_SendSync(const void* packet, unsigned int length) { int i; unsigned int paddr; @@ -571,11 +571,11 @@ int MXC_EMAC_RevA_SendSync (const void *packet, unsigned int length) emac->tx_ring[tx_head].addr = paddr; barrier(); - ncr = EMAC_READL (emac, cn); - ncr |= EMAC_BIT (CN, TXEN); - ncr |= EMAC_BIT (CN, TXSTART); - ncr |= EMAC_BIT (CN, RXEN); - EMAC_WRITEL (emac, cn, ncr); + ncr = EMAC_READL(emac, cn); + ncr |= EMAC_BIT(CN, TXEN); + ncr |= EMAC_BIT(CN, TXSTART); + ncr |= EMAC_BIT(CN, RXEN); + EMAC_WRITEL(emac, cn, ncr); for (i = 0; i <= CONFIG_SYS_EMAC_TX_TIMEOUT; i++) { barrier(); @@ -586,7 +586,7 @@ int MXC_EMAC_RevA_SendSync (const void *packet, unsigned int length) break; } - emac->delay_us (1); + emac->delay_us(1); } if (i <= CONFIG_SYS_EMAC_TX_TIMEOUT) { @@ -605,7 +605,7 @@ int MXC_EMAC_RevA_SendSync (const void *packet, unsigned int length) return E_NO_ERROR; } -int MXC_EMAC_RevA_SendAsync (const void *packet, unsigned int length) +int MXC_EMAC_RevA_SendAsync(const void* packet, unsigned int length) { unsigned int paddr; unsigned int ctrl; @@ -634,18 +634,18 @@ int MXC_EMAC_RevA_SendAsync (const void *packet, unsigned int length) emac->tx_ring[tx_head].addr = paddr; barrier(); - ncr = EMAC_READL (emac, cn); - ncr |= EMAC_BIT (CN, TXEN); - ncr |= EMAC_BIT (CN, TXSTART); - ncr |= EMAC_BIT (CN, RXEN); - EMAC_WRITEL (emac, cn, ncr); + ncr = EMAC_READL(emac, cn); + ncr |= EMAC_BIT(CN, TXEN); + ncr |= EMAC_BIT(CN, TXSTART); + ncr |= EMAC_BIT(CN, RXEN); + EMAC_WRITEL(emac, cn, ncr); barrier(); return E_NO_ERROR; } -int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) +int MXC_EMAC_RevA_Recv(void* rx_buff, unsigned int max_len) { int result = E_UNKNOWN; int wrapped = 0; @@ -655,8 +655,8 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) unsigned int headlen; unsigned int taillen; unsigned char packet_received = 0; - unsigned char *tail_buff_ptr; - void *buffer; + unsigned char* tail_buff_ptr; + void* buffer; if (!emac->first_init) { return E_UNINITIALIZED; @@ -669,7 +669,7 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) rx_tail = emac->rx_tail; while (1) { - if (! (emac->rx_ring[rx_tail].addr & RXADDR_USED)) { + if (!(emac->rx_ring[rx_tail].addr & RXADDR_USED)) { /* No RX Frame */ return 0; } @@ -678,7 +678,7 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) if (status & RXBUF_FRAME_START) { if (rx_tail != emac->rx_tail) { - emac_reclaim_rx_buffers (rx_tail); + emac_reclaim_rx_buffers(rx_tail); } wrapped = 0; @@ -693,11 +693,11 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) if (wrapped) { headlen = EMAC_RX_BUFFER_SIZE * (emac->rx_ring_size - emac->rx_tail); taillen = length - headlen; - tail_buff_ptr = (unsigned char *) rx_buff + headlen; + tail_buff_ptr = (unsigned char*) rx_buff + headlen; - if ( (headlen + taillen) <= max_len) { - memcpy (rx_buff, (const void *) buffer, headlen); - memcpy ( (void *) tail_buff_ptr, (const void *) emac->rx_buffer, taillen); + if ((headlen + taillen) <= max_len) { + memcpy(rx_buff, (const void*) buffer, headlen); + memcpy((void*) tail_buff_ptr, (const void*) emac->rx_buffer, taillen); result = headlen + taillen; } else { @@ -705,7 +705,7 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) } } else if (length <= max_len) { - memcpy (rx_buff, (const void *) buffer, length); + memcpy(rx_buff, (const void*) buffer, length); result = length; } else { @@ -716,7 +716,7 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) rx_tail = 0; } - emac_reclaim_rx_buffers (rx_tail); + emac_reclaim_rx_buffers(rx_tail); } else { if (++rx_tail >= emac->rx_ring_size) { @@ -735,61 +735,61 @@ int MXC_EMAC_RevA_Recv (void *rx_buff, unsigned int max_len) return result; } -void MXC_EMAC_RevA_IrqHandler (void) +void MXC_EMAC_RevA_IrqHandler(void) { unsigned int isr = 0; - isr = EMAC_READL (emac, int_st); + isr = EMAC_READL(emac, int_st); - if ( (isr & MXC_EMAC_EVENT_MPS) && emac->cb_funcs.mps_handler) { + if ((isr & MXC_EMAC_EVENT_MPS) && emac->cb_funcs.mps_handler) { emac->cb_funcs.mps_handler(); } - if ( (isr & MXC_EMAC_EVENT_RXCMPL) && emac->cb_funcs.rxcmpl_handler) { + if ((isr & MXC_EMAC_EVENT_RXCMPL) && emac->cb_funcs.rxcmpl_handler) { emac->cb_funcs.rxcmpl_handler(); } - if ( (isr & MXC_EMAC_EVENT_RXUBR) && emac->cb_funcs.rxubr_handler) { + if ((isr & MXC_EMAC_EVENT_RXUBR) && emac->cb_funcs.rxubr_handler) { emac->cb_funcs.rxubr_handler(); } - if ( (isr & MXC_EMAC_EVENT_TXUBR) && emac->cb_funcs.txubr_handler) { + if ((isr & MXC_EMAC_EVENT_TXUBR) && emac->cb_funcs.txubr_handler) { emac->cb_funcs.txubr_handler(); } - if ( (isr & MXC_EMAC_EVENT_TXUR) && emac->cb_funcs.txur_handler) { + if ((isr & MXC_EMAC_EVENT_TXUR) && emac->cb_funcs.txur_handler) { emac->cb_funcs.txur_handler(); } - if ( (isr & MXC_EMAC_EVENT_RLE) && emac->cb_funcs.rle_handler) { + if ((isr & MXC_EMAC_EVENT_RLE) && emac->cb_funcs.rle_handler) { emac->cb_funcs.rle_handler(); } - if ( (isr & MXC_EMAC_EVENT_TXERR) && emac->cb_funcs.txerr_handler) { + if ((isr & MXC_EMAC_EVENT_TXERR) && emac->cb_funcs.txerr_handler) { emac->cb_funcs.txerr_handler(); } - if ( (isr & MXC_EMAC_EVENT_TXCMPL) && emac->cb_funcs.txcmpl_handler) { + if ((isr & MXC_EMAC_EVENT_TXCMPL) && emac->cb_funcs.txcmpl_handler) { emac->cb_funcs.txcmpl_handler(); } - if ( (isr & MXC_EMAC_EVENT_LC) && emac->cb_funcs.lc_handler) { + if ((isr & MXC_EMAC_EVENT_LC) && emac->cb_funcs.lc_handler) { emac->cb_funcs.lc_handler(); } - if ( (isr & MXC_EMAC_EVENT_RXOR) && emac->cb_funcs.rxor_handler) { + if ((isr & MXC_EMAC_EVENT_RXOR) && emac->cb_funcs.rxor_handler) { emac->cb_funcs.rxor_handler(); } - if ( (isr & MXC_EMAC_EVENT_HRESPNO) && emac->cb_funcs.hrespno_handler) { + if ((isr & MXC_EMAC_EVENT_HRESPNO) && emac->cb_funcs.hrespno_handler) { emac->cb_funcs.hrespno_handler(); } - if ( (isr & MXC_EMAC_EVENT_PPR) && emac->cb_funcs.ppr_handler) { + if ((isr & MXC_EMAC_EVENT_PPR) && emac->cb_funcs.ppr_handler) { emac->cb_funcs.ppr_handler(); } - if ( (isr & MXC_EMAC_EVENT_PTZ) && emac->cb_funcs.ptz_handler) { + if ((isr & MXC_EMAC_EVENT_PTZ) && emac->cb_funcs.ptz_handler) { emac->cb_funcs.ptz_handler(); } } diff --git a/Libraries/PeriphDrivers/Source/FLC/flc_common.c b/Libraries/PeriphDrivers/Source/FLC/flc_common.c index e350a92f3..d44f7217b 100644 --- a/Libraries/PeriphDrivers/Source/FLC/flc_common.c +++ b/Libraries/PeriphDrivers/Source/FLC/flc_common.c @@ -51,15 +51,15 @@ #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif // Length is number of 32-bit words -int MXC_FLC_Com_VerifyData (uint32_t address, uint32_t length, uint32_t * data) +int MXC_FLC_Com_VerifyData(uint32_t address, uint32_t length, uint32_t* data) { - volatile uint32_t * ptr; + volatile uint32_t* ptr; - for (ptr = (uint32_t*) address; ptr < ( ( (uint32_t*) (address)) + length); ptr++, data++) { + for (ptr = (uint32_t*) address; ptr < (((uint32_t*)(address)) + length); ptr++, data++) { if (*ptr != *data) { return E_BAD_STATE; } @@ -72,15 +72,15 @@ int MXC_FLC_Com_VerifyData (uint32_t address, uint32_t length, uint32_t * data) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif // make sure to disable ICC with ICC_Disable(); before Running this function -int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) +int MXC_FLC_Com_Write(uint32_t address, uint32_t length, uint32_t* buffer) { int err; uint32_t bytes_written; uint8_t current_data[4]; - uint32_t *current_data_32 = (uint32_t *) current_data; + uint32_t* current_data_32 = (uint32_t*) current_data; // Align the address to a word boundary and read/write if we have to if (address & 0x3) { @@ -89,13 +89,13 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) bytes_written = 4 - (address & 0x3); // Save the data currently in the flash - memcpy (current_data, (void*) (address & (~0x3)), 4); + memcpy(current_data, (void*)(address & (~0x3)), 4); // Modify current_data to insert the data from buffer - memcpy (¤t_data[4-bytes_written], buffer, bytes_written); + memcpy(¤t_data[4 - bytes_written], buffer, bytes_written); // Write the modified data - if ( (err = MXC_FLC_Write32 (address - (address % 4), *current_data_32)) != E_NO_ERROR) { + if ((err = MXC_FLC_Write32(address - (address % 4), *current_data_32)) != E_NO_ERROR) { return err; } @@ -103,14 +103,14 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) length -= bytes_written; //Align the uint32_t buffer with the new address - uint8_t *buffer_unaligned = (uint8_t *) buffer; + uint8_t* buffer_unaligned = (uint8_t*) buffer; buffer_unaligned += bytes_written; - buffer = (uint32_t *) buffer_unaligned; + buffer = (uint32_t*) buffer_unaligned; } // Align the address to a 4-word (128bit) boundary - while ( (length >= 4) && ( (address & 0xF) != 0)) { - if ( (err = MXC_FLC_Write32 (address, *buffer)) != E_NO_ERROR) { + while ((length >= 4) && ((address & 0xF) != 0)) { + if ((err = MXC_FLC_Write32(address, *buffer)) != E_NO_ERROR) { return err; } @@ -121,7 +121,7 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) if (length >= 16) { while (length >= 16) { - if ( (err = MXC_FLC_Write128 (address, buffer)) != E_NO_ERROR) { + if ((err = MXC_FLC_Write128(address, buffer)) != E_NO_ERROR) { return err; } @@ -133,7 +133,7 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) } while (length >= 4) { - if ( (err = MXC_FLC_Write32 (address, *buffer)) != E_NO_ERROR) { + if ((err = MXC_FLC_Write32(address, *buffer)) != E_NO_ERROR) { return err; } @@ -144,12 +144,12 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) if (length > 0) { // Save the data currently in the flash - memcpy (current_data, (void*) (address), 4); + memcpy(current_data, (void*)(address), 4); // Modify current_data to insert the data from buffer - memcpy (current_data, buffer, length); + memcpy(current_data, buffer, length); - if ( (err = MXC_FLC_Write32 (address, *current_data_32)) != E_NO_ERROR) { + if ((err = MXC_FLC_Write32(address, *current_data_32)) != E_NO_ERROR) { return err; } } @@ -162,9 +162,9 @@ int MXC_FLC_Com_Write (uint32_t address, uint32_t length, uint32_t *buffer) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -void MXC_FLC_Com_Read (int address, void* buffer, int len) +void MXC_FLC_Com_Read(int address, void* buffer, int len) { - memcpy (buffer, (void*) address, len); + memcpy(buffer, (void*) address, len); } diff --git a/Libraries/PeriphDrivers/Source/FLC/flc_me17.c b/Libraries/PeriphDrivers/Source/FLC/flc_me17.c index f4d06d81a..c6946b304 100644 --- a/Libraries/PeriphDrivers/Source/FLC/flc_me17.c +++ b/Libraries/PeriphDrivers/Source/FLC/flc_me17.c @@ -50,18 +50,18 @@ #include "mcr_regs.h" // For ECCEN registers. //****************************************************************************** -void MXC_FLC_ME17_Flash_Operation (void) +void MXC_FLC_ME17_Flash_Operation(void) { /* Flush all instruction caches */ MXC_GCR->sysctrl |= MXC_F_GCR_SYSCTRL_ICC0_FLUSH; - + /* Wait for flush to complete */ while (MXC_GCR->sysctrl & MXC_F_GCR_SYSCTRL_ICC0_FLUSH) { } } //****************************************************************************** -int MXC_FLC_ME17_GetByAddress (mxc_flc_regs_t **flc, uint32_t addr) +int MXC_FLC_ME17_GetByAddress(mxc_flc_regs_t** flc, uint32_t addr) { if ((addr >= MXC_FLASH_MEM_BASE) && (addr < (MXC_FLASH_MEM_BASE + MXC_FLASH_MEM_SIZE))) { @@ -73,23 +73,23 @@ int MXC_FLC_ME17_GetByAddress (mxc_flc_regs_t **flc, uint32_t addr) else { return E_BAD_PARAM; } - + return E_NO_ERROR; } //****************************************************************************** -int MXC_FLC_ME17_GetPhysicalAddress (uint32_t addr, uint32_t *result) +int MXC_FLC_ME17_GetPhysicalAddress(uint32_t addr, uint32_t* result) { if ((addr >= MXC_FLASH_MEM_BASE) && (addr < (MXC_FLASH_MEM_BASE + MXC_FLASH_MEM_SIZE))) { - *result = addr & (MXC_FLASH_MEM_SIZE-1); + *result = addr & (MXC_FLASH_MEM_SIZE - 1); } else if ((addr >= MXC_INFO_MEM_BASE) && (addr < (MXC_INFO_MEM_BASE + MXC_INFO_MEM_SIZE))) { - *result = (addr & (MXC_INFO_MEM_SIZE-1)) + MXC_FLASH_MEM_SIZE; + *result = (addr & (MXC_INFO_MEM_SIZE - 1)) + MXC_FLASH_MEM_SIZE; } else { return E_BAD_PARAM; } - + return E_NO_ERROR; } @@ -103,9 +103,9 @@ int MXC_FLC_Init() #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_FLC_Busy (void) +int MXC_FLC_Busy(void) { return MXC_FLC_RevA_Busy(); } @@ -113,198 +113,198 @@ int MXC_FLC_Busy (void) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_FLC_ME17_PageErase (uint32_t address) +int MXC_FLC_ME17_PageErase(uint32_t address) { int err; uint32_t addr; - mxc_flc_regs_t *flc = NULL; - + mxc_flc_regs_t* flc = NULL; + // Get FLC Instance - if ( (err = MXC_FLC_ME17_GetByAddress (&flc, address)) != E_NO_ERROR) { + if ((err = MXC_FLC_ME17_GetByAddress(&flc, address)) != E_NO_ERROR) { return err; } - - if ( (err = MXC_FLC_ME17_GetPhysicalAddress (address, &addr)) < E_NO_ERROR) { + + if ((err = MXC_FLC_ME17_GetPhysicalAddress(address, &addr)) < E_NO_ERROR) { return err; } - - if ( (err = MXC_prepare_flc (flc)) != E_NO_ERROR) { + + if ((err = MXC_prepare_flc(flc)) != E_NO_ERROR) { return err; } - - err = MXC_FLC_RevA_PageErase (flc,addr); + + err = MXC_FLC_RevA_PageErase(flc, addr); // Flush the cache MXC_FLC_ME17_Flash_Operation(); - + return err; } #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif // make sure to disable ICC with ICC_Disable(); before Running this function -int MXC_FLC_ME17_Write128 (uint32_t address, uint32_t *data) +int MXC_FLC_ME17_Write128(uint32_t address, uint32_t* data) { int err; - mxc_flc_regs_t *flc = NULL; + mxc_flc_regs_t* flc = NULL; uint32_t addr; - + // Address checked if it is 128-bit aligned if (address & 0xF) { return E_BAD_PARAM; } - + // Get FLC Instance - if ( (err = MXC_FLC_ME17_GetByAddress (&flc, address)) != E_NO_ERROR) { + if ((err = MXC_FLC_ME17_GetByAddress(&flc, address)) != E_NO_ERROR) { return err; } - - if ( (err = MXC_FLC_ME17_GetPhysicalAddress (address, &addr)) < E_NO_ERROR) { + + if ((err = MXC_FLC_ME17_GetPhysicalAddress(address, &addr)) < E_NO_ERROR) { return err; } - - err= MXC_FLC_RevA_Write128 (flc, addr, data); - + + err = MXC_FLC_RevA_Write128(flc, addr, data); + // Flush the cache MXC_FLC_ME17_Flash_Operation(); - - if ( (err= MXC_FLC_Com_VerifyData (address,4,data)) !=E_NO_ERROR) { + + if ((err = MXC_FLC_Com_VerifyData(address, 4, data)) != E_NO_ERROR) { return err; } - + return E_NO_ERROR; } //****************************************************************************** -int MXC_FLC_ME17_Write32 (uint32_t address, uint32_t data) +int MXC_FLC_ME17_Write32(uint32_t address, uint32_t data) { uint32_t addr, aligned; int err; - mxc_flc_regs_t *flc = NULL; - + mxc_flc_regs_t* flc = NULL; + // Address checked if it is byte addressable if (address & 0x3) { return E_BAD_PARAM; } - + // Align address to 128-bit word aligned = address & 0xfffffff0; - + // Get FLC Instance - if ( (err = MXC_FLC_ME17_GetByAddress (&flc, address)) != E_NO_ERROR) { + if ((err = MXC_FLC_ME17_GetByAddress(&flc, address)) != E_NO_ERROR) { return err; } - - if ( (err = MXC_FLC_ME17_GetPhysicalAddress (aligned, &addr)) < E_NO_ERROR) { + + if ((err = MXC_FLC_ME17_GetPhysicalAddress(aligned, &addr)) < E_NO_ERROR) { return err; } - - return MXC_FLC_RevA_Write32 (flc, address, data, addr); - + + return MXC_FLC_RevA_Write32(flc, address, data, addr); + } -int MXC_FLC_ME17_MassErase (void) +int MXC_FLC_ME17_MassErase(void) { - int err,i; - mxc_flc_regs_t *flc; - - for (i=0; ictrl & (MXC_F_FLC_CTRL_WR | MXC_F_FLC_CTRL_ME | MXC_F_FLC_CTRL_PGE)); } @@ -73,12 +73,12 @@ int MXC_busy_flc (mxc_flc_regs_t *flc) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_prepare_flc (mxc_flc_regs_t *flc) +int MXC_prepare_flc(mxc_flc_regs_t* flc) { /* Check if the flash controller is busy */ - if (MXC_busy_flc (flc)) { + if (MXC_busy_flc(flc)) { return E_BUSY; } @@ -100,17 +100,17 @@ int MXC_prepare_flc (mxc_flc_regs_t *flc) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_FLC_RevA_Busy (void) +int MXC_FLC_RevA_Busy(void) { uint32_t flc_cn = 0; int i; - mxc_flc_regs_t *flc; + mxc_flc_regs_t* flc; for (i = 0; i < MXC_FLC_INSTANCES; i++) { - flc = MXC_FLC_GET_FLC (i); - flc_cn = MXC_busy_flc (flc); + flc = MXC_FLC_GET_FLC(i); + flc_cn = MXC_busy_flc(flc); if (flc_cn != 0) { break; @@ -123,13 +123,13 @@ int MXC_FLC_RevA_Busy (void) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_FLC_RevA_MassErase (mxc_flc_regs_t *flc) +int MXC_FLC_RevA_MassErase(mxc_flc_regs_t* flc) { int err; - if ( (err = MXC_prepare_flc (flc)) != E_NO_ERROR) { + if ((err = MXC_prepare_flc(flc)) != E_NO_ERROR) { return err; } @@ -140,7 +140,7 @@ int MXC_FLC_RevA_MassErase (mxc_flc_regs_t *flc) flc->ctrl |= MXC_F_FLC_CTRL_ME; /* Wait until flash operation is complete */ - while (MXC_busy_flc (flc)); + while (MXC_busy_flc(flc)); /* Lock flash */ flc->ctrl &= ~MXC_F_FLC_CTRL_UNLOCK; @@ -158,9 +158,9 @@ int MXC_FLC_RevA_MassErase (mxc_flc_regs_t *flc) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif -int MXC_FLC_RevA_PageErase (mxc_flc_regs_t *flc,uint32_t addr) +int MXC_FLC_RevA_PageErase(mxc_flc_regs_t* flc, uint32_t addr) { /* Write page erase code */ flc->ctrl = (flc->ctrl & ~MXC_F_FLC_CTRL_ERASE_CODE) | MXC_S_FLC_CTRL_ERASE_CODE_ERASEPAGE; @@ -189,23 +189,23 @@ int MXC_FLC_RevA_PageErase (mxc_flc_regs_t *flc,uint32_t addr) #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif // make sure to disable ICC with ICC_Disable(); before Running this function -int MXC_FLC_RevA_Write32 (mxc_flc_regs_t* flc, uint32_t logicAddr, uint32_t data, uint32_t physicalAddr) +int MXC_FLC_RevA_Write32(mxc_flc_regs_t* flc, uint32_t logicAddr, uint32_t data, uint32_t physicalAddr) { - int err, i=0; + int err, i = 0; uint32_t byte; - volatile uint32_t * ptr; - uint32_t current_data[4] = {0,0,0,0}; + volatile uint32_t* ptr; + uint32_t current_data[4] = {0, 0, 0, 0}; // Address checked if it is byte addressable if (logicAddr & 0x3) { return E_BAD_PARAM; } - + // Check if the location trying to be written has 1's in to be written to 0's - if ((*(uint32_t *)logicAddr & data) != data) { + if ((* (uint32_t*) logicAddr & data) != data) { return E_BAD_STATE; } @@ -214,12 +214,12 @@ int MXC_FLC_RevA_Write32 (mxc_flc_regs_t* flc, uint32_t logicAddr, uint32_t data // Align address to 128-bit word logicAddr = logicAddr & 0xfffffff0; - if ( (err = MXC_prepare_flc (flc)) != E_NO_ERROR) { + if ((err = MXC_prepare_flc(flc)) != E_NO_ERROR) { return err; } // Get current data stored in flash - for (ptr = (uint32_t*) logicAddr; ptr < (uint32_t*) (logicAddr + 16); ptr++, i++) { + for (ptr = (uint32_t*) logicAddr; ptr < (uint32_t*)(logicAddr + 16); ptr++, i++) { current_data[i] = *ptr; } @@ -239,17 +239,17 @@ int MXC_FLC_RevA_Write32 (mxc_flc_regs_t* flc, uint32_t logicAddr, uint32_t data current_data[3] = data; } - return MXC_FLC_Write128 (logicAddr,current_data); + return MXC_FLC_Write128(logicAddr, current_data); } //****************************************************************************** #if IAR_PRAGMAS #pragma section=".flashprog" #else -__attribute__ ( (section (".flashprog"))) +__attribute__((section(".flashprog"))) #endif // make sure to disable ICC with ICC_Disable(); before Running this function -int MXC_FLC_RevA_Write128 (mxc_flc_regs_t *flc, uint32_t addr, uint32_t *data) +int MXC_FLC_RevA_Write128(mxc_flc_regs_t* flc, uint32_t addr, uint32_t* data) { int err; @@ -258,7 +258,7 @@ int MXC_FLC_RevA_Write128 (mxc_flc_regs_t *flc, uint32_t addr, uint32_t *data) return E_BAD_PARAM; } - if ( (err = MXC_prepare_flc (flc)) != E_NO_ERROR) { + if ((err = MXC_prepare_flc(flc)) != E_NO_ERROR) { return err; } @@ -274,7 +274,7 @@ int MXC_FLC_RevA_Write128 (mxc_flc_regs_t *flc, uint32_t addr, uint32_t *data) flc->ctrl |= MXC_F_FLC_CTRL_WR; /* Wait until flash operation is complete */ - while (MXC_busy_flc (flc)); + while (MXC_busy_flc(flc)); /* Lock flash */ flc->ctrl &= ~MXC_F_FLC_CTRL_UNLOCK; @@ -289,7 +289,7 @@ int MXC_FLC_RevA_Write128 (mxc_flc_regs_t *flc, uint32_t addr, uint32_t *data) } //****************************************************************************** -int MXC_FLC_RevA_EnableInt (uint32_t mask) +int MXC_FLC_RevA_EnableInt(uint32_t mask) { mask &= (MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE); @@ -305,7 +305,7 @@ int MXC_FLC_RevA_EnableInt (uint32_t mask) } //****************************************************************************** -int MXC_FLC_RevA_DisableInt (uint32_t mask) +int MXC_FLC_RevA_DisableInt(uint32_t mask) { mask &= (MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE); @@ -321,13 +321,13 @@ int MXC_FLC_RevA_DisableInt (uint32_t mask) } //****************************************************************************** -int MXC_FLC_RevA_GetFlags (void) +int MXC_FLC_RevA_GetFlags(void) { return (MXC_FLC0->intr & (MXC_F_FLC_INTR_DONE | MXC_F_FLC_INTR_AF)); } //****************************************************************************** -int MXC_FLC_RevA_ClearFlags (uint32_t mask) +int MXC_FLC_RevA_ClearFlags(uint32_t mask) { mask &= (MXC_F_FLC_INTR_DONE | MXC_F_FLC_INTR_AF); @@ -343,9 +343,9 @@ int MXC_FLC_RevA_ClearFlags (uint32_t mask) } //****************************************************************************** -int MXC_FLC_RevA_UnlockInfoBlock (mxc_flc_regs_t *flc,uint32_t address) +int MXC_FLC_RevA_UnlockInfoBlock(mxc_flc_regs_t* flc, uint32_t address) { - if ( (address < MXC_INFO_MEM_BASE) || (address >= (MXC_INFO_MEM_BASE + (MXC_INFO_MEM_SIZE * 2)))) { + if ((address < MXC_INFO_MEM_BASE) || (address >= (MXC_INFO_MEM_BASE + (MXC_INFO_MEM_SIZE * 2)))) { return E_BAD_PARAM; } @@ -356,9 +356,9 @@ int MXC_FLC_RevA_UnlockInfoBlock (mxc_flc_regs_t *flc,uint32_t address) } //****************************************************************************** -int MXC_FLC_RevA_LockInfoBlock (mxc_flc_regs_t *flc, uint32_t address) +int MXC_FLC_RevA_LockInfoBlock(mxc_flc_regs_t* flc, uint32_t address) { - if ( (address < MXC_INFO_MEM_BASE) || (address >= (MXC_INFO_MEM_BASE + (MXC_INFO_MEM_SIZE * 2)))) { + if ((address < MXC_INFO_MEM_BASE) || (address >= (MXC_INFO_MEM_BASE + (MXC_INFO_MEM_SIZE * 2)))) { return E_BAD_PARAM; } diff --git a/Libraries/PeriphDrivers/Source/HTMR/htmr_reva.c b/Libraries/PeriphDrivers/Source/HTMR/htmr_reva.c index a13771219..c6c8657fc 100644 --- a/Libraries/PeriphDrivers/Source/HTMR/htmr_reva.c +++ b/Libraries/PeriphDrivers/Source/HTMR/htmr_reva.c @@ -53,43 +53,43 @@ #define MXC_HTMR_ALL_INT_ENABLES (MXC_F_HTMR_CTRL_RDYE | MXC_F_HTMR_CTRL_ADE | MXC_F_HTMR_CTRL_ASE) /* ***** Functions ***** */ -int MXC_HTMR_RevA_Init (mxc_htmr_regs_t *htmr, uint32_t sec, uint8_t ssec) +int MXC_HTMR_RevA_Init(mxc_htmr_regs_t* htmr, uint32_t sec, uint8_t ssec) { - if(htmr == NULL){ + if (htmr == NULL) { return E_NULL_PTR; } - - if (MXC_HTMR_CheckBusy (htmr)) { + + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl = MXC_F_HTMR_CTRL_WE; // Allow Writes - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl = HTMR_CTRL_RESET_DEFAULT; // Start with a Clean Register - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl |= MXC_F_HTMR_CTRL_WE; // Set Write Enable, allow writing to reg. - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ssec = ssec; - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->sec = sec; - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } @@ -104,26 +104,26 @@ int MXC_HTMR_RevA_Init (mxc_htmr_regs_t *htmr, uint32_t sec, uint8_t ssec) return E_SUCCESS; } -int MXC_HTMR_RevA_Start (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_Start(mxc_htmr_regs_t* htmr) { - if(htmr == NULL){ + if (htmr == NULL) { return E_NULL_PTR; } - - if (MXC_HTMR_CheckBusy (htmr)) { + + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl |= MXC_F_HTMR_CTRL_WE; // Allow writing to registers - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } // Can only write if WE=1 and BUSY=0 htmr->ctrl |= MXC_F_HTMR_CTRL_HTEN; // setting RTCE = 1 - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } @@ -132,26 +132,26 @@ int MXC_HTMR_RevA_Start (mxc_htmr_regs_t *htmr) return E_SUCCESS; } -int MXC_HTMR_RevA_Stop (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_Stop(mxc_htmr_regs_t* htmr) { - if(htmr == NULL){ + if (htmr == NULL) { return E_NULL_PTR; } - - if (MXC_HTMR_CheckBusy (htmr)) { + + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl |= MXC_F_HTMR_CTRL_WE; // Allow writing to registers - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } // Can only write if WE=1 and BUSY=0 htmr->ctrl &= ~MXC_F_HTMR_CTRL_HTEN; // setting RTCE = 0 - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } @@ -160,15 +160,15 @@ int MXC_HTMR_RevA_Stop (mxc_htmr_regs_t *htmr) return E_SUCCESS; } -int MXC_HTMR_RevA_GetShortCount (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_GetShortCount(mxc_htmr_regs_t* htmr) { - if(htmr == NULL){ + if (htmr == NULL) { return E_NULL_PTR; } - + // Don't bother calling CheckBusy() if we're in async mode if (!ASYNC_MODE) { - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } } @@ -176,15 +176,15 @@ int MXC_HTMR_RevA_GetShortCount (mxc_htmr_regs_t *htmr) return htmr->ssec; } -int MXC_HTMR_RevA_GetLongCount (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_GetLongCount(mxc_htmr_regs_t* htmr) { - if(htmr == NULL){ + if (htmr == NULL) { return E_NULL_PTR; } - + // Don't bother calling CheckBusy() if we're in async mode if (!ASYNC_MODE) { - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } } @@ -192,110 +192,110 @@ int MXC_HTMR_RevA_GetLongCount (mxc_htmr_regs_t *htmr) return htmr->sec; } -int MXC_HTMR_RevA_SetLongAlarm (mxc_htmr_regs_t *htmr, uint32_t ras) +int MXC_HTMR_RevA_SetLongAlarm(mxc_htmr_regs_t* htmr, uint32_t ras) { // compare with maximum value if (ras > 0xFFFFF) { return E_BAD_PARAM; } - if (MXC_HTMR_DisableInt (htmr, MXC_F_HTMR_CTRL_ADE) == E_BUSY) { + if (MXC_HTMR_DisableInt(htmr, MXC_F_HTMR_CTRL_ADE) == E_BUSY) { return E_BUSY; } - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ras = (ras << MXC_F_HTMR_RAS_RAS_POS) & MXC_F_HTMR_RAS_RAS; - if (MXC_HTMR_EnableInt (htmr, MXC_F_HTMR_CTRL_ADE) == E_BUSY) { + if (MXC_HTMR_EnableInt(htmr, MXC_F_HTMR_CTRL_ADE) == E_BUSY) { return E_BUSY; } return E_SUCCESS; } -int MXC_HTMR_RevA_SetShortAlarm (mxc_htmr_regs_t *htmr, uint32_t rssa) +int MXC_HTMR_RevA_SetShortAlarm(mxc_htmr_regs_t* htmr, uint32_t rssa) { - if (MXC_HTMR_DisableInt (htmr, MXC_F_HTMR_CTRL_ASE) == E_BUSY) { + if (MXC_HTMR_DisableInt(htmr, MXC_F_HTMR_CTRL_ASE) == E_BUSY) { return E_BUSY; } - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->rssa = (rssa << MXC_F_HTMR_RSSA_RSSA_POS) & MXC_F_HTMR_RSSA_RSSA; - if (MXC_HTMR_EnableInt (htmr, MXC_F_HTMR_CTRL_ASE) == E_BUSY) { + if (MXC_HTMR_EnableInt(htmr, MXC_F_HTMR_CTRL_ASE) == E_BUSY) { return E_BUSY; } return E_SUCCESS; } -int MXC_HTMR_RevA_CheckBusy (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_CheckBusy(mxc_htmr_regs_t* htmr) { - MXC_DelayAsync (MXC_DELAY_USEC (BUSY_TIMEOUT), NULL); + MXC_DelayAsync(MXC_DELAY_USEC(BUSY_TIMEOUT), NULL); while (htmr->ctrl & MXC_F_HTMR_CTRL_BUSY) { MXC_DelayAbort(); - + if (MXC_DelayCheck() != E_BUSY) { return E_BUSY; } } - + return E_SUCCESS; } -int MXC_HTMR_RevA_GetFlags (mxc_htmr_regs_t *htmr) +int MXC_HTMR_RevA_GetFlags(mxc_htmr_regs_t* htmr) { - if(htmr == NULL) { + if (htmr == NULL) { return E_NULL_PTR; } - + return htmr->ctrl & MXC_HTMR_ALL_INT_FLAGS; } -int MXC_HTMR_RevA_ClearFlags (mxc_htmr_regs_t *htmr, int flags) +int MXC_HTMR_RevA_ClearFlags(mxc_htmr_regs_t* htmr, int flags) { - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } - htmr->ctrl &= ~ (flags & MXC_HTMR_ALL_INT_FLAGS); + htmr->ctrl &= ~(flags & MXC_HTMR_ALL_INT_FLAGS); return E_SUCCESS; } -int MXC_HTMR_RevA_EnableInt (mxc_htmr_regs_t* htmr, uint32_t mask) +int MXC_HTMR_RevA_EnableInt(mxc_htmr_regs_t* htmr, uint32_t mask) { - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } htmr->ctrl |= (mask & MXC_HTMR_ALL_INT_ENABLES); // Disable Long Interval Interrupt - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } return E_SUCCESS; } -int MXC_HTMR_RevA_DisableInt (mxc_htmr_regs_t* htmr, uint32_t mask) +int MXC_HTMR_RevA_DisableInt(mxc_htmr_regs_t* htmr, uint32_t mask) { - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } - htmr->ctrl &= ~ (mask & MXC_HTMR_ALL_INT_ENABLES); // Disable Long Interval Interrupt + htmr->ctrl &= ~(mask & MXC_HTMR_ALL_INT_ENABLES); // Disable Long Interval Interrupt - if (MXC_HTMR_CheckBusy (htmr)) { + if (MXC_HTMR_CheckBusy(htmr)) { return E_BUSY; } diff --git a/Libraries/PeriphDrivers/Source/I2S/i2s_reva.c b/Libraries/PeriphDrivers/Source/I2S/i2s_reva.c index 8e42fee75..309dbeb07 100644 --- a/Libraries/PeriphDrivers/Source/I2S/i2s_reva.c +++ b/Libraries/PeriphDrivers/Source/I2S/i2s_reva.c @@ -82,7 +82,7 @@ int MXC_I2S_RevA_Init(mxc_i2s_req_t* req) int MXC_I2S_RevA_Shutdown(void) { - MXC_I2S_IntDisable(0xFF); + MXC_I2S_DisableInt(0xFF); //Disable I2S TX and RX channel MXC_I2S_TXDisable(); @@ -293,12 +293,12 @@ void MXC_I2S_RevA_Flush(void) while (MXC_I2S->ctrl0ch0 & MXC_F_I2S_CTRL0CH0_FLUSH); } -void MXC_I2S_RevA_IntEnable(uint32_t flags) +void MXC_I2S_RevA_EnableInt(uint32_t flags) { MXC_I2S->inten |= flags; } -void MXC_I2S_RevA_IntDisable(uint32_t flags) +void MXC_I2S_RevA_DisableInt(uint32_t flags) { MXC_I2S->inten &= ~flags; } diff --git a/Libraries/PeriphDrivers/Source/I2S/i2s_reva.h b/Libraries/PeriphDrivers/Source/I2S/i2s_reva.h index ef1e23057..95da7bb89 100644 --- a/Libraries/PeriphDrivers/Source/I2S/i2s_reva.h +++ b/Libraries/PeriphDrivers/Source/I2S/i2s_reva.h @@ -64,9 +64,9 @@ int MXC_I2S_RevA_SetFrequency(mxc_i2s_ch_mode_t mode, uint16_t clkdiv); void MXC_I2S_RevA_Flush(void); -void MXC_I2S_RevA_IntEnable(uint32_t flags); +void MXC_I2S_RevA_EnableInt(uint32_t flags); -void MXC_I2S_RevA_IntDisable(uint32_t flags); +void MXC_I2S_RevA_DisableInt(uint32_t flags); int MXC_I2S_RevA_GetFlags(void); diff --git a/Libraries/PeriphDrivers/Source/ICC/icc_common.c b/Libraries/PeriphDrivers/Source/ICC/icc_common.c index 066ea309e..4087a0e72 100644 --- a/Libraries/PeriphDrivers/Source/ICC/icc_common.c +++ b/Libraries/PeriphDrivers/Source/ICC/icc_common.c @@ -38,7 +38,7 @@ #include "mxc_sys.h" #include "icc.h" -void MXC_ICC_Com_Flush (void) +void MXC_ICC_Com_Flush(void) { MXC_ICC_Disable(); MXC_ICC_Enable(); diff --git a/Libraries/PeriphDrivers/Source/ICC/icc_me17.c b/Libraries/PeriphDrivers/Source/ICC/icc_me17.c index f224bf241..30a2872af 100644 --- a/Libraries/PeriphDrivers/Source/ICC/icc_me17.c +++ b/Libraries/PeriphDrivers/Source/ICC/icc_me17.c @@ -54,22 +54,22 @@ Maxim Internal Use * ****************************************************************************** */ -int MXC_ICC_ID (mxc_icc_regs_t* icc, mxc_icc_info_t cid) +int MXC_ICC_ID(mxc_icc_regs_t* icc, mxc_icc_info_t cid) { - return MXC_ICC_RevA_ID (icc, cid); + return MXC_ICC_RevA_ID(icc, cid); } -void MXC_ICC_Enable (mxc_icc_regs_t* icc) +void MXC_ICC_Enable(mxc_icc_regs_t* icc) { - MXC_ICC_RevA_Enable (icc); + MXC_ICC_RevA_Enable(icc); } -void MXC_ICC_Disable (mxc_icc_regs_t* icc) +void MXC_ICC_Disable(mxc_icc_regs_t* icc) { - MXC_ICC_RevA_Disable (icc); + MXC_ICC_RevA_Disable(icc); } -void MXC_ICC_Flush (mxc_icc_regs_t* icc) +void MXC_ICC_Flush(mxc_icc_regs_t* icc) { MXC_ICC_Disable(icc); MXC_ICC_Enable(icc); diff --git a/Libraries/PeriphDrivers/Source/ICC/icc_reva.c b/Libraries/PeriphDrivers/Source/ICC/icc_reva.c index 64c241e78..9973efdc2 100644 --- a/Libraries/PeriphDrivers/Source/ICC/icc_reva.c +++ b/Libraries/PeriphDrivers/Source/ICC/icc_reva.c @@ -44,44 +44,44 @@ /* **** Globals **** */ /* **** Functions **** */ -static int MXC_ICC_Ready (mxc_icc_regs_t* icc) +static int MXC_ICC_Ready(mxc_icc_regs_t* icc) { return (icc->ctrl & MXC_F_ICC_CTRL_RDY); } -int MXC_ICC_RevA_ID (mxc_icc_regs_t* icc, mxc_icc_info_t cid) +int MXC_ICC_RevA_ID(mxc_icc_regs_t* icc, mxc_icc_info_t cid) { if (icc == NULL) { return E_NULL_PTR; } - + switch (cid) { case ICC_INFO_RELNUM: - return ( (icc->info & MXC_F_ICC_INFO_RELNUM) >> MXC_F_ICC_INFO_RELNUM_POS); + return ((icc->info & MXC_F_ICC_INFO_RELNUM) >> MXC_F_ICC_INFO_RELNUM_POS); case ICC_INFO_PARTNUM: - return ( (icc->info & MXC_F_ICC_INFO_PARTNUM) >> MXC_F_ICC_INFO_PARTNUM_POS); + return ((icc->info & MXC_F_ICC_INFO_PARTNUM) >> MXC_F_ICC_INFO_PARTNUM_POS); case ICC_INFO_ID: - return ( (icc->info & MXC_F_ICC_INFO_ID) >> MXC_F_ICC_INFO_ID_POS); + return ((icc->info & MXC_F_ICC_INFO_ID) >> MXC_F_ICC_INFO_ID_POS); default: return E_BAD_PARAM; } } -void MXC_ICC_RevA_Enable (mxc_icc_regs_t *icc) +void MXC_ICC_RevA_Enable(mxc_icc_regs_t* icc) { // Invalidate cache and wait until ready icc->invalidate = 1; - while (! (MXC_ICC_Ready (icc))); + while (!(MXC_ICC_Ready(icc))); // Enable Cache icc->ctrl |= MXC_F_ICC_CTRL_EN; } -void MXC_ICC_RevA_Disable (mxc_icc_regs_t* icc) +void MXC_ICC_RevA_Disable(mxc_icc_regs_t* icc) { // Disable Cache icc->ctrl &= ~MXC_F_ICC_CTRL_EN; diff --git a/Libraries/PeriphDrivers/Source/LP/lp_me17.c b/Libraries/PeriphDrivers/Source/LP/lp_me17.c index 7e25844c9..219879484 100644 --- a/Libraries/PeriphDrivers/Source/LP/lp_me17.c +++ b/Libraries/PeriphDrivers/Source/LP/lp_me17.c @@ -36,10 +36,10 @@ #include "gcr_regs.h" #include "lp.h" -void MXC_LP_EnterSleepMode (void) +void MXC_LP_EnterSleepMode(void) { MXC_LP_ClearWakeStatus(); - + /*set block detect bit */ MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_BLKDET; @@ -49,13 +49,13 @@ void MXC_LP_EnterSleepMode (void) /* Go into Sleep mode and wait for an interrupt to wake the processor */ __WFI(); } -void MXC_LP_EnterDeepSleepMode (void) +void MXC_LP_EnterDeepSleepMode(void) { MXC_LP_ClearWakeStatus(); - + /*set block detect bit */ MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_BLKDET; - + /* Set SLEEPDEEP bit */ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; @@ -63,13 +63,13 @@ void MXC_LP_EnterDeepSleepMode (void) __WFI(); } -void MXC_LP_EnterBackupMode (void) +void MXC_LP_EnterBackupMode(void) { MXC_LP_ClearWakeStatus(); /*set block detect bit */ MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_BLKDET; - + MXC_GCR->pm &= ~MXC_F_GCR_PM_MODE; MXC_GCR->pm |= MXC_S_GCR_PM_MODE_BACKUP; @@ -77,7 +77,7 @@ void MXC_LP_EnterBackupMode (void) } -void MXC_LP_EnterStorageMode (void) +void MXC_LP_EnterStorageMode(void) { MXC_LP_ClearWakeStatus(); /*set block detect bit */ @@ -90,7 +90,7 @@ void MXC_LP_EnterStorageMode (void) while (1); // Should never reach this line - device will jump to backup vector on exit from background mode. } -void MXC_LP_EnterShutDownMode (void) +void MXC_LP_EnterShutDownMode(void) { MXC_GCR->pm &= ~MXC_F_GCR_PM_MODE; MXC_GCR->pm |= MXC_S_GCR_PM_MODE_POWERDOWN; @@ -98,87 +98,87 @@ void MXC_LP_EnterShutDownMode (void) while (1); // Should never reach this line - device will reset on exit from shutdown mode. } -void MXC_LP_SetOVR (mxc_lp_ovr_t ovr) +void MXC_LP_SetOVR(mxc_lp_ovr_t ovr) { //not supported yet } -void MXC_LP_RetentionRegEnable (void) +void MXC_LP_RetentionRegEnable(void) { MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_RREGEN; } -void MXC_LP_RetentionRegDisable (void) +void MXC_LP_RetentionRegDisable(void) { MXC_PWRSEQ->lpcn &= ~MXC_F_PWRSEQ_LPCN_RREGEN; } -int MXC_LP_RetentionRegIsEnabled (void) +int MXC_LP_RetentionRegIsEnabled(void) { return (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_RREGEN); } -void MXC_LP_BandgapOn (void) +void MXC_LP_BandgapOn(void) { MXC_PWRSEQ->lpcn &= ~MXC_F_PWRSEQ_LPCN_BGOFF; } -void MXC_LP_BandgapOff (void) +void MXC_LP_BandgapOff(void) { MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_BGOFF; } -int MXC_LP_BandgapIsOn (void) +int MXC_LP_BandgapIsOn(void) { return (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_BGOFF); } -void MXC_LP_PORVCOREoreMonitorEnable (void) +void MXC_LP_PORVCOREoreMonitorEnable(void) { MXC_PWRSEQ->lpcn &= ~MXC_F_PWRSEQ_LPCN_PORVCOREMD; } -void MXC_LP_PORVCOREoreMonitorDisable (void) +void MXC_LP_PORVCOREoreMonitorDisable(void) { MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_PORVCOREMD; } -int MXC_LP_PORVCOREoreMonitorIsEnabled (void) +int MXC_LP_PORVCOREoreMonitorIsEnabled(void) { return (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_PORVCOREMD); } -void MXC_LP_LDOEnable (void) +void MXC_LP_LDOEnable(void) { MXC_PWRSEQ->lpcn &= ~MXC_F_PWRSEQ_LPCN_LDO_DIS; } -void MXC_LP_LDODisable (void) +void MXC_LP_LDODisable(void) { MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_LDO_DIS; } -int MXC_LP_LDOIsEnabled (void) +int MXC_LP_LDOIsEnabled(void) { return (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_LDO_DIS); } -void MXC_LP_FastWakeupEnable (void) +void MXC_LP_FastWakeupEnable(void) { MXC_PWRSEQ->lpcn |= MXC_F_PWRSEQ_LPCN_FWKM; } -void MXC_LP_FastWakeupDisable (void) +void MXC_LP_FastWakeupDisable(void) { MXC_PWRSEQ->lpcn &= ~MXC_F_PWRSEQ_LPCN_FWKM; } -int MXC_LP_FastWakeupIsEnabled (void) +int MXC_LP_FastWakeupIsEnabled(void) { return (MXC_PWRSEQ->lpcn & MXC_F_PWRSEQ_LPCN_FWKM); } -void MXC_LP_ClearWakeStatus (void) +void MXC_LP_ClearWakeStatus(void) { /* Write 1 to clear */ MXC_PWRSEQ->lpwkst0 = 0xFFFFFFFF; @@ -186,11 +186,11 @@ void MXC_LP_ClearWakeStatus (void) MXC_PWRSEQ->lppwst = 0xFFFFFFFF; } -void MXC_LP_EnableGPIOWakeup (mxc_gpio_cfg_t *wu_pins) +void MXC_LP_EnableGPIOWakeup(mxc_gpio_cfg_t* wu_pins) { MXC_GCR->pm |= MXC_F_GCR_PM_GPIO_WE; - switch (1 << MXC_GPIO_GET_IDX (wu_pins->port)) { + switch (1 << MXC_GPIO_GET_IDX(wu_pins->port)) { case MXC_GPIO_PORT_0: MXC_PWRSEQ->lpwken0 |= wu_pins->mask; break; @@ -200,9 +200,9 @@ void MXC_LP_EnableGPIOWakeup (mxc_gpio_cfg_t *wu_pins) } } -void MXC_LP_DisableGPIOWakeup (mxc_gpio_cfg_t *wu_pins) +void MXC_LP_DisableGPIOWakeup(mxc_gpio_cfg_t* wu_pins) { - switch (1 << MXC_GPIO_GET_IDX (wu_pins->port)) { + switch (1 << MXC_GPIO_GET_IDX(wu_pins->port)) { case MXC_GPIO_PORT_0: MXC_PWRSEQ->lpwken0 &= ~wu_pins->mask; break; @@ -216,72 +216,72 @@ void MXC_LP_DisableGPIOWakeup (mxc_gpio_cfg_t *wu_pins) } } -void MXC_LP_EnableRTCAlarmWakeup (void) +void MXC_LP_EnableRTCAlarmWakeup(void) { MXC_GCR->pm |= MXC_F_GCR_PM_RTC_WE; } -void MXC_LP_DisableRTCAlarmWakeup (void) +void MXC_LP_DisableRTCAlarmWakeup(void) { MXC_GCR->pm &= ~MXC_F_GCR_PM_RTC_WE; } -void MXC_LP_EnableWUTAlarmWakeup (void) +void MXC_LP_EnableWUTAlarmWakeup(void) { MXC_GCR->pm |= MXC_F_GCR_PM_WUT_WE; } -void MXC_LP_DisableWUTAlarmWakeup (void) +void MXC_LP_DisableWUTAlarmWakeup(void) { MXC_GCR->pm &= ~MXC_F_GCR_PM_WUT_WE; } -int MXC_LP_ConfigDeepSleepClocks (uint32_t mask) +int MXC_LP_ConfigDeepSleepClocks(uint32_t mask) { - if (! (mask & ( MXC_F_GCR_PM_IBRO_PD | MXC_F_GCR_PM_IPO_PD))) { + if (!(mask & (MXC_F_GCR_PM_IBRO_PD | MXC_F_GCR_PM_IPO_PD))) { return E_BAD_PARAM; -} - + } + MXC_GCR->pm |= mask; return E_NO_ERROR; } -void MXC_LP_SysRam0Shutdown (void) +void MXC_LP_SysRam0Shutdown(void) { MXC_PWRSEQ->lpmemsd |= MXC_F_PWRSEQ_LPMEMSD_SRAM0SD; } -void MXC_LP_SysRam0PowerUp (void) +void MXC_LP_SysRam0PowerUp(void) { MXC_PWRSEQ->lpmemsd &= ~MXC_F_PWRSEQ_LPMEMSD_SRAM0SD; } -void MXC_LP_SysRam1Shutdown (void) +void MXC_LP_SysRam1Shutdown(void) { MXC_PWRSEQ->lpmemsd |= MXC_F_PWRSEQ_LPMEMSD_SRAM1SD; } -void MXC_LP_SysRam1PowerUp (void) +void MXC_LP_SysRam1PowerUp(void) { MXC_PWRSEQ->lpmemsd &= ~MXC_F_PWRSEQ_LPMEMSD_SRAM1SD; } -void MXC_LP_SysRam2Shutdown (void) +void MXC_LP_SysRam2Shutdown(void) { MXC_PWRSEQ->lpmemsd |= MXC_F_PWRSEQ_LPMEMSD_SRAM2SD; } -void MXC_LP_SysRam2PowerUp (void) +void MXC_LP_SysRam2PowerUp(void) { MXC_PWRSEQ->lpmemsd &= ~MXC_F_PWRSEQ_LPMEMSD_SRAM2SD; } -void MXC_LP_SysRam3Shutdown (void) +void MXC_LP_SysRam3Shutdown(void) { MXC_PWRSEQ->lpmemsd |= MXC_F_PWRSEQ_LPMEMSD_SRAM3SD; } -void MXC_LP_SysRam3PowerUp (void) +void MXC_LP_SysRam3PowerUp(void) { MXC_PWRSEQ->lpmemsd &= ~MXC_F_PWRSEQ_LPMEMSD_SRAM3SD; } \ No newline at end of file diff --git a/Libraries/PeriphDrivers/Source/OWM/owm_reva.c b/Libraries/PeriphDrivers/Source/OWM/owm_reva.c index a973d7d85..c50e6a4b6 100644 --- a/Libraries/PeriphDrivers/Source/OWM/owm_reva.c +++ b/Libraries/PeriphDrivers/Source/OWM/owm_reva.c @@ -48,11 +48,11 @@ int LastDiscrepancy; int LastDeviceFlag; /* **** Functions **** */ -static uint8_t CalculateCRC8 (uint8_t* data, int len); -static uint8_t update_crc8 (uint8_t crc, uint8_t value); +static uint8_t CalculateCRC8(uint8_t* data, int len); +static uint8_t update_crc8(uint8_t crc, uint8_t value); /* ************************************************************************* */ -int MXC_OWM_RevA_Init (const mxc_owm_cfg_t *cfg) +int MXC_OWM_RevA_Init(const mxc_owm_cfg_t* cfg) { uint32_t ext_pu_en = 0; @@ -71,8 +71,8 @@ int MXC_OWM_RevA_Init (const mxc_owm_cfg_t *cfg) break; default: - MXC_SYS_ClockDisable (MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC - MXC_SYS_ClockDisable (MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXFC); // SPIXFC + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPIXIP); // SPIX return E_BAD_PARAM; } @@ -80,13 +80,13 @@ int MXC_OWM_RevA_Init (const mxc_owm_cfg_t *cfg) MXC_OWM_SystemClockUpdated(); // Set configuration - MXC_OWM->cfg = ( ( (cfg->int_pu_en << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS) & MXC_F_OWM_CFG_INT_PULLUP_ENABLE) | - ( (ext_pu_en << MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS) & MXC_F_OWM_CFG_EXT_PULLUP_ENABLE) | - ( (cfg->long_line_mode << MXC_F_OWM_CFG_LONG_LINE_MODE_POS) & MXC_F_OWM_CFG_LONG_LINE_MODE)); - + MXC_OWM->cfg = (((cfg->int_pu_en << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS) & MXC_F_OWM_CFG_INT_PULLUP_ENABLE) | + ((ext_pu_en << MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS) & MXC_F_OWM_CFG_EXT_PULLUP_ENABLE) | + ((cfg->long_line_mode << MXC_F_OWM_CFG_LONG_LINE_MODE_POS) & MXC_F_OWM_CFG_LONG_LINE_MODE)); + // If external pullup is enabled, set the mode if (ext_pu_en) { - MXC_SETFIELD (MXC_OWM->cfg, MXC_F_OWM_CFG_EXT_PULLUP_MODE, cfg->ext_pu_mode); + MXC_SETFIELD(MXC_OWM->cfg, MXC_F_OWM_CFG_EXT_PULLUP_MODE, cfg->ext_pu_mode); } // Clear all interrupt flags @@ -96,7 +96,7 @@ int MXC_OWM_RevA_Init (const mxc_owm_cfg_t *cfg) } /* ************************************************************************* */ -void MXC_OWM_RevA_Shutdown (void) +void MXC_OWM_RevA_Shutdown(void) { // Disable and clear interrupts MXC_OWM->inten = 0; @@ -104,27 +104,27 @@ void MXC_OWM_RevA_Shutdown (void) } /* ************************************************************************* */ -int MXC_OWM_RevA_Reset (void) +int MXC_OWM_RevA_Reset(void) { MXC_OWM->intfl = MXC_F_OWM_INTFL_OW_RESET_DONE; // Clear the reset flag MXC_OWM->ctrl_stat |= MXC_F_OWM_CTRL_STAT_START_OW_RESET; // Generate a reset pulse - while ( (MXC_OWM->intfl & MXC_F_OWM_INTFL_OW_RESET_DONE) == 0); // Wait for reset time slot to complete + while ((MXC_OWM->intfl & MXC_F_OWM_INTFL_OW_RESET_DONE) == 0); // Wait for reset time slot to complete - return (!! (MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT)); // Return presence pulse detect status + return (!!(MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT)); // Return presence pulse detect status } /* ************************************************************************* */ -int MXC_OWM_RevA_TouchByte (uint8_t data) +int MXC_OWM_RevA_TouchByte(uint8_t data) { MXC_OWM->cfg &= ~MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 8 bit mode MXC_OWM->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTEN_LINE_SHORT | MXC_F_OWM_INTFL_RX_DATA_READY); // Clear the flags MXC_OWM->data = (data << MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX; // Write data - while ( (MXC_OWM->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent + while ((MXC_OWM->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent - while ( (MXC_OWM->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read + while ((MXC_OWM->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read // Check error flag if (MXC_OWM->intfl & MXC_F_OWM_INTEN_LINE_SHORT) { @@ -135,30 +135,30 @@ int MXC_OWM_RevA_TouchByte (uint8_t data) } /* ************************************************************************* */ -int MXC_OWM_RevA_WriteByte (uint8_t data) +int MXC_OWM_RevA_WriteByte(uint8_t data) { // Send one byte of data and verify the data sent = data parameter - return (MXC_OWM_TouchByte (data) == data) ? E_NO_ERROR : E_COMM_ERR; + return (MXC_OWM_TouchByte(data) == data) ? E_NO_ERROR : E_COMM_ERR; } /* ************************************************************************* */ -int MXC_OWM_RevA_ReadByte (void) +int MXC_OWM_RevA_ReadByte(void) { // Read one byte of data - return MXC_OWM_TouchByte (0xFF); + return MXC_OWM_TouchByte(0xFF); } /* ************************************************************************* */ -int MXC_OWM_RevA_TouchBit (uint8_t bit) +int MXC_OWM_RevA_TouchBit(uint8_t bit) { MXC_OWM->cfg |= MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 1 bit mode MXC_OWM->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTEN_LINE_SHORT | MXC_F_OWM_INTFL_RX_DATA_READY); // Clear the flags MXC_OWM->data = (bit << MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX; // Write data - while ( (MXC_OWM->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent + while ((MXC_OWM->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent - while ( (MXC_OWM->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read + while ((MXC_OWM->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read // Check error flag if (MXC_OWM->intfl & MXC_F_OWM_INTEN_LINE_SHORT) { @@ -169,21 +169,21 @@ int MXC_OWM_RevA_TouchBit (uint8_t bit) } /* ************************************************************************* */ -int MXC_OWM_RevA_WriteBit (uint8_t bit) +int MXC_OWM_RevA_WriteBit(uint8_t bit) { // Send a bit and verify the bit sent = bit parameter - return (MXC_OWM_TouchBit (bit) == bit) ? E_NO_ERROR : E_COMM_ERR; + return (MXC_OWM_TouchBit(bit) == bit) ? E_NO_ERROR : E_COMM_ERR; } /* ************************************************************************* */ -int MXC_OWM_RevA_ReadBit (void) +int MXC_OWM_RevA_ReadBit(void) { // Read a bit - return MXC_OWM_TouchBit (1); + return MXC_OWM_TouchBit(1); } /* ************************************************************************* */ -int MXC_OWM_RevA_Write (uint8_t* data, int len) +int MXC_OWM_RevA_Write(uint8_t* data, int len) { int num = 0; @@ -191,7 +191,7 @@ int MXC_OWM_RevA_Write (uint8_t* data, int len) while (num < len) { // Loop for number of bytes to write - if (MXC_OWM_WriteByte (data[num]) != E_NO_ERROR) { + if (MXC_OWM_WriteByte(data[num]) != E_NO_ERROR) { return E_COMM_ERR; } @@ -202,7 +202,7 @@ int MXC_OWM_RevA_Write (uint8_t* data, int len) } /* ************************************************************************* */ -int MXC_OWM_RevA_Read (uint8_t* data, int len) +int MXC_OWM_RevA_Read(uint8_t* data, int len) { int num = 0; @@ -219,16 +219,16 @@ int MXC_OWM_RevA_Read (uint8_t* data, int len) } /* ************************************************************************* */ -int MXC_OWM_RevA_ReadROM (uint8_t* ROMCode) +int MXC_OWM_RevA_ReadROM(uint8_t* ROMCode) { int num_read = 0; // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send Read ROM command code - if (MXC_OWM_WriteByte (READ_ROM_COMMAND) == E_NO_ERROR) { + if (MXC_OWM_WriteByte(READ_ROM_COMMAND) == E_NO_ERROR) { // Read 8 bytes and store in buffer - num_read = MXC_OWM_Read (ROMCode, 8); + num_read = MXC_OWM_Read(ROMCode, 8); // Check the number of bytes read if (num_read != 8) { @@ -249,16 +249,16 @@ int MXC_OWM_RevA_ReadROM (uint8_t* ROMCode) } /* ************************************************************************* */ -int MXC_OWM_RevA_MatchROM (uint8_t* ROMCode) +int MXC_OWM_RevA_MatchROM(uint8_t* ROMCode) { int num_wrote = 0; // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send match ROM command code - if (MXC_OWM_WriteByte (MATCH_ROM_COMMAND) == E_NO_ERROR) { + if (MXC_OWM_WriteByte(MATCH_ROM_COMMAND) == E_NO_ERROR) { // Write 8 bytes in ROMCode buffer - num_wrote = MXC_OWM_Write (ROMCode, 8); + num_wrote = MXC_OWM_Write(ROMCode, 8); // Check the number of bytes written if (num_wrote != 8) { @@ -279,22 +279,22 @@ int MXC_OWM_RevA_MatchROM (uint8_t* ROMCode) } /* ************************************************************************* */ -int MXC_OWM_RevA_ODMatchROM (uint8_t* ROMCode) +int MXC_OWM_RevA_ODMatchROM(uint8_t* ROMCode) { int num_wrote = 0; // Set to standard speed - MXC_OWM->cfg &= ~ (MXC_F_OWM_CFG_OVERDRIVE); + MXC_OWM->cfg &= ~(MXC_F_OWM_CFG_OVERDRIVE); // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send Overdrive match ROM command code - if (MXC_OWM_WriteByte (OD_MATCH_ROM_COMMAND) == E_NO_ERROR) { + if (MXC_OWM_WriteByte(OD_MATCH_ROM_COMMAND) == E_NO_ERROR) { // Set overdrive MXC_OWM->cfg |= MXC_F_OWM_CFG_OVERDRIVE; // Write 8 bytes in ROMCode buffer - num_wrote = MXC_OWM_Write (ROMCode, 8); + num_wrote = MXC_OWM_Write(ROMCode, 8); // Check the number of bytes written if (num_wrote != 8) { @@ -315,12 +315,12 @@ int MXC_OWM_RevA_ODMatchROM (uint8_t* ROMCode) } /* ************************************************************************* */ -int MXC_OWM_RevA_SkipROM (void) +int MXC_OWM_RevA_SkipROM(void) { // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send skip ROM command code - return MXC_OWM_WriteByte (SKIP_ROM_COMMAND); + return MXC_OWM_WriteByte(SKIP_ROM_COMMAND); } else { // No presence pulse @@ -329,15 +329,15 @@ int MXC_OWM_RevA_SkipROM (void) } /* ************************************************************************* */ -int MXC_OWM_RevA_ODSkipROM (void) +int MXC_OWM_RevA_ODSkipROM(void) { // Set to standard speed - MXC_OWM->cfg &= ~ (MXC_F_OWM_CFG_OVERDRIVE); + MXC_OWM->cfg &= ~(MXC_F_OWM_CFG_OVERDRIVE); // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send Overdrive skip ROM command code - if (MXC_OWM_WriteByte (OD_SKIP_ROM_COMMAND) == E_NO_ERROR) { + if (MXC_OWM_WriteByte(OD_SKIP_ROM_COMMAND) == E_NO_ERROR) { // Set overdrive speed MXC_OWM->cfg |= MXC_F_OWM_CFG_OVERDRIVE; @@ -355,12 +355,12 @@ int MXC_OWM_RevA_ODSkipROM (void) } /* ************************************************************************* */ -int MXC_OWM_RevA_Resume (void) +int MXC_OWM_RevA_Resume(void) { // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send resume command code - return MXC_OWM_WriteByte (RESUME_COMMAND); + return MXC_OWM_WriteByte(RESUME_COMMAND); } else { // No presence pulse @@ -369,7 +369,7 @@ int MXC_OWM_RevA_Resume (void) } /* ************************************************************************* */ -int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) +int MXC_OWM_RevA_SearchROM(int newSearch, uint8_t* ROMCode) { int nibble_start_bit = 1; int rom_byte_number = 0; @@ -385,7 +385,7 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) int search_result = 0; // Clear ROM array - memset (ROMCode, 0x0, 8); + memset(ROMCode, 0x0, 8); if (newSearch) { // Reset all global variables to start search from beginning @@ -404,7 +404,7 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) // Send reset and wait for presence pulse if (MXC_OWM_Reset()) { // Send the search command - MXC_OWM_WriteByte (SEARCH_ROM_COMMAND); + MXC_OWM_WriteByte(SEARCH_ROM_COMMAND); // Set search ROM accelerator bit MXC_OWM->ctrl_stat |= MXC_F_OWM_CTRL_STAT_SRA_MODE; @@ -425,14 +425,14 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) bit_position = LastDiscrepancy - nibble_start_bit; // Check if last discrepancy is within this nibble - if ( (bit_position >= 0) && (bit_position < 4)) { + if ((bit_position >= 0) && (bit_position < 4)) { // Last discrepancy is within this nibble // Set the bit of the last discrepancy bit search_direction |= (1 << (bit_position)); } // Performs two read bits and a write bit for 4 bits of the ROM - readValue = MXC_OWM_TouchByte (search_direction); + readValue = MXC_OWM_TouchByte(search_direction); // Get discrepancy flags discrepancy = readValue & 0xF; // Get the 4 bits sent to select the ROM @@ -448,7 +448,7 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) discrepancy_mask = discrepancy & (1 << bit_position); // If there is a discrepancy and the sent bit is 0 save this bit position - if ( (discrepancy_mask) && ! (sentBits & discrepancy_mask)) { + if ((discrepancy_mask) && !(sentBits & discrepancy_mask)) { last_zero = nibble_start_bit + bit_position; break; } @@ -481,13 +481,13 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) } // End while(rom_byte_number < 8) // Clear search ROM accelerator - MXC_OWM->ctrl_stat &= ~ (MXC_F_OWM_CTRL_STAT_SRA_MODE); + MXC_OWM->ctrl_stat &= ~(MXC_F_OWM_CTRL_STAT_SRA_MODE); // Calculate CRC to verify ROM code is correct - crc8 = CalculateCRC8 (ROMCode, 7); + crc8 = CalculateCRC8(ROMCode, 7); // If the search was successful then - if ( (nibble_start_bit >= 65) && (crc8 == ROMCode[7])) { + if ((nibble_start_bit >= 65) && (crc8 == ROMCode[7])) { // Search successful so set LastDiscrepancy,LastDeviceFlag,search_result LastDiscrepancy = last_zero; @@ -511,68 +511,68 @@ int MXC_OWM_RevA_SearchROM (int newSearch, uint8_t* ROMCode) } /* ************************************************************************* */ -void MXC_OWM_RevA_ClearFlags (uint32_t mask) +void MXC_OWM_RevA_ClearFlags(uint32_t mask) { MXC_OWM->intfl = mask; } /* ************************************************************************* */ -unsigned MXC_OWM_RevA_GetFlags (void) +unsigned MXC_OWM_RevA_GetFlags(void) { return (MXC_OWM->intfl); } /* ************************************************************************* */ -void MXC_OWM_RevA_SetExtPullup (int enable) +void MXC_OWM_RevA_SetExtPullup(int enable) { if (enable) { MXC_OWM->cfg |= MXC_F_OWM_CFG_EXT_PULLUP_ENABLE; } else { - MXC_OWM->cfg &= ~ (MXC_F_OWM_CFG_EXT_PULLUP_ENABLE); + MXC_OWM->cfg &= ~(MXC_F_OWM_CFG_EXT_PULLUP_ENABLE); } } /* ************************************************************************* */ -void MXC_OWM_RevA_SetOverdrive (int enable) +void MXC_OWM_RevA_SetOverdrive(int enable) { if (enable) { MXC_OWM->cfg |= MXC_F_OWM_CFG_OVERDRIVE; } else { - MXC_OWM->cfg &= ~ (MXC_F_OWM_CFG_OVERDRIVE); + MXC_OWM->cfg &= ~(MXC_F_OWM_CFG_OVERDRIVE); } } /* ************************************************************************* */ -void MXC_OWM_RevA_EnableInt (int flags) +void MXC_OWM_RevA_EnableInt(int flags) { MXC_OWM->inten |= flags; } /* ************************************************************************* */ -void MXC_OWM_RevA_DisableInt (int flags) +void MXC_OWM_RevA_DisableInt(int flags) { MXC_OWM->inten &= ~flags; } /* ************************************************************************* */ -int MXC_OWM_RevA_SetForcePresenceDetect (int enable) +int MXC_OWM_RevA_SetForcePresenceDetect(int enable) { - MXC_SETFIELD (MXC_OWM->cfg, MXC_F_OWM_CFG_FORCE_PRES_DET, enable << MXC_F_OWM_CFG_FORCE_PRES_DET_POS); + MXC_SETFIELD(MXC_OWM->cfg, MXC_F_OWM_CFG_FORCE_PRES_DET, enable << MXC_F_OWM_CFG_FORCE_PRES_DET_POS); return E_NO_ERROR; } /* ************************************************************************* */ -int MXC_OWM_RevA_SetInternalPullup (int enable) +int MXC_OWM_RevA_SetInternalPullup(int enable) { - MXC_SETFIELD (MXC_OWM->cfg, MXC_F_OWM_CFG_INT_PULLUP_ENABLE, - enable << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS); + MXC_SETFIELD(MXC_OWM->cfg, MXC_F_OWM_CFG_INT_PULLUP_ENABLE, + enable << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS); return E_NO_ERROR; } /* ************************************************************************* */ -int MXC_OWM_RevA_SetExternalPullup (mxc_owm_ext_pu_t ext_pu_mode) +int MXC_OWM_RevA_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode) { switch (ext_pu_mode) { case MXC_OWM_EXT_PU_ACT_HIGH: @@ -595,7 +595,7 @@ int MXC_OWM_RevA_SetExternalPullup (mxc_owm_ext_pu_t ext_pu_mode) } /* ************************************************************************* */ -int MXC_OWM_RevA_SystemClockUpdated (void) +int MXC_OWM_RevA_SystemClockUpdated(void) { uint32_t mxc_owm_clk, clk_div = 0; @@ -626,68 +626,68 @@ int MXC_OWM_RevA_SystemClockUpdated (void) } /* ************************************************************************ */ -int MXC_OWM_RevA_SetSearchROMAccelerator (int enable) +int MXC_OWM_RevA_SetSearchROMAccelerator(int enable) { - MXC_SETFIELD (MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_SRA_MODE, - enable << MXC_F_OWM_CTRL_STAT_SRA_MODE_POS); + MXC_SETFIELD(MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_SRA_MODE, + enable << MXC_F_OWM_CTRL_STAT_SRA_MODE_POS); return E_NO_ERROR; } /* ************************************************************************* */ -int MXC_OWM_RevA_BitBang_Init (int initialState) +int MXC_OWM_RevA_BitBang_Init(int initialState) { MXC_OWM->cfg |= MXC_F_OWM_CFG_BIT_BANG_EN; - MXC_SETFIELD (MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_BIT_BANG_OE, - initialState << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS); - + MXC_SETFIELD(MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_BIT_BANG_OE, + initialState << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS); + return E_NO_ERROR; } /* ************************************************************************* */ -int MXC_OWM_RevA_BitBang_Read (void) +int MXC_OWM_RevA_BitBang_Read(void) { - return !! (MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_BIT_BANG_OE); + return !!(MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_BIT_BANG_OE); } /* ************************************************************************* */ -int MXC_OWM_RevA_BitBang_Write (int state) +int MXC_OWM_RevA_BitBang_Write(int state) { - MXC_SETFIELD (MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_BIT_BANG_OE, - state << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS); + MXC_SETFIELD(MXC_OWM->ctrl_stat, MXC_F_OWM_CTRL_STAT_BIT_BANG_OE, + state << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS); return E_NO_ERROR; } /* ************************************************************************* */ -int MXC_OWM_RevA_BitBang_Disable (void) +int MXC_OWM_RevA_BitBang_Disable(void) { MXC_OWM->cfg &= ~MXC_F_OWM_CFG_BIT_BANG_EN; return E_NO_ERROR; } /* ************************************************************************* */ -static uint8_t CalculateCRC8 (uint8_t* data, int len) +static uint8_t CalculateCRC8(uint8_t* data, int len) { int i; uint8_t crc = 0; for (i = 0; i < len; i++) { - crc = update_crc8 (crc, data[i]); + crc = update_crc8(crc, data[i]); } return crc; } /* ************************************************************************* */ -static uint8_t update_crc8 (uint8_t crc, uint8_t val) +static uint8_t update_crc8(uint8_t crc, uint8_t val) { uint8_t inc, tmp; for (inc = 0; inc < 8; inc++) { - tmp = (uint8_t) (crc << 7); // Save X7 bit value + tmp = (uint8_t)(crc << 7); // Save X7 bit value crc >>= 1; // Shift crc - if ( ( (tmp >> 7) ^ (val & 0x01)) == 1) { // If X7 xor X8 (input data) + if (((tmp >> 7) ^ (val & 0x01)) == 1) { // If X7 xor X8 (input data) crc ^= 0x8c; // XOR crc with X4 and X5, X1 = X7^X8 crc |= 0x80; // Carry } diff --git a/Libraries/PeriphDrivers/Source/PT/pt_me17.c b/Libraries/PeriphDrivers/Source/PT/pt_me17.c index dcaa290fc..63625b81f 100644 --- a/Libraries/PeriphDrivers/Source/PT/pt_me17.c +++ b/Libraries/PeriphDrivers/Source/PT/pt_me17.c @@ -41,13 +41,13 @@ #include "ptg_regs.h" #include "pt_reva.h" -void MXC_PT_Init (mxc_clk_scale_t clk_scale) +void MXC_PT_Init(mxc_clk_scale_t clk_scale) { - MXC_ASSERT (clk_scale <= 128); - - MXC_SYS_ClockEnable (MXC_SYS_PERIPH_CLOCK_PT); + MXC_ASSERT(clk_scale <= 128); + + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_PT); - MXC_SYS_Reset_Periph (MXC_SYS_RESET1_PT); + MXC_SYS_Reset_Periph(MXC_SYS_RESET1_PT); //set clock scale MXC_GCR->clkctrl &= ~MXC_S_GCR_CLKCTRL_SYSCLK_DIV_DIV128; @@ -86,101 +86,101 @@ void MXC_PT_Init (mxc_clk_scale_t clk_scale) break; } - MXC_PT_RevA_Init (clk_scale); + MXC_PT_RevA_Init(clk_scale); } -void MXC_PT_Shutdown (uint32_t pts) +void MXC_PT_Shutdown(uint32_t pts) { - if (MXC_PT_RevA_Shutdown (pts)) { - MXC_SYS_ClockDisable (MXC_SYS_PERIPH_CLOCK_PT); + if (MXC_PT_RevA_Shutdown(pts)) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_PT); } } -int MXC_PT_Config (mxc_pt_cfg_t *cfg) +int MXC_PT_Config(mxc_pt_cfg_t* cfg) { - MXC_PT_RevA_Config (cfg); + MXC_PT_RevA_Config(cfg); switch (cfg->channel) { case 0: - MXC_GPIO_Config (&gpio_cfg_pt0); + MXC_GPIO_Config(&gpio_cfg_pt0); break; case 1: - MXC_GPIO_Config (&gpio_cfg_pt1); + MXC_GPIO_Config(&gpio_cfg_pt1); break; case 2: - MXC_GPIO_Config (&gpio_cfg_pt2); + MXC_GPIO_Config(&gpio_cfg_pt2); break; case 3: - MXC_GPIO_Config (&gpio_cfg_pt3); + MXC_GPIO_Config(&gpio_cfg_pt3); break; - + default: return E_BAD_PARAM; - + } return E_NO_ERROR; } -int MXC_PT_SqrWaveConfig (unsigned channel, uint32_t freq) +int MXC_PT_SqrWaveConfig(unsigned channel, uint32_t freq) { - return MXC_PT_RevA_SqrWaveConfig (channel,freq); + return MXC_PT_RevA_SqrWaveConfig(channel, freq); } -void MXC_PT_Start (unsigned pts) +void MXC_PT_Start(unsigned pts) { - MXC_PT_RevA_Start (pts); + MXC_PT_RevA_Start(pts); } -void MXC_PT_Stop (unsigned pts) +void MXC_PT_Stop(unsigned pts) { - MXC_PT_RevA_Stop (pts); + MXC_PT_RevA_Stop(pts); } -uint32_t MXC_PT_IsActive (uint32_t pts) +uint32_t MXC_PT_IsActive(uint32_t pts) { - return MXC_PT_RevA_IsActive (pts); + return MXC_PT_RevA_IsActive(pts); } -void MXC_PT_SetPattern (unsigned pts, uint32_t pattern) +void MXC_PT_SetPattern(unsigned pts, uint32_t pattern) { - MXC_PT_RevA_SetPattern (pts, pattern); + MXC_PT_RevA_SetPattern(pts, pattern); } -void MXC_PT_EnableInt (uint32_t pts) +void MXC_PT_EnableInt(uint32_t pts) { - MXC_PT_RevA_EnableInt (pts); + MXC_PT_RevA_EnableInt(pts); } -void MXC_PT_DisableInt (uint32_t pts) +void MXC_PT_DisableInt(uint32_t pts) { - MXC_PT_RevA_DisableInt (pts); + MXC_PT_RevA_DisableInt(pts); } -uint32_t MXC_PT_GetFlags (void) +uint32_t MXC_PT_GetFlags(void) { return MXC_PT_RevA_GetFlags(); } -void MXC_PT_ClearFlags (uint32_t flags) +void MXC_PT_ClearFlags(uint32_t flags) { - MXC_PT_RevA_ClearFlags (flags); + MXC_PT_RevA_ClearFlags(flags); } -void MXC_PT_EnableRestart (unsigned start, unsigned stop, uint8_t restartIndex) +void MXC_PT_EnableRestart(unsigned start, unsigned stop, uint8_t restartIndex) { - MXC_PT_RevA_EnableRestart (start,stop,restartIndex); + MXC_PT_RevA_EnableRestart(start, stop, restartIndex); } -void MXC_PT_DisableRestart (unsigned channel, uint8_t restartIndex) +void MXC_PT_DisableRestart(unsigned channel, uint8_t restartIndex) { - MXC_PT_RevA_DisableRestart (channel, restartIndex); + MXC_PT_RevA_DisableRestart(channel, restartIndex); } -void MXC_PT_Resync (uint32_t pts) +void MXC_PT_Resync(uint32_t pts) { - MXC_PT_RevA_Resync (pts); + MXC_PT_RevA_Resync(pts); } diff --git a/Libraries/PeriphDrivers/Source/PT/pt_reva.c b/Libraries/PeriphDrivers/Source/PT/pt_reva.c index 0e9b2ccf9..05fb912a0 100644 --- a/Libraries/PeriphDrivers/Source/PT/pt_reva.c +++ b/Libraries/PeriphDrivers/Source/PT/pt_reva.c @@ -40,7 +40,7 @@ #include "pt_reva.h" -void MXC_PT_RevA_Init (mxc_clk_scale_t clk_scale) +void MXC_PT_RevA_Init(mxc_clk_scale_t clk_scale) { //disable all pulse trains MXC_PTG->enable = 0; @@ -49,15 +49,15 @@ void MXC_PT_RevA_Init (mxc_clk_scale_t clk_scale) MXC_PTG->intfl = MXC_PTG->intfl; } -int MXC_PT_RevA_Shutdown (uint32_t pts) +int MXC_PT_RevA_Shutdown(uint32_t pts) { - MXC_PT_Stop (pts); - return (! (MXC_PT_IsActive (MXC_PTG->enable))); + MXC_PT_Stop(pts); + return (!(MXC_PT_IsActive(MXC_PTG->enable))); } -int MXC_PT_RevA_Config (mxc_pt_cfg_t *cfg) +int MXC_PT_RevA_Config(mxc_pt_cfg_t* cfg) { - uint32_t ptClock,rate; + uint32_t ptClock, rate; if (cfg == NULL || cfg->bps == 0) { return E_BAD_PARAM; @@ -74,7 +74,7 @@ int MXC_PT_RevA_Config (mxc_pt_cfg_t *cfg) } //disable pulse train - MXC_PT_Stop (1 << cfg->channel); + MXC_PT_Stop(1 << cfg->channel); rate = (ptClock / (cfg->bps)); @@ -82,24 +82,24 @@ int MXC_PT_RevA_Config (mxc_pt_cfg_t *cfg) rate += 2; } - mxc_pt_regs_t * temp = MXC_PT_GET_PT (cfg->channel); + mxc_pt_regs_t* temp = MXC_PT_GET_PT(cfg->channel); - MXC_ASSERT (temp != NULL); + MXC_ASSERT(temp != NULL); - temp->rate_length = ( (rate << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS) - & MXC_F_PT_RATE_LENGTH_RATE_CONTROL) | - ( (cfg->ptLength << MXC_F_PT_RATE_LENGTH_MODE_POS) - & MXC_F_PT_RATE_LENGTH_MODE); - + temp->rate_length = ((rate << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS) + & MXC_F_PT_RATE_LENGTH_RATE_CONTROL) | + ((cfg->ptLength << MXC_F_PT_RATE_LENGTH_MODE_POS) + & MXC_F_PT_RATE_LENGTH_MODE); + temp->train = cfg->pattern; - temp->loop = ( (cfg->loop << MXC_F_PT_LOOP_COUNT_POS) & MXC_F_PT_LOOP_COUNT) | - ( (cfg->loopDelay << MXC_F_PT_LOOP_DELAY_POS) & MXC_F_PT_LOOP_DELAY); + temp->loop = ((cfg->loop << MXC_F_PT_LOOP_COUNT_POS) & MXC_F_PT_LOOP_COUNT) | + ((cfg->loopDelay << MXC_F_PT_LOOP_DELAY_POS) & MXC_F_PT_LOOP_DELAY); return E_NO_ERROR; } -int MXC_PT_RevA_SqrWaveConfig (unsigned channel, uint32_t freq) +int MXC_PT_RevA_SqrWaveConfig(unsigned channel, uint32_t freq) { uint32_t rate; @@ -112,70 +112,70 @@ int MXC_PT_RevA_SqrWaveConfig (unsigned channel, uint32_t freq) sqwcfg.loop = 0; sqwcfg.loopDelay = 0; - return MXC_PT_Config (&sqwcfg); + return MXC_PT_Config(&sqwcfg); } -void MXC_PT_RevA_Start (unsigned pts) +void MXC_PT_RevA_Start(unsigned pts) { - MXC_ASSERT (pts >= 0) + MXC_ASSERT(pts >= 0) MXC_PTG->enable |= pts; //wait for PT to start - while ( (MXC_PTG->enable & (pts)) != pts); + while ((MXC_PTG->enable & (pts)) != pts); } -void MXC_PT_RevA_Stop (unsigned pts) +void MXC_PT_RevA_Stop(unsigned pts) { MXC_PTG->enable &= ~pts; } -uint32_t MXC_PT_RevA_IsActive (uint32_t pts) +uint32_t MXC_PT_RevA_IsActive(uint32_t pts) { - return !! (MXC_PTG->enable & pts); + return !!(MXC_PTG->enable & pts); } -void MXC_PT_RevA_SetPattern (unsigned pts, uint32_t pattern) +void MXC_PT_RevA_SetPattern(unsigned pts, uint32_t pattern) { - mxc_pt_regs_t * temp; + mxc_pt_regs_t* temp; uint32_t pt; for (uint8_t i = 0 ; i < 32 && (pts >> i) > 0 ; i++) { pt = 1 << i; if (pts & pt) { - temp = MXC_PT_GET_PT (pt); - MXC_ASSERT (temp); + temp = MXC_PT_GET_PT(pt); + MXC_ASSERT(temp); temp->train = pattern; } } } -void MXC_PT_RevA_EnableInt (uint32_t pts) +void MXC_PT_RevA_EnableInt(uint32_t pts) { MXC_PTG->inten |= pts; } -void MXC_PT_RevA_DisableInt (uint32_t pts) +void MXC_PT_RevA_DisableInt(uint32_t pts) { MXC_PTG->inten &= ~pts; } -uint32_t MXC_PT_RevA_GetFlags (void) +uint32_t MXC_PT_RevA_GetFlags(void) { return MXC_PTG->intfl; } -void MXC_PT_RevA_ClearFlags (uint32_t flags) +void MXC_PT_RevA_ClearFlags(uint32_t flags) { MXC_PTG->intfl = flags; } -void MXC_PT_RevA_EnableRestart (unsigned start, unsigned stop, uint8_t restartIndex) +void MXC_PT_RevA_EnableRestart(unsigned start, unsigned stop, uint8_t restartIndex) { - mxc_pt_regs_t * temp = MXC_PT_GET_PT (start); - MXC_ASSERT (temp); + mxc_pt_regs_t* temp = MXC_PT_GET_PT(start); + MXC_ASSERT(temp); if (restartIndex) { temp->restart |= (stop << MXC_F_PT_RESTART_PT_Y_SELECT_POS) | @@ -188,10 +188,10 @@ void MXC_PT_RevA_EnableRestart (unsigned start, unsigned stop, uint8_t restartI } -void MXC_PT_RevA_DisableRestart (unsigned channel, uint8_t restartIndex) +void MXC_PT_RevA_DisableRestart(unsigned channel, uint8_t restartIndex) { - mxc_pt_regs_t * temp = MXC_PT_GET_PT (channel); - MXC_ASSERT (temp); + mxc_pt_regs_t* temp = MXC_PT_GET_PT(channel); + MXC_ASSERT(temp); if (restartIndex) { temp->restart &= ~MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT; @@ -201,7 +201,7 @@ void MXC_PT_RevA_DisableRestart (unsigned channel, uint8_t restartIndex) } } -void MXC_PT_RevA_Resync (uint32_t pts) +void MXC_PT_RevA_Resync(uint32_t pts) { // Set the PT to be synced MXC_PTG->resync |= pts; diff --git a/Libraries/PeriphDrivers/Source/RTC/rtc_me17.c b/Libraries/PeriphDrivers/Source/RTC/rtc_me17.c index bd6ac4246..6fc901a11 100644 --- a/Libraries/PeriphDrivers/Source/RTC/rtc_me17.c +++ b/Libraries/PeriphDrivers/Source/RTC/rtc_me17.c @@ -46,76 +46,76 @@ /* Maxim Function Mapping */ /********************************************/ -int MXC_RTC_EnableInt (uint32_t mask) +int MXC_RTC_EnableInt(uint32_t mask) { - return MXC_RTC_RevA_EnableInt (MXC_RTC, mask); + return MXC_RTC_RevA_EnableInt(MXC_RTC, mask); } -int MXC_RTC_DisableInt (uint32_t mask) +int MXC_RTC_DisableInt(uint32_t mask) { - return MXC_RTC_RevA_DisableInt (MXC_RTC, mask); + return MXC_RTC_RevA_DisableInt(MXC_RTC, mask); } -int MXC_RTC_SetTimeofdayAlarm (uint32_t ras) +int MXC_RTC_SetTimeofdayAlarm(uint32_t ras) { - return MXC_RTC_RevA_SetTimeofdayAlarm (MXC_RTC, ras); + return MXC_RTC_RevA_SetTimeofdayAlarm(MXC_RTC, ras); } -int MXC_RTC_SetSubsecondAlarm (uint32_t rssa) +int MXC_RTC_SetSubsecondAlarm(uint32_t rssa) { - return MXC_RTC_RevA_SetSubsecondAlarm (MXC_RTC, rssa); + return MXC_RTC_RevA_SetSubsecondAlarm(MXC_RTC, rssa); } -int MXC_RTC_Start (void) +int MXC_RTC_Start(void) { - return MXC_RTC_RevA_Start (MXC_RTC); + return MXC_RTC_RevA_Start(MXC_RTC); } -int MXC_RTC_Stop (void) +int MXC_RTC_Stop(void) { - return MXC_RTC_RevA_Stop (MXC_RTC); + return MXC_RTC_RevA_Stop(MXC_RTC); } -int MXC_RTC_Init (uint32_t sec, uint8_t ssec) +int MXC_RTC_Init(uint32_t sec, uint8_t ssec) { MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN; - return MXC_RTC_RevA_Init (MXC_RTC, sec, ssec); + return MXC_RTC_RevA_Init(MXC_RTC, sec, ssec); } -int MXC_RTC_SquareWave (mxc_rtc_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft) +int MXC_RTC_SquareWave(mxc_rtc_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft) { - MXC_GPIO_Config (&gpio_cfg_rtcsqw); + MXC_GPIO_Config(&gpio_cfg_rtcsqw); - return MXC_RTC_RevA_SquareWave (MXC_RTC, sqe, ft); + return MXC_RTC_RevA_SquareWave(MXC_RTC, sqe, ft); } -int MXC_RTC_Trim (int8_t trm) +int MXC_RTC_Trim(int8_t trm) { - return MXC_RTC_RevA_Trim (MXC_RTC, trm); + return MXC_RTC_RevA_Trim(MXC_RTC, trm); } -int MXC_RTC_GetFlags (void) +int MXC_RTC_GetFlags(void) { return MXC_RTC_RevA_GetFlags(); } -int MXC_RTC_ClearFlags (int flags) +int MXC_RTC_ClearFlags(int flags) { - return MXC_RTC_RevA_ClearFlags (flags); + return MXC_RTC_RevA_ClearFlags(flags); } -int MXC_RTC_GetSubSecond (void) +int MXC_RTC_GetSubSecond(void) { return MXC_RTC_RevA_GetSubSecond(); } -int MXC_RTC_GetSecond (void) +int MXC_RTC_GetSecond(void) { return MXC_RTC_RevA_GetSecond(); } -int MXC_RTC_GetTime (uint32_t* sec, uint32_t* subsec) +int MXC_RTC_GetTime(uint32_t* sec, uint32_t* subsec) { - return MXC_RTC_RevA_GetTime (sec, subsec); + return MXC_RTC_RevA_GetTime(sec, subsec); } diff --git a/Libraries/PeriphDrivers/Source/RTC/rtc_reva.c b/Libraries/PeriphDrivers/Source/RTC/rtc_reva.c index 8141d1376..10fb71910 100644 --- a/Libraries/PeriphDrivers/Source/RTC/rtc_reva.c +++ b/Libraries/PeriphDrivers/Source/RTC/rtc_reva.c @@ -41,10 +41,10 @@ #include "mxc_errors.h" #include "rtc_reva.h" -int MXC_RTC_CheckBusy (void) +int MXC_RTC_CheckBusy(void) { // Time-out transfer if it takes > BUSY_TIMEOUT microseconds - MXC_DelayAsync (MXC_DELAY_USEC (MXC_BUSY_TIMEOUT), NULL); + MXC_DelayAsync(MXC_DELAY_USEC(MXC_BUSY_TIMEOUT), NULL); while (MXC_RTC_IS_BUSY) { if (MXC_DelayCheck() != E_BUSY) { @@ -56,7 +56,7 @@ int MXC_RTC_CheckBusy (void) return E_SUCCESS; } -int MXC_RTC_RevA_EnableInt (mxc_rtc_regs_t *rtc, uint32_t mask) +int MXC_RTC_RevA_EnableInt(mxc_rtc_regs_t* rtc, uint32_t mask) { mask &= (MXC_RTC_INT_EN_LONG | MXC_RTC_INT_EN_SHORT | MXC_RTC_INT_EN_READY); @@ -74,7 +74,7 @@ int MXC_RTC_RevA_EnableInt (mxc_rtc_regs_t *rtc, uint32_t mask) return E_SUCCESS; } -int MXC_RTC_RevA_DisableInt (mxc_rtc_regs_t *rtc, uint32_t mask) +int MXC_RTC_RevA_DisableInt(mxc_rtc_regs_t* rtc, uint32_t mask) { mask &= (MXC_RTC_INT_EN_LONG | MXC_RTC_INT_EN_SHORT | MXC_RTC_INT_EN_READY); @@ -92,7 +92,7 @@ int MXC_RTC_RevA_DisableInt (mxc_rtc_regs_t *rtc, uint32_t mask) return E_SUCCESS; } -int MXC_RTC_RevA_SetTimeofdayAlarm (mxc_rtc_regs_t *rtc, uint32_t ras) +int MXC_RTC_RevA_SetTimeofdayAlarm(mxc_rtc_regs_t* rtc, uint32_t ras) { // ras can only be written if BUSY = 0 & (RTCE = 0 or ADE = 0); if (MXC_RTC_CheckBusy()) { @@ -104,7 +104,7 @@ int MXC_RTC_RevA_SetTimeofdayAlarm (mxc_rtc_regs_t *rtc, uint32_t ras) return E_SUCCESS; } -int MXC_RTC_RevA_SetSubsecondAlarm (mxc_rtc_regs_t *rtc, uint32_t rssa) +int MXC_RTC_RevA_SetSubsecondAlarm(mxc_rtc_regs_t* rtc, uint32_t rssa) { // ras can only be written if BUSY = 0 & (RTCE = 0 or ASE = 0); if (MXC_RTC_CheckBusy()) { @@ -116,7 +116,7 @@ int MXC_RTC_RevA_SetSubsecondAlarm (mxc_rtc_regs_t *rtc, uint32_t rssa) return E_SUCCESS; } -int MXC_RTC_RevA_Start (mxc_rtc_regs_t *rtc) +int MXC_RTC_RevA_Start(mxc_rtc_regs_t* rtc) { if (MXC_RTC_CheckBusy()) { return E_BUSY; @@ -140,7 +140,7 @@ int MXC_RTC_RevA_Start (mxc_rtc_regs_t *rtc) return E_SUCCESS; } -int MXC_RTC_RevA_Stop (mxc_rtc_regs_t *rtc) +int MXC_RTC_RevA_Stop(mxc_rtc_regs_t* rtc) { if (MXC_RTC_CheckBusy()) { return E_BUSY; @@ -164,7 +164,7 @@ int MXC_RTC_RevA_Stop (mxc_rtc_regs_t *rtc) return E_SUCCESS; } -int MXC_RTC_RevA_Init (mxc_rtc_regs_t *rtc, uint32_t sec, uint8_t ssec) +int MXC_RTC_RevA_Init(mxc_rtc_regs_t* rtc, uint32_t sec, uint8_t ssec) { if (MXC_RTC_CheckBusy()) { return E_BUSY; @@ -205,7 +205,7 @@ int MXC_RTC_RevA_Init (mxc_rtc_regs_t *rtc, uint32_t sec, uint8_t ssec) return E_SUCCESS; } -int MXC_RTC_RevA_SquareWave (mxc_rtc_regs_t *rtc, mxc_rtc_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft) +int MXC_RTC_RevA_SquareWave(mxc_rtc_regs_t* rtc, mxc_rtc_sqwave_en_t sqe, mxc_rtc_freq_sel_t ft) { if (MXC_RTC_CheckBusy()) { return E_BUSY; @@ -270,7 +270,7 @@ int MXC_RTC_RevA_SquareWave (mxc_rtc_regs_t *rtc, mxc_rtc_sqwave_en_t sqe, mxc_r return E_SUCCESS; } -int MXC_RTC_RevA_Trim (mxc_rtc_regs_t *rtc, int8_t trim) +int MXC_RTC_RevA_Trim(mxc_rtc_regs_t* rtc, int8_t trim) { if (MXC_RTC_CheckBusy()) { @@ -283,7 +283,7 @@ int MXC_RTC_RevA_Trim (mxc_rtc_regs_t *rtc, int8_t trim) return E_BUSY; } - MXC_SETFIELD (rtc->trim, MXC_F_RTC_TRIM_TRIM, trim << MXC_F_RTC_TRIM_TRIM_POS); + MXC_SETFIELD(rtc->trim, MXC_F_RTC_TRIM_TRIM, trim << MXC_F_RTC_TRIM_TRIM_POS); if (MXC_RTC_CheckBusy()) { return E_BUSY; @@ -294,43 +294,43 @@ int MXC_RTC_RevA_Trim (mxc_rtc_regs_t *rtc, int8_t trim) return E_SUCCESS; } -int MXC_RTC_RevA_GetFlags (void) +int MXC_RTC_RevA_GetFlags(void) { return MXC_RTC->ctrl & (MXC_RTC_INT_FL_LONG | MXC_RTC_INT_FL_SHORT | MXC_RTC_INT_FL_READY); } -int MXC_RTC_RevA_ClearFlags (int flags) +int MXC_RTC_RevA_ClearFlags(int flags) { if (MXC_RTC_CheckBusy()) { return E_BUSY; } - MXC_RTC->ctrl &= ~ (flags & (MXC_RTC_INT_FL_LONG | MXC_RTC_INT_FL_SHORT | MXC_RTC_INT_FL_READY)); + MXC_RTC->ctrl &= ~(flags & (MXC_RTC_INT_FL_LONG | MXC_RTC_INT_FL_SHORT | MXC_RTC_INT_FL_READY)); return E_SUCCESS; } -int MXC_RTC_RevA_GetSubSecond (void) +int MXC_RTC_RevA_GetSubSecond(void) { return MXC_RTC->ssec; } -int MXC_RTC_RevA_GetSecond (void) +int MXC_RTC_RevA_GetSecond(void) { return MXC_RTC->sec; } -int MXC_RTC_RevA_GetTime (uint32_t* sec, uint32_t* subsec) +int MXC_RTC_RevA_GetTime(uint32_t* sec, uint32_t* subsec) { uint32_t temp_sec; - - if(sec == NULL || subsec == NULL) { + + if (sec == NULL || subsec == NULL) { return E_NULL_PTR; } - + do { // Check if an update is about to happen. - if (! (MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { + if (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { return E_BUSY; } @@ -338,7 +338,7 @@ int MXC_RTC_RevA_GetTime (uint32_t* sec, uint32_t* subsec) temp_sec = MXC_RTC_RevA_GetSecond(); // Check if an update is about to happen. - if (! (MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { + if (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { return E_BUSY; } @@ -346,7 +346,7 @@ int MXC_RTC_RevA_GetTime (uint32_t* sec, uint32_t* subsec) *subsec = MXC_RTC_RevA_GetSubSecond(); // Check if an update is about to happen. - if (! (MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { + if (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) { return E_BUSY; } diff --git a/Libraries/PeriphDrivers/Source/SDHC/sdhc_reva.c b/Libraries/PeriphDrivers/Source/SDHC/sdhc_reva.c index fd4ce0df4..9561b2687 100644 --- a/Libraries/PeriphDrivers/Source/SDHC/sdhc_reva.c +++ b/Libraries/PeriphDrivers/Source/SDHC/sdhc_reva.c @@ -47,35 +47,35 @@ mxc_sdhc_callback_fn sdhc_callback = NULL; /* **** Functions **** */ -static void MXC_SDHC_FreeCallback (int error); -static int MXC_SDHC_TransSetup (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg); +static void MXC_SDHC_FreeCallback(int error); +static int MXC_SDHC_TransSetup(mxc_sdhc_cmd_cfg_t* sd_cmd_cfg); /* ************************************************************************** */ -void MXC_SDHC_RevA_Set_Clock_Config (unsigned int clk_div) +void MXC_SDHC_RevA_Set_Clock_Config(unsigned int clk_div) { MXC_SDHC->clk_cn = 0; /* clk_div is split across two fields in the register. Break it up accordingly */ MXC_SDHC->clk_cn = (clk_div & 0xff) << MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL_POS; - MXC_SDHC->clk_cn |= ( (clk_div & 0x300) >> 8) << MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS; + MXC_SDHC->clk_cn |= ((clk_div & 0x300) >> 8) << MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS; MXC_SDHC->clk_cn |= MXC_F_SDHC_CLK_CN_INTERNAL_CLK_EN; - while (! (MXC_SDHC->clk_cn & MXC_F_SDHC_CLK_CN_INTERNAL_CLK_STABLE)); + while (!(MXC_SDHC->clk_cn & MXC_F_SDHC_CLK_CN_INTERNAL_CLK_STABLE)); MXC_SDHC->clk_cn |= MXC_F_SDHC_CLK_CN_SD_CLK_EN; } /* ************************************************************************** */ -unsigned int MXC_SDHC_RevA_Get_Clock_Config (void) +unsigned int MXC_SDHC_RevA_Get_Clock_Config(void) { /* clk_div is split across two fields in the register. Build it up accordingly */ - return ( ( ( (MXC_SDHC->clk_cn >> MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS) << 8) & 0x300) | - ( (MXC_SDHC->clk_cn >> MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL_POS) & 0xff)); + return ((((MXC_SDHC->clk_cn >> MXC_F_SDHC_CLK_CN_UPPER_SDCLK_FREQ_SEL_POS) << 8) & 0x300) | + ((MXC_SDHC->clk_cn >> MXC_F_SDHC_CLK_CN_SDCLK_FREQ_SEL_POS) & 0xff)); } /* ************************************************************************** */ -int MXC_SDHC_RevA_Init (const mxc_sdhc_cfg_t *cfg) +int MXC_SDHC_RevA_Init(const mxc_sdhc_cfg_t* cfg) { - MXC_ASSERT (cfg); + MXC_ASSERT(cfg); if (cfg->clk_div > 0x3FF) { return E_BAD_PARAM; @@ -90,7 +90,7 @@ int MXC_SDHC_RevA_Init (const mxc_sdhc_cfg_t *cfg) MXC_SDHC->host_cn_1 = 0x00; - MXC_SDHC_Set_Clock_Config (cfg->clk_div); + MXC_SDHC_Set_Clock_Config(cfg->clk_div); /* Set TO to max until we know better */ MXC_SDHC->to = MXC_F_SDHC_TO_DATA_COUNT_VALUE; @@ -104,19 +104,19 @@ int MXC_SDHC_RevA_Init (const mxc_sdhc_cfg_t *cfg) } /* ************************************************************************** */ -void MXC_SDHC_RevA_PowerUp (void) +void MXC_SDHC_RevA_PowerUp(void) { MXC_SDHC->pwr |= MXC_F_SDHC_PWR_BUS_POWER; } /* ************************************************************************** */ -void MXC_SDHC_RevA_PowerDown (void) +void MXC_SDHC_RevA_PowerDown(void) { MXC_SDHC->pwr &= ~MXC_F_SDHC_PWR_BUS_POWER; } /* ************************************************************************** */ -int MXC_SDHC_RevA_Shutdown (void) +int MXC_SDHC_RevA_Shutdown(void) { /* Disable and clear interrupts */ MXC_SDHC->int_en = 0; @@ -125,14 +125,14 @@ int MXC_SDHC_RevA_Shutdown (void) MXC_SDHC->er_int_stat = MXC_SDHC->er_int_stat; if (sdhc_callback != NULL) { - MXC_SDHC_FreeCallback (E_SHUTDOWN); + MXC_SDHC_FreeCallback(E_SHUTDOWN); } return E_NO_ERROR; } /* ************************************************************************** */ -static int MXC_SDHC_TransSetup (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) +static int MXC_SDHC_TransSetup(mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) { if (!MXC_SDHC_Card_Inserted()) { return E_NO_DEVICE; @@ -150,8 +150,8 @@ static int MXC_SDHC_TransSetup (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) uint32_t hc1 = sd_cmd_cfg->host_control_1; if (sd_cmd_cfg->direction == MXC_SDHC_DIRECTION_WRITE || sd_cmd_cfg->direction == MXC_SDHC_DIRECTION_READ) { - hc1 &= ~ (MXC_F_SDHC_HOST_CN_1_DMA_SELECT | - MXC_F_SDHC_HOST_CN_1_CARD_DETECT_SIGNAL); + hc1 &= ~(MXC_F_SDHC_HOST_CN_1_DMA_SELECT | + MXC_F_SDHC_HOST_CN_1_CARD_DETECT_SIGNAL); } MXC_SDHC->host_cn_1 = hc1; @@ -170,13 +170,13 @@ static int MXC_SDHC_TransSetup (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) } if (sd_cmd_cfg->direction == MXC_SDHC_DIRECTION_WRITE) { - MXC_SDHC->trans &= ~ (MXC_F_SDHC_TRANS_READ_WRITE); + MXC_SDHC->trans &= ~(MXC_F_SDHC_TRANS_READ_WRITE); } else { MXC_SDHC->trans |= MXC_F_SDHC_TRANS_READ_WRITE; } - MXC_SDHC->blk_size = MXC_F_SDHC_BLK_SIZE_HOST_BUFF | ( (sd_cmd_cfg->block_size << MXC_F_SDHC_BLK_SIZE_TRANS_POS) & MXC_F_SDHC_BLK_SIZE_TRANS); + MXC_SDHC->blk_size = MXC_F_SDHC_BLK_SIZE_HOST_BUFF | ((sd_cmd_cfg->block_size << MXC_F_SDHC_BLK_SIZE_TRANS_POS) & MXC_F_SDHC_BLK_SIZE_TRANS); /* Determine transfer size and options */ if (sd_cmd_cfg->block_count > 1) { @@ -197,11 +197,11 @@ static int MXC_SDHC_TransSetup (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) } /* ************************************************************************** */ -int MXC_SDHC_RevA_SendCommand (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) +int MXC_SDHC_RevA_SendCommand(mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) { int err; - if ( (err = MXC_SDHC_TransSetup (sd_cmd_cfg)) != E_NO_ERROR) { + if ((err = MXC_SDHC_TransSetup(sd_cmd_cfg)) != E_NO_ERROR) { return err; } @@ -211,12 +211,12 @@ int MXC_SDHC_RevA_SendCommand (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) /* Block on completion */ if (sd_cmd_cfg->direction == MXC_SDHC_DIRECTION_CFG) { /* No data transfer, just command */ - while (! (MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_CMD_COMP) && - ! (MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_ERR_INTR)); + while (!(MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_CMD_COMP) && + !(MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_ERR_INTR)); } else { - while (! (MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_TRANS_COMP) && - ! (MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_ERR_INTR)); + while (!(MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_TRANS_COMP) && + !(MXC_SDHC->int_stat & MXC_F_SDHC_INT_STAT_ERR_INTR)); } /* Determine if transfer was successful or not */ @@ -235,11 +235,11 @@ int MXC_SDHC_RevA_SendCommand (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) } /* ************************************************************************** */ -int MXC_SDHC_RevA_SendCommandAsync (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) +int MXC_SDHC_RevA_SendCommandAsync(mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) { int err; - if ( (err = MXC_SDHC_TransSetup (sd_cmd_cfg)) != E_NO_ERROR) { + if ((err = MXC_SDHC_TransSetup(sd_cmd_cfg)) != E_NO_ERROR) { return err; } @@ -259,7 +259,7 @@ int MXC_SDHC_RevA_SendCommandAsync (mxc_sdhc_cmd_cfg_t* sd_cmd_cfg) } /* ************************************************************************** */ -void MXC_SDHC_RevA_Handler (void) +void MXC_SDHC_RevA_Handler(void) { int signal = MXC_SDHC->int_signal; int flag = MXC_SDHC_GetFlags() & signal; @@ -271,52 +271,52 @@ void MXC_SDHC_RevA_Handler (void) } // Command complete interrupt - if ( (signal & MXC_F_SDHC_INT_SIGNAL_CMD_COMP) && (flag & MXC_F_SDHC_INT_STAT_CMD_COMP)) { - MXC_SDHC_ClearFlags (MXC_F_SDHC_INT_STAT_CMD_COMP); + if ((signal & MXC_F_SDHC_INT_SIGNAL_CMD_COMP) && (flag & MXC_F_SDHC_INT_STAT_CMD_COMP)) { + MXC_SDHC_ClearFlags(MXC_F_SDHC_INT_STAT_CMD_COMP); MXC_SDHC->int_signal &= ~MXC_F_SDHC_INT_SIGNAL_CMD_COMP; - MXC_SDHC_FreeCallback (E_NO_ERROR); + MXC_SDHC_FreeCallback(E_NO_ERROR); return; } // Transfer complete interrupt - if ( (signal & MXC_F_SDHC_INT_SIGNAL_TRANS_COMP) && (flag & MXC_F_SDHC_INT_STAT_TRANS_COMP)) { - MXC_SDHC_ClearFlags (MXC_F_SDHC_INT_STAT_TRANS_COMP); + if ((signal & MXC_F_SDHC_INT_SIGNAL_TRANS_COMP) && (flag & MXC_F_SDHC_INT_STAT_TRANS_COMP)) { + MXC_SDHC_ClearFlags(MXC_F_SDHC_INT_STAT_TRANS_COMP); MXC_SDHC->int_signal &= ~MXC_F_SDHC_INT_SIGNAL_TRANS_COMP; - MXC_SDHC_FreeCallback (E_NO_ERROR); + MXC_SDHC_FreeCallback(E_NO_ERROR); return; } - MXC_SDHC_ClearFlags (flag); + MXC_SDHC_ClearFlags(flag); MXC_SDHC->int_signal = 0; - MXC_SDHC_FreeCallback (E_UNKNOWN); + MXC_SDHC_FreeCallback(E_UNKNOWN); } /* ************************************************************************** */ -void MXC_SDHC_RevA_ClearFlags (uint32_t mask) +void MXC_SDHC_RevA_ClearFlags(uint32_t mask) { MXC_SDHC->int_stat = mask; } /* ************************************************************************** */ -unsigned MXC_SDHC_RevA_GetFlags (void) +unsigned MXC_SDHC_RevA_GetFlags(void) { return MXC_SDHC->int_stat; } /* ************************************************************************** */ -int MXC_SDHC_RevA_Card_Inserted (void) +int MXC_SDHC_RevA_Card_Inserted(void) { unsigned int detect, inserted, stable; - detect = !! (MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_DETECT); - inserted = !! (MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_INSERTED); - stable = !! (MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_STATE); + detect = !!(MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_DETECT); + inserted = !!(MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_INSERTED); + stable = !!(MXC_SDHC->present & MXC_F_SDHC_PRESENT_CARD_STATE); return (detect & inserted & stable); } /* ************************************************************************** */ -void MXC_SDHC_RevA_Reset (void) +void MXC_SDHC_RevA_Reset(void) { MXC_SDHC->sw_reset = MXC_F_SDHC_SW_RESET_RESET_ALL; @@ -325,7 +325,7 @@ void MXC_SDHC_RevA_Reset (void) } /* ************************************************************************** */ -void MXC_SDHC_RevA_Reset_CMD_DAT (void) +void MXC_SDHC_RevA_Reset_CMD_DAT(void) { MXC_SDHC->sw_reset = MXC_F_SDHC_SW_RESET_RESET_CMD | MXC_F_SDHC_SW_RESET_RESET_DAT; @@ -334,35 +334,35 @@ void MXC_SDHC_RevA_Reset_CMD_DAT (void) } /* ************************************************************************** */ -int MXC_SDHC_RevA_Card_Busy (void) +int MXC_SDHC_RevA_Card_Busy(void) { /* Response type 1b uses the DAT[0] line low to indicate busy */ - return (! ( (MXC_SDHC->present >> MXC_F_SDHC_PRESENT_DAT_SIGNAL_LEVEL_POS) & 1)); + return (!((MXC_SDHC->present >> MXC_F_SDHC_PRESENT_DAT_SIGNAL_LEVEL_POS) & 1)); } /* ************************************************************************** */ -unsigned int MXC_SDHC_RevA_Get_Host_Cn_1 (void) +unsigned int MXC_SDHC_RevA_Get_Host_Cn_1(void) { return MXC_SDHC->host_cn_1; } /* ************************************************************************** */ -uint32_t MXC_SDHC_RevA_Get_Response32 (void) +uint32_t MXC_SDHC_RevA_Get_Response32(void) { return MXC_SDHC->resp[0]; } /* ************************************************************************** */ -uint32_t MXC_SDHC_RevA_Get_Response32_Auto (void) +uint32_t MXC_SDHC_RevA_Get_Response32_Auto(void) { /* The response for auto commands get set at idx 3 */ return MXC_SDHC->resp[3]; } /* ************************************************************************** */ -void MXC_SDHC_RevA_Get_Response128 (unsigned char *response) +void MXC_SDHC_RevA_Get_Response128(unsigned char* response) { - uint32_t *p = (uint32_t *) response; + uint32_t* p = (uint32_t*) response; *p++ = MXC_SDHC->resp[0]; *p++ = MXC_SDHC->resp[1]; @@ -372,13 +372,13 @@ void MXC_SDHC_RevA_Get_Response128 (unsigned char *response) /* ************************************************************************** */ -static void MXC_SDHC_FreeCallback (int error) +static void MXC_SDHC_FreeCallback(int error) { /* Save the request so the callback can be NULLed out and still be called. */ mxc_sdhc_callback_fn temp_callback = sdhc_callback; sdhc_callback = NULL; - temp_callback (error); + temp_callback(error); } diff --git a/Libraries/PeriphDrivers/Source/SEMA/sema_me17.c b/Libraries/PeriphDrivers/Source/SEMA/sema_me17.c index 05c93a926..bbc5fa8b4 100644 --- a/Libraries/PeriphDrivers/Source/SEMA/sema_me17.c +++ b/Libraries/PeriphDrivers/Source/SEMA/sema_me17.c @@ -39,32 +39,32 @@ /* ***** Functions ***** */ -int MXC_SEMA_Init (void) +int MXC_SEMA_Init(void) { return E_NO_ERROR; } -int MXC_SEMA_GetSema (unsigned sema) +int MXC_SEMA_GetSema(unsigned sema) { - return MXC_SEMA_RevA_GetSema (sema); + return MXC_SEMA_RevA_GetSema(sema); } -int MXC_SEMA_CheckSema (unsigned sema) +int MXC_SEMA_CheckSema(unsigned sema) { - return MXC_SEMA_RevA_CheckSema (sema); + return MXC_SEMA_RevA_CheckSema(sema); } -uint32_t MXC_SEMA_Status (void) +uint32_t MXC_SEMA_Status(void) { return MXC_SEMA_RevA_Status(); } -void MXC_SEMA_FreeSema (unsigned sema) +void MXC_SEMA_FreeSema(unsigned sema) { - MXC_SEMA_RevA_FreeSema (sema); + MXC_SEMA_RevA_FreeSema(sema); } -int MXC_SEMA_Shutdown (void) +int MXC_SEMA_Shutdown(void) { return E_NO_ERROR; } diff --git a/Libraries/PeriphDrivers/Source/SEMA/sema_reva.c b/Libraries/PeriphDrivers/Source/SEMA/sema_reva.c index c70503344..29abcae5a 100644 --- a/Libraries/PeriphDrivers/Source/SEMA/sema_reva.c +++ b/Libraries/PeriphDrivers/Source/SEMA/sema_reva.c @@ -37,10 +37,10 @@ #include "mxc_sys.h" #include "sema_reva.h" -int MXC_SEMA_RevA_GetSema (unsigned sema) +int MXC_SEMA_RevA_GetSema(unsigned sema) { uint32_t sema_val; - MXC_ASSERT (sema < MXC_CFG_SEMA_INSTANCES); + MXC_ASSERT(sema < MXC_CFG_SEMA_INSTANCES); // Reading the register does an atomic test and set, returns previous value sema_val = MXC_SEMA->semaphores[sema]; @@ -53,9 +53,9 @@ int MXC_SEMA_RevA_GetSema (unsigned sema) } } -int MXC_SEMA_RevA_CheckSema (unsigned sema) +int MXC_SEMA_RevA_CheckSema(unsigned sema) { - MXC_ASSERT (sema < MXC_CFG_SEMA_INSTANCES); + MXC_ASSERT(sema < MXC_CFG_SEMA_INSTANCES); if (MXC_SEMA->status & (0x1 << sema)) { return E_BUSY; @@ -65,14 +65,14 @@ int MXC_SEMA_RevA_CheckSema (unsigned sema) } } -uint32_t MXC_SEMA_RevA_Status (void) +uint32_t MXC_SEMA_RevA_Status(void) { return MXC_SEMA->status; } -void MXC_SEMA_RevA_FreeSema (unsigned sema) +void MXC_SEMA_RevA_FreeSema(unsigned sema) { - MXC_ASSERT (sema < MXC_CFG_SEMA_INSTANCES); + MXC_ASSERT(sema < MXC_CFG_SEMA_INSTANCES); MXC_SEMA->semaphores[sema] = 0x0; } diff --git a/Libraries/PeriphDrivers/Source/SFE/sfe_reva.c b/Libraries/PeriphDrivers/Source/SFE/sfe_reva.c index 70ae381cf..100397f35 100644 --- a/Libraries/PeriphDrivers/Source/SFE/sfe_reva.c +++ b/Libraries/PeriphDrivers/Source/SFE/sfe_reva.c @@ -65,7 +65,7 @@ int MXC_SFE_RevA_SetFlashAddress(uint32_t lowerAdd, uint32_t upperAdd) MXC_SFE->flash_sba = lowerAdd; MXC_SFE->flash_sta = upperAdd; MXC_SFE->sfdp_sba = 0x10008000; // FLash base address - + return E_NO_ERROR; } @@ -73,7 +73,7 @@ int MXC_SFE_RevA_SetRAMAddress(uint32_t lowerAdd, uint32_t upperAdd) { MXC_SFE->ram_sba = lowerAdd; MXC_SFE->ram_sta = upperAdd; - + return E_NO_ERROR; } @@ -81,6 +81,6 @@ int MXC_SFE_RevA_SetHostAddress(uint32_t RAMAdd, uint32_t FLASHAdd) { MXC_SFE->hfsa = FLASHAdd; MXC_SFE->hrsa = RAMAdd; - + return E_NO_ERROR; } \ No newline at end of file diff --git a/Libraries/PeriphDrivers/Source/SKBD/skbd_reva.c b/Libraries/PeriphDrivers/Source/SKBD/skbd_reva.c index decd24190..3d2b434bd 100644 --- a/Libraries/PeriphDrivers/Source/SKBD/skbd_reva.c +++ b/Libraries/PeriphDrivers/Source/SKBD/skbd_reva.c @@ -38,28 +38,28 @@ /* ***** SKBD context info ***** */ static mxc_skbd_req_t mxc_skbd_req; -static void SKBD_RevA_IRQHandler (void) +static void SKBD_RevA_IRQHandler(void) { if (mxc_skbd_req.irq_handler) { mxc_skbd_req.irq_handler(); } /* Acknowledge interrupt at platform level */ - NVIC_ClearPendingIRQ (SKB_IRQn); + NVIC_ClearPendingIRQ(SKB_IRQn); } int MXC_SKBD_RevA_PreInit(void) { mxc_skbd_req.first_init = 0; - NVIC_ClearPendingIRQ (SKB_IRQn); + NVIC_ClearPendingIRQ(SKB_IRQn); /* Attach vector */ - NVIC_SetVector (SKB_IRQn,SKBD_RevA_IRQHandler); + NVIC_SetVector(SKB_IRQn, SKBD_RevA_IRQHandler); return E_NO_ERROR; } -int MXC_SKBD_RevA_Init (mxc_skbd_config_t config) +int MXC_SKBD_RevA_Init(mxc_skbd_config_t config) { int result = E_NO_ERROR; @@ -77,9 +77,9 @@ int MXC_SKBD_RevA_Init (mxc_skbd_config_t config) /* Configure SKBD output pins */ MXC_SKBD->ctrl0 |= config.outputs; /* Configure SKBD input pins */ - MXC_SKBD->ctrl0 &= ~ (config.inputs); + MXC_SKBD->ctrl0 &= ~(config.inputs); /* Memset like procedure */ - memset ( (unsigned char*) &mxc_skbd_req, 0x00, sizeof (mxc_skbd_req)); + memset((unsigned char*) &mxc_skbd_req, 0x00, sizeof(mxc_skbd_req)); /* Count the number of output SKBD lines */ temp = config.outputs; @@ -89,12 +89,12 @@ int MXC_SKBD_RevA_Init (mxc_skbd_config_t config) } /* Configure the SKBD */ - temp = ( (config.reg_erase << MXC_F_SKBD_CTRL1_CLEAR_POS) | MXC_F_SKBD_CTRL1_AUTOEN); + temp = ((config.reg_erase << MXC_F_SKBD_CTRL1_CLEAR_POS) | MXC_F_SKBD_CTRL1_AUTOEN); temp |= (config.debounce << MXC_F_SKBD_CTRL1_DBTM_POS) & MXC_F_SKBD_CTRL1_DBTM; temp |= (outputs << MXC_F_SKBD_CTRL1_OUTNB_POS) & MXC_F_SKBD_CTRL1_OUTNB; MXC_SKBD->ctrl1 |= temp; - while (! (MXC_SKBD->sr & MXC_F_SKBD_SR_BUSY)); + while (!(MXC_SKBD->sr & MXC_F_SKBD_SR_BUSY)); /* Setup IRQ */ if (config.irq_handler) { @@ -112,7 +112,7 @@ int MXC_SKBD_RevA_Init (mxc_skbd_config_t config) return result; } -int MXC_SKBD_RevA_EnableInterruptEvents (unsigned int events) +int MXC_SKBD_RevA_EnableInterruptEvents(unsigned int events) { int result = E_NO_ERROR; @@ -127,21 +127,21 @@ int MXC_SKBD_RevA_EnableInterruptEvents (unsigned int events) return result; } -extern inline int MXC_SKBD_RevA_DisableInterruptEvents (unsigned int events) +extern inline int MXC_SKBD_RevA_DisableInterruptEvents(unsigned int events) { events &= (MXC_SKBD_EVENT_PUSH | MXC_SKBD_EVENT_RELEASE | MXC_SKBD_EVENT_OVERRUN); MXC_SKBD->ier &= ~events; return E_NO_ERROR; } -extern inline int MXC_SKBD_RevA_ClearInterruptStatus (unsigned int status) +extern inline int MXC_SKBD_RevA_ClearInterruptStatus(unsigned int status) { status &= (MXC_SKBD_INTERRUPT_STATUS_PUSHIS | MXC_SKBD_INTERRUPT_STATUS_RELEASEIS | MXC_SKBD_INTERRUPT_STATUS_OVERIS); MXC_SKBD->isr &= ~status; return E_NO_ERROR; } -extern inline int MXC_SKBD_RevA_InterruptStatus (unsigned int *status) +extern inline int MXC_SKBD_RevA_InterruptStatus(unsigned int* status) { if (status == NULL) { return E_NULL_PTR; @@ -151,12 +151,12 @@ extern inline int MXC_SKBD_RevA_InterruptStatus (unsigned int *status) return E_NO_ERROR; } -int MXC_SKBD_RevA_ReadKeys (mxc_skbd_keys_t *keys) +int MXC_SKBD_RevA_ReadKeys(mxc_skbd_keys_t* keys) { - volatile unsigned short *key; + volatile unsigned short* key; volatile unsigned int i = 0; volatile unsigned int temp; - volatile unsigned int *key_reg; + volatile unsigned int* key_reg; if (keys == NULL) { return E_NULL_PTR; @@ -166,25 +166,25 @@ int MXC_SKBD_RevA_ReadKeys (mxc_skbd_keys_t *keys) key_reg = (unsigned int*) &MXC_SKBD->evt[0]; for (i = 0; i < MXC_SKBD_TOTAL_KEY_REGS; i++) { - if (! (MXC_SKBD->ctrl1 & MXC_F_SKBD_CTRL1_CLEAR) + if (!(MXC_SKBD->ctrl1 & MXC_F_SKBD_CTRL1_CLEAR) && (MXC_SKBD->ier & MXC_F_SKBD_IER_PUSHIE)) { - if (! (*key_reg & (MXC_F_SKBD_EVT_PUSH | MXC_F_SKBD_EVT_READ))) { - *key++ = ( (*key_reg & MXC_F_SKBD_EVT_IOIN) | ( (*key_reg & MXC_F_SKBD_EVT_IOOUT) >> 1)); + if (!(*key_reg & (MXC_F_SKBD_EVT_PUSH | MXC_F_SKBD_EVT_READ))) { + *key++ = ((*key_reg & MXC_F_SKBD_EVT_IOIN) | ((*key_reg & MXC_F_SKBD_EVT_IOOUT) >> 1)); } } - else if (! (MXC_SKBD->ctrl1 & MXC_F_SKBD_CTRL1_CLEAR) + else if (!(MXC_SKBD->ctrl1 & MXC_F_SKBD_CTRL1_CLEAR) && (MXC_SKBD->ier & MXC_F_SKBD_IER_RELEASEIE)) { temp = *key_reg; - if ( (temp & MXC_F_SKBD_EVT_PUSH) && ! (temp & MXC_F_SKBD_EVT_READ)) { - *key++ = ( (*key_reg & MXC_F_SKBD_EVT_IOIN) | ( (*key_reg & MXC_F_SKBD_EVT_IOOUT) >> 1)); + if ((temp & MXC_F_SKBD_EVT_PUSH) && !(temp & MXC_F_SKBD_EVT_READ)) { + *key++ = ((*key_reg & MXC_F_SKBD_EVT_IOIN) | ((*key_reg & MXC_F_SKBD_EVT_IOOUT) >> 1)); } } else { temp = *key_reg; - if (! (temp & MXC_F_SKBD_EVT_READ)) { - *key++ = ( (temp & MXC_F_SKBD_EVT_IOIN) | ( (temp & MXC_F_SKBD_EVT_IOOUT) >> 1)); + if (!(temp & MXC_F_SKBD_EVT_READ)) { + *key++ = ((temp & MXC_F_SKBD_EVT_IOIN) | ((temp & MXC_F_SKBD_EVT_IOOUT) >> 1)); } } @@ -194,9 +194,9 @@ int MXC_SKBD_RevA_ReadKeys (mxc_skbd_keys_t *keys) return E_NO_ERROR; } -int MXC_SKBD_RevA_Close (void) +int MXC_SKBD_RevA_Close(void) { - NVIC_DisableIRQ (SKB_IRQn); + NVIC_DisableIRQ(SKB_IRQn); mxc_skbd_req.state = MXC_SKBD_STATE_CLOSED; mxc_skbd_req.first_init = 0; return E_NO_ERROR; diff --git a/Libraries/PeriphDrivers/Source/SPIXF/spixf_reva.c b/Libraries/PeriphDrivers/Source/SPIXF/spixf_reva.c index df324fcb4..b7f6859f8 100644 --- a/Libraries/PeriphDrivers/Source/SPIXF/spixf_reva.c +++ b/Libraries/PeriphDrivers/Source/SPIXF/spixf_reva.c @@ -61,19 +61,19 @@ #define MXC_SPIXF_HEADER_WIDTH_POS 9 #define MXC_SPIXF_HEADER_DEASS_SS_POS 13 -uint8_t mxc_spixf_busy (void); -static int SPIXFC_ReadRXFIFO (mxc_spixfc_fifo_regs_t *fifo, uint8_t *data, int len); -static void SPIXFC_TransHandler (mxc_spixf_req_t *req); +uint8_t mxc_spixf_busy(void); +static int SPIXFC_ReadRXFIFO(mxc_spixfc_fifo_regs_t* fifo, uint8_t* data, int len); +static void SPIXFC_TransHandler(mxc_spixf_req_t* req); /******* Globals *******/ typedef struct { - mxc_spixf_req_t *req; + mxc_spixf_req_t* req; unsigned int head_rem; } spixf_req_head_t; static spixf_req_head_t states; /****** Functions ******/ -uint8_t mxc_spixf_busy (void) +uint8_t mxc_spixf_busy(void) { if (MXC_SPIXF_RevA_GetSSDriveOutput() == 1) { return 1; @@ -82,7 +82,7 @@ uint8_t mxc_spixf_busy (void) return 0; } -int MXC_SPIXF_RevA_Init (uint32_t cmdval, uint32_t frequency) +int MXC_SPIXF_RevA_Init(uint32_t cmdval, uint32_t frequency) { states.req = NULL; states.head_rem = 0; @@ -90,25 +90,25 @@ int MXC_SPIXF_RevA_Init (uint32_t cmdval, uint32_t frequency) MXC_SPIXF_RevA_RXFIFOEnable(); MXC_SPIXF_RevA_TXFIFOEnable(); MXC_SPIXF_RevA_SCKFeedbackEnable(); - MXC_SPIXF_RevA_SetSPIFrequency (frequency); - MXC_SPIXF_RevA_SetSSActiveTime (MXC_SPIXF_SYS_CLOCKS_0); - MXC_SPIXF_RevA_SetSSInactiveTime (MXC_SPIXF_SYS_CLOCKS_1); - MXC_SPIXF_RevA_SetCmdValue (cmdval); - MXC_SPIXF_RevA_SetCmdWidth (MXC_SPIXF_SINGLE_SDIO); - MXC_SPIXF_RevA_SetAddrWidth (MXC_SPIXF_SINGLE_SDIO); - MXC_SPIXF_RevA_SetDataWidth (MXC_SPIXF_SINGLE_SDIO); + MXC_SPIXF_RevA_SetSPIFrequency(frequency); + MXC_SPIXF_RevA_SetSSActiveTime(MXC_SPIXF_SYS_CLOCKS_0); + MXC_SPIXF_RevA_SetSSInactiveTime(MXC_SPIXF_SYS_CLOCKS_1); + MXC_SPIXF_RevA_SetCmdValue(cmdval); + MXC_SPIXF_RevA_SetCmdWidth(MXC_SPIXF_SINGLE_SDIO); + MXC_SPIXF_RevA_SetAddrWidth(MXC_SPIXF_SINGLE_SDIO); + MXC_SPIXF_RevA_SetDataWidth(MXC_SPIXF_SINGLE_SDIO); MXC_SPIXF_RevA_Set3ByteAddr(); - MXC_SPIXF_RevA_SetMode (MXC_SPIXF_MODE_0); - MXC_SPIXF_RevA_SetPageSize (MXC_SPIXF_32B); + MXC_SPIXF_RevA_SetMode(MXC_SPIXF_MODE_0); + MXC_SPIXF_RevA_SetPageSize(MXC_SPIXF_32B); MXC_SPIXF_RevA_SetSSPolActiveLow(); return E_NO_ERROR; } -void MXC_SPIXF_RevA_Shutdown (void) +void MXC_SPIXF_RevA_Shutdown(void) { - mxc_spixf_req_t *temp_req; - MXC_SPIXF_RevA_DisableInt (0x3F); - MXC_SPIXF_RevA_ClearFlags (MXC_SPIXFC->int_fl); + mxc_spixf_req_t* temp_req; + MXC_SPIXF_RevA_DisableInt(0x3F); + MXC_SPIXF_RevA_ClearFlags(MXC_SPIXFC->int_fl); MXC_SPIXF_RevA_Disable(); MXC_SPIXF_RevA_TXFIFODisable(); MXC_SPIXF_RevA_RXFIFODisable(); @@ -120,16 +120,16 @@ void MXC_SPIXF_RevA_Shutdown (void) temp_req = states.req; // Unlock this SPIXFC - MXC_FreeLock ( (uint32_t*) &states.req); + MXC_FreeLock((uint32_t*) &states.req); // Callback if not NULL if (temp_req->callback != NULL) { - temp_req->callback (temp_req, E_SHUTDOWN); + temp_req->callback(temp_req, E_SHUTDOWN); } } } -void MXC_SPIXF_RevA_IOCtrl (mxc_spixf_ds_t sclk_ds, mxc_spixf_ds_t ss_ds, mxc_spixf_ds_t sdio_ds, mxc_spixf_pup_t pupdctrl) +void MXC_SPIXF_RevA_IOCtrl(mxc_spixf_ds_t sclk_ds, mxc_spixf_ds_t ss_ds, mxc_spixf_ds_t sdio_ds, mxc_spixf_pup_t pupdctrl) { MXC_SPIXFM->io_ctrl = 0; @@ -151,24 +151,24 @@ void MXC_SPIXF_RevA_IOCtrl (mxc_spixf_ds_t sclk_ds, mxc_spixf_ds_t ss_ds, mxc_sp MXC_SPIXF_RevA_SetIoctrlSDIODriveHigh(); } - MXC_SPIXF_RevA_SetPuPdCtrl (pupdctrl); + MXC_SPIXF_RevA_SetPuPdCtrl(pupdctrl); } -int MXC_SPIXF_RevA_Clocks (uint32_t len, uint8_t deass) +int MXC_SPIXF_RevA_Clocks(uint32_t len, uint8_t deass) { - mxc_spixfc_fifo_regs_t *fifo; + mxc_spixfc_fifo_regs_t* fifo; uint16_t header = MXC_SPIXF_HEADER_TX_DIR; uint32_t num = len; // Make sure the SPIXFC has been initialized - MXC_ASSERT (MXC_SPIXF_RevA_IsEnabled()); + MXC_ASSERT(MXC_SPIXF_RevA_IsEnabled()); if (len == 0) { return E_NO_ERROR; } // Lock this SPIXFC - if (MXC_GetLock ( (uint32_t*) &states.req, 1) != E_NO_ERROR) { + if (MXC_GetLock((uint32_t*) &states.req, 1) != E_NO_ERROR) { return E_BUSY; } @@ -212,32 +212,32 @@ int MXC_SPIXF_RevA_Clocks (uint32_t len, uint8_t deass) MXC_SPIXF_RevA_SCKFeedbackEnable(); // Unlock this SPIXFC - MXC_FreeLock ( (uint32_t*) &states.req); + MXC_FreeLock((uint32_t*) &states.req); return num; } -int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) +int MXC_SPIXF_RevA_Transaction(mxc_spixf_req_t* req) { int remain, temp_read; uint32_t pages, bytes; uint8_t read, write; - mxc_spixfc_fifo_regs_t *fifo; + mxc_spixfc_fifo_regs_t* fifo; uint16_t header; // Check the input parameters - MXC_ASSERT (req != NULL); - MXC_ASSERT ( (req->rx_data != NULL) || (req->tx_data != NULL)); + MXC_ASSERT(req != NULL); + MXC_ASSERT((req->rx_data != NULL) || (req->tx_data != NULL)); // Make sure the SPIXFC has been initialized - MXC_ASSERT (MXC_SPIXF_RevA_IsEnabled()); + MXC_ASSERT(MXC_SPIXF_RevA_IsEnabled()); if (req->len == 0) { return E_NO_ERROR; } // Lock this SPIXFC - if (MXC_GetLock ( (uint32_t*) &states.req, 1) != E_NO_ERROR) { + if (MXC_GetLock((uint32_t*) &states.req, 1) != E_NO_ERROR) { return E_BUSY; } @@ -257,17 +257,17 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) while (remain) { // Set the transaction configuration in the header - header = ( (write << MXC_SPIXF_HEADER_DIRECTION_POS) | - (read << (MXC_SPIXF_HEADER_DIRECTION_POS+1)) | - (req->width << MXC_SPIXF_HEADER_WIDTH_POS)); - + header = ((write << MXC_SPIXF_HEADER_DIRECTION_POS) | + (read << (MXC_SPIXF_HEADER_DIRECTION_POS + 1)) | + (req->width << MXC_SPIXF_HEADER_WIDTH_POS)); + if (remain >= MXC_SPIXF_MAX_BYTE_LEN) { // Send a 32 byte header if (remain == MXC_SPIXF_MAX_BYTE_LEN) { // 0 maps to 32 in the header,... - header |= ( (MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | - (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); - + header |= ((MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | + (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); + bytes = MXC_SPIXF_MAX_BYTE_LEN; } @@ -287,7 +287,7 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) } // Check if this is the last header we will send - if ( (remain - bytes) == 0) { + if ((remain - bytes) == 0) { header |= (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS); } } @@ -301,10 +301,10 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) else { // Send final header with the number of bytes remaining and if // we want to de-assert the SS at the end of the transaction - header |= ( (MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | - (remain << MXC_SPIXF_HEADER_SIZE_POS) | - (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); - + header |= ((MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | + (remain << MXC_SPIXF_HEADER_SIZE_POS) | + (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); + fifo->tx_16 = header; states.head_rem = remain; @@ -316,19 +316,19 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) if (write) { // Wait for there to be room in the TXFIFO - while ( ( (MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT) - >> MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT_POS) > (MXC_CFG_SPIXFC_FIFO_DEPTH - 2)) { - + while (((MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT) + >> MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT_POS) > (MXC_CFG_SPIXFC_FIFO_DEPTH - 2)) { + } if (states.head_rem > 1) { - fifo->tx_16 = ( (req->tx_data[req->write_num+1] << 8) | (req->tx_data[req->write_num])); + fifo->tx_16 = ((req->tx_data[req->write_num + 1] << 8) | (req->tx_data[req->write_num])); req->write_num += 2; } else { fifo->tx_16 = (NOT_HEADER_DATA | req->tx_data[req->write_num]); req->write_num++; - } + } } if (read) { @@ -338,7 +338,7 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) temp_read = 0; do { - temp_read = SPIXFC_ReadRXFIFO (fifo, &req->rx_data[req->read_num], 1); + temp_read = SPIXFC_ReadRXFIFO(fifo, &req->rx_data[req->read_num], 1); } while (temp_read != 1); @@ -346,7 +346,7 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) } do { - temp_read = SPIXFC_ReadRXFIFO (fifo, &req->rx_data[req->read_num], 1); + temp_read = SPIXFC_ReadRXFIFO(fifo, &req->rx_data[req->read_num], 1); } while (temp_read != 1); @@ -362,30 +362,30 @@ int MXC_SPIXF_RevA_Transaction (mxc_spixf_req_t *req) } // end of while(remain) // Unlock this SPIXFC - MXC_FreeLock ( (uint32_t*) &states.req); + MXC_FreeLock((uint32_t*) &states.req); if (write) { return req->write_num; } - return req->read_num; + return req->read_num; } -int MXC_SPIXF_RevA_TransactionAsync (mxc_spixf_req_t *req) +int MXC_SPIXF_RevA_TransactionAsync(mxc_spixf_req_t* req) { // Check the input parameters - MXC_ASSERT (req != NULL); - MXC_ASSERT ( (req->rx_data != NULL) || (req->tx_data != NULL)); + MXC_ASSERT(req != NULL); + MXC_ASSERT((req->rx_data != NULL) || (req->tx_data != NULL)); // Make sure the SPIXFC has been initialized - MXC_ASSERT (MXC_SPIXF_RevA_IsEnabled()); + MXC_ASSERT(MXC_SPIXF_RevA_IsEnabled()); if (req->len == 0) { return E_NO_ERROR; } // Attempt to register this write request - if (MXC_GetLock ( (uint32_t*) &states.req, (uint32_t) req) != E_NO_ERROR) { + if (MXC_GetLock((uint32_t*) &states.req, (uint32_t) req) != E_NO_ERROR) { return E_BUSY; } @@ -395,14 +395,14 @@ int MXC_SPIXF_RevA_TransactionAsync (mxc_spixf_req_t *req) states.head_rem = 0; // Start the write - SPIXFC_TransHandler (req); + SPIXFC_TransHandler(req); return E_NO_ERROR; } -int MXC_SPIXF_RevA_AbortAsync (mxc_spixf_req_t *req) +int MXC_SPIXF_RevA_AbortAsync(mxc_spixf_req_t* req) { - mxc_spixf_req_t *temp_req; + mxc_spixf_req_t* temp_req; // Check the input parameters if (req == NULL) { @@ -419,11 +419,11 @@ int MXC_SPIXF_RevA_AbortAsync (mxc_spixf_req_t *req) temp_req = states.req; // Unlock this SPIXFC - MXC_FreeLock ( (uint32_t*) &states.req); + MXC_FreeLock((uint32_t*) &states.req); // Callback if not NULL if (temp_req->callback != NULL) { - temp_req->callback (temp_req, E_ABORT); + temp_req->callback(temp_req, E_ABORT); } return E_NO_ERROR; @@ -432,7 +432,7 @@ int MXC_SPIXF_RevA_AbortAsync (mxc_spixf_req_t *req) return E_BAD_PARAM; } -void MXC_SPIXF_RevA_Handler (void) +void MXC_SPIXF_RevA_Handler(void) { uint32_t flags; @@ -442,18 +442,18 @@ void MXC_SPIXF_RevA_Handler (void) MXC_SPIXFC->int_fl = flags; // Figure out if this SPIXFC has an active request - if ( (states.req != NULL) && (flags)) { - SPIXFC_TransHandler (states.req); + if ((states.req != NULL) && (flags)) { + SPIXFC_TransHandler(states.req); } } -__attribute__ ( (noinline)) static int SPIXFC_ReadRXFIFO (mxc_spixfc_fifo_regs_t *fifo, - uint8_t *data, int len) +__attribute__((noinline)) static int SPIXFC_ReadRXFIFO(mxc_spixfc_fifo_regs_t* fifo, + uint8_t* data, int len) { int num = 0; // Get data from the RXFIFO - while ( (MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_CNT) && (len - num)) { + while ((MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_CNT) && (len - num)) { // Save data from the RXFIFO data[num] = fifo->rx_8; num++; @@ -462,15 +462,15 @@ __attribute__ ( (noinline)) static int SPIXFC_ReadRXFIFO (mxc_spixfc_fifo_regs_ return num; } -static void SPIXFC_TransHandler (mxc_spixf_req_t *req) +static void SPIXFC_TransHandler(mxc_spixf_req_t* req) { int remain; uint8_t read, write; uint16_t header; uint32_t pages, bytes, inten; unsigned int bytes_read; - mxc_spixfc_fifo_regs_t *fifo; - mxc_spixf_req_t *temp_req; + mxc_spixfc_fifo_regs_t* fifo; + mxc_spixf_req_t* temp_req; inten = 0; @@ -497,9 +497,9 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) if (read) { // Read all of the data in the RXFIFO, or until we don't need anymore - bytes_read = SPIXFC_ReadRXFIFO (fifo, &req->rx_data[req->read_num], - (req->len - req->read_num)); - + bytes_read = SPIXFC_ReadRXFIFO(fifo, &req->rx_data[req->read_num], + (req->len - req->read_num)); + req->read_num += bytes_read; // Adjust head_rem if we are only reading @@ -519,13 +519,13 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) // Set the RX interrupts if (remain > MXC_CFG_SPIXFC_FIFO_DEPTH) { // FIFO Almost FULL level = 16-2 = 14; - MXC_SPIXFC->fifo_ctrl = ( (MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL) | - ( (MXC_CFG_SPIXFC_FIFO_DEPTH - 2) << MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL_POS)); - + MXC_SPIXFC->fifo_ctrl = ((MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL) | + ((MXC_CFG_SPIXFC_FIFO_DEPTH - 2) << MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL_POS)); + } else { // FIFO Almost Full level = remain-1; - MXC_SPIXFC->fifo_ctrl = ( (MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL) | - ( (remain - 1) << MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL_POS)); + MXC_SPIXFC->fifo_ctrl = ((MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL) | + ((remain - 1) << MXC_F_SPIXFC_FIFO_CTRL_RX_FIFO_AF_LVL_POS)); } inten |= MXC_F_SPIXFC_INT_EN_RX_FIFO_AF; @@ -545,16 +545,16 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) // Set the transaction configuration in the header - header = ( (write << MXC_SPIXF_HEADER_DIRECTION_POS) | - (read << (MXC_SPIXF_HEADER_DIRECTION_POS+1)) | - (req->width << MXC_SPIXF_HEADER_WIDTH_POS)); - + header = ((write << MXC_SPIXF_HEADER_DIRECTION_POS) | + (read << (MXC_SPIXF_HEADER_DIRECTION_POS + 1)) | + (req->width << MXC_SPIXF_HEADER_WIDTH_POS)); + if (remain >= MXC_SPIXF_MAX_BYTE_LEN) { // Send a 32 byte header if (remain == MXC_SPIXF_MAX_BYTE_LEN) { - header |= ( (MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | - (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); + header |= ((MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | + (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); // Save the number of bytes we need to write to the FIFO bytes = MXC_SPIXF_MAX_BYTE_LEN; } @@ -573,7 +573,7 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) } // Check if this is the last header we will send - if ( (remain - bytes) == 0) { + if ((remain - bytes) == 0) { header |= (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS); } } @@ -587,13 +587,13 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) else { // Send final header with the number of bytes remaining and if // we want to de-assert the SS at the end of the transaction - header |= ( (MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | - (remain << MXC_SPIXF_HEADER_SIZE_POS) | - (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); + header |= ((MXC_SPIXF_HEADER_UNITS_BYTES << MXC_SPIXF_HEADER_UNITS_POS) | + (remain << MXC_SPIXF_HEADER_SIZE_POS) | + (req->deass << MXC_SPIXF_HEADER_DEASS_SS_POS)); fifo->tx_16 = header; states.head_rem = remain; } - } + } // Put data into the FIFO if we are writing remain = req->len - req->write_num; @@ -601,15 +601,15 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) if (write && states.head_rem) { // from above... the num of bytes... // Fill the FIFO - while ( ( ( (MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT) >> - MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT_POS) < (MXC_CFG_SPIXFC_FIFO_DEPTH - 2)) && (states.head_rem)) { - + while ((((MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT) >> + MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT_POS) < (MXC_CFG_SPIXFC_FIFO_DEPTH - 2)) && (states.head_rem)) { + if (states.head_rem > 1) { // Write 2 byte at a time - fifo->tx_16 = ( (req->tx_data[req->write_num+1] << 8) | - (req->tx_data[req->write_num])); - + fifo->tx_16 = ((req->tx_data[req->write_num + 1] << 8) | + (req->tx_data[req->write_num])); + req->write_num += 2; states.head_rem -= 2; } @@ -628,10 +628,10 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) // Set the TX interrupts if (remain) { // Set the TX FIFO almost empty interrupt if we have to refill - MXC_SPIXFC->fifo_ctrl = ( (MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_AE_LVL) | - ( (MXC_CFG_SPIXFC_FIFO_DEPTH - 2) << MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_AE_LVL_POS)); - - inten |= MXC_F_SPIXFC_INT_EN_TX_FIFO_AE; + MXC_SPIXFC->fifo_ctrl = ((MXC_SPIXFC->fifo_ctrl & ~MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_AE_LVL) | + ((MXC_CFG_SPIXFC_FIFO_DEPTH - 2) << MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_AE_LVL_POS)); + + inten |= MXC_F_SPIXFC_INT_EN_TX_FIFO_AE; } else if (req->wait_tx) { // Set the TX Ready interrupt if we're waiting for the FIFO to empty @@ -645,8 +645,8 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) } // Check to see if we've finished reading and writing - if ( ( (read && (req->read_num == req->len)) || !read) && - ( ( (req->write_num == req->len) && !req->wait_tx) || !write)) { + if (((read && (req->read_num == req->len)) || !read) && + (((req->write_num == req->len) && !req->wait_tx) || !write)) { // clear interrupts MXC_SPIXFC->int_fl = MXC_SPIXFC->int_fl; @@ -655,11 +655,11 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) temp_req = states.req; // Unlock this SPIXFC - MXC_FreeLock ( (uint32_t*) &states.req); + MXC_FreeLock((uint32_t*) &states.req); // Callback if not NULL if (temp_req->callback != NULL) { - temp_req->callback (temp_req, E_NO_ERROR); + temp_req->callback(temp_req, E_NO_ERROR); } } @@ -667,14 +667,14 @@ static void SPIXFC_TransHandler (mxc_spixf_req_t *req) MXC_SPIXFC->int_en = inten; } -int MXC_SPIXF_RevA_ReadyForSleep (void) +int MXC_SPIXF_RevA_ReadyForSleep(void) { // Check to see if there are any ongoing transactions - if ( (states.req == NULL) && - ! (MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT)) { + if ((states.req == NULL) && + !(MXC_SPIXFC->fifo_ctrl & MXC_F_SPIXFC_FIFO_CTRL_TX_FIFO_CNT)) { // Disable interrupts, clear flags - MXC_SPIXFC->int_en =0; + MXC_SPIXFC->int_en = 0; MXC_SPIXFC->int_fl = MXC_SPIXFC->int_fl; return E_NO_ERROR; @@ -683,7 +683,7 @@ int MXC_SPIXF_RevA_ReadyForSleep (void) return E_BUSY; } -int MXC_SPIXF_RevA_EnableInt (uint32_t mask) +int MXC_SPIXF_RevA_EnableInt(uint32_t mask) { mask &= (MXC_F_SPIXFC_INT_EN_TX_STALLED | MXC_F_SPIXFC_INT_EN_RX_STALLED | MXC_F_SPIXFC_INT_EN_TX_READY | MXC_F_SPIXFC_INT_EN_RX_DONE | MXC_F_SPIXFC_INT_EN_TX_FIFO_AE | MXC_F_SPIXFC_INT_EN_RX_FIFO_AF); @@ -697,7 +697,7 @@ int MXC_SPIXF_RevA_EnableInt (uint32_t mask) return E_NO_ERROR; } -int MXC_SPIXF_RevA_DisableInt (uint32_t mask) +int MXC_SPIXF_RevA_DisableInt(uint32_t mask) { mask &= (MXC_F_SPIXFC_INT_EN_TX_STALLED | MXC_F_SPIXFC_INT_EN_RX_STALLED | MXC_F_SPIXFC_INT_EN_TX_READY | MXC_F_SPIXFC_INT_EN_RX_DONE | MXC_F_SPIXFC_INT_EN_TX_FIFO_AE | MXC_F_SPIXFC_INT_EN_RX_FIFO_AF); @@ -711,7 +711,7 @@ int MXC_SPIXF_RevA_DisableInt (uint32_t mask) return E_NO_ERROR; } -int MXC_SPIXF_RevA_ClearFlags (uint32_t flags) +int MXC_SPIXF_RevA_ClearFlags(uint32_t flags) { flags &= (MXC_F_SPIXFC_INT_FL_TX_STALLED | MXC_F_SPIXFC_INT_FL_RX_STALLED | MXC_F_SPIXFC_INT_FL_TX_READY | MXC_F_SPIXFC_INT_FL_RX_DONE | MXC_F_SPIXFC_INT_FL_TX_FIFO_AE | MXC_F_SPIXFC_INT_FL_RX_FIFO_AF); @@ -725,7 +725,7 @@ int MXC_SPIXF_RevA_ClearFlags (uint32_t flags) return E_NO_ERROR; } -int MXC_SPIXF_RevA_GetFlags (void) +int MXC_SPIXF_RevA_GetFlags(void) { return MXC_SPIXFC->int_fl; } @@ -734,23 +734,23 @@ int MXC_SPIXF_RevA_GetFlags (void) //Low level /* ************************************************ */ -int MXC_SPIXF_RevA_SetMode (mxc_spixf_mode_t mode) +int MXC_SPIXF_RevA_SetMode(mxc_spixf_mode_t mode) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_MODE,mode << MXC_F_SPIXFM_CFG_MODE_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_MODE,mode << MXC_F_SPIXFC_CFG_MODE_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_MODE, mode << MXC_F_SPIXFM_CFG_MODE_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_MODE, mode << MXC_F_SPIXFC_CFG_MODE_POS); return E_NO_ERROR; } -mxc_spixf_mode_t MXC_SPIXF_RevA_GetMode (void) +mxc_spixf_mode_t MXC_SPIXF_RevA_GetMode(void) { - return ( (MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_MODE) >> MXC_F_SPIXFC_CFG_MODE_POS); + return ((MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_MODE) >> MXC_F_SPIXFC_CFG_MODE_POS); } -int MXC_SPIXF_RevA_SetSSPolActiveHigh (void) +int MXC_SPIXF_RevA_SetSSPolActiveHigh(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -761,7 +761,7 @@ int MXC_SPIXF_RevA_SetSSPolActiveHigh (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SetSSPolActiveLow (void) +int MXC_SPIXF_RevA_SetSSPolActiveLow(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -772,12 +772,12 @@ int MXC_SPIXF_RevA_SetSSPolActiveLow (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_GetSSPolarity (void) +int MXC_SPIXF_RevA_GetSSPolarity(void) { - return !! (MXC_SPIXFC->ss_pol & MXC_F_SPIXFC_SS_POL_SS_POLARITY); + return !!(MXC_SPIXFC->ss_pol & MXC_F_SPIXFC_SS_POL_SS_POLARITY); } -int MXC_SPIXF_RevA_SetSPIFrequency (unsigned int hz) +int MXC_SPIXF_RevA_SetSPIFrequency(unsigned int hz) { uint32_t clocks, hi_clk, lo_clk; @@ -792,11 +792,11 @@ int MXC_SPIXF_RevA_SetSPIFrequency (unsigned int hz) // Make sure that we can generate this frequency clocks = (PeripheralClock / (2 * hz)); - hi_clk = clocks/2; - lo_clk = clocks/2; + hi_clk = clocks / 2; + lo_clk = clocks / 2; - if (clocks %2) { - hi_clk +=1; + if (clocks % 2) { + hi_clk += 1; } if (hi_clk == 0) { @@ -806,119 +806,119 @@ int MXC_SPIXF_RevA_SetSPIFrequency (unsigned int hz) MXC_SPIXFC->cfg |= MXC_F_SPIXFC_CFG_HI_CLK; } else if (hi_clk > 15) { - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_LO_CLK, 1 << MXC_F_SPIXFM_CFG_LO_CLK_POS); - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_HI_CLK, 1 << MXC_F_SPIXFM_CFG_HI_CLK_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_LO_CLK, 1 << MXC_F_SPIXFC_CFG_LO_CLK_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_HI_CLK, 1 << MXC_F_SPIXFC_CFG_HI_CLK_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_LO_CLK, 1 << MXC_F_SPIXFM_CFG_LO_CLK_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_HI_CLK, 1 << MXC_F_SPIXFM_CFG_HI_CLK_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_LO_CLK, 1 << MXC_F_SPIXFC_CFG_LO_CLK_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_HI_CLK, 1 << MXC_F_SPIXFC_CFG_HI_CLK_POS); } else { - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_LO_CLK, lo_clk << MXC_F_SPIXFM_CFG_LO_CLK_POS); - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_HI_CLK, hi_clk << MXC_F_SPIXFM_CFG_HI_CLK_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_LO_CLK, lo_clk << MXC_F_SPIXFC_CFG_LO_CLK_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_HI_CLK, hi_clk << MXC_F_SPIXFC_CFG_HI_CLK_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_LO_CLK, lo_clk << MXC_F_SPIXFM_CFG_LO_CLK_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_HI_CLK, hi_clk << MXC_F_SPIXFM_CFG_HI_CLK_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_LO_CLK, lo_clk << MXC_F_SPIXFC_CFG_LO_CLK_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_HI_CLK, hi_clk << MXC_F_SPIXFC_CFG_HI_CLK_POS); } return MXC_SPIXF_RevA_GetSPIFrequency(); } -uint32_t MXC_SPIXF_RevA_GetSPIFrequency (void) +uint32_t MXC_SPIXF_RevA_GetSPIFrequency(void) { uint32_t clocks; - clocks = ( (MXC_SPIXFM->cfg & MXC_F_SPIXFM_CFG_HI_CLK) >> MXC_F_SPIXFM_CFG_HI_CLK_POS); + clocks = ((MXC_SPIXFM->cfg & MXC_F_SPIXFM_CFG_HI_CLK) >> MXC_F_SPIXFM_CFG_HI_CLK_POS); // Avoid divide by zero if (clocks == 0) { clocks = 0x10; } - return PeripheralClock / (2* clocks); + return PeripheralClock / (2 * clocks); } -int MXC_SPIXF_RevA_SetSSActiveTime (mxc_spixf_ssact_t ssact) +int MXC_SPIXF_RevA_SetSSActiveTime(mxc_spixf_ssact_t ssact) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_SSACT,ssact << MXC_F_SPIXFM_CFG_SSACT_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_SSACT,ssact << MXC_F_SPIXFC_CFG_SSACT_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_SSACT, ssact << MXC_F_SPIXFM_CFG_SSACT_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_SSACT, ssact << MXC_F_SPIXFC_CFG_SSACT_POS); return E_NO_ERROR; } -mxc_spixf_ssact_t MXC_SPIXF_RevA_GetSSActiveTime (void) +mxc_spixf_ssact_t MXC_SPIXF_RevA_GetSSActiveTime(void) { - return ( (MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_SSACT) >> MXC_F_SPIXFC_CFG_SSACT_POS); + return ((MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_SSACT) >> MXC_F_SPIXFC_CFG_SSACT_POS); } -int MXC_SPIXF_RevA_SetSSInactiveTime (mxc_spixf_ssiact_t ssiact) +int MXC_SPIXF_RevA_SetSSInactiveTime(mxc_spixf_ssiact_t ssiact) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->cfg,MXC_F_SPIXFM_CFG_SSIACT,ssiact << MXC_F_SPIXFM_CFG_SSIACT_POS); - MXC_SETFIELD (MXC_SPIXFC->cfg,MXC_F_SPIXFC_CFG_SSIACT,ssiact << MXC_F_SPIXFC_CFG_SSIACT_POS); + MXC_SETFIELD(MXC_SPIXFM->cfg, MXC_F_SPIXFM_CFG_SSIACT, ssiact << MXC_F_SPIXFM_CFG_SSIACT_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_SSIACT, ssiact << MXC_F_SPIXFC_CFG_SSIACT_POS); return E_NO_ERROR; } -mxc_spixf_ssiact_t MXC_SPIXF_RevA_GetSSInactiveTime (void) +mxc_spixf_ssiact_t MXC_SPIXF_RevA_GetSSInactiveTime(void) { - return ( (MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_SSIACT) >> MXC_F_SPIXFC_CFG_SSIACT_POS); + return ((MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_SSIACT) >> MXC_F_SPIXFC_CFG_SSIACT_POS); } -int MXC_SPIXF_RevA_SetCmdWidth (mxc_spixf_spiwidth_t width) +int MXC_SPIXF_RevA_SetCmdWidth(mxc_spixf_spiwidth_t width) { - MXC_ASSERT (width < MXC_SPIXF_INVALID); + MXC_ASSERT(width < MXC_SPIXF_INVALID); if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS); + MXC_SETFIELD(MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS); return E_NO_ERROR; } -mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetCmdWidth (void) +mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetCmdWidth(void) { - return ( (MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS); + return ((MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS); } -int MXC_SPIXF_RevA_SetAddrWidth (mxc_spixf_spiwidth_t width) +int MXC_SPIXF_RevA_SetAddrWidth(mxc_spixf_spiwidth_t width) { - MXC_ASSERT (width < MXC_SPIXF_INVALID); + MXC_ASSERT(width < MXC_SPIXF_INVALID); if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS); + MXC_SETFIELD(MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS); return E_NO_ERROR; } -mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetAddrWidth (void) +mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetAddrWidth(void) { - return ( (MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS); + return ((MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS); } -int MXC_SPIXF_RevA_SetDataWidth (mxc_spixf_spiwidth_t width) +int MXC_SPIXF_RevA_SetDataWidth(mxc_spixf_spiwidth_t width) { - MXC_ASSERT (width < MXC_SPIXF_INVALID); + MXC_ASSERT(width < MXC_SPIXF_INVALID); if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS); + MXC_SETFIELD(MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH, width << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS); return E_NO_ERROR; } -mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetDataWidth (void) +mxc_spixf_spiwidth_t MXC_SPIXF_RevA_GetDataWidth(void) { - return ( (MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS); + return ((MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH) >> MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS); } -int MXC_SPIXF_RevA_Set4ByteAddr (void) +int MXC_SPIXF_RevA_Set4ByteAddr(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -928,7 +928,7 @@ int MXC_SPIXF_RevA_Set4ByteAddr (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_Set3ByteAddr (void) +int MXC_SPIXF_RevA_Set3ByteAddr(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -938,9 +938,9 @@ int MXC_SPIXF_RevA_Set3ByteAddr (void) return E_NO_ERROR; } -unsigned int MXC_SPIXF_RevA_GetBytesPerAddr (void) +unsigned int MXC_SPIXF_RevA_GetBytesPerAddr(void) { - if (!! (MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_FOUR_BYTE_ADDR)) { + if (!!(MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_FOUR_BYTE_ADDR)) { return 4; } else { @@ -948,22 +948,22 @@ unsigned int MXC_SPIXF_RevA_GetBytesPerAddr (void) } } -int MXC_SPIXF_RevA_SetModeClk (uint8_t mdclk) +int MXC_SPIXF_RevA_SetModeClk(uint8_t mdclk) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->mode_ctrl, MXC_F_SPIXFM_MODE_CTRL_MDCLK, mdclk); + MXC_SETFIELD(MXC_SPIXFM->mode_ctrl, MXC_F_SPIXFM_MODE_CTRL_MDCLK, mdclk); return E_NO_ERROR; } -uint8_t MXC_SPIXF_RevA_GetModeClk (void) +uint8_t MXC_SPIXF_RevA_GetModeClk(void) { - return ( (MXC_SPIXFM->mode_ctrl & MXC_F_SPIXFM_MODE_CTRL_MDCLK) >> MXC_F_SPIXFM_MODE_CTRL_MDCLK_POS); + return ((MXC_SPIXFM->mode_ctrl & MXC_F_SPIXFM_MODE_CTRL_MDCLK) >> MXC_F_SPIXFM_MODE_CTRL_MDCLK_POS); } -int MXC_SPIXF_RevA_SetCmdModeEveryTrans (void) +int MXC_SPIXF_RevA_SetCmdModeEveryTrans(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -973,7 +973,7 @@ int MXC_SPIXF_RevA_SetCmdModeEveryTrans (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SetCmdModeFirstTrans (void) +int MXC_SPIXF_RevA_SetCmdModeFirstTrans(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -983,16 +983,16 @@ int MXC_SPIXF_RevA_SetCmdModeFirstTrans (void) return E_NO_ERROR; } -mxc_spixf_cmd_t MXC_SPIXF_RevA_GetCmdMode (void) +mxc_spixf_cmd_t MXC_SPIXF_RevA_GetCmdMode(void) { - if (!! (MXC_SPIXFM->mode_ctrl & MXC_F_SPIXFM_MODE_CTRL_NO_CMD)) { + if (!!(MXC_SPIXFM->mode_ctrl & MXC_F_SPIXFM_MODE_CTRL_NO_CMD)) { return MXC_SPIXF_CMD_FIRST_TRANS; } return MXC_SPIXF_CMD_EVERY_TRANS; } -int MXC_SPIXF_RevA_BBDataOutputEnable (uint8_t mask) +int MXC_SPIXF_RevA_BBDataOutputEnable(uint8_t mask) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1002,47 +1002,47 @@ int MXC_SPIXF_RevA_BBDataOutputEnable (uint8_t mask) return E_NO_ERROR; } -int MXC_SPIXF_RevA_BBDataOutputDisable (uint8_t mask) +int MXC_SPIXF_RevA_BBDataOutputDisable(uint8_t mask) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SPIXFC->gen_ctrl &= ~ (mask << MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN_POS); + MXC_SPIXFC->gen_ctrl &= ~(mask << MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN_POS); return E_NO_ERROR; } -uint8_t MXC_SPIXF_RevA_BBDataOutputIsEnabled (void) +uint8_t MXC_SPIXF_RevA_BBDataOutputIsEnabled(void) { - return ( (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN) >> MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN_POS); + return ((MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN) >> MXC_F_SPIXFC_GEN_CTRL_BB_DATA_OUT_EN_POS); } -uint8_t MXC_SPIXF_RevA_GetBBDataOutputValue (void) +uint8_t MXC_SPIXF_RevA_GetBBDataOutputValue(void) { - return ( (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BB_DATA) >> MXC_F_SPIXFC_GEN_CTRL_BB_DATA_POS); + return ((MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BB_DATA) >> MXC_F_SPIXFC_GEN_CTRL_BB_DATA_POS); } -uint8_t MXC_SPIXF_RevA_GetBBDataInputValue (void) +uint8_t MXC_SPIXF_RevA_GetBBDataInputValue(void) { - return ( (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SDIO_DATA_IN) >> MXC_F_SPIXFC_GEN_CTRL_SDIO_DATA_IN_POS); + return ((MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SDIO_DATA_IN) >> MXC_F_SPIXFC_GEN_CTRL_SDIO_DATA_IN_POS); } -int MXC_SPIXF_RevA_SetModeData (uint16_t data) +int MXC_SPIXF_RevA_SetModeData(uint16_t data) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->mode_data, MXC_F_SPIXFM_MODE_DATA_DATA, data << MXC_F_SPIXFM_MODE_DATA_DATA_POS); + MXC_SETFIELD(MXC_SPIXFM->mode_data, MXC_F_SPIXFM_MODE_DATA_DATA, data << MXC_F_SPIXFM_MODE_DATA_DATA_POS); return E_NO_ERROR; } -uint16_t MXC_SPIXF_RevA_GetModeData (void) +uint16_t MXC_SPIXF_RevA_GetModeData(void) { - return ( (MXC_SPIXFM->mode_data & MXC_F_SPIXFM_MODE_DATA_DATA) >> MXC_F_SPIXFM_MODE_DATA_DATA_POS); + return ((MXC_SPIXFM->mode_data & MXC_F_SPIXFM_MODE_DATA_DATA) >> MXC_F_SPIXFM_MODE_DATA_DATA_POS); } -int MXC_SPIXF_RevA_SetSCKInverted (void) +int MXC_SPIXF_RevA_SetSCKInverted(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1053,7 +1053,7 @@ int MXC_SPIXF_RevA_SetSCKInverted (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SetSCKNonInverted (void) +int MXC_SPIXF_RevA_SetSCKNonInverted(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1064,12 +1064,12 @@ int MXC_SPIXF_RevA_SetSCKNonInverted (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_GetSCKInverted (void) +int MXC_SPIXF_RevA_GetSCKInverted(void) { - return !! (MXC_SPIXFM->fb_ctrl & MXC_F_SPIXFM_FB_CTRL_INVERT_EN); + return !!(MXC_SPIXFM->fb_ctrl & MXC_F_SPIXFM_FB_CTRL_INVERT_EN); } -int MXC_SPIXF_RevA_SCKFeedbackEnable (void) +int MXC_SPIXF_RevA_SCKFeedbackEnable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1081,7 +1081,7 @@ int MXC_SPIXF_RevA_SCKFeedbackEnable (void) } -int MXC_SPIXF_RevA_SCKFeedbackDisable (void) +int MXC_SPIXF_RevA_SCKFeedbackDisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1092,52 +1092,52 @@ int MXC_SPIXF_RevA_SCKFeedbackDisable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SCKFeedbackIsEnabled (void) +int MXC_SPIXF_RevA_SCKFeedbackIsEnabled(void) { - return !! (MXC_SPIXFM->fb_ctrl & MXC_F_SPIXFM_FB_CTRL_FB_EN); + return !!(MXC_SPIXFM->fb_ctrl & MXC_F_SPIXFM_FB_CTRL_FB_EN); } -int MXC_SPIXF_RevA_SetSCKSampleDelay (uint8_t delay) +int MXC_SPIXF_RevA_SetSCKSampleDelay(uint8_t delay) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_IOSMPL, delay << MXC_F_SPIXFC_CFG_IOSMPL_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_IOSMPL, delay << MXC_F_SPIXFC_CFG_IOSMPL_POS); return E_NO_ERROR; } -uint8_t MXC_SPIXF_RevA_GetSCKSampleDelay (void) +uint8_t MXC_SPIXF_RevA_GetSCKSampleDelay(void) { - return ( (MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_IOSMPL) >> MXC_F_SPIXFC_CFG_IOSMPL_POS); + return ((MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_IOSMPL) >> MXC_F_SPIXFC_CFG_IOSMPL_POS); } -int MXC_SPIXF_RevA_SetCmdValue (uint8_t cmdval) +int MXC_SPIXF_RevA_SetCmdValue(uint8_t cmdval) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SETFIELD (MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_CMDVAL, cmdval << MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS); + MXC_SETFIELD(MXC_SPIXFM->fetch_ctrl, MXC_F_SPIXFM_FETCH_CTRL_CMDVAL, cmdval << MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS); return E_NO_ERROR; } -uint8_t MXC_SPIXF_RevA_GetCmdValue (void) +uint8_t MXC_SPIXF_RevA_GetCmdValue(void) { - return ( (MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_CMDVAL) >> MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS); + return ((MXC_SPIXFM->fetch_ctrl & MXC_F_SPIXFM_FETCH_CTRL_CMDVAL) >> MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS); } -void MXC_SPIXF_RevA_SetPageSize (mxc_spixf_page_size_t size) +void MXC_SPIXF_RevA_SetPageSize(mxc_spixf_page_size_t size) { - MXC_SETFIELD (MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_PAGE_SIZE, size << MXC_F_SPIXFC_CFG_PAGE_SIZE_POS); + MXC_SETFIELD(MXC_SPIXFC->cfg, MXC_F_SPIXFC_CFG_PAGE_SIZE, size << MXC_F_SPIXFC_CFG_PAGE_SIZE_POS); } -mxc_spixf_page_size_t MXC_SPIXF_RevA_GetPageSize (void) +mxc_spixf_page_size_t MXC_SPIXF_RevA_GetPageSize(void) { - return ( (MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_PAGE_SIZE) >> MXC_F_SPIXFC_CFG_PAGE_SIZE_POS); + return ((MXC_SPIXFC->cfg & MXC_F_SPIXFC_CFG_PAGE_SIZE) >> MXC_F_SPIXFC_CFG_PAGE_SIZE_POS); } -int MXC_SPIXF_RevA_SimpleRXEnabled (void) +int MXC_SPIXF_RevA_SimpleRXEnabled(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1147,7 +1147,7 @@ int MXC_SPIXF_RevA_SimpleRXEnabled (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SimpleRXDisable (void) +int MXC_SPIXF_RevA_SimpleRXDisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1157,12 +1157,12 @@ int MXC_SPIXF_RevA_SimpleRXDisable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SimpleRXIsEnabled (void) +int MXC_SPIXF_RevA_SimpleRXIsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SIMPLE_RX); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SIMPLE_RX); } -int MXC_SPIXF_RevA_SimpleModeEnable (void) +int MXC_SPIXF_RevA_SimpleModeEnable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1173,7 +1173,7 @@ int MXC_SPIXF_RevA_SimpleModeEnable (void) } -int MXC_SPIXF_RevA_SimpleModeDisable (void) +int MXC_SPIXF_RevA_SimpleModeDisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1183,12 +1183,12 @@ int MXC_SPIXF_RevA_SimpleModeDisable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_SimpleModeIsEnabled (void) +int MXC_SPIXF_RevA_SimpleModeIsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SIMPLE); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SIMPLE); } -int MXC_SPIXF_RevA_SampleOutputEnable (uint8_t mask) +int MXC_SPIXF_RevA_SampleOutputEnable(uint8_t mask) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1198,24 +1198,24 @@ int MXC_SPIXF_RevA_SampleOutputEnable (uint8_t mask) return E_NO_ERROR;; } -int MXC_SPIXF_RevA_SampleOutputDisable (uint8_t mask) +int MXC_SPIXF_RevA_SampleOutputDisable(uint8_t mask) { if (mxc_spixf_busy()) { return E_BUSY; } - MXC_SPIXFC->sp_ctrl &= ~ (mask << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS); + MXC_SPIXFC->sp_ctrl &= ~(mask << MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS); return E_NO_ERROR; } -uint8_t MXC_SPIXF_RevA_SampleOutputIsEnabled (void) +uint8_t MXC_SPIXF_RevA_SampleOutputIsEnabled(void) { - return ( (MXC_SPIXFC->sp_ctrl & MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN) >> MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS); + return ((MXC_SPIXFC->sp_ctrl & MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN) >> MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_EN_POS); } -uint8_t MXC_SPIXF_RevA_GetSampleOutputValue (void) +uint8_t MXC_SPIXF_RevA_GetSampleOutputValue(void) { - return ( (MXC_SPIXFC->sp_ctrl & MXC_F_SPIXFC_SP_CTRL_SDIO_OUT) >> MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS); + return ((MXC_SPIXFC->sp_ctrl & MXC_F_SPIXFC_SP_CTRL_SDIO_OUT) >> MXC_F_SPIXFC_SP_CTRL_SDIO_OUT_POS); } void MXC_SPIXF_RevA_SetIoctrlSDIODriveHigh() @@ -1228,9 +1228,9 @@ void MXC_SPIXF_RevA_SetIoctrlSDIODriveLow() MXC_SPIXFM->io_ctrl &= (~MXC_F_SPIXFM_IO_CTRL_SDIO_DS); } -uint8_t MXC_SPIXF_RevA_GetIoctrlSDIODrive (void) +uint8_t MXC_SPIXF_RevA_GetIoctrlSDIODrive(void) { - return !! (MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SDIO_DS); + return !!(MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SDIO_DS); } void MXC_SPIXF_RevA_SetIoctrlSCLKDriveHigh() @@ -1243,9 +1243,9 @@ void MXC_SPIXF_RevA_SetIoctrlSCLKDriveLow() MXC_SPIXFM->io_ctrl &= (~MXC_F_SPIXFM_IO_CTRL_SCLK_DS); } -uint8_t MXC_SPIXF_RevA_GetIoctrlSCLKDrive (void) +uint8_t MXC_SPIXF_RevA_GetIoctrlSCLKDrive(void) { - return !! (MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SCLK_DS); + return !!(MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SCLK_DS); } void MXC_SPIXF_RevA_SetIoctrlSSDriveHigh() @@ -1258,19 +1258,19 @@ void MXC_SPIXF_RevA_SetIoctrlSSDriveLow() MXC_SPIXFM->io_ctrl &= (~MXC_F_SPIXFM_IO_CTRL_SS_DS); } -uint8_t MXC_SPIXF_RevA_GetIoctrlSSDrive (void) +uint8_t MXC_SPIXF_RevA_GetIoctrlSSDrive(void) { - return !! (MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SS_DS); + return !!(MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_SS_DS); } -void MXC_SPIXF_RevA_SetPuPdCtrl (mxc_spixf_pup_t pupd) +void MXC_SPIXF_RevA_SetPuPdCtrl(mxc_spixf_pup_t pupd) { MXC_SPIXFM->io_ctrl |= pupd; } -uint8_t MXC_SPIXF_RevA_GetPuPdCtrl (void) +uint8_t MXC_SPIXF_RevA_GetPuPdCtrl(void) { - return !! (MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL); + return !!(MXC_SPIXFM->io_ctrl & MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL); } void MXC_SPIXF_RevA_SetSCKDriveHigh() @@ -1283,28 +1283,28 @@ void MXC_SPIXF_RevA_SetSCKDriveLow() MXC_SPIXFC->gen_ctrl &= (~MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); } -uint8_t MXC_SPIXF_RevA_GetSCKDrive (void) +uint8_t MXC_SPIXF_RevA_GetSCKDrive(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); } -void MXC_SPIXF_RevA_SetSSDriveOutputHigh (void) +void MXC_SPIXF_RevA_SetSSDriveOutputHigh(void) { MXC_SPIXFC->gen_ctrl |= MXC_F_SPIXFC_GEN_CTRL_SCLK_DR; } -void MXC_SPIXF_RevA_SetSSDriveOutputLow (void) +void MXC_SPIXF_RevA_SetSSDriveOutputLow(void) { MXC_SPIXFC->gen_ctrl &= (~MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); } -uint8_t MXC_SPIXF_RevA_GetSSDriveOutput (void) +uint8_t MXC_SPIXF_RevA_GetSSDriveOutput(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_SCLK_DR); } -int MXC_SPIXF_RevA_BitBangModeEnable (void) +int MXC_SPIXF_RevA_BitBangModeEnable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1314,7 +1314,7 @@ int MXC_SPIXF_RevA_BitBangModeEnable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_BitBangModeDisable (void) +int MXC_SPIXF_RevA_BitBangModeDisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1325,12 +1325,12 @@ int MXC_SPIXF_RevA_BitBangModeDisable (void) } -int MXC_SPIXF_RevA_BitBangModeIsEnabled (void) +int MXC_SPIXF_RevA_BitBangModeIsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BBMODE); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_BBMODE); } -int MXC_SPIXF_RevA_RXFIFOEnable (void) +int MXC_SPIXF_RevA_RXFIFOEnable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1340,7 +1340,7 @@ int MXC_SPIXF_RevA_RXFIFOEnable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_RXFIFODisable (void) +int MXC_SPIXF_RevA_RXFIFODisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1350,12 +1350,12 @@ int MXC_SPIXF_RevA_RXFIFODisable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_RXFIFOIsEnabled (void) +int MXC_SPIXF_RevA_RXFIFOIsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_RX_FIFO_EN); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_RX_FIFO_EN); } -int MXC_SPIXF_RevA_TXFIFOEnable (void) +int MXC_SPIXF_RevA_TXFIFOEnable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1365,7 +1365,7 @@ int MXC_SPIXF_RevA_TXFIFOEnable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_TXFIFODisable (void) +int MXC_SPIXF_RevA_TXFIFODisable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1375,12 +1375,12 @@ int MXC_SPIXF_RevA_TXFIFODisable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_TXFIFOIsEnabled (void) +int MXC_SPIXF_RevA_TXFIFOIsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_TX_FIFO_EN); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_TX_FIFO_EN); } -int MXC_SPIXF_RevA_Enable (void) +int MXC_SPIXF_RevA_Enable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1390,7 +1390,7 @@ int MXC_SPIXF_RevA_Enable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_Disable (void) +int MXC_SPIXF_RevA_Disable(void) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1400,12 +1400,12 @@ int MXC_SPIXF_RevA_Disable (void) return E_NO_ERROR; } -int MXC_SPIXF_RevA_IsEnabled (void) +int MXC_SPIXF_RevA_IsEnabled(void) { - return !! (MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_ENABLE); + return !!(MXC_SPIXFC->gen_ctrl & MXC_F_SPIXFC_GEN_CTRL_ENABLE); } -int MXC_SPIXF_RevA_SetBusIdle (unsigned int busidle) +int MXC_SPIXF_RevA_SetBusIdle(unsigned int busidle) { if (mxc_spixf_busy()) { return E_BUSY; @@ -1415,7 +1415,7 @@ int MXC_SPIXF_RevA_SetBusIdle (unsigned int busidle) return E_NO_ERROR; } -unsigned int MXC_SPIXF_RevA_GetBusIdle (void) +unsigned int MXC_SPIXF_RevA_GetBusIdle(void) { return MXC_SPIXFM->bus_idle; diff --git a/Libraries/PeriphDrivers/Source/SPIXR/spixr_reva.c b/Libraries/PeriphDrivers/Source/SPIXR/spixr_reva.c index 89a11fd14..a1a70393f 100644 --- a/Libraries/PeriphDrivers/Source/SPIXR/spixr_reva.c +++ b/Libraries/PeriphDrivers/Source/SPIXR/spixr_reva.c @@ -44,157 +44,157 @@ /****** Functions ******/ -int MXC_SPIXR_RevA_ReadRXFIFO (uint8_t* buf, int len) +int MXC_SPIXR_RevA_ReadRXFIFO(uint8_t* buf, int len) { int i; if (buf == NULL) { return E_NULL_PTR; } - - for (i=0; idata8[0]; } return E_NO_ERROR; } -int MXC_SPIXR_RevA_WriteTXFIFO (uint8_t* buf, int len) +int MXC_SPIXR_RevA_WriteTXFIFO(uint8_t* buf, int len) { int i; if (buf == NULL) { return E_NULL_PTR; } - - for (i=0; idata8[0] = buf[i]; } return E_NO_ERROR; } -void MXC_SPIXR_RevA_SetSS (int ssIdx) +void MXC_SPIXR_RevA_SetSS(int ssIdx) { MXC_SPIXR->ctrl1 |= (ssIdx << MXC_F_SPIXR_CTRL1_SS_POS); } -int MXC_SPIXR_RevA_GetSS (void) +int MXC_SPIXR_RevA_GetSS(void) { return (MXC_SPIXR->ctrl1 & MXC_F_SPIXR_CTRL1_SS) >> MXC_F_SPIXR_CTRL1_SS_POS; } -void MXC_SPIXR_RevA_SetSSCtrl (int stayActive) +void MXC_SPIXR_RevA_SetSSCtrl(int stayActive) { MXC_SPIXR->ctrl1 |= (stayActive << MXC_F_SPIXR_CTRL1_SS_CTRL_POS); } -int MXC_SPIXR_RevA_GetSSCtrl (void) +int MXC_SPIXR_RevA_GetSSCtrl(void) { return (MXC_SPIXR->ctrl1 & MXC_F_SPIXR_CTRL1_SS_CTRL) >> MXC_F_SPIXR_CTRL1_SS_CTRL_POS; } -void MXC_SPIXR_RevA_Enable (void) +void MXC_SPIXR_RevA_Enable(void) { MXC_SPIXR->ctrl1 |= MXC_F_SPIXR_CTRL1_SPIEN; MXC_SPIXR->ctrl1 |= MXC_F_SPIXR_CTRL1_MMEN; } -void MXC_SPIXR_RevA_Disable (void) +void MXC_SPIXR_RevA_Disable(void) { while (MXC_SPIXR_RevA_Busy()); MXC_SPIXR->ctrl1 &= ~MXC_F_SPIXR_CTRL1_SPIEN; - MXC_SPIXR->ctrl1 &= ~ (MXC_F_SPIXR_CTRL1_MMEN); + MXC_SPIXR->ctrl1 &= ~(MXC_F_SPIXR_CTRL1_MMEN); } -int MXC_SPIXR_RevA_IsEnabled (void) +int MXC_SPIXR_RevA_IsEnabled(void) { - return !! (MXC_SPIXR->ctrl1 & MXC_F_SPIXR_CTRL1_SPIEN); + return !!(MXC_SPIXR->ctrl1 & MXC_F_SPIXR_CTRL1_SPIEN); } -void MXC_SPIXR_RevA_ThreeWireModeEnable (void) +void MXC_SPIXR_RevA_ThreeWireModeEnable(void) { MXC_SPIXR->ctrl3 |= MXC_F_SPIXR_CTRL3_THREE_WIRE; } -void MXC_SPIXR_RevA_ThreeWireModeDisable (void) +void MXC_SPIXR_RevA_ThreeWireModeDisable(void) { while (MXC_SPIXR_RevA_Busy()); MXC_SPIXR->ctrl3 &= ~MXC_F_SPIXR_CTRL3_THREE_WIRE; } -int MXC_SPIXR_RevA_ThreeWireModeIsEnabled (void) +int MXC_SPIXR_RevA_ThreeWireModeIsEnabled(void) { - return !! (MXC_SPIXR->ctrl3 & MXC_F_SPIXR_CTRL3_THREE_WIRE); + return !!(MXC_SPIXR->ctrl3 & MXC_F_SPIXR_CTRL3_THREE_WIRE); } -int MXC_SPIXR_RevA_GetTXFIFOCount (void) +int MXC_SPIXR_RevA_GetTXFIFOCount(void) { return (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_FIFO_CNT) >> MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS; } -int MXC_SPIXR_RevA_GetRXFIFOCount (void) +int MXC_SPIXR_RevA_GetRXFIFOCount(void) { return (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_RX_FIFO_CNT) >> MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS; } -int MXC_SPIXR_RevA_SetWidth (mxc_spixr_width_t width) +int MXC_SPIXR_RevA_SetWidth(mxc_spixr_width_t width) { if (width == MXC_SPIXR_INVALID) { return E_BAD_PARAM; } - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_DATA_WIDTH, (width<ctrl3, MXC_F_SPIXR_CTRL3_DATA_WIDTH, (width << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS)); return E_NO_ERROR; } -int MXC_SPIXR_RevA_SetSPIMode (mxc_spixr_mode_t mode) +int MXC_SPIXR_RevA_SetSPIMode(mxc_spixr_mode_t mode) { if (mode <= MXC_SPIXR_MODE_3) { return E_BAD_PARAM; } if (mode == MXC_SPIXR_MODE_0 || mode == MXC_SPIXR_MODE_1) { - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_CPOL, (0<ctrl3, MXC_F_SPIXR_CTRL3_CPOL, (0 << MXC_F_SPIXR_CTRL3_CPOL_POS)); } else { - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_CPOL, (1<ctrl3, MXC_F_SPIXR_CTRL3_CPOL, (1 << MXC_F_SPIXR_CTRL3_CPOL_POS)); } if (mode == MXC_SPIXR_MODE_0 || mode == MXC_SPIXR_MODE_2) { - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_CPHA, (0<ctrl3, MXC_F_SPIXR_CTRL3_CPHA, (0 << MXC_F_SPIXR_CTRL3_CPHA_POS)); } else { - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_CPHA, (1<ctrl3, MXC_F_SPIXR_CTRL3_CPHA, (1 << MXC_F_SPIXR_CTRL3_CPHA_POS)); } return E_NO_ERROR; } -int MXC_SPIXR_RevA_SetSSPolarity (int active) +int MXC_SPIXR_RevA_SetSSPolarity(int active) { - MXC_SETFIELD (MXC_SPIXR->ctrl3,MXC_F_SPIXR_CTRL3_SSPOL, (active<ctrl3, MXC_F_SPIXR_CTRL3_SSPOL, (active << MXC_F_SPIXR_CTRL3_SSPOL_POS)); return E_NO_ERROR; } -void MXC_SPIXR_RevA_SetSSTiming (unsigned int ssIActDelay, unsigned int postActive, unsigned int preActive) +void MXC_SPIXR_RevA_SetSSTiming(unsigned int ssIActDelay, unsigned int postActive, unsigned int preActive) { - MXC_ASSERT (ssIActDelay > 0xFF || postActive > 0xFF || preActive > 0xFF); - MXC_SETFIELD (MXC_SPIXR->ss_time,MXC_F_SPIXR_SS_TIME_SSACT1, (preActive<ss_time,MXC_F_SPIXR_SS_TIME_SSACT2, (postActive<ss_time,MXC_F_SPIXR_SS_TIME_SSINACT, (ssIActDelay< 0xFF || postActive > 0xFF || preActive > 0xFF); + MXC_SETFIELD(MXC_SPIXR->ss_time, MXC_F_SPIXR_SS_TIME_SSACT1, (preActive << MXC_F_SPIXR_SS_TIME_SSACT1_POS)); + MXC_SETFIELD(MXC_SPIXR->ss_time, MXC_F_SPIXR_SS_TIME_SSACT2, (postActive << MXC_F_SPIXR_SS_TIME_SSACT2_POS)); + MXC_SETFIELD(MXC_SPIXR->ss_time, MXC_F_SPIXR_SS_TIME_SSINACT, (ssIActDelay << MXC_F_SPIXR_SS_TIME_SSINACT_POS)); } -int MXC_SPIXR_RevA_SetFrequency (int hz) +int MXC_SPIXR_RevA_SetFrequency(int hz) { int freq_div, hi_clk, lo_clk, scale; @@ -204,18 +204,18 @@ int MXC_SPIXR_RevA_SetFrequency (int hz) } // Set the clock high and low - freq_div = PeripheralClock/ (hz); - hi_clk = freq_div/2; - lo_clk = freq_div/2; + freq_div = PeripheralClock / (hz); + hi_clk = freq_div / 2; + lo_clk = freq_div / 2; scale = 0; - if (freq_div %2) { - hi_clk +=1; + if (freq_div % 2) { + hi_clk += 1; } while (hi_clk >= 16 && scale < 8) { hi_clk /= 2; - lo_clk /=2; + lo_clk /= 2; scale ++; } @@ -227,13 +227,13 @@ int MXC_SPIXR_RevA_SetFrequency (int hz) return MXC_SPIXR_GetFrequency(); } -int MXC_SPIXR_RevA_GetFrequency (void) +int MXC_SPIXR_RevA_GetFrequency(void) { int spixr_periph_clock, scale, hi, lo; - scale = ( (MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_SCALE) >> MXC_F_SPIXR_BRG_CTRL_SCALE_POS); - hi = ( (MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_HI) >> MXC_F_SPIXR_BRG_CTRL_HI_POS); - lo = ( (MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_LOW) >> MXC_F_SPIXR_BRG_CTRL_LOW_POS); + scale = ((MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_SCALE) >> MXC_F_SPIXR_BRG_CTRL_SCALE_POS); + hi = ((MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_HI) >> MXC_F_SPIXR_BRG_CTRL_HI_POS); + lo = ((MXC_SPIXR->brg_ctrl & MXC_F_SPIXR_BRG_CTRL_LOW) >> MXC_F_SPIXR_BRG_CTRL_LOW_POS); spixr_periph_clock = PeripheralClock / (1 << scale); @@ -248,187 +248,187 @@ int MXC_SPIXR_RevA_GetFrequency (void) return spixr_periph_clock / (hi + lo); } -int MXC_SPIXR_RevA_GetIntFlags (void) +int MXC_SPIXR_RevA_GetIntFlags(void) { return MXC_SPIXR->int_fl; } -void MXC_SPIXR_RevA_EnableInt (int flags) +void MXC_SPIXR_RevA_EnableInt(int flags) { - MXC_SETFIELD (MXC_SPIXR->int_en,flags,1); + MXC_SETFIELD(MXC_SPIXR->int_en, flags, 1); } -void MXC_SPIXR_RevA_DisableInt (int flags) +void MXC_SPIXR_RevA_DisableInt(int flags) { - MXC_SETFIELD (MXC_SPIXR->int_en,flags,0); + MXC_SETFIELD(MXC_SPIXR->int_en, flags, 0); } -int MXC_SPIXR_RevA_GetWakeUpFlags (void) +int MXC_SPIXR_RevA_GetWakeUpFlags(void) { return MXC_SPIXR->wake_fl; } -void MXC_SPIXR_RevA_EnableWakeUp (int flags) +void MXC_SPIXR_RevA_EnableWakeUp(int flags) { - MXC_SETFIELD (MXC_SPIXR->wake_en,flags,1); + MXC_SETFIELD(MXC_SPIXR->wake_en, flags, 1); } -void MXC_SPIXR_RevA_DisableWakeUp (int flags) +void MXC_SPIXR_RevA_DisableWakeUp(int flags) { - MXC_SETFIELD (MXC_SPIXR->wake_en,flags,0); + MXC_SETFIELD(MXC_SPIXR->wake_en, flags, 0); } -void MXC_SPIXR_RevA_ExMemEnable (void) +void MXC_SPIXR_RevA_ExMemEnable(void) { - MXC_SETFIELD (MXC_SPIXR->xmem_ctrl,MXC_F_SPIXR_XMEM_CTRL_XMEM_EN, (1<xmem_ctrl, MXC_F_SPIXR_XMEM_CTRL_XMEM_EN, (1 << MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS)); } -void MXC_SPIXR_RevA_ExMemDisable (void) +void MXC_SPIXR_RevA_ExMemDisable(void) { - MXC_SETFIELD (MXC_SPIXR->xmem_ctrl,MXC_F_SPIXR_XMEM_CTRL_XMEM_EN, (0<xmem_ctrl, MXC_F_SPIXR_XMEM_CTRL_XMEM_EN, (0 << MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS)); } -void MXC_SPIXR_RevA_ExMemUseDummy (int delay255) +void MXC_SPIXR_RevA_ExMemUseDummy(int delay255) { - MXC_SETFIELD (MXC_SPIXR->xmem_ctrl,MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK, (delay255<xmem_ctrl, MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK, (delay255 << MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK_POS)); } -void MXC_SPIXR_RevA_ExMemSetWriteCommand (uint8_t command) +void MXC_SPIXR_RevA_ExMemSetWriteCommand(uint8_t command) { - MXC_SETFIELD (MXC_SPIXR->xmem_ctrl,MXC_F_SPIXR_XMEM_CTRL_WR_CMD, (command<xmem_ctrl, MXC_F_SPIXR_XMEM_CTRL_WR_CMD, (command << MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS)); } -uint8_t MXC_SPIXR_RevA_ExMemGetWriteCommand (void) +uint8_t MXC_SPIXR_RevA_ExMemGetWriteCommand(void) { - return ( (MXC_SPIXR->xmem_ctrl & MXC_F_SPIXR_XMEM_CTRL_WR_CMD) >> MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS); + return ((MXC_SPIXR->xmem_ctrl & MXC_F_SPIXR_XMEM_CTRL_WR_CMD) >> MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS); } -void MXC_SPIXR_RevA_ExMemSetReadCommand (uint8_t command) +void MXC_SPIXR_RevA_ExMemSetReadCommand(uint8_t command) { - MXC_SETFIELD (MXC_SPIXR->xmem_ctrl,MXC_F_SPIXR_XMEM_CTRL_RD_CMD, (command<xmem_ctrl, MXC_F_SPIXR_XMEM_CTRL_RD_CMD, (command << MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS)); } -uint8_t MXC_SPIXR_RevA_ExMemGetReadCommand (void) +uint8_t MXC_SPIXR_RevA_ExMemGetReadCommand(void) { - return ( (MXC_SPIXR->xmem_ctrl & MXC_F_SPIXR_XMEM_CTRL_RD_CMD) >> MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS); + return ((MXC_SPIXR->xmem_ctrl & MXC_F_SPIXR_XMEM_CTRL_RD_CMD) >> MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS); } -int MXC_SPIXR_RevA_Busy (void) +int MXC_SPIXR_RevA_Busy(void) { return (MXC_SPIXR->stat == MXC_F_SPIXR_STAT_BUSY); } -int MXC_SPIXR_RevA_Init (mxc_spixr_cfg_t* cfg) +int MXC_SPIXR_RevA_Init(mxc_spixr_cfg_t* cfg) { - MXC_ASSERT (cfg); + MXC_ASSERT(cfg); MXC_SPIXR_Enable(); MXC_SPIXR->ctrl1 |= (1 << MXC_F_SPIXR_CTRL1_SS_POS); MXC_SPIXR->ctrl3 |= - ( (cfg->numbits) << MXC_F_SPIXR_CTRL3_NUMBITS_POS) | - ( (cfg->data_width) << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS); + ((cfg->numbits) << MXC_F_SPIXR_CTRL3_NUMBITS_POS) | + ((cfg->data_width) << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS); MXC_SPIXR->ss_time = - ( (cfg->ssel_act_1) << MXC_F_SPIXR_SS_TIME_SSACT1_POS) | - ( (cfg->ssel_act_2) << MXC_F_SPIXR_SS_TIME_SSACT2_POS) | - ( (cfg->ssel_inact) << MXC_F_SPIXR_SS_TIME_SSINACT_POS); + ((cfg->ssel_act_1) << MXC_F_SPIXR_SS_TIME_SSACT1_POS) | + ((cfg->ssel_act_2) << MXC_F_SPIXR_SS_TIME_SSACT2_POS) | + ((cfg->ssel_inact) << MXC_F_SPIXR_SS_TIME_SSINACT_POS); - MXC_SPIXR_SetFrequency (cfg->baud_freq); + MXC_SPIXR_SetFrequency(cfg->baud_freq); return E_NO_ERROR; } -int MXC_SPIXR_RevA_Shutdown (void) +int MXC_SPIXR_RevA_Shutdown(void) { return E_NO_ERROR; } -void MXC_SPIXR_RevA_SendCommand (uint8_t* cmd, uint32_t length, uint32_t tx_num_char) +void MXC_SPIXR_RevA_SendCommand(uint8_t* cmd, uint32_t length, uint32_t tx_num_char) { uint32_t i; - + MXC_SPIXR->ctrl2 = - ( (tx_num_char) << MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS) | (MXC_SPIXR->ctrl2 & + ((tx_num_char) << MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS) | (MXC_SPIXR->ctrl2 & MXC_F_SPIXR_CTRL2_RX_NUM_CHAR); while (MXC_SPIXR_RevA_Busy()); - for (i=0; idata8[0] = cmd[i]; } MXC_SPIXR->ctrl1 |= MXC_F_SPIXR_CTRL1_TX_START; /* Send command to RAM */ - while (! (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_FIFO_CNT)); /* Wait for TXFIFO cnt to reach 0*/ + while (!(MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_FIFO_CNT)); /* Wait for TXFIFO cnt to reach 0*/ } -void MXC_SPIXR_RevA_TXFIFOEnable (void) +void MXC_SPIXR_RevA_TXFIFOEnable(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_TX_FIFO_EN; } -void MXC_SPIXR_RevA_TXFIFODisable (void) +void MXC_SPIXR_RevA_TXFIFODisable(void) { - MXC_SPIXR->dma &= ~ (MXC_F_SPIXR_DMA_TX_FIFO_EN); + MXC_SPIXR->dma &= ~(MXC_F_SPIXR_DMA_TX_FIFO_EN); } -int MXC_SPIXR_RevA_TXFIFOIsEnabled (void) +int MXC_SPIXR_RevA_TXFIFOIsEnabled(void) { - return !! (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_FIFO_EN); + return !!(MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_FIFO_EN); } -void MXC_SPIXR_RevA_DmaTXFIFOEnable (void) +void MXC_SPIXR_RevA_DmaTXFIFOEnable(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_TX_DMA_EN; } -void MXC_SPIXR_RevA_DmaTXFIFODisable (void) +void MXC_SPIXR_RevA_DmaTXFIFODisable(void) { - MXC_SPIXR->dma &= ~ (MXC_F_SPIXR_DMA_TX_DMA_EN); + MXC_SPIXR->dma &= ~(MXC_F_SPIXR_DMA_TX_DMA_EN); } -int MXC_SPIXR_RevA_DmaTXFIFOIsEnabled (void) +int MXC_SPIXR_RevA_DmaTXFIFOIsEnabled(void) { - return !! (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_DMA_EN); + return !!(MXC_SPIXR->dma & MXC_F_SPIXR_DMA_TX_DMA_EN); } -void MXC_SPIXR_RevA_RXFIFOEnable (void) +void MXC_SPIXR_RevA_RXFIFOEnable(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_RX_FIFO_EN; } -void MXC_SPIXR_RevA_RXFIFODisable (void) +void MXC_SPIXR_RevA_RXFIFODisable(void) { - MXC_SPIXR->dma &= ~ (MXC_F_SPIXR_DMA_RX_FIFO_EN); + MXC_SPIXR->dma &= ~(MXC_F_SPIXR_DMA_RX_FIFO_EN); } -int MXC_SPIXR_RevA_RXFIFOIsEnabled (void) +int MXC_SPIXR_RevA_RXFIFOIsEnabled(void) { - return !! (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_RX_FIFO_EN); + return !!(MXC_SPIXR->dma & MXC_F_SPIXR_DMA_RX_FIFO_EN); } -void MXC_SPIXR_RevA_DmaRXFIFOEnable (void) +void MXC_SPIXR_RevA_DmaRXFIFOEnable(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_RX_DMA_EN; } -void MXC_SPIXR_RevA_DmaRXFIFODisable (void) +void MXC_SPIXR_RevA_DmaRXFIFODisable(void) { - MXC_SPIXR->dma &= ~ (MXC_F_SPIXR_DMA_RX_DMA_EN); + MXC_SPIXR->dma &= ~(MXC_F_SPIXR_DMA_RX_DMA_EN); } -int MXC_SPIXR_RevA_DmaRXFIFOIsEnabled (void) +int MXC_SPIXR_RevA_DmaRXFIFOIsEnabled(void) { - return !! (MXC_SPIXR->dma & MXC_F_SPIXR_DMA_RX_DMA_EN); + return !!(MXC_SPIXR->dma & MXC_F_SPIXR_DMA_RX_DMA_EN); } -void MXC_SPIXR_RevA_TXFIFOClear (void) +void MXC_SPIXR_RevA_TXFIFOClear(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_TX_FIFO_CLEAR; } -void MXC_SPIXR_RevA_RXFIFOClear (void) +void MXC_SPIXR_RevA_RXFIFOClear(void) { MXC_SPIXR->dma |= MXC_F_SPIXR_DMA_RX_FIFO_CLEAR; } diff --git a/Libraries/PeriphDrivers/Source/SRCC/srcc_reva.c b/Libraries/PeriphDrivers/Source/SRCC/srcc_reva.c index b1d607cca..f46f7ecab 100644 --- a/Libraries/PeriphDrivers/Source/SRCC/srcc_reva.c +++ b/Libraries/PeriphDrivers/Source/SRCC/srcc_reva.c @@ -35,25 +35,25 @@ #include"srcc_reva.h" -uint32_t MXC_SRCC_RevA_ID (mxc_srcc_cache_id_t id) +uint32_t MXC_SRCC_RevA_ID(mxc_srcc_cache_id_t id) { switch (id) { case SRCC_CACHE_ID_RELNUM: - return ( ( (MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_RELNUM)) >> MXC_F_SRCC_CACHE_ID_RELNUM_POS; + return (((MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_RELNUM)) >> MXC_F_SRCC_CACHE_ID_RELNUM_POS; case SRCC_CACHE_ID_PARTNUM: - return ( ( (MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_PARTNUM)) >> MXC_F_SRCC_CACHE_ID_PARTNUM_POS; + return (((MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_PARTNUM)) >> MXC_F_SRCC_CACHE_ID_PARTNUM_POS; case SRCC_CACHE_ID_CCHID: default: - return ( ( (MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_CCHID)) >> MXC_F_SRCC_CACHE_ID_CCHID_POS; + return (((MXC_SRCC->cache_id) & MXC_F_SRCC_CACHE_ID_CCHID)) >> MXC_F_SRCC_CACHE_ID_CCHID_POS; } } uint32_t MXC_SRCC_RevA_CacheSize() { - return ( ( (MXC_SRCC->memcfg) & MXC_F_SRCC_MEMCFG_CCHSZ)) >> MXC_F_SRCC_MEMCFG_CCHSZ_POS; + return (((MXC_SRCC->memcfg) & MXC_F_SRCC_MEMCFG_CCHSZ)) >> MXC_F_SRCC_MEMCFG_CCHSZ_POS; } uint32_t MXC_SRCC_RevA_MemSize() diff --git a/Libraries/PeriphDrivers/Source/SYS/mxc_assert.c b/Libraries/PeriphDrivers/Source/SYS/mxc_assert.c index e5c405110..20c2ddb83 100644 --- a/Libraries/PeriphDrivers/Source/SYS/mxc_assert.c +++ b/Libraries/PeriphDrivers/Source/SYS/mxc_assert.c @@ -44,7 +44,7 @@ /* **** Functions **** */ /* ************************************************************************** */ -__weak void mxc_assert (const char *expr, const char *file, int line) +__weak void mxc_assert(const char* expr, const char* file, int line) { while (1) {} } diff --git a/Libraries/PeriphDrivers/Source/SYS/mxc_lock.c b/Libraries/PeriphDrivers/Source/SYS/mxc_lock.c index ce7acbfcf..c91691785 100644 --- a/Libraries/PeriphDrivers/Source/SYS/mxc_lock.c +++ b/Libraries/PeriphDrivers/Source/SYS/mxc_lock.c @@ -40,18 +40,18 @@ #ifndef __riscv /* ************************************************************************** */ -int MXC_GetLock (uint32_t *lock, uint32_t value) +int MXC_GetLock(uint32_t* lock, uint32_t value) { do { // Return if the lock is taken by a different thread - if (__LDREXW ( (volatile unsigned long *) lock) != 0) { + if (__LDREXW((volatile unsigned long*) lock) != 0) { return E_BUSY; } // Attempt to take the lock } - while (__STREXW (value, (volatile unsigned long *) lock) != 0); + while (__STREXW(value, (volatile unsigned long*) lock) != 0); // Do not start any other memory access until memory barrier is complete __DMB(); @@ -60,7 +60,7 @@ int MXC_GetLock (uint32_t *lock, uint32_t value) } /* ************************************************************************** */ -void MXC_FreeLock (uint32_t *lock) +void MXC_FreeLock(uint32_t* lock) { // Ensure memory operations complete before releasing lock __DMB(); diff --git a/Libraries/PeriphDrivers/Source/SYS/nvic_table.c b/Libraries/PeriphDrivers/Source/SYS/nvic_table.c index 2d85b45ee..8ed0d99de 100644 --- a/Libraries/PeriphDrivers/Source/SYS/nvic_table.c +++ b/Libraries/PeriphDrivers/Source/SYS/nvic_table.c @@ -44,24 +44,24 @@ #if defined ( __ICCARM__ ) #pragma data_alignment = 512 #else -__attribute__ ( (aligned (512))) +__attribute__((aligned(512))) #endif -static void (*ramVectorTable[MXC_IRQ_COUNT]) (void); +static void (*ramVectorTable[MXC_IRQ_COUNT])(void); -void NVIC_SetRAM (void) +void NVIC_SetRAM(void) { #if defined (__ICCARM__) - extern void (* const __isr_vector[]) (void); + extern void (* const __isr_vector[])(void); #else /* should be defined in starup_.S */ extern uint32_t __isr_vector[MXC_IRQ_COUNT]; #endif - memcpy (&ramVectorTable, &__isr_vector, sizeof (ramVectorTable)); + memcpy(&ramVectorTable, &__isr_vector, sizeof(ramVectorTable)); SCB->VTOR = (uint32_t) &ramVectorTable; } -void NVIC_SetVector (IRQn_Type irqn, void (*irq_handler) (void)) +void NVIC_SetVector(IRQn_Type irqn, void (*irq_handler)(void)) { int index = irqn + 16; /* offset for externals */ @@ -71,13 +71,13 @@ void NVIC_SetVector (IRQn_Type irqn, void (*irq_handler) (void)) } ramVectorTable[index] = irq_handler; - NVIC_EnableIRQ (irqn); + NVIC_EnableIRQ(irqn); } -uint32_t NVIC_GetVector (IRQn_Type irqn) +uint32_t NVIC_GetVector(IRQn_Type irqn) { - uint32_t *vectors = (uint32_t *) SCB->VTOR; - return vectors[ (int32_t) irqn + NVIC_USER_IRQ_OFFSET]; + uint32_t* vectors = (uint32_t*) SCB->VTOR; + return vectors[(int32_t) irqn + NVIC_USER_IRQ_OFFSET]; } #endif // !__riscv diff --git a/Libraries/PeriphDrivers/Source/TMR/tmr_common.c b/Libraries/PeriphDrivers/Source/TMR/tmr_common.c index 10e27723e..1b343062a 100644 --- a/Libraries/PeriphDrivers/Source/TMR/tmr_common.c +++ b/Libraries/PeriphDrivers/Source/TMR/tmr_common.c @@ -39,46 +39,46 @@ /* **** Functions **** */ -void MXC_TMR_Common_Delay (mxc_tmr_regs_t *tmr, unsigned long us) +void MXC_TMR_Common_Delay(mxc_tmr_regs_t* tmr, unsigned long us) { // Return immediately if delay is 0 if (!us) { return; } - MXC_TMR_TO_Start (tmr, us); + MXC_TMR_TO_Start(tmr, us); - while (MXC_TMR_TO_Check (tmr) != E_TIME_OUT) {} + while (MXC_TMR_TO_Check(tmr) != E_TIME_OUT) {} } -int MXC_TMR_Common_TO_Check (mxc_tmr_regs_t *tmr) +int MXC_TMR_Common_TO_Check(mxc_tmr_regs_t* tmr) { - if (MXC_TMR_GetFlags (tmr)) { + if (MXC_TMR_GetFlags(tmr)) { return E_TIME_OUT; } return E_NO_ERROR; } -void MXC_TMR_Common_TO_Stop (mxc_tmr_regs_t *tmr) +void MXC_TMR_Common_TO_Stop(mxc_tmr_regs_t* tmr) { - MXC_TMR_Stop (tmr); - MXC_TMR_SetCount (tmr, 0x0); + MXC_TMR_Stop(tmr); + MXC_TMR_SetCount(tmr, 0x0); } -void MXC_TMR_Common_TO_Clear (mxc_tmr_regs_t *tmr) +void MXC_TMR_Common_TO_Clear(mxc_tmr_regs_t* tmr) { - MXC_TMR_ClearFlags (tmr); - MXC_TMR_SetCount (tmr, 0x0); + MXC_TMR_ClearFlags(tmr); + MXC_TMR_SetCount(tmr, 0x0); } -unsigned int MXC_TMR_Common_TO_Remaining (mxc_tmr_regs_t *tmr) +unsigned int MXC_TMR_Common_TO_Remaining(mxc_tmr_regs_t* tmr) { uint32_t remaining_ticks, remaining_time; mxc_tmr_unit_t units; - remaining_ticks = MXC_TMR_GetCompare (tmr) - MXC_TMR_GetCount (tmr); - MXC_TMR_GetTime (tmr, remaining_ticks, &remaining_time, &units); + remaining_ticks = MXC_TMR_GetCompare(tmr) - MXC_TMR_GetCount(tmr); + MXC_TMR_GetTime(tmr, remaining_ticks, &remaining_time, &units); switch (units) { case TMR_UNIT_NANOSEC: @@ -96,23 +96,23 @@ unsigned int MXC_TMR_Common_TO_Remaining (mxc_tmr_regs_t *tmr) } } -void MXC_TMR_Common_SW_Start (mxc_tmr_regs_t *tmr) +void MXC_TMR_Common_SW_Start(mxc_tmr_regs_t* tmr) { - MXC_TMR_TO_Start (tmr, 0xFFFFFFFF); + MXC_TMR_TO_Start(tmr, 0xFFFFFFFF); } -unsigned int MXC_TMR_Common_SW_Stop (mxc_tmr_regs_t *tmr) +unsigned int MXC_TMR_Common_SW_Stop(mxc_tmr_regs_t* tmr) { - unsigned int elapsed = MXC_TMR_TO_Elapsed (tmr); - MXC_TMR_TO_Stop (tmr); + unsigned int elapsed = MXC_TMR_TO_Elapsed(tmr); + MXC_TMR_TO_Stop(tmr); return elapsed; } -unsigned int MXC_TMR_Common_TO_Elapsed (mxc_tmr_regs_t *tmr) +unsigned int MXC_TMR_Common_TO_Elapsed(mxc_tmr_regs_t* tmr) { uint32_t elapsed; mxc_tmr_unit_t units; - MXC_TMR_GetTime (tmr, MXC_TMR_GetCount (tmr), &elapsed, &units); + MXC_TMR_GetTime(tmr, MXC_TMR_GetCount(tmr), &elapsed, &units); switch (units) { case TMR_UNIT_NANOSEC: diff --git a/Libraries/PeriphDrivers/Source/TMR/tmr_reva.c b/Libraries/PeriphDrivers/Source/TMR/tmr_reva.c index 5b6d59d38..d9d4c13e0 100644 --- a/Libraries/PeriphDrivers/Source/TMR/tmr_reva.c +++ b/Libraries/PeriphDrivers/Source/TMR/tmr_reva.c @@ -41,7 +41,7 @@ #include "mxc_lock.h" /* **** Functions **** */ -void MXC_TMR_RevA_Init (mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t* cfg) +void MXC_TMR_RevA_Init(mxc_tmr_regs_t* tmr, mxc_tmr_cfg_t* cfg) { // Clear interrupt flag tmr->intr = MXC_F_TMR_INTR_IRQ; @@ -131,28 +131,28 @@ void MXC_TMR_RevA_Init (mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t* cfg) } } -void MXC_TMR_RevA_Shutdown (mxc_tmr_regs_t *tmr) +void MXC_TMR_RevA_Shutdown(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); // Disable timer and clear settings tmr->cn = 0; } -void MXC_TMR_RevA_Start (mxc_tmr_regs_t* tmr) +void MXC_TMR_RevA_Start(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); tmr->cn |= MXC_F_TMR_CN_TEN; } -void MXC_TMR_RevA_Stop (mxc_tmr_regs_t* tmr) +void MXC_TMR_RevA_Stop(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); tmr->cn &= ~MXC_F_TMR_CN_TEN; } -int MXC_TMR_RevA_SetPWM (mxc_tmr_regs_t* tmr, uint32_t pwm) +int MXC_TMR_RevA_SetPWM(mxc_tmr_regs_t* tmr, uint32_t pwm) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); if (pwm > (tmr->cmp)) { return E_BAD_PARAM; @@ -163,49 +163,49 @@ int MXC_TMR_RevA_SetPWM (mxc_tmr_regs_t* tmr, uint32_t pwm) return E_NO_ERROR; } -uint32_t MXC_TMR_RevA_GetCompare (mxc_tmr_regs_t* tmr) +uint32_t MXC_TMR_RevA_GetCompare(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); return tmr->cmp; } -uint32_t MXC_TMR_RevA_GetCapture (mxc_tmr_regs_t* tmr) +uint32_t MXC_TMR_RevA_GetCapture(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); return tmr->pwm;//check this } -uint32_t MXC_TMR_RevA_GetCount (mxc_tmr_regs_t* tmr) +uint32_t MXC_TMR_RevA_GetCount(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); return tmr->cnt; } -void MXC_TMR_RevA_ClearFlags (mxc_tmr_regs_t* tmr) +void MXC_TMR_RevA_ClearFlags(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); tmr->intr = MXC_F_TMR_INTR_IRQ; } -uint32_t MXC_TMR_RevA_GetFlags (mxc_tmr_regs_t* tmr) +uint32_t MXC_TMR_RevA_GetFlags(mxc_tmr_regs_t* tmr) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); return tmr->intr; } -void MXC_TMR_RevA_SetCompare (mxc_tmr_regs_t *tmr, uint32_t cmp_cnt) +void MXC_TMR_RevA_SetCompare(mxc_tmr_regs_t* tmr, uint32_t cmp_cnt) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); tmr->cmp = cmp_cnt; } -void MXC_TMR_RevA_SetCount (mxc_tmr_regs_t *tmr, uint32_t cnt) +void MXC_TMR_RevA_SetCount(mxc_tmr_regs_t* tmr, uint32_t cnt) { - MXC_ASSERT (MXC_TMR_GET_IDX (tmr) >= 0); + MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0); tmr->cnt = cnt; } -void MXC_TMR_RevA_TO_Start (mxc_tmr_regs_t *tmr, unsigned long us) +void MXC_TMR_RevA_TO_Start(mxc_tmr_regs_t* tmr, unsigned long us) { uint64_t ticks; int clk_shift = 0; @@ -226,22 +226,22 @@ void MXC_TMR_RevA_TO_Start (mxc_tmr_regs_t *tmr, unsigned long us) cfg.cmp_cnt = ticks; cfg.pol = 0; - MXC_TMR_Stop (tmr); - MXC_TMR_Init (tmr, &cfg); - MXC_TMR_ClearFlags (tmr); - MXC_TMR_Start (tmr); + MXC_TMR_Stop(tmr); + MXC_TMR_Init(tmr, &cfg); + MXC_TMR_ClearFlags(tmr); + MXC_TMR_Start(tmr); } -int MXC_TMR_RevA_GetTime (mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units) +int MXC_TMR_RevA_GetTime(mxc_tmr_regs_t* tmr, uint32_t ticks, uint32_t* time, mxc_tmr_unit_t* units) { uint64_t temp_time = 0; uint32_t timerClock = PeripheralClock; - uint32_t prescale = ( (tmr->cn & MXC_F_TMR_CN_PRES) >> MXC_F_TMR_CN_PRES_POS) - | ( ( (tmr->cn & MXC_F_TMR_CN_PRES3) >> (MXC_F_TMR_CN_PRES3_POS)) <<3); + uint32_t prescale = ((tmr->cn & MXC_F_TMR_CN_PRES) >> MXC_F_TMR_CN_PRES_POS) + | (((tmr->cn & MXC_F_TMR_CN_PRES3) >> (MXC_F_TMR_CN_PRES3_POS)) << 3); temp_time = (uint64_t) ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000000); - if (! (temp_time & 0xffffffff00000000)) { + if (!(temp_time & 0xffffffff00000000)) { *time = temp_time; *units = TMR_UNIT_NANOSEC; return E_NO_ERROR; @@ -249,7 +249,7 @@ int MXC_TMR_RevA_GetTime (mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, m temp_time = (uint64_t) ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000); - if (! (temp_time & 0xffffffff00000000)) { + if (!(temp_time & 0xffffffff00000000)) { *time = temp_time; *units = TMR_UNIT_MICROSEC; return E_NO_ERROR; @@ -257,7 +257,7 @@ int MXC_TMR_RevA_GetTime (mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, m temp_time = (uint64_t) ticks * 1000 * (1 << (prescale & 0xF)) / timerClock; - if (! (temp_time & 0xffffffff00000000)) { + if (!(temp_time & 0xffffffff00000000)) { *time = temp_time; *units = TMR_UNIT_MILLISEC; return E_NO_ERROR; @@ -265,7 +265,7 @@ int MXC_TMR_RevA_GetTime (mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, m temp_time = (uint64_t) ticks * (1 << (prescale & 0xF)) / timerClock; - if (! (temp_time & 0xffffffff00000000)) { + if (!(temp_time & 0xffffffff00000000)) { *time = temp_time; *units = TMR_UNIT_SEC; return E_NO_ERROR; diff --git a/Libraries/PeriphDrivers/Source/TRNG/trng_revb.c b/Libraries/PeriphDrivers/Source/TRNG/trng_revb.c index 361a7183a..6d5116d1b 100644 --- a/Libraries/PeriphDrivers/Source/TRNG/trng_revb.c +++ b/Libraries/PeriphDrivers/Source/TRNG/trng_revb.c @@ -55,45 +55,50 @@ static uint8_t* TRNG_data; /* Global Control/Configuration functions */ /* ************************************************************************* */ -int MXC_TRNG_RevB_Init (void) +int MXC_TRNG_RevB_Init(void) { return E_NO_ERROR; } -void MXC_TRNG_RevB_IntEnable () +void MXC_TRNG_RevB_EnableInt() { MXC_TRNG->ctrl |= MXC_F_TRNG_CTRL_RND_IE; } -int MXC_TRNG_RevB_Shutdown (void) +void MXC_TRNG_RevB_DisableInt() +{ + MXC_TRNG->ctrl &= ~ MXC_F_TRNG_CTRL_RND_IE; +} + +int MXC_TRNG_RevB_Shutdown(void) { return E_NO_ERROR; } -void MXC_TRNG_RevB_Handler (void) +void MXC_TRNG_RevB_Handler(void) { uint32_t temp; mxc_trng_complete_t cb; // if this is last block, disable interrupt before reading MXC_TRNG->data - if (TRNG_maxLength <= TRNG_count+4) { + if (TRNG_maxLength <= TRNG_count + 4) { MXC_TRNG->ctrl &= ~MXC_F_TRNG_CTRL_RND_IE; } temp = MXC_TRNG->data; - if ( (TRNG_count+3) < TRNG_maxLength) { - memcpy (& (TRNG_data[TRNG_count]), (uint8_t*) (&temp), 4); + if ((TRNG_count + 3) < TRNG_maxLength) { + memcpy(& (TRNG_data[TRNG_count]), (uint8_t*)(&temp), 4); TRNG_count += 4; } else { - memcpy (& (TRNG_data[TRNG_count]), (uint8_t*) (&temp), TRNG_maxLength & 0x03); + memcpy(& (TRNG_data[TRNG_count]), (uint8_t*)(&temp), TRNG_maxLength & 0x03); TRNG_count += (TRNG_maxLength & 0x03); } if (TRNG_maxLength == TRNG_count) { cb = MXC_TRNG_Callback; - cb (0, 0); + cb(0, 0); } } @@ -101,14 +106,14 @@ void MXC_TRNG_RevB_Handler (void) /* True Random Number Generator (TRNG) functions */ /* ************************************************************************* */ -int MXC_TRNG_RevB_RandomInt (void) +int MXC_TRNG_RevB_RandomInt(void) { - while (! (MXC_TRNG->status & MXC_F_TRNG_STATUS_RDY)); + while (!(MXC_TRNG->status & MXC_F_TRNG_STATUS_RDY)); return (int) MXC_TRNG->data; } -int MXC_TRNG_RevB_Random (uint8_t* data, uint32_t len) +int MXC_TRNG_RevB_Random(uint8_t* data, uint32_t len) { unsigned int i, temp; @@ -116,27 +121,27 @@ int MXC_TRNG_RevB_Random (uint8_t* data, uint32_t len) return E_NULL_PTR; } - for (i = 0; i+3 < len; i+=4) { + for (i = 0; i + 3 < len; i += 4) { temp = MXC_TRNG_RandomInt(); - memcpy (& (data[i]), (uint8_t*) (&temp), 4); + memcpy(& (data[i]), (uint8_t*)(&temp), 4); } if (len & 0x03) { temp = MXC_TRNG_RandomInt(); - memcpy (& (data[i]), (uint8_t*) (&temp), len & 0x03); + memcpy(& (data[i]), (uint8_t*)(&temp), len & 0x03); } return E_NO_ERROR; } -void MXC_TRNG_RevB_RandomAsync (uint8_t* data, uint32_t len, mxc_trng_complete_t callback) +void MXC_TRNG_RevB_RandomAsync(uint8_t* data, uint32_t len, mxc_trng_complete_t callback) { - MXC_ASSERT (data && callback); + MXC_ASSERT(data && callback); if (len == 0) { return; } - + TRNG_data = data; TRNG_count = 0; TRNG_maxLength = len; diff --git a/Libraries/PeriphDrivers/Source/TRNG/trng_revb.h b/Libraries/PeriphDrivers/Source/TRNG/trng_revb.h index 1b2dda296..a1f4fe142 100644 --- a/Libraries/PeriphDrivers/Source/TRNG/trng_revb.h +++ b/Libraries/PeriphDrivers/Source/TRNG/trng_revb.h @@ -38,7 +38,8 @@ /* ************************************************************************* */ int MXC_TRNG_RevB_Init(void); -void MXC_TRNG_RevB_IntEnable(); +void MXC_TRNG_RevB_EnableInt(); +void MXC_TRNG_RevB_DisableInt(); int MXC_TRNG_RevB_Shutdown(void); void MXC_TRNG_RevB_Handler(void); int MXC_TRNG_RevB_RandomInt(void); diff --git a/Libraries/PeriphDrivers/Source/UART/uart_common.c b/Libraries/PeriphDrivers/Source/UART/uart_common.c index 4e833bba9..6a56d8a2a 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_common.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_common.c @@ -34,20 +34,20 @@ #include "uart_common.h" #include "uart.h" -int MXC_UART_Common_ReadCharacter (mxc_uart_regs_t* uart) +int MXC_UART_Common_ReadCharacter(mxc_uart_regs_t* uart) { // Wait until FIFO has a character ready. - while (MXC_UART_GetRXFIFOAvailable (uart) < 1); + while (MXC_UART_GetRXFIFOAvailable(uart) < 1); // Read the character using the non-blocking function. - return MXC_UART_ReadCharacterRaw (uart); + return MXC_UART_ReadCharacterRaw(uart); } -int MXC_UART_Common_WriteCharacter (mxc_uart_regs_t* uart, uint8_t character) +int MXC_UART_Common_WriteCharacter(mxc_uart_regs_t* uart, uint8_t character) { // Wait until FIFO has space for the character. - while (MXC_UART_GetTXFIFOAvailable (uart) < 1); + while (MXC_UART_GetTXFIFOAvailable(uart) < 1); // Write the character using the non-blocking function. - return MXC_UART_WriteCharacterRaw (uart, character); + return MXC_UART_WriteCharacterRaw(uart, character); } diff --git a/Libraries/PeriphDrivers/Source/UART/uart_reva.c b/Libraries/PeriphDrivers/Source/UART/uart_reva.c index e906bcd9e..af73ee1b3 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_reva.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_reva.c @@ -52,7 +52,7 @@ static int baudRate; // Structure to save DMA state typedef struct { - mxc_uart_req_t *req; + mxc_uart_req_t* req; int channelTx; int channelRx; } uart_req_state_t; @@ -64,42 +64,42 @@ uart_req_state_t states[MXC_UART_INSTANCES]; /* ************************************************************************* */ /* Control/Configuration functions */ /* ************************************************************************* */ -int MXC_UART_RevA_Init (mxc_uart_regs_t* uart, unsigned int baud) +int MXC_UART_RevA_Init(mxc_uart_regs_t* uart, unsigned int baud) { // Initialize UART - MXC_UART_SetRXThreshold (uart, 1); // Set RX threshold to 1 byte - MXC_UART_SetTXThreshold (uart, 2); // Set TX threshold to 2 byte + MXC_UART_SetRXThreshold(uart, 1); // Set RX threshold to 1 byte + MXC_UART_SetTXThreshold(uart, 2); // Set TX threshold to 2 byte - MXC_UART_SetDataSize (uart, 8); // Set Datasize to 8 bits + MXC_UART_SetDataSize(uart, 8); // Set Datasize to 8 bits - MXC_UART_SetParity (uart, MXC_UART_PARITY_DISABLE); - MXC_UART_SetStopBits (uart, MXC_UART_STOP_1); + MXC_UART_SetParity(uart, MXC_UART_PARITY_DISABLE); + MXC_UART_SetStopBits(uart, MXC_UART_STOP_1); uart->ctrl |= MXC_F_UART_CTRL_ENABLE; - return MXC_UART_SetFrequency (uart, baud); + return MXC_UART_SetFrequency(uart, baud); } -int MXC_UART_RevA_ReadyForSleep (mxc_uart_regs_t* uart) +int MXC_UART_RevA_ReadyForSleep(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - if (AsyncRequests[MXC_UART_GET_IDX (uart)] != NULL) { + if (AsyncRequests[MXC_UART_GET_IDX(uart)] != NULL) { return E_BUSY; } - return MXC_UART_GetActive (uart); + return MXC_UART_GetActive(uart); } -int MXC_UART_RevA_SetFrequency (mxc_uart_regs_t* uart, unsigned int baud) +int MXC_UART_RevA_SetFrequency(mxc_uart_regs_t* uart, unsigned int baud) { float uartDiv; int periphClock; int prescale; int decimalDiv; - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -110,11 +110,11 @@ int MXC_UART_RevA_SetFrequency (mxc_uart_regs_t* uart, unsigned int baud) periphClock = PeripheralClock; } - uartDiv = (float) periphClock/baud; + uartDiv = (float) periphClock / baud; // Find the largest value of prescale that keeps div > 1 for (prescale = 8; prescale < 128; prescale = prescale << 1) { - if (uartDiv/ (float) prescale < 1) { + if (uartDiv / (float) prescale < 1) { prescale = prescale >> 1; break; } @@ -125,7 +125,7 @@ int MXC_UART_RevA_SetFrequency (mxc_uart_regs_t* uart, unsigned int baud) } uartDiv /= prescale; - decimalDiv = (int) ( (uartDiv- (int) uartDiv) *prescale); + decimalDiv = (int)((uartDiv - (int) uartDiv) * prescale); // Work around for Jira Bug: ME10-650 if (decimalDiv > 3) { @@ -164,14 +164,14 @@ int MXC_UART_RevA_SetFrequency (mxc_uart_regs_t* uart, unsigned int baud) prescale <<= MXC_F_UART_BAUD0_FACTOR_POS; decimalDiv <<= MXC_F_UART_BAUD1_DBAUD_POS; - MXC_SETFIELD (uart->baud0, MXC_F_UART_BAUD0_FACTOR, prescale); - MXC_SETFIELD (uart->baud0, MXC_F_UART_BAUD0_IBAUD, ( ( (int) uartDiv) << MXC_F_UART_BAUD0_IBAUD_POS)); - MXC_SETFIELD (uart->baud1, MXC_F_UART_BAUD1_DBAUD, decimalDiv); + MXC_SETFIELD(uart->baud0, MXC_F_UART_BAUD0_FACTOR, prescale); + MXC_SETFIELD(uart->baud0, MXC_F_UART_BAUD0_IBAUD, (((int) uartDiv) << MXC_F_UART_BAUD0_IBAUD_POS)); + MXC_SETFIELD(uart->baud1, MXC_F_UART_BAUD1_DBAUD, decimalDiv); - return MXC_UART_GetFrequency (uart); + return MXC_UART_GetFrequency(uart); } -int MXC_UART_RevA_GetFrequency (mxc_uart_regs_t* uart) +int MXC_UART_RevA_GetFrequency(mxc_uart_regs_t* uart) { int periphClock = 0; float uartDiv = 0; @@ -184,15 +184,15 @@ int MXC_UART_RevA_GetFrequency (mxc_uart_regs_t* uart) } uartDiv += uart->baud0 & MXC_F_UART_BAUD0_IBAUD; - uartDiv += (uart->baud1 & MXC_F_UART_BAUD1_DBAUD) /20.0; - uartDiv *= (1 << (7- (uart->baud0 & MXC_F_UART_BAUD0_FACTOR))); + uartDiv += (uart->baud1 & MXC_F_UART_BAUD1_DBAUD) / 20.0; + uartDiv *= (1 << (7 - (uart->baud0 & MXC_F_UART_BAUD0_FACTOR))); - return (int) ( (float) periphClock/uartDiv); + return (int)((float) periphClock / uartDiv); } -int MXC_UART_RevA_SetDataSize (mxc_uart_regs_t* uart, int dataSize) +int MXC_UART_RevA_SetDataSize(mxc_uart_regs_t* uart, int dataSize) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -200,26 +200,26 @@ int MXC_UART_RevA_SetDataSize (mxc_uart_regs_t* uart, int dataSize) return E_BAD_PARAM; } - dataSize = (dataSize-5) << MXC_F_UART_CTRL_CHAR_SIZE_POS; + dataSize = (dataSize - 5) << MXC_F_UART_CTRL_CHAR_SIZE_POS; - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_CHAR_SIZE, dataSize); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_CHAR_SIZE, dataSize); return E_NO_ERROR; } -int MXC_UART_RevA_SetStopBits (mxc_uart_regs_t* uart, mxc_uart_stop_t stopBits) +int MXC_UART_RevA_SetStopBits(mxc_uart_regs_t* uart, mxc_uart_stop_t stopBits) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } switch (stopBits) { case MXC_UART_STOP_1: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_STOPBITS, 0 << MXC_F_UART_CTRL_STOPBITS_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_STOPBITS, 0 << MXC_F_UART_CTRL_STOPBITS_POS); break; case MXC_UART_STOP_2: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_STOPBITS, 1 << MXC_F_UART_CTRL_STOPBITS_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_STOPBITS, 1 << MXC_F_UART_CTRL_STOPBITS_POS); break; default: @@ -230,67 +230,67 @@ int MXC_UART_RevA_SetStopBits (mxc_uart_regs_t* uart, mxc_uart_stop_t stopBits) return E_NO_ERROR; } -int MXC_UART_RevA_SetParity (mxc_uart_regs_t* uart, mxc_uart_parity_t parity) +int MXC_UART_RevA_SetParity(mxc_uart_regs_t* uart, mxc_uart_parity_t parity) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } switch (parity) { case MXC_UART_PARITY_DISABLE: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 0 << MXC_F_UART_CTRL_PARITY_EN_POS ); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 0 << MXC_F_UART_CTRL_PARITY_EN_POS); break; case MXC_UART_PARITY_EVEN: case MXC_UART_PARITY_EVEN_0: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_EVEN); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_EVEN); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_EVEN_1: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_EVEN); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_EVEN); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_ODD: case MXC_UART_PARITY_ODD_0: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_ODD); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_ODD); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_ODD_1: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_ODD); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_ODD); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_MARK: case MXC_UART_PARITY_MARK_0: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_MARK); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_MARK); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_MARK_1: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_MARK); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_MARK); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_SPACE: case MXC_UART_PARITY_SPACE_0: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_SPACE); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_SPACE); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 0 << MXC_F_UART_CTRL_PARMD_POS); break; case MXC_UART_PARITY_SPACE_1: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_SPACE); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY_EN, 1 << MXC_F_UART_CTRL_PARITY_EN_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARITY, MXC_S_UART_CTRL_PARITY_SPACE); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_PARMD, 1 << MXC_F_UART_CTRL_PARMD_POS); break; default: @@ -301,25 +301,25 @@ int MXC_UART_RevA_SetParity (mxc_uart_regs_t* uart, mxc_uart_parity_t parity) return E_NO_ERROR; } -int MXC_UART_RevA_SetFlowCtrl (mxc_uart_regs_t* uart, mxc_uart_flow_t flowCtrl, int rtsThreshold) +int MXC_UART_RevA_SetFlowCtrl(mxc_uart_regs_t* uart, mxc_uart_flow_t flowCtrl, int rtsThreshold) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } switch (flowCtrl) { case MXC_UART_FLOW_DIS: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 0 << MXC_F_UART_CTRL_FLOW_CTRL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 0 << MXC_F_UART_CTRL_FLOW_CTRL_POS); break; case MXC_UART_FLOW_EN_LOW: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 1 << MXC_F_UART_CTRL_FLOW_CTRL_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_FLOW_POL, 0 << MXC_F_UART_CTRL_FLOW_POL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 1 << MXC_F_UART_CTRL_FLOW_CTRL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_FLOW_POL, 0 << MXC_F_UART_CTRL_FLOW_POL_POS); break; case MXC_UART_FLOW_EN_HIGH: - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 1 << MXC_F_UART_CTRL_FLOW_CTRL_POS); - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_FLOW_POL, 1 << MXC_F_UART_CTRL_FLOW_POL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_FLOW_CTRL, 1 << MXC_F_UART_CTRL_FLOW_CTRL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_FLOW_POL, 1 << MXC_F_UART_CTRL_FLOW_POL_POS); break; default: @@ -332,54 +332,54 @@ int MXC_UART_RevA_SetFlowCtrl (mxc_uart_regs_t* uart, mxc_uart_flow_t flowCtrl, } rtsThreshold <<= MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS; - MXC_SETFIELD (uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_RTS_FIFO_THRESH, rtsThreshold); + MXC_SETFIELD(uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_RTS_FIFO_THRESH, rtsThreshold); return E_NO_ERROR; } -int MXC_UART_RevA_SetClockSource (mxc_uart_regs_t* uart, int usePCLK) +int MXC_UART_RevA_SetClockSource(mxc_uart_regs_t* uart, int usePCLK) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } if (usePCLK) { - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_CLKSEL, 0 << MXC_F_UART_CTRL_CLKSEL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_CLKSEL, 0 << MXC_F_UART_CTRL_CLKSEL_POS); } else { - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_CLKSEL, 1 << MXC_F_UART_CTRL_CLKSEL_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_CLKSEL, 1 << MXC_F_UART_CTRL_CLKSEL_POS); } - return MXC_UART_SetFrequency (uart, baudRate); + return MXC_UART_SetFrequency(uart, baudRate); } -int MXC_UART_RevA_SetNullModem (mxc_uart_regs_t* uart, int nullModem) +int MXC_UART_RevA_SetNullModem(mxc_uart_regs_t* uart, int nullModem) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } nullModem = (nullModem > 0) << MXC_F_UART_CTRL_NULL_MODEM_POS; - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_NULL_MODEM, nullModem); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_NULL_MODEM, nullModem); return E_NO_ERROR; } -int MXC_UART_RevA_SendBreak (mxc_uart_regs_t* uart) +int MXC_UART_RevA_SendBreak(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - MXC_SETFIELD (uart->ctrl, MXC_F_UART_CTRL_BREAK, 1 << MXC_F_UART_CTRL_BREAK_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_BREAK, 1 << MXC_F_UART_CTRL_BREAK_POS); return E_NO_ERROR; } -int MXC_UART_RevA_GetActive (mxc_uart_regs_t* uart) +int MXC_UART_RevA_GetActive(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -390,15 +390,15 @@ int MXC_UART_RevA_GetActive (mxc_uart_regs_t* uart) return E_NO_ERROR; } -int MXC_UART_RevA_AbortTransmission (mxc_uart_regs_t* uart) +int MXC_UART_RevA_AbortTransmission(mxc_uart_regs_t* uart) { - MXC_UART_ClearTXFIFO (uart); + MXC_UART_ClearTXFIFO(uart); return E_NO_ERROR; } -int MXC_UART_RevA_ReadCharacterRaw (mxc_uart_regs_t* uart) +int MXC_UART_RevA_ReadCharacterRaw(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -409,9 +409,9 @@ int MXC_UART_RevA_ReadCharacterRaw (mxc_uart_regs_t* uart) return uart->fifo; } -int MXC_UART_RevA_WriteCharacterRaw (mxc_uart_regs_t* uart, uint8_t character) +int MXC_UART_RevA_WriteCharacterRaw(mxc_uart_regs_t* uart, uint8_t character) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -425,13 +425,13 @@ int MXC_UART_RevA_WriteCharacterRaw (mxc_uart_regs_t* uart, uint8_t character) return E_NO_ERROR; } -int MXC_UART_RevA_Read (mxc_uart_regs_t* uart, uint8_t* buffer, int* len) +int MXC_UART_RevA_Read(mxc_uart_regs_t* uart, uint8_t* buffer, int* len) { int read = 0; int retVal; - + for (; read < *len; read++) { - retVal = MXC_UART_ReadCharacter (uart); + retVal = MXC_UART_ReadCharacter(uart); if (retVal < 0) { *len = read; @@ -446,13 +446,13 @@ int MXC_UART_RevA_Read (mxc_uart_regs_t* uart, uint8_t* buffer, int* len) return E_NO_ERROR; } -int MXC_UART_RevA_Write (mxc_uart_regs_t* uart, uint8_t* byte, int* len) +int MXC_UART_RevA_Write(mxc_uart_regs_t* uart, uint8_t* byte, int* len) { int written = 0; int retVal; - + for (; written < *len; written++) { - retVal = MXC_UART_WriteCharacter (uart, byte[written]); + retVal = MXC_UART_WriteCharacter(uart, byte[written]); if (retVal != E_NO_ERROR) { *len = written; @@ -464,7 +464,7 @@ int MXC_UART_RevA_Write (mxc_uart_regs_t* uart, uint8_t* byte, int* len) return E_NO_ERROR; } -unsigned int MXC_UART_RevA_ReadRXFIFO (mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len) +unsigned int MXC_UART_RevA_ReadRXFIFO(mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len) { int read = 0; @@ -479,22 +479,22 @@ unsigned int MXC_UART_RevA_ReadRXFIFO (mxc_uart_regs_t* uart, unsigned char* byt return read; } -int MXC_UART_RevA_ReadRXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len, - mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) +int MXC_UART_RevA_ReadRXFIFODMA(mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len, + mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) { uint8_t channel; mxc_dma_srcdst_t srcdst; - int uart_num = MXC_UART_GET_IDX (uart); + int uart_num = MXC_UART_GET_IDX(uart); if (uart_num < 0) { return E_BAD_PARAM; } - + if (bytes == NULL) { return E_NULL_PTR; } - + channel = MXC_DMA_AcquireChannel(); config.ch = channel; @@ -511,10 +511,10 @@ int MXC_UART_RevA_ReadRXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, un states[uart_num].channelRx = channel; - MXC_DMA_ConfigChannel (config,srcdst); - MXC_DMA_SetCallback (channel, (void *)MXC_UART_DMACallback); - MXC_DMA_EnableInt (channel); - MXC_DMA_Start (channel); + MXC_DMA_ConfigChannel(config, srcdst); + MXC_DMA_SetCallback(channel, (void*) MXC_UART_DMACallback); + MXC_DMA_EnableInt(channel); + MXC_DMA_Start(channel); MXC_DMA->ch[channel].ctrl |= MXC_F_DMA_CTRL_CTZ_IE; uart->dma |= MXC_F_UART_DMA_RXDMA_EN; @@ -522,12 +522,12 @@ int MXC_UART_RevA_ReadRXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, un return E_NO_ERROR; } -unsigned int MXC_UART_RevA_GetRXFIFOAvailable (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetRXFIFOAvailable(mxc_uart_regs_t* uart) { return (uart->status & MXC_F_UART_STATUS_RX_FIFO_CNT) >> MXC_F_UART_STATUS_RX_FIFO_CNT_POS; } -unsigned int MXC_UART_RevA_WriteTXFIFO (mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len) +unsigned int MXC_UART_RevA_WriteTXFIFO(mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len) { int written = 0; @@ -542,22 +542,22 @@ unsigned int MXC_UART_RevA_WriteTXFIFO (mxc_uart_regs_t* uart, unsigned char* by return written; } -int MXC_UART_RevA_WriteTXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len, - mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) +int MXC_UART_RevA_WriteTXFIFODMA(mxc_uart_regs_t* uart, unsigned char* bytes, unsigned int len, + mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) { uint8_t channel; mxc_dma_srcdst_t srcdst; - int uart_num = MXC_UART_GET_IDX (uart); + int uart_num = MXC_UART_GET_IDX(uart); if (uart_num < 0) { return E_BAD_PARAM; } - + if (bytes == NULL) { return E_NULL_PTR; } - + channel = MXC_DMA_AcquireChannel(); config.ch = channel; @@ -574,10 +574,10 @@ int MXC_UART_RevA_WriteTXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, u states[uart_num].channelTx = channel; - MXC_DMA_ConfigChannel (config,srcdst); - MXC_DMA_SetCallback (channel, (void *)MXC_UART_DMACallback); - MXC_DMA_EnableInt (channel); - MXC_DMA_Start (channel); + MXC_DMA_ConfigChannel(config, srcdst); + MXC_DMA_SetCallback(channel, (void*) MXC_UART_DMACallback); + MXC_DMA_EnableInt(channel); + MXC_DMA_Start(channel); MXC_DMA->ch[channel].ctrl |= MXC_F_DMA_CTRL_CTZ_IE; uart->dma |= MXC_F_UART_DMA_TXDMA_EN; @@ -585,41 +585,41 @@ int MXC_UART_RevA_WriteTXFIFODMA (mxc_uart_regs_t* uart, unsigned char* bytes, u return E_NO_ERROR; } -unsigned int MXC_UART_RevA_GetTXFIFOAvailable (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetTXFIFOAvailable(mxc_uart_regs_t* uart) { int txCnt = (uart->status & MXC_F_UART_STATUS_TX_FIFO_CNT) >> MXC_F_UART_STATUS_TX_FIFO_CNT_POS; return MXC_UART_FIFO_DEPTH - txCnt; } -int MXC_UART_RevA_ClearRXFIFO (mxc_uart_regs_t* uart) +int MXC_UART_RevA_ClearRXFIFO(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - + uart->ctrl |= MXC_F_UART_CTRL_RX_FLUSH; while (uart->ctrl & MXC_F_UART_CTRL_RX_FLUSH); - + return E_NO_ERROR; } -int MXC_UART_RevA_ClearTXFIFO (mxc_uart_regs_t* uart) +int MXC_UART_RevA_ClearTXFIFO(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - + uart->ctrl |= MXC_F_UART_CTRL_TX_FLUSH; while (uart->ctrl & MXC_F_UART_CTRL_TX_FLUSH); - + return E_NO_ERROR; } -int MXC_UART_RevA_SetRXThreshold (mxc_uart_regs_t* uart, unsigned int numBytes) +int MXC_UART_RevA_SetRXThreshold(mxc_uart_regs_t* uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -628,19 +628,19 @@ int MXC_UART_RevA_SetRXThreshold (mxc_uart_regs_t* uart, unsigned int numBytes) } numBytes <<= MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS; - MXC_SETFIELD (uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH, numBytes); + MXC_SETFIELD(uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH, numBytes); return E_NO_ERROR; } -unsigned int MXC_UART_RevA_GetRXThreshold (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetRXThreshold(mxc_uart_regs_t* uart) { return (uart->thresh_ctrl & MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH) >> MXC_F_UART_THRESH_CTRL_RX_FIFO_THRESH_POS; } -int MXC_UART_RevA_SetTXThreshold (mxc_uart_regs_t* uart, unsigned int numBytes) +int MXC_UART_RevA_SetTXThreshold(mxc_uart_regs_t* uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } @@ -649,72 +649,72 @@ int MXC_UART_RevA_SetTXThreshold (mxc_uart_regs_t* uart, unsigned int numBytes) } numBytes <<= MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH_POS; - MXC_SETFIELD (uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH, numBytes); + MXC_SETFIELD(uart->thresh_ctrl, MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH, numBytes); return E_NO_ERROR; } -unsigned int MXC_UART_RevA_GetTXThreshold (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetTXThreshold(mxc_uart_regs_t* uart) { return (uart->thresh_ctrl & MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH) >> MXC_F_UART_THRESH_CTRL_TX_FIFO_THRESH_POS; } -unsigned int MXC_UART_RevA_GetFlags (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetFlags(mxc_uart_regs_t* uart) { return uart->int_fl; } -int MXC_UART_RevA_ClearFlags (mxc_uart_regs_t* uart, int flags) +int MXC_UART_RevA_ClearFlags(mxc_uart_regs_t* uart, int flags) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - + uart->int_fl = flags; - + return E_NO_ERROR; } -int MXC_UART_RevA_EnableInt (mxc_uart_regs_t* uart, unsigned int intEn) +int MXC_UART_RevA_EnableInt(mxc_uart_regs_t* uart, unsigned int intEn) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - + uart->int_en |= intEn; - + return E_NO_ERROR; } -int MXC_UART_RevA_DisableInt (mxc_uart_regs_t* uart, unsigned int intDis) +int MXC_UART_RevA_DisableInt(mxc_uart_regs_t* uart, unsigned int intDis) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - + uart->int_en &= ~intDis; - + return E_NO_ERROR; } -unsigned int MXC_UART_RevA_GetStatus (mxc_uart_regs_t* uart) +unsigned int MXC_UART_RevA_GetStatus(mxc_uart_regs_t* uart) { return uart->status; } -int MXC_UART_RevA_Transaction (mxc_uart_req_t* req) +int MXC_UART_RevA_Transaction(mxc_uart_req_t* req) { int numToWrite, numToRead; - - if (MXC_UART_GET_IDX (req->uart) < 0) { + + if (MXC_UART_GET_IDX(req->uart) < 0) { return E_BAD_PARAM; } - MXC_UART_DisableInt (req->uart, 0xFFFFFFFF); - MXC_UART_ClearFlags (req->uart, 0xFFFFFFFF); + MXC_UART_DisableInt(req->uart, 0xFFFFFFFF); + MXC_UART_ClearFlags(req->uart, 0xFFFFFFFF); - MXC_UART_ClearRXFIFO (req->uart); - MXC_UART_ClearTXFIFO (req->uart); + MXC_UART_ClearRXFIFO(req->uart); + MXC_UART_ClearTXFIFO(req->uart); req->txCnt = 0; req->rxCnt = 0; @@ -730,51 +730,51 @@ int MXC_UART_RevA_Transaction (mxc_uart_req_t* req) return E_BAD_PARAM; } - numToWrite = MXC_UART_GetTXFIFOAvailable (req->uart); - numToWrite = numToWrite > (req->txLen-req->txCnt) ? req->txLen-req->txCnt : numToWrite; - req->txCnt += MXC_UART_WriteTXFIFO (req->uart, &req->txData[req->txCnt], numToWrite); + numToWrite = MXC_UART_GetTXFIFOAvailable(req->uart); + numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt : numToWrite; + req->txCnt += MXC_UART_WriteTXFIFO(req->uart, &req->txData[req->txCnt], numToWrite); while (req->txCnt < req->txLen) { - while (! (MXC_UART_GetFlags (req->uart) & MXC_F_UART_INT_FL_TX_FIFO_THRESH)); + while (!(MXC_UART_GetFlags(req->uart) & MXC_F_UART_INT_FL_TX_FIFO_THRESH)); - numToWrite = MXC_UART_GetTXFIFOAvailable (req->uart); - numToWrite = numToWrite > (req->txLen-req->txCnt) ? req->txLen-req->txCnt : numToWrite; - req->txCnt += MXC_UART_WriteTXFIFO (req->uart, &req->txData[req->txCnt], numToWrite); - MXC_UART_ClearFlags (req->uart, MXC_F_UART_INT_FL_TX_FIFO_THRESH); + numToWrite = MXC_UART_GetTXFIFOAvailable(req->uart); + numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt : numToWrite; + req->txCnt += MXC_UART_WriteTXFIFO(req->uart, &req->txData[req->txCnt], numToWrite); + MXC_UART_ClearFlags(req->uart, MXC_F_UART_INT_FL_TX_FIFO_THRESH); } } if (req->rxLen) { - numToRead = MXC_UART_GetRXFIFOAvailable (req->uart); - numToRead = numToRead > (req->rxLen-req->rxCnt) ? req->rxLen-req->rxCnt : numToRead; - req->rxCnt += MXC_UART_ReadRXFIFO (req->uart, &req->rxData[req->rxCnt], numToRead); + numToRead = MXC_UART_GetRXFIFOAvailable(req->uart); + numToRead = numToRead > (req->rxLen - req->rxCnt) ? req->rxLen - req->rxCnt : numToRead; + req->rxCnt += MXC_UART_ReadRXFIFO(req->uart, &req->rxData[req->rxCnt], numToRead); while (req->rxCnt < req->rxLen) { - while (! (MXC_UART_GetFlags (req->uart) & MXC_F_UART_INT_FL_RX_FIFO_THRESH)); + while (!(MXC_UART_GetFlags(req->uart) & MXC_F_UART_INT_FL_RX_FIFO_THRESH)); - numToRead = MXC_UART_GetRXFIFOAvailable (req->uart); - numToRead = numToRead > (req->rxLen-req->rxCnt) ? req->rxLen-req->rxCnt : numToRead; - req->rxCnt += MXC_UART_ReadRXFIFO (req->uart, &req->rxData[req->rxCnt], numToRead); - MXC_UART_ClearFlags (req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); + numToRead = MXC_UART_GetRXFIFOAvailable(req->uart); + numToRead = numToRead > (req->rxLen - req->rxCnt) ? req->rxLen - req->rxCnt : numToRead; + req->rxCnt += MXC_UART_ReadRXFIFO(req->uart, &req->rxData[req->rxCnt], numToRead); + MXC_UART_ClearFlags(req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); } } return E_NO_ERROR; } -int MXC_UART_RevA_TransactionAsync (mxc_uart_req_t* req) +int MXC_UART_RevA_TransactionAsync(mxc_uart_req_t* req) { int numToWrite, numToRead; - - if (MXC_UART_GET_IDX (req->uart) < 0) { + + if (MXC_UART_GET_IDX(req->uart) < 0) { return E_BAD_PARAM; } - MXC_UART_DisableInt (req->uart, 0xFFFFFFFF); - MXC_UART_ClearFlags (req->uart, 0xFFFFFFFF); + MXC_UART_DisableInt(req->uart, 0xFFFFFFFF); + MXC_UART_ClearFlags(req->uart, 0xFFFFFFFF); - MXC_UART_ClearRXFIFO (req->uart); - MXC_UART_ClearTXFIFO (req->uart); + MXC_UART_ClearRXFIFO(req->uart); + MXC_UART_ClearTXFIFO(req->uart); req->txCnt = 0; req->rxCnt = 0; @@ -784,36 +784,36 @@ int MXC_UART_RevA_TransactionAsync (mxc_uart_req_t* req) return E_BAD_PARAM; } - MXC_UART_EnableInt (req->uart, MXC_F_UART_INT_EN_TX_FIFO_THRESH); - numToWrite = MXC_UART_GetTXFIFOAvailable (req->uart); - numToWrite = numToWrite > (req->txLen-req->txCnt) ? req->txLen-req->txCnt : numToWrite; - req->txCnt += MXC_UART_WriteTXFIFO (req->uart, &req->txData[req->txCnt], numToWrite); + MXC_UART_EnableInt(req->uart, MXC_F_UART_INT_EN_TX_FIFO_THRESH); + numToWrite = MXC_UART_GetTXFIFOAvailable(req->uart); + numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt : numToWrite; + req->txCnt += MXC_UART_WriteTXFIFO(req->uart, &req->txData[req->txCnt], numToWrite); } if (req->rxLen) { // All error interrupts are related to RX - MXC_UART_EnableInt (req->uart, MXC_UART_ERRINT_EN); + MXC_UART_EnableInt(req->uart, MXC_UART_ERRINT_EN); if (req->rxData == NULL) { - MXC_UART_DisableInt (req->uart, 0xFFFFFFFF); - MXC_UART_ClearTXFIFO (req->uart); + MXC_UART_DisableInt(req->uart, 0xFFFFFFFF); + MXC_UART_ClearTXFIFO(req->uart); return E_BAD_PARAM; } - MXC_UART_EnableInt (req->uart, MXC_F_UART_INT_EN_RX_FIFO_THRESH); - numToRead = MXC_UART_GetRXFIFOAvailable (req->uart); - numToRead = numToRead > (req->rxLen-req->rxCnt) ? req->rxLen-req->rxCnt : numToRead; - req->rxCnt += MXC_UART_ReadRXFIFO (req->uart, &req->rxData[req->rxCnt], numToRead); - MXC_UART_ClearFlags (req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); + MXC_UART_EnableInt(req->uart, MXC_F_UART_INT_EN_RX_FIFO_THRESH); + numToRead = MXC_UART_GetRXFIFOAvailable(req->uart); + numToRead = numToRead > (req->rxLen - req->rxCnt) ? req->rxLen - req->rxCnt : numToRead; + req->rxCnt += MXC_UART_ReadRXFIFO(req->uart, &req->rxData[req->rxCnt], numToRead); + MXC_UART_ClearFlags(req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); } - AsyncRequests[MXC_UART_GET_IDX (req->uart)] = (void *) req; + AsyncRequests[MXC_UART_GET_IDX(req->uart)] = (void*) req; return E_NO_ERROR; } -int MXC_UART_RevA_TransactionDMA (mxc_uart_req_t* req) +int MXC_UART_RevA_TransactionDMA(mxc_uart_req_t* req) { - int uart_num = MXC_UART_GET_IDX (req->uart); + int uart_num = MXC_UART_GET_IDX(req->uart); if (uart_num < 0) { return E_BAD_PARAM; @@ -831,11 +831,11 @@ int MXC_UART_RevA_TransactionDMA (mxc_uart_req_t* req) } } - MXC_UART_DisableInt (req->uart, 0xFFFFFFFF); - MXC_UART_ClearFlags (req->uart, 0xFFFFFFFF); + MXC_UART_DisableInt(req->uart, 0xFFFFFFFF); + MXC_UART_ClearFlags(req->uart, 0xFFFFFFFF); - MXC_UART_ClearRXFIFO (req->uart); - MXC_UART_ClearTXFIFO (req->uart); + MXC_UART_ClearRXFIFO(req->uart); + MXC_UART_ClearTXFIFO(req->uart); (req->uart)->dma |= (1 << MXC_F_UART_DMA_RXDMA_LEVEL_POS); // Set RX DMA threshold to 1 byte (req->uart)->dma |= (2 << MXC_F_UART_DMA_TXDMA_LEVEL_POS); // Set TX DMA threshold to 2 bytes @@ -843,14 +843,14 @@ int MXC_UART_RevA_TransactionDMA (mxc_uart_req_t* req) MXC_DMA_Init(); //tx - if ( (req->txData != NULL) && (req->txLen)) { - if (MXC_UART_WriteTXFIFODMA (req->uart, req->txData, req->txLen, NULL) != E_NO_ERROR) { + if ((req->txData != NULL) && (req->txLen)) { + if (MXC_UART_WriteTXFIFODMA(req->uart, req->txData, req->txLen, NULL) != E_NO_ERROR) { return E_BAD_PARAM; } } - if ( (req->rxData != NULL) && (req->rxLen)) { - if (MXC_UART_ReadRXFIFODMA (req->uart, req->rxData, req->rxLen, NULL) != E_NO_ERROR) { + if ((req->rxData != NULL) && (req->rxLen)) { + if (MXC_UART_ReadRXFIFODMA(req->uart, req->rxData, req->rxLen, NULL) != E_NO_ERROR) { return E_BAD_PARAM; } } @@ -858,14 +858,14 @@ int MXC_UART_RevA_TransactionDMA (mxc_uart_req_t* req) return E_NO_ERROR; } -int MXC_UART_RevA_DMACallback (int ch, int error) -{ - if(error != E_NO_ERROR) { +int MXC_UART_RevA_DMACallback(int ch, int error) +{ + if (error != E_NO_ERROR) { return error; } - + // For future use - for (int i =0; i < MXC_UART_INSTANCES; i ++) { + for (int i = 0; i < MXC_UART_INSTANCES; i ++) { if (states[i].channelTx == ch) { break; } @@ -874,92 +874,92 @@ int MXC_UART_RevA_DMACallback (int ch, int error) break; } } - + return error; } -int MXC_UART_RevA_AsyncCallback (mxc_uart_regs_t* uart, int retVal) +int MXC_UART_RevA_AsyncCallback(mxc_uart_regs_t* uart, int retVal) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - - mxc_uart_req_t* req = (mxc_uart_req_t*) AsyncRequests[MXC_UART_GET_IDX (uart)]; + + mxc_uart_req_t* req = (mxc_uart_req_t*) AsyncRequests[MXC_UART_GET_IDX(uart)]; if (req->callback != NULL) { - req->callback (req, retVal); + req->callback(req, retVal); } - + return E_NO_ERROR; } -int MXC_UART_RevA_AsyncStop (mxc_uart_regs_t* uart) +int MXC_UART_RevA_AsyncStop(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - - MXC_UART_DisableInt (uart, 0xFFFFFFFF); - AsyncRequests[MXC_UART_GET_IDX (uart)] = NULL; - + + MXC_UART_DisableInt(uart, 0xFFFFFFFF); + AsyncRequests[MXC_UART_GET_IDX(uart)] = NULL; + return E_NO_ERROR; } -int MXC_UART_RevA_AbortAsync (mxc_uart_regs_t* uart) +int MXC_UART_RevA_AbortAsync(mxc_uart_regs_t* uart) { - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - - MXC_UART_AsyncCallback (uart, E_ABORT); - MXC_UART_AsyncStop (uart); - + + MXC_UART_AsyncCallback(uart, E_ABORT); + MXC_UART_AsyncStop(uart); + return E_NO_ERROR; } -int MXC_UART_RevA_AsyncHandler (mxc_uart_regs_t* uart) +int MXC_UART_RevA_AsyncHandler(mxc_uart_regs_t* uart) { - int uartNum = MXC_UART_GET_IDX (uart); + int uartNum = MXC_UART_GET_IDX(uart); int flags, numToWrite, numToRead; mxc_uart_req_t* req; - if (MXC_UART_GET_IDX (uart) < 0) { + if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } req = (mxc_uart_req_t*) AsyncRequests[uartNum]; - flags = MXC_UART_GetFlags (uart); + flags = MXC_UART_GetFlags(uart); if (flags & MXC_UART_ERRINT_FL & uart->int_en) { - MXC_UART_AsyncCallback (uart, E_COMM_ERR); - MXC_UART_AsyncStop (uart); + MXC_UART_AsyncCallback(uart, E_COMM_ERR); + MXC_UART_AsyncStop(uart); return E_INVALID; } - if ( (flags & MXC_F_UART_INT_FL_TX_FIFO_THRESH) && (req->txLen)) { - numToWrite = MXC_UART_GetTXFIFOAvailable (req->uart); - numToWrite = numToWrite > (req->txLen-req->txCnt) ? req->txLen-req->txCnt : numToWrite; - req->txCnt += MXC_UART_WriteTXFIFO (req->uart, &req->txData[req->txCnt], numToWrite); - MXC_UART_ClearFlags (req->uart, MXC_F_UART_INT_FL_TX_FIFO_THRESH); + if ((flags & MXC_F_UART_INT_FL_TX_FIFO_THRESH) && (req->txLen)) { + numToWrite = MXC_UART_GetTXFIFOAvailable(req->uart); + numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt : numToWrite; + req->txCnt += MXC_UART_WriteTXFIFO(req->uart, &req->txData[req->txCnt], numToWrite); + MXC_UART_ClearFlags(req->uart, MXC_F_UART_INT_FL_TX_FIFO_THRESH); } - if ( (flags & MXC_F_UART_INT_FL_RX_FIFO_THRESH) && (req->rxLen)) { - numToRead = MXC_UART_GetRXFIFOAvailable (req->uart); - numToRead = numToRead > (req->rxLen-req->rxCnt) ? req->rxLen-req->rxCnt : numToRead; - req->rxCnt += MXC_UART_ReadRXFIFO (req->uart, &req->rxData[req->rxCnt], numToRead); + if ((flags & MXC_F_UART_INT_FL_RX_FIFO_THRESH) && (req->rxLen)) { + numToRead = MXC_UART_GetRXFIFOAvailable(req->uart); + numToRead = numToRead > (req->rxLen - req->rxCnt) ? req->rxLen - req->rxCnt : numToRead; + req->rxCnt += MXC_UART_ReadRXFIFO(req->uart, &req->rxData[req->rxCnt], numToRead); - if ( (req->rxLen - req->rxCnt) < MXC_UART_GetRXThreshold (req->uart)) { - MXC_UART_SetRXThreshold (req->uart, req->rxLen - req->rxCnt); + if ((req->rxLen - req->rxCnt) < MXC_UART_GetRXThreshold(req->uart)) { + MXC_UART_SetRXThreshold(req->uart, req->rxLen - req->rxCnt); } - MXC_UART_ClearFlags (req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); + MXC_UART_ClearFlags(req->uart, MXC_F_UART_INT_FL_RX_FIFO_THRESH); } - if ( (req->rxCnt == req->rxLen) && (req->txCnt == req->txLen)) { - MXC_UART_AsyncCallback (uart, E_NO_ERROR); - MXC_UART_AsyncStop (uart); + if ((req->rxCnt == req->rxLen) && (req->txCnt == req->txLen)) { + MXC_UART_AsyncCallback(uart, E_NO_ERROR); + MXC_UART_AsyncStop(uart); } - + return E_NO_ERROR; } diff --git a/Libraries/PeriphDrivers/Source/WDT/wdt_me17.c b/Libraries/PeriphDrivers/Source/WDT/wdt_me17.c index cd34037e1..e89b47ab8 100644 --- a/Libraries/PeriphDrivers/Source/WDT/wdt_me17.c +++ b/Libraries/PeriphDrivers/Source/WDT/wdt_me17.c @@ -41,100 +41,100 @@ /* **** Functions **** */ -int MXC_WDT_Init (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +int MXC_WDT_Init(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { if (wdt == MXC_WDT0) { - MXC_SYS_ClockEnable (MXC_SYS_PERIPH_CLOCK_WDT0); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_WDT0); } else if (wdt == MXC_WDT1) { - // This clock is always on #TODO CHECK IF THIS IS TRUE + // This clock is always on #TODO CHECK IF THIS IS TRUE } else { return E_BAD_PARAM; } - + MXC_WDT_RevB_Init(wdt, cfg); - + return E_NO_ERROR; } -int MXC_WDT_Shutdown (mxc_wdt_regs_t* wdt) +int MXC_WDT_Shutdown(mxc_wdt_regs_t* wdt) { if (wdt == MXC_WDT0) { - MXC_SYS_ClockDisable (MXC_SYS_PERIPH_CLOCK_WDT0); + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_WDT0); } else if (wdt == MXC_WDT1) { - // This clock is always on #TODO CHECK IF THIS IS TRUE - + // This clock is always on #TODO CHECK IF THIS IS TRUE + } else { return E_BAD_PARAM; } - + return E_NO_ERROR; } -void MXC_WDT_SetIntPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +void MXC_WDT_SetIntPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { - MXC_WDT_RevB_SetIntPeriod (wdt,cfg); + MXC_WDT_RevB_SetIntPeriod(wdt, cfg); } -void MXC_WDT_SetResetPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +void MXC_WDT_SetResetPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { - MXC_WDT_RevB_SetResetPeriod (wdt,cfg); + MXC_WDT_RevB_SetResetPeriod(wdt, cfg); } -void MXC_WDT_Enable (mxc_wdt_regs_t* wdt) +void MXC_WDT_Enable(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_Enable (wdt); + MXC_WDT_RevB_Enable(wdt); } -void MXC_WDT_Disable (mxc_wdt_regs_t* wdt) +void MXC_WDT_Disable(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_Disable (wdt); + MXC_WDT_RevB_Disable(wdt); } -void MXC_WDT_EnableInt (mxc_wdt_regs_t* wdt) +void MXC_WDT_EnableInt(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_EnableInt (wdt, MXC_WDT_ENABLE); + MXC_WDT_RevB_EnableInt(wdt, MXC_WDT_ENABLE); } -void MXC_WDT_DisableInt (mxc_wdt_regs_t* wdt) +void MXC_WDT_DisableInt(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_EnableInt (wdt, MXC_WDT_DISABLE); + MXC_WDT_RevB_EnableInt(wdt, MXC_WDT_DISABLE); } -void MXC_WDT_EnableReset (mxc_wdt_regs_t* wdt) +void MXC_WDT_EnableReset(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_EnableReset (wdt, MXC_WDT_ENABLE); + MXC_WDT_RevB_EnableReset(wdt, MXC_WDT_ENABLE); } -void MXC_WDT_DisableReset (mxc_wdt_regs_t* wdt) +void MXC_WDT_DisableReset(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_EnableReset (wdt, MXC_WDT_DISABLE); + MXC_WDT_RevB_EnableReset(wdt, MXC_WDT_DISABLE); } -void MXC_WDT_ResetTimer (mxc_wdt_regs_t* wdt) +void MXC_WDT_ResetTimer(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_ResetTimer (wdt); + MXC_WDT_RevB_ResetTimer(wdt); } -int MXC_WDT_GetResetFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_GetResetFlag(mxc_wdt_regs_t* wdt) { - return MXC_WDT_RevB_GetResetFlag (wdt); + return MXC_WDT_RevB_GetResetFlag(wdt); } -void MXC_WDT_ClearResetFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_ClearResetFlag(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_ClearResetFlag (wdt); + MXC_WDT_RevB_ClearResetFlag(wdt); } -int MXC_WDT_GetIntFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_GetIntFlag(mxc_wdt_regs_t* wdt) { - return MXC_WDT_RevB_GetIntFlag (wdt); + return MXC_WDT_RevB_GetIntFlag(wdt); } -void MXC_WDT_ClearIntFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_ClearIntFlag(mxc_wdt_regs_t* wdt) { - MXC_WDT_RevB_ClearIntFlag (wdt); + MXC_WDT_RevB_ClearIntFlag(wdt); } diff --git a/Libraries/PeriphDrivers/Source/WDT/wdt_reva.c b/Libraries/PeriphDrivers/Source/WDT/wdt_reva.c index f43b3aa0c..a3a22cfe2 100644 --- a/Libraries/PeriphDrivers/Source/WDT/wdt_reva.c +++ b/Libraries/PeriphDrivers/Source/WDT/wdt_reva.c @@ -41,69 +41,69 @@ /* **** Functions **** */ -void MXC_WDT_RevA_SetIntPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_period_t period) +void MXC_WDT_RevA_SetIntPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_period_t period) { - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_INT_PERIOD, period); + MXC_SETFIELD(wdt->ctrl, MXC_F_WDT_CTRL_INT_PERIOD, period); } -void MXC_WDT_RevA_SetResetPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_period_t period) +void MXC_WDT_RevA_SetResetPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_period_t period) { - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_RST_PERIOD, (period << (MXC_F_WDT_CTRL_RST_PERIOD_POS - MXC_F_WDT_CTRL_INT_PERIOD_POS))); + MXC_SETFIELD(wdt->ctrl, MXC_F_WDT_CTRL_RST_PERIOD, (period << (MXC_F_WDT_CTRL_RST_PERIOD_POS - MXC_F_WDT_CTRL_INT_PERIOD_POS))); } -void MXC_WDT_RevA_Enable (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevA_Enable(mxc_wdt_regs_t* wdt) { wdt->ctrl |= MXC_F_WDT_CTRL_WDT_EN; } -void MXC_WDT_RevA_Disable (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevA_Disable(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_WDT_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_WDT_EN); } -void MXC_WDT_RevA_EnableInt (mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) +void MXC_WDT_RevA_EnableInt(mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) { if (enable) { wdt->ctrl |= MXC_F_WDT_CTRL_INT_EN; } else { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_INT_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_EN); } } -void MXC_WDT_RevA_EnableReset (mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) +void MXC_WDT_RevA_EnableReset(mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) { if (enable) { wdt->ctrl |= MXC_F_WDT_CTRL_RST_EN; } else { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_RST_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_EN); } } -void MXC_WDT_RevA_ResetTimer (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevA_ResetTimer(mxc_wdt_regs_t* wdt) { wdt->rst = 0x00A5; wdt->rst = 0x005A; } -int MXC_WDT_RevA_GetResetFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_RevA_GetResetFlag(mxc_wdt_regs_t* wdt) { - return !! (wdt->ctrl & MXC_F_WDT_CTRL_RST_FLAG); + return !!(wdt->ctrl & MXC_F_WDT_CTRL_RST_FLAG); } -void MXC_WDT_RevA_ClearResetFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevA_ClearResetFlag(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_RST_FLAG); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_FLAG); } -int MXC_WDT_RevA_GetIntFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_RevA_GetIntFlag(mxc_wdt_regs_t* wdt) { - return !! (wdt->ctrl & MXC_F_WDT_CTRL_INT_FLAG); + return !!(wdt->ctrl & MXC_F_WDT_CTRL_INT_FLAG); } -void MXC_WDT_RevA_ClearIntFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevA_ClearIntFlag(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_INT_FLAG); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_FLAG); } diff --git a/Libraries/PeriphDrivers/Source/WDT/wdt_revb.c b/Libraries/PeriphDrivers/Source/WDT/wdt_revb.c index 95607f0bf..57b379d33 100644 --- a/Libraries/PeriphDrivers/Source/WDT/wdt_revb.c +++ b/Libraries/PeriphDrivers/Source/WDT/wdt_revb.c @@ -44,96 +44,96 @@ /* **** Functions **** */ -int MXC_WDT_RevB_Init (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +int MXC_WDT_RevB_Init(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { - if(wdt == NULL || cfg == NULL) { + if (wdt == NULL || cfg == NULL) { return E_NULL_PTR; } - - if(cfg->mode & MXC_WDT_WINDOWED){ + + if (cfg->mode & MXC_WDT_WINDOWED) { wdt->ctrl |= MXC_F_WDT_CTRL_WIN_EN; } - else{ + else { wdt->ctrl &= ~(MXC_F_WDT_CTRL_WIN_EN); } - + return E_NO_ERROR; } -void MXC_WDT_RevB_SetIntPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +void MXC_WDT_RevB_SetIntPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_INT_LATE_VAL, cfg->upperIntPeriod); - - if(cfg->mode & MXC_WDT_WINDOWED){ - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_INT_EARLY_VAL, \ - (cfg->lowerIntPeriod<ctrl, MXC_F_WDT_CTRL_INT_LATE_VAL, cfg->upperIntPeriod); + + if (cfg->mode & MXC_WDT_WINDOWED) { + MXC_SETFIELD(wdt->ctrl, MXC_F_WDT_CTRL_INT_EARLY_VAL, \ + (cfg->lowerIntPeriod << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS)); } } -void MXC_WDT_RevB_SetResetPeriod (mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t *cfg) +void MXC_WDT_RevB_SetResetPeriod(mxc_wdt_regs_t* wdt, mxc_wdt_cfg_t* cfg) { - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_RST_LATE_VAL, \ - (cfg->upperResetPeriod << MXC_F_WDT_CTRL_RST_LATE_VAL_POS)); - - if(cfg->mode & MXC_WDT_WINDOWED){ - MXC_SETFIELD (wdt->ctrl, MXC_F_WDT_CTRL_RST_EARLY_VAL, \ - (cfg->lowerResetPeriod << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS)); + MXC_SETFIELD(wdt->ctrl, MXC_F_WDT_CTRL_RST_LATE_VAL, \ + (cfg->upperResetPeriod << MXC_F_WDT_CTRL_RST_LATE_VAL_POS)); + + if (cfg->mode & MXC_WDT_WINDOWED) { + MXC_SETFIELD(wdt->ctrl, MXC_F_WDT_CTRL_RST_EARLY_VAL, \ + (cfg->lowerResetPeriod << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS)); } } -void MXC_WDT_RevB_Enable (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevB_Enable(mxc_wdt_regs_t* wdt) { wdt->ctrl |= MXC_F_WDT_CTRL_EN; } -void MXC_WDT_RevB_Disable (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevB_Disable(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_EN); } -void MXC_WDT_RevB_EnableInt (mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) +void MXC_WDT_RevB_EnableInt(mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) { if (enable) { wdt->ctrl |= MXC_F_WDT_CTRL_WDT_INT_EN; } else { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_WDT_INT_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_WDT_INT_EN); } } -void MXC_WDT_RevB_EnableReset (mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) +void MXC_WDT_RevB_EnableReset(mxc_wdt_regs_t* wdt, mxc_wdt_en_t enable) { if (enable) { wdt->ctrl |= MXC_F_WDT_CTRL_WDT_RST_EN; } else { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_WDT_RST_EN); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_WDT_RST_EN); } } -void MXC_WDT_RevB_ResetTimer (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevB_ResetTimer(mxc_wdt_regs_t* wdt) { wdt->rst = 0x00A5; wdt->rst = 0x005A; } -int MXC_WDT_RevB_GetResetFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_RevB_GetResetFlag(mxc_wdt_regs_t* wdt) { return (wdt->ctrl & (MXC_F_WDT_CTRL_RST_LATE | MXC_F_WDT_CTRL_RST_EARLY)); } -void MXC_WDT_RevB_ClearResetFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevB_ClearResetFlag(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_RST_LATE | MXC_F_WDT_CTRL_RST_EARLY); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_LATE | MXC_F_WDT_CTRL_RST_EARLY); } -int MXC_WDT_RevB_GetIntFlag (mxc_wdt_regs_t* wdt) +int MXC_WDT_RevB_GetIntFlag(mxc_wdt_regs_t* wdt) { - return !! (wdt->ctrl & (MXC_F_WDT_CTRL_INT_LATE | MXC_F_WDT_CTRL_INT_EARLY)); + return !!(wdt->ctrl & (MXC_F_WDT_CTRL_INT_LATE | MXC_F_WDT_CTRL_INT_EARLY)); } -void MXC_WDT_RevB_ClearIntFlag (mxc_wdt_regs_t* wdt) +void MXC_WDT_RevB_ClearIntFlag(mxc_wdt_regs_t* wdt) { - wdt->ctrl &= ~ (MXC_F_WDT_CTRL_INT_LATE | MXC_F_WDT_CTRL_INT_EARLY); + wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_LATE | MXC_F_WDT_CTRL_INT_EARLY); } diff --git a/Libraries/PeriphDrivers/Source/WUT/wut_me17.c b/Libraries/PeriphDrivers/Source/WUT/wut_me17.c index 002d375cf..503aa8ada 100644 --- a/Libraries/PeriphDrivers/Source/WUT/wut_me17.c +++ b/Libraries/PeriphDrivers/Source/WUT/wut_me17.c @@ -50,13 +50,13 @@ /* ************************************************************************** */ void MXC_WUT_Init(mxc_wut_pres_t pres) -{ - MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO); +{ + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO); MXC_WUT_RevA_Init(MXC_WUT, pres); } void MXC_WUT_Shutdown(void) -{ +{ MXC_WUT_RevA_Shutdown(MXC_WUT); } @@ -73,7 +73,7 @@ void MXC_WUT_Disable(void) } /* ************************************************************************** */ -void MXC_WUT_Config(const mxc_wut_cfg_t *cfg) +void MXC_WUT_Config(const mxc_wut_cfg_t* cfg) { MXC_WUT_RevA_Config(MXC_WUT, cfg); } @@ -121,13 +121,13 @@ void MXC_WUT_SetCount(uint32_t cnt) } /* ************************************************************************* */ -int MXC_WUT_GetTicks(uint32_t time, mxc_wut_unit_t units, uint32_t *ticks) +int MXC_WUT_GetTicks(uint32_t time, mxc_wut_unit_t units, uint32_t* ticks) { return MXC_WUT_RevA_GetTicks(MXC_WUT, ERTCO_FREQ, time, units, ticks); } /* ************************************************************************* */ -int MXC_WUT_GetTime(uint32_t ticks, uint32_t *time, mxc_wut_unit_t *units) +int MXC_WUT_GetTime(uint32_t ticks, uint32_t* time, mxc_wut_unit_t* units) { return MXC_WUT_RevA_GetTime(MXC_WUT, ERTCO_FREQ, ticks, time, units); }