From 4946e7ca464702eb33b8c1dee4fcebdaa3fb8580 Mon Sep 17 00:00:00 2001 From: Dag Lem Date: Thu, 11 Jan 2024 15:17:57 +0100 Subject: [PATCH] Fix test for tests/fmt/display_lm.v --- tests/fmt/display_lm.v | 1 - tests/fmt/run-test.sh | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/tests/fmt/display_lm.v b/tests/fmt/display_lm.v index d96f233f064..362f9845718 100644 --- a/tests/fmt/display_lm.v +++ b/tests/fmt/display_lm.v @@ -7,6 +7,5 @@ module mid (); endmodule module bot (); - initial $display("%%l: %l\n%%m: %m"); always $display("%%l: %l\n%%m: %m"); endmodule diff --git a/tests/fmt/run-test.sh b/tests/fmt/run-test.sh index 998047f830c..90ba8fc5ea1 100644 --- a/tests/fmt/run-test.sh +++ b/tests/fmt/run-test.sh @@ -67,7 +67,7 @@ iverilog -o iverilog-always_full-1 yosys-always_full-1.v always_full_tb.v ./iverilog-always_full-1 |grep -v '\$finish called' >iverilog-always_full-1.log diff iverilog-always_full.log iverilog-always_full-1.log -../../yosys -p "read_verilog display_lm.v" >yosys-display_lm.log +../../yosys -p "read_verilog display_lm.v; hierarchy -auto-top; proc; sim" >yosys-display_lm.log ../../yosys -p "read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc" ${CC:-gcc} -std=c++11 -o yosys-display_lm_cc -I../../backends/cxxrtl/runtime display_lm_tb.cc -lstdc++ ./yosys-display_lm_cc >yosys-display_lm_cc.log