diff --git a/.gitignore b/.gitignore index 6cf26bf260d..7f7bab74a77 100644 --- a/.gitignore +++ b/.gitignore @@ -43,6 +43,7 @@ ncscope.* tags .idea +**/.cache/ .vscode *.code-workspace *.eide.* @@ -57,4 +58,8 @@ vdso.lds # cherryusb libraries !components/drivers/usb/cherryusb/port/pusb2/*.a -!components/drivers/usb/cherryusb/port/xhci/phytium/*.a \ No newline at end of file +!components/drivers/usb/cherryusb/port/xhci/phytium/*.a + +# stm32cubemx +**/CubeMX_Config/Drivers/ +**/CubeMX_Config/MDK-ARM/ diff --git a/bsp/stm32/stm32f407-rt-spark/.ci/attachconfig/ci.attachconfig.yml b/bsp/stm32/stm32f407-rt-spark/.ci/attachconfig/ci.attachconfig.yml index 0ae089b8958..225e69772cc 100644 --- a/bsp/stm32/stm32f407-rt-spark/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/stm32/stm32f407-rt-spark/.ci/attachconfig/ci.attachconfig.yml @@ -1,6 +1,11 @@ scons.args: &scons scons_arg: - '--strict' +# ------ nano CI ------ +nano: + <<: *scons + kconfig: + - CONFIG_RT_USING_NANO=y # ------ kernel CI ------ kernel.klibc-stdlib: <<: *scons @@ -182,8 +187,11 @@ peripheral.sram: peripheral.usb_mouse: kconfig: - CONFIG_BSP_USING_USB_MOUSE=y -# ------ nano CI ------ -nano: - <<: *scons - kconfig: - - CONFIG_RT_USING_NANO=y \ No newline at end of file +# ------ component CI ------ +component.cherryusb_cdc: + kconfig: + - CONFIG_RT_USING_CHERRYUSB=y + - CONFIG_RT_CHERRYUSB_DEVICE=y + - CONFIG_RT_CHERRYUSB_DEVICE_DWC2_ST=y + - CONFIG_RT_CHERRYUSB_DEVICE_CDC_ACM=y + - CONFIG_RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM=y diff --git a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/SConscript b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/SConscript new file mode 100644 index 00000000000..b4b2b5c6b4d --- /dev/null +++ b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/SConscript @@ -0,0 +1,16 @@ +from building import * +import os + +cwd = GetCurrentDir() +group = [] +src = Glob('*.c') +CPPPATH = [cwd] + +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + group = group + SConscript(os.path.join(d, 'SConscript')) + +group = group + DefineGroup('cherryusb-port', src, depend = ['RT_CHERRYUSB_DEVICE'], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c new file mode 100644 index 00000000000..208b1d382f9 --- /dev/null +++ b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/cherryusb.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-17 Supperthomas first version + */ +#include "board.h" +#include "rtthread.h" +#include "drv_config.h" + +static PCD_HandleTypeDef hpcd_USB_OTG_FS; +void usb_dc_low_level_init(uint8_t busid) +{ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + HAL_PCD_MspInit(&hpcd_USB_OTG_FS); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + HAL_PCD_MspDeInit(&hpcd_USB_OTG_FS); +} + +#ifdef RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM +/* Register the EMAC device */ +static int rt_hw_stm32_cherryusb_cdc_init(void) +{ + extern void cdc_acm_init(uint8_t busid, uintptr_t reg_base); + cdc_acm_init(0, USB_OTG_FS_PERIPH_BASE); + + return 0; +} +INIT_COMPONENT_EXPORT(rt_hw_stm32_cherryusb_cdc_init); +static int cherry_usb_cdc_send(int argc, char **argv) +{ + extern void cdc_acm_data_send_with_dtr_test(uint8_t busid); + cdc_acm_data_send_with_dtr_test(0); + return 0; +} +MSH_CMD_EXPORT(cherry_usb_cdc_send, send the cdc data for test) +#endif + +#ifdef USBD_IRQ_HANDLER + void USBD_IRQ_HANDLER(void) +{ + extern void USBD_IRQHandler(uint8_t busid); + USBD_IRQHandler(0); +} +#else +#error USBD_IRQ_HANDLER need to USB IRQ like #define USBD_IRQ_HANDLER OTG_HS_IRQHandler +#endif + diff --git a/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h new file mode 100644 index 00000000000..23b6e865863 --- /dev/null +++ b/bsp/stm32/stm32f407-rt-spark/board/ports/cherryusb/usb_config.h @@ -0,0 +1,239 @@ +/* + * Copyright (c) 2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-17 Supperthomas first version + */ +#ifndef CHERRYUSB_CONFIG_H +#define CHERRYUSB_CONFIG_H + +/* ================ USB common Configuration ================ */ + +#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) + +#ifndef CONFIG_USB_DBG_LEVEL +#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO +#endif + +/* Enable print with color */ +#define CONFIG_USB_PRINTF_COLOR_ENABLE + +/* data align size when use dma */ +#ifndef CONFIG_USB_ALIGN_SIZE +#define CONFIG_USB_ALIGN_SIZE 4 +#endif + +/* attribute data into no cache ram */ +#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) + +/* ================= USB Device Stack Configuration ================ */ + +/* Ep0 in and out transfer buffer */ +#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN +#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512 +#endif + +/* Setup packet log for debug */ +// #define CONFIG_USBDEV_SETUP_LOG_PRINT + +/* Check if the input descriptor is correct */ +// #define CONFIG_USBDEV_DESC_CHECK + +/* Enable test mode */ +// #define CONFIG_USBDEV_TEST_MODE + +#ifndef CONFIG_USBDEV_MSC_MAX_LUN +#define CONFIG_USBDEV_MSC_MAX_LUN 1 +#endif + +#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE +#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512 +#endif + +#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING +#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING +#define CONFIG_USBDEV_MSC_PRODUCT_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_VERSION_STRING +#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01" +#endif + +// #define CONFIG_USBDEV_MSC_THREAD + +#ifndef CONFIG_USBDEV_MSC_PRIO +#define CONFIG_USBDEV_MSC_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MSC_STACKSIZE +#define CONFIG_USBDEV_MSC_STACKSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE +#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE +#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID +#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC +#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB" +#endif + +#define CONFIG_USBDEV_RNDIS_USING_LWIP + +/* ================ USB HOST Stack Configuration ================== */ + +#define CONFIG_USBHOST_MAX_RHPORTS 1 +#define CONFIG_USBHOST_MAX_EXTHUBS 1 +#define CONFIG_USBHOST_MAX_EHPORTS 4 +#define CONFIG_USBHOST_MAX_INTERFACES 8 +#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8 +#define CONFIG_USBHOST_MAX_ENDPOINTS 4 + +#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4 +#define CONFIG_USBHOST_MAX_HID_CLASS 4 +#define CONFIG_USBHOST_MAX_MSC_CLASS 2 +#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1 +#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1 + +#define CONFIG_USBHOST_DEV_NAMELEN 16 + +#ifndef CONFIG_USBHOST_PSC_PRIO +#define CONFIG_USBHOST_PSC_PRIO 0 +#endif +#ifndef CONFIG_USBHOST_PSC_STACKSIZE +#define CONFIG_USBHOST_PSC_STACKSIZE 2048 +#endif + +//#define CONFIG_USBHOST_GET_STRING_DESC + +// #define CONFIG_USBHOST_MSOS_ENABLE +#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE +#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00 +#endif + +/* Ep0 max transfer buffer */ +#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN +#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512 +#endif + +#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT +#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500 +#endif + +#ifndef CONFIG_USBHOST_MSC_TIMEOUT +#define CONFIG_USBHOST_MSC_TIMEOUT 5000 +#endif + +/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, + * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS + */ +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE +#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048) +#endif +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE +#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048) +#endif + +/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, + * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS + */ +#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE +#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048) +#endif +#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE +#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048) +#endif + +#define CONFIG_USBHOST_BLUETOOTH_HCI_H4 +// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG + +#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE +#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048 +#endif +#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE +#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048 +#endif + +/* ================ USB Device Port Configuration ================*/ + +#ifndef CONFIG_USBDEV_MAX_BUS +#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip +#endif + +#ifndef CONFIG_USBDEV_EP_NUM +#define CONFIG_USBDEV_EP_NUM 4 +#endif + +/* ---------------- FSDEV Configuration ---------------- */ +//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference + +/* ---------------- DWC2 Configuration ---------------- */ +// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) +#define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX1_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) +// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) + +/* ---------------- MUSB Configuration ---------------- */ +// #define CONFIG_USB_MUSB_SUNXI + +/* ================ USB Host Port Configuration ==================*/ +#ifndef CONFIG_USBHOST_MAX_BUS +#define CONFIG_USBHOST_MAX_BUS 1 +#endif + +#ifndef CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USBHOST_PIPE_NUM 12 +#endif + +/* ---------------- EHCI Configuration ---------------- */ + +#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0) +#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 +#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_EHCI_QTD_NUM 3 +#define CONFIG_USB_EHCI_ITD_NUM 20 +// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE +// #define CONFIG_USB_EHCI_CONFIGFLAG +// #define CONFIG_USB_EHCI_ISO +// #define CONFIG_USB_EHCI_WITH_OHCI + +/* ---------------- OHCI Configuration ---------------- */ +#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) + +/* ---------------- XHCI Configuration ---------------- */ +#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) + +/* ---------------- DWC2 Configuration ---------------- */ +/* largest non-periodic USB packet used / 4 */ +// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4) +/* largest periodic USB packet used / 4 */ +// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4) +/* + * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario + */ +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE)) + +/* ---------------- MUSB Configuration ---------------- */ +// #define CONFIG_USB_MUSB_SUNXI + +#endif diff --git a/bsp/stm32/stm32f407-rt-spark/rtconfig.py b/bsp/stm32/stm32f407-rt-spark/rtconfig.py index 8195d720df5..d431276b007 100644 --- a/bsp/stm32/stm32f407-rt-spark/rtconfig.py +++ b/bsp/stm32/stm32f407-rt-spark/rtconfig.py @@ -19,7 +19,8 @@ PLATFORM = 'gcc' EXEC_PATH = r'C:\Users\XXYYZZ' elif CROSS_TOOL == 'keil': - PLATFORM = 'armcc' + PLATFORM = 'armclang' #KEIL AC6 + #PLATFORM = 'armcc' #KEIL AC5 EXEC_PATH = r'C:/Keil_v5' elif CROSS_TOOL == 'iar': PLATFORM = 'iccarm' @@ -28,7 +29,7 @@ PLATFORM = 'llvm-arm' EXEC_PATH = r'D:\Progrem\LLVMEmbeddedToolchainForArm-17.0.1-Windows-x86_64\bin' -if os.getenv('RTT_EXEC_PATH'): +if os.getenv('RTT_EXEC_PATH') and CROSS_TOOL == 'gcc': EXEC_PATH = os.getenv('RTT_EXEC_PATH') BUILD = 'debug' diff --git a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml index 8715453924d..f140eaecb6b 100644 --- a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml @@ -3,8 +3,92 @@ nano: - '--strict' kconfig: - CONFIG_RT_USING_NANO=y +component.ulog: + kconfig: + - CONFIG_RT_USING_ULOG=y devices.on_chip: - kconfig: - - CONFIG_BSP_USING_ON_CHIP_FLASH=y - - CONFIG_BSP_USING_ON_CHIP_FLASH_FATFS=y - - CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=2048 \ No newline at end of file + kconfig: + - CONFIG_BSP_USING_ON_CHIP_FLASH=y + - CONFIG_BSP_USING_ON_CHIP_FLASH_FATFS=y + - CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=2048 +device.usb.cdc: + kconfig: + - CONFIG_RT_USB_DEVICE_CDC=y + - CONFIG_BSP_USING_USBD=y +pkg.tools.coremark: + kconfig: + - CONFIG_PKG_USING_COREMARK=y +pkg.kernel_sample: + kconfig: + - CONFIG_RT_USING_SIGNALS=y + - CONFIG_PKG_USING_KERNEL_SAMPLES=y + - CONFIG_PKG_USING_KERNEL_SAMPLES_ZH=y + - CONFIG_KERNEL_SAMPLES_USING_THREAD=y + - CONFIG_KERNEL_SAMPLES_USING_SEMAPHORE=y + - CONFIG_KERNEL_SAMPLES_USING_MUTEX=y + - CONFIG_KERNEL_SAMPLES_USING_MAILBOX=y + - CONFIG_KERNEL_SAMPLES_USING_EVENT=y + - CONFIG_KERNEL_SAMPLES_USING_MESSAGEQUEUE=y + - CONFIG_KERNEL_SAMPLES_USING_TIMER=y + - CONFIG_KERNEL_SAMPLES_USING_HEAP=y + - CONFIG_KERNEL_SAMPLES_USING_MEMHEAP=y + - CONFIG_KERNEL_SAMPLES_USING_MEMPOOL=y + - CONFIG_KERNEL_SAMPLES_USING_IDLEHOOK=y + - CONFIG_KERNEL_SAMPLES_USING_SIGNAL=y + - CONFIG_KERNEL_SAMPLES_USING_INTERRUPT=y + - CONFIG_KERNEL_SAMPLES_USING_PRI_INVERSION=y + - CONFIG_KERNEL_SAMPLES_USING_TIME_SLICE=y + - CONFIG_KERNEL_SAMPLES_USING_SCHEDULER_HOOK=y + - CONFIG_KERNEL_SAMPLES_USING_PRODUCER_CONSUMER=y +pkg.kernel_en_sample: + kconfig: + - CONFIG_RT_USING_SIGNALS=y + - CONFIG_PKG_USING_KERNEL_SAMPLES=y + - CONFIG_PKG_USING_KERNEL_SAMPLES_EN=y + - CONFIG_KERNEL_SAMPLES_USING_THREAD=y + - CONFIG_KERNEL_SAMPLES_USING_SEMAPHORE=y + - CONFIG_KERNEL_SAMPLES_USING_MUTEX=y + - CONFIG_KERNEL_SAMPLES_USING_MAILBOX=y + - CONFIG_KERNEL_SAMPLES_USING_EVENT=y + - CONFIG_KERNEL_SAMPLES_USING_MESSAGEQUEUE=y + - CONFIG_KERNEL_SAMPLES_USING_TIMER=y + - CONFIG_KERNEL_SAMPLES_USING_HEAP=y + - CONFIG_KERNEL_SAMPLES_USING_MEMHEAP=y + - CONFIG_KERNEL_SAMPLES_USING_MEMPOOL=y + - CONFIG_KERNEL_SAMPLES_USING_IDLEHOOK=y + - CONFIG_KERNEL_SAMPLES_USING_SIGNAL=y + - CONFIG_KERNEL_SAMPLES_USING_INTERRUPT=y + - CONFIG_KERNEL_SAMPLES_USING_PRI_INVERSION=y + - CONFIG_KERNEL_SAMPLES_USING_TIME_SLICE=y + - CONFIG_KERNEL_SAMPLES_USING_SCHEDULER_HOOK=y + - CONFIG_KERNEL_SAMPLES_USING_PRODUCER_CONSUMER=y +pkg.peripheral.sample: + kconfig: + - CONFIG_PKG_USING_PERIPHERAL_SAMPLES=y + - CONFIG_PERIPHERAL_SAMPLES_USING_ADC=y + - CONFIG_PERIPHERAL_SAMPLES_USING_HWTIMER=y + - CONFIG_PERIPHERAL_SAMPLES_USING_I2C=y + - CONFIG_PERIPHERAL_SAMPLES_USING_IWDG=y + - CONFIG_PERIPHERAL_SAMPLES_USING_LED_BLINK=y + - CONFIG_PERIPHERAL_SAMPLES_USING_PIN=y + - CONFIG_PERIPHERAL_SAMPLES_USING_PWM=y + - CONFIG_PERIPHERAL_SAMPLES_USING_RTC=y + - CONFIG_PERIPHERAL_SAMPLES_USING_SD=y + - CONFIG_PERIPHERAL_SAMPLES_USING_SERIAL=y + - CONFIG_PERIPHERAL_SAMPLES_USING_SERIAL_DMA=y + - CONFIG_PERIPHERAL_SAMPLES_USING_SPI=y + - CONFIG_PERIPHERAL_SAMPLES_USING_CAN=y +# ------ component CI ------ +component.rtlink: + kconfig: + - CONFIG_RT_USING_ULOG=y + - CONFIG_RT_USING_RT_LINK=y + - CONFIG_PKG_USING_RT_LINK_HW=y + - CONFIG_PKG_PKG_RT_LINK_HW_DEVICE_NAME="lpuart1" +component.cherryusb_cdc: + kconfig: + - CONFIG_RT_USING_CHERRYUSB=y + - CONFIG_RT_CHERRYUSB_DEVICE=y + - CONFIG_RT_CHERRYUSB_DEVICE_DWC2_ST=y + - CONFIG_RT_CHERRYUSB_DEVICE_CDC_ACM=y + - CONFIG_RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM=y diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/.mxproject index ba9ddfda685..7b80e205d69 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/.mxproject @@ -1,8 +1,8 @@ [PreviousLibFiles] -LibFiles=Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_def.h;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ramfunc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usb.h;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_def.h;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ramfunc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usb.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l496xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\system_stm32l4xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; +LibFiles=Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_adc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_adc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_adc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_def.h;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_bus.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_crs.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_system.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_utils.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ramfunc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dmamux.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_can.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dac.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dac.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dac_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_iwdg.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_iwdg.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_lpuart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_qspi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rtc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_rtc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rtc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_sai.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_sai_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_spi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_spi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_spi_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usb.h;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c;Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_tim_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_adc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_adc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_adc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_def.h;Drivers\STM32L4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rcc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_bus.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_rcc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_crs.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_system.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_utils.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_flash_ramfunc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_gpio_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_gpio.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_i2c_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dma_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dma.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dmamux.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pwr_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_pwr.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_cortex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_exti.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_can.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dac.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_dac.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_dac_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_i2c.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_iwdg.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_iwdg.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_lpuart.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_uart_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_qspi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rtc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_rtc.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_rtc_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_sai.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_sai_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_spi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_spi.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_spi_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_tim.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_hal_pcd_ex.h;Drivers\STM32L4xx_HAL_Driver\Inc\stm32l4xx_ll_usb.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l496xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\system_stm32l4xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Include\system_stm32l4xx.h;Drivers\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; [PreviousUsedKeilFiles] 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+SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;..\Src\stm32l4xx_hal_timebase_tim.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c;..\Drivers\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c;..\\Src\system_stm32l4xx.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c;..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c;..\Drivers\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c;..\\Src\system_stm32l4xx.c;;; HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; CDefines=USE_HAL_DRIVER;STM32L496xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/main.h index afbeccdb74d..7b101e80ea0 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/main.h +++ b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -90,6 +90,7 @@ void Error_Handler(void); #define SWO_GPIO_Port GPIOB #define LD2_Pin GPIO_PIN_7 #define LD2_GPIO_Port GPIOB + /* USER CODE BEGIN Private defines */ /* USER CODE END Private defines */ @@ -99,5 +100,3 @@ void Error_Handler(void); #endif #endif /* __MAIN_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h index 6b3a93f3875..b32f241317e 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h +++ b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -1,40 +1,28 @@ +/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file stm32l4xx_hal_conf.h - * @brief HAL configuration file. + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32l4xx_hal_conf.h. ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2023 STMicroelectronics

+ * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ +/* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H +#ifndef STM32L4xx_HAL_CONF_H +#define STM32L4xx_HAL_CONF_H #ifdef __cplusplus extern "C" { @@ -47,12 +35,12 @@ /** * @brief This is the list of modules to be used in the HAL driver */ - #define HAL_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED /*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_CAN_MODULE_ENABLED */ +#define HAL_CAN_MODULE_ENABLED /*#define HAL_COMP_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED /*#define HAL_CRC_MODULE_ENABLED */ /*#define HAL_CRYP_MODULE_ENABLED */ #define HAL_DAC_MODULE_ENABLED @@ -78,11 +66,11 @@ /*#define HAL_OSPI_MODULE_ENABLED */ #define HAL_PCD_MODULE_ENABLED /*#define HAL_PKA_MODULE_ENABLED */ -#define HAL_QSPI_MODULE_ENABLED /*#define HAL_QSPI_MODULE_ENABLED */ +#define HAL_QSPI_MODULE_ENABLED /*#define HAL_RNG_MODULE_ENABLED */ #define HAL_RTC_MODULE_ENABLED -/*#define HAL_SAI_MODULE_ENABLED */ +#define HAL_SAI_MODULE_ENABLED /*#define HAL_SD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ @@ -98,7 +86,6 @@ /*#define HAL_PSSI_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED #define HAL_EXTI_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED #define HAL_RCC_MODULE_ENABLED #define HAL_FLASH_MODULE_ENABLED @@ -151,7 +138,7 @@ * @brief Internal Low Speed oscillator (LSI) value. */ #if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ + #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature.*/ @@ -161,11 +148,11 @@ * This value is used by the UART, RTC HAL module to compute the system frequency */ #if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ + #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/ #endif /* LSE_VALUE */ #if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ + #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ /** @@ -174,7 +161,7 @@ * frequency. */ #if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ + #define EXTERNAL_SAI1_CLOCK_VALUE 2097000U /*!< Value of the SAI1 External clock source in Hz*/ #endif /* EXTERNAL_SAI1_CLOCK_VALUE */ /** @@ -183,7 +170,7 @@ * frequency. */ #if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI2 External clock source in Hz*/ + #define EXTERNAL_SAI2_CLOCK_VALUE 2097000U /*!< Value of the SAI2 External clock source in Hz*/ #endif /* EXTERNAL_SAI2_CLOCK_VALUE */ /* Tip: To avoid modifying this file each time you need to use different HSE, @@ -194,8 +181,8 @@ * @brief This is the HAL system configuration section */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 0U #define INSTRUCTION_CACHE_ENABLE 1U @@ -208,6 +195,51 @@ */ /* #define USE_FULL_ASSERT 1U */ +/* ################## Register callback feature configuration ############### */ +/** + * @brief Set below the peripheral configuration to "1U" to add the support + * of HAL callback registration/deregistration feature for the HAL + * driver(s). This allows user application to provide specific callback + * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting + * the default weak callback functions (see each stm32l4xx_hal_ppp.h file + * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef + * for each PPP peripheral). + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U +#define USE_HAL_SD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U +#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U +#define USE_HAL_TSC_REGISTER_CALLBACKS 0U +#define USE_HAL_UART_REGISTER_CALLBACKS 0U +#define USE_HAL_USART_REGISTER_CALLBACKS 0U +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U + /* ################## SPI peripheral configuration ########################## */ /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver @@ -224,20 +256,14 @@ #ifdef HAL_RCC_MODULE_ENABLED #include "stm32l4xx_hal_rcc.h" - #include "stm32l4xx_hal_rcc_ex.h" #endif /* HAL_RCC_MODULE_ENABLED */ -#ifdef HAL_EXTI_MODULE_ENABLED - #include "stm32l4xx_hal_exti.h" -#endif /* HAL_EXTI_MODULE_ENABLED */ - #ifdef HAL_GPIO_MODULE_ENABLED #include "stm32l4xx_hal_gpio.h" #endif /* HAL_GPIO_MODULE_ENABLED */ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32l4xx_hal_dma.h" - #include "stm32l4xx_hal_dma_ex.h" #endif /* HAL_DMA_MODULE_ENABLED */ #ifdef HAL_DFSDM_MODULE_ENABLED @@ -256,6 +282,10 @@ #include "stm32l4xx_hal_can.h" #endif /* HAL_CAN_MODULE_ENABLED */ +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "Legacy/stm32l4xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + #ifdef HAL_COMP_MODULE_ENABLED #include "stm32l4xx_hal_comp.h" #endif /* HAL_COMP_MODULE_ENABLED */ @@ -284,6 +314,14 @@ #include "stm32l4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + #ifdef HAL_FIREWALL_MODULE_ENABLED #include "stm32l4xx_hal_firewall.h" #endif /* HAL_FIREWALL_MODULE_ENABLED */ @@ -296,26 +334,18 @@ #include "stm32l4xx_hal_hash.h" #endif /* HAL_HASH_MODULE_ENABLED */ -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32l4xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ #ifdef HAL_I2C_MODULE_ENABLED #include "stm32l4xx_hal_i2c.h" #endif /* HAL_I2C_MODULE_ENABLED */ +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + #ifdef HAL_IWDG_MODULE_ENABLED #include "stm32l4xx_hal_iwdg.h" #endif /* HAL_IWDG_MODULE_ENABLED */ @@ -332,6 +362,18 @@ #include "stm32l4xx_hal_ltdc.h" #endif /* HAL_LTDC_MODULE_ENABLED */ +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + #ifdef HAL_OPAMP_MODULE_ENABLED #include "stm32l4xx_hal_opamp.h" #endif /* HAL_OPAMP_MODULE_ENABLED */ @@ -340,9 +382,17 @@ #include "stm32l4xx_hal_ospi.h" #endif /* HAL_OSPI_MODULE_ENABLED */ +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + #ifdef HAL_PKA_MODULE_ENABLED #include "stm32l4xx_hal_pka.h" -#endif /* HAL_PWR_MODULE_ENABLED */ +#endif /* HAL_PKA_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l4xx_hal_pwr.h" @@ -368,6 +418,10 @@ #include "stm32l4xx_hal_sd.h" #endif /* HAL_SD_MODULE_ENABLED */ +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + #ifdef HAL_SMBUS_MODULE_ENABLED #include "stm32l4xx_hal_smbus.h" #endif /* HAL_SMBUS_MODULE_ENABLED */ @@ -376,6 +430,10 @@ #include "stm32l4xx_hal_spi.h" #endif /* HAL_SPI_MODULE_ENABLED */ +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + #ifdef HAL_SWPMI_MODULE_ENABLED #include "stm32l4xx_hal_swpmi.h" #endif /* HAL_SWPMI_MODULE_ENABLED */ @@ -396,39 +454,15 @@ #include "stm32l4xx_hal_usart.h" #endif /* HAL_USART_MODULE_ENABLED */ -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - #ifdef HAL_WWDG_MODULE_ENABLED #include "stm32l4xx_hal_wwdg.h" #endif /* HAL_WWDG_MODULE_ENABLED */ -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_GFXMMU_MODULE_ENABLED - #include "stm32l4xx_hal_gfxmmu.h" -#endif /* HAL_GFXMMU_MODULE_ENABLED */ - -#ifdef HAL_PSSI_MODULE_ENABLED - #include "stm32l4xx_hal_pssi.h" -#endif /* HAL_PSSI_MODULE_ENABLED */ - /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function + * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source * line number of the call that failed. * If expr is true, it returns no value. @@ -436,7 +470,7 @@ */ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ - void assert_failed(char *file, uint32_t line); + void assert_failed(uint8_t *file, uint32_t line); #else #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */ @@ -445,6 +479,4 @@ } #endif -#endif /* __STM32L4xx_HAL_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +#endif /* STM32L4xx_HAL_CONF_H */ diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h deleted file mode 100644 index 87507bd9f74..00000000000 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h +++ /dev/null @@ -1,70 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32l4xx_it.h - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_IT_H -#define __STM32L4xx_IT_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Private includes ----------------------------------------------------------*/ -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* Exported types ------------------------------------------------------------*/ -/* USER CODE BEGIN ET */ - -/* USER CODE END ET */ - -/* Exported constants --------------------------------------------------------*/ -/* USER CODE BEGIN EC */ - -/* USER CODE END EC */ - -/* Exported macro ------------------------------------------------------------*/ -/* USER CODE BEGIN EM */ - -/* USER CODE END EM */ - -/* Exported functions prototypes ---------------------------------------------*/ -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); -void TIM1_UP_TIM16_IRQHandler(void); -/* USER CODE BEGIN EFP */ - -/* USER CODE END EFP */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_IT_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/STM32L496ZG.ioc b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/STM32L496ZG.ioc index b77fb19df9f..54c05d45aa2 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/STM32L496ZG.ioc +++ b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/STM32L496ZG.ioc @@ -1,62 +1,106 @@ #MicroXplorer Configuration settings - do not modify +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,SingleDiff-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Rank-0\#ChannelRegularConversion=1 +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 +ADC1.SingleDiff-0\#ChannelRegularConversion=ADC_DIFFERENTIAL_ENDED +ADC1.master=1 CAD.formats= CAD.pinconfig= CAD.provider= +CAN1.CalculateBaudRate=833333 +CAN1.CalculateTimeBit=1200 +CAN1.CalculateTimeQuantum=400.0 +CAN1.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate File.Version=6 GPIO.groupedBy=Group By Peripherals +I2C1.IPParameters=Timing +I2C1.Timing=0x00D09BE3 KeepUserPlacement=false LPUART1.BaudRate=115200 LPUART1.IPParameters=BaudRate,WordLength LPUART1.WordLength=UART_WORDLENGTH_8B Mcu.CPN=STM32L496ZGT3 Mcu.Family=STM32L4 -Mcu.IP0=LPUART1 -Mcu.IP1=NVIC -Mcu.IP2=RCC -Mcu.IP3=SYS -Mcu.IP4=TIM2 -Mcu.IP5=TIM4 -Mcu.IP6=USB_OTG_FS -Mcu.IPNb=7 +Mcu.IP0=ADC1 +Mcu.IP1=CAN1 +Mcu.IP10=SAI1 +Mcu.IP11=SPI1 +Mcu.IP12=SYS +Mcu.IP13=TIM2 +Mcu.IP14=TIM4 +Mcu.IP15=USB_OTG_FS +Mcu.IP2=DAC1 +Mcu.IP3=I2C1 +Mcu.IP4=IWDG +Mcu.IP5=LPUART1 +Mcu.IP6=NVIC +Mcu.IP7=QUADSPI +Mcu.IP8=RCC +Mcu.IP9=RTC +Mcu.IPNb=16 Mcu.Name=STM32L496Z(E-G)Tx Mcu.Package=LQFP144 -Mcu.Pin0=PC13 -Mcu.Pin1=PC14-OSC32_IN (PC14) -Mcu.Pin10=PD15 -Mcu.Pin11=PG5 -Mcu.Pin12=PG6 -Mcu.Pin13=PG7 -Mcu.Pin14=PG8 -Mcu.Pin15=PA8 -Mcu.Pin16=PA9 -Mcu.Pin17=PA10 -Mcu.Pin18=PA11 -Mcu.Pin19=PA12 -Mcu.Pin2=PC15-OSC32_OUT (PC15) -Mcu.Pin20=PA13 (JTMS/SWDIO) -Mcu.Pin21=PA14 (JTCK/SWCLK) -Mcu.Pin22=PB3 (JTDO/TRACESWO) -Mcu.Pin23=PB7 -Mcu.Pin24=VP_SYS_VS_tim1 -Mcu.Pin3=PH1-OSC_OUT (PH1) -Mcu.Pin4=PA2 -Mcu.Pin5=PA3 -Mcu.Pin6=PB14 -Mcu.Pin7=PD12 -Mcu.Pin8=PD13 -Mcu.Pin9=PD14 -Mcu.PinsNb=25 +Mcu.Pin0=PE4 +Mcu.Pin1=PE5 +Mcu.Pin10=PC0 +Mcu.Pin11=PC1 +Mcu.Pin12=PA1 +Mcu.Pin13=PA2 +Mcu.Pin14=PA3 +Mcu.Pin15=PA4 +Mcu.Pin16=PA6 +Mcu.Pin17=PA7 +Mcu.Pin18=PE11 +Mcu.Pin19=PB14 +Mcu.Pin2=PE6 +Mcu.Pin20=PD12 +Mcu.Pin21=PD13 +Mcu.Pin22=PD14 +Mcu.Pin23=PD15 +Mcu.Pin24=PG5 +Mcu.Pin25=PG6 +Mcu.Pin26=PG7 +Mcu.Pin27=PG8 +Mcu.Pin28=PA8 +Mcu.Pin29=PA9 +Mcu.Pin3=PC13 +Mcu.Pin30=PA10 +Mcu.Pin31=PA11 +Mcu.Pin32=PA12 +Mcu.Pin33=PA13 (JTMS/SWDIO) +Mcu.Pin34=PA14 (JTCK/SWCLK) +Mcu.Pin35=PD0 +Mcu.Pin36=PD1 +Mcu.Pin37=PG13 +Mcu.Pin38=PG14 +Mcu.Pin39=PB3 (JTDO/TRACESWO) +Mcu.Pin4=PC14-OSC32_IN (PC14) +Mcu.Pin40=PB7 +Mcu.Pin41=VP_IWDG_VS_IWDG +Mcu.Pin42=VP_RTC_VS_RTC_Activate +Mcu.Pin43=VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC +Mcu.Pin44=VP_SYS_VS_tim1 +Mcu.Pin5=PC15-OSC32_OUT (PC15) +Mcu.Pin6=PF8 +Mcu.Pin7=PF9 +Mcu.Pin8=PF10 +Mcu.Pin9=PH1-OSC_OUT (PH1) +Mcu.PinsNb=45 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32L496ZGTx -MxCube.Version=5.5.0 -MxDb.Version=DB.5.0.50 +MxCube.Version=6.13.0 +MxDb.Version=DB.6.0.130 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false @@ -65,6 +109,8 @@ NVIC.TIM1_UP_TIM16_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.TimeBase=TIM1_UP_TIM16_IRQn NVIC.TimeBaseIP=TIM1 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +PA1.Mode=Full_Duplex_Master +PA1.Signal=SPI1_SCK PA10.GPIOParameters=GPIO_Label PA10.GPIO_Label=USB_ID PA10.Locked=true @@ -91,6 +137,11 @@ PA14\ (JTCK/SWCLK).Mode=Trace_Asynchronous_SW PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK PA2.Signal=S_TIM2_CH3 PA3.Signal=S_TIM2_CH4 +PA4.Signal=COMP_DAC11_group +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI PA8.GPIOParameters=GPIO_Label PA8.GPIO_Label=USB_SOF [TP1] PA8.Locked=true @@ -114,6 +165,8 @@ PB7.GPIOParameters=GPIO_Label PB7.GPIO_Label=LD2 [Blue] PB7.Locked=true PB7.Signal=GPIO_Output +PC0.Signal=ADCx_IN1 +PC1.Signal=ADCx_IN2 PC13.GPIOParameters=GPIO_Label PC13.GPIO_Label=B1 PC13.Locked=true @@ -124,10 +177,32 @@ PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN PC15-OSC32_OUT\ (PC15).Locked=true PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PD0.Mode=CAN_Activate +PD0.Signal=CAN1_RX +PD1.Mode=CAN_Activate +PD1.Signal=CAN1_TX PD12.Signal=S_TIM4_CH1 PD13.Signal=S_TIM4_CH2 PD14.Signal=S_TIM4_CH3 PD15.Signal=S_TIM4_CH4 +PE11.Mode=Single Bank 1 2IOs +PE11.Signal=QUADSPI_BK1_NCS +PE4.Mode=SAI_A_Master +PE4.Signal=SAI1_FS_A +PE5.Mode=SAI_A_Master +PE5.Signal=SAI1_SCK_A +PE6.Mode=SAI_A_Master +PE6.Signal=SAI1_SD_A +PF10.Mode=Single Bank 1 2IOs +PF10.Signal=QUADSPI_CLK +PF8.Mode=Single Bank 1 2IOs +PF8.Signal=QUADSPI_BK1_IO0 +PF9.Mode=Single Bank 1 2IOs +PF9.Signal=QUADSPI_BK1_IO1 +PG13.Mode=I2C +PG13.Signal=I2C1_SDA +PG14.Mode=I2C +PG14.Signal=I2C1_SCL PG5.GPIOParameters=GPIO_Label PG5.GPIO_Label=USB_OverCurrent [STMPS2151STR_FAULT] PG5.Locked=true @@ -158,7 +233,7 @@ ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32L496ZGTx -ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.18.1 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x1000 @@ -176,8 +251,10 @@ ProjectManager.RegisterCallBack= ProjectManager.StackSize=0x1000 ProjectManager.TargetToolchain=MDK-ARM V5 ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,5-MX_TIM2_Init-TIM2-false-HAL-true,6-MX_TIM4_Init-TIM4-false-HAL-true,7-MX_CAN1_Init-CAN1-false-HAL-true,8-MX_ADC1_Init-ADC1-false-HAL-true,9-MX_DAC1_Init-DAC1-false-HAL-true,10-MX_I2C1_Init-I2C1-false-HAL-true,11-MX_IWDG_Init-IWDG-false-HAL-true,12-MX_QUADSPI_Init-QUADSPI-false-HAL-true,13-MX_RTC_Init-RTC-false-HAL-true,14-MX_SAI1_Init-SAI1-false-HAL-true,15-MX_SPI1_Init-SPI1-false-HAL-true RCC.48MHZClocksFreq_Value=24000000 RCC.ADC12outputFreq_Value=72000000 RCC.ADC34outputFreq_Value=72000000 @@ -277,6 +354,20 @@ RCC.VCOSAI1OutputFreq_Value=96000000 RCC.VCOSAI2OutputFreq_Value=32000000 RCC.VcooutputI2S=48000000 RCC.WatchDogFreq_Value=32000 +SAI1.ErrorAudioFreq-SAI_A_Master=-2.34 % +SAI1.IPParameters=Instance-SAI_A_Master,VirtualMode-SAI_A_Master,MClockEnable-SAI_A_Master,RealAudioFreq-SAI_A_Master,ErrorAudioFreq-SAI_A_Master,InitProtocol-SAI_A_Master,VirtualProtocol-SAI_A_BASIC +SAI1.InitProtocol-SAI_A_Master=Enable +SAI1.Instance-SAI_A_Master=SAI$Index_Block_A +SAI1.MClockEnable-SAI_A_Master=SAI_MASTERCLOCK_DISABLE +SAI1.RealAudioFreq-SAI_A_Master=187.5 KHz +SAI1.VirtualMode-SAI_A_Master=VM_MASTER +SAI1.VirtualProtocol-SAI_A_BASIC=VM_BASIC_PROTOCOL +SH.ADCx_IN1.0=ADC1_IN1,IN1-Differential +SH.ADCx_IN1.ConfNb=1 +SH.ADCx_IN2.0=ADC1_IN2,IN1-Differential +SH.ADCx_IN2.ConfNb=1 +SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1 +SH.COMP_DAC11_group.ConfNb=1 SH.GPXTI13.0=GPIO_EXTI13 SH.GPXTI13.ConfNb=1 SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3 @@ -291,6 +382,11 @@ SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3 SH.S_TIM4_CH3.ConfNb=1 SH.S_TIM4_CH4.0=TIM4_CH4,PWM Generation4 CH4 SH.S_TIM4_CH4.ConfNb=1 +SPI1.CalculateBaudRate=40.0 MBits/s +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER TIM2.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 TIM2.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 @@ -301,6 +397,12 @@ TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 TIM4.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 USB_OTG_FS.IPParameters=VirtualMode USB_OTG_FS.VirtualMode=Device_Only +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG +VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled +VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate +VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Mode=SAI_A_BASIC +VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Signal=SAI1_VP_$IpInstance_SAIA_SAI_BASIC VP_SYS_VS_tim1.Mode=TIM1 VP_SYS_VS_tim1.Signal=SYS_VS_tim1 board=NUCLEO-L496ZG diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index 05ea0bf14e8..55cfb26e358 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -65,6 +65,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); */ void HAL_MspInit(void) { + /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ @@ -79,6 +80,277 @@ void HAL_MspInit(void) /* USER CODE END MspInit 1 */ } +/** +* @brief ADC MSP Initialization +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ADC_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + PC1 ------> ADC1_IN2 + */ + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + + } + +} + +/** +* @brief ADC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspDeInit 0 */ + + /* USER CODE END ADC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ADC_CLK_DISABLE(); + + /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + PC1 ------> ADC1_IN2 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1); + + /* USER CODE BEGIN ADC1_MspDeInit 1 */ + + /* USER CODE END ADC1_MspDeInit 1 */ + } + +} + +/** +* @brief CAN MSP Initialization +* This function configures the hardware resources used in this example +* @param hcan: CAN handle pointer +* @retval None +*/ +void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hcan->Instance==CAN1) + { + /* USER CODE BEGIN CAN1_MspInit 0 */ + + /* USER CODE END CAN1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_CAN1_CLK_ENABLE(); + + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**CAN1 GPIO Configuration + PD0 ------> CAN1_RX + PD1 ------> CAN1_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF9_CAN1; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN CAN1_MspInit 1 */ + + /* USER CODE END CAN1_MspInit 1 */ + + } + +} + +/** +* @brief CAN MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hcan: CAN handle pointer +* @retval None +*/ +void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) +{ + if(hcan->Instance==CAN1) + { + /* USER CODE BEGIN CAN1_MspDeInit 0 */ + + /* USER CODE END CAN1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_CAN1_CLK_DISABLE(); + + /**CAN1 GPIO Configuration + PD0 ------> CAN1_RX + PD1 ------> CAN1_TX + */ + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1); + + /* USER CODE BEGIN CAN1_MspDeInit 1 */ + + /* USER CODE END CAN1_MspDeInit 1 */ + } + +} + +/** +* @brief DAC MSP Initialization +* This function configures the hardware resources used in this example +* @param hdac: DAC handle pointer +* @retval None +*/ +void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hdac->Instance==DAC1) + { + /* USER CODE BEGIN DAC1_MspInit 0 */ + + /* USER CODE END DAC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_DAC1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**DAC1 GPIO Configuration + PA4 ------> DAC1_OUT1 + */ + GPIO_InitStruct.Pin = GPIO_PIN_4; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN DAC1_MspInit 1 */ + + /* USER CODE END DAC1_MspInit 1 */ + + } + +} + +/** +* @brief DAC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hdac: DAC handle pointer +* @retval None +*/ +void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) +{ + if(hdac->Instance==DAC1) + { + /* USER CODE BEGIN DAC1_MspDeInit 0 */ + + /* USER CODE END DAC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_DAC1_CLK_DISABLE(); + + /**DAC1 GPIO Configuration + PA4 ------> DAC1_OUT1 + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4); + + /* USER CODE BEGIN DAC1_MspDeInit 1 */ + + /* USER CODE END DAC1_MspDeInit 1 */ + } + +} + +/** +* @brief I2C MSP Initialization +* This function configures the hardware resources used in this example +* @param hi2c: I2C handle pointer +* @retval None +*/ +void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + if(hi2c->Instance==I2C1) + { + /* USER CODE BEGIN I2C1_MspInit 0 */ + + /* USER CODE END I2C1_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1; + PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + __HAL_RCC_GPIOG_CLK_ENABLE(); + HAL_PWREx_EnableVddIO2(); + /**I2C1 GPIO Configuration + PG13 ------> I2C1_SDA + PG14 ------> I2C1_SCL + */ + GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_I2C1_CLK_ENABLE(); + /* USER CODE BEGIN I2C1_MspInit 1 */ + + /* USER CODE END I2C1_MspInit 1 */ + + } + +} + +/** +* @brief I2C MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hi2c: I2C handle pointer +* @retval None +*/ +void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) +{ + if(hi2c->Instance==I2C1) + { + /* USER CODE BEGIN I2C1_MspDeInit 0 */ + + /* USER CODE END I2C1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_I2C1_CLK_DISABLE(); + + /**I2C1 GPIO Configuration + PG13 ------> I2C1_SDA + PG14 ------> I2C1_SCL + */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_13); + + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14); + + /* USER CODE BEGIN I2C1_MspDeInit 1 */ + + /* USER CODE END I2C1_MspDeInit 1 */ + } + +} + /** * @brief UART MSP Initialization * This function configures the hardware resources used in this example @@ -88,11 +360,22 @@ void HAL_MspInit(void) void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; if(huart->Instance==LPUART1) { /* USER CODE BEGIN LPUART1_MspInit 0 */ /* USER CODE END LPUART1_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + /* Peripheral clock enable */ __HAL_RCC_LPUART1_CLK_ENABLE(); @@ -112,6 +395,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) /* USER CODE BEGIN LPUART1_MspInit 1 */ /* USER CODE END LPUART1_MspInit 1 */ + } } @@ -145,6 +429,217 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } +/** +* @brief QSPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hqspi: QSPI handle pointer +* @retval None +*/ +void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hqspi->Instance==QUADSPI) + { + /* USER CODE BEGIN QUADSPI_MspInit 0 */ + + /* USER CODE END QUADSPI_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_QSPI_CLK_ENABLE(); + + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + /**QUADSPI GPIO Configuration + PF8 ------> QUADSPI_BK1_IO0 + PF9 ------> QUADSPI_BK1_IO1 + PF10 ------> QUADSPI_CLK + PE11 ------> QUADSPI_BK1_NCS + */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF3_QUADSPI; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* USER CODE BEGIN QUADSPI_MspInit 1 */ + + /* USER CODE END QUADSPI_MspInit 1 */ + + } + +} + +/** +* @brief QSPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hqspi: QSPI handle pointer +* @retval None +*/ +void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi) +{ + if(hqspi->Instance==QUADSPI) + { + /* USER CODE BEGIN QUADSPI_MspDeInit 0 */ + + /* USER CODE END QUADSPI_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_QSPI_CLK_DISABLE(); + + /**QUADSPI GPIO Configuration + PF8 ------> QUADSPI_BK1_IO0 + PF9 ------> QUADSPI_BK1_IO1 + PF10 ------> QUADSPI_CLK + PE11 ------> QUADSPI_BK1_NCS + */ + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10); + + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_11); + + /* USER CODE BEGIN QUADSPI_MspDeInit 1 */ + + /* USER CODE END QUADSPI_MspDeInit 1 */ + } + +} + +/** +* @brief RTC MSP Initialization +* This function configures the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ +void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) +{ + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN RTC_MspInit 0 */ + + /* USER CODE END RTC_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC; + PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + + /* Peripheral clock enable */ + __HAL_RCC_RTC_ENABLE(); + /* USER CODE BEGIN RTC_MspInit 1 */ + + /* USER CODE END RTC_MspInit 1 */ + + } + +} + +/** +* @brief RTC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ +void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) +{ + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN RTC_MspDeInit 0 */ + + /* USER CODE END RTC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_RTC_DISABLE(); + /* USER CODE BEGIN RTC_MspDeInit 1 */ + + /* USER CODE END RTC_MspDeInit 1 */ + } + +} + +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA1 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA1 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + +} + /** * @brief TIM_PWM MSP Initialization * This function configures the hardware resources used in this example @@ -310,9 +805,13 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) { HAL_PWREx_EnableVddUSB(); } + /* USB_OTG_FS interrupt Init */ + HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(OTG_FS_IRQn); /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ /* USER CODE END USB_OTG_FS_MspInit 1 */ + } } @@ -354,6 +853,9 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) { HAL_PWREx_DisableVddUSB(); } + + /* USB_OTG_FS interrupt DeInit */ + HAL_NVIC_DisableIRQ(OTG_FS_IRQn); /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ /* USER CODE END USB_OTG_FS_MspDeInit 1 */ @@ -361,8 +863,59 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) } +static uint32_t SAI1_client =0; + +void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai) +{ + + GPIO_InitTypeDef GPIO_InitStruct; +/* SAI1 */ + if(hsai->Instance==SAI1_Block_A) + { + /* Peripheral clock enable */ + if (SAI1_client == 0) + { + __HAL_RCC_SAI1_CLK_ENABLE(); + } + SAI1_client ++; + + /**SAI1_A_Block_A GPIO Configuration + PE4 ------> SAI1_FS_A + PE5 ------> SAI1_SCK_A + PE6 ------> SAI1_SD_A + */ + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF13_SAI1; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + } +} + +void HAL_SAI_MspDeInit(SAI_HandleTypeDef* hsai) +{ +/* SAI1 */ + if(hsai->Instance==SAI1_Block_A) + { + SAI1_client --; + if (SAI1_client == 0) + { + /* Peripheral clock disable */ + __HAL_RCC_SAI1_CLK_DISABLE(); + } + + /**SAI1_A_Block_A GPIO Configuration + PE4 ------> SAI1_FS_A + PE5 ------> SAI1_SCK_A + PE6 ------> SAI1_SD_A + */ + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6); + + } +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c b/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c deleted file mode 100644 index 2138be8af5a..00000000000 --- a/bsp/stm32/stm32l496-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c +++ /dev/null @@ -1,218 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32l4xx_it.c - * @brief Interrupt Service Routines. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "stm32l4xx_it.h" -/* Private includes ----------------------------------------------------------*/ -/* USER CODE BEGIN Includes */ -/* USER CODE END Includes */ - -/* Private typedef -----------------------------------------------------------*/ -/* USER CODE BEGIN TD */ - -/* USER CODE END TD */ - -/* Private define ------------------------------------------------------------*/ -/* USER CODE BEGIN PD */ - -/* USER CODE END PD */ - -/* Private macro -------------------------------------------------------------*/ -/* USER CODE BEGIN PM */ - -/* USER CODE END PM */ - -/* Private variables ---------------------------------------------------------*/ -/* USER CODE BEGIN PV */ - -/* USER CODE END PV */ - -/* Private function prototypes -----------------------------------------------*/ -/* USER CODE BEGIN PFP */ - -/* USER CODE END PFP */ - -/* Private user code ---------------------------------------------------------*/ -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* External variables --------------------------------------------------------*/ -extern TIM_HandleTypeDef htim1; - -/* USER CODE BEGIN EV */ - -/* USER CODE END EV */ - -/******************************************************************************/ -/* Cortex-M4 Processor Interruption and Exception Handlers */ -/******************************************************************************/ -/** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ - /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - -/** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_HardFault_IRQn 0 */ - /* USER CODE END W1_HardFault_IRQn 0 */ - } -} - -/** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ - /* USER CODE END W1_MemoryManagement_IRQn 0 */ - } -} - -/** - * @brief This function handles Prefetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_BusFault_IRQn 0 */ - /* USER CODE END W1_BusFault_IRQn 0 */ - } -} - -/** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ - /* USER CODE END W1_UsageFault_IRQn 0 */ - } -} - -/** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ - /* USER CODE BEGIN SVCall_IRQn 0 */ - - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ - - /* USER CODE END SVCall_IRQn 1 */ -} - -/** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ - /* USER CODE BEGIN DebugMonitor_IRQn 0 */ - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - -/** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ - /* USER CODE BEGIN PendSV_IRQn 0 */ - - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ - - /* USER CODE END PendSV_IRQn 1 */ -} - -/** - * @brief This function handles System tick timer. - */ -void SysTick_Handler(void) -{ - /* USER CODE BEGIN SysTick_IRQn 0 */ - - /* USER CODE END SysTick_IRQn 0 */ - - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} - -/******************************************************************************/ -/* STM32L4xx Peripheral Interrupt Handlers */ -/* Add here the Interrupt Handlers for the used peripherals. */ -/* For the available peripheral interrupt handler names, */ -/* please refer to the startup file (startup_stm32l4xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles TIM1 update interrupt and TIM16 global interrupt. - */ -void TIM1_UP_TIM16_IRQHandler(void) -{ - /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */ - - /* USER CODE END TIM1_UP_TIM16_IRQn 0 */ - HAL_TIM_IRQHandler(&htim1); - /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */ - - /* USER CODE END TIM1_UP_TIM16_IRQn 1 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-st-nucleo/board/SConscript b/bsp/stm32/stm32l496-st-nucleo/board/SConscript index 99630cb0d29..05654a9f9ca 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/SConscript +++ b/bsp/stm32/stm32l496-st-nucleo/board/SConscript @@ -19,4 +19,9 @@ CPPDEFINES = ['STM32L496xx'] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + Return('group') diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/SConscript b/bsp/stm32/stm32l496-st-nucleo/board/port/SConscript new file mode 100644 index 00000000000..ca95be14e2b --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/SConscript @@ -0,0 +1,12 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/SConscript b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/SConscript new file mode 100644 index 00000000000..b4b2b5c6b4d --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/SConscript @@ -0,0 +1,16 @@ +from building import * +import os + +cwd = GetCurrentDir() +group = [] +src = Glob('*.c') +CPPPATH = [cwd] + +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + group = group + SConscript(os.path.join(d, 'SConscript')) + +group = group + DefineGroup('cherryusb-port', src, depend = ['RT_CHERRYUSB_DEVICE'], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c new file mode 100644 index 00000000000..208b1d382f9 --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/cherryusb.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-17 Supperthomas first version + */ +#include "board.h" +#include "rtthread.h" +#include "drv_config.h" + +static PCD_HandleTypeDef hpcd_USB_OTG_FS; +void usb_dc_low_level_init(uint8_t busid) +{ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + HAL_PCD_MspInit(&hpcd_USB_OTG_FS); +} + +void usb_dc_low_level_deinit(uint8_t busid) +{ + HAL_PCD_MspDeInit(&hpcd_USB_OTG_FS); +} + +#ifdef RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM +/* Register the EMAC device */ +static int rt_hw_stm32_cherryusb_cdc_init(void) +{ + extern void cdc_acm_init(uint8_t busid, uintptr_t reg_base); + cdc_acm_init(0, USB_OTG_FS_PERIPH_BASE); + + return 0; +} +INIT_COMPONENT_EXPORT(rt_hw_stm32_cherryusb_cdc_init); +static int cherry_usb_cdc_send(int argc, char **argv) +{ + extern void cdc_acm_data_send_with_dtr_test(uint8_t busid); + cdc_acm_data_send_with_dtr_test(0); + return 0; +} +MSH_CMD_EXPORT(cherry_usb_cdc_send, send the cdc data for test) +#endif + +#ifdef USBD_IRQ_HANDLER + void USBD_IRQ_HANDLER(void) +{ + extern void USBD_IRQHandler(uint8_t busid); + USBD_IRQHandler(0); +} +#else +#error USBD_IRQ_HANDLER need to USB IRQ like #define USBD_IRQ_HANDLER OTG_HS_IRQHandler +#endif + diff --git a/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h new file mode 100644 index 00000000000..8918959bf72 --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/board/port/cherryusb/usb_config.h @@ -0,0 +1,239 @@ +/* + * Copyright (c) 2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-17 Supperthomas first version + */ +#ifndef CHERRYUSB_CONFIG_H +#define CHERRYUSB_CONFIG_H + +/* ================ USB common Configuration ================ */ + +#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) + +#ifndef CONFIG_USB_DBG_LEVEL +#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO +#endif + +/* Enable print with color */ +#define CONFIG_USB_PRINTF_COLOR_ENABLE + +/* data align size when use dma */ +#ifndef CONFIG_USB_ALIGN_SIZE +#define CONFIG_USB_ALIGN_SIZE 4 +#endif + +/* attribute data into no cache ram */ +#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) + +/* ================= USB Device Stack Configuration ================ */ + +/* Ep0 in and out transfer buffer */ +#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN +#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512 +#endif + +/* Setup packet log for debug */ +// #define CONFIG_USBDEV_SETUP_LOG_PRINT + +/* Check if the input descriptor is correct */ +// #define CONFIG_USBDEV_DESC_CHECK + +/* Enable test mode */ +// #define CONFIG_USBDEV_TEST_MODE + +#ifndef CONFIG_USBDEV_MSC_MAX_LUN +#define CONFIG_USBDEV_MSC_MAX_LUN 1 +#endif + +#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE +#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512 +#endif + +#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING +#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING +#define CONFIG_USBDEV_MSC_PRODUCT_STRING "" +#endif + +#ifndef CONFIG_USBDEV_MSC_VERSION_STRING +#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01" +#endif + +// #define CONFIG_USBDEV_MSC_THREAD + +#ifndef CONFIG_USBDEV_MSC_PRIO +#define CONFIG_USBDEV_MSC_PRIO 4 +#endif + +#ifndef CONFIG_USBDEV_MSC_STACKSIZE +#define CONFIG_USBDEV_MSC_STACKSIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE +#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE +#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 2048 +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID +#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff +#endif + +#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC +#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB" +#endif + +#define CONFIG_USBDEV_RNDIS_USING_LWIP + +/* ================ USB HOST Stack Configuration ================== */ + +#define CONFIG_USBHOST_MAX_RHPORTS 1 +#define CONFIG_USBHOST_MAX_EXTHUBS 1 +#define CONFIG_USBHOST_MAX_EHPORTS 4 +#define CONFIG_USBHOST_MAX_INTERFACES 8 +#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8 +#define CONFIG_USBHOST_MAX_ENDPOINTS 4 + +#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4 +#define CONFIG_USBHOST_MAX_HID_CLASS 4 +#define CONFIG_USBHOST_MAX_MSC_CLASS 2 +#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1 +#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1 + +#define CONFIG_USBHOST_DEV_NAMELEN 16 + +#ifndef CONFIG_USBHOST_PSC_PRIO +#define CONFIG_USBHOST_PSC_PRIO 0 +#endif +#ifndef CONFIG_USBHOST_PSC_STACKSIZE +#define CONFIG_USBHOST_PSC_STACKSIZE 2048 +#endif + +//#define CONFIG_USBHOST_GET_STRING_DESC + +// #define CONFIG_USBHOST_MSOS_ENABLE +#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE +#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00 +#endif + +/* Ep0 max transfer buffer */ +#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN +#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512 +#endif + +#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT +#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500 +#endif + +#ifndef CONFIG_USBHOST_MSC_TIMEOUT +#define CONFIG_USBHOST_MSC_TIMEOUT 5000 +#endif + +/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, + * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS + */ +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE +#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048) +#endif +#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE +#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048) +#endif + +/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size, + * you can change with 2K,4K,8K,16K,default is 2K to get one TCP_MSS + */ +#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE +#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048) +#endif +#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE +#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048) +#endif + +#define CONFIG_USBHOST_BLUETOOTH_HCI_H4 +// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG + +#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE +#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048 +#endif +#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE +#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048 +#endif + +/* ================ USB Device Port Configuration ================*/ + +#ifndef CONFIG_USBDEV_MAX_BUS +#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip +#endif + +#ifndef CONFIG_USBDEV_EP_NUM +#define CONFIG_USBDEV_EP_NUM 6 +#endif + +/* ---------------- FSDEV Configuration ---------------- */ +//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference + +/* ---------------- DWC2 Configuration ---------------- */ +// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4) +#define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX1_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4) +#define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4) +#define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4) +// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4) + +/* ---------------- MUSB Configuration ---------------- */ +// #define CONFIG_USB_MUSB_SUNXI + +/* ================ USB Host Port Configuration ==================*/ +#ifndef CONFIG_USBHOST_MAX_BUS +#define CONFIG_USBHOST_MAX_BUS 1 +#endif + +#ifndef CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USBHOST_PIPE_NUM 12 +#endif + +/* ---------------- EHCI Configuration ---------------- */ + +#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0) +#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024 +#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_EHCI_QTD_NUM 3 +#define CONFIG_USB_EHCI_ITD_NUM 20 +// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE +// #define CONFIG_USB_EHCI_CONFIGFLAG +// #define CONFIG_USB_EHCI_ISO +// #define CONFIG_USB_EHCI_WITH_OHCI + +/* ---------------- OHCI Configuration ---------------- */ +#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) + +/* ---------------- XHCI Configuration ---------------- */ +#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) + +/* ---------------- DWC2 Configuration ---------------- */ +/* largest non-periodic USB packet used / 4 */ +// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4) +/* largest periodic USB packet used / 4 */ +// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4) +/* + * (largest USB packet used / 4) + 1 for status information + 1 transfer complete + + * 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario + */ +// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE)) + +/* ---------------- MUSB Configuration ---------------- */ +// #define CONFIG_USB_MUSB_SUNXI + +#endif diff --git a/bsp/stm32/stm32l496-st-nucleo/rtconfig.py b/bsp/stm32/stm32l496-st-nucleo/rtconfig.py index 13c34d6ba69..854005af192 100644 --- a/bsp/stm32/stm32l496-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l496-st-nucleo/rtconfig.py @@ -19,13 +19,14 @@ PLATFORM = 'gcc' EXEC_PATH = r'.' elif CROSS_TOOL == 'keil': - PLATFORM = 'armcc' + PLATFORM = 'armclang' #KEIL A6 + #PLATFORM = 'armcc' #KEIL A5 EXEC_PATH = r'C:/Keil_v5' elif CROSS_TOOL == 'iar': PLATFORM = 'iccarm' EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3' -if os.getenv('RTT_EXEC_PATH'): +if os.getenv('RTT_EXEC_PATH') and CROSS_TOOL == 'gcc': EXEC_PATH = os.getenv('RTT_EXEC_PATH') BUILD = 'debug' diff --git a/bsp/stm32/stm32l496-st-nucleo/template.uvoptx b/bsp/stm32/stm32l496-st-nucleo/template.uvoptx index 1a6a4989337..878ae0eab16 100644 --- a/bsp/stm32/stm32l496-st-nucleo/template.uvoptx +++ b/bsp/stm32/stm32l496-st-nucleo/template.uvoptx @@ -10,7 +10,7 @@ *.s*; *.src; *.a* *.obj; *.o *.lib - *.txt; *.h; *.inc + *.txt; *.h; *.inc; *.md *.plm *.cpp 0 @@ -103,7 +103,7 @@ 1 0 0 - 6 + 4 @@ -114,9 +114,14 @@ - STLink\ST-LINKIII-KEIL_SWO.dll + Segger\JL2CM3.dll + + 0 + JL2CM3 + -U260115105 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32L496ZGTx$CMSIS\Flash\STM32L4xx_1024.FLM) + 0 UL2CM3 diff --git a/bsp/stm32/stm32l496-st-nucleo/template.uvprojx b/bsp/stm32/stm32l496-st-nucleo/template.uvprojx index e70e8a688e9..61fcb9e0066 100644 --- a/bsp/stm32/stm32l496-st-nucleo/template.uvprojx +++ b/bsp/stm32/stm32l496-st-nucleo/template.uvprojx @@ -11,13 +11,13 @@ 0x4 ARM-ADS 5060750::V5.06 update 6 (build 750)::ARMCC - 0 + 1 STM32L496ZGTx STMicroelectronics - Keil.STM32L4xx_DFP.2.2.0 - http://www.keil.com/pack + Keil.STM32L4xx_DFP.2.6.1 + http://www.keil.com/pack/ IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -52,9 +52,9 @@ rt-thread 1 0 - 0 + 1 1 - 0 + 1 .\build\keil\List\ 1 0 @@ -185,6 +185,7 @@ 0 2 0 + 0 1 0 8 @@ -312,7 +313,7 @@ 1 - 1 + 2 0 0 1 @@ -321,14 +322,14 @@ 0 0 0 - 0 + 3 0 0 1 0 0 - 1 - 1 + 3 + 3 1 1 0 @@ -351,7 +352,7 @@ 0 0 0 - 0 + 4