From 0641646d974c03e479dc5210a3af90f979fbbbfe Mon Sep 17 00:00:00 2001
From: Ty Lamontagne <amfobes@gmail.com>
Date: Fri, 3 Jan 2025 12:43:17 -0500
Subject: [PATCH] EE Cache: Make the SIMD path x86 only to support ARM
 interpreters

---
 pcsx2/vtlb.cpp | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/pcsx2/vtlb.cpp b/pcsx2/vtlb.cpp
index 63be8b69369d6..c0d5919f3937f 100644
--- a/pcsx2/vtlb.cpp
+++ b/pcsx2/vtlb.cpp
@@ -30,7 +30,9 @@
 #include "fmt/core.h"
 
 #include <bit>
+#ifdef _M_X86
 #include <immintrin.h>
+#endif
 #include <map>
 #include <unordered_set>
 #include <unordered_map>
@@ -118,12 +120,13 @@ __inline int CheckCache(u32 addr)
 		return false;
 	}
 
+	size_t i = 0;
 	const size_t size = cachedTlbs.count;
+
+#ifdef _M_X86
 	const int stride = 4;
 
-	__m128i addr_vec = _mm_set1_epi32(addr);
-
-	size_t i = 0;
+	const __m128i addr_vec = _mm_set1_epi32(addr);
 
 	for (; i + stride <= size; i += stride)
 	{
@@ -170,7 +173,7 @@ __inline int CheckCache(u32 addr)
 			return true;
 		}
 	}
-
+#endif
 	for (; i < size; i++)
 	{
 		const u32 mask = cachedTlbs.PageMasks[i];