diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..c536699 --- /dev/null +++ b/.gitignore @@ -0,0 +1,16 @@ +*.o +*.cmd* +*.ko* +*.mod* +*.so* +Module.symvers +modules.order + +cifx.pc +cifx_api +cifx_tcpserver + +CMakeCache.txt +CMakeFiles +cmake_install.cmake +install_manifest.txt \ No newline at end of file diff --git a/BSL/NETX10-BSL.bin b/BSL/NETX10-BSL.bin new file mode 100644 index 0000000..141d3e4 Binary files /dev/null and b/BSL/NETX10-BSL.bin differ diff --git a/BSL/NETX100-BSL.bin b/BSL/NETX100-BSL.bin new file mode 100644 index 0000000..bbc5237 Binary files /dev/null and b/BSL/NETX100-BSL.bin differ diff --git a/BSL/NETX50-BSL.bin b/BSL/NETX50-BSL.bin new file mode 100644 index 0000000..259aff3 Binary files /dev/null and b/BSL/NETX50-BSL.bin differ diff --git a/BSL/NETX51-BSL.bin b/BSL/NETX51-BSL.bin new file mode 100644 index 0000000..65678e4 Binary files /dev/null and b/BSL/NETX51-BSL.bin differ diff --git a/BSL/NETX52-BSL.bin b/BSL/NETX52-BSL.bin new file mode 100644 index 0000000..81cb3b1 Binary files /dev/null and b/BSL/NETX52-BSL.bin differ diff --git a/BSL/bsl_history.txt b/BSL/bsl_history.txt new file mode 100644 index 0000000..de1dc51 --- /dev/null +++ b/BSL/bsl_history.txt @@ -0,0 +1,459 @@ +Version History + +ATTENTION: Since V1.3.0.0 of the 2nd Stage Loader, parameters can only be + configured through the tag list using Hilscher Tag List Editor. + Patching parameters using Bootwizard has been removed and is not + supported anymore. + +V1.8.0.0 (07.03.2022) +----------------- +Change: + - Cypress S25FL064 FLASH now only for netX52 and detection via internal list and not SFDP + +Bugfix: + - Fixed SFDP detection for netX100/netX500 + +V1.7.0.0 (20.10.2020) +----------------- +Added: + - Added FSU support for SQI FLASH devices found via SFDP + +Change: + - Set default SQI frequency of FLASH devices found via SFDP to 80MHz + - Set default SPI frequency of FLASH devices in internal list to 25MHz + +Bugfix: + - Fixed FLASH file read error when file size is a multiple of the sector size + - Skip firmware validation for Evaluation Boards + +V1.6.0.1 (25.03.2019) +----------------- +Bugfix: + - Disable I2C SCL on startup of BSL (for netX51/netX52) + +V1.6.0.0 (16.07.2018) +----------------- +Changed: + - Change order of FLASH detection to: Custom flash, interal list, SFDP detection + - Removed obsolete flash types from internal list + Flash types still available in internal list: W25Q32, W25Q64, W25Q128, AT45DB321C/D/E, AT45DB642D + +V1.5.2.0 (11.07.2018) +----------------- +Added: + - Detection of slot number for CIFX-CCLIES PC Cards + +V1.5.1.0 (11.04.2018) +----------------- +Bugfix: + - Missing SPI initialization when using custom serial flash parameters from tag list + +V1.5.0.0 (20.03.2018) +----------------- +Added: + - Support for automatic serial flash detection via SFDP (50 MHz max speed) + ATTENTION: SFDP Version 1.5 must be supported by flash. + Some SQI Flashes (e.g. Microchip SST) don't work as they need + special command for writing which are not available in SFDP, + or they don't comply to SFDP specification (8dummy cycles in query) + after reprogramming number of dummy cycles in 4-Bit mode (e.g. Cypress) + - New tag list entry TAG_BSL_SQIFLASH_PARAMS for custom SQI flash parameter + - New tag list entry TAG_BSL_FLASH_LAYOUT_PARAMS which replaces TAG_BSL_DISK_POS_PARAMS + and TAG_BSL_BACKUP_POS_PARAMS + +V1.4.18.0 (26.10.2016) +----------------- +Added: + - Support for Winbond W25Q64 serial flash + +Bugfix: + - RCX_FILE_XFER_SERIAL_FLASH does not work if file-system cannot be mounted, but flash was detected + - Serial flash detection does not work, if flash is in wrong state at startup + - Use netX52 as RAM Based device not working + +V1.4.17.1 (07.04.2015) +----------------- +Bugfix: + - Firmware validation does not work on netX10/51/52 running in XiP/SQIROM mode, + if no security memory is present and taglist entries for HW data are used + (A wrong firmware may be downloaded and will illegally be started) + +V1.4.17.0 (30.09.2014) +----------------- +Changed: + - netX51/52: Introduce separate 2nd Stage Loader binary for each chip type + - netX52: 2nd Stage Loader binary uses SQIROM by default + +Added: + - netX51/52: Added flag to hardware parameters to tell the firmware, that a valid flash device label has been found + - Pass MAC-Address via hardware parameters to firmware + +Bugfix: + - netX51/52: MMIO configuration gets corrupted if break signal is initiated on the UART during startup phase + - SD cards which do not respond to mandatory command CMD1 (SEND_OP_COND) are rejected + - netX52: UART boot mode broken due to invalid default MMIO configuration + - netX100/500: Error during license check may stall bootloader in startup phase + - SD/MMC restore operation creates invalid short filename if extension of long filename has fewer than 3 characters + - netX50/51/52: System channel signals system error although security memory is disabled via tag list + - Restore operation creates corrupt files on target media if backup size exceeds target capacity + +V1.4.16.0 (19.02.2014) +---------------------- +Bugfix: + - netX51/52: DPM settings for DPM_IF_CFG and address comparator in DPM_ADDR_CFG are not setup correctly + +V1.4.15.0 (28.01.2014) +---------------------- +Added: + - netX51/52: Support for device label stored in last flash sector + +V1.4.14.0 (06.01.2014) +---------------------- +Bugfix: + - Self-Flashing Option does not work for flashes not supporting single page erase, but only sector erase + - netX10/50/51: After software reset security memory access may be 10times slower depending on used firmware + +V1.4.13.0 (02.10.2013) +---------------------- +Changed: + - netX51/52: 8/16 Bit DPM mode detection pin updated + netX50 compatibility mode WIF=HIF PIO35 / D17 + netX51/52 native mode WIF=SIRQ + - netX51/52: DPM configuration registers (IRQ enable, reset, etc.) are now shown at end of 64kB DPM (default configuration) + - Parallel flash from Manufacturer other than Intel/Spansion are not detected + +Added: + - netX51/52: Allow booting firmware to internal RAM with following limitations: + * Firmware must be loaded beyond the 2nd Stage loader (current limit is 96kB Offset from start of INTRAM0) + * Firmware must be located between 96kB of INTRAM start and start of INTRAM7 + * Maximum used RAM size during load must not exceed 416kB + - Passing of bHwAssemblyFeatures in boottokens + - Support for AT45DB312E (only test first 2 bytes of JEDEC identifier) + +Bugfix: + - Some MMC4.x cards might not be recognized correctly + +V1.4.12.0 (12.06.2013) +---------------------- +Bugfix: + - MMIO Pins for UART may not be set to UART function if a spurious BREAK is detected + (RXD low on HW during startup) + - Some / Older MMC cards may not work, if they need longer for CMD8 (SEND_OPCOND). + Observed with old 64MB cards delivered with some evaluation boards + +V1.4.11.0 (29.04.2013) +---------------------- + - Reduced maximum serial flash clock speeds for Winbond W25QXXX from 80 to 33 MHz in standard read mode + - netX52: Disable netX50 compatibility mode to ensure external SDRAM and SPI DPM + works at the same time + ATTENTION: Wrong wiring may cause permanent hardware damage + - netX52: Default USB ProductID is automatically adjusted to 0x200 if netX52 is being detected + - SDHC/SDXC support added (may not work for all available cards, if they don't support SPI interface) + - Boottoken list contains a broken token on hardwares without security memory, + which results in a unparsable tokenlist + +V1.4.10.0 (21.12.2012) +---------------------- +Bugfix: + - netX51 MMIO settings passed via taglist are not evaluated + - netX51 HIF parameters passed via taglist are not evaluated + - netX10/51 Automatic serial DPM detection changes memory + interface configuration unintentionally + - Firmware validation does not work on netX10/51 running in XiP/SQIROM mode + (A wrong firmware may be downloaded and will illegally be started) + - RCX_HW_IDENTIFY_REQ now also detects netX52 + +Added: + - 2nd Stage Loader version information is now passed to firmware via boottoken + - netX52 support + +V1.4.9.0 (11.07.2012) +--------------------- +Added: + - netX51 support + - Allow customer specific serial flash via taglist (ATTENTION: This flash must + support page erase to work) + - Pass serial flash parameters to firmware via tokenlist + - Support for Winbond W25Q128 serial flash + +Bugfix: + - netX100/500 MRAM may not be accessible to due a netX bug + +V1.4.8.0 (06.02.2012) +--------------------- +Changed: + - netX10 DPM auto-detection changed to support serial DPM via DIRQ pin. See the + following truth table: + DIRQ SIRQ Mode + 0 X Serial DPM (Mode 3) + 1 0 Parallel DPM (16 Bit) + 1 1 Parallel DPM (8 Bit) + +V1.4.7.0 (16.01.2012) +--------------------- +Bugfix: + - Firmwares ending on a cluster boundary (filesize is a multiple of cluster size) + are not started. + +V1.4.6.0 (16.12.2011) +--------------------- +Changed: + - Disable USB at start to allow host to detect disconnection during restart + - MRAM data is now inserted into System Status Block of DPM + +Bugfix: + - MRAM may not be mapped correctly + +V1.4.5.0 (06.12.2011) +--------------------- +Added: + - Mapping of PCI target 2 (MRAM on 2nd memory bar) + - netX10: USB communication changed to prevent FIFO problems (now using special protocol over USB). + ATTENTION: This needs a special USB Driver (netx10ser.sys V6.0.2.0 or later) + +V1.4.4.0 (16.09.2011) +--------------------- +Bugfix: + - netX10: Host interrupt was not correctly enabled for DPM Targets. + - netX10: Host handshake cells were not zeroed correctly on system start (NSF_RESET) + - netX10: Backup Partition did not work in SQIROM Mode + - netX10: SDRAM Parameters from Taglist may not be used, depending on tag list element order + (HIF and SDRAM depend on each other) + - Bootloader update on SQI Flashes that don't support Page Erase does not work + +Changed: + - netX10: Generic 2nd Stage Loader binary now always uses SQIROM mode + (pre-activated in taglist) + +V1.4.3.0 (14.09.2011) +--------------------- +Added: + - BOOTTOKEN_HARDWARE_FLAGS_CUSTOM_MMIO_MAPPING is now passed to firmware in + Boottoken BOOTTOKEN_HARDWARE_FLAGS, to tell the firmware a custom MMIO + mapping has already been setup by 2nd Stage Loader and Firmware does not + need to change it again + +Bugfix: + - netX50 may erroneously detect a break signal on fiber-optics hardware + and enters serial boot mode instead of starting the firmware or correctly + returning from a system reset via DPM + + - netX50 UART does not work if Fast-Startup mode is not enabled due to wrong + MMIO configuration + +Changed + - UART is now checked for incoming transport packets in main loop. This allows + to talk via UART with the 2nd Stage Loader even without asserting a break signal + at coldstart + ATTENTION: If a connection established via UART/USB/DPM all other connections + will be disabled. This means if a connection via UART is established + no access via DPM or USB will be possible until device being reset + +V1.4.2.0 (11.08.2011) +--------------------- +Changed: + - All DPM Windows are now disable before firmware is started. This makes sure that the firmware + can use the internal RAM for code/data completely, without the host destroying program code, + before new DPM mapping is set up + - USB core is now always disabled before firmware is started + - AIFX now read with 4kHz + - netX10 DPM timings updated for comX compatibility + +Added: + - RCX_FORMAT_REQ added to format flash disk + - Restore from SD/MMC card will restore files to serial flash disk, + even when default medium is set to par. flash. + - new MMIO pinning for fast startup added (selectable via Tag List Editor) + - Support for SPI flash Numonyx M45PE16 + - Support for Backup Partition (netX50/100, or netX10 with SDRAM). Currently not supported for netX10 SQIROM Mode + +Bugfix: + - 2nd Stage Loader may write to flash when booting a firmware + - Creating default filesystem may fail after first reset (yellow LED permanent on) + +V1.4.1.0 (22.11.2010) +--------------------- +Bugfix: + - SDRAM Parameters from TAG List may be ignored + - Parallel Flash mode was always expecting a XiP Firmware + - AIFX Modules may not work correctly + +Changed: + - Reset SYSTIME unit to power on defaults for netX10 + - Reducing MAX Frequency of AT45DB642D to 25/33MHz as 50MHz does not work on every HW design + +V1.4.0.0 (26.10.2010) +--------------------- + Added: + - netX10 support + - MMIO configuration added to Taglist + - USB descriptor added to Taglist + - Disk position and offset added to Taglist + +V1.3.1.0 (03.08.2010) +--------------------- + Added: + - Packets to read/write physical addresses + +V1.3.0.0 (11.11.2009) +--------------------- + Added: + - Filesystem type can now be configured through security memory zone 1, + starting with structure revision 3 + - Rotary Switches are always read if Security Memory contains DEV_CLASS_CIFX (for every manufacturer) + + Bugfix: + - Slow SDMMC cards were sometimes not correctly detected + +V1.0.0.0 (05.11.2009) +-------------------------- + Added: + - Firmwarevalidation according to Hilscher Firmware startup concept + +V0.915 (31.07.2009) +-------------------------- + Added: + - Additional packets added: + * RCX_HW_HARDWARE_INFO_REQ + * RCX_HW_LICENSE_INFO_REQ + * RCX_SYSTEM_INFORMATION_BLOCK_REQ + * RCX_CHANNEL_INFORMATION_BLOCK_REQ + * RCX_SYSTEM_CONTROL_BLOCK_REQ + * RCX_SYSTEM_STATUS_BLOCK_REQ + - Tag list included for configuration + - Parallel Flash support, without filesystem added + - Support for USB Enable pin added (via Tag list) + - Support for PCI Enable pin added (via Tag list) + - ISA Mode added + - Rotary switch support for cifX 50 added + - New filed added in system status block (ulBootError) to show why a firmware has not been booted + +Known Bugs: + - Taglist is not yet working correctly. Bugfix needed. + +V0.914 (FSU Release) +------------------- + Added: + - HilFileHeader V3 included + - PCI support (cifX, .NFX files only) + - RAM Based device support (when no flash is available) + This feature needs the cifX Toolkit which downloads all neccessary files at runtime + - Additional Bootheaders parameter (ulUserParams) + * Bitmask + BOOTLOADER_FORCE_RAMDISK 0x10 + BOOTLOADER_FORCE_SERFLASH 0x20 + BOOTLOADER_FORCE_PARFLASH 0x40 + * BOOTLOADER_FORCE_NXF_SDRAM_PARAMS (0x200), to force usage of SDRAM parameters from .NXF file + * BOOTLOADER_FORCE_FLASHING (0x80) to force flashing when loaded via DPM/PCI + - SD/MMC update support added (can be used to restore the flash file system) + + Changed: + - When UART is enabled and a break is being detected, the bootloader will only enter + the serial console if the break signal goes away within 100ms after sending a zero character + - SDRAM Parameter usage order changed + 1. Crypto flash (always used if available) + 2. Bootloader header (only used when no cryptoflash is available) + 3. .NXF file header (only used when neither crypto nor bootheader contains SDRAM information) + +V0.913 (04.12.2008) +------------------- + Changed: + - Bootheaders user parameter is now evaluated and used to disable bootloader interfaces + It contains a mask of disabled interfaces + * 0x01 = UART + * 0x02 = USB + * 0x04 = HIF + Bugfix: + - Cryptoflash read/write does expect inverted data anymore, so the user can just pass + the raw data structure (as described in manual) + - Cryptoflash write did not work (wrong buffer was written) + - Download in extended Mailbox did only use the first 80 byte chunks for data transfer + Added: + - Restore Flash File System from SD/MMC + - Enable Flash File System Restore from SD/MMC in User Flags + - Configure SD/MMC Insertion pin in User Flags + - License Download + +V0.912 (25.04.2008) +------------------- + Bugfix: + * netX100/500 + - Cryptoflash license code readout could result in total netX crash (due to internal XC problems) + +V0.911 (18.04.2008) +------------------- + Bugfix: + - Buffer overflow in Serial/USB communication fixed + - Bootloader did not enter HIF mode, if first host action was a Reset via DPM + - USB connection was only checked once, and entered HIF Boot mode afterwards. + - Reading crypto flash always returned invalid CRC, causing SDRAM Parameters can only be used from NXF file + and not from crypto. + - DPMAS_IFCONF1 was not written correctly for standard configuration + - Removed incompatible serial Flash types (which do not support "page erase" or "page erase and program" opcode + - USB did abort packet transfer due to internal core problems + + Changed: + - Per Default only GPIO0 (netx100/500) or MMIO34 (netX50) is placed in Uart RXD state. + TXD/(GPIO1 or MMIO35) is only enabled, if a break signal is detected on the serial line. + GPIO2/3 or MMIO36/37) (CTS/RTS) are never used + - Only try to read crypto flash license codes, if it was detected before + - Changed Name to "Second Stage Loader (netX100/500)" and "Second Stage Loader (netX50)" + + * netX50 + - Only try to detect crypto flash if we are in PCI Bootmode (external SYSSTA value) + + Added: + - netX50 support (MMIO's will be kept in default configuration) + - Hilscher file header added + +TODO: + - License code readout for netX50 (currently not possible) + +V0.910 (18.02.2008) +------------------- +Changed: + - The default DPM Timings have changed, to meet the comX requirements. + The following settings have changed (if no special parameters are patched): + +Bugfix: + - RCX_FILE_XFER_SERIAL_FLASH did not work if the pagesize if the serial flash + is larger than mailbox/block size + - Extended Mailbox did not work, as it internally expected 16 Bit Handshake cells + +WAIT_DRV 1 : Push/pull output +WAIT_MODE 0 : WAIT / BUSY mode function. A active signal shows the the host system that the current access is not ready. +WAIT_POLARITY 0 : low active polarity output +IRQ_MODE 2 : Push / pull output +IRQ_POLARITY 0 : low active polarity output + +V0.905 (13.09.2007) +------------------- +Bugfix: + - Error when trying to mount a filesystem on serial flashes with page size < 512 bytes + - Enable IRQ mask adjusted to channel specific interrupts (loader did enable all IRQs before) + +V0.904 (27.07.2007) +------------------- +Added: + - Download via DPM will flash the boot loader to serial flash + - Update via DPM (rcX Packet Download to serial flash) + - Enter boot loader mode from FW/ROM Loader (via bit in host handshake flags) + +V0.903 (04.06.2007) +------------------- +Bugfix: + - Download errors were overwritten by TLR_E_FAIL and did not reflect the real error reason + +V0.902 (internal Development version) +------------------- +Bugfix: + - Flashes with page size < 512 bytes did not work (e.g. DB500SYS) + +V0.901 (02.05.2007) +------------------- +Bugfix: + - Sequence error in up-/download if the filelength is multiple of transfer block size + +V0.900 (25.04.2007) +------------------- + - initial version \ No newline at end of file diff --git a/LICENSE.md b/LICENSE.md new file mode 100644 index 0000000..7ad402a --- /dev/null +++ b/LICENSE.md @@ -0,0 +1,19 @@ + +Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the “Software”), to deal in +the Software without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the +Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. diff --git a/build_install_driver b/build_install_driver new file mode 100755 index 0000000..28b755c --- /dev/null +++ b/build_install_driver @@ -0,0 +1,138 @@ +#!/bin/bash -e + +function check_help { + case "$1" in + "--help" | "-h") + echo "************************************************************" + echo "*** HELP ***************************************************" + echo "************************************************************" + echo "*** Run the script without parameter to build and ***" + echo "*** install the driver. The build script will creates a ***" + echo "*** build directory (./tmp_build). ***" + echo "*** To specify a build directory just pass a directory ***" + echo "*** path. ***" + echo "*** ***" + echo "*** e.g.: ***" + echo "*** mkdir ./my_build_path ***" + echo "*** ./build_install_driver ./my_build_path ***" + echo "************************************************************" + exit 0 + ;; + *) + ;; + esac +} + + +builddir="./tmp_build/" +if (( "$#" >= "1" )); then + check_help $1 + if [ -d "${1}" ]; then + builddir=$(realpath "${1}") + else + echo "Error - Given parameter \"$1\" is not a folder or does not exist!" + exit 1 + fi +else + mkdir -p "${builddir}" +fi + +# check if directories contain white spaces... +invalid_path=$(pwd | { grep " " || true; } ) +if [ "${invalid_path}" != "" ]; then + echo "Error - path contains spaces (\"${PWD}\")! Please use path without." + exit 1 +fi +invalid_path=$(echo ${builddir} | { grep " " || true; } ) +if [ "${invalid_path}" != "" ]; then + echo "Error - path contains spaces (\"${builddir}\")! Please use path without." + exit 1 +fi + +if [ -d "${builddir}/libcifx" ] || [ -d "${builddir}/uio_netx" ]; then + echo "********************************************************************************" + echo "NOTE: The build folder (\"${builddir}\") is not empty! Force overwrting (yes=y)?" + echo " Or pass a new build folder (./build_install_driver [my_build_folder]." + echo "********************************************************************************" + read delete_files + if [ "${delete_files}" = "y" ]; then + echo "...deleting build folder!" + rm -rf "${builddir}/libcifx" + rm -rf "${builddir}/uio_netx" + else + echo "...canceled build process!" + exit 1 + fi +fi + +driver_src=$(dirname $(realpath $0)) +scripts_dir="${driver_src}/scripts" + +cur_path=$PWD +kernelversion="" +ret=0 + +install_step="uio_netx" +while [ "$install_step" != "stop" ] +do +case $install_step in +error) +echo "************************************************************" +echo "**** An error occured during the installation ***" +echo "************************************************************" +echo "Please check the error message in the previous steps." +echo "When the problem is fixed restart the installation." +install_step="stop" +ret=1 +;; +uio_netx) +install_step="firmware" +mkdir -p "${builddir}/uio_netx" +echo "************************************************************" +echo "**** Start building kernel module uio_netx ***" +echo "************************************************************" +if ! "${scripts_dir}/"install_uio_netx build "${builddir}/uio_netx"; then # build module + echo "Error building kernel module!" + install_step="error" +fi +if ! "${scripts_dir}/"install_uio_netx install "${builddir}/uio_netx"; then # install module + echo "Error installing kernel module!" + install_step="error" +fi +;; +firmware) +install_step="libcifx" +echo "************************************************************" +echo "**** Installing kernel module and firmware ***" +echo "************************************************************" +install_step="libcifx" +if ! "${scripts_dir}/"install_firmware install ; then # install firmware + echo "Error installing firmware!" + install_step="error" +fi +if ! "${scripts_dir}/"install_uio_netx update ; then # load driver + echo "Error updating module dependencies!" + install_step="error" +fi +if ! "${scripts_dir}/"install_uio_netx unload ; then + echo "Error unloading driver!" + install_step="error" +fi +if ! "${scripts_dir}/"install_uio_netx load; then + echo "Error loading driver!" + install_step="error" +fi +;; +libcifx) +echo "************************************************************" +echo "**** Building and installing user space library libcifx ***" +echo "************************************************************" +mkdir -p "${builddir}/libcifx" +"${scripts_dir}/"install_libcifx "${builddir}/libcifx" +install_step="stop" +;; +esac +done +cd .. + +exit $ret diff --git a/cifx_m2/Makefile b/cifx_m2/Makefile new file mode 100644 index 0000000..921cd59 --- /dev/null +++ b/cifx_m2/Makefile @@ -0,0 +1,27 @@ +ifneq ($(KERNELRELEASE),) +# kbuild part of makefile + +obj-m += ax99100-pci-spi.o +obj-$(CONFIG_AX99100_IRQ) += ax99100-pci-gpio.o + +else +# normal makefile + +ifeq ($(KDIR),) + KDIR := /lib/modules/$(shell uname -r)/build +endif + +PWD := $(shell pwd) + +all: modules + +modules: + $(MAKE) -C $(KDIR) M=$(PWD) modules + +modules_install: + $(MAKE) -C $(KDIR) M=$(PWD) modules_install + +clean: + $(MAKE) -C $(KDIR) M=$(PWD) clean + +endif diff --git a/cifx_m2/ax99100-pci-gpio.c b/cifx_m2/ax99100-pci-gpio.c new file mode 100644 index 0000000..e2aa9fc --- /dev/null +++ b/cifx_m2/ax99100-pci-gpio.c @@ -0,0 +1,650 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AX99100 PCIe to Multi I/O Controller - GPIO driver + * + * drivers/gpio/ax99100-pci-gpio.c + * + * (C) Copyright 2019 Hilscher Gesellschaft fuer Systemautomation mbH + * http://www.hilscher.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define DRIVER_DESC "AX99100 PCIe to Multi I/O Controller - GPIO driver" +#define DRIVER_NAME "ax99100-pci-gpio" + +#define HILSCHER_PCI_VENDOR_ID 0x15cf +#define HILSCHER_PCI_DEVICE_ID 0x0090 + +#define HILSCHER_PCI_SUB_VENDOR_ID 0x15cf +#define HILSCHER_PCI_SUB_DEVICE_ID_GPIO 0x1002 +#define HILSCHER_PCI_SUB_DEVICE_ID_SPI 0x6001 + +#include +#include +#include +#include +#include + +#include + +/* -------------------------------------------------------------------------- */ +/* ------ Regdefs ----------------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +#define regdef(mask, shift, name) \ +static inline uint8_t g##name(uint8_t val) \ +{ \ + return (val >> shift) & mask; \ +} \ +static inline uint8_t s##name(uint8_t val) \ +{ \ + return (val & mask) << shift; \ +} + +/* ------ BAR1 Register (MEM mapped) ---------------------------------------- */ + +#pragma pack(1) +struct regdef_common { + uint32_t swrst; +}; +#pragma pack() + +#pragma pack(1) +struct serial_port_interrupt_register { + uint32_t gisr; + uint32_t gicr; + uint32_t gier; +}; +#pragma pack() + +regdef(0x1, 4, GIxR) /* GISR, GICR, GIER */ + +/* ------ BAR5 Register (MEM mapped) ---------------------------------------- */ + +#pragma pack(1) +struct gpio_register { + uint32_t pin; + uint32_t dir; + uint32_t em; + uint32_t od; + uint32_t pu; + uint32_t eds; + uint32_t ede; + uint32_t ctr; +}; +#pragma pack() + +/* -------------------------------------------------------------------------- */ +/* ------ Macros ------------------------------------------------------------ */ +/* -------------------------------------------------------------------------- */ + +#define iomod32(cmask, smask, addr) \ +do { \ + uint32_t val = ioread32(addr); \ + val &= ~(cmask); \ + val |= (smask); \ + iowrite32(val, addr); \ +} while (0) + +/* -------------------------------------------------------------------------- */ +/* ------ Global variables -------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +struct priv_data { + struct pci_dev *pci; + + struct gpio_chip gpio_chip; + spinlock_t lock; + struct { + struct regdef_common __iomem *common; + struct serial_port_interrupt_register __iomem *global_irq; + struct gpio_register __iomem *gpio; + } reg; +}; + +/* -------------------------------------------------------------------------- */ +/* ------ Help functions ---------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +void ax99100_pci_gpio_reg_dump(struct priv_data *pd) +{ + dev_info(&pd->pci->dev, "Register dump ...\n"); + dev_info(&pd->pci->dev, "=================\n"); + dev_info(&pd->pci->dev, "PIN 0x%08x\n", ioread32(&pd->reg.gpio->pin)); + dev_info(&pd->pci->dev, "DIR 0x%08x\n", ioread32(&pd->reg.gpio->dir)); + dev_info(&pd->pci->dev, "EM 0x%08x\n", ioread32(&pd->reg.gpio->em)); + dev_info(&pd->pci->dev, "OD 0x%08x\n", ioread32(&pd->reg.gpio->od)); + dev_info(&pd->pci->dev, "PU 0x%08x\n", ioread32(&pd->reg.gpio->pu)); + dev_info(&pd->pci->dev, "EDS 0x%08x\n", ioread32(&pd->reg.gpio->eds)); + dev_info(&pd->pci->dev, "EDE 0x%08x\n", ioread32(&pd->reg.gpio->ede)); + dev_info(&pd->pci->dev, "CTR 0x%08x\n", ioread32(&pd->reg.gpio->ctr)); +} + +/* -------------------------------------------------------------------------- */ +/* ------ IRQ Chip API functions -------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_gpio_irq_mask: + * + * @id: + */ +static void ax99100_pci_gpio_irq_mask(struct irq_data *id) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(id); + struct priv_data *pd = gpiochip_get_data(gc); + uint32_t offset = id->hwirq; + unsigned long flags; + + spin_lock_irqsave(&pd->lock, flags); + + /* Disable GPIO IRQ */ + iomod32(BIT(offset), 0, &pd->reg.gpio->ede); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0) + gpiochip_disable_irq( gc, id->hwirq); +#endif + spin_unlock_irqrestore(&pd->lock, flags); +} + +/** + * ax99100_pci_gpio_irq_unmask: + * + * @id: + */ +static void ax99100_pci_gpio_irq_unmask(struct irq_data *id) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(id); + struct priv_data *pd = gpiochip_get_data(gc); + uint32_t offset = id->hwirq; + unsigned long flags; + + spin_lock_irqsave(&pd->lock, flags); + + /* Enable GPIO IRQ */ + iomod32(0, BIT(offset), &pd->reg.gpio->ede); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0) + gpiochip_enable_irq( gc, id->hwirq); +#endif + + spin_unlock_irqrestore(&pd->lock, flags); +} + +/** + * ax99100_pci_gpio_irq_set_type: + * + * @id: + * @type: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_gpio_irq_set_type(struct irq_data *id, uint32_t type) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(id); + struct priv_data *pd = gpiochip_get_data(gc); + uint32_t offset = id->hwirq; + unsigned long flags; + int rc = 0; + + spin_lock_irqsave(&pd->lock, flags); + + switch (type & IRQ_TYPE_SENSE_MASK) { + case IRQ_TYPE_EDGE_RISING: + iomod32(BIT(offset), 0, &pd->reg.gpio->ctr); + iomod32(0, BIT(offset), &pd->reg.gpio->em); + break; + case IRQ_TYPE_EDGE_FALLING: + iomod32(BIT(offset), 0, &pd->reg.gpio->ctr); + iomod32(BIT(offset), 0, &pd->reg.gpio->em); + break; + case IRQ_TYPE_EDGE_BOTH: + iomod32(0, BIT(offset), &pd->reg.gpio->ctr); + break; + case IRQ_TYPE_NONE: + break; + default: + rc = -EINVAL; + } + + spin_unlock_irqrestore(&pd->lock, flags); + + return rc; +} + +/* -------------------------------------------------------------------------- */ +/* ------ GPIO Chip API functions ------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_gpio_direction_input: + * + * @gc: + * @offset: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_gpio_direction_input(struct gpio_chip *gc, uint32_t offset) +{ + struct priv_data *pd = gpiochip_get_data(gc); + unsigned long flags; + + if ((offset >= 2) && (offset <= 5)) { + dev_err(&pd->pci->dev, "Error: gpio%d is output only!\n", offset); + return -EINVAL; + } + + spin_lock_irqsave(&pd->lock, flags); + + iomod32(0, BIT(offset), &pd->reg.gpio->dir); + + spin_unlock_irqrestore(&pd->lock, flags); + + return 0; +} + +/** + * ax99100_pci_gpio_direction_output: + * + * @gc: + * @offset: + * @value: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_gpio_direction_output(struct gpio_chip *gc, uint32_t offset, int value) +{ + struct priv_data *pd = gpiochip_get_data(gc); + unsigned long flags; + + spin_lock_irqsave(&pd->lock, flags); + + iomod32(BIT(offset), 0, &pd->reg.gpio->dir); + if (value) + iomod32(0, BIT(offset), &pd->reg.gpio->pin); + else + iomod32(BIT(offset), 0, &pd->reg.gpio->pin); + + spin_unlock_irqrestore(&pd->lock, flags); + + return 0; +} + +/** + * ax99100_pci_gpio_get: + * + * @gc: + * @offset: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_gpio_get(struct gpio_chip *gc, uint32_t offset) +{ + struct priv_data *pd = gpiochip_get_data(gc); + + if ((offset >= 2) && (offset <= 5)) + dev_warn(&pd->pci->dev, "gpio%d is output only and can't be read back!\n", offset); + + return !!(ioread32(&pd->reg.gpio->pin) & BIT(offset)); +} + +/** + * ax99100_pci_gpio_set: + * + * @gc: + * @offset: + * @value: + */ +static void ax99100_pci_gpio_set(struct gpio_chip *gc, uint32_t offset, int value) +{ + struct priv_data *pd = gpiochip_get_data(gc); + unsigned long flags; + + spin_lock_irqsave(&pd->lock, flags); + + if (value) + iomod32(0, BIT(offset), &pd->reg.gpio->pin); + else + iomod32(BIT(offset), 0, &pd->reg.gpio->pin); + + spin_unlock_irqrestore(&pd->lock, flags); +} + +/* -------------------------------------------------------------------------- */ +/* ------ IRQ functions ----------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_gpio_isr: IRQ chain handler of GPIO chip. + * + * @desc: IRQ number + */ +static void ax99100_pci_gpio_isr(struct irq_desc *desc) +{ + struct priv_data *pd = gpiochip_get_data(irq_desc_get_handler_data(desc)); + struct irq_chip *ic = irq_desc_get_chip(desc); +#if KERNEL_VERSION(4, 15, 0) > LINUX_VERSION_CODE + struct irq_domain *irqdomain = pd->gpio_chip.irqdomain; +#else + struct irq_domain *irqdomain = pd->gpio_chip.irq.domain; +#endif + unsigned long status, i; + + chained_irq_enter(ic, desc); + + /* Confirm global IRQ */ + iowrite32(sGIxR(1), &pd->reg.global_irq->gicr); + + /* Confirm GPIO IRQ */ + status = ioread32(&pd->reg.gpio->eds); + iowrite32(status, &pd->reg.gpio->eds); + + for_each_set_bit(i, (const unsigned long *)&status, pd->gpio_chip.ngpio) + generic_handle_irq(irq_find_mapping(irqdomain, i)); + + chained_irq_exit(ic, desc); +} + +/* -------------------------------------------------------------------------- */ +/* ------ Driver / Module functions ----------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_gpio_chip_init: Initialize the GPIO chip. + * + * @pd: + */ +static void ax99100_pci_gpio_chip_init(struct priv_data *pd) +{ + /* Reset chip function */ + iowrite32(0x1, &pd->reg.common->swrst); + mdelay(10); + + /* Disable global GPIO IRQ */ + iomod32(sGIxR(1), 0, &pd->reg.global_irq->gier); + + /* Disable / Confirm GPIO IRQs */ + iowrite32(0x0, &pd->reg.gpio->ede); + iowrite32(0x00ffffff, &pd->reg.gpio->eds); + + iowrite32(0x0, &pd->reg.gpio->pin); + iowrite32(0x00ffffc3, &pd->reg.gpio->dir); /* GPIO[5:2] are outputs */ + iowrite32(0x0, &pd->reg.gpio->em); + iowrite32(0x0, &pd->reg.gpio->od); + iowrite32(0x0, &pd->reg.gpio->pu); + iowrite32(0x0, &pd->reg.gpio->ctr); +} + +/** + * ax99100_pci_gpio_chip_init: Initialize the GPIO chip. + * + * @pd: + */ +static void ax99100_pci_gpio_chip_deinit(struct priv_data *pd) +{ + /* Reset chip function */ + iowrite32(0x1, &pd->reg.common->swrst); + mdelay(10); + + /* Disable global GPIO IRQ */ + iomod32(sGIxR(1), 0, &pd->reg.global_irq->gier); + + /* Disable GPIO IRQs */ + iowrite32(0x0, &pd->reg.gpio->ede); +} + +/** + * ax99100_pci_gpio_get_ngpio: + * + * @pci: + * + * Return: Amount of available GPIOs. + */ +static int ax99100_pci_gpio_get_ngpio(struct pci_dev *pci) +{ + struct pci_dev *dummy_pci; + int ngpio = 8; /* GPIO[7:0] */ + + do { + dummy_pci = pci_get_slot(pci->bus, 2); + if (dummy_pci) + break; + ngpio += 8; /* GPIO[15:8] */ + + dummy_pci = pci_get_slot(pci->bus, 3); + if (!dummy_pci) { + ngpio += 8; /* GPIO[23:16] */ + break; + } + if (dummy_pci->subsystem_device == HILSCHER_PCI_SUB_DEVICE_ID_SPI) + ngpio += 1; /* GPIO[16] */ + } while (0); + + return ngpio; +} + +static int ax99100_pci_gpio_irq_init_hw(struct gpio_chip *gc) +{ + struct priv_data *pd = gpiochip_get_data(gc); + + /* Confirm / Enable global GPIO IRQ */ + iowrite32(sGIxR(1), &pd->reg.global_irq->gicr); + iomod32(0, sGIxR(1), &pd->reg.global_irq->gier); + + return 0; +} + +static const struct irq_chip s_ic = { + .name = KBUILD_MODNAME, + .irq_mask = ax99100_pci_gpio_irq_mask, + .irq_unmask = ax99100_pci_gpio_irq_unmask, + .irq_set_type = ax99100_pci_gpio_irq_set_type, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +#endif +}; + +/** + * ax99100_pci_gpio_probe: + * + * @pci: + * @pci_id: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_gpio_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) +{ + struct device *dev = &pci->dev; + struct priv_data *pd; + struct gpio_chip *gc; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + struct gpio_irq_chip *girq; +#endif + int err; + + pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); + if (!pd) + return -ENOMEM; + + pci_set_drvdata(pci, pd); + pd->pci = pci; + + /* Enable PCI device and request regions */ + err = pci_enable_device(pci); + if (err) { + dev_err(dev, "Enable PCI device failed!\n"); + goto err0; + } + err = pci_request_regions(pci, KBUILD_MODNAME); + if (err) { + dev_info(dev, "Request PCI regions failed!\n"); + goto err1; + } + + /* Map required memory regions */ + pd->reg.common = pci_iomap_range(pci, 1, 0x238, sizeof(*pd->reg.common)); + if (!pd->reg.common) { + dev_err(dev, "Map PCI memory bar1 failed (common)!\n"); + err = -ENODEV; + goto err2; + } + pd->reg.global_irq = pci_iomap_range(pci, 1, 0x3a0, sizeof(*pd->reg.global_irq)); + if (!pd->reg.global_irq) { + dev_err(dev, "Map PCI memory bar1 failed (global_irq)!\n"); + err = -ENODEV; + goto err3; + } + pd->reg.gpio = pci_iomap_range(pci, 5, 0x3c0, sizeof(*pd->reg.gpio)); + if (!pd->reg.gpio) { + dev_err(dev, "Map PCI memory bar5 failed (gpio)!\n"); + err = -ENODEV; + goto err4; + } + + /* Configure the GPIO chip structure */ + gc = &pd->gpio_chip; + gc->label = KBUILD_MODNAME; + gc->parent = dev; + gc->owner = THIS_MODULE; + gc->base = -1; + gc->ngpio = ax99100_pci_gpio_get_ngpio(pci); + gc->direction_input = ax99100_pci_gpio_direction_input; + gc->direction_output = ax99100_pci_gpio_direction_output; + gc->get = ax99100_pci_gpio_get; + gc->set = ax99100_pci_gpio_set; + + ax99100_pci_gpio_chip_init(pd); + + spin_lock_init(&pd->lock); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + err = gpiochip_add_data(gc, pd); + if (err) { + dev_err(dev, "Register GPIO-Chip failed!\n"); + goto err5; + } +#endif + if (pci->irq > 0) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + err = gpiochip_irqchip_add(gc, (struct irq_chip*)&s_ic, 0, handle_simple_irq, IRQ_TYPE_NONE); + if (err < 0) { + dev_err(dev, "Register IRQ-Chip failed!\n"); + goto err6; + } + gpiochip_set_chained_irqchip(gc, (struct irq_chip*)&s_ic, pci->irq, ax99100_pci_gpio_isr); + ax99100_pci_gpio_irq_init_hw(gc); +#else + girq = &gc->irq; + gpio_irq_chip_set_chip( girq, &s_ic); + girq->parent_handler = ax99100_pci_gpio_isr; + girq->num_parents = 1; + girq->parents = devm_kcalloc(dev, girq->num_parents, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + + girq->parents[0] = pci->irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + girq->init_hw = ax99100_pci_gpio_irq_init_hw; + + err = devm_gpiochip_add_data(dev, gc, pd); + if (err < 0) { + dev_err(dev, "Register IRQ-Chip failed!\n"); + goto err6; + } +#endif + } + + dev_info(dev, "gpiochip%d with %d GPIOs successfully probed!\n", gc->base, gc->ngpio); + + return 0; + +err6: + gpiochip_remove(gc); + ax99100_pci_gpio_chip_deinit(pd); +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) +err5: +#endif + pci_iounmap(pci, pd->reg.gpio); +err4: + pci_iounmap(pci, pd->reg.global_irq); +err3: + pci_iounmap(pci, pd->reg.common); +err2: + pci_release_regions(pci); +err1: + pci_disable_device(pci); +err0: + kfree(pd); + return err; +} + +/** + * ax99100_pci_gpio_remove: + * + * @pci: + */ +static void ax99100_pci_gpio_remove(struct pci_dev *pci) +{ + struct priv_data *pd = pci_get_drvdata(pci); + + if (pd) { + /* No need to call gpiochip_remove(), the gpio chip automatically will */ + /* be released when the device is unbound. See devm_gpiochip_add_data(). */ + ax99100_pci_gpio_chip_deinit(pd); + + pci_iounmap(pci, pd->reg.gpio); + pci_iounmap(pci, pd->reg.global_irq); + pci_iounmap(pci, pd->reg.common); + } + pci_release_regions(pci); + pci_disable_device(pci); + + dev_info(&pci->dev, "gpiochip%d successfully removed!\n", pd->gpio_chip.base); +} + +/* ------------------------------------------------------------------------- */ + +static const struct pci_device_id ax99100_pci_gpio_devices[] = { + { PCI_DEVICE_SUB(HILSCHER_PCI_VENDOR_ID, HILSCHER_PCI_DEVICE_ID, + HILSCHER_PCI_SUB_VENDOR_ID, HILSCHER_PCI_SUB_DEVICE_ID_GPIO)}, + { }, +}; +MODULE_DEVICE_TABLE(pci, ax99100_pci_gpio_devices); + +/* ------------------------------------------------------------------------- */ + +static struct pci_driver ax99100_pci_gpio_driver = { + .name = DRIVER_NAME, + .id_table = ax99100_pci_gpio_devices, + .probe = ax99100_pci_gpio_probe, + .remove = ax99100_pci_gpio_remove, +}; + +static int __init ax99100_pci_gpio_init(void) +{ + pr_info("%s: %s\n", DRIVER_NAME, DRIVER_DESC); + return pci_register_driver(&ax99100_pci_gpio_driver); +} +module_init(ax99100_pci_gpio_init); + +static void __exit ax99100_pci_gpio_exit(void) +{ + pci_unregister_driver(&ax99100_pci_gpio_driver); +} +module_exit(ax99100_pci_gpio_exit); + +MODULE_AUTHOR("Hilscher Gesellschaft fuer Systemautomation mbH"); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL v2"); diff --git a/cifx_m2/ax99100-pci-spi.c b/cifx_m2/ax99100-pci-spi.c new file mode 100644 index 0000000..794ced5 --- /dev/null +++ b/cifx_m2/ax99100-pci-spi.c @@ -0,0 +1,781 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AX99100 PCIe to Multi I/O Controller - SPI driver + * + * drivers/spi/ax99100-pci-spi.c + * + * (C) Copyright 2019 Hilscher Gesellschaft fuer Systemautomation mbH + * http://www.hilscher.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define DRIVER_DESC "AX99100 PCIe to Multi I/O Controller - SPI driver" +#define DRIVER_NAME "ax99100-pci-spi" + +#define HILSCHER_PCI_VENDOR_ID 0x15cf +#define HILSCHER_PCI_DEVICE_ID 0x0090 + +#define HILSCHER_PCI_SUB_VENDOR_ID 0x15cf +#define HILSCHER_PCI_SUB_DEVICE_ID_GPIO 0x1002 +#define HILSCHER_PCI_SUB_DEVICE_ID_SPI 0x6001 + +#include +#include +#include +#include +#include +#include + +#include + +/* -------------------------------------------------------------------------- */ +/* ------ Global chip settings ---------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +#define MAX_SPEED_HZ (DIV_ROUND_UP(125000000, 3)) /* ~41,67MHz (max. Chip frequency = 42MHz) */ +#define MIN_SPEED_HZ (DIV_ROUND_UP(125000000, 255)) /* ~490,197kHz */ + +/* NOTE: Currently only the internal CS decoder is supported! */ +#define NUM_CHIPSELECT (3) + +#define DMA_MIN_SIZE (8) +#define DMA_MAX_SIZE (64 * 1024) + +/* -------------------------------------------------------------------------- */ +/* ------ Regdefs ----------------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +#define regdef(mask, shift, name) \ +static inline uint8_t g##name(uint8_t val)\ +{ \ + return (val >> shift) & mask; \ +} \ +static inline uint8_t s##name(uint8_t val) \ +{ \ + return (val & mask) << shift; \ +} + +/* ------ BAR0 Register (I/O mapped) ---------------------------------------- */ + +#pragma pack(1) +struct regdef_spi { + uint8_t cm; + uint8_t css; + uint8_t res0[2]; + uint8_t br; + uint8_t ds; + uint8_t dt; + uint8_t sdaof; + uint8_t stof[8]; + uint8_t sdfl0; + uint8_t sdfl1; + uint8_t ssol; + uint8_t sdc; + uint8_t mis; +}; +#pragma pack() + +regdef(0x1, 0, CM_SSP) +regdef(0x1, 1, CM_CPHA) +regdef(0x1, 2, CM_CPOL) +regdef(0x1, 3, CM_LSB) +regdef(0x1, 4, CM_SPIMEN) +regdef(0x1, 5, CM_ASS) +regdef(0x1, 6, CM_SWE) +regdef(0x1, 7, CM_SSOE) + +regdef(0x3, 0, CSS_SPICKS) +regdef(0x1, 2, CSS_DIVEN) + +regdef(0xff, 0, BR_DIVIDER) + +regdef(0x7, 0, SSOL_SS) +regdef(0x1, 3, SSOL_EDE) +regdef(0x7, 4, SSOL_STOL) + +regdef(0x1, 0, SDC_ETDMA) +regdef(0x1, 1, SDC_ERDMA) +regdef(0x1, 2, SDC_OPCFE) +regdef(0x1, 3, SDC_DMA_GO) +regdef(0x1, 4, SDC_FBT) +regdef(0x1, 5, SDC_CSS) +regdef(0x1, 6, SDC_STCIE) +regdef(0x1, 7, SDC_STERRIE) + +regdef(0x1, 0, MIS_STC) +regdef(0x1, 1, MIS_STERR) + +/* ------ BAR1 Register (MEM mapped) ---------------------------------------- */ + +#pragma pack(1) +struct regdef_dma { + uint32_t sar0; + uint32_t sar1; + uint32_t lr; + uint32_t star; + uint32_t stpr; + uint32_t sr; + uint32_t bntxr; /* TBNTS / RBNRR*/ +}; +#pragma pack() + +#pragma pack(1) +struct regdef_common { + uint32_t swrst; +}; +#pragma pack() + +/* -------------------------------------------------------------------------- */ +/* ------ Global variables -------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +struct priv_data { + struct pci_dev *pci; + + struct spi_master *spi_master; + struct spi_device *spi[NUM_CHIPSELECT]; + + struct { + struct regdef_spi __iomem *spi; + struct regdef_dma __iomem *txdma; + struct regdef_dma __iomem *rxdma; + struct regdef_common __iomem *common; + } reg; + + /* Used for OP-Code-Field transfer mode */ + const uint8_t *tx_buf; + uint8_t *rx_buf; + uint32_t tx_len; + uint32_t rx_len; + + /* Used for DMA transfer mode */ + struct sg_table tx_sgt; + struct sg_table rx_sgt; + + struct { + uint32_t use_opcf : 1; /* OP-Code field usage */ + uint32_t use_dma : 1; /* DMA usage */ + } flags; +}; + +/* -------------------------------------------------------------------------- */ +/* ------ Macros ------------------------------------------------------------ */ +/* -------------------------------------------------------------------------- */ + +#define iomod8(cmask, smask, addr) \ +do { \ + uint8_t val = ioread8(addr); \ + val &= ~(cmask); \ + val |= (smask); \ + iowrite8(val, addr); \ +} while (0) + +#define iomod32(cmask, smask, addr) \ +do { \ + uint32_t val = ioread32(addr); \ + val &= ~(cmask); \ + val |= (smask); \ + iowrite32(val, addr); \ +} while (0) + +/* -------------------------------------------------------------------------- */ +/* ------ Help functions ---------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_spi_set_frequency: Set requested transfer frequency. + * + * @spi: Pointer to the device structure which provides information about the slave device. + * @freq: Requested SPI frequency which should be configured. + */ +static void ax99100_pci_spi_set_frequency(struct spi_device *spi, uint32_t freq) +{ + struct priv_data *pd = spi_master_get_devdata(spi->master); + + if (freq > spi->max_speed_hz) + dev_warn(&spi->dev, "The requested frequency (%dkHz) exceeds the defined max. frequency (%dkHz) of the SPI device.", + freq/1000, spi->max_speed_hz/1000); + + iomod8(sCSS_DIVEN(1), 0, &pd->reg.spi->css); + iomod8(sBR_DIVIDER(-1), sBR_DIVIDER(DIV_ROUND_UP(125000000, freq)), &pd->reg.spi->br); + iomod8(0, sCSS_DIVEN(1), &pd->reg.spi->css); +} + +/** + * ax99100_pci_spi_set_mode: Set requested SPI transfer mode. + * + * @spi: Pointer to the device structure which provides information about the slave device. + * @mode: Requested SPI mode which should be configured. + */ +static void ax99100_pci_spi_set_mode(struct spi_device *spi, uint32_t mode) +{ + struct priv_data *pd = spi_master_get_devdata(spi->master); + + iomod8(sCM_CPHA(-1) | sCM_CPOL(-1), + sCM_CPHA(!!(mode & SPI_CPHA)) | sCM_CPOL(!!(mode & SPI_CPOL)), &pd->reg.spi->cm); +} + +/** + * ax99100_pci_spi_enable_irq: Enable IRQs of SPI controller. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static void ax99100_pci_spi_enable_irq(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + + iomod8(0, sSDC_STCIE(1) | sSDC_STERRIE(1), &pd->reg.spi->sdc); +} + +/** + * ax99100_pci_spi_disable_irq: Disable IRQs of SPI controller. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static void ax99100_pci_spi_disable_irq(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + + iomod8(sSDC_STCIE(1) | sSDC_STERRIE(1), 0, &pd->reg.spi->sdc); +} + +/* -------------------------------------------------------------------------- */ +/* ------ DMA functions ----------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_spi_do_dma_transfer: Processing the SPI DMA transfer. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + * + * Return: Always 0 + */ +static inline void ax99100_pci_spi_do_dma_transfer(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + struct scatterlist *rx_sgl, *tx_sgl; + + if (!pd->rx_sgt.nents && !pd->tx_sgt.nents) { + pd->flags.use_dma = 0; + + /* Disable IRQs */ + ax99100_pci_spi_disable_irq(sm); + + /* Wake up the framework */ + spi_finalize_current_transfer(sm); + + return; + } + + pd->flags.use_dma = 1; + if (pd->rx_sgt.nents--) { + rx_sgl = pd->rx_sgt.sgl++; + iowrite32(lower_32_bits(sg_dma_address(rx_sgl)), &pd->reg.rxdma->sar0); /* Set DMA lower 32-bit addr */ + iowrite32(upper_32_bits(sg_dma_address(rx_sgl)), &pd->reg.rxdma->sar1); /* Set DMA upper 32-bit addr */ + iowrite32(sg_dma_len(rx_sgl), &pd->reg.rxdma->lr); /* Set DMA transfer length */ + iowrite32(0x1, &pd->reg.rxdma->star); /* Enable RX DMA*/ + iomod8(0, sSDC_ERDMA(1), &pd->reg.spi->sdc); + } + if (pd->tx_sgt.nents--) { + tx_sgl = pd->tx_sgt.sgl++; + iowrite32(lower_32_bits(sg_dma_address(tx_sgl)), &pd->reg.txdma->sar0); /* Set DMA lower 32-bit addr */ + iowrite32(upper_32_bits(sg_dma_address(tx_sgl)), &pd->reg.txdma->sar1); /* Set DMA upper 32-bit addr */ + iowrite32(sg_dma_len(tx_sgl), &pd->reg.txdma->lr); /* Set DMA transfer length */ + iowrite32(0x1, &pd->reg.txdma->star); /* Enable TX DMA*/ + iomod8(0, sSDC_ETDMA(1), &pd->reg.spi->sdc); + } + + ax99100_pci_spi_enable_irq(sm); + + /* Start DMA processing */ + iomod8(0, sSDC_DMA_GO(1), &pd->reg.spi->sdc); +} + +/* -------------------------------------------------------------------------- */ +/* ------ OPCF functions ---------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_spi_read_fifo: Read as many bytes as possible from STOF registers. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static inline void ax99100_pci_spi_read_fifo(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + uint8_t nbytes = min_t(uint32_t, pd->rx_len, 8); + uint8_t byte, i = 0; + + if (!nbytes) + return; + + /* Read STOF data */ + while (nbytes-- && pd->rx_len--) { + byte = ioread8(&pd->reg.spi->stof[i++]); + if (pd->rx_buf) + *pd->rx_buf++ = byte; + } +} + +/** + * ax99100_pci_spi_write_fifo: Write as many bytes as possible to STOF registers. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static inline void ax99100_pci_spi_write_fifo(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + uint8_t nbytes = min_t(uint32_t, pd->tx_len, 8); + uint8_t byte, i = 0; + + if (!nbytes) { + pd->flags.use_opcf = 0; + + /* Disable IRQs */ + ax99100_pci_spi_disable_irq(sm); + + /* Wake up the framework */ + spi_finalize_current_transfer(sm); + + return; + } + pd->flags.use_opcf = 1; + + /* Set STOF length */ + iomod8(sSSOL_STOL(-1), sSSOL_STOL(nbytes - 1), &pd->reg.spi->ssol); + + /* Write STOF data */ + while (nbytes-- && pd->tx_len--) { + byte = pd->tx_buf ? *pd->tx_buf++ : 0; + iowrite8(byte, &pd->reg.spi->stof[i++]); + } + + ax99100_pci_spi_enable_irq(sm); + + /* Start OPCF processing */ + iomod8(0, sSDC_OPCFE(1) | sSDC_DMA_GO(1), &pd->reg.spi->sdc); +} + +/* -------------------------------------------------------------------------- */ +/* ------ API functions of SPI master --------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_spi_can_dma: Checks for a possible dma transfer. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + * @spi: Pointer to the device structure which provides information about the slave device. + * @transfer: Pointer to the spi_transfer structure which provide information about next transfer parameters + * + * Return: true, if a dma transfer is possible; otherwise false + */ +static bool ax99100_pci_spi_can_dma(struct spi_master *sm, struct spi_device *spi, struct spi_transfer *transfer) +{ + if (transfer->len < DMA_MIN_SIZE) + return false; + return true; +} + +/** + * ax99100_pci_spi_set_cs: Select or deselect the chip select line. + * + * @spi: Pointer to the spi_device structure + * @deselect: Select(0) or deselect (1) the chip select line + */ +static void ax99100_pci_spi_set_cs(struct spi_device *spi, bool deselect) +{ + struct priv_data *pd = spi_master_get_devdata(spi->master); + + /* NOTE: + * To prevent toggling of SCLK and MOSI/MISO, + * we do the SPI mode selection in front of processing the chip select. + */ + ax99100_pci_spi_set_mode(spi, spi->mode); + + if (gSSOL_EDE(ioread8(&pd->reg.spi->ssol))) + iomod8(sSSOL_SS(-1), sSSOL_SS((deselect) ? (-1) : (spi->chip_select)), &pd->reg.spi->ssol); + else + iomod8(sSSOL_SS(-1), sSSOL_SS((deselect) ? (-1) : ~(1 << spi->chip_select)), &pd->reg.spi->ssol); +} + +/** + * ax99100_pci_spi_transfer_one: Initiates the SPI transfer. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + * @spi: Pointer to the spi_device structure + * @transfer: Pointer to the spi_transfer structure which provide information about next transfer parameters + * + * Return: Always 1 to signal that the transfer is still in progress + */ +static int ax99100_pci_spi_transfer_one(struct spi_master *sm, struct spi_device *spi, struct spi_transfer *transfer) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + + ax99100_pci_spi_set_frequency(spi, transfer->speed_hz); + + /* MSB or LSB first? */ + iomod8(sCM_LSB(-1), sCM_LSB((spi->mode & SPI_LSB_FIRST) ? 1 : 0), &pd->reg.spi->cm); + + if ((transfer->rx_sg.nents > 0) || (transfer->tx_sg.nents > 0)) { + /* As we modify the sg_table structures while processing, + * we creates private copies of these! + */ + pd->rx_sgt = transfer->rx_sg; + pd->tx_sgt = transfer->tx_sg; + + /* Start DMA transfer */ + ax99100_pci_spi_do_dma_transfer(sm); + } else { + /* As we modify the buffer pointers and length fields while processing, + * we creates private copies of these! + */ + pd->rx_buf = transfer->rx_buf; + pd->tx_buf = transfer->tx_buf; + pd->rx_len = transfer->len; + pd->tx_len = transfer->len; + + /* Start OPCF transfer */ + ax99100_pci_spi_write_fifo(sm); + } + + return 1; +} + +/* -------------------------------------------------------------------------- */ +/* ------ IRQ functions ----------------------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +/** + * ax99100_pci_spi_isr: Interrupt subroutine of SPI controller. + * + * @irq: IRQ number + * @dev_id: Pointer to the spi_master structure which provides information about the controller. + * + * Return: IRQ_HANDLED on success; error value otherwise + */ +static irqreturn_t ax99100_pci_spi_isr(int irq, void *dev_id) +{ + struct spi_master *sm = dev_id; + struct priv_data *pd = spi_master_get_devdata(sm); + uint8_t status; + + status = ioread8(&pd->reg.spi->mis); + if (status & sMIS_STC(1)) { + if (pd->flags.use_dma) + ax99100_pci_spi_do_dma_transfer(sm); + + if (pd->flags.use_opcf) { + /* Read as many bytes as possible from OPCF */ + ax99100_pci_spi_read_fifo(sm); + /* Write as many bytes as possible to OPCF */ + ax99100_pci_spi_write_fifo(sm); + } + } + if (status & sMIS_STERR(1)) { + dev_err(&sm->cur_msg->spi->dev, "SPI transceiver error interrupt occurred\n"); + /* TODO: Implementation of error handling! */ + } + iowrite8(status, &pd->reg.spi->mis); + + return IRQ_HANDLED; +} + +/* -------------------------------------------------------------------------- */ +/* ------ Driver / Module functions ----------------------------------------- */ +/* -------------------------------------------------------------------------- */ + +struct spi_board_info spi_slave_devices[NUM_CHIPSELECT] = {0}; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 3, 0) + module_param_named(mode0, spi_slave_devices[0].mode, uint, 0644); + module_param_named(mode1, spi_slave_devices[1].mode, uint, 0644); + module_param_named(mode2, spi_slave_devices[2].mode, uint, 0644); +#else + module_param_named(mode0, spi_slave_devices[0].mode, ushort, 0644); + module_param_named(mode1, spi_slave_devices[1].mode, ushort, 0644); + module_param_named(mode2, spi_slave_devices[2].mode, ushort, 0644); +#endif + +module_param_string(modalias0, spi_slave_devices[0].modalias, sizeof(spi_slave_devices[0].modalias), 0644); +module_param_named(max_speed_hz0, spi_slave_devices[0].max_speed_hz, uint, 0644); + +module_param_string(modalias1, spi_slave_devices[1].modalias, sizeof(spi_slave_devices[0].modalias), 0644); +module_param_named(max_speed_hz1, spi_slave_devices[1].max_speed_hz, uint, 0644); + +module_param_string(modalias2, spi_slave_devices[2].modalias, sizeof(spi_slave_devices[0].modalias), 0644); +module_param_named(max_speed_hz2, spi_slave_devices[2].max_speed_hz, uint, 0644); + +/** + * ax99100_pci_spi_new_devices: Add optional SPI slave devices defined by module parameters. + */ +static void ax99100_pci_spi_new_devices(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + int i; + + for (i = 0; i < NUM_CHIPSELECT; i++) { + if (!strlen(spi_slave_devices[i].modalias)) + continue; + + spi_slave_devices[i].chip_select = i; + + pd->spi[i] = spi_new_device(sm, &spi_slave_devices[i]); + if (!pd->spi[i]) + dev_info(&pd->pci->dev, + "Add SPI slave (cs=%i, modalias=%s, mode=%d, max_speed_hz=%d) failed!\n", i, + spi_slave_devices[i].modalias, spi_slave_devices[i].mode, + spi_slave_devices[i].max_speed_hz); + else + dev_info(&pd->pci->dev, + "SPI slave (cs=%i, modalias=%s, mode=%d, max_speed_hz=%d) successfully added.\n", i, + spi_slave_devices[i].modalias, spi_slave_devices[i].mode, + spi_slave_devices[i].max_speed_hz); + } +} + +/** + * ax99100_pci_spi_unregister_devices: Unregister optional SPI slave devices defined by module parameters. + */ +static void ax99100_pci_spi_unregister_devices(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + int i; + + for (i = 0; i < NUM_CHIPSELECT; i++) { + if (pd->spi[i]) { + spi_unregister_device(pd->spi[i]); + pd->spi[i] = NULL; + } + } +} + +/** + * ax99100_pci_spi_chip_init: Initialize the SPI controller chip. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static void ax99100_pci_spi_chip_init(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + + /* Reset chip function */ + iowrite32(0x1, &pd->reg.common->swrst); + mdelay(10); + + /* Use internal 125MHz PLL clock as clock source */ + iomod8(sCSS_SPICKS(-1), sCSS_SPICKS(0), &pd->reg.spi->css); + + /* Enable SPI controller and slave select pins */ + iowrite8(sCM_SPIMEN(1) | sCM_SSOE(1), &pd->reg.spi->cm); +} + +/** + * ax99100_pci_spi_chip_dinit: Deinitialize the SPI controller chip. + * + * @sm: Pointer to the spi_master structure which provides information about the controller. + */ +static void ax99100_pci_spi_chip_deinit(struct spi_master *sm) +{ + struct priv_data *pd = spi_master_get_devdata(sm); + + /* Reset chip function */ + iowrite32(0x1, &pd->reg.common->swrst); + mdelay(10); +} + +/** + * ax99100_pci_spi_probe: + * + * @pci: Pointer to the pci device of spi master. + * @pci_id: + * + * Return: 0 on success; error value otherwise + */ +static int ax99100_pci_spi_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) +{ + struct device *dev = &pci->dev; + struct priv_data *pd; + struct spi_master *sm; + int err; + + sm = spi_alloc_master(dev, sizeof(*pd)); + if (!sm) + return -ENOMEM; + + pd = spi_master_get_devdata(sm); + pd->spi_master = sm; + + pci_set_drvdata(pci, pd); + pd->pci = pci; + + /* Enable PCI device, request regions and enable bus-master for DMA transfers */ + err = pci_enable_device(pci); + if (err) { + dev_err(dev, "Enable PCI device failed!\n"); + goto err0; + } + err = pci_request_regions(pci, dev_name(dev)); + if (err) { + dev_info(dev, "Request PCI regions failed!\n"); + goto err1; + } + err = dma_set_mask(&pci->dev, DMA_BIT_MASK(64)); + if (err) { + dev_info(dev, "Set DMA mask failed!\n"); + goto err2; + } + pci_set_master(pci); + + /* Map required IO regions */ + pd->reg.spi = pci_iomap_range(pci, 0, 0x0, sizeof(*pd->reg.spi)); + if (!pd->reg.spi) { + dev_err(dev, "Map PCI IO bar0 failed (spi)!\n"); + err = -ENODEV; + goto err5; + } + + /* Map required memory regions */ + pd->reg.txdma = pci_iomap_range(pci, 1, 0x80, sizeof(*pd->reg.txdma)); + if (!pd->reg.txdma) { + dev_err(dev, "Map PCI memory bar1 failed (txdma)!\n"); + err = -ENODEV; + goto err2; + } + pd->reg.rxdma = pci_iomap_range(pci, 1, 0x100, sizeof(*pd->reg.rxdma)); + if (!pd->reg.rxdma) { + dev_err(dev, "Map PCI memory bar1 failed (rxdma)!\n"); + err = -ENODEV; + goto err3; + } + pd->reg.common = pci_iomap_range(pci, 1, 0x238, sizeof(*pd->reg.common)); + if (!pd->reg.common) { + dev_err(dev, "Map PCI memory bar1 failed (common)!\n"); + err = -ENODEV; + goto err4; + } + + /* Install IRQ handler */ + err = devm_request_irq(dev, pci->irq, ax99100_pci_spi_isr, IRQF_SHARED, KBUILD_MODNAME, sm); + if (err) { + dev_err(dev, "Register IRQ%d failed!\n", pci->irq); + goto err6; + } + + /* Configure the SPI master structure */ + sm->dev.of_node = dev->of_node; + sm->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; + sm->bits_per_word_mask = SPI_BPW_MASK(8); + sm->max_speed_hz = MAX_SPEED_HZ; + sm->min_speed_hz = MIN_SPEED_HZ; + sm->num_chipselect = NUM_CHIPSELECT; + + sm->set_cs = ax99100_pci_spi_set_cs; + sm->transfer_one = ax99100_pci_spi_transfer_one; + + sm->can_dma = ax99100_pci_spi_can_dma; + sm->max_dma_len = DMA_MAX_SIZE; + + ax99100_pci_spi_chip_init(sm); + + err = devm_spi_register_master(dev, sm); + if (err) { + dev_err(dev, "Register SPI master failed!\n"); + goto err7; + } + + dev_info(dev, "%s successfully initialized!\n", dev_name(&sm->dev)); + + /* Add optional SPI devices defined by module parameters */ + ax99100_pci_spi_new_devices(sm); + + return 0; + +err7: + ax99100_pci_spi_chip_deinit(sm); +err6: + pci_iounmap(pci, pd->reg.spi); +err5: + pci_iounmap(pci, pd->reg.common); +err4: + pci_iounmap(pci, pd->reg.rxdma); +err3: + pci_iounmap(pci, pd->reg.txdma); +err2: + pci_clear_master(pci); + pci_release_regions(pci); +err1: + pci_disable_device(pci); +err0: + spi_master_put(sm); + + return err; +} + +/** + * ax99100_pci_spi_remove: + * + * @pci: + */ +static void ax99100_pci_spi_remove(struct pci_dev *pci) +{ + struct priv_data *pd = pci_get_drvdata(pci); + struct spi_master *sm = pd->spi_master; + + ax99100_pci_spi_unregister_devices(sm); + ax99100_pci_spi_chip_deinit(sm); + + pci_iounmap(pci, pd->reg.spi); + pci_iounmap(pci, pd->reg.common); + pci_iounmap(pci, pd->reg.rxdma); + pci_iounmap(pci, pd->reg.txdma); + pci_clear_master(pci); + pci_release_regions(pci); + pci_disable_device(pci); + + dev_info(&pci->dev, "%s successfully removed!\n", dev_name(&sm->dev)); +} + +/* ------------------------------------------------------------------------- */ + +static const struct pci_device_id ax99100_pci_spi_devices[] = { + { PCI_DEVICE_SUB(HILSCHER_PCI_VENDOR_ID, HILSCHER_PCI_DEVICE_ID, + HILSCHER_PCI_SUB_VENDOR_ID, HILSCHER_PCI_SUB_DEVICE_ID_SPI)}, + { }, +}; +MODULE_DEVICE_TABLE(pci, ax99100_pci_spi_devices); + +/* ------------------------------------------------------------------------- */ + +static struct pci_driver ax99100_pci_spi_driver = { + .name = DRIVER_NAME, + .id_table = ax99100_pci_spi_devices, + .probe = ax99100_pci_spi_probe, + .remove = ax99100_pci_spi_remove, +}; + +static int __init ax99100_pci_spi_init(void) +{ + pr_info("%s: %s\n", DRIVER_NAME, DRIVER_DESC); + return pci_register_driver(&ax99100_pci_spi_driver); +} +module_init(ax99100_pci_spi_init); + +static void __exit ax99100_pci_spi_exit(void) +{ + pci_unregister_driver(&ax99100_pci_spi_driver); +} +module_exit(ax99100_pci_spi_exit); + +MODULE_AUTHOR("Hilscher Gesellschaft fuer Systemautomation mbH"); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL v2"); diff --git a/cifx_m2/readme.md b/cifx_m2/readme.md new file mode 100644 index 0000000..f4314ea --- /dev/null +++ b/cifx_m2/readme.md @@ -0,0 +1,103 @@ +# Overview + +The [cifX/M.2](https://www.hilscher.com/products/pc-cards-for-industrial-ethernet-fieldbus/m2) card is a netX90 based multi function PCIe device. It provides a SPI interface for accessing the netX90 as well as multiple GPIOs. GPIO at offset 7 can optionally be used as an interrrupt source (DIRQ) for the cifX driver. + +The driver consists of the kernel modules ax99100-pci-spi and the optional ax99100-pci-gpio. + +### ax99100-pci-spi.ko: +The module abstracts the PCIe to SPI transfers via the Linux spidev interface. +The module supports interrupt and DMA based tranfers. +Accesses less than 8 byte are executed via fifo mode and may be slower than DMA. + +### ax99100-pci-gpio.ko (optional): +### NOTE: Currently the build is disabled by default, since the current version is not compatible with the latest linux version. +The module delivers interrupts generated by the changes, by the netX, of the DPMs handshake cells (DIRQ pin) via a GPIO pin. +If not loaded the cifX driver will poll the DPMs handshake cells. +
+
+
+
+### Build the driver modules: +To build the kernel mode driver just enter this folder and run make. +``` +make +``` +Copy the driver modules into the desired kernel library folder which they are compiled for. +``` +sudo make modules_install +``` +Update the module dependencies in the modules.dep file. +``` +sudo depmod +``` + +### Loading ax99100-pci-spi: + +By default the module will create the SPI device to access the netX90 on the cifX/M.2 card with SPI mode set to 3 and the maximum speed of 40Mhz. +In this case the SPI interface will be /dev/spidev[x].0. + +NOTE: Speed and mode can be easily configured by the user space application via the cifX driver SPI plugin or the drivers interface. + For a detailed explanaition of the SPI plugin configuration refer to the Linux cifX Driver Documentation. + +In case the SPI driver need to be changed or the maximum speed should be limited the module provides parameter arrays for configuration purposes. +It is possible to register up to 3 SPI slave devices. +The module parameter 0-2 will configure the SPI interfaces of the SPI slaves at chip select 0-2. +Module parameter 0 will setup and grant access to the netX90 on the cifX/M.2 card. + +Module parameters are: + +- modalias[0..2]= + Optional, if not specified spidev is selected. + In common Linux environment choose "spidev" as the driver which handles the SPI acccess. The device will appear than + as /dev/spidev[x].0 + + NOTE: Starting with kernel 5.x "spidev" was removed. You will need to use one of the following list + https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/spi/spidev.c?h=v5.15.90#n687 + (e.g. spi-petra) + +- mode[0..2]=[0..3] + Optional, if not specified mode 3 is choosen. + +- max_speed_hz[0..2]= + Optional, if not specified the maximum 40Mhz is configured. + Speed configuration during runtime via the cifX SPI plugin or the drivers interface (e.g. spidev driver via SPI_IOC_[RD/WR]_MAX_SPEED_HZ) can + not exceed the configured value. + +Example: Configure the SPI interface (at chip-select 0) for accessing the netX90 based cifX/M.2 card with mode 3 and a maximum speed of 25Mhz. + +``` +modprobe ax99100-pci-spi modalias0=spidev mode0=3 max_speed_hz0=25000000 +``` + +To enable the auto creation of spidev device at boot time, a configuration file must be created as follow. + +``` +echo "options ax99100-pci-spi modalias0=spidev" > /etc/modprobe.d/cifx-m2.conf +``` + +### Loading ax99100-pci-gpio (optional): +NOTE: The current implementation may not be compatible with the latest kernel version and is therefore disabled by default. + +To enable interrupt support for the DPMs handshake cells: +``` +modprobe ax99100-pci-gpio +``` + +Loading the module will create a gpio chip module in the sysfs directory (/sys/class/gpio/). +After the exporting the GPIO (offset 7) the following GPIO sysfs configuration is required: + +``` +direction = "in" +edge = "rising" +active_low = "1" +``` + +Add the path to the "value" file in the SPI plugin configuration (e.g. /opt/cifx/plugins/netx-spm/config0): +``` +Irq=/sys/class/gpio/gpio[xxx]/value +``` + +Enable irq for the device (e.g. /opt/cifx/FW/device.conf): +``` +irq=yes +``` diff --git a/doc/OBSOLETE-cifX-Device-Driver-Linux-DRV-15-EN.pdf b/doc/OBSOLETE-cifX-Device-Driver-Linux-DRV-15-EN.pdf new file mode 100644 index 0000000..a3b48df Binary files /dev/null and b/doc/OBSOLETE-cifX-Device-Driver-Linux-DRV-15-EN.pdf differ diff --git a/doc/drv_config.png b/doc/drv_config.png new file mode 100644 index 0000000..9485c32 Binary files /dev/null and b/doc/drv_config.png differ diff --git a/doc/drv_overview.png b/doc/drv_overview.png new file mode 100644 index 0000000..dc7f574 Binary files /dev/null and b/doc/drv_overview.png differ diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt new file mode 100644 index 0000000..9494705 --- /dev/null +++ b/examples/CMakeLists.txt @@ -0,0 +1,7 @@ + +cmake_minimum_required (VERSION 2.8.12) +project(cifx_examples) +set(PROJECT_VERSION, 1.0.0) + +include(${CMAKE_CURRENT_LIST_DIR}/tcpserver/CMakeLists.txt) +include(${CMAKE_CURRENT_LIST_DIR}/api/CMakeLists.txt) diff --git a/examples/api/CMakeLists.txt b/examples/api/CMakeLists.txt new file mode 100644 index 0000000..09d46d9 --- /dev/null +++ b/examples/api/CMakeLists.txt @@ -0,0 +1,24 @@ + +cmake_minimum_required (VERSION 2.8.12) +project(cifxapi) +set(PROJECT_VERSION, 1.0.0) + +set(src_dir ${CMAKE_CURRENT_LIST_DIR}) + +if(LIBRARY_HEADER OR LIBRARY_INC_LIB) + if (LIBRARY_HEADER) + set(LIBRARY_REQ_INCLUDE_DIRS ${LIBRARY_HEADER}) + endif (LIBRARY_HEADER) + if (LIBRARY_INC_LIB) + set (LIBRARY_INC_LIB "-L${LIBRARY_INC_LIB}") + endif (LIBRARY_INC_LIB) + set(LIBRARY_REQ_LIBRARIES "-lpthread -lrt -lcifx ${LIBRARY_INC_LIB}") +else(LIBRARY_HEADER OR LIBRARY_INC_LIB) + include(FindPkgConfig) + pkg_check_modules(LIBRARY_REQ REQUIRED cifx) +endif(LIBRARY_HEADER OR LIBRARY_INC_LIB) + +add_executable( cifx_api ${src_dir}/cifxlinuxsample.c) +target_include_directories( cifx_api BEFORE PUBLIC ${src_dir}/ ${LIBRARY_REQ_INCLUDE_DIRS}) +target_link_libraries ( cifx_api ${LIBRARY_REQ_LIBRARIES}) +install(TARGETS cifx_api DESTINATION ${CMAKE_INSTALL_PREFIX}/bin) diff --git a/examples/api/cifxlinuxsample.c b/examples/api/cifxlinuxsample.c new file mode 100644 index 0000000..72c1643 --- /dev/null +++ b/examples/api/cifxlinuxsample.c @@ -0,0 +1,987 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: cifX driver API demo application + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include "cifxlinux.h" +#include "cifXEndianess.h" + +#include "Hil_Packet.h" +#include "Hil_SystemCmd.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CIFX_DEV "cifX0" + +#ifndef UNREFERENCED_PARAMETER + #define UNREFERENCED_PARAMETER(a) (a=a) +#endif + +typedef struct SYNC_CALLBACK_DATAtag +{ + uint8_t bSyncHSMode; + CIFXHANDLE hDevice; +} SYNC_CALLBACK_DATA; + + +/*****************************************************************************/ +/*! Callback rountine for events +* \param ulNotification Sync command +* \param ulDataLen Length of buffer referenced by pvData +* \param pvData Data +* \param pvUser User pointer */ +/*****************************************************************************/ +void APIENTRY EventCallback (uint32_t ulNotification, uint32_t ulDataLen, void* pvData, void* pvUser) +{ + UNREFERENCED_PARAMETER(pvData); + UNREFERENCED_PARAMETER(ulDataLen); + + switch (ulNotification) + { + case CIFX_NOTIFY_RX_MBX_FULL: + printf("EventCallback(): CIFX_NOTIFY_RX_MBX_FULL\n"); + break; + + case CIFX_NOTIFY_TX_MBX_EMPTY: + printf("EventCallback(): CIFX_NOTIFY_TX_MBX_EMPTY\n"); + break; + + case CIFX_NOTIFY_PD0_IN: + printf("EventCallback(): CIFX_NOTIFY_PD0_IN\n"); + break; + + case CIFX_NOTIFY_PD0_OUT: + printf("EventCallback(): CIFX_NOTIFY_PD0_OUT\n"); + break; + + case CIFX_NOTIFY_PD1_IN: + printf("EventCallback(): CIFX_NOTIFY_PD1_IN\n"); + break; + + case CIFX_NOTIFY_PD1_OUT: + printf("EventCallback(): CIFX_NOTIFY_PD1_OUT\n"); + break; + + default: + printf("EventCallback(): UNKNOWN Event, Event number %lu, pvUser 0x%08lx \n", (long unsigned int)ulNotification, (unsigned long)pvUser); + break; + } +} + + +/*****************************************************************************/ +/*! Callback rountine for sync events +* \param ulNotification Sync command +* \param ulDataLen Length of buffer referenced by pvData +* \param pvData Data +* \param pvUser User pointer */ +/*****************************************************************************/ +void APIENTRY SyncEventCallback (uint32_t ulNotification, uint32_t ulDataLen, void* pvData, void* pvUser) +{ + int32_t lRet = 0; + uint32_t ulErrorCount = 0; + SYNC_CALLBACK_DATA* ptSynchData = (SYNC_CALLBACK_DATA*)pvUser; + + UNREFERENCED_PARAMETER(pvData); + UNREFERENCED_PARAMETER(ulDataLen); + UNREFERENCED_PARAMETER(ulNotification); + + switch (ptSynchData->bSyncHSMode) { + + case HIL_SYNC_MODE_DEV_CTRL: + printf("EventCallback(): Sync event - acknowledge requested (device controlled)\n"); + + lRet = xChannelSyncState( ptSynchData->hDevice, CIFX_SYNC_ACKNOWLEDGE_CMD, 1000, &ulErrorCount); + if(CIFX_NO_ERROR != lRet) { + printf("Error signaling the Sync, lRet = 0x%08X\n", (unsigned int)lRet); + } + break; + + case HIL_SYNC_MODE_HST_CTRL: + printf("EventCallback(): Sync event (host controlled)\n"); + /* dont do anything */ + break; + + default: + printf("EventCallback(): Error sync mode not known (mode=0x%X)!\n", ptSynchData->bSyncHSMode); + break; + } +} + + +static int kbhit() +{ + struct termios oldt, newt; + int ch; + int oldf; + int iRet = 0; + + tcgetattr(STDIN_FILENO, &oldt); + newt = oldt; + newt.c_lflag &= ~(ICANON | ECHO); + tcsetattr(STDIN_FILENO, TCSANOW, &newt); + oldf = fcntl(STDIN_FILENO, F_GETFL, 0); + fcntl(STDIN_FILENO, F_SETFL, oldf | O_NONBLOCK); + + ch = getchar(); + + tcsetattr(STDIN_FILENO, TCSANOW, &oldt); + fcntl(STDIN_FILENO, F_SETFL, oldf); + + if(ch != EOF) + { + ungetc(ch, stdin); + iRet = 1; + } + return iRet; +} + + +/*****************************************************************************/ +/*! Displays cifX error +* \param lError Error code */ +/*****************************************************************************/ +void ShowError( int32_t lError ) +{ + if( lError != CIFX_NO_ERROR) + { + char szError[1024] ={0}; + xDriverGetErrorDescription( lError, szError, sizeof(szError)); + printf("Error: 0x%X, <%s>\n", (unsigned int)lError, szError); + } +} + + +/*****************************************************************************/ +/*! Displays a hex dump on the debug console (16 bytes per line) +* \param pbData Pointer to dump data +* \param ulDataLen Length of data dump */ +/*****************************************************************************/ +void DumpData(unsigned char* pbData, unsigned long ulDataLen) +{ + unsigned long ulIdx; +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + for(ulIdx = 0; ulIdx < ulDataLen; ++ulIdx) + { + if(0 == (ulIdx % 16)) + printf("\r\n"); + + printf("%02X ", pbData[ulIdx]); + } + printf("\r\n"); +} + + +/*****************************************************************************/ +/*! Dumps a rcX packet to debug console +* \param ptPacket Pointer to packed being dumped */ +/*****************************************************************************/ +void DumpPacket(CIFX_PACKET* ptPacket) +{ +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + printf("Dest : 0x%08lX ID : 0x%08lX\r\n",(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulDest), (long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulId)); + printf("Src : 0x%08lX Sta : 0x%08lX\r\n",(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulSrc), (long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulState)); + printf("DestID : 0x%08lX Cmd : 0x%08lX\r\n",(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulDestId),(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulCmd)); + printf("SrcID : 0x%08lX Ext : 0x%08lX\r\n",(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulSrcId), (long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulExt)); + printf("Len : 0x%08lX Rout : 0x%08lX\r\n",(long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulLen), (long unsigned int)HOST_TO_LE32(ptPacket->tHeader.ulRout)); + + printf("Data:"); + DumpData(ptPacket->abData, HOST_TO_LE32(ptPacket->tHeader.ulLen)); +} + + +/*****************************************************************************/ +/*! Function to display driver information + * \param hDriver Handle to cifX driver + * \param ptVTable Pointer to cifX API function table + * \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +void DisplayDriverInformation (void) +{ + int32_t lRet = CIFX_NO_ERROR; + DRIVER_INFORMATION tDriverInfo = {{0}}; + char szDrvVersion[32] = ""; + CIFXHANDLE hDriver = NULL; + + if (CIFX_NO_ERROR == (lRet = xDriverOpen(&hDriver))) + { + printf("\n---------- Display Driver Version ----------\n"); + if( CIFX_NO_ERROR != (lRet = xDriverGetInformation(hDriver, sizeof(tDriverInfo), &tDriverInfo)) ) + ShowError( lRet); + else if ( CIFX_NO_ERROR != (lRet = cifXGetDriverVersion( sizeof(szDrvVersion)/sizeof(*szDrvVersion), szDrvVersion))) + ShowError( lRet); + else + printf("Driver Version: %s, based on %.32s \n\n", szDrvVersion, tDriverInfo.abDriverVersion); + + /* close previously opened driver */ + xDriverClose(hDriver); + + } + + printf(" State = 0x%08X\r\n", (unsigned int)lRet); + printf("----------------------------------------------------\r\n"); +} + + +/*****************************************************************************/ +/*! Function to demonstrate the board/channel enumeration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t EnumBoardDemo(void) +{ +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + CIFXHANDLE hDriver = NULL; + int32_t lRet = xDriverOpen(&hDriver); + + printf("---------- Board/Channel enumeration demo ----------\r\n"); + + if(CIFX_NO_ERROR == lRet) + { + /* Driver/Toolkit successfully opened */ + unsigned long ulBoard = 0; + BOARD_INFORMATION tBoardInfo = {0}; + + /* Iterate over all boards */ + while(CIFX_NO_ERROR == xDriverEnumBoards(hDriver, ulBoard, sizeof(tBoardInfo), &tBoardInfo)) + { + printf("Found Board %s\r\n", tBoardInfo.abBoardName); + if(strlen( (char*)tBoardInfo.abBoardAlias) != 0) + printf(" Alias : %s\r\n", tBoardInfo.abBoardAlias); + + printf(" DeviceNumber : %lu\r\n",(long unsigned int)tBoardInfo.tSystemInfo.ulDeviceNumber); + printf(" SerialNumber : %lu\r\n",(long unsigned int)tBoardInfo.tSystemInfo.ulSerialNumber); + printf(" Board ID : %lu\r\n",(long unsigned int)tBoardInfo.ulBoardID); + printf(" System Error : 0x%08lX\r\n",(long unsigned int)tBoardInfo.ulSystemError); + printf(" Channels : %lu\r\n",(long unsigned int)tBoardInfo.ulChannelCnt); + printf(" DPM Size : %lu\r\n",(long unsigned int)tBoardInfo.ulDpmTotalSize); + + unsigned long ulChannel = 0; + CHANNEL_INFORMATION tChannelInfo = {{0}}; + + /* iterate over all channels on the current board */ + while(CIFX_NO_ERROR == xDriverEnumChannels(hDriver, ulBoard, ulChannel, sizeof(tChannelInfo), &tChannelInfo)) + { + printf(" - Channel %lu:\r\n", ulChannel); + printf(" Firmware : %s\r\n", tChannelInfo.abFWName); + printf(" Version : %u.%u.%u build %u\r\n", + tChannelInfo.usFWMajor, + tChannelInfo.usFWMinor, + tChannelInfo.usFWRevision, + tChannelInfo.usFWBuild); + printf(" Date : %02u/%02u/%04u\r\n", + tChannelInfo.bFWMonth, + tChannelInfo.bFWDay, + tChannelInfo.usFWYear); + + printf(" Device Nr. : %lu\r\n",(long unsigned int)tChannelInfo.ulDeviceNumber); + printf(" Serial Nr. : %lu\r\n",(long unsigned int)tChannelInfo.ulSerialNumber); + printf(" netX Flags : 0x%08X\r\n", tChannelInfo.ulNetxFlags); + printf(" Host Flags : 0x%08X\r\n", tChannelInfo.ulHostFlags); + printf(" Host COS : 0x%08X\r\n", tChannelInfo.ulHostCOSFlags); + printf(" Device COS : 0x%08X\r\n", tChannelInfo.ulDeviceCOSFlags); + + ++ulChannel; + } + + ++ulBoard; + } + + /* close previously opened driver */ + xDriverClose(hDriver); + } + + printf(" State = 0x%08X\r\n", (unsigned int)lRet); + printf("----------------------------------------------------\r\n"); + + return lRet; +} + +/*****************************************************************************/ +/*! Function to demonstrate system channel functionality (PacketTransfer) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t SysdeviceDemo() +{ +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + CIFXHANDLE hDriver = NULL; + int32_t lRet = xDriverOpen(&hDriver); + + printf("---------- System Device handling demo ----------\r\n"); + + if(CIFX_NO_ERROR == lRet) + { + /* Driver/Toolkit successfully opened */ + CIFXHANDLE hSys = NULL; + lRet = xSysdeviceOpen(hDriver, CIFX_DEV, &hSys); + + if(CIFX_NO_ERROR != lRet) + { + printf("Error opening SystemDevice!\r\n"); + + } else + { + SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK tSysInfoBlock = {{0}}; + SYSTEM_CHANNEL_SYSTEM_INFORMATION tSysInfo = {0}; + SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCK tControlBlock = {0}; + SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK tStatusBlock = {0}; + + /* System channel successfully opened, try to read the System Info Block */ + if( CIFX_NO_ERROR != (lRet = xSysdeviceInfo(hSys, CIFX_INFO_CMD_SYSTEM_INFO_BLOCK, sizeof(tSysInfoBlock), &tSysInfoBlock))) + { + printf("Error querying system information block\r\n"); + } else + { + printf("System Channel Info Block:\r\n"); + printf("==========================\r\n"); + printf("DPM Cookie : %.4s\r\n",(char*)tSysInfoBlock.abCookie); + printf("DPM Size : %lu\r\n",(long unsigned int)tSysInfoBlock.ulDpmTotalSize); + printf("Device Number : %lu\r\n",(long unsigned int)tSysInfoBlock.ulDeviceNumber); + printf("Serial Number : %lu\r\n",(long unsigned int)tSysInfoBlock.ulSerialNumber); + printf("HW Options : 0x%04X 0x%04X 0x%04X 0x%04X\r\n", + tSysInfoBlock.ausHwOptions[0], tSysInfoBlock.ausHwOptions[1], + tSysInfoBlock.ausHwOptions[2], tSysInfoBlock.ausHwOptions[3]); + printf("Manufacturer : %u\r\n", tSysInfoBlock.usManufacturer); + printf("Production Date : %u\r\n", tSysInfoBlock.usProductionDate); + printf("Device Class : %u\r\n", tSysInfoBlock.usDeviceClass); + printf("HW Revision : %u\r\n", tSysInfoBlock.bHwRevision); + printf("HW Compatibility : %u\r\n", tSysInfoBlock.bHwCompatibility); + + printf("License Flags 1 : 0x%08X\r\n", tSysInfoBlock.ulLicenseFlags1); + printf("License Flags 2 : 0x%08X\r\n", tSysInfoBlock.ulLicenseFlags2); + printf("LicenseID : 0x%04X\r\n", tSysInfoBlock.usNetxLicenseID); + printf("LicenseFlags : 0x%04X\r\n", tSysInfoBlock.usNetxLicenseFlags); + printf("==========================\r\n"); + } + + /* Try to read the System Information */ + if( CIFX_NO_ERROR != (lRet = xSysdeviceInfo(hSys, CIFX_INFO_CMD_SYSTEM_INFORMATION, sizeof(tSysInfo), &tSysInfo))) + { + printf("Error querying system information\r\n"); + } else + { + printf("System Information:\r\n"); + printf("===================\r\n"); + printf("System Error : 0x%08X\r\n", tSysInfo.ulSystemError); + printf("DPM Size : %lu\r\n", (long unsigned int)tSysInfo.ulDpmTotalSize); + printf("Mailbox size : %lu\r\n", (long unsigned int)tSysInfo.ulMBXSize); + printf("Device Number : %lu\r\n", (long unsigned int)tSysInfo.ulDeviceNumber); + printf("Serial Number : %lu\r\n", (long unsigned int)tSysInfo.ulSerialNumber); + printf("Open Count : %lu\r\n", (long unsigned int)tSysInfo.ulOpenCnt); + printf("===================\r\n"); + } + + /* Try to read the System Control Block */ + if( CIFX_NO_ERROR != (lRet = xSysdeviceInfo(hSys, CIFX_INFO_CMD_SYSTEM_CONTROL_BLOCK, sizeof(tControlBlock), &tControlBlock))) + { + printf("Error querying system control block\r\n"); + } else + { + printf("System Control Block:\r\n"); + printf("=====================\r\n"); + printf("Command COS : 0x%08X\r\n", tControlBlock.ulSystemCommandCOS); + printf("System Control : 0x%08X\r\n", tControlBlock.ulSystemControl); + printf("=====================\r\n"); + } + + printf("Waiting 2s to let cifX card calculate CPU load!\r\n"); + sleep(2); + + /* Try to read the System Status Block */ + if( CIFX_NO_ERROR != (lRet = xSysdeviceInfo(hSys, CIFX_INFO_CMD_SYSTEM_STATUS_BLOCK, sizeof(tStatusBlock), &tStatusBlock))) + { + printf("Error querying system status block\r\n"); + } else + { + printf("System Status Block:\r\n"); + printf("====================\r\n"); + printf("System COS : 0x%08X\r\n", tStatusBlock.ulSystemCOS); + printf("System Status : 0x%08X\r\n", tStatusBlock.ulSystemStatus); + printf("System Error : 0x%08X\r\n", tStatusBlock.ulSystemError); + printf("Time since start : %lu\r\n", (long unsigned int)tStatusBlock.ulTimeSinceStart); + printf("CPU Load [%%] : %.2f\r\n", (float)tStatusBlock.usCpuLoad / 100); + printf("====================\r\n"); + } + + unsigned long ulSendPktCount = 0; + unsigned long ulRecvPktCount = 0; + + printf("\r\n"); + printf("Trying to read Security Eeprom:\r\n"); + printf("===============================\r\n"); + + + /* Read Security EEPROM zone 1*/ + xSysdeviceGetMBXState(hSys, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + printf("System Mailbox State: MaxSend = %lu, Pending Receive = %lu\r\n", + ulSendPktCount, ulRecvPktCount); + + HIL_SECURITY_EEPROM_READ_REQ_T tCryptoRead = {{0}}; + HIL_SECURITY_EEPROM_READ_CNF_T tCryptoReadCnf = {{0}}; + + tCryptoRead.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tCryptoRead.tHead.ulLen = HOST_TO_LE32(sizeof(tCryptoRead.tData)); + tCryptoRead.tHead.ulCmd = HOST_TO_LE32(HIL_SECURITY_EEPROM_READ_REQ); + tCryptoRead.tData.ulZoneId = HOST_TO_LE32(1); + + if(CIFX_NO_ERROR != (lRet = xSysdevicePutPacket(hSys, (CIFX_PACKET*)&tCryptoRead, 10))) + { + printf("Error sending packet to device (0x%X)!\r\n", lRet); + } else + { + printf("Send Packet (Read Crypto Flash Zone 1):\r\n"); + DumpPacket((CIFX_PACKET*)&tCryptoRead); + + xSysdeviceGetMBXState(hSys, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + printf("System Mailbox State: MaxSend = %lu, Pending Receive = %lu\r\n", + ulSendPktCount, ulRecvPktCount); + + if(CIFX_NO_ERROR != (lRet = xSysdeviceGetPacket(hSys, sizeof(tCryptoReadCnf), (CIFX_PACKET*)&tCryptoReadCnf, 20)) ) + { + printf("Error getting packet from device! (lRet=0x%08X)\r\n",(unsigned int)lRet); + } else + { + printf("Received Packet (Read Crypto Flash Zone 1):\r\n"); + DumpPacket((CIFX_PACKET*)&tCryptoReadCnf); + + xSysdeviceGetMBXState(hSys, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + printf("System Mailbox State: MaxSend = %lu, Pending Receive = %lu\r\n", + ulSendPktCount, ulRecvPktCount); + } + } + + printf("===============================\r\n"); + printf("\r\n"); + + xSysdeviceClose(hSys); + } + + xDriverClose(hDriver); + } + + printf(" State = 0x%08X\r\n", (unsigned int)lRet); + printf("----------------------------------------------------\r\n"); + + return lRet; +} + +/*****************************************************************************/ +/*! Function to demonstrate communication channel functionality +* Packet Transfer and I/O Data exchange +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t ChannelDemo() +{ +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + CIFXHANDLE hDriver = NULL; + int32_t lRet = xDriverOpen(&hDriver); + + printf("---------- Communication Channel demo ----------\r\n"); + + if(CIFX_NO_ERROR == lRet) + { + /* Driver/Toolkit successfully opened */ + CIFXHANDLE hChannel = NULL; + lRet = xChannelOpen(hDriver, CIFX_DEV, 0, &hChannel); + + if(CIFX_NO_ERROR != lRet) + { + printf("Error opening Channel!"); + + } else + { + CHANNEL_INFORMATION tChannelInfo = {{0}}; + + /* Channel successfully opened, so query basic information */ + if( CIFX_NO_ERROR != (lRet = xChannelInfo(hChannel, sizeof(CHANNEL_INFORMATION), &tChannelInfo))) + { + printf("Error querying system information block\r\n"); + } else + { + printf("Communication Channel Info:\r\n"); + printf("Device Number : %lu\r\n",(long unsigned int)tChannelInfo.ulDeviceNumber); + printf("Serial Number : %lu\r\n",(long unsigned int)tChannelInfo.ulSerialNumber); + printf("Firmware : %s\r\n", tChannelInfo.abFWName); + printf("FW Version : %u.%u.%u build %u\r\n", + tChannelInfo.usFWMajor, + tChannelInfo.usFWMinor, + tChannelInfo.usFWRevision, + tChannelInfo.usFWBuild); + printf("FW Date : %02u/%02u/%04u\r\n", + tChannelInfo.bFWMonth, + tChannelInfo.bFWDay, + tChannelInfo.usFWYear); + + printf("Mailbox Size : %lu\r\n",(long unsigned int)tChannelInfo.ulMailboxSize); + } + uint32_t ulSendPktCount = 0; + uint32_t ulRecvPktCount = 0; + CIFX_PACKET tSendPkt = {{0}}; + CIFX_PACKET tRecvPkt = {{0}}; + + printf("\nStart put/get packet Demo!\n"); + + /* Read Security EEPROM zone 1*/ + xChannelGetMBXState( hChannel, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + printf("Channel Mailbox State: MaxSend = %u, Pending Receive = %u\r\n", + ulSendPktCount, ulRecvPktCount); + + /* Do a basic Packet Transfer */ + if(CIFX_NO_ERROR != (lRet = xChannelPutPacket(hChannel, &tSendPkt, 10))) + { + printf("Error sending packet to device (0x%X)!\r\n", lRet); + } else + { + printf("Send Packet:\r\n"); + DumpPacket(&tSendPkt); + + if(CIFX_NO_ERROR != (lRet = xChannelGetPacket(hChannel, sizeof(tRecvPkt), &tRecvPkt, 20)) ) + { + printf("Error getting packet from device!\r\n"); + } else + { + printf("Received Packet:\r\n"); + DumpPacket(&tRecvPkt); + } + } + + sleep(1); + + printf("\nStart read/write IO-Data!\n"); + + /* Read and write I/O data (32Bytes). Output data will be incremented each cyle */ + unsigned char abSendData[32] = {0}; + unsigned char abRecvData[32] = {0}; + unsigned long ulCycles = 0; + unsigned long ulState; + + if(CIFX_NO_ERROR != (lRet = xChannelBusState(hChannel, CIFX_BUS_STATE_ON,(uint32_t*) &ulState, 10000))) + { + printf("Error setting Bus state lRet = 0x%08X!\r\n",(unsigned int)lRet); + + xChannelClose(hChannel); + xDriverClose(hDriver); + return lRet; + } + + printf("IO Demo running :\n"); + + while(!kbhit()) + { + ++ulCycles; + + usleep(1 * 1000); /* Wait 1 ms so we can see the counter on the LEDs */ + if(CIFX_NO_ERROR != (lRet = xChannelIORead(hChannel, 0, 0, sizeof(abRecvData), abRecvData, 10))) + { + printf("Error reading IO Data area!\r\n"); + break; + } else + { +#ifdef DEBUG + printf("IORead Data:"); + DumpData(abRecvData, sizeof(abRecvData)); +#endif + memcpy(abSendData, abRecvData, sizeof(abRecvData)); + + /* On a CB-AB32 we will echo the input 8 buttons if one is pressed, otherwise a counter + will be placed on output */ + if(abRecvData[0] == 0) + abSendData[0] = (unsigned char)ulCycles; + + if(CIFX_NO_ERROR != (lRet = xChannelIOWrite(hChannel, 0, 0, sizeof(abSendData), abSendData, 10))) + { + printf("Error writing to IO Data area!\r\n"); + break; + } else + { +#ifdef DEBUG + printf("IOWrite Data:"); + DumpData(abSendData, sizeof(abSendData)); +#endif + } + } + } + printf("IODemo ended. Total cycles %lu\n", ulCycles); + + if(CIFX_NO_ERROR != (lRet = xChannelBusState(hChannel, CIFX_BUS_STATE_OFF, (uint32_t*)&ulState, 10000))) + { + printf("Error setting Bus state lRet = 0x%08X!\r\n",(unsigned int)lRet); + } + + + xChannelClose(hChannel); + } + + xDriverClose(hDriver); + } + + printf(" State = 0x%08X\r\n", (unsigned int)lRet); + printf("----------------------------------------------------\r\n"); + + return lRet; + +} + +/*****************************************************************************/ +/*! Function to demonstrate control/status block functionality +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t BlockDemo( void) +{ + CIFXHANDLE hDriver = NULL; + int32_t lRet = xDriverOpen(&hDriver); +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + printf("\n--- Read / Write Block Information ---\r\n"); + + /* Open channel */ + if(CIFX_NO_ERROR == lRet) + { + CIFXHANDLE hDevice = NULL; + lRet = xChannelOpen(hDriver, CIFX_DEV, 0, &hDevice); + if(lRet != CIFX_NO_ERROR) + { + printf("Error opening Channel!\r\n"); + } else + { + unsigned char abBuffer[4] = {0}; + + /* Read / Write control block */ + printf("Read CONTROL Block \r\n"); + memset( abBuffer, 0, sizeof(abBuffer)); + lRet = xChannelControlBlock( hDevice, CIFX_CMD_READ_DATA, 0, 4, &abBuffer[0]); + + DumpData(abBuffer, 4); + + printf("Write CONTROL Block \r\n"); + lRet = xChannelControlBlock( hDevice, CIFX_CMD_WRITE_DATA, 0, 4, &abBuffer[0]); + + printf("Read COMMON Status Block \r\n"); + memset( abBuffer, 0, sizeof(abBuffer)); + lRet = xChannelCommonStatusBlock( hDevice, CIFX_CMD_READ_DATA, 0, 4, &abBuffer[0]); + + DumpData(abBuffer, 4); + + printf("Write COMMON Status Block \r\n"); + lRet = xChannelCommonStatusBlock( hDevice, CIFX_CMD_WRITE_DATA, 0, 4, &abBuffer[0]); + + /* this is expected to fail, as this block must not be written by Host */ + if(CIFX_NO_ERROR != lRet) + printf("Error writing to common status block. lRet = 0x%08X\r\n", (unsigned int)lRet); + + printf("Read EXTENDED Status Block \r\n"); + memset( abBuffer, 0, sizeof(abBuffer)); + lRet = xChannelExtendedStatusBlock( hDevice, CIFX_CMD_READ_DATA, 0, 4, &abBuffer[0]); + DumpData(abBuffer, 4); + + printf("Write EXTENDED Status Block \r\n"); + lRet = xChannelExtendedStatusBlock( hDevice, CIFX_CMD_WRITE_DATA, 0, 4, &abBuffer[0]); + + /* this is expected to fail, as this block must not be written by Host */ + if(CIFX_NO_ERROR != lRet) + printf("Error writing to extended status block. lRet = 0x%08X\r\n", (unsigned int)lRet); + + xChannelClose(hDevice); + } + xDriverClose(hDriver); + } + return lRet; +} + + +/*****************************************************************************/ +/*! Function to demonstrate bus / host state +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t StateDemo (void) +{ + CIFXHANDLE hDriver = NULL; + CIFXHANDLE hChannel = NULL; + int32_t lRet = xDriverOpen(&hDriver); + + printf("\n--- Set Bus / Host State Demo ---\n"); + + if (CIFX_NO_ERROR == lRet) + { + /* Open channel */ + if( CIFX_NO_ERROR != (lRet = xChannelOpen(hDriver, CIFX_DEV, 0, &hChannel))) + { + printf("Error opening Channel!\n"); + + } else + { + uint32_t ulState = 0; + + /* Set Host ready */ + lRet = xChannelHostState( hChannel, CIFX_HOST_STATE_READY, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_HOST_STATE_READY, state %lu, error 0x%08X !\n", (long unsigned int)ulState, (unsigned int)lRet); + else + printf("Set CIFX_HOST_STATE_READY!\n"); + + /* Get Host state */ + lRet = xChannelHostState( hChannel, CIFX_HOST_STATE_READ, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_HOST_STATE_READ, state %lu, error 0x%08X !\n", (long unsigned int)ulState, (unsigned int)lRet); + else + printf("CIFX_HOST_STATE_READ, state %lu !\n", (long unsigned int)ulState); + + /* Set Bus state on */ + lRet = xChannelBusState (hChannel, CIFX_BUS_STATE_ON, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_BUS_STATE_ON, state %lu, error 0x%08X !\n", (long unsigned int)ulState, (unsigned int)lRet); + else + printf("CIFX_BUS_STATE_ON, state %lul !\n", (long unsigned int)ulState); + + /* Set Bus state off */ + lRet = xChannelBusState (hChannel, CIFX_BUS_STATE_OFF, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_BUS_STATE_OFF, state %lu, error 0x%08X !\n", (long unsigned int)ulState, (unsigned int)lRet); + else + printf("CIFX_BUS_STATE_OFF, state %lu !\n", (long unsigned int)ulState); + + /* Set Host not ready */ + lRet = xChannelHostState(hChannel, CIFX_HOST_STATE_NOT_READY, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_HOST_STATE_NOT_READY, state %lu, error 0x%08X !\n", (long unsigned int)ulState,(unsigned int)lRet); + else + printf("Set CIFX_HOST_STATE_NOT_READY!\n"); + + /* Get Host state */ + lRet = xChannelHostState( hChannel, CIFX_HOST_STATE_READ, &ulState, 1000); + if (CIFX_NO_ERROR != lRet) + printf("Error CIFX_HOST_STATE_READ, state %lu, error 0x%08X !\n", (long unsigned int)ulState, (unsigned int)lRet); + else + printf("CIFX_HOST_STATE_READ, state %lu !\n", (long unsigned int)ulState); + + xChannelClose(hChannel); + } + xDriverClose(hDriver); + } + printf(" State = 0x%08X\n", (unsigned int)lRet); + printf("----------------------------------------------------\n"); + + return lRet; +} + + +/*****************************************************************************/ +/*! Function to demonstrate event handling +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +void TestEventHandling(void) +{ + CIFXHANDLE hDriver = NULL; + CIFXHANDLE hDevice = NULL; + int32_t lRet = xDriverOpen(&hDriver); + int iIdx = 0; + + printf("\n--- Event handling demo ---\r\n"); + + /* Open channel */ + if (CIFX_NO_ERROR == lRet) + { + lRet = xChannelOpen(hDriver, CIFX_DEV, 0, &hDevice); + if(lRet != CIFX_NO_ERROR) + { + /* Read driver error description */ + ShowError( lRet); + } else + { + uint32_t ulState = 0; + SYNC_CALLBACK_DATA tSynchData = {0}; + HIL_DPM_COMMON_STATUS_BLOCK_T tCommonState = {0}; + int32_t fSync = 0; + + lRet = xChannelCommonStatusBlock( hDevice, CIFX_CMD_READ_DATA, 0, sizeof(tCommonState), &tCommonState); + if ( (CIFX_NO_ERROR == lRet) || (CIFX_DEV_NOT_RUNNING == lRet)) { + /* xChannelCommonStatusBlock() return value is also state information, therefore CIFX_DEV_NOT_RUNNING is also valid */ + + tSynchData.bSyncHSMode = tCommonState.bSyncHskMode; + + printf("Sync-handshake mode: 0x%.2x ", tSynchData.bSyncHSMode); + if (tSynchData.bSyncHSMode == HIL_SYNC_MODE_DEV_CTRL) { + printf("(device controlled)\n\n"); + + } else if (tSynchData.bSyncHSMode == HIL_SYNC_MODE_HST_CTRL) { + printf("(host controlled)\n\n"); + + } else { + fSync = 0; + printf("(mode unknown!!!)\n"); + printf("Failed to determine sync-handshake mode. Skip sync notification.\n\n"); + + } + } else { + fSync = 0; + printf("Failed to determine sync-handshake mode (0x%X). Skip sync notification.\n\n", lRet); + } + + tSynchData.hDevice = hDevice; + /* Register for events */ + if( (CIFX_NO_ERROR != (lRet = xChannelRegisterNotification( hDevice, CIFX_NOTIFY_RX_MBX_FULL, EventCallback, (void*)1))) || + (CIFX_NO_ERROR != (lRet = xChannelRegisterNotification( hDevice, CIFX_NOTIFY_TX_MBX_EMPTY, EventCallback, (void*)2))) || + (CIFX_NO_ERROR != (lRet = xChannelRegisterNotification( hDevice, CIFX_NOTIFY_PD0_IN, EventCallback, (void*)3))) || + (CIFX_NO_ERROR != (lRet = xChannelRegisterNotification( hDevice, CIFX_NOTIFY_PD0_OUT, EventCallback, (void*)5))) || + ((fSync == 1) && (CIFX_NO_ERROR != (lRet = xChannelRegisterNotification( hDevice, CIFX_NOTIFY_SYNC, SyncEventCallback, (void*)&tSynchData)))) ) + { + /* Failed to register one of the events */ + /* Read driver error description */ + ShowError( lRet); + } else + { + /* Get actual host state */ + if( (lRet = xChannelHostState( hDevice, CIFX_HOST_STATE_READ, &ulState, 0L)) != CIFX_NO_ERROR) + { + /* Read driver error description */ + ShowError( lRet); + } + + /* Set host ready */ + if( (lRet = xChannelHostState( hDevice, CIFX_HOST_STATE_READY, NULL, 2000L)) != CIFX_NO_ERROR) + { + /* Read driver error description */ + ShowError( lRet); + } + + for (iIdx=0; iIdx<10; iIdx++) + { + uint32_t ulRecvPktCount = 0; + uint32_t ulSendPktCount = 0; + CIFX_PACKET tSendPkt = {{0}}; + + xChannelGetMBXState( hDevice, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + if (ulSendPktCount > 0) + xChannelPutPacket(hDevice, &tSendPkt, 10); + + xChannelIORead(hDevice, 0, 0, sizeof(tSendPkt), &tSendPkt, 10); + xChannelIOWrite(hDevice, 0, 0, sizeof(tSendPkt), &tSendPkt, 10); + + xChannelGetMBXState( hDevice, (uint32_t*)&ulRecvPktCount, (uint32_t*)&ulSendPktCount); + if (ulRecvPktCount > 0) { + xChannelGetPacket( hDevice, sizeof(tSendPkt), &tSendPkt, 100); + } + } + if (fSync == 1) { + sleep(1); + } + /*-------------------*/ + /* Unregister Events */ + /*-------------------*/ + lRet = xChannelUnregisterNotification( hDevice, CIFX_NOTIFY_RX_MBX_FULL); + if( CIFX_NO_ERROR != lRet) + printf("Error in Unregister CIFX_NOTIFY_RX_MBX_FULL event, Error = 0x%08X", (unsigned int)lRet); + + lRet = xChannelUnregisterNotification( hDevice, CIFX_NOTIFY_TX_MBX_EMPTY); + if( CIFX_NO_ERROR != lRet) + printf("Error in Unregister CIFX_NOTIFY_TX_MBX_EMPTY event, Error = 0x%08X", (unsigned int)lRet); + + lRet = xChannelUnregisterNotification( hDevice, CIFX_NOTIFY_PD0_IN); + if( CIFX_NO_ERROR != lRet) + printf("Error in Unregister CIFX_NOTIFY_PD0_IN event, Error = 0x%08X", (unsigned int)lRet); + + lRet = xChannelUnregisterNotification( hDevice, CIFX_NOTIFY_PD0_OUT); + if( CIFX_NO_ERROR != lRet) + printf("Error in Unregister CIFX_NOTIFY_PD0_OUT event, Error = 0x%08X", (unsigned int)lRet); + + if (fSync == 1) { + lRet = xChannelUnregisterNotification( hDevice, CIFX_NOTIFY_SYNC); + if( CIFX_NO_ERROR != lRet) + printf("Error in Unregister CIFX_NOTIFY_SYNC event, Error = 0x%08X", (unsigned int)lRet); + } + } + /* Close channel */ + if( hDevice != NULL) + xChannelClose(hDevice); + } + xDriverClose(hDriver); + } +} + + +/*****************************************************************************/ +/*! Main entry function +* \return 0 */ +/*****************************************************************************/ +int main(int argc, char* argv[]) +{ + + struct CIFX_LINUX_INIT init = + { + .init_options = CIFX_DRIVER_INIT_AUTOSCAN, + .iCardNumber = 0, + .fEnableCardLocking = 0, + .base_dir = NULL, + .poll_interval = 0, + .poll_StackSize = 0, /* set to 0 to use default */ + .trace_level = 255, + .user_card_cnt = 0, + .user_cards = NULL, + }; + +#ifdef DEBUG + printf("%s() called\n", __FUNCTION__); +#endif + + /* First of all initialize toolkit */ + int32_t lRet = cifXDriverInit(&init); + + if(CIFX_NO_ERROR == lRet) + { + + /* Display version of cifXRTXDrv and cifXToolkit */ + DisplayDriverInformation(); + + /* Demonstrate the board/channel enumeration */ + EnumBoardDemo(); + + /* Demonstrate system channel functionality */ + SysdeviceDemo(); + + /* Demonstrate communication channel functionality */ + ChannelDemo(); + + /* Demonstrate control/status block functionality */ + BlockDemo(); + + /* Demonstrate event handling */ + TestEventHandling(); + + /* Demonstrate host/bus state functions */ + StateDemo (); + + } + + cifXDriverDeinit(); + + + return 0; +} diff --git a/examples/api/readme.md b/examples/api/readme.md new file mode 100644 index 0000000..58e00a0 --- /dev/null +++ b/examples/api/readme.md @@ -0,0 +1,19 @@ + +### cifX API example + +The demo shows the basic functions of the cifX API and how to use it. + +1. create a build folder and enter it +``` +mkdir build; cd build +``` +2. Prepare the build environment via cmake call and pass the path to the examples lists (CMakelists.txt within examples folder) file. +Run the preparation with your required options e.g.: +``` +cmake ../ -DDEBUG=ON +``` +3. Build the example and run a demo application. Note that you may need root rights. This depends on your system setup. For more information see [System and hardware setup]() +``` +make +./cifx_api +``` diff --git a/examples/readme.md b/examples/readme.md new file mode 100644 index 0000000..1304709 --- /dev/null +++ b/examples/readme.md @@ -0,0 +1,25 @@ + +## cifX Linux example applications + +### Overview + +| demo application | description | +| ------------------------------ |:-------------:| +| api | The demo shows the basic functions of the cifX API and how to use it. +| tcpserver | A demo server application which allows remote access (e.g. with Communication Studio). + + +1. create a build folder and enter it +``` +mkdir demo_build; cd demo_build +``` +2. Prepare the build environment via cmake call and pass the path to the examples lists (CMakelists.txt within examples folder) file. +Run the preparation with your required options e.g.: +``` +cmake ../ -DDEBUG=ON +``` +3. Build the examples and run a demo application. Note that you may need root rights. This depends on your system setup. For more information see [System and hardware setup]() +``` +make +./cifx_api +``` diff --git a/examples/tcpserver/CMakeLists.txt b/examples/tcpserver/CMakeLists.txt new file mode 100644 index 0000000..3d30f63 --- /dev/null +++ b/examples/tcpserver/CMakeLists.txt @@ -0,0 +1,48 @@ + +cmake_minimum_required (VERSION 2.8.12) +project(cifxtcpserver) +set(PROJECT_VERSION, 1.0.0) + +option(PERMANENT "Enable permanent connection (marshaller server feature - see \"HIL_MARSHALLER_PERMANENT_CONNECTION\")" ON) + +set(src_dir ${CMAKE_CURRENT_LIST_DIR}) + +if(LIBRARY_HEADER OR LIBRARY_INC_LIB) + if (LIBRARY_HEADER) + set(LIBRARY_REQ_INCLUDE_DIRS ${LIBRARY_HEADER}) + endif (LIBRARY_HEADER) + if (LIBRARY_INC_LIB) + set (LIBRARY_INC_LIB "-L${LIBRARY_INC_LIB}") + endif (LIBRARY_INC_LIB) + set(LIBRARY_REQ_LIBRARIES "-lpthread -lrt -lcifx ${LIBRARY_INC_LIB}") +else(LIBRARY_HEADER OR LIBRARY_INC_LIB) + include(FindPkgConfig) + pkg_check_modules(LIBRARY_REQ REQUIRED cifx) +endif(LIBRARY_HEADER OR LIBRARY_INC_LIB) + +include_directories(${LIBRARY_REQ_INCLUDE_DIRS} ${src_dir}/Marshaller/cifXAPI/ /usr/local/include/cifx/) + +add_executable(cifx_tcpserver + ${src_dir}/tcp_connector.c + ${src_dir}/os_specific.c + ${src_dir}/tcp_server.c + ${src_dir}/cifx_download_hook.c + ${src_dir}/Marshaller/CifXTransport.c + ${src_dir}/Marshaller/HilMarshaller.c +) +target_include_directories(cifx_tcpserver + PUBLIC + ${src_dir}/ + ${src_dir}/Marshaller + ${src_dir}/Marshaller/APIHeader/ +) + +target_link_libraries (cifx_tcpserver ${LIBRARY_REQ_LIBRARIES}) +target_compile_options(cifx_tcpserver PRIVATE -Wformat-overflow=0) + +target_compile_definitions(cifx_tcpserver + PUBLIC + $<$:HIL_MARSHALLER_PERMANENT_CONNECTION> +) + +install(TARGETS cifx_tcpserver DESTINATION ${CMAKE_INSTALL_PREFIX}/bin) diff --git a/examples/tcpserver/HilFileHeaderV3.h b/examples/tcpserver/HilFileHeaderV3.h new file mode 100644 index 0000000..a9bb18c --- /dev/null +++ b/examples/tcpserver/HilFileHeaderV3.h @@ -0,0 +1,328 @@ +/****************************************************************************** + + Copyright (C) 2010 [Hilscher Gesellschaft fr Systemautomation mbH] + + This program can be used by everyone according to the netX Open Source + Software license. The license agreement can be downloaded from + http://www.industrialNETworX.com + +******************************************************************************* + + Last Modification: + @version $Id: HilFileHeaderV3.h 2432 2010-12-13 09:27:17Z stephans $ + + Description: + Hilscher File Header V3.0 + + Changes: + Date Author Description + --------------------------------------------------------------------------- + 2010-03-23 NC File created. + +******************************************************************************/ + + +#ifndef __HilFileHeaderV3_h +#define __HilFileHeaderV3_h + +#include + +/*****************************************************************************/ +/* Set byte alignment for structure members. */ + +/* support for MS Visual C++ compiler */ +#if _MSC_VER >= 1000 + #define __HIL_PACKED_PRE + #define __HIL_PACKED_POST + #pragma once + #pragma pack(1) + #ifndef STRICT + #define STRICT + #endif +#endif /* _MSC_VER >= 1000 */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __HIL_PACKED_PRE + #define __HIL_PACKED_POST __attribute__((__packed__)) +#endif + +/* support for REALVIEW ARM compiler */ +#if defined (__ADS__) || defined (__REALVIEW__) + #define __HIL_PACKED_PRE __packed + #define __HIL_PACKED_POST +#endif +/*****************************************************************************/ + + + +/*****************************************************************************/ +/* Constant Definitions for Hilscher File Headers */ +/*****************************************************************************/ + +/* file header cookies (low order byte is first byte in memory) */ +#define HIL_FILE_HEADER_FIRMWARE_COOKIE 0xF8BEAF00 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_8_COOKIE 0xF8BEAF08 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_16_COOKIE 0xF8BEAF16 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_32_COOKIE 0xF8BEAF32 /**< used in NXF or custom loadables */ + +#define HIL_FILE_HEADER_MODULE_COOKIE 0x4D584E2E /**< ".NXM" */ +#define HIL_FILE_HEADER_OPTION_COOKIE 0x4F584E2E /**< ".NXO" */ +#define HIL_FILE_HEADER_DATABASE_COOKIE 0x44584E2E /**< ".NXD" */ +#define HIL_FILE_HEADER_LICENSE_COOKIE 0x4C584E2E /**< ".NXL" */ +#define HIL_FILE_HEADER_BINARY_COOKIE 0x42584E2E /**< ".NXB" */ + +/* valid Hilscher file extensions */ +#define HIL_FILE_EXTENSION_FIRMWARE ".NXF" +#define HIL_FILE_EXTENSION_MODULE ".NXM" +#define HIL_FILE_EXTENSION_OPTION ".NXO" +#define HIL_FILE_EXTENSION_LICENSE ".NXL" +#define HIL_FILE_EXTENSION_DATABASE ".NXD" +#define HIL_FILE_EXTENSION_BINARY ".NXB" + +/* Common Header version constants */ +#define HIL_VERSION_COMMON_HEADER_0_0 0x00000000 /**< V0.0, default initialization value */ +#define HIL_VERSION_COMMON_HEADER_1_0 0x00010000 /**< V1.0, initial version */ +#define HIL_VERSION_COMMON_HEADER_2_0 0x00020000 /**< V2.0, usManufacturer included in Common Header */ +#define HIL_VERSION_COMMON_HEADER_3_0 0x00030000 /**< V3.0, usManufacturer moved to Device Info, additional sizes and offsets */ + +/* Device Info structure version constants */ +#define HIL_VERSION_DEVICE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* Module Info structure version constants */ +#define HIL_VERSION_MODULE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* source device type constants used in Default Header */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_SRAM 1 /**< parallel flash on SRAM bus */ +#define HIL_SRC_DEVICE_TYPE_SER_FLASH 2 /**< serial flash on SPI bus */ +#define HIL_SRC_DEVICE_TYPE_EEPROM 3 /**< serial EEPROM on I2C bus */ +#define HIL_SRC_DEVICE_TYPE_SD_MMC 4 /**< boot image on MMC/SD card */ +#define HIL_SRC_DEVICE_TYPE_DPM 5 /**< DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_DPM_EXT 6 /**< extended DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_EXT 7 /**< parallel flash on extension bus */ + +/* chip type constants */ +#define HIL_LICENSE_CHIPTYPE_NETX500 0x01 /**< ARM code for netX500 */ +#define HIL_LICENSE_CHIPTYPE_NETX100 0x02 /**< ARM code for netX100 */ +#define HIL_LICENSE_CHIPTYPE_NETX50 0x03 /**< ARM code for netX50 */ +#define HIL_LICENSE_CHIPTYPE_XPEC500 0x40 /**< XPEC code for netX500 */ +#define HIL_LICENSE_CHIPTYPE_XPEC100 0x41 /**< XPEC code for netX100 */ +#define HIL_LICENSE_CHIPTYPE_XPEC50 0x42 /**< XPEC code for netX50 */ + + +/*****************************************************************************/ +/* File Header Substructures for Hilscher Downloadable Files */ +/*****************************************************************************/ + +/* BOOT header (64 bytes, used for NXF) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_BOOT_HEADER_V1_0tag +{ + /* boot block identification and bus width (8/16/32 bits) in case of a parallel flash source device */ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_FIRMWARE_xxx_COOKIE */ + /* boot image source device configuration value (either parallel or serial flash) */ + union + { uint32_t ulSramBusTiming; /**< parallel flash on SRAM bus: bus timing value */ + uint32_t ulSpiClockSpeed; /**< serial flash on SPI: clock speed value */ + } unSrcMemCtrl; + /* application data description values */ + uint32_t ulAppEntryPoint; /**< app. entry point, netX code execution starts here */ + uint32_t ulAppChecksum; /**< app. checksum starting from byte offset 64 */ + uint32_t ulAppFileSize; /**< app. size in DWORDs starting from byte offset 64 */ + uint32_t ulAppStartAddress; /**< app. relocation start address for binary image */ + uint32_t ulSignature; /**< app. signature, always 0x5854454E = "NETX" */ + /* destination device control values */ + union + { /* SDRAM */ + struct + { uint32_t ulSdramGeneralCtrl; /**< value for SDRAM General Control register */ + uint32_t ulSdramTimingCtrl; /**< value for SDRAM Timing register */ + uint32_t aulReserved[3]; + } tSDRAMCtrl; + /* Extension Bus */ + struct + { uint32_t ulExtConfigCS0; /**< value for EXT_CONFIG_CS0 register */ + uint32_t ulIoRegMode0; /**< value for DPMAS_IO_MODE0 register */ + uint32_t ulIoRegMode1; /**< value for DPMAS_IO_MODE1 register */ + uint32_t ulIfConf0; /**< value for DPMAS_IF_CONF0 register */ + uint32_t ulIfConf1; /**< value for DPMAS_IF_CONF1 register */ + } tExtBusCtrl; + /* SRAM */ + struct + { uint32_t ulExtConfigSRAMn; /**< value for EXT_SRAMn_CTRL register */ + uint32_t aulReserved[4]; + } tSRAMCtrl; + } unDstMemCtrl; + uint32_t ulMiscAsicCtrl; /**< internal ASIC control register value (set to 1) */ + uint32_t ulSerialNumber; /**< serial no. or user param. (ignored by ROM loader) */ + uint32_t ulSrcDeviceType; /**< HIL_SRC_DEVICE_TYPE_xxx */ + uint32_t ulBootHeaderChecksum; /**< sums up all 16 DWORDs and multiplies result by -1 */ +} __HIL_PACKED_POST HIL_FILE_BOOT_HEADER_V1_0, *PHIL_FILE_BOOT_HEADER_V1_0; + + +/* DEFAULT header (64 bytes, used for NXM, NXO, NXD, NXL, NXB) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_DEFAULT_HEADER_V1_0tag +{ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_xxx_COOKIE definitions */ + uint32_t aulReserved[15]; /**< reserved, set to zero */ +} __HIL_PACKED_POST HIL_FILE_DEFAULT_HEADER_V1_0, *PHIL_FILE_DEFAULT_HEADER_V1_0; + + +/* COMMON header (64 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_COMMON_HEADER_V3_0tag +{ + uint32_t ulHeaderVersion; /**< structure version (major, minor), 0x00030000 */ + uint32_t ulHeaderLength; /**< Default+Common Header+Device Info+Module Info(s) */ + uint32_t ulDataSize; /**< from ulDataStartOffset to ulTagListStartOffset */ + uint32_t ulDataStartOffset; /**< offset of binary data (from beginning of file) */ + uint8_t bNumModuleInfos; /**< number of Module Info structures in file header */ + uint8_t bReserved; /**< reserved, set to zero */ + uint16_t usReserved; /**< reserved, set to zero */ + uint32_t aulMD5[4]; /**< MD5 checksum for the whole firmware file */ + uint32_t ulTagListSize; /**< tag list length in bytes (0 = no tag list) */ + uint32_t ulTagListOffset; /**< offset of tag list (from beginning of file) */ + uint32_t ulTagListSizeMax; /**< maximum tag list length in bytes (reserved space) */ + uint32_t aulReserved[3]; /**< reserved, set to zero */ + uint32_t ulHeaderCRC32; /**< Default+Common Header+Device Info+Module Info(s) */ +} __HIL_PACKED_POST HIL_FILE_COMMON_HEADER_V3_0, *PHIL_FILE_COMMON_HEADER_V3_0; + + +/* DEVICE-specific information (64 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_DEVICE_INFO_V1_0tag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usManufacturer; /**< manufacturer ID (see DPM Manual) */ + uint16_t usDeviceClass; /**< netX device class */ + uint8_t bHwCompatibility; /**< hardware compatibility ID */ + uint8_t bChipType; /**< see HIL_LICENSE_CHIPTYPE_xxx definitions */ + uint16_t usReserved; /**< reserved, set to zero */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint32_t ulLicenseFlags1; /**< netX license flags 1 */ + uint32_t ulLicenseFlags2; /**< netX license flags 2 */ + uint16_t usNetXLicenseID; /**< netX license id */ + uint16_t usNetXLicenseFlags; /**< netX license flags */ + uint16_t ausFwVersion[4]; /**< FW version (major, minor, build, revision) */ + uint32_t ulFwNumber; /**< FW product code (order number) or project code */ + uint32_t ulDeviceNumber; /**< target device product code (order number) */ + uint32_t ulSerialNumber; /**< target device serial number */ + uint32_t aulReserved[3]; /**< reserved, set to zero */ +} __HIL_PACKED_POST HIL_FILE_DEVICE_INFO_V1_0, *PHIL_FILE_DEVICE_INFO_V1_0; + + +/* MODULE-specific information (32 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_MODULE_INFO_V1_0tag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usCommunicationClass; /**< communication class */ + uint16_t usProtocolClass; /**< protocol class */ + uint32_t ulDBVersion; /**< database version (major, minor) */ + uint16_t ausChannelSizes[4]; /**< required DPM channel sizes, 0=end of list */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint8_t abHwAssignments[4]; /**< xC numbers for HW options (0xFF=free choice) */ +} __HIL_PACKED_POST HIL_FILE_MODULE_INFO_V1_0, *PHIL_FILE_MODULE_INFO_V1_0; + + + +/*****************************************************************************/ +/* File Header Subtructures Instantiated as Global Variables in the Firmware */ +/*****************************************************************************/ + +/* !!!! The structure version of the Common Header determines the version of the whole structure !!!! */ + +/* basic file header (without Default Header as included in ELF files used to create NXFs, 320 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_BASIC_HEADER_V3_0tag +{ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo[6]; /**< module-specific info for up to 6 modules */ +} __HIL_PACKED_POST HIL_FILE_BASIC_HEADER_V3_0, *PHIL_FILE_BASIC_HEADER_V3_0; + + +/* basic file header (without Default Header as included in ELF files used to create NXOs, 160 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_MODULE_HEADER_V3_0tag +{ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 module */ +} __HIL_PACKED_POST HIL_FILE_MODULE_HEADER_V3_0, *PHIL_FILE_MODULE_HEADER_V3_0; + + + +/*****************************************************************************/ +/* Minimal File Header Subset for all NX* Files (Usable with Older Versions) */ +/*****************************************************************************/ + +/* MIN file header (common subset for all complete NX* files, 128 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_MIN_HEADER_V3_0tag +{ + HIL_FILE_BOOT_HEADER_V1_0 tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ +} __HIL_PACKED_POST HIL_FILE_MIN_HEADER_V3_0, *PHIL_FILE_MIN_HEADER_V3_0; + + + +/*****************************************************************************/ +/* File Header Structures for Hilscher Downloadable Files (V3.0, netX) */ +/*****************************************************************************/ + +/* NXF file header (for relocated base firmware or complete firmware with linked stacks, 384 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_NXF_HEADER_V3_0tag +{ + HIL_FILE_BOOT_HEADER_V1_0 tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo[6]; /**< module-specific info for 6 comm. channels */ +} __HIL_PACKED_POST HIL_FILE_NXF_HEADER_V3_0, *PHIL_FILE_NXF_HEADER_V3_0; + + +/* NXO file header (for unrelocated optional firmware modules, 224 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_NXO_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 comm. channel */ +} __HIL_PACKED_POST HIL_FILE_NXO_HEADER_V3_0, *PHIL_FILE_NXO_HEADER_V3_0; + + +/* NXD file header (for database file download, 224 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_NXD_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 comm. channel */ +} __HIL_PACKED_POST HIL_FILE_NXD_HEADER_V3_0, *PHIL_FILE_NXD_HEADER_V3_0; + + +/* NXL file header (for license file download, 192 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_NXL_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ +} __HIL_PACKED_POST HIL_FILE_NXL_HEADER_V3_0, *PHIL_FILE_NXL_HEADER_V3_0; + + +/* NXB file header (for binary file download, 192 bytes) */ +typedef __HIL_PACKED_PRE struct HIL_FILE_NXB_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ +} __HIL_PACKED_POST HIL_FILE_NXB_HEADER_V3_0, *PHIL_FILE_NXB_HEADER_V3_0; + + + +/*****************************************************************************/ +/* Support for MS Visual C++ compiler: Restore default alignment. */ +#if _MSC_VER >= 1000 + #pragma pack() +#endif /* _MSC_VER >= 1000 */ +/*****************************************************************************/ + +#undef __HIL_PACKED_PRE +#undef __HIL_PACKED_POST + + + +#endif /* __HilFileHeaderV3_h */ diff --git a/examples/tcpserver/Marshaller/APIHeader/HilFileHeader.h b/examples/tcpserver/Marshaller/APIHeader/HilFileHeader.h new file mode 100644 index 0000000..e98aa3c --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/HilFileHeader.h @@ -0,0 +1,219 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: HilFileHeader.h 13107 2019-08-15 08:42:43Z Robert $: + + Description: + Definition for the universal Hilscher File Header + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-06-03 Renamed __HIL_PACKED_PRE/__HIL_PACKED_POST due to conflicts + 2010-03-23 File created. + +**************************************************************************************/ + + +#ifndef __HILFILEHEADER__H +#define __HILFILEHEADER__H + +/*---------------------------------------------------------------------------*/ +/* Compiler settings */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST + #pragma once + #pragma pack(1) /* Always align structures to byte boundery */ + #ifndef STRICT /* Check Typdefinition */ + #define STRICT + #endif + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST __attribute__((__packed__)) +#endif + +/* support for REALVIEW ARM compiler */ +#if defined (__ADS__) || defined (__REALVIEW__) + #define __RCX_PACKED_PRE __packed + #define __RCX_PACKED_POST +#endif + +#include + +/*****************************************************************************/ +/*! \file HilFileHeader.h +* Definition for the universal Hilscher File Header */ +/*****************************************************************************/ + +#define HIL_FILE_HEADER_MODULE_COOKIE 0x4D584E2E +#define HIL_FILE_HEADER_DATABASE_COOKIE 0x44584E2E +#define HIL_FILE_HEADER_LICENSE_COOKIE 0x4C584E2E +#define HIL_FILE_HEADER_BINARY_COOKIE 0x42584E2E + +#define HIL_FILE_HEADER_FIRMWARE_COOKIE 0xF8BEAF00 +#define HIL_FILE_HEADER_FIRMWARE_8_COOKIE 0xF8BEAF08 +#define HIL_FILE_HEADER_FIRMWARE_16_COOKIE 0xF8BEAF16 +#define HIL_FILE_HEADER_FIRMWARE_32_COOKIE 0xF8BEAF32 + +/* Valid Hilscher file extensions */ +#define HIL_FILE_EXTENSION_FIRMWARE ".NXF" +#define HIL_FILE_EXTENSION_MODULE ".NXM" +#define HIL_FILE_EXTENSION_LICENSE ".NXL" +#define HIL_FILE_EXTENSION_DATABASE ".NXD" +#define HIL_FILE_EXTENSION_BINARY ".NXB" + +/*****************************************************************************/ +/*! File structure preceeding every Hilscher generated file */ +/*****************************************************************************/ +/*-------------------------------------------------------*/ +/* 64 Byte DEFAULT FILE HEADER */ +/*-------------------------------------------------------*/ +typedef __RCX_PACKED_PRE struct HIL_FILE_DEFAULT_HEADERtag +{ + uint32_t ulMagCookie; /**< Magic cookie */ + uint32_t tReserved[15]; /**< Reserved area */ +} __RCX_PACKED_POST HIL_FILE_DEFAULT_HEADER, *PHIL_FILE_DEFAULT_HEADER; + +#define HIL_FILE_COMMON_HEADER_VERSION_1 0x00010000 /**< High Word = Major, Low Word = Minor Version */ +#define HIL_FILE_COMMON_HEADER_VERSION_2 0x00020000 /**< High Word = Major, Low Word = Minor Version */ + +/*-------------------------------------------------------*/ +/* 64 Byte COMMON FILE HEADER */ +/*-------------------------------------------------------*/ +typedef __RCX_PACKED_PRE struct HIL_FILE_COMMON_HEADERtag +{ + uint32_t ulHeaderVersion; /**< Header version (over all) */ + uint32_t ulHeaderLength; /**< Header length (over all) */ + uint32_t ulFileSize; /**< File Size in Bytes */ + uint32_t ulDataStartOffset; /**< Start of the binary data */ + uint32_t ulTagListOffset; /**< Start of the tag list */ + uint32_t aulMD5[4]; /**< MD5 checksum */ + uint16_t usManufacturer; /**< Hardware Manufacturer identification */ + uint16_t usReserved; /**< reserved */ + uint32_t aulReserved[5]; /**< reserved / unused */ + uint32_t ulChksum; /**< CRC-32 checksum (common header) */ +} __RCX_PACKED_POST HIL_FILE_COMMON_HEADER, *PHIL_FILE_COMMON_HEADER; + +/*-------------------------------------------------------*/ +/* FIRMWARE FILE HEADER */ +/*-------------------------------------------------------*/ +/* FIRMWARE file specific header */ +typedef __RCX_PACKED_PRE struct HIL_FILE_FIRMWARE_HEADERtag +{ + HIL_FILE_DEFAULT_HEADER tDefaultHeader; /**< Default File Header */ + HIL_FILE_COMMON_HEADER tCommonHeader; /**< Common File Header */ + uint16_t usDeviceClass; /**< netX Device Class */ + uint8_t bHwCompatibility; /**< Hardware Compatibility ID */ + uint16_t ausHwOptions[4]; /**< Hardware Assembly Option */ + uint32_t ulLicenseFlags1; /**< NetX License Flags 1 */ + uint32_t ulLicenseFlags2; /**< NetX License Flags 2 */ + uint16_t usNetXLicenseID; /**< NetX License ID */ + uint16_t usNetXLicenseFlags; /**< NetX License Flags */ + uint32_t aulSwRevision[3]; /**< Software Revision (major, minor, build) */ + uint32_t ulSwNumber; /**< Software Number */ + uint16_t usCommunicationClass; /**< Communication Class */ + uint16_t usProtocolClass; /**< Protocol Class */ + uint8_t abName[64]; /**< Readable Name */ + uint32_t aulDBVersion[2]; /**< Version of DB structure */ + uint32_t ulSDN; /**< SDN */ +} __RCX_PACKED_POST HIL_FILE_FIRMWARE_HEADER, *PHIL_FILE_FIRMWARE_HEADER; + +/*-------------------------------------------------------*/ +/* MODULE FILE HEADER */ +/*-------------------------------------------------------*/ +/* MODULE file specific header */ +typedef __RCX_PACKED_PRE struct HIL_FILE_MODULE_HEADERtag +{ + HIL_FILE_DEFAULT_HEADER tDefaultHeader; /**< Default File Header */ + HIL_FILE_COMMON_HEADER tCommonHeader; /**< Common File Header */ + uint16_t usDeviceClass; /**< netX Device Class */ + uint8_t bHwCompatibility; /**< Hardware Compatibility ID */ + uint16_t ausHwOptions[4]; /**< Hardware Assembly Option */ + uint32_t ulLicenseFlags1; /**< NetX License Flags 1 */ + uint32_t ulLicenseFlags2; /**< NetX License Flags 2 */ + uint16_t usNetXLicenseID; /**< NetX License ID */ + uint16_t usNetXLicenseFlags; /**< NetX License Flags */ + uint32_t aulSwRevision[3]; /**< Software Revision (major, minor, build) */ + uint32_t ulSwNumber; /**< Software Number */ + uint16_t usCommunicationClass; /**< Communication Class */ + uint16_t usProtocolClass; /**< Protocol Class */ + uint8_t abName[64]; /**< Readable Name */ + uint32_t aulDBVersion[2]; /**< Version of DB structure */ + uint32_t ulSDN; /**< SDN */ +} __RCX_PACKED_POST HIL_FILE_MODULE_HEADER, *PHIL_FILE_MODULE_HEADER; + +/*-------------------------------------------------------*/ +/* DATABASE / CONFIGURATION FILE HEADER */ +/*-------------------------------------------------------*/ +/* DATABASE / CONFIGURATION file specific header */ +typedef __RCX_PACKED_PRE struct HIL_FILE_DATABASE_HEADERtag +{ + HIL_FILE_DEFAULT_HEADER tDefaultHeader; /**< Default File Header */ + HIL_FILE_COMMON_HEADER tCommonHeader; /**< Common File Header */ + uint32_t aulDBVersion[2]; /**< Version of DB structure */ +} __RCX_PACKED_POST HIL_FILE_DATABASE_HEADER, *PHIL_FILE_DATABASE_HEADER; + + +/*-------------------------------------------------------*/ +/* LICENSE FILE HEADER */ +/*-------------------------------------------------------*/ +/* LICENSE file specific header */ + +#define LICENSE_CHIPTYPE_NETX500 1 /* ARM code for netX500 */ +#define LICENSE_CHIPTYPE_NETX100 2 /* ARM code for netX100 */ +#define LICENSE_CHIPTYPE_NETX50 3 /* ARM code for netX50 */ +#define LICENSE_CHIPTYPE_NETX51 4 /* ARM code for netX51 */ +#define LICENSE_CHIPTYPE_NETX52 5 /* ARM code for netX52 */ +#define LICENSE_CHIPTYPE_XPEC500 0x40 /* XPEC code for netX500 */ +#define LICENSE_CHIPTYPE_XPEC100 0x41 /* XPEC code for netX100 */ +#define LICENSE_CHIPTYPE_XPEC50 0x42 /* XPEC code for netX50 */ +#define LICENSE_CHIPTYPE_XPEC51 0x43 /* XPEC code for netX51 */ +#define LICENSE_CHIPTYPE_XPEC52 0x44 /* XPEC code for netX52 */ + +typedef __RCX_PACKED_PRE struct HIL_FILE_LICENSE_HEADERtag +{ + HIL_FILE_DEFAULT_HEADER tDefaultHeader; /**< Default File Header */ + HIL_FILE_COMMON_HEADER tCommonHeader; /**< Common File Header */ + uint32_t ulChipType; /**< 1 = netX500, 2=netX100, 3=netX50, 0x40=xpec500, 0x41=xpec100, 0x42=xpec50 */ + uint32_t ulManufacturer; /**< Manufacturer identification */ + uint32_t ulDeviceNr; /**< Device number */ + uint32_t ulSerialNr; /**< Serial number */ + uint32_t ulLicenseFlags1; /**< License flags 1 */ + uint32_t ulLicenseFlags2; /**< License flags 2 */ + uint32_t ulNetXLicense; /**< netX license flags <<16 | netX license ID */ + uint32_t ulXcUnit; /**< Number of XC Unit the update will be performed */ + uint32_t aulReserved[8]; /**< reserved = {0,0,0,0,0,0,0,0,0}; */ +} __RCX_PACKED_POST HIL_FILE_LICENSE_HEADER, *PHIL_FILE_LICENSE_HEADER; + +/*-------------------------------------------------------*/ +/* BINARY FILE HEADER */ +/*-------------------------------------------------------*/ +/* BINARY file specific header */ +typedef __RCX_PACKED_PRE struct HIL_FILE_BINARY_HEADERtag +{ + HIL_FILE_DEFAULT_HEADER tDefaultHeader; /**< Default File Header */ + HIL_FILE_COMMON_HEADER tCommonHeader; /**< Common File Header */ +} __RCX_PACKED_POST HIL_FILE_BINARY_HEADER, *PHIL_FILE_BINARY_HEADER; + +/*---------------------------------------------------------------------------*/ +/* Compiler settings */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #pragma pack() /* Always align structures to compiler settings */ + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ +/*---------------------------------------------------------------------------*/ + +#undef __RCX_PACKED_PRE +#undef __RCX_PACKED_POST + +#endif /* __HILFILEHEADER__H */ diff --git a/examples/tcpserver/Marshaller/APIHeader/HilFileHeaderV3.h b/examples/tcpserver/Marshaller/APIHeader/HilFileHeaderV3.h new file mode 100644 index 0000000..488b11f --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/HilFileHeaderV3.h @@ -0,0 +1,334 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: HilFileHeaderV3.h 13107 2019-08-15 08:42:43Z Robert $: + + Description: + Hilscher File Header V3.0 + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-06-03 Renamed __HIL_PACKED_PRE/__HIL_PACKED_POST due to conflicts + 2015-03-31 Added support of IAR (ARM core only) + Added __HIL_PACKED_PRE/__HIL_PACKED_POST for structures in structures + 2010-03-23 File created. + +**************************************************************************************/ + + +#ifndef __HilFileHeaderV3_h +#define __HilFileHeaderV3_h + +#include + +/*****************************************************************************/ +/* Set byte alignment for structure members. */ + +/* support for MS Visual C++ compiler */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST + #pragma once + #pragma pack(1) + #ifndef STRICT + #define STRICT + #endif + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST __attribute__((__packed__)) +#endif + +/* support for REALVIEW ARM and IAR compiler (ARM cores only) */ +#if defined (__ADS__) || defined (__REALVIEW__) || defined (__CC_ARM) || defined (__ICCARM__) + #define __RCX_PACKED_PRE __packed + #define __RCX_PACKED_POST +#endif +/*****************************************************************************/ + + + +/*****************************************************************************/ +/* Constant Definitions for Hilscher File Headers */ +/*****************************************************************************/ + +/* file header cookies (low order byte is first byte in memory) */ +#define HIL_FILE_HEADER_FIRMWARE_COOKIE 0xF8BEAF00 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_8_COOKIE 0xF8BEAF08 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_16_COOKIE 0xF8BEAF16 /**< used in NXF or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_32_COOKIE 0xF8BEAF32 /**< used in NXF or custom loadables */ + +#define HIL_FILE_HEADER_MODULE_COOKIE 0x4D584E2E /**< ".NXM" */ +#define HIL_FILE_HEADER_OPTION_COOKIE 0x4F584E2E /**< ".NXO" */ +#define HIL_FILE_HEADER_DATABASE_COOKIE 0x44584E2E /**< ".NXD" */ +#define HIL_FILE_HEADER_LICENSE_COOKIE 0x4C584E2E /**< ".NXL" */ +#define HIL_FILE_HEADER_BINARY_COOKIE 0x42584E2E /**< ".NXB" */ + +/* valid Hilscher file extensions */ +#define HIL_FILE_EXTENSION_FIRMWARE ".NXF" +#define HIL_FILE_EXTENSION_MODULE ".NXM" +#define HIL_FILE_EXTENSION_OPTION ".NXO" +#define HIL_FILE_EXTENSION_LICENSE ".NXL" +#define HIL_FILE_EXTENSION_DATABASE ".NXD" +#define HIL_FILE_EXTENSION_BINARY ".NXB" + +/* Common Header version constants */ +#define HIL_VERSION_COMMON_HEADER_0_0 0x00000000 /**< V0.0, default initialization value */ +#define HIL_VERSION_COMMON_HEADER_1_0 0x00010000 /**< V1.0, initial version */ +#define HIL_VERSION_COMMON_HEADER_2_0 0x00020000 /**< V2.0, usManufacturer included in Common Header */ +#define HIL_VERSION_COMMON_HEADER_3_0 0x00030000 /**< V3.0, usManufacturer moved to Device Info, additional sizes and offsets */ + +/* Device Info structure version constants */ +#define HIL_VERSION_DEVICE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* Module Info structure version constants */ +#define HIL_VERSION_MODULE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* source device type constants used in Default Header */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_SRAM 1 /**< parallel flash on SRAM bus */ +#define HIL_SRC_DEVICE_TYPE_SER_FLASH 2 /**< serial flash on SPI bus */ +#define HIL_SRC_DEVICE_TYPE_EEPROM 3 /**< serial EEPROM on I2C bus */ +#define HIL_SRC_DEVICE_TYPE_SD_MMC 4 /**< boot image on MMC/SD card */ +#define HIL_SRC_DEVICE_TYPE_DPM 5 /**< DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_DPM_EXT 6 /**< extended DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_EXT 7 /**< parallel flash on extension bus */ + +/* chip type constants */ +#define HIL_LICENSE_CHIPTYPE_NETX500 0x01 /**< ARM code for netX500 */ +#define HIL_LICENSE_CHIPTYPE_NETX100 0x02 /**< ARM code for netX100 */ +#define HIL_LICENSE_CHIPTYPE_NETX50 0x03 /**< ARM code for netX50 */ +#define HIL_LICENSE_CHIPTYPE_NETX51 0x04 /**< ARM code for netX51 */ +#define HIL_LICENSE_CHIPTYPE_NETX52 0x05 /**< ARM code for netX52 */ +#define HIL_LICENSE_CHIPTYPE_XPEC500 0x40 /**< XPEC code for netX500 */ +#define HIL_LICENSE_CHIPTYPE_XPEC100 0x41 /**< XPEC code for netX100 */ +#define HIL_LICENSE_CHIPTYPE_XPEC50 0x42 /**< XPEC code for netX50 */ +#define HIL_LICENSE_CHIPTYPE_XPEC51 0x43 /**< XPEC code for netX51 */ +#define HIL_LICENSE_CHIPTYPE_XPEC52 0x44 /**< XPEC code for netX52 */ + + +/*****************************************************************************/ +/* File Header Substructures for Hilscher Downloadable Files */ +/*****************************************************************************/ + +/* BOOT header (64 bytes, used for NXF) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_BOOT_HEADER_V1_0tag +{ + /* boot block identification and bus width (8/16/32 bits) in case of a parallel flash source device */ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_FIRMWARE_xxx_COOKIE */ + /* boot image source device configuration value (either parallel or serial flash) */ + __RCX_PACKED_PRE union + { uint32_t ulSramBusTiming; /**< parallel flash on SRAM bus: bus timing value */ + uint32_t ulSpiClockSpeed; /**< serial flash on SPI: clock speed value */ + } __RCX_PACKED_POST unSrcMemCtrl; + /* application data description values */ + uint32_t ulAppEntryPoint; /**< app. entry point, netX code execution starts here */ + uint32_t ulAppChecksum; /**< app. checksum starting from byte offset 64 */ + uint32_t ulAppFileSize; /**< app. size in DWORDs starting from byte offset 64 */ + uint32_t ulAppStartAddress; /**< app. relocation start address for binary image */ + uint32_t ulSignature; /**< app. signature, always 0x5854454E = "NETX" */ + /* destination device control values */ + __RCX_PACKED_PRE union + { /* SDRAM */ + __RCX_PACKED_PRE struct + { uint32_t ulSdramGeneralCtrl; /**< value for SDRAM General Control register */ + uint32_t ulSdramTimingCtrl; /**< value for SDRAM Timing register */ + uint32_t aulReserved[3]; + } __RCX_PACKED_POST tSDRAMCtrl; + /* Extension Bus */ + __RCX_PACKED_PRE struct + { uint32_t ulExtConfigCS0; /**< value for EXT_CONFIG_CS0 register */ + uint32_t ulIoRegMode0; /**< value for DPMAS_IO_MODE0 register */ + uint32_t ulIoRegMode1; /**< value for DPMAS_IO_MODE1 register */ + uint32_t ulIfConf0; /**< value for DPMAS_IF_CONF0 register */ + uint32_t ulIfConf1; /**< value for DPMAS_IF_CONF1 register */ + } __RCX_PACKED_POST tExtBusCtrl; + /* SRAM */ + __RCX_PACKED_PRE struct + { uint32_t ulExtConfigSRAMn; /**< value for EXT_SRAMn_CTRL register */ + uint32_t aulReserved[4]; + } __RCX_PACKED_POST tSRAMCtrl; + } __RCX_PACKED_POST unDstMemCtrl; + uint32_t ulMiscAsicCtrl; /**< internal ASIC control register value (set to 1) */ + uint32_t ulSerialNumber; /**< serial no. or user param. (ignored by ROM loader) */ + uint32_t ulSrcDeviceType; /**< HIL_SRC_DEVICE_TYPE_xxx */ + uint32_t ulBootHeaderChecksum; /**< sums up all 16 DWORDs and multiplies result by -1 */ +} __RCX_PACKED_POST HIL_FILE_BOOT_HEADER_V1_0, *PHIL_FILE_BOOT_HEADER_V1_0; + + +/* DEFAULT header (64 bytes, used for NXM, NXO, NXD, NXL, NXB) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_DEFAULT_HEADER_V1_0tag +{ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_xxx_COOKIE definitions */ + uint32_t aulReserved[15]; /**< reserved, set to zero */ +} __RCX_PACKED_POST HIL_FILE_DEFAULT_HEADER_V1_0, *PHIL_FILE_DEFAULT_HEADER_V1_0; + + +/* COMMON header (64 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_COMMON_HEADER_V3_0tag +{ + uint32_t ulHeaderVersion; /**< structure version (major, minor), 0x00030000 */ + uint32_t ulHeaderLength; /**< Default+Common Header+Device Info+Module Info(s) */ + uint32_t ulDataSize; /**< from ulDataStartOffset to ulTagListStartOffset */ + uint32_t ulDataStartOffset; /**< offset of binary data (from beginning of file) */ + uint8_t bNumModuleInfos; /**< number of Module Info structures in file header */ + uint8_t bReserved; /**< reserved, set to zero */ + uint16_t usReserved; /**< reserved, set to zero */ + uint32_t aulMD5[4]; /**< MD5 checksum for the whole firmware file */ + uint32_t ulTagListSize; /**< tag list length in bytes (0 = no tag list) */ + uint32_t ulTagListOffset; /**< offset of tag list (from beginning of file) */ + uint32_t ulTagListSizeMax; /**< maximum tag list length in bytes (reserved space) */ + uint32_t aulReserved[3]; /**< reserved, set to zero */ + uint32_t ulHeaderCRC32; /**< Default+Common Header+Device Info+Module Info(s) */ +} __RCX_PACKED_POST HIL_FILE_COMMON_HEADER_V3_0, *PHIL_FILE_COMMON_HEADER_V3_0; + + +/* DEVICE-specific information (64 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_DEVICE_INFO_V1_0tag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usManufacturer; /**< manufacturer ID (see DPM Manual) */ + uint16_t usDeviceClass; /**< netX device class */ + uint8_t bHwCompatibility; /**< hardware compatibility ID */ + uint8_t bChipType; /**< see HIL_LICENSE_CHIPTYPE_xxx definitions */ + uint16_t usReserved; /**< reserved, set to zero */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint32_t ulLicenseFlags1; /**< netX license flags 1 */ + uint32_t ulLicenseFlags2; /**< netX license flags 2 */ + uint16_t usNetXLicenseID; /**< netX license id */ + uint16_t usNetXLicenseFlags; /**< netX license flags */ + uint16_t ausFwVersion[4]; /**< FW version (major, minor, build, revision) */ + uint32_t ulFwNumber; /**< FW product code (order number) or project code */ + uint32_t ulDeviceNumber; /**< target device product code (order number) */ + uint32_t ulSerialNumber; /**< target device serial number */ + uint32_t aulReserved[3]; /**< reserved, set to zero */ +} __RCX_PACKED_POST HIL_FILE_DEVICE_INFO_V1_0, *PHIL_FILE_DEVICE_INFO_V1_0; + + +/* MODULE-specific information (32 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_MODULE_INFO_V1_0tag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usCommunicationClass; /**< communication class */ + uint16_t usProtocolClass; /**< protocol class */ + uint32_t ulDBVersion; /**< database version (major, minor) */ + uint16_t ausChannelSizes[4]; /**< required DPM channel sizes, 0=end of list */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint8_t abHwAssignments[4]; /**< xC numbers for HW options (0xFF=free choice) */ +} __RCX_PACKED_POST HIL_FILE_MODULE_INFO_V1_0, *PHIL_FILE_MODULE_INFO_V1_0; + + + +/*****************************************************************************/ +/* File Header Subtructures Instantiated as Global Variables in the Firmware */ +/*****************************************************************************/ + +/* !!!! The structure version of the Common Header determines the version of the whole structure !!!! */ + +/* basic file header (without Default Header as included in ELF files used to create NXFs, 320 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_BASIC_HEADER_V3_0tag +{ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo[6]; /**< module-specific info for up to 6 modules */ +} __RCX_PACKED_POST HIL_FILE_BASIC_HEADER_V3_0, *PHIL_FILE_BASIC_HEADER_V3_0; + + +/* basic file header (without Default Header as included in ELF files used to create NXOs, 160 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_MODULE_HEADER_V3_0tag +{ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 module */ +} __RCX_PACKED_POST HIL_FILE_MODULE_HEADER_V3_0, *PHIL_FILE_MODULE_HEADER_V3_0; + + + +/*****************************************************************************/ +/* Minimal File Header Subset for all NX* Files (Usable with Older Versions) */ +/*****************************************************************************/ + +/* MIN file header (common subset for all complete NX* files, 128 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_MIN_HEADER_V3_0tag +{ + HIL_FILE_BOOT_HEADER_V1_0 tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ +} __RCX_PACKED_POST HIL_FILE_MIN_HEADER_V3_0, *PHIL_FILE_MIN_HEADER_V3_0; + + + +/*****************************************************************************/ +/* File Header Structures for Hilscher Downloadable Files (V3.0, netX) */ +/*****************************************************************************/ + +/* NXF file header (for relocated base firmware or complete firmware with linked stacks, 384 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_NXF_HEADER_V3_0tag +{ + HIL_FILE_BOOT_HEADER_V1_0 tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo[6]; /**< module-specific info for 6 comm. channels */ +} __RCX_PACKED_POST HIL_FILE_NXF_HEADER_V3_0, *PHIL_FILE_NXF_HEADER_V3_0; + + +/* NXO file header (for unrelocated optional firmware modules, 224 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_NXO_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 comm. channel */ +} __RCX_PACKED_POST HIL_FILE_NXO_HEADER_V3_0, *PHIL_FILE_NXO_HEADER_V3_0; + + +/* NXD file header (for database file download, 224 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_NXD_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0 tModuleInfo; /**< module-specific info for 1 comm. channel */ +} __RCX_PACKED_POST HIL_FILE_NXD_HEADER_V3_0, *PHIL_FILE_NXD_HEADER_V3_0; + + +/* NXL file header (for license file download, 192 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_NXL_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ +} __RCX_PACKED_POST HIL_FILE_NXL_HEADER_V3_0, *PHIL_FILE_NXL_HEADER_V3_0; + + +/* NXB file header (for binary file download, 192 bytes) */ +typedef __RCX_PACKED_PRE struct HIL_FILE_NXB_HEADER_V3_0tag +{ + HIL_FILE_DEFAULT_HEADER_V1_0 tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0 tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0 tDeviceInfo; /**< device-specific information */ +} __RCX_PACKED_POST HIL_FILE_NXB_HEADER_V3_0, *PHIL_FILE_NXB_HEADER_V3_0; + + + +/*****************************************************************************/ +/* Support for MS Visual C++ compiler: Restore default alignment. */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #pragma pack() + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ +/*****************************************************************************/ + +#undef __RCX_PACKED_PRE +#undef __RCX_PACKED_POST + + + +#endif /* __HilFileHeaderV3_h */ diff --git a/examples/tcpserver/Marshaller/APIHeader/HilTransport.h b/examples/tcpserver/Marshaller/APIHeader/HilTransport.h new file mode 100644 index 0000000..f243f8a --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/HilTransport.h @@ -0,0 +1,315 @@ +/******************************************************************************* + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ******************************************************************************* + + Filename: + $Id: HilTransport.h 7029 2015-07-16 12:09:53Z Robert $ + Last Modification: + $Author: Robert $ + $Date: 2015-07-16 14:09:53 +0200 (Do, 16 Jul 2015) $ + $Revision: 7029 $ + + Targets: + OSIndependent : yes + + Description: + Definition for the universal Hilscher Transport Header prepended, to all + data, send via a communication channel like USB/TCP/Serial. + + Changes: + + Version Date Author Description + --------------------------------------------------------------------------- + 11 02.10.2013 MT Added HIL_TRANSPORT_FEATURES_PERMANENT_CONNECTION + 10 23.05.2011 MS Added transport types HIL_TRANSPORT_TYPE_INX, HIL_TRANSPORT_TYPE_NETANALYZER, HIL_TRANSPORT_TYPE_NETPLC + 9 28.06.2010 SD New types for 64-bit support + 8 24.06.2009 MT HIL_TRANSPORT_BASIC_FEATURES_U structure changed data type from uint32_t to unsigned int + 7 22.07.2008 PL New transport type HIL_TRANSPORT_TYPE_KEEP_ALIVE added + 6 15.04.2008 MT New error code (state) HIL_TSTATE_BUFFEROVERFLOW_ERROR added + 5 07.05.2007 MT New header definitions adjusted to standard c data types + 4 04.04.2007 RM Default state definitions included + 3 22.03.2007 RM Definition changed to fit new data structure + 2 16.03.2007 RM Header reworked + 1 06.03.2007 MT created + +*******************************************************************************/ + +#ifndef __HILTRANSPORT__H +#define __HILTRANSPORT__H + +#include + +/*****************************************************************************/ +/*! \file HilTransport.h +* Definition for the universal Hilscher Transport Header */ +/*****************************************************************************/ + +#define HIL_TRANSPORT_IP_PORT 50111 /**< IP Port number used for transport */ + +#define HIL_TRANSPORT_COOKIE 0xA55A5AA5UL /**< Cookie for HIL_TRANSPORT_HEADER */ +#define HIL_TRANSPORT_PACKETID "netX" /**< Packet ID */ + +#define HIL_TRANSPORT_STATE_OK 0x00 /**< Packet received successfully */ + +#define HIL_TSTATE_CHECKSUM_ERROR 0x10 /**< Packet checksum error */ +#define HIL_TSTATE_LENGTH_INCOMPLETE 0x11 /**< Packet length incomplete */ +#define HIL_TSTATE_DATA_TYPE_UNKNOWN 0x12 /**< Packet data type unknown */ +#define HIL_TSTATE_DEVICE_UNKNOWN 0x13 /**< Device unknown */ +#define HIL_TSTATE_CHANNEL_UNKNOWN 0x14 /**< Channel unknown */ +#define HIL_TSTATE_SEQUENCE_ERROR 0x15 /**< Sequence number out of sync */ +#define HIL_TSTATE_BUFFEROVERFLOW_ERROR 0x16 /**< Buffer overflow in receiver */ +#define HIL_TSTATE_RESOURCE_ERROR 0x17 /**< Out of internal resources + (e.g. parallel services exceeded) */ +#define HIL_TSTATE_KEEP_ALIVE_ERROR 0x20 /**< Keep Alive ComID was incorrect */ + +/*****************************************************************************/ +/* Transport data types */ +/*****************************************************************************/ +#define HIL_TRANSPORT_TYPE_QUERYSERVER 0x0000 /**< Admim command: query basic server information */ +#define HIL_TRANSPORT_TYPE_QUERYDEVICE 0x0001 /**< Admim command: query device specific information */ +#define HIL_TRANSPORT_TYPE_RCX_PACKET 0x0100 /**< Transport type for rcX packets */ +#define HIL_TRANSPORT_TYPE_MARSHALLER 0x0200 /**< Transport type for cifX API calls */ +#define HIL_TRANSPORT_TYPE_INX 0x0300 /**< Transport type for INX API calls */ +#define HIL_TRANSPORT_TYPE_NETANALYZER 0x0400 /**< Transport type for netANALYZER API calls */ +#define HIL_TRANSPORT_TYPE_NETPLC 0x0500 /**< Transport type for netPLC API calls */ +#define HIL_TRANSPORT_TYPE_ACKNOWLEDGE 0x8000 /**< Transport type for acknowledging succesful sends */ +#define HIL_TRANSPORT_TYPE_KEEP_ALIVE 0xFFFF /**< Transport type for connection keepalive transfers */ + +#define HIL_TRANSPORT_TRANSACTION_DEVICE 0x8000 /**< Transaction ID was generated by Device/Target */ + +/*****************************************************************************/ +/*! Structure preceeding every data packet sent to netX based devices. +* This structure is independent from the transmission channel. */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_HEADERtag +{ + uint32_t ulCookie; /**< Magic cookie */ + uint32_t ulLength; /**< Length of following data (in Bytes) */ + uint16_t usChecksum; /**< CRC16 over all data, 0 = no checksum */ + uint16_t usDataType; /**< Type of data following */ + uint8_t bDevice; /**< Device number */ + uint8_t bChannel; /**< Channel number */ + uint8_t bSequenceNr; /**< Sequence Nr. Increased with every packet */ + uint8_t bState; /**< Transmission/Target state */ + uint16_t usTransaction; /**< Transaction ID */ + uint16_t usReserved; /**< unused/reserved for future use */ +} HIL_TRANSPORT_HEADER, *PHIL_TRANSPORT_HEADER; + + +/*****************************************************************************/ +/*! Administration datatype definitions */ +/*****************************************************************************/ + +/* Error codes */ +#define HIL_ADMIN_S_OK 0 /*!< No error */ + +/* Features flag definition (used in QueryServer command) */ +#define HIL_TRANSPORT_FEATURES_KEEPALIVE 0x00000001 /*!< Device supports keep-alive */ +#define HIL_TRANSPORT_FEATURES_NXAPI 0x00000002 /*!< Device supports NXAPI marshalling */ +#define HIL_TRANSPORT_FEATURES_PERMANENT_CONNECTION 0x80000000 /*!< Device has a steady connection (does not drop on remote device resets) */ +#define HIL_TRANSPORT_QUERYSERVER_NAMELEN 32 + +/*****************************************************************************/ +/*! Administration : Query Server structure DataType = 0x0000 */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_Ttag +{ + uint32_t ulStructVersion; /*!< Structure Version, currently 1 */ + char szServerName[HIL_TRANSPORT_QUERYSERVER_NAMELEN]; /*!< NULL Terminated Server name */ + uint32_t ulVersionMajor; /*!< Major Version of Server */ + uint32_t ulVersionMinor; /*!< Minor Version of Server */ + uint32_t ulVersionBuild; /*!< Build Version of Server */ + uint32_t ulVersionRevision; /*!< Major Version of Server */ + uint32_t ulFeatures; /*!< Features flag */ + uint32_t ulParallelServices; /*!< Number of parallel services */ + uint32_t ulBufferSize; /*!< Maximum of bytes in a data packet */ + uint32_t ulDatatypeCnt; /*!< Number of supported data types */ + uint16_t ausDataTypes[1]; /*!< Array of supported data types */ + +} HIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_T; + +/*****************************************************************************/ +/*! Administration : Query Server data packet DataType = 0x0000 */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYSERVER_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYSERVER_T, *PHIL_TRANSPORT_ADMIN_QUERYSERVER_T; + + +/*****************************************************************************/ +/* Query device definitions (Datatype=0x0001) */ +/*****************************************************************************/ + +#define HIL_TRANSPORT_QUERYDEVICE_OPT_DEVICECNT 0 /*!< Query the number of available devices */ +#define HIL_TRANSPORT_QUERYDEVICE_OPT_CHANNELCNT 1 /*!< Query the number of channels on a device */ +#define HIL_TRANSPORT_QUERYDEVICE_OPT_DEVICEINFO 2 /*!< Get Device information */ +#define HIL_TRANSPORT_QUERYDEVICE_OPT_CHANNELINFO 3 /*!< Get channel information */ + +/*****************************************************************************/ +/*! Administration : Query Device request data DataType = 0x0001 */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_DATA_Ttag +{ + uint16_t usDataType; /*!< Data type the info is requested for */ + uint16_t usReserved; /*!< unused/reserved, set to zero */ + uint32_t ulOption; /*!< Option to query */ + +} HIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_DATA_T; + +/*****************************************************************************/ +/*! Administration : Query Device request DataType = 0x0001 */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICE_REQ_T; + + +/*****************************************************************************/ +/*! Structure of query device count response data (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_DATA_Ttag +{ + uint16_t usDatatype; /**< Data type the request is made for */ + uint16_t usReserved; /**< Reserved field */ + uint32_t ulOption; /**< Requested option */ + uint32_t ulError; /**< Error code for te request( If ulError is set -> following data will be supressed */ + uint32_t ulDeviceCnt; /**< Number of supported devices */ + +} HIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_DATA_T; + +/*****************************************************************************/ +/*! Structure of query device count response (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICE_CNF_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICECNT_CNF_T; + +/*****************************************************************************/ +/*! Structure of query channel count response data (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_DATA_Ttag +{ + uint16_t usDatatype; /**< Data type the request is made for */ + uint16_t usReserved; /**< Reserved field */ + uint32_t ulOption; /**< Requested option */ + uint32_t ulError; /**< Error code for te request( If ulError is set -> following data will be supressed */ + uint32_t ulChannelCnt; /**< Number of supported channels on device passed via bDevice */ + +} HIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_DATA_T; + +/*****************************************************************************/ +/*! Structure of query channel count response (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_T, *PHIL_TRANSPORT_ADMIN_QUERYCHANNELCNT_CNF_T; + +/*****************************************************************************/ +/*! Structure of query device info response data (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_DATA_Ttag +{ + uint16_t usDatatype; /**< Data type the request is made for */ + uint16_t usReserved; /**< Reserved field */ + uint32_t ulOption; /**< Requested option */ + uint32_t ulError; /**< Error code for te request( If ulError is set -> following data will be supressed */ + uint32_t ulDeviceNr; /**< Device Number */ + uint32_t ulSerialNr; /**< Serial Number */ + uint16_t usMfgNr; /**< Manufacturer code */ + uint16_t usProdDate; /**< Production date */ + uint32_t ulLicenseFlag1; /**< License flags 1 */ + uint32_t ulLicenseFlag2; /**< License flags 2 */ + uint16_t usLicenseID; /**< License ID */ + uint16_t usLicenseFlags; /**< License flags */ + uint16_t usDeviceClass; /**< Device class */ + uint8_t bHwRevision; /**< HW Revision */ + uint8_t bHwCompatibility; /**< HW compatibility */ + +} HIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_DATA_T; + +/*****************************************************************************/ +/*! Structure of query device info response (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_T, *PHIL_TRANSPORT_ADMIN_QUERYDEVICEINFO_CNF_T; + + +/*****************************************************************************/ +/*! Structure of query channel info response data (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_DATA_Ttag +{ + uint16_t usDatatype; /**< Data type the request is made for */ + uint16_t usReserved; /**< Reserved field */ + uint32_t ulOption; /**< Requested option */ + uint32_t ulError; /**< Error code for te request( If ulError is set -> following data will be supressed */ + uint16_t usCommClass; /**< Communication class */ + uint16_t usProtocolClass; /**< Protocol class */ + uint16_t usConformanceClass; /**< Conformance class */ + uint16_t usReserved1; /**< Reserved field 1 */ + uint8_t szFWName[64]; /**< Null-terminated firmware name */ + uint16_t usFWMajor; /**< Firmware version (major) */ + uint16_t usFWMinor; /**< Firmware version (minor) */ + uint16_t usFWBuild; /**< Firmware version (build) */ + uint16_t usFWRev; /**< Firmware version (revision) */ + uint16_t usYear; /**< Build data of firmware (year) */ + uint8_t bMonth; /**< Build data of firmware (month) */ + uint8_t bDay; /**< Build data of firmware (day) */ + +} HIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_DATA_T, *PHIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_DATA_T; + +/*****************************************************************************/ +/*! Structure of query device info response (administration command). */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_DATA_T tData; + +} HIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_T, *PHIL_TRANSPORT_ADMIN_QUERYCHANNELINFO_CNF_T; + +/*****************************************************************************/ +/* Keep alive definitions */ +/*****************************************************************************/ + +#define HIL_TRANSPORT_KEEP_ALIVE_FIRST_COMID 0x00000000 /**< Default value for the Keep Alive ComID */ +#define HIL_TRANSPORT_KEEP_ALIVE_CLIENT_TIMEOUT 500 /**< Timeout(ms) for the Client-side of the Keep Alive */ +#define HIL_TRANSPORT_KEEP_ALIVE_SERVER_TIMEOUT 2000 /**< Timeout(ms) for the Server-side of the Keep Alive */ + +/*****************************************************************************/ +/*! Keepalive data structure DataType = 0xFFFF */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_KEEPALIVE_DATA_Ttag +{ + uint32_t ulComID; /*!< KeepAlive ID. 0 = Request new from device */ +} HIL_TRANSPORT_KEEPALIVE_DATA_T, *PHIL_TRANSPORT_KEEPALIVE_DATA_T; + +/*****************************************************************************/ +/*! Keepalive data packet DataType = 0xFFFF */ +/*****************************************************************************/ +typedef struct HIL_TRANSPORT_KEEPALIVE_Ttag +{ + HIL_TRANSPORT_HEADER tHeader; + HIL_TRANSPORT_KEEPALIVE_DATA_T tData; + +} HIL_TRANSPORT_KEEPALIVE_T, *PHIL_TRANSPORT_KEEPALIVE_T; + +#endif /* __HILTRANSPORT__H */ diff --git a/examples/tcpserver/Marshaller/APIHeader/MarshallerFrame.h b/examples/tcpserver/Marshaller/APIHeader/MarshallerFrame.h new file mode 100644 index 0000000..da3392b --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/MarshallerFrame.h @@ -0,0 +1,968 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: MarshallerFrame.h 12852 2019-03-28 08:01:41Z AlexanderMinor $: + + Description: + Data structures definitions for marshaller data + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 24.07.2015 Added pre-compiler definition to build HOST transport examples using + different MARSHALLER_DATA_FRAME_HEADER_T structure + definitionChanged hList from uinsigned long to uint32_t (for 64-bit support) + 15.07.2015 Changed hList from uinsigned long to uint32_t (for 64-bit support) + 26.09.2013 Added support for xDriverRestartDevice call + 25.06.2010 Change: + - changed types (for 64-bit support) + 07.07.2006 intitial version + +**************************************************************************************/ + +#ifndef __MARSHALLERFRAME__H +#define __MARSHALLERFRAME__H + +#define MARSHALLER_OBJECT_TYPE_CLASSFACTORY 0x00 +#define MARSHALLER_OBJECT_TYPE_DRIVER 0x01 +#define MARSHALLER_OBJECT_TYPE_SYSDEVICE 0x02 +#define MARSHALLER_OBJECT_TYPE_CHANNEL 0x03 + +#define MARSHALLER_SUBIDX_SYSTEMCHANNEL 0xFF + +#define MARSHALLER_CF_METHODID_SERVERVERSION 0x00000000 /*!< Class Factory: MethodID for querying ServerVersion */ +#define MARSHALLER_CF_METHODID_CREATEINSTANCE 0x00000001 /*!< Class Factory: MethodID for Creating/Getting a handle to a new object_Type (DriverObject) */ + +#define MARSHALLER_DRV_METHODID_OPEN 0x00000001 /*!< Driver Object: xDriverOpen */ +#define MARSHALLER_DRV_METHODID_CLOSE 0x00000002 /*!< Driver Object: xDriverClose */ +#define MARSHALLER_DRV_METHODID_GETINFO 0x00000003 /*!< Driver Object: xDriverGetInformation */ +#define MARSHALLER_DRV_METHODID_ERRORDESCR 0x00000004 /*!< Driver Object: xDriverGetErrorDescription */ +#define MARSHALLER_DRV_METHODID_ENUMBOARDS 0x00000005 /*!< Driver Object: xDriverEnumBoard */ +#define MARSHALLER_DRV_METHODID_ENUMCHANNELS 0x00000006 /*!< Driver Object: xDriverEnumChannels */ +#define MARSHALLER_DRV_METHODID_OPENCHANNEL 0x00000008 /*!< Driver Object: xDriverOpenChannel */ +#define MARSHALLER_DRV_METHODID_OPENSYSDEV 0x00000009 /*!< Driver Object: xDriverSysDeviceOpen */ +#define MARSHALLER_DRV_METHODID_RESTARTDEVICE 0x00000010 /*!< Driver Object: xDriverRestartDevice */ + +#define MARSHALLER_SYSDEV_METHODID_CLOSE 0x00000001 /*!< Sysdevice Object: xSysdeviceClose */ +#define MARSHALLER_SYSDEV_METHODID_INFO 0x00000002 /*!< Sysdevice Object: xSysdeviceInfo */ +#define MARSHALLER_SYSDEV_METHODID_RESET 0x00000003 /*!< Sysdevice Object: xSysdeviceReset */ +#define MARSHALLER_SYSDEV_METHODID_GETMBXSTATE 0x00000004 /*!< Sysdevice Object: xSysdeviceGetMBXState */ +#define MARSHALLER_SYSDEV_METHODID_PUTPACKET 0x00000005 /*!< Sysdevice Object: xSysdevicePutPacket */ +#define MARSHALLER_SYSDEV_METHODID_GETPACKET 0x00000006 /*!< Sysdevice Object: xSysdeviceGetPacket */ +#define MARSHALLER_SYSDEV_METHODID_DOWNLOAD 0x00000007 /*!< Sysdevice Object: xSysdeviceDownload */ +#define MARSHALLER_SYSDEV_METHODID_FINDFIRSTFILE 0x00000008 /*!< Sysdevice Object: xSysdeviceFindFirstFile */ +#define MARSHALLER_SYSDEV_METHODID_FINDNEXTFILE 0x00000009 /*!< Sysdevice Object: xSysdeviceFindNextFile */ +#define MARSHALLER_SYSDEV_METHODID_UPLOAD 0x00000010 /*!< Sysdevice Object: xSysdeviceUpload */ +#define MARSHALLER_SYSDEV_METHODID_RESETEX 0x00000011 /*!< Sysdevice Object: xSysdeviceResetEx */ + +#define MARSHALLER_CHANNEL_METHODID_CLOSE 0x00000001 /*!< Channel Object: xChannelClose */ +#define MARSHALLER_CHANNEL_METHODID_DOWNLOAD 0x00000002 /*!< Channel Object: xChannelDownload */ +#define MARSHALLER_CHANNEL_METHODID_GETMBXSTATE 0x00000003 /*!< Channel Object: xChannelGetMBXState */ +#define MARSHALLER_CHANNEL_METHODID_PUTPACKET 0x00000004 /*!< Channel Object: xChannelPutPacket */ +#define MARSHALLER_CHANNEL_METHODID_GETPACKET 0x00000005 /*!< Channel Object: xChannelGetPacket */ +#define MARSHALLER_CHANNEL_METHODID_GETSENDPACKET 0x00000006 /*!< Channel Object: xChannelGetSendPacket */ +#define MARSHALLER_CHANNEL_METHODID_CONFIGLOCK 0x00000007 /*!< Channel Object: xChannelConfigLock */ +#define MARSHALLER_CHANNEL_METHODID_RESET 0x00000008 /*!< Channel Object: xChannelReset */ +#define MARSHALLER_CHANNEL_METHODID_INFO 0x00000009 /*!< Channel Object: xChannelInfo */ +#define MARSHALLER_CHANNEL_METHODID_WATCHDOG 0x00000010 /*!< Channel Object: xChannelWatchdog */ +#define MARSHALLER_CHANNEL_METHODID_HOSTSTATE 0x00000011 /*!< Channel Object: xChannelHostState */ +#define MARSHALLER_CHANNEL_METHODID_IOREAD 0x00000012 /*!< Channel Object: xChannelIORead */ +#define MARSHALLER_CHANNEL_METHODID_IOWRITE 0x00000013 /*!< Channel Object: xChannelIOWrite */ +#define MARSHALLER_CHANNEL_METHODID_IOREADSENDDATA 0x00000014 /*!< Channel Object: xChannelIOReadSendData */ +#define MARSHALLER_CHANNEL_METHODID_BUSSTATE 0x00000015 /*!< Channel Object: xChannelBusState */ +#define MARSHALLER_CHANNEL_METHODID_CONTROLBLOCK 0x00000016 /*!< Channel Object: xChannelControlBlock */ +#define MARSHALLER_CHANNEL_METHODID_STATUSBLOCK 0x00000017 /*!< Channel Object: xChannelStatusBlock */ +#define MARSHALLER_CHANNEL_METHODID_EXTSTATUSBLOCK 0x00000018 /*!< Channel Object: xChannelExtendedStatusBlock */ +#define MARSHALLER_CHANNEL_METHODID_USERBLOCK 0x00000019 /*!< Channel Object: xChannelUserBlock */ +#define MARSHALLER_CHANNEL_METHODID_FINDFIRSTFILE 0x00000020 /*!< Channel Object: xChannelFindFirstFile */ +#define MARSHALLER_CHANNEL_METHODID_FINDNEXTFILE 0x00000021 /*!< Channel Object: xChannelFindNextFile */ +#define MARSHALLER_CHANNEL_METHODID_UPLOAD 0x00000022 /*!< Channel Object: xChannelUpload */ +#define MARSHALLER_CHANNEL_METHODID_IOINFO 0x00000023 /*!< Channel Object: xChannelIOInfo */ + +/*****************************************************************************/ +/*! Marshaller handle definition (not valid for old device implementation) */ +/*****************************************************************************/ +#define MSK_MARSHALLER_HANDLE_VALID 0x80000000 +#define SRT_MARSHALLER_HANDLE_VALID 31 +#define MSK_MARSHALLER_HANDLE_OBJECTSUBIDX 0x00FF0000 +#define SRT_MARSHALLER_HANDLE_OBJECTSUBIDX 16 +#define MSK_MARSHALLER_HANDLE_OBJECTIDX 0x0000FF00 +#define SRT_MARSHALLER_HANDLE_OBJECTIDX 8 +#define MSK_MARSHALLER_HANDLE_OBJECTTYPE 0x000000FF +#define SRT_MARSHALLER_HANDLE_OBJECTTYPE 0 + +#define MSK_MARSHALLER_SEQUENCE_REQUEST 0x00000001 +#define SRT_MARSHALLER_SEQUENCE_REQUEST 0 +#define MSK_MARSHALLER_SEQUENCE_SUPPORTED 0x00000002 +#define SRT_MARSHALLER_SEQUENCE_SUPPORTED 1 +#define MSK_MARSHALLER_SEQUENCE_NUMBER 0xFFFF0000 +#define SRT_MARSHALLER_SEQUENCE_NUMBER 16 + +#ifdef HOST_TRANSPORT_MARSHALLER_DEFS + /*****************************************************************************/ + /*! Marshaller handle definition (not valid for old device implementation) */ + /*****************************************************************************/ + typedef union MARSHALLER_HANDLE_Utag + { + struct MARSHALLER_HANDLE_BF_Ttag + { + uint32_t bObjectType : 8; /*!< Type of the Object see MARSHALLER_OBJECT_TYPE_XXX defines */ + uint32_t bObjectIdx : 8; /*!< Idx of the Object, i.e. Board number */ + uint32_t bObjectSubIdx : 8; /*!< SubIdx of the Object (0..6 for Channels, 0 for Sysdevice/Driver */ + uint32_t bReserved : 7; /*!< SubIdx of the Object (0..6 for Channels, 0 for Sysdevice/Driver */ + uint32_t fValid : 1; /*!< 1 to show this is a valid handle */ + + } tBfHandle; + uint32_t ulHandle; /*!< Returned handle from DriverOpen/ChannelOpen/SysDeviceOpen functions */ + + } MARSHALLER_HANDLE_U; + + typedef struct MARSHALLER_DATA_FRAME_HEADER_Ttag + { + MARSHALLER_HANDLE_U uHandle; + uint32_t ulMethodID; /*!< ID of the method to execute */ + + union MARSHALLER_SEQUENCE_Utag + { + struct MARSHALLER_SEQUENCE_BF_Ttag + { + uint32_t fRequest :1; /*!< 1=Request, 0 = Answer */ + uint32_t fSeqNrSupport :1; /*!< Sequence number supported */ + uint32_t uiReserved :14; /*!< Reserved for future use. Set to 0 */ + uint32_t usSequenceNr :16; /*!< Sequence number, used to associate answer with request */ + } tBfSequence; + uint32_t ulSequence; /*!< Sequence number, to associate request/answer */ + } uSequence; + uint32_t ulError; /*!< Error, used on Answer, to indicate function return value */ + uint32_t ulDataSize; /*!< Length of following data */ + + } MARSHALLER_DATA_FRAME_HEADER_T, *PMARSHALLER_DATA_FRAME_HEADER_T; + +#else + + typedef struct MARSHALLER_DATA_FRAME_HEADER_Ttag + { + uint32_t ulHandle; /*!< Marshaller handle */ + uint32_t ulMethodID; /*!< ID of the method to execute */ + uint32_t ulSequence; /*!< Sequence number, to associate request/answer */ + uint32_t ulError; /*!< Error, used on Answer, to indicate function return value */ + uint32_t ulDataSize; /*!< Length of following data */ + + } MARSHALLER_DATA_FRAME_HEADER_T, *PMARSHALLER_DATA_FRAME_HEADER_T; + +#endif + +/***************************************************************************** + ____ _ _____ _ + / ___| | | __ _ ___ ___ | ___| __ _ ___ | |_ ___ _ __ _ _ + | | | | / _` | / __| / __| | |_ / _` | / __| | __| / _ \ | '__| | | | | + | |___ | | | (_| | \__ \ \__ \ | _| | (_| | | (__ | |_ | (_) | | | | |_| | + \____| |_| \__,_| |___/ |___/ |_| \__,_| \___| \__| \___/ |_| \__, | + |___/ +*****************************************************************************/ + + +/*****************************************************************************/ +/*! Class Factory - Create instance request */ +/*****************************************************************************/ +typedef struct CF_CREATEINSTANCE_REQ_DATA_Ttag +{ +#ifdef HOST_TRANSPORT_MARSHALLER_DEFS + MARSHALLER_HANDLE_U uHandle; /*!< Handle returned for future use. This handle must be used to communicate with the created object */ +#else + uint32_t ulObjectType; /*!< Object type to generate (see MARSHALLER_OBJECT_TYPE_XXX defines */ +#endif + +} CF_CREATEINSTANCE_REQ_DATA_T, *PCF_CREATEINSTANCE_REQ_DATA_T; + +typedef struct CF_CREATEINSTANCE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CF_CREATEINSTANCE_REQ_DATA_T tData; + +} CF_CREATEINSTANCE_REQ_T, *PCF_CREATEINSTANCE_REQ_T; + +/*****************************************************************************/ +/*! Class Factory - Create instance confirmation */ +/*****************************************************************************/ +typedef struct CF_CREATEINSTANCE_CNF_DATA_Ttag +{ + #ifdef HOST_TRANSPORT_MARSHALLER_DEFS + MARSHALLER_HANDLE_U uHandle; /*!< Handle returned for future use. This handle must be used to communicate with the created object */ + #else + uint32_t ulHandle; /*!< Handle returned for future use. This handle must be used to communicate with the created object */ + #endif +} CF_CREATEINSTANCE_CNF_DATA_T, *PCF_CREATEINSTANCE_CNF_DATA_T; + +typedef struct CF_CREATEINSTANCE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CF_CREATEINSTANCE_CNF_DATA_T tData; + +} CF_CREATEINSTANCE_CNF_T, *PCF_CREATEINSTANCE_CNF_T; + +/*****************************************************************************/ +/*! Class Factory - Query cifX marshaller version confirmation */ +/*****************************************************************************/ +typedef struct CF_SERVERVERSION_CNF_DATA_Ttag +{ + uint32_t ulVersion; /*!< Returned version */ + +} CF_SERVERVERSION_CNF_DATA_T, *PCF_SERVERVERSION_CNF_DATA_T; + +typedef struct CF_SERVERVERSION_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CF_SERVERVERSION_CNF_DATA_T tData; + +} CF_SERVERVERSION_CNF_T, *PCF_SERVERVERSION_CNF_T; + + +/***************************************************************************** + ____ _ ___ _ _ _ + | _ \ _ __ (_) __ __ ___ _ __ / _ \ | |__ (_) ___ ___ | |_ + | | | | | '__| | | \ \ / / / _ \ | '__| | | | | | '_ \ | | / _ \ / __| | __| + | |_| | | | | | \ V / | __/ | | | |_| | | |_) | | | | __/ | (__ | |_ + |____/ |_| |_| \_/ \___| |_| \___/ |_.__/ _/ | \___| \___| \__| + |__/ +*****************************************************************************/ + +/*****************************************************************************/ +/*! Driver - xDriverGetInformation request */ +/*****************************************************************************/ +typedef struct DRV_GETINFORMATION_REQ_DATA_Ttag +{ + uint32_t ulSize; /*!< Number of byte to return in confirmation */ + +} DRV_GETINFORMATION_REQ_DATA_T, *PDRV_GETINFORMATION_REQ_DATA_T; + +typedef struct DRV_GETINFORMATION_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + DRV_GETINFORMATION_REQ_DATA_T tData; + +} DRV_GETINFORMATION_REQ_T, *PDRV_GETINFORMATION_REQ_T; + +/*****************************************************************************/ +/*! Driver - xDriverEnumBoards request */ +/*****************************************************************************/ +typedef struct DRV_ENUMBOARD_REQ_DATA_Ttag +{ + uint32_t ulBoard; /*!< Board number */ + uint32_t ulSize; /*!< Size of the returned board information (in confirmation) */ + +} DRV_ENUMBOARD_REQ_DATA_T, *PDRV_ENUMBOARD_REQ_DATA_T; + +typedef struct DRV_ENUMBOARD_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + DRV_ENUMBOARD_REQ_DATA_T tData; + +} DRV_ENUMBOARD_REQ_T, *PDRV_ENUMBOARD_REQ_T; + + +/*****************************************************************************/ +/*! Driver - xDriverEnumChannels request */ +/*****************************************************************************/ +typedef struct DRV_ENUMCHANNELS_REQ_DATA_Ttag +{ + uint32_t ulBoard; /*!< Board number */ + uint32_t ulChannel; /*!< Channel number */ + uint32_t ulSize; /*!< Size of returned channel information */ + +} DRV_ENUMCHANNELS_REQ_DATA_T, *PDRV_ENUMCHANNELS_REQ_DATA_T; + +typedef struct DRV_ENUMCHANNELS_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + DRV_ENUMCHANNELS_REQ_DATA_T tData; + +} DRV_ENUMCHANNELS_REQ_T, *PDRV_ENUMCHANNELS_REQ_T; + + +/*****************************************************************************/ +/*! Driver - xDriverRestartDevice request */ +/*****************************************************************************/ +typedef struct DRV_RESTARTDEVICE_REQ_DATA_Ttag +{ + char abBoardName[CIFx_MAX_INFO_NAME_LENTH]; + +} DRV_RESTARTDEVICE_REQ_DATA_T, *PDRV_RESTARTDEVICE_REQ_DATA_T; + +typedef struct DRV_RESTARTDEVICE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + DRV_RESTARTDEVICE_REQ_DATA_T tData; + +} DRV_RESTARTDEVICE_REQ_T, *PDRV_RESTARTDEVICE_REQ_T; + + +/***************************************************************************** + ____ _ _ + / ___| _ _ ___ __| | ___ __ __ (_) ___ ___ + \___ \ | | | | / __| / _` | / _ \ \ \ / / | | / __| / _ \ + ___) | | |_| | \__ \ | (_| | | __/ \ V / | | | (__ | __/ + |____/ \__, | |___/ \__,_| \___| \_/ |_| \___| \___| + |___/ + ___ _ _ _ + / _ \ | |__ (_) ___ ___ | |_ + | | | | | '_ \ | | / _ \ / __| | __| + | |_| | | |_) | | | | __/ | (__ | |_ + \___/ |_.__/ _/ | \___| \___| \__| + |__/ +*****************************************************************************/ + + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindFirstFile request data */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_FIRSTFILE_REQ_DATA_Ttag +{ + uint32_t ulChannel; /*!< Number of Channel */ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + uint32_t ulRecvPktCallback; /*!< Recv-Pkt-Callback value */ + uint32_t ulUser; /*!< User value */ + +} SYSDEV_FIND_FIRSTFILE_REQ_DATA_T, *PSYSDEV_FIND_FIRSTFILE_REQ_DATA_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindFirstFile request */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_FIRSTFILE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_FIND_FIRSTFILE_REQ_DATA_T tData; + +} SYSDEV_FIND_FIRSTFILE_REQ_T, *PSYSDEV_FIND_FIRSTFILE_REQ_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindFirstFile confirmation data */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_FIRSTFILE_CNF_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + +} SYSDEV_FIND_FIRSTFILE_CNF_DATA_T, *PSYSDEV_FIND_FIRSTFILE_CNF_DATA_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindFirstFile confirmation */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_FIRSTFILE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_FIND_FIRSTFILE_CNF_DATA_T tData; + +} SYSDEV_FIND_FIRSTFILE_CNF_T, *PSYSDEV_FIND_FIRSTFILE_CNF_T; + + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindNextFile request data */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_NEXTFILE_REQ_DATA_Ttag +{ + uint32_t ulChannel; /*!< Number of Channel */ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + uint32_t ulRecvPktCallback; /*!< Recv-Pkt-Callback value */ + uint32_t ulUser; /*!< User value */ + +} SYSDEV_FIND_NEXTFILE_REQ_DATA_T, *PSYSDEV_FIND_NEXTFILE_REQ_DATA_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindNextFile request */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_NEXTFILE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_FIND_NEXTFILE_REQ_DATA_T tData; + +} SYSDEV_FIND_NEXTFILE_REQ_T, *PSYSDEV_FIND_NEXTFILE_REQ_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindNextFile confirmation data */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_NEXTFILE_CNF_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + +} SYSDEV_FIND_NEXTFILE_CNF_DATA_T, *PSYSDEV_FIND_NEXTFILE_CNF_DATA_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceFindNextFile confirmation */ +/*****************************************************************************/ +typedef struct SYSDEV_FIND_NEXTFILE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_FIND_NEXTFILE_CNF_DATA_T tData; + +} SYSDEV_FIND_NEXTFILE_CNF_T, *PSYSDEV_FIND_NEXTFILE_CNF_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceInfo request */ +/*****************************************************************************/ +typedef struct SYSDEV_INFO_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulSize; /*!< Size of returned information */ + +} SYSDEV_INFO_REQ_DATA_T, *PSYSDEV_INFO_REQ_DATA_T; + +typedef struct SYSDEV_INFO_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_INFO_REQ_DATA_T tData; + +} SYSDEV_INFO_REQ_T, *PSYSDEV_INFO_REQ_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceReset request */ +/*****************************************************************************/ +typedef struct SYSDEV_RESET_REQ_DATA_Ttag +{ + uint32_t ulTimeout; /*!< Timeout in ms for reset */ + +} SYSDEV_RESET_REQ_DATA_T, *PSYSDEV_RESET_REQ_DATA_T; + +typedef struct SYSDEV_RESET_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_RESET_REQ_DATA_T tData; + +} SYSDEV_RESET_REQ_T, *PSYSDEV_RESET_REQ_T; + +/*****************************************************************************/ +/*! Sysdevice - xSysdeviceResetEx request */ +/*****************************************************************************/ +typedef struct SYSDEV_RESETEX_REQ_DATA_Ttag +{ + uint32_t ulTimeout; /*!< Timeout in ms for reset */ + uint32_t ulMode; /*!< Reset mode */ + +} SYSDEV_RESETEX_REQ_DATA_T, *PSYSDEV_RESETEX_REQ_DATA_T; + +typedef struct SYSDEV_RESETEX_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + SYSDEV_RESETEX_REQ_DATA_T tData; + +} SYSDEV_RESETEX_REQ_T, *PSYSDEV_RESETEX_REQ_T; + + +/***************************************************************************** + ____ _ _ + / ___| | |__ __ _ _ __ _ __ ___ | | + | | | '_ \ / _` | | '_ \ | '_ \ / _ \ | | + | |___ | | | | | (_| | | | | | | | | | | __/ | | + \____| |_| |_| \__,_| |_| |_| |_| |_| \___| |_| + + ___ _ _ _ + / _ \ | |__ (_) ___ ___ | |_ + | | | | | '_ \ | | / _ \ / __| | __| + | |_| | | |_) | | | | __/ | (__ | |_ + \___/ |_.__/ _/ | \___| \___| \__| + |__/ +*****************************************************************************/ + +/*****************************************************************************/ +/*! Channel - xChannelReset request */ +/*****************************************************************************/ +typedef struct CHANNEL_RESET_REQ_DATA_Ttag +{ + uint32_t ulMode; /*!< Reset mode */ + uint32_t ulTimeout; /*!< Timeout in ms for reset */ + +} CHANNEL_RESET_REQ_DATA_T, *PCHANNEL_RESET_REQ_DATA_T; + +typedef struct CHANNEL_RESET_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_RESET_REQ_DATA_T tData; + +} CHANNEL_RESET_REQ_T, *PCHANNEL_RESET_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelInfo request */ +/*****************************************************************************/ +typedef struct CHANNEL_INFO_REQ_DATA_Ttag +{ + uint32_t ulSize; /*!< Size of returned data */ + +} CHANNEL_INFO_REQ_DATA_T, *PCHANNEL_INFO_REQ_DATA_T; + +typedef struct CHANNEL_INFO_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_INFO_REQ_DATA_T tData; + +} CHANNEL_INFO_REQ_T, *PCHANNEL_INFO_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelWatchdog request */ +/*****************************************************************************/ +typedef struct CHANNEL_WATCHDOG_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulTrigger; /*!< Trigger value */ + +} CHANNEL_WATCHDOG_REQ_DATA_T, *PCHANNEL_WATCHDOG_REQ_DATA_T; + +typedef struct CHANNEL_WATCHDOG_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_WATCHDOG_REQ_DATA_T tData; + +} CHANNEL_WATCHDOG_REQ_T, *PCHANNEL_WATCHDOG_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelWatchdog confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_WATCHDOG_CNF_DATA_Ttag +{ + uint32_t ulTrigger; /*!< Trigger value */ + +} CHANNEL_WATCHDOG_CNF_DATA_T, *PCHANNEL_WATCHDOG_CNF_DATA_T; + +typedef struct CHANNEL_WATCHDOG_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_WATCHDOG_CNF_DATA_T tData; + +} CHANNEL_WATCHDOG_CNF_T, *PCHANNEL_WATCHDOG_CNF_T; + +/*****************************************************************************/ +/*! Channel - xChannelHoststate request */ +/*****************************************************************************/ +typedef struct CHANNEL_HOSTSTATE_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulState; /*!< State */ + uint32_t ulTimeout; /*!< Timeout in ms */ + +} CHANNEL_HOSTSTATE_REQ_DATA_T, *PCHANNEL_HOSTSTATE_REQ_DATA_T; + +typedef struct CHANNEL_HOSTSTATE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_HOSTSTATE_REQ_DATA_T tData; + +} CHANNEL_HOSTSTATE_REQ_T, *PCHANNEL_HOSTSTATE_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelWatchdog confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_HOSTSTATE_CNF_DATA_Ttag +{ + uint32_t ulState; /*!< Returned state */ + +} CHANNEL_HOSTSTATE_CNF_DATA_T, *PCHANNEL_HOSTSTATE_CNF_DATA_T; + +typedef struct CHANNEL_HOSTSTATE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_HOSTSTATE_CNF_DATA_T tData; + +} CHANNEL_HOSTSTATE_CNF_T, *PCHANNEL_HOSTSTATE_CNF_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock request data */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIG_LOCK_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command code */ + uint32_t ulState; /*!< State to set */ + uint32_t ulTimeout; /*!< Timeout on ms */ + +} CHANNEL_CONFIG_LOCK_REQ_DATA_T, *PCHANNEL_CONFIG_LOCK_REQ_DATA_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock request */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIG_LOCK_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_CONFIG_LOCK_REQ_DATA_T tData; + +} CHANNEL_CONFIG_LOCK_REQ_T, *PCHANNEL_CONFIG_LOCK_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock confirmation data */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIG_LOCK_CNF_DATA_Ttag +{ + uint32_t ulState; /*!< Returned state */ + +} CHANNEL_CONFIG_LOCK_CNF_DATA_T, *PCHANNEL_CONFIG_LOCK_CNF_DATA_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIG_LOCK_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_CONFIG_LOCK_CNF_DATA_T tData; + +} CHANNEL_CONFIG_LOCK_CNF_T, *PCHANNEL_CONFIG_LOCK_CNF_T; + +/*****************************************************************************/ +/*! Channel - xChannelIOInfo request data */ +/*****************************************************************************/ +typedef struct CHANNEL_IOINFO_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulArea; /*!< ulAreaNumber */ + uint32_t ulDataLen; /*!< Length to read */ +} CHANNEL_IOINFO_REQ_DATA_T, *PCHANNEL_IOINFO_REQ_DATA_T; + +/*****************************************************************************/ +/*! Channel - xChannelIOInfo request */ +/*****************************************************************************/ +typedef struct CHANNEL_IOINFO_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_IOINFO_REQ_DATA_T tData; + +} CHANNEL_IOINFO_REQ_T, *PCHANNEL_IOINFO_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelIORead request */ +/*****************************************************************************/ +typedef struct CHANNEL_IOREAD_REQ_DATA_Ttag +{ + uint32_t ulArea; + uint32_t ulOffset; + uint32_t ulTimeout; + uint32_t ulDataLen; + +} CHANNEL_IOREAD_REQ_DATA_T, *PCHANNEL_IOREAD_REQ_DATA_T; + +typedef struct CHANNEL_IOREAD_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_IOREAD_REQ_DATA_T tData; + +} CHANNEL_IOREAD_REQ_T, *PCHANNEL_IOREAD_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelIOWrite request */ +/*****************************************************************************/ +typedef struct CHANNEL_IOWRITE_REQ_DATA_Ttag +{ + uint32_t ulArea; + uint32_t ulOffset; + uint32_t ulTimeout; + uint32_t ulDataLen; + uint8_t abData[1]; + +} CHANNEL_IOWRITE_REQ_DATA_T, *PCHANNEL_IOWRITE_REQ_DATA_T; + +typedef struct CHANNEL_IOWRITE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_IOWRITE_REQ_DATA_T tData; + +} CHANNEL_IOWRITE_REQ_T, *PCHANNEL_IOWRITE_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelGetMBXState request (also user for sysdevice) */ +/*****************************************************************************/ +typedef struct CHANNEL_GETMBXSTATE_CNF_DATA_Ttag +{ + uint32_t ulRecvPktCnt; /*!< Number of messages pending in receive mailbox */ + uint32_t ulSendPktCnt; /*!< Number of messages that the channel can handle */ + +} CHANNEL_GETMBXSTATE_CNF_DATA_T, *PCHANNEL_GETMBXSTATE_CNF_DATA_T; + +typedef struct CHANNEL_GETMBXSTATE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_GETMBXSTATE_CNF_DATA_T tData; + +} CHANNEL_GETMBXSTATE_CNF_T, *PCHANNEL_GETMBXSTATE_CNF_T; + +/*****************************************************************************/ +/*! Channel - xChannelIOReadSendData request */ +/*****************************************************************************/ +typedef struct CHANNEL_IOREADSENDDATA_REQ_DATA_Ttag +{ + uint32_t ulArea; + uint32_t ulOffset; + uint32_t ulDataLen; + +} CHANNEL_IOREADSENDDATA_REQ_DATA_T, *PCHANNEL_IOREADSENDDATA_REQ_DATA_T; + +typedef struct CHANNEL_IOREADSENDDATA_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_IOREADSENDDATA_REQ_DATA_T tData; + +} CHANNEL_IOREADSENDDATA_REQ_T, *PCHANNEL_IOREADSENDDATA_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelBusState request */ +/*****************************************************************************/ +typedef struct CHANNEL_BUSSTATE_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulState; /*!< State */ + uint32_t ulTimeout; /*!< Timeout in ms */ + +} CHANNEL_BUSSTATE_REQ_DATA_T, *PCHANNEL_BUSSTATE_REQ_DATA_T; + +typedef struct CHANNEL_BUSSTATE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_BUSSTATE_REQ_DATA_T tData; + +} CHANNEL_BUSSTATE_REQ_T, *PCHANNEL_BUSSTATE_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelWatchdog confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_BUSSTATE_CNF_DATA_Ttag +{ + uint32_t ulState; /*!< Returned state */ + +} CHANNEL_BUSSTATE_CNF_DATA_T, *PCHANNEL_BUSSTATE_CNF_DATA_T; + +typedef struct CHANNEL_BUSSTATE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_BUSSTATE_CNF_DATA_T tData; + +} CHANNEL_BUSSTATE_CNF_T, *PCHANNEL_BUSSTATE_CNF_T; + + + +/*****************************************************************************/ +/*! Channel - xChannelGetPacket request (also user for sysdevice) */ +/*****************************************************************************/ +typedef struct CHANNEL_GETPACKET_REQ_DATA_Ttag +{ + uint32_t ulSize; /*!< Number of bytes to return */ + uint32_t ulTimeout; /*!< Maximum time to wait for packet [ms] */ + +} CHANNEL_GETPACKET_REQ_DATA_T, *PCHANNEL_GETPACKET_REQ_DATA_T; + +typedef struct CHANNEL_GETPACKET_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_GETPACKET_REQ_DATA_T tData; + +} CHANNEL_GETPACKET_REQ_T, *PCHANNEL_GETPACKET_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelGetSendPacket request data (also user for sysdevice) */ +/*****************************************************************************/ +typedef struct CHANNEL_GET_SENDPACKET_REQ_DATA_Ttag +{ + uint32_t ulSize; /*!< Size of buffer */ +} CHANNEL_GET_SENDPACKET_REQ_DATA_T, *PCHANNEL_GET_SENDPACKET_REQ_DATA_T; + +/*****************************************************************************/ +/*! Channel - xChannelGetSendPacket request (also user for sysdevice) */ +/*****************************************************************************/ +typedef struct CHANNEL_GET_SENDPACKET_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_GET_SENDPACKET_REQ_DATA_T tData; + +} CHANNEL_GET_SENDPACKET_REQ_T, *PCHANNEL_GET_SENDPACKET_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock request */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIGLOCK_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulState; /*!< State to set */ + uint32_t ulTimeout; /*!< Timeout to wait for state being reached */ + +} CHANNEL_CONFIGLOCK_REQ_DATA_T, *PCHANNEL_CONFIGLOCK_REQ_DATA_T; + +typedef struct CHANNEL_CONFIGLOCK_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_CONFIGLOCK_REQ_DATA_T tData; + +} CHANNEL_CONFIGLOCK_REQ_T, *PCHANNEL_CONFIGLOCK_REQ_T; + +/*****************************************************************************/ +/*! Channel - xChannelConfigLock confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_CONFIGLOCK_CNF_DATA_Ttag +{ + uint32_t ulState; /*!< Returned state information */ + +} CHANNEL_CONFIGLOCK_CNF_DATA_T, *PCHANNEL_CONFIGLOCK_CNF_DATA_T; + +typedef struct CHANNEL_CONFIGLOCK_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_CONFIGLOCK_CNF_DATA_T tData; + +} CHANNEL_CONFIGLOCK_CNF_T, *PCHANNEL_CONFIGLOCK_CNF_T; + + +/*****************************************************************************/ +/*! Channel - Control-, Common Status- and Extended Statusblock +* Read command (request) */ +/*****************************************************************************/ +typedef struct CHANNEL_BLOCK_READ_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulOffset; /*!< Offset inside block */ + uint32_t ulDatalen; /*!< Returned data length */ + +} CHANNEL_BLOCK_READ_REQ_DATA_T, *PCHANNEL_BLOCK_READ_REQ_DATA_T; + +typedef struct CHANNEL_BLOCK_READ_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_BLOCK_READ_REQ_DATA_T tData; + +} CHANNEL_BLOCK_READ_REQ_T, *PCHANNEL_BLOCK_READ_REQ_T; + +/*****************************************************************************/ +/*! Channel - Control-, Common Status- and Extended Statusblock +* Read command (confirmation) */ +/*****************************************************************************/ +typedef struct CHANNEL_BLOCK_READ_CNF_DATA_Ttag +{ + uint32_t abData[1]; /*!< Returned data */ +} CHANNEL_BLOCK_READ_CNF_DATA_T, *PCHANNEL_BLOCK_READ_CNF_DATA_T; + +typedef struct CHANNEL_BLOCK_READ_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_BLOCK_READ_CNF_DATA_T tData; + +} CHANNEL_BLOCK_READ_CNF_T, *PCHANNEL_BLOCK_READ_CNF_T; + +/*****************************************************************************/ +/*! Channel - Control-, Common Status- and Extended Statusblock +* Write command (request) */ +/*****************************************************************************/ +typedef struct CHANNEL_BLOCK_WRITE_REQ_DATA_Ttag +{ + uint32_t ulCmd; /*!< Command */ + uint32_t ulOffset; /*!< Offset inside block */ + uint32_t ulDatalen; /*!< Datalength in abData [] */ + uint8_t abData[1]; /*!< Data to write */ + +} CHANNEL_BLOCK_WRITE_REQ_DATA_T, *PCHANNEL_BLOCK_WRITE_REQ_DATA_T; + +typedef struct CHANNEL_BLOCK_WRITE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_BLOCK_WRITE_REQ_DATA_T tData; + +} CHANNEL_BLOCK_WRITE_REQ_T, *PCHANNEL_BLOCK_WRITE_REQ_T; + +/*****************************************************************************/ +/*! xChannelFindFirstFile request data */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_FIRSTFILE_REQ_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + uint32_t ulRecvPktCallback; /*!< Recv-Pkt-Callback value */ + uint32_t ulUser; /*!< User value */ + +} CHANNEL_FIND_FIRSTFILE_REQ_DATA_T, *PCHANNEL_FIND_FIRSTFILE_REQ_DATA_T; + +/*****************************************************************************/ +/*! xChannelFindFirstFile request */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_FIRSTFILE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_FIND_FIRSTFILE_REQ_DATA_T tData; + +} CHANNEL_FIND_FIRSTFILE_REQ_T, *PCHANNEL_FIND_FIRSTFILE_REQ_T; + +/*****************************************************************************/ +/*! xChannelFindFirstFile confirmation data */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_FIRSTFILE_CNF_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + +} CHANNEL_FIND_FIRSTFILE_CNF_DATA_T, *PCHANNEL_FIND_FIRSTFILE_CNF_DATA_T; + +/*****************************************************************************/ +/*! xChannelFindFirstFile confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_FIRSTFILE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_FIND_FIRSTFILE_CNF_DATA_T tData; + +} CHANNEL_FIND_FIRSTFILE_CNF_T, *PCHANNEL_FIND_FIRSTFILE_CNF_T; + + +/*****************************************************************************/ +/*! xChannelFindNextFile request data */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_NEXTFILE_REQ_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + uint32_t ulRecvPktCallback; /*!< Recv-Pkt-Callback value */ + uint32_t ulUser; /*!< User value */ + +} CHANNEL_FIND_NEXTFILE_REQ_DATA_T, *PCHANNEL_FIND_NEXTFILE_REQ_DATA_T; + +/*****************************************************************************/ +/*! xChannelFindNextFile request */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_NEXTFILE_REQ_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_FIND_NEXTFILE_REQ_DATA_T tData; + +} CHANNEL_FIND_NEXTFILE_REQ_T, *PCHANNEL_FIND_NEXTFILE_REQ_T; + +/*****************************************************************************/ +/*! xChannelFindNextFile confirmation data */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_NEXTFILE_CNF_DATA_Ttag +{ + uint32_t hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint8_t bFiletype; /*!< File type. */ + uint32_t ulFilesize; /*!< File size. */ + +} CHANNEL_FIND_NEXTFILE_CNF_DATA_T, *PCHANNEL_FIND_NEXTFILE_CNF_DATA_T; + +/*****************************************************************************/ +/*! xChannelFindNextFile confirmation */ +/*****************************************************************************/ +typedef struct CHANNEL_FIND_NEXTFILE_CNF_Ttag +{ + MARSHALLER_DATA_FRAME_HEADER_T tHeader; + CHANNEL_FIND_NEXTFILE_CNF_DATA_T tData; + +} CHANNEL_FIND_NEXTFILE_CNF_T, *PCHANNEL_FIND_NEXTFILE_CNF_T; + +#endif /* __MARSHALLERFRAME__H */ diff --git a/examples/tcpserver/Marshaller/APIHeader/TLR_Results.h b/examples/tcpserver/Marshaller/APIHeader/TLR_Results.h new file mode 100644 index 0000000..efd53ef --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/TLR_Results.h @@ -0,0 +1,39374 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: TLR_Results.h 7029 2015-07-16 12:09:53Z Robert $: + + Description: + TLR result definitions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2011-08-18 File updated after rebuild from latest MC files. + 2010-06-06 File updated after rebuild from latest MC files. + 2010-04-22 File created. + +**************************************************************************************/ + + +#ifdef DO_NOT_INCLUDE_THIS_HEADER_IN_TLR_AUTOGEN_HEADERS +#ifndef __TLR_FACILITIES_H +#define __TLR_FACILITIES_H + + + +/*****************************************************************************/ +/* type definition */ +/*****************************************************************************/ + + + +/*****************************************************************************/ +/* bit masks */ +/*****************************************************************************/ + +/* error code construction macro definitions for backward compatibility with older TLR versions */ +#define TLR_STATUS_BIT_TASK_INSTANCE(n) ((n << 28) & 0x30000000) +#define TLR_STATUS_BIT_TASK_IDENTIFIER(n) ((n << 16) & 0x0FFF0000) +#define TLR_STATUS_BIT_SEVERITY_NAME(n) ((n << 30) & 0xC0000000) + + +/*****************************************************************************/ +/* */ +/* TLR error codes are 32 bit values layed out as follows: */ +/* */ +/* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 */ +/* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* |Sev|C|R| Facility | Code | */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* */ +/* where */ +/* */ +/* Code - is the facility's status code */ +/* Facility - is the facility code */ +/* R - is a reserved bit */ +/* C - is the customer code flag */ +/* Sev - is the severity code */ +/* 00 - success */ +/* 01 - informational */ +/* 10 - warning */ +/* 11 - error */ +/* */ +/*****************************************************************************/ + + +/* Symbol definitions for the facility codes */ +#define TLR_UNQ_NR_VIRTUALSWITCH 0x27 +#define TLR_UNQ_NR_VARAN_CLIENT_AP 0x9D +#define TLR_UNQ_NR_VARAN_CLIENT 0x9C +#define TLR_UNQ_NR_USER_AREA 0xFF0 +#define TLR_UNQ_NR_USB_TLRROUTER 0x44 +#define TLR_UNQ_NR_UDP_DEBUG_CLIENT 0x1B +#define TLR_UNQ_NR_TLR_TIMER 0x2 +#define TLR_UNQ_NR_TLR_ROUTER 0x2F +#define TLR_UNQ_NR_TCPIP_TCP_AP 0x94 +#define TLR_UNQ_NR_TCPIP_TCP 0x8 +#define TLR_UNQ_NR_TCPIP_SOCKIF 0x74 +#define TLR_UNQ_NR_TCPIP_IP 0x7 +#define TLR_UNQ_NR_TCP_CONNECTOR 0x86 +#define TLR_UNQ_NR_SSIO_AP 0x76 +#define TLR_UNQ_NR_SSIO 0x75 +#define TLR_UNQ_NR_SNMP_SERVER 0x3B +#define TLR_UNQ_NR_SERVX 0x92 +#define TLR_UNQ_NR_SERCOSIII_SVC 0x33 +#define TLR_UNQ_NR_SERCOSIII_SL_SVC 0x4F +#define TLR_UNQ_NR_SERCOSIII_SL_RTD 0x50 +#define TLR_UNQ_NR_SERCOSIII_SL_IDN 0x85 +#define TLR_UNQ_NR_SERCOSIII_SL_COM 0x4E +#define TLR_UNQ_NR_SERCOSIII_SL_AP 0x51 +#define TLR_UNQ_NR_SERCOSIII_SIP 0xA0 +#define TLR_UNQ_NR_SERCOSIII_MA_SVC 0x71 +#define TLR_UNQ_NR_SERCOSIII_MA_NRT 0x79 +#define TLR_UNQ_NR_SERCOSIII_MA_CP 0x70 +#define TLR_UNQ_NR_SERCOSIII_MA_AP 0x72 +#define TLR_UNQ_NR_SERCOSIII_ETH 0x36 +#define TLR_UNQ_NR_SERCOSIII_DL 0x35 +#define TLR_UNQ_NR_SERCOSIII_CYCLIC 0x37 +#define TLR_UNQ_NR_SERCOSIII_API 0x34 +#define TLR_UNQ_NR_SERCOS_SL 0x4B +#define TLR_UNQ_NR_RPC 0x2E +#define TLR_UNQ_NR_RECORDING 0xA6 +#define TLR_UNQ_NR_PROFINET_RTA 0x9F +#define TLR_UNQ_NR_PROFIDRIVE_PA 0x98 +#define TLR_UNQ_NR_PROFIDRIVE_OD 0x99 +#define TLR_UNQ_NR_PROFIDRIVE_AP 0x9A +#define TLR_UNQ_NR_PROFIDRIVE 0x97 +#define TLR_UNQ_NR_PROFIBUS_MPI_RFC 0x73 +#define TLR_UNQ_NR_PROFIBUS_MPI_AP 0x68 +#define TLR_UNQ_NR_PROFIBUS_MPI 0x67 +#define TLR_UNQ_NR_PROFIBUS_FSPMS 0x9 +#define TLR_UNQ_NR_PROFIBUS_FSPMM2 0x69 +#define TLR_UNQ_NR_PROFIBUS_FSPMM 0x38 +#define TLR_UNQ_NR_PROFIBUS_DL 0x6 +#define TLR_UNQ_NR_PROFIBUS_APS 0x1D +#define TLR_UNQ_NR_PROFIBUS_APM 0x39 +#define TLR_UNQ_NR_POWERLINK_MN 0xA4 +#define TLR_UNQ_NR_PNS_SOCKET_SRV 0x52 +#define TLR_UNQ_NR_PNS_SOCKET 0x55 +#define TLR_UNQ_NR_PNS_IF_INTERN 0x58 +#define TLR_UNQ_NR_PNS_IF 0x30 +#define TLR_UNQ_NR_PNS_EDD_LOW 0x54 +#define TLR_UNQ_NR_PNS_EDD_HIGH 0x53 +#define TLR_UNQ_NR_PNS_DCP 0x56 +#define TLR_UNQ_NR_PNS_CLRPC 0x57 +#define TLR_UNQ_NR_PNS_4BITIO 0x45 +#define TLR_UNQ_NR_PNS_32BITIO 0x5E +#define TLR_UNQ_NR_PNIOD_LENZE_INIT 0x1C +#define TLR_UNQ_NR_PNIOD_LENZE 0x10 +#define TLR_UNQ_NR_PNIOD_DPMIF 0x1A +#define TLR_UNQ_NR_PNIOD_16BITIO 0x3A +#define TLR_UNQ_NR_PNIO_MGT 0x13 +#define TLR_UNQ_NR_PNIO_IRT_SCHED 0x81 +#define TLR_UNQ_NR_PNIO_EDD 0xE +#define TLR_UNQ_NR_PNIO_DCP 0x12 +#define TLR_UNQ_NR_PNIO_CMDEV 0xB +#define TLR_UNQ_NR_PNIO_CMCTL 0xA +#define TLR_UNQ_NR_PNIO_APDEV 0xD +#define TLR_UNQ_NR_PNIO_APCTL 0xC +#define TLR_UNQ_NR_PNIO_APCFG 0x14 +#define TLR_UNQ_NR_PNIO_ACP 0x11 +#define TLR_UNQ_NR_PACKET_ROUTER 0x83 +#define TLR_UNQ_NR_OS 0x1 +#define TLR_UNQ_NR_OMB_OMB_AP 0x61 +#define TLR_UNQ_NR_OMB_OMB 0x60 +#define TLR_UNQ_NR_OD2 0x28 +#define TLR_UNQ_NR_NT100_GATEWAY 0x84 +#define TLR_UNQ_NR_NETSCRIPT 0x80 +#define TLR_UNQ_NR_NETPLC_IO_HANDLER 0xA3 +#define TLR_UNQ_MPI_GATEWAY 0x78 +#define TLR_UNQ_NR_MODBUS_RTU_PERIPH 0x9E +#define TLR_UNQ_NR_MODBUS_RTU_AP 0x6F +#define TLR_UNQ_NR_MODBUS_RTU 0x6E +#define TLR_UNQ_NR_MID_SYS 0x2B +#define TLR_UNQ_NR_MID_STARTUP 0x5F +#define TLR_UNQ_NR_MID_DBG 0x31 +#define TLR_UNQ_NR_MIB_DATABASE 0x3C +#define TLR_UNQ_NR_MEMORY_MAP 0x77 +#define TLR_UNQ_NR_MARSHALLER 0x82 +#define TLR_UNQ_NR_LLDP 0x3E +#define TLR_UNQ_NR_ITEM_SERVER 0x87 +#define TLR_UNQ_NR_ISAGRAF_VM 0x8B +#define TLR_UNQ_NR_ISAGRAF_LOG 0x8C +#define TLR_UNQ_NR_ISAGRAF_ISARSI 0x88 +#define TLR_UNQ_NR_ISAGRAF_ETCP 0x89 +#define TLR_UNQ_NR_ISAGRAF 0x8A +#define TLR_UNQ_NR_IOLINK_MASTER 0x6D +#define TLR_UNQ_NR_IOLINK_AL 0xA5 +#define TLR_UNQ_NR_IO_SIGNAL 0x91 +#define TLR_UNQ_NR_INX 0x93 +#define TLR_UNQ_NR_ICONL_TIMER 0x2A +#define TLR_UNQ_NR_ICONL_RUN 0x29 +#define TLR_UNQ_NR_GLOBAL 0x0 +#define TLR_UNQ_NR_FODMI 0x96 +#define TLR_UNQ_NR_EXAMPLE_TASK3 0x5 +#define TLR_UNQ_NR_EXAMPLE_TASK2 0x4 +#define TLR_UNQ_NR_EXAMPLE_TASK1 0x3 +#define TLR_UNQ_NR_ETHERNETIP_OBJECT 0x1F +#define TLR_UNQ_NR_ETHERNETIP_ENCAP 0x1E +#define TLR_UNQ_NR_ETH_INTF 0x5D +#define TLR_UNQ_NR_EPL_SDO 0x16 +#define TLR_UNQ_NR_EPL_PLD 0x19 +#define TLR_UNQ_NR_EPL_PDO 0x15 +#define TLR_UNQ_NR_EPL_NMT 0x17 +#define TLR_UNQ_NR_EPL_MN 0x3D +#define TLR_UNQ_NR_EPL_ALI 0x18 +#define TLR_UNQ_NR_EIP_DLR 0x95 +#define TLR_UNQ_NR_EIP_APS 0x59 +#define TLR_UNQ_NR_EIP_APM 0x5A +#define TLR_UNQ_NR_ECS_LENZE 0x6C +#define TLR_UNQ_NR_ECAT_VOE 0x26 +#define TLR_UNQ_NR_ECAT_SOE 0x22 +#define TLR_UNQ_NR_ECAT_MASTER_AP 0x64 +#define TLR_UNQ_NR_ECAT_MASTER 0x65 +#define TLR_UNQ_NR_ECAT_FOE 0x24 +#define TLR_UNQ_NR_ECAT_ESM 0x4D +#define TLR_UNQ_NR_ECAT_EOE 0x23 +#define TLR_UNQ_NR_ECAT_DPM 0x4C +#define TLR_UNQ_NR_ECAT_COE 0x21 +#define TLR_UNQ_NR_ECAT_BASE 0x20 +#define TLR_UNQ_NR_ECAT_AOE 0x25 +#define TLR_UNQ_NR_DRV_EDD 0xF +#define TLR_UNQ_NR_DPM_OD2 0x48 +#define TLR_UNQ_NR_DNS_FAL 0x62 +#define TLR_UNQ_NR_DNS_AP 0x63 +#define TLR_UNQ_NR_DF1_AP 0x8E +#define TLR_UNQ_NR_DF1 0x8D +#define TLR_UNQ_NR_DEVNET_FAL 0x47 +#define TLR_UNQ_NR_DEVNET_APS 0x5C +#define TLR_UNQ_NR_DEVNET_AP 0x5B +#define TLR_UNQ_NR_DDL_ENPDDL 0x40 +#define TLR_UNQ_NR_DDL_DDL 0x41 +#define TLR_UNQ_NR_COMPONET_SLAVE_AP 0x7D +#define TLR_UNQ_NR_COMPONET_SLAVE 0x7C +#define TLR_UNQ_NR_CO_OBJDICT 0x9B +#define TLR_UNQ_NR_CCLINK_SLAVE 0x6A +#define TLR_UNQ_NR_CCLINK_APS 0x6B +#define TLR_UNQ_NR_CANOPEN_SLAVE 0x43 +#define TLR_UNQ_NR_CANOPEN_MASTER 0x42 +#define TLR_UNQ_NR_CANOPEN_APS 0x4A +#define TLR_UNQ_NR_CANOPEN_APM 0x49 +#define TLR_UNQ_NR_CANDL_APSAMPLE 0x46 +#define TLR_UNQ_NR_CAN_DL 0x3F +#define TLR_UNQ_NR_ASI_MASTER 0x7A +#define TLR_UNQ_NR_ASI_ECTRL 0x32 +#define TLR_UNQ_NR_ASI_APM 0x7B +#define TLR_UNQ_NR_ASCII_AP 0x7F +#define TLR_UNQ_NR_ASCII 0x7E +#define TLR_UNQ_NR_AN_TRANS 0x66 +#define TLR_UNQ_NR_3S_PLC_HANDLER_AP 0xA2 +#define TLR_UNQ_NR_3S_PLC_HANDLER 0xA1 +#define TLR_UNQ_NR_3964R_AP 0x90 +#define TLR_UNQ_NR_3964R 0x8F + + +/* */ +/* Define the severity codes */ +/* */ +#define TLR_STATUS_TYPE_WARNING 0x2 +#define TLR_STATUS_TYPE_SUCCESS 0x0 +#define TLR_STATUS_TYPE_INFO 0x1 +#define TLR_STATUS_TYPE_ERROR 0x3 + + +/* */ +/* MessageId: TLR_E_COMPILE_THIS_AS_TLR_FACILITIES */ +/* */ +/* MessageText: */ +/* */ +/* TLR Facilities Dummy Code. */ +/* */ +#define TLR_E_COMPILE_THIS_AS_TLR_FACILITIES ((TLR_RESULT)0xC000FFFFL) + +#endif /* TLR_FACILITIES_H */ +#endif /* DO_NOT_INCLUDE_THIS_HEADER_IN_TLR_AUTOGEN_HEADERS */ + + + +#ifndef __PLC_HANDLER_ERROR_H +#define __PLC_HANDLER_ERROR_H + + + + +/*****************************************************************************/ +/* 3S CodeSys PLC Handler Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_COMMAND_INVALID ((TLR_RESULT)0xC0A10001L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of PLC handler failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_INIT_FAILED ((TLR_RESULT)0xC0A10002L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_CONNECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Connection to PLC failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_CONNECT_FAILED ((TLR_RESULT)0xC0A10003L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_INVALID_PLCHANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PLC connection handle. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_INVALID_PLCHANDLE ((TLR_RESULT)0xC0A10004L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_INVALID_VARLISTHANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid variable list handle. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_INVALID_VARLISTHANDLE ((TLR_RESULT)0xC0A10005L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_DEFINE_VARLIST_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Create variable list failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_DEFINE_VARLIST_FAILED ((TLR_RESULT)0xC0A10006L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_DELETE_VARLIST_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Delete variable list failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_DELETE_VARLIST_FAILED ((TLR_RESULT)0xC0A10007L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_READ_VARIABLE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Reading of variable failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_READ_VARIABLE_FAILED ((TLR_RESULT)0xC0A10008L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_WRITE_VARIABLE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Writing of variable failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_WRITE_VARIABLE_FAILED ((TLR_RESULT)0xC0A10009L) + + + + +#endif /* __CAN_DL_ERROR_H */ + +#ifndef __PLC_HANDLER_AP_ERROR_H +#define __PLC_HANDLER_AP_ERROR_H + + + + +/*****************************************************************************/ +/* 3S CodeSys PLC Handler AP Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_AP_COMMAND_INVALID ((TLR_RESULT)0xC0A20001L) + +/* */ +/* MessageId: TLR_E_CODESYS_PLC_HANDLER_AP_SETCONFIG_FAILD */ +/* */ +/* MessageText: */ +/* */ +/* Set configuration of PLC handler application failed. */ +/* */ +#define TLR_E_CODESYS_PLC_HANDLER_AP_SETCONFIG_FAILD ((TLR_RESULT)0xC0A20002L) + + + + +#endif /* __PLC_HANDLER_AP_ERROR_H */ + +#ifndef __ASCII_APP_ERROR_H +#define __ASCII_APP_ERROR_H + +/*****************************************************************************/ +/* ASCII APP ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ASCII_APP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ASCII_APP_COMMAND_INVALID ((TLR_RESULT)0xC07F0001L) + + + + +#endif /* __ASCII_APP_ERROR_H */ + +#ifndef __ASCII_STACK_ERROR_H +#define __ASCII_STACK_ERROR_H + +/*****************************************************************************/ +/* ASCII Stack ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ASCII_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ASCII_COMMAND_INVALID ((TLR_RESULT)0xC07E0001L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_DATA_SIZE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Data size is invalid. */ +/* */ +#define TLR_E_ASCII_STACK_DATA_SIZE_INVALID ((TLR_RESULT)0xC07E0002L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* ASCII stack is busy. */ +/* */ +#define TLR_E_ASCII_STACK_BUSY ((TLR_RESULT)0xC07E0003L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_PACKET_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Packet is too long. */ +/* */ +#define TLR_E_ASCII_STACK_PACKET_TOO_LONG ((TLR_RESULT)0xC07E0004L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_DATA_OVERLAPPED */ +/* */ +/* MessageText: */ +/* */ +/* Previous data is overwritten. */ +/* */ +#define TLR_E_ASCII_STACK_DATA_OVERLAPPED ((TLR_RESULT)0xC07E0005L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_RESPONCE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Responce timeout expired. */ +/* */ +#define TLR_E_ASCII_STACK_RESPONCE_TIMEOUT ((TLR_RESULT)0xC07E0006L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_WAITING_RESPONCE */ +/* */ +/* MessageText: */ +/* */ +/* ASCII is waiting for responce. */ +/* */ +#define TLR_E_ASCII_STACK_WAITING_RESPONCE ((TLR_RESULT)0xC07E0007L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_LED_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* LED is not supported. */ +/* */ +#define TLR_E_ASCII_STACK_LED_NOT_SUPPORTED ((TLR_RESULT)0xC07E0008L) + +/* */ +/* MessageId: TLR_E_ASCII_STACK_MSG_MODE_DISABLED */ +/* */ +/* MessageText: */ +/* */ +/* Message mode is currently disabled. */ +/* */ +#define TLR_E_ASCII_STACK_MSG_MODE_DISABLED ((TLR_RESULT)0xC07E0009L) + + + + +#endif /* __ASCII_STACK_ERROR_H */ + +#ifndef __ASI_ECTRL_ERROR_H +#define __ASI_ECTRL_ERROR_H + + + + +/*****************************************************************************/ +/* AS-Interface ECTRL-Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ASI_ECTRL_INVAL_REQ_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_ASI_ECTRL_INVAL_REQ_DATA ((TLR_RESULT)0xC0320001L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_REQ_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* The request cannot be executed, because the previous request is still running. */ +/* */ +#define TLR_E_ASI_ECTRL_REQ_RUNNING ((TLR_RESULT)0xC0320002L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_UNKNOWN_REQ */ +/* */ +/* MessageText: */ +/* */ +/* Unknown or unsupported request received. */ +/* */ +#define TLR_E_ASI_ECTRL_UNKNOWN_REQ ((TLR_RESULT)0xC0320003L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_APF_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The request cannot be executed, because AS-Interface power failure is detected. */ +/* */ +#define TLR_E_ASI_ECTRL_APF_DETECTED ((TLR_RESULT)0xC0320004L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_NOT_IN_LAS */ +/* */ +/* MessageText: */ +/* */ +/* The requested Slave is not in list of activated Slaves. */ +/* */ +#define TLR_E_ASI_ECTRL_NOT_IN_LAS ((TLR_RESULT)0xC0320005L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_NOT_IN_LDS */ +/* */ +/* MessageText: */ +/* */ +/* The requested Slave is not in list of detected Slaves. */ +/* */ +#define TLR_E_ASI_ECTRL_NOT_IN_LDS ((TLR_RESULT)0xC0320006L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_INVAL_SLV_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The request cannot be processed for specific type of Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_INVAL_SLV_TYPE ((TLR_RESULT)0xC0320007L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_OFF_PHASE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred during the 'set offline mode' procedure, mode not changed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_OFF_PHASE_FAIL ((TLR_RESULT)0xC0320008L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_OP_MODE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred during the 'set operation mode' procedure, mode not changed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_OP_MODE_FAIL ((TLR_RESULT)0xC0320009L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_OP_MODE_SD0 */ +/* */ +/* MessageText: */ +/* */ +/* The AS-Interface Master could not change to protected mode, because a Slave with zero address is detected. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_OP_MODE_SD0 ((TLR_RESULT)0xC032000AL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_DATA_EXCH_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred during the 'set data exchange' procedure, mode not changed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_DATA_EXCH_FAIL ((TLR_RESULT)0xC032000BL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_AUTO_ADDR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred during the 'set auto address' procedure, mode not changed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_AUTO_ADDR_FAIL ((TLR_RESULT)0xC032000CL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_PARAM_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Parameter value could not be stored or written to Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_PARAM_FAIL ((TLR_RESULT)0xC032000DL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ID1_CODE_SND */ +/* */ +/* MessageText: */ +/* */ +/* Extended ID1-Code could not be set, because Slave with zero address is not detected. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ID1_CODE_SND ((TLR_RESULT)0xC032000EL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ID1_CODE_SE */ +/* */ +/* MessageText: */ +/* */ +/* Error with setting Extended ID1-Code. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ID1_CODE_SE ((TLR_RESULT)0xC032000FL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ID1_CODE_ET */ +/* */ +/* MessageText: */ +/* */ +/* Extended ID1-Code stored temporarily. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ID1_CODE_ET ((TLR_RESULT)0xC0320010L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ID1_CODE_RE */ +/* */ +/* MessageText: */ +/* */ +/* Error with reading Extended ID1-Code. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ID1_CODE_RE ((TLR_RESULT)0xC0320011L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_EQUAL_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* Old and new address are identical. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_EQUAL_ADDR ((TLR_RESULT)0xC0320012L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_SND */ +/* */ +/* MessageText: */ +/* */ +/* Slave with old address not detected. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_SND ((TLR_RESULT)0xC0320013L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_SD0 */ +/* */ +/* MessageText: */ +/* */ +/* Slave with zero address not detected. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_SD0 ((TLR_RESULT)0xC0320014L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADD_SD2 */ +/* */ +/* MessageText: */ +/* */ +/* Slave with new address detected. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADD_SD2 ((TLR_RESULT)0xC0320015L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_DE */ +/* */ +/* MessageText: */ +/* */ +/* Error with deletion of old address. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_DE ((TLR_RESULT)0xC0320016L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_RE */ +/* */ +/* MessageText: */ +/* */ +/* Error with reading the Extended ID1-Code of Slave with old address. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_RE ((TLR_RESULT)0xC0320017L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_SE */ +/* */ +/* MessageText: */ +/* */ +/* Error with setting of new address. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_SE ((TLR_RESULT)0xC0320018L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_AT */ +/* */ +/* MessageText: */ +/* */ +/* New address stored temporarily. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_AT ((TLR_RESULT)0xC0320019L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_EXECUTE_CMD_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Execution of single command failed. */ +/* */ +#define TLR_E_ASI_ECTRL_EXECUTE_CMD_FAIL ((TLR_RESULT)0xC032001AL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_GET_STATE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get ECTRL-Task state. */ +/* */ +#define TLR_E_ASI_ECTRL_GET_STATE_FAIL ((TLR_RESULT)0xC032001BL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_GET_ACT_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get actual configuration of AS-Interface network. */ +/* */ +#define TLR_E_ASI_ECTRL_GET_ACT_CONFIG_FAIL ((TLR_RESULT)0xC032001CL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_GET_PERM_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get permanent configuration of AS-Interface network. */ +/* */ +#define TLR_E_ASI_ECTRL_GET_PERM_CONFIG_FAIL ((TLR_RESULT)0xC032001DL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_STORE_ACT_PARAM_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Actual parameter of AS-Interface network could not be stored. */ +/* */ +#define TLR_E_ASI_ECTRL_STORE_ACT_PARAM_FAIL ((TLR_RESULT)0xC032001EL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_PERM_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Set permanent configuration of AS-Interface network failed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_PERM_CONFIG_FAIL ((TLR_RESULT)0xC032001FL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_PERM_CONFIG_ALREADY_IN_LPS */ +/* */ +/* MessageText: */ +/* */ +/* Slave not added to permanent configuration of AS-Interface network, because Slave is already projected. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_PERM_CONFIG_ALREADY_IN_LPS ((TLR_RESULT)0xC0320020L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_PERM_CONFIG_NOT_IN_LPS */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not changed or deleted from permanent configuration of AS-Interface network, because Slave is not projected. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_PERM_CONFIG_NOT_IN_LPS ((TLR_RESULT)0xC0320021L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_STORE_ACT_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Actual configuration of AS-Interface network could not be stored. */ +/* */ +#define TLR_E_ASI_ECTRL_STORE_ACT_CONFIG_FAIL ((TLR_RESULT)0xC0320022L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_READ_ID_STR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Identification string could not be read from requested Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_READ_ID_STR_FAIL ((TLR_RESULT)0xC0320023L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_READ_PARAM_STR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Parameter string could not be read from requested Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_READ_PARAM_STR_FAIL ((TLR_RESULT)0xC0320024L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_READ_DIAG_STR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Diagnostic string could not be read from requested Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_READ_DIAG_STR_FAIL ((TLR_RESULT)0xC0320025L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_PARAM_STR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Parameter string could not be written to requested Slave. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_PARAM_STR_FAIL ((TLR_RESULT)0xC0320026L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_READ_IN_DATA_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Read input data failed. */ +/* */ +#define TLR_E_ASI_ECTRL_READ_IN_DATA_FAIL ((TLR_RESULT)0xC0320027L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_OUT_DATA_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Write output data failed. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_OUT_DATA_FAIL ((TLR_RESULT)0xC0320028L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_READ_ANLG_IN_DATA_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Read analog input data failed. */ +/* */ +#define TLR_E_ASI_ECTRL_READ_ANLG_IN_DATA_FAIL ((TLR_RESULT)0xC0320029L) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ANLG_OUT_DATA_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Write analog output data failed. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ANLG_OUT_DATA_FAIL ((TLR_RESULT)0xC032002AL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_SET_PERM_PARAM_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Set permanent parameter of AS-Interface network failed. */ +/* */ +#define TLR_E_ASI_ECTRL_SET_PERM_PARAM_FAIL ((TLR_RESULT)0xC032002BL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_INVAL_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length in packet received. */ +/* */ +#define TLR_E_ASI_ECTRL_INVAL_LEN ((TLR_RESULT)0xC032002CL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_WRITE_ID1_CODE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Write Extended ID1-Code failed. */ +/* */ +#define TLR_E_ASI_ECTRL_WRITE_ID1_CODE_FAIL ((TLR_RESULT)0xC032002DL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_CHANGE_ADDR_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Change slave address failed. */ +/* */ +#define TLR_E_ASI_ECTRL_CHANGE_ADDR_FAIL ((TLR_RESULT)0xC032002EL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_NOT_IN_NORMAL_OP */ +/* */ +/* MessageText: */ +/* */ +/* The request cannot be executed, because the AS-Interface Master is not in normal operation. */ +/* */ +#define TLR_E_ASI_ECTRL_NOT_IN_NORMAL_OP ((TLR_RESULT)0xC032002FL) + +/* */ +/* MessageId: TLR_E_ASI_ECTRL_NOT_ALLOWED_IN_PROTECTED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* The request is not allowed in protected mode. */ +/* */ +#define TLR_E_ASI_ECTRL_NOT_ALLOWED_IN_PROTECTED_MODE ((TLR_RESULT)0xC0320030L) + + + + +#endif /* __ASI_ECTRL_ERROR_H */ + +#ifndef __ASI_APM_ERROR_H +#define __ASI_APM_ERROR_H + +/*****************************************************************************/ +/* AS-Interface Master Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ASI_APM_PARAM_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter cycletime. */ +/* */ +#define TLR_E_ASI_APM_PARAM_CYCLETIME ((TLR_RESULT)0xC07B0001L) + +/* */ +/* MessageId: TLR_E_ASI_APM_PARAM_CHN_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter channel instance. */ +/* */ +#define TLR_E_ASI_APM_PARAM_CHN_INSTANCE ((TLR_RESULT)0xC07B0002L) + +/* */ +/* MessageId: TLR_E_ASI_APM_PARAM_QUEUE_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter queue element. */ +/* */ +#define TLR_E_ASI_APM_PARAM_QUEUE_ELEMENT ((TLR_RESULT)0xC07B0003L) + +/* */ +/* MessageId: TLR_E_ASI_APM_PARAM_POOL_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter pool element. */ +/* */ +#define TLR_E_ASI_APM_PARAM_POOL_ELEMENT ((TLR_RESULT)0xC07B0004L) + +/* */ +/* MessageId: TLR_E_ASI_APM_PARAM_AUTO_CLEAR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter auto-clear. */ +/* */ +#define TLR_E_ASI_APM_PARAM_AUTO_CLEAR ((TLR_RESULT)0xC07B0005L) + +/* */ +/* MessageId: TLR_E_ASI_APM_SLAVE_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is already configured. */ +/* */ +#define TLR_E_ASI_APM_SLAVE_ALREADY_CONFIGURED ((TLR_RESULT)0xC07B0006L) + +/* */ +/* MessageId: TLR_E_ASI_APM_INVALID_DBM_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid version of database. */ +/* */ +#define TLR_E_ASI_APM_INVALID_DBM_VERSION ((TLR_RESULT)0xC07B0007L) + +/* */ +/* MessageId: TLR_E_ASI_APM_STORE_CONFIGURATION_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Permanent storage of configuration is not possible. */ +/* */ +#define TLR_E_ASI_APM_STORE_CONFIGURATION_NOT_POSSIBLE ((TLR_RESULT)0xC07B0008L) + +/* */ +/* MessageId: TLR_E_ASI_APM_INVALID_SLAVE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave parameter. */ +/* */ +#define TLR_E_ASI_APM_INVALID_SLAVE_PARAMETER ((TLR_RESULT)0xC07B0009L) + +/* */ +/* MessageId: TLR_E_ASI_APM_ACTIVATE_WATCHDOG */ +/* */ +/* MessageText: */ +/* */ +/* Failed to activate watchdog supervision. */ +/* */ +#define TLR_E_ASI_APM_ACTIVATE_WATCHDOG ((TLR_RESULT)0xC07B000AL) + +/* */ +/* MessageId: TLR_E_ASI_APM_NOT_ALLOWED_IN_PROTECTED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Request is not allowed in protected mode. */ +/* */ +#define TLR_E_ASI_APM_NOT_ALLOWED_IN_PROTECTED_MODE ((TLR_RESULT)0xC07B000BL) + +/* */ +/* MessageId: TLR_E_ASI_APM_IO_STATUS_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for IO status offset. */ +/* */ +#define TLR_E_ASI_APM_IO_STATUS_OFFSET ((TLR_RESULT)0xC07B000CL) + + + + +#endif /* __ASI_APM_ERROR_H */ + +#ifndef __ASI_MASTER_ERROR_H +#define __ASI_MASTER_ERROR_H + +/*****************************************************************************/ +/* AS-Interface Master */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter cycletime. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_CYCLETIME ((TLR_RESULT)0xC07A0001L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_XC_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter xC instance. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_XC_INSTANCE ((TLR_RESULT)0xC07A0002L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_QUEUE_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter queue element. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_QUEUE_ELEMENT ((TLR_RESULT)0xC07A0003L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_POOL_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter pool element. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_POOL_ELEMENT ((TLR_RESULT)0xC07A0004L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_MIN_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter min cycle timer. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_MIN_CYCLE_TIME ((TLR_RESULT)0xC07A0005L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_OPERATION_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter operation mode. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_OPERATION_MODE ((TLR_RESULT)0xC07A0006L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_DATA_EXCHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter data exchange. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_DATA_EXCHANGE ((TLR_RESULT)0xC07A0007L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_AUTO_ADDRESS_ENABLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter auto address enable. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_AUTO_ADDRESS_ENABLE ((TLR_RESULT)0xC07A0008L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_MANAGEMENT_PHASE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter management phase. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_MANAGEMENT_PHASE ((TLR_RESULT)0xC07A0009L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_PROCESS_DATA_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter process data mode. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_PROCESS_DATA_MODE ((TLR_RESULT)0xC07A000AL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_DATA_FORMAT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter process data format. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_DATA_FORMAT ((TLR_RESULT)0xC07A000BL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_INIT_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize data buffer. */ +/* */ +#define TLR_E_ASI_MASTER_INIT_BUFFER ((TLR_RESULT)0xC07A000CL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_INITIALIZING */ +/* */ +/* MessageText: */ +/* */ +/* Master is initializing. */ +/* */ +#define TLR_E_ASI_MASTER_INITIALIZING ((TLR_RESULT)0xC07A000DL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_DATA_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count. */ +/* */ +#define TLR_E_ASI_MASTER_DATA_COUNT ((TLR_RESULT)0xC07A000EL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_DATA_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data offset. */ +/* */ +#define TLR_E_ASI_MASTER_DATA_OFFSET ((TLR_RESULT)0xC07A000FL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_NOT_ALLOWED_IN_PROTECTED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Request is not allowed in protected mode. */ +/* */ +#define TLR_E_ASI_MASTER_NOT_ALLOWED_IN_PROTECTED_MODE ((TLR_RESULT)0xC07A0010L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_AUTO_CLEAR */ +/* */ +/* MessageText: */ +/* */ +/* Master is in auto-clear state. */ +/* */ +#define TLR_E_ASI_MASTER_AUTO_CLEAR ((TLR_RESULT)0xC07A0011L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_CONTROL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Control error detected. */ +/* */ +#define TLR_E_ASI_MASTER_CONTROL_ERROR ((TLR_RESULT)0xC07A0012L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* Slave is missing. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_MISSING ((TLR_RESULT)0xC07A0013L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_POWER_FAILURE */ +/* */ +/* MessageText: */ +/* */ +/* Power failure detected. */ +/* */ +#define TLR_E_ASI_MASTER_POWER_FAILURE ((TLR_RESULT)0xC07A0014L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_OFFLINE_READY */ +/* */ +/* MessageText: */ +/* */ +/* Master is in offline ready state. */ +/* */ +#define TLR_E_ASI_MASTER_OFFLINE_READY ((TLR_RESULT)0xC07A0015L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_NOT_IN_NORMAL_OPERATION */ +/* */ +/* MessageText: */ +/* */ +/* Master is not in normal operation. */ +/* */ +#define TLR_E_ASI_MASTER_NOT_IN_NORMAL_OPERATION ((TLR_RESULT)0xC07A0016L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_INVALID_SLAVE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave address. */ +/* */ +#define TLR_E_ASI_MASTER_INVALID_SLAVE_ADDRESS ((TLR_RESULT)0xC07A0017L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_ACTIVATED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is activated. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_ACTIVATED ((TLR_RESULT)0xC07A0018L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_NOT_ACTIVATED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not activated. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_NOT_ACTIVATED ((TLR_RESULT)0xC07A0019L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is detected. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_DETECTED ((TLR_RESULT)0xC07A001AL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_NOT_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not detected. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_NOT_DETECTED ((TLR_RESULT)0xC07A001BL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout detected. */ +/* */ +#define TLR_E_ASI_MASTER_TIMEOUT ((TLR_RESULT)0xC07A001CL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_0_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* Slave at address 0 detected. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_0_DETECTED ((TLR_RESULT)0xC07A001DL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_NEW_SLAVE_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* Slave at new address detected. */ +/* */ +#define TLR_E_ASI_MASTER_NEW_SLAVE_DETECTED ((TLR_RESULT)0xC07A001EL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_DELETE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Error with deletion of address. */ +/* */ +#define TLR_E_ASI_MASTER_DELETE_ADDRESS ((TLR_RESULT)0xC07A001FL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_READ_EXT_ID1 */ +/* */ +/* MessageText: */ +/* */ +/* Error with reading extended ID code 1. */ +/* */ +#define TLR_E_ASI_MASTER_READ_EXT_ID1 ((TLR_RESULT)0xC07A0020L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SET_EXT_ID1 */ +/* */ +/* MessageText: */ +/* */ +/* Error with setting extended ID code 1. */ +/* */ +#define TLR_E_ASI_MASTER_SET_EXT_ID1 ((TLR_RESULT)0xC07A0021L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_ADDRESS_SET_TEMPORARY */ +/* */ +/* MessageText: */ +/* */ +/* New address stored temporarily. */ +/* */ +#define TLR_E_ASI_MASTER_ADDRESS_SET_TEMPORARY ((TLR_RESULT)0xC07A0022L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SET_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Error with setting new address. */ +/* */ +#define TLR_E_ASI_MASTER_SET_ADDRESS ((TLR_RESULT)0xC07A0023L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_EXT_ID1_SET_TEMPORARY */ +/* */ +/* MessageText: */ +/* */ +/* Extended ID code 1 stored temporarily. */ +/* */ +#define TLR_E_ASI_MASTER_EXT_ID1_SET_TEMPORARY ((TLR_RESULT)0xC07A0024L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_INVALID_SLAVE_PROFILE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave profile. */ +/* */ +#define TLR_E_ASI_MASTER_INVALID_SLAVE_PROFILE ((TLR_RESULT)0xC07A0025L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave configuration. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_CONFIG ((TLR_RESULT)0xC07A0026L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_SLAVE_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is alrady configured. */ +/* */ +#define TLR_E_ASI_MASTER_SLAVE_ALREADY_CONFIGURED ((TLR_RESULT)0xC07A0027L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_STRING_TRANSFER_DATA_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Data overflow during stringtansfer detected. */ +/* */ +#define TLR_E_ASI_MASTER_STRING_TRANSFER_DATA_OVERFLOW ((TLR_RESULT)0xC07A0028L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_AUTOCLEAR_WITH_AUTOADRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter autoclear in combiantion with value for parameter autoaddress. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_AUTOCLEAR_WITH_AUTOADRESS ((TLR_RESULT)0xC07A0029L) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_PARAM_AUTOCLEAR_WITH_CONFIG_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for parameter autoclear in combiantion with value for parameter operationmode. */ +/* */ +#define TLR_E_ASI_MASTER_PARAM_AUTOCLEAR_WITH_CONFIG_MODE ((TLR_RESULT)0xC07A002AL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_COMMAND_NOT_ALLOWD_WITH_AUTOCLEAR */ +/* */ +/* MessageText: */ +/* */ +/* Commad is not allowed if autoclear is active. */ +/* */ +#define TLR_E_ASI_MASTER_COMMAND_NOT_ALLOWD_WITH_AUTOCLEAR ((TLR_RESULT)0xC07A002BL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_NOT_ALLOWED_IN_TRANSPARENT_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Request is not allowed in transparent mode. */ +/* */ +#define TLR_E_ASI_MASTER_NOT_ALLOWED_IN_TRANSPARENT_MODE ((TLR_RESULT)0xC07A002CL) + +/* */ +/* MessageId: TLR_E_ASI_MASTER_ONLY_ALLOWED_IN_TRANSPARENT_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Request is only allowed in transparent mode. */ +/* */ +#define TLR_E_ASI_MASTER_ONLY_ALLOWED_IN_TRANSPARENT_MODE ((TLR_RESULT)0xC07A002DL) + + + + +#endif /* __ASI_MASTER_ERROR_H */ + +#ifndef __CAN_DL_ERROR_H +#define __CAN_DL_ERROR_H + + + + +/*****************************************************************************/ +/* CAN DL Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CAN_DL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_CAN_DL_COMMAND_INVALID ((TLR_RESULT)0xC03F0001L) + +/* */ +/* MessageId: TLR_E_CAN_DL_CMD_LENGTH_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* The length code of the command is invalid. */ +/* */ +#define TLR_E_CAN_DL_CMD_LENGTH_MISMATCH ((TLR_RESULT)0xC03F0002L) + +/* */ +/* MessageId: TLR_E_CAN_DL_UNKNOWN_PARAMETER_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The parameter type of the command "Set Paramter" is invalid. */ +/* */ +#define TLR_E_CAN_DL_UNKNOWN_PARAMETER_TYPE ((TLR_RESULT)0xC03F0003L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_MODE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command "Set Parameter" the function set "CAN Mode" failed. */ +/* */ +#define TLR_E_CAN_DL_SET_MODE_FAILED ((TLR_RESULT)0xC03F0004L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_BAUDRATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command "Set Parameter" the function set "Baudrate" failed. */ +/* */ +#define TLR_E_CAN_DL_SET_BAUDRATE_FAILED ((TLR_RESULT)0xC03F0005L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_TXABORT_TIME_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command "Set Parameter" the function set "Transmission Abort Timer" failed. */ +/* */ +#define TLR_E_CAN_DL_SET_TXABORT_TIME_FAILED ((TLR_RESULT)0xC03F0006L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_EVENTS_REQUESTED_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command "Set Parameter" the function set "Requetsed Events" failed. */ +/* */ +#define TLR_E_CAN_DL_SET_EVENTS_REQUESTED_FAILED ((TLR_RESULT)0xC03F0007L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_FILTER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command "Set Parameter" or "Set Filter the function set "CAN Filter" failed. */ +/* */ +#define TLR_E_CAN_DL_SET_FILTER_FAILED ((TLR_RESULT)0xC03F0008L) + +/* */ +/* MessageId: TLR_E_CAN_DL_SET_ENABLE_DISABLE_RXID_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Within the command Enable or Diasble of receive identifiers an error occurred. */ +/* */ +#define TLR_E_CAN_DL_SET_ENABLE_DISABLE_RXID_FAILED ((TLR_RESULT)0xC03F0009L) + +/* */ +/* MessageId: TLR_E_CAN_DL_TX_FRAME_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* At least one CAN frame could not be send. Normaly because the send process was aborted by the transmission abort timer. */ +/* */ +#define TLR_E_CAN_DL_TX_FRAME_FAILED ((TLR_RESULT)0xC03F000AL) + +/* */ +/* MessageId: TLR_E_CAN_DL_TX_BUFFER_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* The send request of CAN frames was rejected because the internal buffer for send requests is full. */ +/* */ +#define TLR_E_CAN_DL_TX_BUFFER_OVERRUN ((TLR_RESULT)0xC03F000BL) + +/* */ +/* MessageId: TLR_E_CAN_DL_UNKNOWN_DIAG_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The diagnostic type of the command "Get Diag" is invalid. */ +/* */ +#define TLR_E_CAN_DL_UNKNOWN_DIAG_TYPE ((TLR_RESULT)0xC03F000CL) + +/* */ +/* MessageId: TRL_E_CAN_DL_TX_ABORT_ALREADY_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* The command "Transmission Abort" is already requested. */ +/* */ +#define TRL_E_CAN_DL_TX_ABORT_ALREADY_IN_REQUEST ((TLR_RESULT)0xC03F000DL) + +/* */ +/* MessageId: TRL_E_CAN_DL_TX_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* The send process of can frames was aborted by "Transmission Abort" command. */ +/* */ +#define TRL_E_CAN_DL_TX_ABORT ((TLR_RESULT)0xC03F000EL) + + + + +#endif /* __CAN_DL_ERROR_H */ + +#ifndef __CANOPEN_APM_ERROR_H +#define __CANOPEN_APM_ERROR_H + +/*****************************************************************************/ +/* CANopen Master Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CANOPEN_APM_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CANOPEN_APM_COMMAND_INVALID ((TLR_RESULT)0xC0490001L) + +/* */ +/* MessageId: TLR_I_CANOPEN_APM_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is locked. */ +/* */ +#define TLR_I_CANOPEN_APM_CONFIG_LOCK ((TLR_RESULT)0x40490002L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_CANOPEN_APM_PACKET_LENGTH ((TLR_RESULT)0xC0490003L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_WATCHDOG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for watchdog. */ +/* */ +#define TLR_E_CANOPEN_APM_WATCHDOG_PARAMETER ((TLR_RESULT)0xC0490004L) + +/* */ +/* MessageId: TLR_I_CANOPEN_APM_OPEN_DBM_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Database file not found. */ +/* */ +#define TLR_I_CANOPEN_APM_OPEN_DBM_FILE ((TLR_RESULT)0x40490005L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_DATASET */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_DATASET ((TLR_RESULT)0xC0490006L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_TABLE_GLOBAL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open GLOBAL configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_TABLE_GLOBAL ((TLR_RESULT)0xC0490007L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_TABLE_BUS_CAN */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open BUS_CAN configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_TABLE_BUS_CAN ((TLR_RESULT)0xC0490008L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_TABLE_BUS_CAN_EXT */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open BUS_CAN_EXT configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_TABLE_BUS_CAN_EXT ((TLR_RESULT)0xC0490009L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_TABLE_NODES */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open NODES configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_TABLE_NODES ((TLR_RESULT)0xC049000AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_WATCHDOG_ACTIVATE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to activate watchdog supervision. */ +/* */ +#define TLR_E_CANOPEN_APM_WATCHDOG_ACTIVATE ((TLR_RESULT)0xC049000BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_SIZE_TABLE_BUS_CAN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of BUS_CAN configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_SIZE_TABLE_BUS_CAN ((TLR_RESULT)0xC049000CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_SIZE_TABLE_BUS_CAN_EXT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of BUS_CAN_EXT configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APM_SIZE_TABLE_BUS_CAN_EXT ((TLR_RESULT)0xC049000DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_NODE_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Node already configured. */ +/* */ +#define TLR_E_CANOPEN_APM_NODE_ALREADY_CONFIGURED ((TLR_RESULT)0xC049000EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_INVALID_NODE_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Node ID. */ +/* */ +#define TLR_E_CANOPEN_APM_INVALID_NODE_ID ((TLR_RESULT)0xC049000FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_DATABASE_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Configuration database found. */ +/* */ +#define TLR_E_CANOPEN_APM_DATABASE_FOUND ((TLR_RESULT)0xC0490010L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APM_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Request already running. */ +/* */ +#define TLR_E_CANOPEN_APM_REQUEST_RUNNING ((TLR_RESULT)0xC0490011L) + + + + +#endif /* __CANOPEN_APM_ERROR_H */ + +#ifndef __CANOPEN_APS_ERROR_H +#define __CANOPEN_APS_ERROR_H + +/*****************************************************************************/ +/* CANopen Slave Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CANOPEN_APS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CANOPEN_APS_COMMAND_INVALID ((TLR_RESULT)0xC04A0001L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_DATABASE_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Configuration database found. */ +/* */ +#define TLR_E_CANOPEN_APS_DATABASE_FOUND ((TLR_RESULT)0xC04A0002L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_NODE_ID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for node id. */ +/* */ +#define TLR_E_CANOPEN_APS_NODE_ID_PARAMETER ((TLR_RESULT)0xC04A0003L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_BAUDRATE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for baudrate. */ +/* */ +#define TLR_E_CANOPEN_APS_BAUDRATE_PARAMETER ((TLR_RESULT)0xC04A0004L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Request not possible in current state. */ +/* */ +#define TLR_E_CANOPEN_APS_STATE ((TLR_RESULT)0xC04A0005L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Request already running. */ +/* */ +#define TLR_E_CANOPEN_APS_REQUEST_RUNNING ((TLR_RESULT)0xC04A0006L) + +/* */ +/* MessageId: TLR_I_CANOPEN_APS_OPEN_DBM_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open configuration database. */ +/* */ +#define TLR_I_CANOPEN_APS_OPEN_DBM_FILE ((TLR_RESULT)0x404A0007L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_DATASET */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APS_DATASET ((TLR_RESULT)0xC04A0008L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_TABLE_GLOBAL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open 'GLOBAL' configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APS_TABLE_GLOBAL ((TLR_RESULT)0xC04A0009L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_TABLE_BUS_CAN */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open 'BUS_CAN' configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APS_TABLE_BUS_CAN ((TLR_RESULT)0xC04A000AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of 'BUS_CAN' configuration dataset. */ +/* */ +#define TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN ((TLR_RESULT)0xC04A000BL) + +/* */ +/* MessageId: TLR_I_CANOPEN_APS_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is locked. */ +/* */ +#define TLR_I_CANOPEN_APS_CONFIG_LOCK ((TLR_RESULT)0x404A000CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_CANOPEN_APS_PACKET_LENGTH ((TLR_RESULT)0xC04A000DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_WATCHDOG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for watchdog supervision. */ +/* */ +#define TLR_E_CANOPEN_APS_WATCHDOG_PARAMETER ((TLR_RESULT)0xC04A000EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_WATCHDOG_ACTIVATE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to activate watchdog supervision. */ +/* */ +#define TLR_E_CANOPEN_APS_WATCHDOG_ACTIVATE ((TLR_RESULT)0xC04A000FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PARAM_QUEUE_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of queue elements. */ +/* */ +#define TLR_E_CANOPEN_APS_PARAM_QUEUE_ELEMENT ((TLR_RESULT)0xC04A0010L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PARAM_POOL_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of pool elements. */ +/* */ +#define TLR_E_CANOPEN_APS_PARAM_POOL_ELEMENT ((TLR_RESULT)0xC04A0011L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PARAM_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for cycletime. */ +/* */ +#define TLR_E_CANOPEN_APS_PARAM_CYCLETIME ((TLR_RESULT)0xC04A0012L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PARAM_CHN_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for channel instance. */ +/* */ +#define TLR_E_CANOPEN_APS_PARAM_CHN_INSTANCE ((TLR_RESULT)0xC04A0013L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_NUM_OF_RX_PDO_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of receive PDO. */ +/* */ +#define TLR_E_CANOPEN_APS_NUM_OF_RX_PDO_PARAMETER ((TLR_RESULT)0xC04A0014L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_NUM_OF_TX_PDO_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of send PDO. */ +/* */ +#define TLR_E_CANOPEN_APS_NUM_OF_TX_PDO_PARAMETER ((TLR_RESULT)0xC04A0015L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_SIZE_TABLE_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of table 'Version'. */ +/* */ +#define TLR_E_CANOPEN_APS_SIZE_TABLE_VERSION ((TLR_RESULT)0xC04A0016L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_INVALID_DBM_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid version of table 'Version'. */ +/* */ +#define TLR_E_CANOPEN_APS_INVALID_DBM_VERSION ((TLR_RESULT)0xC04A0017L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN_STD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of table 'BUS_COS_STD'. */ +/* */ +#define TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN_STD ((TLR_RESULT)0xC04A0018L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN_EXT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of table 'BUS_COS_EXT'. */ +/* */ +#define TLR_E_CANOPEN_APS_SIZE_TABLE_BUS_CAN_EXT ((TLR_RESULT)0xC04A0019L) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_AUTOSTART_WITH_EXTENDED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Autostart not allowed in extended mode. */ +/* */ +#define TLR_E_CANOPEN_APS_AUTOSTART_WITH_EXTENDED_MODE ((TLR_RESULT)0xC04A001AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_ADDRESS_SWITCH_CONFIGURATION_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Address switch configuration is not possible. */ +/* */ +#define TLR_E_CANOPEN_APS_ADDRESS_SWITCH_CONFIGURATION_NOT_POSSIBLE ((TLR_RESULT)0xC04A001BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_BAUD_SWITCH_CONFIGURATION_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Baud switch configuration is not possible. */ +/* */ +#define TLR_E_CANOPEN_APS_BAUD_SWITCH_CONFIGURATION_NOT_POSSIBLE ((TLR_RESULT)0xC04A001CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_APS_PARAM_LED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for LED mode. */ +/* */ +#define TLR_E_CANOPEN_APS_PARAM_LED_MODE ((TLR_RESULT)0xC04A001DL) + + + + +#endif /* __CANOPEN_APS_ERROR_H */ + +#ifndef __CANOPEN_MASTER_ERROR_H +#define __CANOPEN_MASTER_ERROR_H + +/*****************************************************************************/ +/* CANopen Master */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CANOPEN_MASTER_COMMAND_INVALID ((TLR_RESULT)0xC0420001L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length in packet. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PACKET_LENGTH ((TLR_RESULT)0xC0420002L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_DATA_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count. */ +/* */ +#define TLR_E_CANOPEN_MASTER_DATA_COUNT ((TLR_RESULT)0xC0420003L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_DATA_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data offset. */ +/* */ +#define TLR_E_CANOPEN_MASTER_DATA_OFFSET ((TLR_RESULT)0xC0420004L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_DATA_COUNT_WITH_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count in combination with offset. */ +/* */ +#define TLR_E_CANOPEN_MASTER_DATA_COUNT_WITH_OFFSET ((TLR_RESULT)0xC0420005L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid mode in command. */ +/* */ +#define TLR_E_CANOPEN_MASTER_MODE ((TLR_RESULT)0xC0420006L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed in current state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_STATE ((TLR_RESULT)0xC0420007L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NO_VALID_BUS_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* No valid bus configuration parameterized. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NO_VALID_BUS_PARAM ((TLR_RESULT)0xC0420008L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* A request is already running. */ +/* */ +#define TLR_E_CANOPEN_MASTER_REQUEST_RUNNING ((TLR_RESULT)0xC0420009L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_BUS_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed because CANopen is running. */ +/* */ +#define TLR_E_CANOPEN_MASTER_BUS_RUNNING ((TLR_RESULT)0xC042000AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_BUS_PARAM_ALREADY_SET */ +/* */ +/* MessageText: */ +/* */ +/* Bus parameters are already configured. */ +/* */ +#define TLR_E_CANOPEN_MASTER_BUS_PARAM_ALREADY_SET ((TLR_RESULT)0xC042000BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_LOCAL_NODE_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Node ID for CANopen Master. */ +/* */ +#define TLR_E_CANOPEN_MASTER_LOCAL_NODE_ID ((TLR_RESULT)0xC042000CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_BAUDRATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Baudrate. */ +/* */ +#define TLR_E_CANOPEN_MASTER_BAUDRATE ((TLR_RESULT)0xC042000DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_29BIT_SELECTOR */ +/* */ +/* MessageText: */ +/* */ +/* Invaiid parameter for 29 bit selector. */ +/* */ +#define TLR_E_CANOPEN_MASTER_29BIT_SELECTOR ((TLR_RESULT)0xC042000EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SYNC_TIMER_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invaiid parameter for SYNC timer. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SYNC_TIMER_VALUE ((TLR_RESULT)0xC042000FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_COB_ID_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* Invaiid parameter for COB-ID SYNC. */ +/* */ +#define TLR_E_CANOPEN_MASTER_COB_ID_SYNC ((TLR_RESULT)0xC0420010L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PROD_HEARTBEAT_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Invaiid parameter for Producer Heartbeat time. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PROD_HEARTBEAT_TIME ((TLR_RESULT)0xC0420011L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PACKET_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet sequence detected. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PACKET_SEQUENCE ((TLR_RESULT)0xC0420012L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_PARAM_SET_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of Node parameter set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_PARAM_SET_SIZE ((TLR_RESULT)0xC0420013L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_PARAM_HEADER_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of Node parameter header. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_PARAM_HEADER_SIZE ((TLR_RESULT)0xC0420014L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Node is already configured. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_ALREADY_CONFIGURED ((TLR_RESULT)0xC0420015L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SLAVE_NODE_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Node ID for Slave. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SLAVE_NODE_ID ((TLR_RESULT)0xC0420016L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_ID_EQUAL */ +/* */ +/* MessageText: */ +/* */ +/* Node ID of Slave is equal to Master Node ID. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_ID_EQUAL ((TLR_RESULT)0xC0420017L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PARAMETER_SET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Length of parameter set is different from length in parameter header. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PARAMETER_SET_LENGTH ((TLR_RESULT)0xC0420018L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SDO_PARAMETER_SET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of SDO parameter set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SDO_PARAMETER_SET_LENGTH ((TLR_RESULT)0xC0420019L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PDO_PARAMETER_SET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of PDO parameter set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PDO_PARAMETER_SET_LENGTH ((TLR_RESULT)0xC042001AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_ADDR_TABLE_SET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of address table. */ +/* */ +#define TLR_E_CANOPEN_MASTER_ADDR_TABLE_SET_LENGTH ((TLR_RESULT)0xC042001BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_ADDR_TABLE_LENGTH_INCONSISTENT */ +/* */ +/* MessageText: */ +/* */ +/* Address table size is inconsistent. */ +/* */ +#define TLR_E_CANOPEN_MASTER_ADDR_TABLE_LENGTH_INCONSISTENT ((TLR_RESULT)0xC042001CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_TPDO_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid number of transmitt PDOs. */ +/* */ +#define TLR_E_CANOPEN_MASTER_TPDO_CNT ((TLR_RESULT)0xC042001EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_RPDO_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid number of receive PDOs. */ +/* */ +#define TLR_E_CANOPEN_MASTER_RPDO_CNT ((TLR_RESULT)0xC042001FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_COB_ID_EMCY */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for COB-ID Emergency. */ +/* */ +#define TLR_E_CANOPEN_MASTER_COB_ID_EMCY ((TLR_RESULT)0xC0420020L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_COB_ID_GUARD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for COB-ID Guard. */ +/* */ +#define TLR_E_CANOPEN_MASTER_COB_ID_GUARD ((TLR_RESULT)0xC0420021L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MEMORY_ALLOCATION */ +/* */ +/* MessageText: */ +/* */ +/* No memory for parameter set. */ +/* */ +#define TLR_E_CANOPEN_MEMORY_ALLOCATION ((TLR_RESULT)0xC0420022L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SDO_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for SDO data count. */ +/* */ +#define TLR_E_CANOPEN_SDO_DATA_CNT ((TLR_RESULT)0xC0420023L) + +/* */ +/* MessageId: TLR_E_CANOPEN_PDO_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for PDO data count. */ +/* */ +#define TLR_E_CANOPEN_PDO_DATA_CNT ((TLR_RESULT)0xC0420024L) + +/* */ +/* MessageId: TLR_E_CANOPEN_ADDR_TAB_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for address table data count. */ +/* */ +#define TLR_E_CANOPEN_ADDR_TAB_DATA_CNT ((TLR_RESULT)0xC0420025L) + +/* */ +/* MessageId: TLR_E_CANOPEN_ADDR_TAB_PDO_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for address table PDO count. */ +/* */ +#define TLR_E_CANOPEN_ADDR_TAB_PDO_CNT ((TLR_RESULT)0xC0420026L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_SDO_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout during SDO transfer. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_SDO_TIMEOUT ((TLR_RESULT)0xC0420027L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_SDO_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during SDO transfer. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_SDO_ERROR ((TLR_RESULT)0xC0420028L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NO_PDO_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* No further PDO available. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NO_PDO_AVAILABLE ((TLR_RESULT)0xC0420029L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_AUTO_CLEAR_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Master is in auto clear state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_AUTO_CLEAR_ACTIVE ((TLR_RESULT)0xC042002AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_WATCHDOG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog failure detected. */ +/* */ +#define TLR_E_CANOPEN_MASTER_WATCHDOG_FAIL ((TLR_RESULT)0xC042002BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_INVALID_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid index for request. */ +/* */ +#define TLR_E_CANOPEN_MASTER_INVALID_INDEX ((TLR_RESULT)0xC042002CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Request not possible in current Node state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_STATE ((TLR_RESULT)0xC042002DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_NOT_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Node is not configuerd. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_NOT_CONFIGURED ((TLR_RESULT)0xC042002EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SDO_REQUEST_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* SDO request failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SDO_REQUEST_FAILED ((TLR_RESULT)0xC042002FL) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_ALREADY_IN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Master is already in requested state. */ +/* */ +#define TLR_I_CANOPEN_MASTER_ALREADY_IN_STATE ((TLR_RESULT)0x40420030L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_COB_ID_PDO */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for PDO COB-ID. */ +/* */ +#define TLR_E_CANOPEN_MASTER_COB_ID_PDO ((TLR_RESULT)0xC0420031L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SEND_EMCY */ +/* */ +/* MessageText: */ +/* */ +/* Send emergency-telegram failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SEND_EMCY ((TLR_RESULT)0xC0420032L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_INIT_SDO_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize SDO request. */ +/* */ +#define TLR_E_CANOPEN_MASTER_INIT_SDO_REQUEST ((TLR_RESULT)0xC0420033L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_NMT_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Set NMT state failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_NMT_STATE ((TLR_RESULT)0xC0420034L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_ERROR_PASSIVE */ +/* */ +/* MessageText: */ +/* */ +/* CANopen is in error-passive state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_ERROR_PASSIVE ((TLR_RESULT)0xC0420035L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_BUS_OFF */ +/* */ +/* MessageText: */ +/* */ +/* CANopen is in bus-off state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_BUS_OFF ((TLR_RESULT)0xC0420036L) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_NODE_DEACTIVATED */ +/* */ +/* MessageText: */ +/* */ +/* Node is deactivated in configuration. */ +/* */ +#define TLR_I_CANOPEN_MASTER_NODE_DEACTIVATED ((TLR_RESULT)0x40420037L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_DL_REQ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* CAN-DL request failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_DL_REQ_FAILED ((TLR_RESULT)0xC0420038L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_PUT_OBJECT_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Failed to write object data. */ +/* */ +#define TLR_E_CANOPEN_MASTER_PUT_OBJECT_DATA ((TLR_RESULT)0xC0420039L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_OBJECT_DATA_VALID */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set object data valid. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_OBJECT_DATA_VALID ((TLR_RESULT)0xC042003AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_INIT_LIB */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialite CANopen library. */ +/* */ +#define TLR_E_CANOPEN_MASTER_INIT_LIB ((TLR_RESULT)0xC042003BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_COB_ID_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* COB-ID could not be set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_COB_ID_FAILED ((TLR_RESULT)0xC042003CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_ADD_REMOTE_NODE_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Failed to add remote Node. */ +/* */ +#define TLR_E_CANOPEN_MASTER_ADD_REMOTE_NODE_REQUEST ((TLR_RESULT)0xC042003DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_HEARTBEAT_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Heartbeat time could not be set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_HEARTBEAT_TIME ((TLR_RESULT)0xC042003EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_ADD_GUARDING_SLAVE */ +/* */ +/* MessageText: */ +/* */ +/* Node could not be added to Node guarding list. */ +/* */ +#define TLR_E_CANOPEN_MASTER_ADD_GUARDING_SLAVE ((TLR_RESULT)0xC042003FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_GUARDING_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Node guard time could not be set. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_GUARDING_TIME ((TLR_RESULT)0xC0420040L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_START_NODE_GUARD */ +/* */ +/* MessageText: */ +/* */ +/* Node guarding could not be started. */ +/* */ +#define TLR_E_CANOPEN_MASTER_START_NODE_GUARD ((TLR_RESULT)0xC0420041L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_RESET_NODE */ +/* */ +/* MessageText: */ +/* */ +/* Reset Node failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_RESET_NODE ((TLR_RESULT)0xC0420042L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_RESET_COMMUNICATION */ +/* */ +/* MessageText: */ +/* */ +/* Failed to reset communication of Node. */ +/* */ +#define TLR_E_CANOPEN_MASTER_RESET_COMMUNICATION ((TLR_RESULT)0xC0420043L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_NODE_PREOPERATIONAL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set Node to preoperational state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_NODE_PREOPERATIONAL ((TLR_RESULT)0xC0420044L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_STOP_NODE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set Node to stop state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_STOP_NODE ((TLR_RESULT)0xC0420045L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_START_NODE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set Node to operational state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_START_NODE ((TLR_RESULT)0xC0420046L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_SET_EMCY_COB_ID */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set Emergency COB-ID. */ +/* */ +#define TLR_E_CANOPEN_MASTER_SET_EMCY_COB_ID ((TLR_RESULT)0xC0420047L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_START_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* Failed to start SYNC-telegram. */ +/* */ +#define TLR_E_CANOPEN_MASTER_START_SYNC ((TLR_RESULT)0xC0420048L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_STOP_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* Failed to stop SYNC-telegram. */ +/* */ +#define TLR_E_CANOPEN_MASTER_STOP_SYNC ((TLR_RESULT)0xC0420049L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_UNEXPECTED_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Node is not in expected state. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_UNEXPECTED_STATE ((TLR_RESULT)0xC042004AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_LOST_CONNECTION */ +/* */ +/* MessageText: */ +/* */ +/* Connection to Node lost. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_LOST_CONNECTION ((TLR_RESULT)0xC042004BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_GUARDING_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Node guarding error. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_GUARDING_ERROR ((TLR_RESULT)0xC042004CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_HEARTBEAT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Heartbeat error. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_HEARTBEAT_ERROR ((TLR_RESULT)0xC042004DL) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_NODE_HEARTBEAT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* Heartbeat supervision of Node started. */ +/* */ +#define TLR_I_CANOPEN_MASTER_NODE_HEARTBEAT_STARTED ((TLR_RESULT)0x4042004EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_UNEXPECTED_BOOTUP */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Bootup message from Node received. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_UNEXPECTED_BOOTUP ((TLR_RESULT)0xC042004FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_WRITE_PDO_REQ */ +/* */ +/* MessageText: */ +/* */ +/* Failed to transmit PDO. */ +/* */ +#define TLR_E_CANOPEN_MASTER_WRITE_PDO_REQ ((TLR_RESULT)0xC0420050L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_READ_PDO_REQ */ +/* */ +/* MessageText: */ +/* */ +/* Failed to request PDO. */ +/* */ +#define TLR_E_CANOPEN_MASTER_READ_PDO_REQ ((TLR_RESULT)0xC0420051L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_INIT_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of buffer failed. */ +/* */ +#define TLR_E_CANOPEN_MASTER_INIT_BUFFER ((TLR_RESULT)0xC0420052L) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_NODE_STATE_NOT_HANDLED */ +/* */ +/* MessageText: */ +/* */ +/* State of Node not handled. */ +/* */ +#define TLR_I_CANOPEN_MASTER_NODE_STATE_NOT_HANDLED ((TLR_RESULT)0x40420053L) + +/* */ +/* MessageId: TLR_E_CANOPEN_MASTER_NODE_DEVICE_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Node Device Type unequal to configured Device Type. */ +/* */ +#define TLR_E_CANOPEN_MASTER_NODE_DEVICE_TYPE ((TLR_RESULT)0xC0420054L) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_NODE_EMERGENCY_RECEIVED */ +/* */ +/* MessageText: */ +/* */ +/* Emergency message received from Node. */ +/* */ +#define TLR_I_CANOPEN_MASTER_NODE_EMERGENCY_RECEIVED ((TLR_RESULT)0x40420055L) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_INITIALIZE */ +/* */ +/* MessageText: */ +/* */ +/* Master is initializing. */ +/* */ +#define TLR_I_CANOPEN_MASTER_INITIALIZE ((TLR_RESULT)0x40420056L) + +/* */ +/* MessageId: TLR_I_CANOPEN_MASTER_NODE_BOOTUP */ +/* */ +/* MessageText: */ +/* */ +/* Bootup message from Node received. */ +/* */ +#define TLR_I_CANOPEN_MASTER_NODE_BOOTUP ((TLR_RESULT)0x40420057L) + + + + +#endif /* __CANOPEN_MASTER_ERROR_H */ + +#ifndef __CANOPEN_SLAVE_ERROR_H +#define __CANOPEN_SLAVE_ERROR_H + +/*****************************************************************************/ +/* CANopen Slave */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_COMMAND_INVALID ((TLR_RESULT)0xC0430001L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length in packet. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_PACKET_LENGTH ((TLR_RESULT)0xC0430002L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_DATA_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_DATA_COUNT ((TLR_RESULT)0xC0430003L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_DATA_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data offset. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_DATA_OFFSET ((TLR_RESULT)0xC0430004L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_DATA_COUNT_WITH_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count in combination with offset. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_DATA_COUNT_WITH_OFFSET ((TLR_RESULT)0xC0430005L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid mode in command. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_MODE ((TLR_RESULT)0xC0430006L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed in current state. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_STATE ((TLR_RESULT)0xC0430007L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* A request is already running. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_REQUEST_RUNNING ((TLR_RESULT)0xC0430008L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_BUS_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed because CANopen is running. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_BUS_RUNNING ((TLR_RESULT)0xC0430009L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_BUS_PARAM_ALREADY_SET */ +/* */ +/* MessageText: */ +/* */ +/* Bus parameters are already configured. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_BUS_PARAM_ALREADY_SET ((TLR_RESULT)0xC043000AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_LOCAL_NODE_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Node ID for CANopen Slave. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_LOCAL_NODE_ID ((TLR_RESULT)0xC043000BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_BAUDRATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Baudrate. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_BAUDRATE ((TLR_RESULT)0xC043000CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_29BIT_SELECTOR */ +/* */ +/* MessageText: */ +/* */ +/* Invaiid parameter for 29 bit selector. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_29BIT_SELECTOR ((TLR_RESULT)0xC043000DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_WATCHDOG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog failure detected. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_WATCHDOG_FAIL ((TLR_RESULT)0xC043000EL) + +/* */ +/* MessageId: TLR_I_CANOPEN_SLAVE_ALREADY_IN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Slave is already in requested state. */ +/* */ +#define TLR_I_CANOPEN_SLAVE_ALREADY_IN_STATE ((TLR_RESULT)0x4043000FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_SEND_EMCY */ +/* */ +/* MessageText: */ +/* */ +/* Send emergency-telegram failed. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_SEND_EMCY ((TLR_RESULT)0xC0430010L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INIT_LIB */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize CANopen library. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INIT_LIB ((TLR_RESULT)0xC0430011L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_ERROR_PASSIVE */ +/* */ +/* MessageText: */ +/* */ +/* CANopen is in error-passive state. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_ERROR_PASSIVE ((TLR_RESULT)0xC0430012L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_BUS_OFF */ +/* */ +/* MessageText: */ +/* */ +/* CANopen is in bus-off state. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_BUS_OFF ((TLR_RESULT)0xC0430013L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_PUT_OBJECT_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Failed to write object data. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_PUT_OBJECT_DATA ((TLR_RESULT)0xC0430014L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_SET_OBJECT_DATA_VALID */ +/* */ +/* MessageText: */ +/* */ +/* Language = English */ +/* Failed to set object data valid. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_SET_OBJECT_DATA_VALID ((TLR_RESULT)0xC0430015L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_GET_OBJECT_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get object data. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_GET_OBJECT_DATA ((TLR_RESULT)0xC0430016L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_WRITE_PDO_REQ */ +/* */ +/* MessageText: */ +/* */ +/* Failed to transmit PDO. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_WRITE_PDO_REQ ((TLR_RESULT)0xC0430017L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_GUARD_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Guard error detected. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_GUARD_ERROR ((TLR_RESULT)0xC0430018L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INIT_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of buffer failed. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INIT_BUFFER ((TLR_RESULT)0xC0430019L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_DL_REQ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* CAN-DL request failed. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_DL_REQ_FAILED ((TLR_RESULT)0xC043001AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid object index. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_INDEX ((TLR_RESULT)0xC043001BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_SUB_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid object index. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_SUB_INDEX ((TLR_RESULT)0xC043001CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_MAP_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid mapping length. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_MAP_LENGTH ((TLR_RESULT)0xC043001DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_PDO_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid transmission mode for PDO. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_PDO_MODE ((TLR_RESULT)0xC043001EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_PDO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length for PDO. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_PDO_LENGTH ((TLR_RESULT)0xC043001FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_NO_WRITE_PERM */ +/* */ +/* MessageText: */ +/* */ +/* No write permission for object. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_NO_WRITE_PERM ((TLR_RESULT)0xC0430020L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_NO_READ_PERM */ +/* */ +/* MessageText: */ +/* */ +/* No read permission for object. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_NO_READ_PERM ((TLR_RESULT)0xC0430021L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_VALUE_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Value for object too low. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_VALUE_TOO_LOW ((TLR_RESULT)0xC0430022L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_VALUE_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Value for object too high. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_VALUE_TOO_HIGH ((TLR_RESULT)0xC0430023L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for object. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_PARAMETER ((TLR_RESULT)0xC0430024L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INVALID_PDO_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDO state. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INVALID_PDO_STATE ((TLR_RESULT)0xC0430025L) + +/* */ +/* MessageId: TLR_I_CANOPEN_SLAVE_INITIALIZE */ +/* */ +/* MessageText: */ +/* */ +/* Slave is initializing. */ +/* */ +#define TLR_I_CANOPEN_SLAVE_INITIALIZE ((TLR_RESULT)0x40430026L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_OBJECT_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size for object. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_OBJECT_SIZE ((TLR_RESULT)0xC0430027L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_ID_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Idendtifier already in use. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_ID_IN_USE ((TLR_RESULT)0xC0430028L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_INHIBIT */ +/* */ +/* MessageText: */ +/* */ +/* Service is inhibited. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_INHIBIT ((TLR_RESULT)0xC0430029L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_TX_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Transmit overrun. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_TX_OVERRUN ((TLR_RESULT)0xC043002AL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_RX_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Receive overrun. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_RX_OVERRUN ((TLR_RESULT)0xC043002BL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_ERROR_WARNING */ +/* */ +/* MessageText: */ +/* */ +/* CANopen is in error-warning state. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_ERROR_WARNING ((TLR_RESULT)0xC043002CL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_RECV_PDO_REQ */ +/* */ +/* MessageText: */ +/* */ +/* Request receive PDO failed. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_RECV_PDO_REQ ((TLR_RESULT)0xC043002DL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_NUM_OF_RX_PDO_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of receive PDO. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_NUM_OF_RX_PDO_PARAMETER ((TLR_RESULT)0xC043002EL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_NUM_OF_TX_PDO_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of send PDO. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_NUM_OF_TX_PDO_PARAMETER ((TLR_RESULT)0xC043002FL) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_HB_CONSUMER_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of heartbeat consumer. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_HB_CONSUMER_PARAMETER ((TLR_RESULT)0xC0430030L) + +/* */ +/* MessageId: TLR_E_CANOPEN_SLAVE_SEND_TIME_STAMP */ +/* */ +/* MessageText: */ +/* */ +/* Failed to send timestamp message. */ +/* */ +#define TLR_E_CANOPEN_SLAVE_SEND_TIME_STAMP ((TLR_RESULT)0xC0430031L) + + + + +#endif /* __CANOPEN_SLAVE_ERROR_H */ + +#ifndef __CCLINK_APS_ERROR_H +#define __CCLINK_APS_ERROR_H + +/*****************************************************************************/ +/* CC-Link Slave Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CCLINK_APS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CCLINK_APS_COMMAND_INVALID ((TLR_RESULT)0xC06B0001L) + +/* */ +/* MessageId: TLR_I_CCLINK_APS_OPEN_DBM_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open configuration database. */ +/* */ +#define TLR_I_CCLINK_APS_OPEN_DBM_FILE ((TLR_RESULT)0x406B0002L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_DATASET */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open configuration dataset. */ +/* */ +#define TLR_E_CCLINK_APS_DATASET ((TLR_RESULT)0xC06B0003L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_TABLE_GLOBAL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open GLOBAL configuration dataset. */ +/* */ +#define TLR_E_CCLINK_APS_TABLE_GLOBAL ((TLR_RESULT)0xC06B0004L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_TABLE_CCLS_INI */ +/* */ +/* MessageText: */ +/* */ +/* Failed to open CCLS_INI configuration dataset. */ +/* */ +#define TLR_E_CCLINK_APS_TABLE_CCLS_INI ((TLR_RESULT)0xC06B0005L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_WATCHDOG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for watchdog supervision. */ +/* */ +#define TLR_E_CCLINK_APS_WATCHDOG_PARAMETER ((TLR_RESULT)0xC06B0006L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_SIZE_TABLE_CCLS_INI */ +/* */ +/* MessageText: */ +/* */ +/* Invalid size of CCLS_INI configuration dataset. */ +/* */ +#define TLR_E_CCLINK_APS_SIZE_TABLE_CCLS_INI ((TLR_RESULT)0xC06B0007L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_CCLINK_APS_PACKET_LENGTH ((TLR_RESULT)0xC06B0008L) + +/* */ +/* MessageId: TLR_I_CCLINK_APS_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is locked. */ +/* */ +#define TLR_I_CCLINK_APS_CONFIG_LOCK ((TLR_RESULT)0x406B0009L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_DATABASE_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Configuration database found. */ +/* */ +#define TLR_E_CCLINK_APS_DATABASE_FOUND ((TLR_RESULT)0xC06B000AL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_SLAVE_STATION_ADDR_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for slave station address. */ +/* */ +#define TLR_E_CCLINK_APS_SLAVE_STATION_ADDR_PARAMETER ((TLR_RESULT)0xC06B000BL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_BAUDRATE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for baudrate. */ +/* */ +#define TLR_E_CCLINK_APS_BAUDRATE_PARAMETER ((TLR_RESULT)0xC06B000CL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_NO_STATION_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of stations. */ +/* */ +#define TLR_E_CCLINK_APS_NO_STATION_PARAMETER ((TLR_RESULT)0xC06B000DL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_MODE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for mode. */ +/* */ +#define TLR_E_CCLINK_APS_MODE_PARAMETER ((TLR_RESULT)0xC06B000EL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_VENDOR_CODE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for vendor code. */ +/* */ +#define TLR_E_CCLINK_APS_VENDOR_CODE_PARAMETER ((TLR_RESULT)0xC06B000FL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_MODEL_CODE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for model code. */ +/* */ +#define TLR_E_CCLINK_APS_MODEL_CODE_PARAMETER ((TLR_RESULT)0xC06B0010L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_SW_VERSION_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for software version. */ +/* */ +#define TLR_E_CCLINK_APS_SW_VERSION_PARAMETER ((TLR_RESULT)0xC06B0011L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_MODEL_TYPE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for model type. */ +/* */ +#define TLR_E_CCLINK_APS_MODEL_TYPE_PARAMETER ((TLR_RESULT)0xC06B0012L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_IO_MODE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for IO mode. */ +/* */ +#define TLR_E_CCLINK_APS_IO_MODE_PARAMETER ((TLR_RESULT)0xC06B0013L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Request already running. */ +/* */ +#define TLR_E_CCLINK_APS_REQUEST_RUNNING ((TLR_RESULT)0xC06B0014L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_INVALD_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Request not allowed in current state. */ +/* */ +#define TLR_E_CCLINK_APS_INVALD_STATE ((TLR_RESULT)0xC06B0015L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for cycletime. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_CYCLETIME ((TLR_RESULT)0xC06B0016L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_CHN_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for DPM instance. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_CHN_INSTANCE ((TLR_RESULT)0xC06B0017L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_SET_SWITCH_CHANGE_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Change switch state not allowed. */ +/* */ +#define TLR_E_CCLINK_APS_SET_SWITCH_CHANGE_NOT_ALLOWED ((TLR_RESULT)0xC06B0018L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_CCLINK_VERSION_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for CC-Link version. */ +/* */ +#define TLR_E_CCLINK_APS_CCLINK_VERSION_PARAMETER ((TLR_RESULT)0xC06B0019L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_STATION_TYPE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station type. */ +/* */ +#define TLR_E_CCLINK_APS_STATION_TYPE_PARAMETER ((TLR_RESULT)0xC06B001AL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_STATION_ADDR_WITH_NO_STATIONS_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station address in combination with number of stations. */ +/* */ +#define TLR_E_CCLINK_APS_STATION_ADDR_WITH_NO_STATIONS_PARAMETER ((TLR_RESULT)0xC06B001BL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_EXTENSION_CYCLE_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter extension cycle. */ +/* */ +#define TLR_E_CCLINK_APS_EXTENSION_CYCLE_PARAMETER ((TLR_RESULT)0xC06B001CL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_STATION_TYPE_WITH_CCLINK_VERSION_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station type in combination with CC-Link version. */ +/* */ +#define TLR_E_CCLINK_APS_STATION_TYPE_WITH_CCLINK_VERSION_PARAMETER ((TLR_RESULT)0xC06B001DL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_QUEUE_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of queue elements. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_QUEUE_ELEMENT ((TLR_RESULT)0xC06B001EL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_POOL_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of pool elements. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_POOL_ELEMENT ((TLR_RESULT)0xC06B001FL) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_SWITCH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for switch parameter. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_SWITCH ((TLR_RESULT)0xC06B0020L) + +/* */ +/* MessageId: TLR_E_CCLINK_APS_PARAM_IO_TYPES_POINTS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of I/O types and I/O points. */ +/* */ +#define TLR_E_CCLINK_APS_PARAM_IO_TYPES_POINTS ((TLR_RESULT)0xC06B0021L) + + + + +#endif /* __CCLINK_APS_ERROR_H */ + +#ifndef __CCLINK_SLAVE_ERROR_H +#define __CCLINK_SLAVE_ERROR_H + +/*****************************************************************************/ +/* CC-Link Slave */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_CCLINK_SLAVE_COMMAND_INVALID ((TLR_RESULT)0xC06A0001L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_WATCHDOG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog failure detected. */ +/* */ +#define TLR_E_CCLINK_SLAVE_WATCHDOG_FAIL ((TLR_RESULT)0xC06A0002L) + +/* */ +/* MessageId: TLR_I_CCLINK_SLAVE_ALREADY_IN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Slave is already in requested state. */ +/* */ +#define TLR_I_CCLINK_SLAVE_ALREADY_IN_STATE ((TLR_RESULT)0x406A0003L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length in packet. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PACKET_LENGTH ((TLR_RESULT)0xC06A0004L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_DATA_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data count. */ +/* */ +#define TLR_E_CCLINK_SLAVE_DATA_COUNT ((TLR_RESULT)0xC06A0005L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_DATA_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data offset. */ +/* */ +#define TLR_E_CCLINK_SLAVE_DATA_OFFSET ((TLR_RESULT)0xC06A0006L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_INIT_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of buffer failed. */ +/* */ +#define TLR_E_CCLINK_SLAVE_INIT_BUFFER ((TLR_RESULT)0xC06A0007L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_INVALID_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed in current state. */ +/* */ +#define TLR_E_CCLINK_SLAVE_INVALID_STATE ((TLR_RESULT)0xC06A0008L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid mode in command. */ +/* */ +#define TLR_E_CCLINK_SLAVE_MODE ((TLR_RESULT)0xC06A0009L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_BAUDRATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Baudrate. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_BAUDRATE ((TLR_RESULT)0xC06A000AL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_STATION_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid station address for CC-Link Slave. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_STATION_ADDR ((TLR_RESULT)0xC06A000BL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_NO_STATIONS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of stations. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_NO_STATIONS ((TLR_RESULT)0xC06A000CL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_VENDOR_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for vendor code. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_VENDOR_CODE ((TLR_RESULT)0xC06A000DL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_MODEL_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for model code. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_MODEL_CODE ((TLR_RESULT)0xC06A000EL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_SW_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for software version. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_SW_VERSION ((TLR_RESULT)0xC06A000FL) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_MODEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for model type. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_MODEL_TYPE ((TLR_RESULT)0xC06A0010L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_STATION_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station type. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_STATION_TYPE ((TLR_RESULT)0xC06A0011L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for cycle time. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_CYCLETIME ((TLR_RESULT)0xC06A0012L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_XC_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for XC-Instance. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_XC_INSTANCE ((TLR_RESULT)0xC06A0013L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_STATION_ADDR_WITH_NO_STATIONS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station address in combination with number of stations. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_STATION_ADDR_WITH_NO_STATIONS ((TLR_RESULT)0xC06A0014L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_CCLINK_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for CC-Link version. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_CCLINK_VERSION ((TLR_RESULT)0xC06A0015L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_EXTENSION_CYCLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for extension cycle. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_EXTENSION_CYCLE ((TLR_RESULT)0xC06A0016L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_STATION_TYPE_WITH_CCLINK_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for station type in combination with CC-Link version. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_STATION_TYPE_WITH_CCLINK_VERSION ((TLR_RESULT)0xC06A0017L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_QUEUE_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of queue elements. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_QUEUE_ELEMENT ((TLR_RESULT)0xC06A0018L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_POOL_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of pool elements. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_POOL_ELEMENT ((TLR_RESULT)0xC06A0019L) + +/* */ +/* MessageId: TLR_E_CCLINK_SLAVE_PARAM_IO_TYPES_POINTS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for number of I/O types and I/O points. */ +/* */ +#define TLR_E_CCLINK_SLAVE_PARAM_IO_TYPES_POINTS ((TLR_RESULT)0xC06A001AL) + + + + +#endif /* __CCLINK_SLAVE_ERROR_H */ + +#ifndef __COMPONET_SLAVE_ERROR_H +#define __COMPONET_SLAVE_ERROR_H + +/*****************************************************************************/ +/* COMPONET SLAVE ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_COMPONET_SLAVE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_COMPONET_SLAVE_COMMAND_INVALID ((TLR_RESULT)0xC07C0001L) + +/* */ +/* MessageId: TLR_E_CPS_INIT_TRI_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Triple Buffer Initialization Failed. */ +/* */ +#define TLR_E_CPS_INIT_TRI_BUFFER ((TLR_RESULT)0xC07C0002L) + +/* */ +/* MessageId: TLR_E_CPS_DIAG_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown Diagnostic Type. */ +/* */ +#define TLR_E_CPS_DIAG_TYPE ((TLR_RESULT)0xC07C0003L) + +/* */ +/* MessageId: TLR_E_CPS_DATA_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Data Size. */ +/* */ +#define TLR_E_CPS_DATA_LEN_INVALID ((TLR_RESULT)0xC07C0004L) + +/* */ +/* MessageId: TLR_E_CPS_WATCHDOG_INVALID_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Watchdog Value. */ +/* */ +#define TLR_E_CPS_WATCHDOG_INVALID_VALUE ((TLR_RESULT)0xC07C0005L) + +/* */ +/* MessageId: TLR_E_CPS_COMM_LOST */ +/* */ +/* MessageText: */ +/* */ +/* Communication Lost. */ +/* */ +#define TLR_E_CPS_COMM_LOST ((TLR_RESULT)0xC07C0006L) + +/* */ +/* MessageId: TLR_E_CPS_SLAVE_DUPLICATE_MAC_ID */ +/* */ +/* MessageText: */ +/* */ +/* Duplicate MAC ID Detected. */ +/* */ +#define TLR_E_CPS_SLAVE_DUPLICATE_MAC_ID ((TLR_RESULT)0xC07C0007L) + +/* */ +/* MessageId: TLR_E_CPS_IRQ_ENABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Enable CPS Interrupt Failed. */ +/* */ +#define TLR_E_CPS_IRQ_ENABLE_ERROR ((TLR_RESULT)0xC07C0008L) + +/* */ +/* MessageId: TLR_E_CPS_IRQ_DISABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Enable CPS Interrupt Failed. */ +/* */ +#define TLR_E_CPS_IRQ_DISABLE_ERROR ((TLR_RESULT)0xC07C0009L) + +/* */ +/* MessageId: TLR_E_CPS_UNKNOWN_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Unknown Parameter Received. */ +/* */ +#define TLR_E_CPS_UNKNOWN_PARAMETER ((TLR_RESULT)0xC07C000AL) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Wrong XC Channel Selected. */ +/* */ +#define TLR_E_CPS_WRONG_CHANNEL ((TLR_RESULT)0xC07C000BL) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_EVENT_LEN */ +/* */ +/* MessageText: */ +/* */ +/* CompoNet Frame Invalid Data. */ +/* */ +#define TLR_E_CPS_WRONG_EVENT_LEN ((TLR_RESULT)0xC07C000CL) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_DEST_MAC_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Slave MAC ID. */ +/* */ +#define TLR_E_CPS_WRONG_DEST_MAC_ID ((TLR_RESULT)0xC07C000DL) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_EVENT_CMD_ID */ +/* */ +/* MessageText: */ +/* */ +/* CompoNet Frame Invalid Commnad. */ +/* */ +#define TLR_E_CPS_WRONG_EVENT_CMD_ID ((TLR_RESULT)0xC07C000EL) + +/* */ +/* MessageId: TLR_E_CPS_EVENT_NOT_RECEIVED */ +/* */ +/* MessageText: */ +/* */ +/* CompoNet Frame Not Received. */ +/* */ +#define TLR_E_CPS_EVENT_NOT_RECEIVED ((TLR_RESULT)0xC07C000FL) + +/* */ +/* MessageId: TLR_E_CPS_DEVICE_NOT_ONLINE */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not Allocated. */ +/* */ +#define TLR_E_CPS_DEVICE_NOT_ONLINE ((TLR_RESULT)0xC07C0010L) + +/* */ +/* MessageId: TLR_E_CPS_GENERAL_HAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* General HAL Erorr. */ +/* */ +#define TLR_E_CPS_GENERAL_HAL_ERROR ((TLR_RESULT)0xC07C0011L) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_BAUD_RATE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong Baud Rate. */ +/* */ +#define TLR_E_CPS_WRONG_BAUD_RATE ((TLR_RESULT)0xC07C0012L) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_NODE_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong Node Type. */ +/* */ +#define TLR_E_CPS_WRONG_NODE_TYPE ((TLR_RESULT)0xC07C0013L) + +/* */ +/* MessageId: TLR_E_CPS_WRONG_IO_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong I/O Mode. */ +/* */ +#define TLR_E_CPS_WRONG_IO_MODE ((TLR_RESULT)0xC07C0014L) + +/* */ +/* MessageId: TLR_E_CPS_CLASS_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* CIP Class Already Registred. */ +/* */ +#define TLR_E_CPS_CLASS_ALREADY_REGISTERED ((TLR_RESULT)0xC07C0015L) + +/* */ +/* MessageId: TLR_E_CPS_MAX_CLASS_NUMB_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum Number of CIP Class Registred. */ +/* */ +#define TLR_E_CPS_MAX_CLASS_NUMB_REACHED ((TLR_RESULT)0xC07C0016L) + +/* */ +/* MessageId: TLR_E_CPS_CLASS_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Requested CIP Class Dosn't Exist. */ +/* */ +#define TLR_E_CPS_CLASS_DOES_NOT_EXIST ((TLR_RESULT)0xC07C0017L) + + + + +#endif /* __COMPONET_SLAVE_ERROR_H */ + +#ifndef __COMPONET_SLAVE_APS_ERROR_H +#define __COMPONET_SLAVE_APS_ERROR_H + +/*****************************************************************************/ +/* COMPONET SLAVE APS ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_COMPONET_SLAVE_APS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_COMPONET_SLAVE_APS_COMMAND_INVALID ((TLR_RESULT)0xC07D0001L) + + + + +#endif /* __COMPONET_SLAVE_APS_ERROR_H */ + +#ifndef __DDL_DDL_ERROR_H +#define __DDL_DDL_ERROR_H + +/*****************************************************************************/ +/* DDL Task Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DDL_DDL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DDL_DDL_COMMAND_INVALID ((TLR_RESULT)0xC0410001L) + + + + +#endif /* __DDL_DDL_ERROR_H */ + +#ifndef __DDL_ENPDDL_ERROR_H +#define __DDL_ENPDDL_ERROR_H + +/*****************************************************************************/ +/* ENPDDL Task Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DDL_ENPDDL_COMMAND_INVALID ((TLR_RESULT)0xC0400001L) + +/* //////// DDL errors: 0x0020 ... 0x003F ////////// */ +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_ADDRESS_MISMATCH_GAP */ +/* */ +/* MessageText: */ +/* */ +/* A DDL address error was detected (ADDRESS_MISMATCH or ADDRESS_GAP). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_ADDRESS_MISMATCH_GAP ((TLR_RESULT)0xC0400020L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_WRONG_DATALENGTH */ +/* */ +/* MessageText: */ +/* */ +/* A DDL data length error was detected (WRONG_DATALENGTH). The given output data length from Ethernet master */ +/* is unequal to the detected output data length of all DDL slaves. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_WRONG_DATALENGTH ((TLR_RESULT)0xC0400021L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_PARAMETER_REPEAT */ +/* */ +/* MessageText: */ +/* */ +/* An error has occured by sending DDL parameter. The parameter sending is repeated. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_PARAMETER_REPEAT ((TLR_RESULT)0xC0400022L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_CAN_DL_SEND */ +/* */ +/* MessageText: */ +/* */ +/* An error has occured by sending CAN_DL frame(s). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_CAN_DL_SEND ((TLR_RESULT)0xC0400023L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL type is out of the valid range (4 ... 8). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_TYPE ((TLR_RESULT)0xC0400024L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_ADR */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL address is out of the valid range (> 14). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_ADR ((TLR_RESULT)0xC0400025L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_ADR_AUTO */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL address is unequal to zero by automatic addressing. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_ADR_AUTO ((TLR_RESULT)0xC0400026L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_ADR_MANUAL */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL address is zero by manual addressing. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_ADR_MANUAL ((TLR_RESULT)0xC0400027L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_FT */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL frame type is unequal to "Parameter, Inputdaten" while DDL initialization. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_FT ((TLR_RESULT)0xC0400028L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_FRAME_LEN */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL frame length of config telegram is unequal to 8 (DDL initialization). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_FRAME_LEN ((TLR_RESULT)0xC0400029L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_ADR_INCONSISTENT */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL address in config telegram is unequal to the DDL address in the CAN-ID (DDL initialization). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_ADR_INCONSISTENT ((TLR_RESULT)0xC040002AL) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_TYPE_INCONSISTENT */ +/* */ +/* MessageText: */ +/* */ +/* The received DDL type in config telegram is unequal to the DDL type in the CAN-ID (DDL initialization). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_TYPE_INCONSISTENT ((TLR_RESULT)0xC040002BL) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_DATA_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Min. one of the received DDL data lengths in config telegram are to big (> 16) (DDL initialization). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_DATA_LENGTH ((TLR_RESULT)0xC040002CL) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_RESERVEDS */ +/* */ +/* MessageText: */ +/* */ +/* Min. one of the received reserved values in config telegram are unequal to zero (DDL initialization). */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_MASTER_INIT_RESERVEDS ((TLR_RESULT)0xC040002DL) + +/* //////// MID_CDG_PUT_CODE_DIAG() source code diagnostics: ////////// */ +/* //////// - Infos MID_CDG_LVL_INFO : 0x0100 ... 0x01FF ////////// */ +/* //////// - Warnings MID_CDG_LVL_WARNING : 0x0200 ... 0x02FF ////////// */ +/* //////// - Errors MID_CDG_LVL_ERROR : 0x0300 ... 0x03FF ////////// */ +/* //////// - Fatal errors MID_CDG_LVL_FATAL : 0x0400 ... 0x04FF ////////// */ +/* //////// Remark: Use always the Severity Error ////////// */ +/* //////// MID_CDG_PUT_CODE_DIAG() Infos : 0x0100 ... 0x01FF ////////// */ +/* //////// MID_CDG_PUT_CODE_DIAG() Warnings : 0x0200 ... 0x02FF ////////// */ +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_MID_CDG_CAN_DL_CNF */ +/* */ +/* MessageText: */ +/* */ +/* The CAN_DL task send confirmation is not yet received. The DDL state machine (DSM) waits any longer for */ +/* the send confirmation (Repeating with the corresponding timeout). ulUserParam is the actual DSM state. */ +/* */ +#define TLR_E_DDL_ENPDDL_MID_CDG_CAN_DL_CNF ((TLR_RESULT)0xC0400200L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_MID_CDG_UNKNOWN_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* The DDL state machine (DSM) has received an unknown and unexpected packet respectively. The packet will be */ +/* discarded. ulUserParam is the packet command ulCmd. */ +/* */ +#define TLR_E_DDL_ENPDDL_MID_CDG_UNKNOWN_PACKET ((TLR_RESULT)0xC0400201L) + +/* //////// MID_CDG_PUT_CODE_DIAG() Errors : 0x0300 ... 0x03FF ////////// */ +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_DDL_UNKNOWN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown DSM (DDL State machine) state. ulUserParam is the unknown DSM state. */ +/* */ +#define TLR_E_DDL_ENPDDL_DDL_UNKNOWN_STATE ((TLR_RESULT)0xC0400300L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_ECAT_READ_SYNC_MAN_NULL_PTR */ +/* */ +/* MessageText: */ +/* */ +/* The function EcatHal_ReadSyncMan() has delivered a NULL pointer. ulUserParam is the sync manager handle. */ +/* */ +#define TLR_E_DDL_ENPDDL_ECAT_READ_SYNC_MAN_NULL_PTR ((TLR_RESULT)0xC0400301L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_ECAT_WRITE_SYNC_MAN_NULL_PTR */ +/* */ +/* MessageText: */ +/* */ +/* The function EcatHal_WriteSyncMan() has delivered a NULL pointer. ulUserParam is the sync manager handle. */ +/* */ +#define TLR_E_DDL_ENPDDL_ECAT_WRITE_SYNC_MAN_NULL_PTR ((TLR_RESULT)0xC0400302L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_CAN_DL_CMD_DATA_IND_LEN */ +/* */ +/* MessageText: */ +/* */ +/* The CAN_DL_CMD_DATA_IND packet length ulLen is zero or not a multiple of the CAN frame size. */ +/* ulUserParam is the length ulLen. */ +/* */ +#define TLR_E_DDL_ENPDDL_CAN_DL_CMD_DATA_IND_LEN ((TLR_RESULT)0xC0400303L) + +/* //////// MID_CDG_PUT_CODE_DIAG() Fatal errors: 0x0400 ... 0x04FF ////////// */ +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_MID_CDG_PACKET_NULL_PTR */ +/* */ +/* MessageText: */ +/* */ +/* The DDL state machine (DSM) has received a NULL pointer packet. The system will be stopped. */ +/* ulUserParam is the actual DSM state. */ +/* */ +#define TLR_E_DDL_ENPDDL_MID_CDG_PACKET_NULL_PTR ((TLR_RESULT)0xC0400400L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_MID_CDG_TLR_POOL_PACKET_GET */ +/* */ +/* MessageText: */ +/* */ +/* A TLR_POOL_PACKET_GET() error has occured. The system will be stopped. */ +/* ulUserParam is the error code. */ +/* */ +#define TLR_E_DDL_ENPDDL_MID_CDG_TLR_POOL_PACKET_GET ((TLR_RESULT)0xC0400401L) + +/* */ +/* MessageId: TLR_E_DDL_ENPDDL_MID_CDG_TLR_QUE_SENDPACKET_FIFO */ +/* */ +/* MessageText: */ +/* */ +/* A TLR_QUE_SENDPACKET_FIFO() error has occured. The system will be stopped. */ +/* ulUserParam is the error code. */ +/* */ +#define TLR_E_DDL_ENPDDL_MID_CDG_TLR_QUE_SENDPACKET_FIFO ((TLR_RESULT)0xC0400402L) + + + + +#endif /* __DDL_ENPDDL_ERROR_H */ + +#ifndef __DEVNET_AP_ERROR_H +#define __DEVNET_AP_ERROR_H + +/*****************************************************************************/ +/* DeviceNet AP Task (Standard Dualport Application Task). */ +/*****************************************************************************/ +/*****************************************************************************/ +/* Error General: Codes 0x01 - 0xFF. */ +/* */ +/* MessageId: TLR_E_DEVNET_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DEVNET_AP_COMMAND_INVALID ((TLR_RESULT)0xC05B0001L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_SERVICE_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Service not supported. */ +/* */ +#define TLR_E_DEVNET_AP_SERVICE_NOT_SUPPORTED ((TLR_RESULT)0xC05B0002L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_NO_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* No data base found. */ +/* */ +#define TLR_E_DEVNET_AP_NO_DATA_BASE ((TLR_RESULT)0xC05B0010L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_ERR_OPEN_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* Error while opening data base. */ +/* */ +#define TLR_E_DEVNET_AP_ERR_OPEN_DATA_BASE ((TLR_RESULT)0xC05B0011L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_ERR_READ_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* Error while reading data base. */ +/* */ +#define TLR_E_DEVNET_AP_ERR_READ_DATA_BASE ((TLR_RESULT)0xC05B0012L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_TABLE_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Table not fond in data base. */ +/* */ +#define TLR_E_DEVNET_AP_TABLE_NOT_FOUND ((TLR_RESULT)0xC05B0013L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_INVALID_DNM_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* No valid DeviceNet data base. */ +/* */ +#define TLR_E_DEVNET_AP_INVALID_DNM_DATA_BASE ((TLR_RESULT)0xC05B0014L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_NON_EXCHANGE_SLAVE */ +/* */ +/* MessageText: */ +/* */ +/* No data exchange with at least one slave. */ +/* */ +#define TLR_E_DEVNET_AP_NON_EXCHANGE_SLAVE ((TLR_RESULT)0xC05B0100L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_NON_EXCHANGE_ALL */ +/* */ +/* MessageText: */ +/* */ +/* No slave in data exchange. */ +/* */ +#define TLR_E_DEVNET_AP_NON_EXCHANGE_ALL ((TLR_RESULT)0xC05B0101L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_ILLEGAL_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Illegal packete length. */ +/* */ +#define TLR_E_DEVNET_AP_ILLEGAL_PACKET_LENGTH ((TLR_RESULT)0xC05B0110L) + +/* */ +/* MessageId: TLR_E_DEVNET_AP_WRONG_WD_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong watchdog. */ +/* */ +#define TLR_E_DEVNET_AP_WRONG_WD_VALUE ((TLR_RESULT)0xC05B0111L) + + + + +#endif /* __DEVNET_AP_ERROR_H */ + +#ifndef __DEVNET_FAL_ERROR_H +#define __DEVNET_FAL_ERROR_H + +/*****************************************************************************/ +/* DeviceNet FAL Task (Fieldbus Application Layer). */ +/*****************************************************************************/ +/*****************************************************************************/ +/* Error General: Codes 0x01 - 0x0F. */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DEVNET_FAL_COMMAND_INVALID ((TLR_RESULT)0xC0470001L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_SERVICE_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Service not supported. */ +/* */ +#define TLR_E_DEVNET_FAL_SERVICE_NOT_SUPPORTED ((TLR_RESULT)0xC0470002L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_RESET_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Reset is in request. */ +/* */ +#define TLR_E_DEVNET_FAL_RESET_IN_REQUEST ((TLR_RESULT)0xC0470003L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_UNRECOVER_RESET_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Unrecoverable reset fault. */ +/* */ +#define TLR_E_DEVNET_FAL_UNRECOVER_RESET_FAULT ((TLR_RESULT)0xC0470004L) + +/*****************************************************************************/ +/* Error Command: SetModeReq 0x10 - 0x1F. */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_SET_MODE_INVALID_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for 'mode' of command. */ +/* */ +#define TLR_E_DEVNET_FAL_SET_MODE_INVALID_MODE ((TLR_RESULT)0xC0470010L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_SET_MODE_ALREADY_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Command already in request. */ +/* */ +#define TLR_E_DEVNET_FAL_SET_MODE_ALREADY_IN_REQUEST ((TLR_RESULT)0xC0470011L) + +/*****************************************************************************/ +/* Error Command: ClearConfigReq 0x20 - 0x2F. */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CLR_CONFIG_NOT_ALLOWED_IN_ACTUAL_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Not allowed to clear configuration in actual mode. */ +/* */ +#define TLR_E_DEVNET_FAL_CLR_CONFIG_NOT_ALLOWED_IN_ACTUAL_STATE ((TLR_RESULT)0xC0470020L) + +/*****************************************************************************/ +/* Error Command: DownloadReq General codes 0x30 - 0x3F. */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_NOT_ALLOWED_IN_ACTUAL_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Download not allowed in actual state. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_NOT_ALLOWED_IN_ACTUAL_STATE ((TLR_RESULT)0xC0470030L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_INVALID_AREA_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value in 'AreaCode' of command. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_INVALID_AREA_CODE ((TLR_RESULT)0xC0470031L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_INVALID_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Sequence error. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_INVALID_SEQUENCE ((TLR_RESULT)0xC0470032L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_TO_MUCH_DATA */ +/* */ +/* MessageText: */ +/* */ +/* To much data. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_TO_MUCH_DATA ((TLR_RESULT)0xC0470033L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_TO_LESS_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Less data. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_TO_LESS_DATA ((TLR_RESULT)0xC0470034L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_ALLREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* DeviceNet Stack allready configured. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_ALLREADY_CONFIGURED ((TLR_RESULT)0xC0470035L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DOWNLOAD_FAULTY_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* DeviceNet Stack with an faulty configured loaded. */ +/* */ +#define TLR_E_DEVNET_FAL_DOWNLOAD_FAULTY_CONFIGURATION ((TLR_RESULT)0xC0470036L) + +/*****************************************************************************/ +/* Error Command: DownloadReq ValidetParameter 0x100 - 0x1FF. */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_BAUDRATE_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Baudrate. */ +/* */ +#define TLR_E_DEVNET_FAL_BAUDRATE_OUT_OF_RANGE ((TLR_RESULT)0xC0470100L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_MAC_ID_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MAC Id. */ +/* */ +#define TLR_E_DEVNET_FAL_MAC_ID_OUT_OF_RANGE ((TLR_RESULT)0xC0470101L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_ADR_DOUBLE */ +/* */ +/* MessageText: */ +/* */ +/* Slave already configured. */ +/* */ +#define TLR_E_DEVNET_FAL_ADR_DOUBLE ((TLR_RESULT)0xC0470102L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_DATA_SET_FIELD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of slave parameter set. */ +/* */ +#define TLR_E_DEVNET_FAL_DATA_SET_FIELD_LEN ((TLR_RESULT)0xC0470103L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRED_MST_SL_ADD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of address table in parameter set. */ +/* */ +#define TLR_E_DEVNET_FAL_PRED_MST_SL_ADD_LEN ((TLR_RESULT)0xC0470104L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_FIELD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of predefined master slave config table in parameter set. */ +/* */ +#define TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_FIELD_LEN ((TLR_RESULT)0xC0470105L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRED_MST_SL_ADD_TAB_INCONS */ +/* */ +/* MessageText: */ +/* */ +/* Inconsitency between addresstable and configured connection length. */ +/* */ +#define TLR_E_DEVNET_FAL_PRED_MST_SL_ADD_TAB_INCONS ((TLR_RESULT)0xC0470106L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_EXPL_PRM_FIELD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Length of explicit parameter data in slave parameter set. */ +/* */ +#define TLR_E_DEVNET_FAL_EXPL_PRM_FIELD_LEN ((TLR_RESULT)0xC0470107L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_ADD_INPUT_INCONS */ +/* */ +/* MessageText: */ +/* */ +/* Inconsistency between number of input address offsets and configured input modules. */ +/* */ +#define TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_ADD_INPUT_INCONS ((TLR_RESULT)0xC0470108L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_ADD_OUTPUT_INCONS */ +/* */ +/* MessageText: */ +/* */ +/* Inconsistency between number of output address offsets and configured output modules. */ +/* */ +#define TLR_E_DEVNET_FAL_PRED_MSTSL_CFG_ADD_OUTPUT_INCONS ((TLR_RESULT)0xC0470109L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_UNKNOWN_DATA_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown data type in of the module definition. */ +/* */ +#define TLR_E_DEVNET_FAL_UNKNOWN_DATA_TYPE ((TLR_RESULT)0xC047010AL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_MODULE_DATA_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data size in of the module definition. */ +/* */ +#define TLR_E_DEVNET_FAL_MODULE_DATA_SIZE ((TLR_RESULT)0xC047010BL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_OUTPUT_OFF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Output address offset exceeds the maximum allowed area. */ +/* */ +#define TLR_E_DEVNET_FAL_OUTPUT_OFF_RANGE ((TLR_RESULT)0xC047010CL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_INPUT_OFF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Input address offset exceeds the maximum allowed area. */ +/* */ +#define TLR_E_DEVNET_FAL_INPUT_OFF_RANGE ((TLR_RESULT)0xC047010DL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_WRONG_TYPE_OF_CONNECTION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid type of connection configured. */ +/* */ +#define TLR_E_DEVNET_FAL_WRONG_TYPE_OF_CONNECTION ((TLR_RESULT)0xC047010EL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_TYPE_CONNECTION_REDEFINITION */ +/* */ +/* MessageText: */ +/* */ +/* Redifinition of connection type. */ +/* */ +#define TLR_E_DEVNET_FAL_TYPE_CONNECTION_REDEFINITION ((TLR_RESULT)0xC047010FL) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_EXP_PACKET_LESS_PROD_INHIBIT */ +/* */ +/* MessageText: */ +/* */ +/* Configured 'Production Inhibit Time' is smaller then 'Expected Packet Rate'. */ +/* */ +#define TLR_E_DEVNET_FAL_EXP_PACKET_LESS_PROD_INHIBIT ((TLR_RESULT)0xC0470110L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRM_FIELD_LEN_INCONSISTENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of parameter field in slave parameter set. */ +/* */ +#define TLR_E_DEVNET_FAL_PRM_FIELD_LEN_INCONSISTENT ((TLR_RESULT)0xC0470111L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_SET_BAUDRATE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Error while setting baudrate. */ +/* */ +#define TLR_E_DEVNET_FAL_SET_BAUDRATE_FAIL ((TLR_RESULT)0xC0470112L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_REG_FRAG_TIMEOUT_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value of fragmentation timeout. */ +/* */ +#define TLR_E_DEVNET_FAL_REG_FRAG_TIMEOUT_OUT_OF_RANGE ((TLR_RESULT)0xC0470113L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_PRM_OUT_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory for configuration data. */ +/* */ +#define TLR_E_DEVNET_FAL_PRM_OUT_MEMORY ((TLR_RESULT)0xC0470114L) + +/*****************************************************************************/ +/* Error Command: GetSetAttributeReq 0x200 - 0x2FF */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_NA */ +/* */ +/* MessageText: */ +/* */ +/* No response from device. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_NA ((TLR_RESULT)0xC0470211L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_MDA */ +/* */ +/* MessageText: */ +/* */ +/* To much data received. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_MDA ((TLR_RESULT)0xC0470215L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_LE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of requested service. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_LE ((TLR_RESULT)0xC0470233L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_AD */ +/* */ +/* MessageText: */ +/* */ +/* Another service still active. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_AD ((TLR_RESULT)0xC0470236L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_SE */ +/* */ +/* MessageText: */ +/* */ +/* Sequence error in response sequence. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_SE ((TLR_RESULT)0xC0470239L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_OC */ +/* */ +/* MessageText: */ +/* */ +/* Explicit Message Handler is occupied. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_OC ((TLR_RESULT)0xC0470240L) + +/* */ +/* MessageId: TLR_E_DEVNET_FAL_CON_ERR_RES */ +/* */ +/* MessageText: */ +/* */ +/* Service Error Response. */ +/* */ +#define TLR_E_DEVNET_FAL_CON_ERR_RES ((TLR_RESULT)0xC0470294L) + +/*****************************************************************************/ +/* Error Command: InitReq */ +/*****************************************************************************/ +/*****************************************************************************/ +/* Error : Data echange related */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEVNET_FAL_SLAVE_NOEXCHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Service Error Response. */ +/* */ +#define TLR_E_DEVNET_FAL_SLAVE_NOEXCHANGE ((TLR_RESULT)0xC0471000L) + + + + +#endif /* __DEVNET_FAL_ERROR_H */ + +#ifndef __DF1_STACK_ERROR_H +#define __DF1_STACK_ERROR_H + +/*****************************************************************************/ +/* DF1 Stack ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DF1_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DF1_COMMAND_INVALID ((TLR_RESULT)0xC08D0001L) + + + + +#endif /* __DF1_STACK_ERROR_H */ + +#ifndef __DF1_AP_ERROR_H +#define __DF1_AP_ERROR_H + +/*****************************************************************************/ +/* DF1 Aplication ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DF1_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DF1_AP_COMMAND_INVALID ((TLR_RESULT)0xC08E0001L) + + + + +#endif /* __DF1_AP_ERROR_H */ + +#ifndef __DNS_AP_ERROR_H +#define __DNS_AP_ERROR_H + +/*****************************************************************************/ +/* DNS AP Task (Dualport Application). */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DNS_APS_NOTREGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* User Application not registered. */ +/* */ +#define TLR_E_DNS_APS_NOTREGISTERED ((TLR_RESULT)0xC0630000L) + +/* */ +/* MessageId: TLR_E_DNS_APS_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* User Application already registered. */ +/* */ +#define TLR_E_DNS_APS_ALREADY_REGISTERED ((TLR_RESULT)0xC0630001L) + +/* */ +/* MessageId: TLR_E_DNS_APS_PACKET_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length for register/unregister command. */ +/* */ +#define TLR_E_DNS_APS_PACKET_LENGTH_INVALID ((TLR_RESULT)0xC0630002L) + +/* */ +/* MessageId: TLR_E_DNS_APS_ACCESS_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Unregister application queue access failed. */ +/* */ +#define TLR_E_DNS_APS_ACCESS_FAIL ((TLR_RESULT)0xC0630003L) + +/* */ +/* MessageId: TLR_E_DNS_APS_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Function not allowed because configuration locked. */ +/* */ +#define TLR_E_DNS_APS_CONFIG_LOCK ((TLR_RESULT)0xC0630004L) + +/* */ +/* MessageId: TLR_E_DNS_AP_NO_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* Not data base available. */ +/* */ +#define TLR_E_DNS_AP_NO_DATA_BASE ((TLR_RESULT)0xC0630005L) + +/* */ +/* MessageId: TLR_E_DNS_AP_OPEN_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* Error open database. */ +/* */ +#define TLR_E_DNS_AP_OPEN_DATA_BASE ((TLR_RESULT)0xC0630006L) + +/* */ +/* MessageId: TLR_E_DNS_AP_IV_DNS_DATA_BASE */ +/* */ +/* MessageText: */ +/* */ +/* Not a valid DeviceNet Slave database. */ +/* */ +#define TLR_E_DNS_AP_IV_DNS_DATA_BASE ((TLR_RESULT)0xC0630007L) + +/* */ +/* MessageId: TLR_E_DNS_AP_READ_DATA_BASE_TBL_GLB */ +/* */ +/* MessageText: */ +/* */ +/* Error while rading table GLOBAL. */ +/* */ +#define TLR_E_DNS_AP_READ_DATA_BASE_TBL_GLB ((TLR_RESULT)0xC0630008L) + +/* */ +/* MessageId: TLR_E_DNS_AP_OPEN_DATA_BASE_TBL_GLB */ +/* */ +/* MessageText: */ +/* */ +/* Error while open table GLOBAL. */ +/* */ +#define TLR_E_DNS_AP_OPEN_DATA_BASE_TBL_GLB ((TLR_RESULT)0xC0630009L) + +/* */ +/* MessageId: TLR_E_DNS_AP_OPEN_DATA_BASE_TBL_DNS */ +/* */ +/* MessageText: */ +/* */ +/* Error while open table DNS. */ +/* */ +#define TLR_E_DNS_AP_OPEN_DATA_BASE_TBL_DNS ((TLR_RESULT)0xC063000AL) + +/* */ +/* MessageId: TLR_E_DNS_AP_READ_DATA_BASE_TBL_DNS */ +/* */ +/* MessageText: */ +/* */ +/* Error while reading table DNS. */ +/* */ +#define TLR_E_DNS_AP_READ_DATA_BASE_TBL_DNS ((TLR_RESULT)0xC063000BL) + + + + +#endif /* __DNS_AP_ERROR_H */ + +#ifndef __DNS_FAL_ERROR_H +#define __DNS_FAL_ERROR_H + +/*****************************************************************************/ +/* DeviceNet Slave FAL Task (Fieldbus Application Layer). */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DNS_FAL_DUPLICATE_MAC_ID */ +/* */ +/* MessageText: */ +/* */ +/* Duplicate MAC ID found. */ +/* */ +#define TLR_E_DNS_FAL_DUPLICATE_MAC_ID ((TLR_RESULT)0xC0620001L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INIT_TO_LESS_DATA */ +/* */ +/* MessageText: */ +/* */ +/* To less data for init command. */ +/* */ +#define TLR_E_DNS_FAL_INIT_TO_LESS_DATA ((TLR_RESULT)0xC0620002L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_FUNCTION_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Function not supported. */ +/* */ +#define TLR_E_DNS_FAL_FUNCTION_NOT_SUPPORTED ((TLR_RESULT)0xC0620003L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_COMMAND_ALLREADY_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Command allready in request. */ +/* */ +#define TLR_E_DNS_FAL_COMMAND_ALLREADY_IN_REQUEST ((TLR_RESULT)0xC0620004L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_PRM_ERR_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_PRM_ERR_CODE ((TLR_RESULT)0xC0620006L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_BAUDRATE_OUT_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Baudrate entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_BAUDRATE_OUT_RANGE ((TLR_RESULT)0xC0620007L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_MAC_ID_OUT_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MAC ID entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_MAC_ID_OUT_RANGE ((TLR_RESULT)0xC0620008L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_PRODUCT_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Product Name Length entered in Init Stack request.. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_PRODUCT_LEN ((TLR_RESULT)0xC0620009L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_PRODUCED_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Produced Size entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_PRODUCED_SIZE ((TLR_RESULT)0xC062000AL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_CONSUMED_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Consumed Size entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_CONSUMED_SIZE ((TLR_RESULT)0xC062000BL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_MAJOR_REV */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Major Rev entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_MAJOR_REV ((TLR_RESULT)0xC062000CL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_MINOR_REV */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Minor Rev entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_MINOR_REV ((TLR_RESULT)0xC062000DL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_VENDOR_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Vendor ID entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_VENDOR_ID ((TLR_RESULT)0xC062000EL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_PRODUCT_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Product Type entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_PRODUCT_TYPE ((TLR_RESULT)0xC062000FL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_INVALID_PRODUCT_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Product Code entered in Init Stack request. */ +/* */ +#define TLR_E_DNS_FAL_INVALID_PRODUCT_CODE ((TLR_RESULT)0xC0620010L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Slave is already configured. */ +/* */ +#define TLR_E_DNS_FAL_ALREADY_CONFIGURED ((TLR_RESULT)0xC0620011L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_SET_MODE_INVALID_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid operation mode during Set Mode Request. */ +/* */ +#define TLR_E_DNS_FAL_SET_MODE_INVALID_MODE ((TLR_RESULT)0xC0620012L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_SET_MODE_ALLREADY_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Slave is currently in the mode requested. */ +/* */ +#define TLR_E_DNS_FAL_SET_MODE_ALLREADY_IN_REQUEST ((TLR_RESULT)0xC0620013L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_GET_STATUS_INVALID_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid paramter in Get Status Command. */ +/* */ +#define TLR_E_DNS_FAL_GET_STATUS_INVALID_STATUS ((TLR_RESULT)0xC0620014L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_UPDATE_IO_INVALID_IN_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Input Length specified in Update I/O Command. */ +/* */ +#define TLR_E_DNS_FAL_UPDATE_IO_INVALID_IN_LEN ((TLR_RESULT)0xC0620015L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_UPDATE_IO_INVALID_OUT_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Output Length specified in Update I/O Command. */ +/* */ +#define TLR_E_DNS_FAL_UPDATE_IO_INVALID_OUT_LEN ((TLR_RESULT)0xC0620016L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_UPDATE_IO_INVALID_OUT_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Output Offset specified in Update I/O Command. */ +/* */ +#define TLR_E_DNS_FAL_UPDATE_IO_INVALID_OUT_OFFSET ((TLR_RESULT)0xC0620017L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_UPDATE_IO_INVALID_IN_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Input Offset specified in Update I/O Command. */ +/* */ +#define TLR_E_DNS_FAL_UPDATE_IO_INVALID_IN_OFFSET ((TLR_RESULT)0xC0620018L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_SET_INPUT_INVALID_IN_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Input Length specified in Set Input Command. */ +/* */ +#define TLR_E_DNS_FAL_SET_INPUT_INVALID_IN_LEN ((TLR_RESULT)0xC0620019L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_SET_INPUT_INVALID_IN_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Input Offset specified in Set Input Command. */ +/* */ +#define TLR_E_DNS_FAL_SET_INPUT_INVALID_IN_OFFSET ((TLR_RESULT)0xC062001AL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_GET_OUTPUT_INVALID_OUT_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Output Length specified in Get Output Command. */ +/* */ +#define TLR_E_DNS_FAL_GET_OUTPUT_INVALID_OUT_LEN ((TLR_RESULT)0xC062001BL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_GET_OUTPUT_INVALID_OUT_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Output Offset specified in Get Output Command. */ +/* */ +#define TLR_E_DNS_FAL_GET_OUTPUT_INVALID_OUT_OFFSET ((TLR_RESULT)0xC062001CL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_DOWNLOAD_INVALID_AREA_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid download area specified. */ +/* */ +#define TLR_E_DNS_FAL_DOWNLOAD_INVALID_AREA_CODE ((TLR_RESULT)0xC062001EL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_DOWNLOAD_INVALID_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Download Sequence. */ +/* */ +#define TLR_E_DNS_FAL_DOWNLOAD_INVALID_SEQUENCE ((TLR_RESULT)0xC062001FL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_DOWNLOAD_TO_MUCH_DATA */ +/* */ +/* MessageText: */ +/* */ +/* To much data received. */ +/* */ +#define TLR_E_DNS_FAL_DOWNLOAD_TO_MUCH_DATA ((TLR_RESULT)0xC0620020L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_DOWNLOAD_TO_LESS_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Not enough data received during the download. */ +/* */ +#define TLR_E_DNS_FAL_DOWNLOAD_TO_LESS_DATA ((TLR_RESULT)0xC0620021L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_NO_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* No configuration. */ +/* */ +#define TLR_E_DNS_FAL_NO_CONFIGURATION ((TLR_RESULT)0xC0620022L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_BUS_OFF_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Network error BUS OFF detected. */ +/* */ +#define TLR_E_DNS_FAL_BUS_OFF_STATE ((TLR_RESULT)0xC0620023L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_NO_NETWORK */ +/* */ +/* MessageText: */ +/* */ +/* No network access. */ +/* */ +#define TLR_E_DNS_FAL_NO_NETWORK ((TLR_RESULT)0xC0620024L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_BUS_STOP */ +/* */ +/* MessageText: */ +/* */ +/* Communication not released by application (BUS Stop). */ +/* */ +#define TLR_E_DNS_FAL_BUS_STOP ((TLR_RESULT)0xC0620025L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_NO_COMMUNICATION */ +/* */ +/* MessageText: */ +/* */ +/* No communication. */ +/* */ +#define TLR_E_DNS_FAL_NO_COMMUNICATION ((TLR_RESULT)0xC0620026L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_SERVICE_DATA_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length of service data. */ +/* */ +#define TLR_E_DNS_FAL_SERVICE_DATA_LENGTH_INVALID ((TLR_RESULT)0xC0620027L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_USER_OBJ_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* User object already configured. */ +/* */ +#define TLR_E_DNS_FAL_USER_OBJ_CONFIGURED ((TLR_RESULT)0xC0620028L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_USER_OBJ_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* User object is locked and can not be passed through. */ +/* */ +#define TLR_E_DNS_FAL_USER_OBJ_LOCKED ((TLR_RESULT)0xC0620029L) + +/* */ +/* MessageId: TLR_E_DNS_FAL_USER_OBJ_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* User object has already been registered. */ +/* */ +#define TLR_E_DNS_FAL_USER_OBJ_ALREADY_REGISTERED ((TLR_RESULT)0xC062002AL) + +/* */ +/* MessageId: TLR_E_DNS_FAL_USER_OBJ_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* User object has not been registered. */ +/* */ +#define TLR_E_DNS_FAL_USER_OBJ_NOT_REGISTERED ((TLR_RESULT)0xC062002BL) + + + + +#endif /* __DNS_FAL_ERROR_H */ + +#ifndef __DPM_OD2_ERROR_H +#define __DPM_OD2_ERROR_H + + + + +/*****************************************************************************/ +/* Object Dictionary V2 DPM Adapter Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DPM_OD2_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_DPM_OD2_COMMAND_INVALID ((TLR_RESULT)0xC0480001L) + + + + +#endif /* __DPM_OD2_ERROR_H */ + +#ifndef __DRV_EDD_ERROR_H +#define __DRV_EDD_ERROR_H + +/*****************************************************************************/ +/* DRV EDD Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DRV_EDD_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DRV_EDD_COMMAND_INVALID ((TLR_RESULT)0xC00F0001L) + + + + +#endif /* __DRV_EDD_ERROR_H */ + +#ifndef __ECAT_DPM_ERROR_H +#define __ECAT_DPM_ERROR_H + +/*****************************************************************************/ +/* Ecat Slave DPM Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_DPM_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ECAT_DPM_COMMAND_INVALID ((TLR_RESULT)0xC04C0001L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_INVALID_IO_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid I/O size has been tried to be configured. */ +/* */ +#define TLR_E_ECAT_DPM_INVALID_IO_SIZE ((TLR_RESULT)0xC04C0002L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_WATCHDOG_TIMEOUT_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog timeout expired. */ +/* */ +#define TLR_E_ECAT_DPM_WATCHDOG_TIMEOUT_EXPIRED ((TLR_RESULT)0xC04C0003L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_INVALID_WATCHDOG_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Watchdog time has been tried to be configured. */ +/* */ +#define TLR_E_ECAT_DPM_INVALID_WATCHDOG_TIME ((TLR_RESULT)0xC04C0004L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_INVALID_IO_SIZE_2 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid I/O size has been tried to be configured. */ +/* */ +#define TLR_E_ECAT_DPM_INVALID_IO_SIZE_2 ((TLR_RESULT)0xC04C0005L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_INVALID_IO_SIZE_3 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid I/O size has been tried to be configured. */ +/* */ +#define TLR_E_ECAT_DPM_INVALID_IO_SIZE_3 ((TLR_RESULT)0xC04C0006L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_INVALID_IO_SIZE_4 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid I/O size has been tried to be configured. */ +/* */ +#define TLR_E_ECAT_DPM_INVALID_IO_SIZE_4 ((TLR_RESULT)0xC04C0007L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_BUS_SYNCHRONOUS_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Bus Synchronous Mode is not supported. */ +/* */ +#define TLR_E_ECAT_DPM_BUS_SYNCHRONOUS_NOT_SUPPORTED ((TLR_RESULT)0xC04C0008L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_UPDATE_CFG_SM2_UPDATE_PARAMETER_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Sm2 Update Parameter is invalid. */ +/* */ +#define TLR_E_ECAT_DPM_UPDATE_CFG_SM2_UPDATE_PARAMETER_IS_INVALID ((TLR_RESULT)0xC04C0009L) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_UPDATE_CFG_SM3_UPDATE_PARAMETER_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Sm2 Update Parameter is invalid. */ +/* */ +#define TLR_E_ECAT_DPM_UPDATE_CFG_SM3_UPDATE_PARAMETER_IS_INVALID ((TLR_RESULT)0xC04C000AL) + +/* */ +/* MessageId: TLR_E_ECAT_DPM_UPDATE_CFG_BUS_SYNC_UPDATE_PARAMETER_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Bus-Sync Update Parameter is invalid. */ +/* */ +#define TLR_E_ECAT_DPM_UPDATE_CFG_BUS_SYNC_UPDATE_PARAMETER_IS_INVALID ((TLR_RESULT)0xC04C000BL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_REQUEST_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Request has been aborted. */ +/* */ +#define TLR_E_ECAT_AP_REQUEST_ABORTED ((TLR_RESULT)0xC04C000CL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_GENERAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error while parsing database. */ +/* */ +#define TLR_E_ECAT_AP_NXD_GENERAL_ERROR ((TLR_RESULT)0xC04C000DL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* No database available. */ +/* */ +#define TLR_E_ECAT_AP_NXD_NOT_AVAILABLE ((TLR_RESULT)0xC04C000EL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_NXD_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Not an EtherCAT slave database. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_NXD_TYPE ((TLR_RESULT)0xC04C000FL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_STRUCTURE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid database structure. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_STRUCTURE ((TLR_RESULT)0xC04C0010L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_NXD_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Database version not supported. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_NXD_VERSION ((TLR_RESULT)0xC04C0011L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_ECS_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid stack configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_ECS_CONFIG ((TLR_RESULT)0xC04C0012L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM_CONFIG ((TLR_RESULT)0xC04C0013L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM0_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 0 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM0_CONFIG ((TLR_RESULT)0xC04C0014L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM1_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 1 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM1_CONFIG ((TLR_RESULT)0xC04C0015L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM2_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 2 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM2_CONFIG ((TLR_RESULT)0xC04C0016L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM3_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 3 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM3_CONFIG ((TLR_RESULT)0xC04C0017L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM4_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 4 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM4_CONFIG ((TLR_RESULT)0xC04C0018L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM5_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 5 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM5_CONFIG ((TLR_RESULT)0xC04C0019L) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM6_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 6 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM6_CONFIG ((TLR_RESULT)0xC04C001AL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_SM7_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sync Manager 7 configuration. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_SM7_CONFIG ((TLR_RESULT)0xC04C001BL) + +/* */ +/* MessageId: TLR_E_ECAT_AP_NXD_INVALID_HSK_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid configuration of process data handshakes. */ +/* */ +#define TLR_E_ECAT_AP_NXD_INVALID_HSK_CONFIG ((TLR_RESULT)0xC04C001CL) + + + + +#endif /* __ECAT_DPM_ERROR_H */ + +#ifndef __ECAT_ERROR_H +#define __ECAT_ERROR_H + +/*****************************************************************************/ +/* EtherCAT Base stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_BASE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ECAT_BASE_COMMAND_INVALID ((TLR_RESULT)0xC0200001L) + +/* */ +/* MessageId: TLR_W_ECAT_BASE_MAILBOX_NOT_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Mailbox communication is not active. */ +/* */ +#define TLR_W_ECAT_BASE_MAILBOX_NOT_ACTIVE ((TLR_RESULT)0x80200002L) + +/* */ +/* MessageId: TLR_W_ECAT_BASE_NO_MAILBOX_TYPE_RECEIVER_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* No receiver for mailbox type connected. */ +/* */ +#define TLR_W_ECAT_BASE_NO_MAILBOX_TYPE_RECEIVER_CONNECTED ((TLR_RESULT)0x80200003L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_MBX_INVALID_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Mailbox type id. */ +/* */ +#define TLR_E_ECAT_BASE_MBX_INVALID_TYPE ((TLR_RESULT)0xC0200004L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_MBX_ALREADY_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* Mailbox type is already connected to listener. */ +/* */ +#define TLR_E_ECAT_BASE_MBX_ALREADY_CONNECTED ((TLR_RESULT)0xC0200005L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_TOO_MANY_ALCONTROL_RECEIVERS */ +/* */ +/* MessageText: */ +/* */ +/* Too many ALcontrol receivers registered. */ +/* */ +#define TLR_E_ECAT_BASE_TOO_MANY_ALCONTROL_RECEIVERS ((TLR_RESULT)0xC0200006L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_QUEUE_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Queue does not exist. */ +/* */ +#define TLR_E_ECAT_BASE_QUEUE_DOES_NOT_EXIST ((TLR_RESULT)0xC0200007L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_MBX_PACKET_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Queue does not exist. */ +/* */ +#define TLR_E_ECAT_BASE_MBX_PACKET_TOO_LONG ((TLR_RESULT)0xC0200008L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_NO_QUEUE_REGISTERED_FOR_MBX_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* No queue registered for mailbox type. */ +/* */ +#define TLR_E_ECAT_BASE_NO_QUEUE_REGISTERED_FOR_MBX_TYPE ((TLR_RESULT)0xC0200009L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_DEADSLAVE_CALLBACK_TABLE_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Dead slave callback table full. */ +/* */ +#define TLR_E_ECAT_BASE_DEADSLAVE_CALLBACK_TABLE_FULL ((TLR_RESULT)0xC020000AL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_NO_SUCH_ETHERCAT_STACK_NAME */ +/* */ +/* MessageText: */ +/* */ +/* No EtherCAT stack with that name. */ +/* */ +#define TLR_E_ECAT_BASE_NO_SUCH_ETHERCAT_STACK_NAME ((TLR_RESULT)0xC020000BL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_DUPLICATE_ETHERCAT_STACK_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Duplicate EtherCAT stack name. */ +/* */ +#define TLR_E_ECAT_BASE_DUPLICATE_ETHERCAT_STACK_NAME ((TLR_RESULT)0xC020000CL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_DYNAMICDATA_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* EtherCAT stack dynamic data invalid. */ +/* */ +#define TLR_E_ECAT_BASE_DYNAMICDATA_INVALID ((TLR_RESULT)0xC020000DL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_BASE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC020000EL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_NOT_ENOUGH_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_ECAT_BASE_NOT_ENOUGH_MEMORY ((TLR_RESULT)0xC020000FL) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_INVALID_ALSTATUS_STATE_CHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_ECAT_BASE_INVALID_ALSTATUS_STATE_CHANGE ((TLR_RESULT)0xC0200010L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_NO_DATA_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_ECAT_BASE_NO_DATA_AVAILABLE ((TLR_RESULT)0xC0200011L) + +/* */ +/* MessageId: TLR_E_ECAT_BASE_ALREADY_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_ECAT_BASE_ALREADY_CONNECTED ((TLR_RESULT)0xC0200012L) + +/*****************************************************************************/ +/* EtherCAT CoE stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_COE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ECAT_COE_COMMAND_INVALID ((TLR_RESULT)0xC0210001L) + +/* */ +/* MessageId: TLR_W_ECAT_COE_NO_SERVICE_RECEIVER_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* No CoE Service receiver connected. */ +/* */ +#define TLR_W_ECAT_COE_NO_SERVICE_RECEIVER_CONNECTED ((TLR_RESULT)0x80210002L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_INVALID_SERVICE_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid CoE service type id. */ +/* */ +#define TLR_E_ECAT_COE_INVALID_SERVICE_TYPE ((TLR_RESULT)0xC0210003L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_ALREADY_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* CoE service already connected. */ +/* */ +#define TLR_E_ECAT_COE_ALREADY_CONNECTED ((TLR_RESULT)0xC0210004L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_QUEUE_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Queue does not exist. */ +/* */ +#define TLR_E_ECAT_COE_QUEUE_DOES_NOT_EXIST ((TLR_RESULT)0xC0210005L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_PDO_INVALID_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDO Id. */ +/* */ +#define TLR_E_ECAT_COE_PDO_INVALID_ID ((TLR_RESULT)0xC0210006L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_PDO_UNDEFINED_ID */ +/* */ +/* MessageText: */ +/* */ +/* Undefined PDO Id. */ +/* */ +#define TLR_E_ECAT_COE_PDO_UNDEFINED_ID ((TLR_RESULT)0xC0210007L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_PDO_MAPPING_FAILED_DUE_TO_MISSING_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* PDO Mapping failed due to missing object. */ +/* */ +#define TLR_E_ECAT_COE_PDO_MAPPING_FAILED_DUE_TO_MISSING_OBJECT ((TLR_RESULT)0xC0210008L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_PROTOCOL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SDO Protocol timeout. */ +/* */ +#define TLR_E_ECAT_COE_SDO_PROTOCOL_TIMEOUT ((TLR_RESULT)0xC0210009L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_SCS_SPECIFIER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Client/Server command specifier not valid or unknown. */ +/* */ +#define TLR_E_ECAT_COE_SDO_SCS_SPECIFIER_INVALID ((TLR_RESULT)0xC021000AL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of Memory. */ +/* */ +#define TLR_E_ECAT_COE_SDO_OUT_OF_MEMORY ((TLR_RESULT)0xC021000BL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_UNSUPPORTED_ACCESS_TO_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported access to an object. */ +/* */ +#define TLR_E_ECAT_COE_SDO_UNSUPPORTED_ACCESS_TO_OBJECT ((TLR_RESULT)0xC021000CL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Attempt to read a write only object. */ +/* */ +#define TLR_E_ECAT_COE_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT ((TLR_RESULT)0xC021000DL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Attempt to write a read only object. */ +/* */ +#define TLR_E_ECAT_COE_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT ((TLR_RESULT)0xC021000EL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_OBJECT_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* The object does not exist in the object dictionary. */ +/* */ +#define TLR_E_ECAT_COE_SDO_OBJECT_DOES_NOT_EXIST ((TLR_RESULT)0xC021000FL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_OBJECT_CAN_NOT_BE_MAPPED_INTO_THE_PDO */ +/* */ +/* MessageText: */ +/* */ +/* The object can not be mapped into the PDO. */ +/* */ +#define TLR_E_ECAT_COE_SDO_OBJECT_CAN_NOT_BE_MAPPED_INTO_THE_PDO ((TLR_RESULT)0xC0210010L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_OBJECTS_WOULD_EXCEED_PDO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The number and length of the objects to be mapped would exceed the PDO length. */ +/* */ +#define TLR_E_ECAT_COE_SDO_OBJECTS_WOULD_EXCEED_PDO_LENGTH ((TLR_RESULT)0xC0210011L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_GENERAL_PARAMETER_INCOMPATIBILITY_REASON */ +/* */ +/* MessageText: */ +/* */ +/* General parameter incompatibility reason. */ +/* */ +#define TLR_E_ECAT_COE_SDO_GENERAL_PARAMETER_INCOMPATIBILITY_REASON ((TLR_RESULT)0xC0210012L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_DEVICE */ +/* */ +/* MessageText: */ +/* */ +/* General internal incompatibility in the device. */ +/* */ +#define TLR_E_ECAT_COE_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_DEVICE ((TLR_RESULT)0xC0210013L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_ACCESS_FAILED_DUE_TO_A_HARDWARE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Access failed due to a hardware error. */ +/* */ +#define TLR_E_ECAT_COE_SDO_ACCESS_FAILED_DUE_TO_A_HARDWARE_ERROR ((TLR_RESULT)0xC0210014L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_DOES_NOT_MATCH */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter does not match. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_DOES_NOT_MATCH ((TLR_RESULT)0xC0210015L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too high. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_HIGH ((TLR_RESULT)0xC0210016L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too low. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_LOW ((TLR_RESULT)0xC0210017L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_SUBINDEX_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Subindex does not exist. */ +/* */ +#define TLR_E_ECAT_COE_SDO_SUBINDEX_DOES_NOT_EXIST ((TLR_RESULT)0xC0210018L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Value range of parameter exceeded. */ +/* */ +#define TLR_E_ECAT_COE_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED ((TLR_RESULT)0xC0210019L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too high. */ +/* */ +#define TLR_E_ECAT_COE_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH ((TLR_RESULT)0xC021001AL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too low. */ +/* */ +#define TLR_E_ECAT_COE_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW ((TLR_RESULT)0xC021001BL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value is less than minimum value. */ +/* */ +#define TLR_E_ECAT_COE_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC021001CL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_GENERAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* General error. */ +/* */ +#define TLR_E_ECAT_COE_SDO_GENERAL_ERROR ((TLR_RESULT)0xC021001DL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP ((TLR_RESULT)0xC021001EL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of local control. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL ((TLR_RESULT)0xC021001FL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of present device state. */ +/* */ +#define TLR_E_ECAT_COE_SDO_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE ((TLR_RESULT)0xC0210020L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_NO_OBJECT_DICTIONARY_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* Object dictionary dynamic generation fails or no object dictionary present. */ +/* */ +#define TLR_E_ECAT_COE_SDO_NO_OBJECT_DICTIONARY_PRESENT ((TLR_RESULT)0xC0210021L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_UNKNOWN_ABORT_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown SDO abort code. */ +/* */ +#define TLR_E_ECAT_COE_SDO_UNKNOWN_ABORT_CODE ((TLR_RESULT)0xC0210022L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_TOGGLE_BIT_NOT_TOGGLED */ +/* */ +/* MessageText: */ +/* */ +/* SDO toggle bit was not toggled. */ +/* */ +#define TLR_E_ECAT_COE_SDO_TOGGLE_BIT_NOT_TOGGLED ((TLR_RESULT)0xC0210023L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_CLIENT_STACK_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* SDO client stack busy. */ +/* */ +#define TLR_E_ECAT_COE_SDO_CLIENT_STACK_BUSY ((TLR_RESULT)0xC0210024L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SDO_CLIENT_STACK_NO_TRANSFER */ +/* */ +/* MessageText: */ +/* */ +/* SDO client stack has no active transfer identified by station address. */ +/* */ +#define TLR_E_ECAT_COE_SDO_CLIENT_STACK_NO_TRANSFER ((TLR_RESULT)0xC0210025L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_PDO_SUBOBJECT_PTR_UNALIGNED */ +/* */ +/* MessageText: */ +/* */ +/* Subobject data pointer is unaligned. */ +/* */ +#define TLR_E_ECAT_COE_PDO_SUBOBJECT_PTR_UNALIGNED ((TLR_RESULT)0xC0210026L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_COULD_NOT_SEND_MBX_MESSAGE */ +/* */ +/* MessageText: */ +/* */ +/* Could not send mailbox message. */ +/* */ +#define TLR_E_ECAT_COE_COULD_NOT_SEND_MBX_MESSAGE ((TLR_RESULT)0xC0210027L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_INVALID_MBX_MESSAGE */ +/* */ +/* MessageText: */ +/* */ +/* Could not send mailbox message due to format errors. */ +/* */ +#define TLR_E_ECAT_COE_INVALID_MBX_MESSAGE ((TLR_RESULT)0xC0210028L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_NO_OBJECT_DICTIONARY_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* No object dictionary present. */ +/* */ +#define TLR_E_ECAT_COE_NO_OBJECT_DICTIONARY_PRESENT ((TLR_RESULT)0xC0210029L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_INVALID_PDO_DBM_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDO DBM configuration. */ +/* */ +#define TLR_E_ECAT_COE_INVALID_PDO_DBM_CONFIGURATION ((TLR_RESULT)0xC021002AL) + +/* */ +/* MessageId: TLR_I_ECAT_COE_CONFIG_INTERFACE_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* configuration interface not initialized. */ +/* */ +#define TLR_I_ECAT_COE_CONFIG_INTERFACE_NOT_INITIALIZED ((TLR_RESULT)0x4021002BL) + +/* */ +/* MessageId: TLR_W_ECAT_COE_NO_OUTPUT_DATA */ +/* */ +/* MessageText: */ +/* */ +/* no output data available. */ +/* */ +#define TLR_W_ECAT_COE_NO_OUTPUT_DATA ((TLR_RESULT)0x8021002CL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_COE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC021002DL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_SHUTDOWN_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Shutdown on task is active. */ +/* */ +#define TLR_E_ECAT_COE_SHUTDOWN_ACTIVE ((TLR_RESULT)0xC021002EL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_NOTIFY_TABLE_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Od Notify Table Full. */ +/* */ +#define TLR_E_ECAT_COE_OD_NOTIFY_TABLE_FULL ((TLR_RESULT)0xC021002FL) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_UNDEFINED_NOTIFY_APPLICATION_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* An application already registered for the Undefined object notify. */ +/* */ +#define TLR_E_ECAT_COE_OD_UNDEFINED_NOTIFY_APPLICATION_ALREADY_REGISTERED ((TLR_RESULT)0xC0210030L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_SDOINFO_NOTIFY_APPLICATION_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* An application already registered for the SDOInfo packet hook. */ +/* */ +#define TLR_E_ECAT_COE_OD_SDOINFO_NOTIFY_APPLICATION_ALREADY_REGISTERED ((TLR_RESULT)0xC0210031L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_DPM_MODE_OBJECTS_CAN_ONLY_BE_READONLY */ +/* */ +/* MessageText: */ +/* */ +/* DPM Mode Objects can only be set readonly. */ +/* */ +#define TLR_E_ECAT_COE_OD_DPM_MODE_OBJECTS_CAN_ONLY_BE_READONLY ((TLR_RESULT)0xC0210032L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_DPM_MODE_OBJECTS_DIRECTION_PARAMETER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid direction parameter for DPM Mode Objects. */ +/* */ +#define TLR_E_ECAT_COE_OD_DPM_MODE_OBJECTS_DIRECTION_PARAMETER_INVALID ((TLR_RESULT)0xC0210033L) + +/* */ +/* MessageId: TLR_E_ECAT_COE_OD_DPM_MODE_SUBOBJECT_OFFSET_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid offset parameter for DPM Mode Objects. */ +/* */ +#define TLR_E_ECAT_COE_OD_DPM_MODE_SUBOBJECT_OFFSET_OUT_OF_RANGE ((TLR_RESULT)0xC0210034L) + +/*****************************************************************************/ +/* EtherCAT VoE stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_VOE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ECAT_VOE_COMMAND_INVALID ((TLR_RESULT)0xC0260001L) + +/* */ +/* MessageId: TLR_W_ECAT_VOE_NO_RECEIVER_FOR_VENDOR_PROFILE */ +/* */ +/* MessageText: */ +/* */ +/* No receiver for vendor profile. */ +/* */ +#define TLR_W_ECAT_VOE_NO_RECEIVER_FOR_VENDOR_PROFILE ((TLR_RESULT)0x80260002L) + +/* */ +/* MessageId: TLR_E_ECAT_VOE_VENDOR_PROFILE_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Vendor profile is already registered. */ +/* */ +#define TLR_E_ECAT_VOE_VENDOR_PROFILE_ALREADY_REGISTERED ((TLR_RESULT)0xC0260003L) + +/* */ +/* MessageId: TLR_E_ECAT_VOE_VENDOR_PROFILE_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Vendor profile is not registered. */ +/* */ +#define TLR_E_ECAT_VOE_VENDOR_PROFILE_NOT_REGISTERED ((TLR_RESULT)0xC0260004L) + +/* */ +/* MessageId: TLR_E_ECAT_VOE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define TLR_E_ECAT_VOE_OUT_OF_MEMORY ((TLR_RESULT)0xC0260005L) + +/* */ +/* MessageId: TLR_E_ECAT_VOE_COULD_NOT_SEND_MBX_MESSAGE */ +/* */ +/* MessageText: */ +/* */ +/* Could not send mailbox message. */ +/* */ +#define TLR_E_ECAT_VOE_COULD_NOT_SEND_MBX_MESSAGE ((TLR_RESULT)0xC0260006L) + +/* */ +/* MessageId: TLR_E_ECAT_VOE_NOT_ENOUGH_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_ECAT_VOE_NOT_ENOUGH_MEMORY ((TLR_RESULT)0xC0260007L) + +/*****************************************************************************/ +/* EtherCAT FoE stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_FOE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ECAT_FOE_COMMAND_INVALID ((TLR_RESULT)0xC0240001L) + +/* */ +/* MessageId: TLR_W_ECAT_FOE_INVALID_OPCODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid FoE opcode. */ +/* */ +#define TLR_W_ECAT_FOE_INVALID_OPCODE ((TLR_RESULT)0x80240002L) + +/* */ +/* MessageId: TLR_E_ECAT_FOE_UNKNOWN_FILESYSTEM */ +/* */ +/* MessageText: */ +/* */ +/* Unknown filesystem. */ +/* */ +#define TLR_E_ECAT_FOE_UNKNOWN_FILESYSTEM ((TLR_RESULT)0xC0240003L) + +/* */ +/* MessageId: TLR_I_ECAT_FOE_CONFIG_INTERFACE_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* configuration interface not initialized. */ +/* */ +#define TLR_I_ECAT_FOE_CONFIG_INTERFACE_NOT_INITIALIZED ((TLR_RESULT)0x40240004L) + +/* */ +/* MessageId: TLR_E_ECAT_FOE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_FOE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC0240005L) + +/*****************************************************************************/ +/* EtherCAT SoE stack error codes */ +/*****************************************************************************/ +/* Range 0x1000-0x7FFF is reserved for SSC error mapping */ +/* Range 0x8000-0x8FFF is reserved for default value error codes */ +/* */ +/* MessageId: TLR_E_ECAT_SOE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ECAT_SOE_COMMAND_INVALID ((TLR_RESULT)0xC0220001L) + +/* */ +/* MessageId: TLR_I_ECAT_SOE_CONFIG_INTERFACE_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* configuration interface not initialized. */ +/* */ +#define TLR_I_ECAT_SOE_CONFIG_INTERFACE_NOT_INITIALIZED ((TLR_RESULT)0x40220002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_SOE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC0220003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* IDN already exists. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_ALREADY_EXISTS ((TLR_RESULT)0xC0220004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_ATTRIBUTE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid attribute specified. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_ATTRIBUTE_INVALID ((TLR_RESULT)0xC0220005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_INVALID_MAX_DATA_SIZE_SPECIFIED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid max data size specified. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_INVALID_MAX_DATA_SIZE_SPECIFIED ((TLR_RESULT)0xC0220006L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_DRIVE_NUMBER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Drive number invalid. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_DRIVE_NUMBER_INVALID ((TLR_RESULT)0xC0220007L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_UNDEFINED_NOTIFY_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Undefined notify already in use. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_UNDEFINED_NOTIFY_ALREADY_IN_USE ((TLR_RESULT)0xC0220008L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_INVALID_ELEMENT_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invlaid element id. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_INVALID_ELEMENT_ID ((TLR_RESULT)0xC0220009L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_APP_PACKET_RESPONSE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Application's Response Packet invalid. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_APP_PACKET_RESPONSE_INVALID ((TLR_RESULT)0xC022000AL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_APP_SSC_TRANSFER_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Application's Transfer Data too long. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_APP_SSC_TRANSFER_TOO_LONG ((TLR_RESULT)0xC022000BL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_APP_SSC_TRANSFER_LENGTH_WRONG */ +/* */ +/* MessageText: */ +/* */ +/* Application's Transfer Data length is invalid. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_APP_SSC_TRANSFER_LENGTH_WRONG ((TLR_RESULT)0xC022000CL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_APP_MTU_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Application's MTU is too low. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_APP_MTU_TOO_LOW ((TLR_RESULT)0xC022000DL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_INVALID_DEST_ID */ +/* */ +/* MessageText: */ +/* */ +/* ECAT_SOEIDN: Invalid DestId. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_INVALID_DEST_ID ((TLR_RESULT)0xC022000EL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_LISTS_CANNOT_HAVE_A_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Lists cannot have a minimum value. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_LISTS_CANNOT_HAVE_A_MINIMUM_VALUE ((TLR_RESULT)0xC022000FL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_LISTS_CANNOT_HAVE_A_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Lists cannot have a maximum value. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_LISTS_CANNOT_HAVE_A_MAXIMUM_VALUE ((TLR_RESULT)0xC0220010L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_NAME_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Name exceeds allocated length. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_NAME_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0220011L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_UNIT_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Unit exceeds allocated length. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_UNIT_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0220012L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_OPDATA_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* OpData exceeds allocated length. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_OPDATA_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0220013L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_INVALID_MAX_LIST_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid max list length. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_INVALID_MAX_LIST_LENGTH ((TLR_RESULT)0xC0220014L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_DEFAULT_VALUE_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Default value exceeds allocated length. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_DEFAULT_VALUE_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0220015L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_MINIMUM_AND_MAXIMUM_VALUE_MUST_BE_USED_TOGETHER */ +/* */ +/* MessageText: */ +/* */ +/* Minimum and maximum value must be used together. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_MINIMUM_AND_MAXIMUM_VALUE_MUST_BE_USED_TOGETHER ((TLR_RESULT)0xC0220016L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_IDN_USER_APPLICATION_TRANSFER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* User application transfer error. */ +/* */ +#define TLR_E_ECAT_SOE_IDN_USER_APPLICATION_TRANSFER_ERROR ((TLR_RESULT)0xC0220017L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_IDN */ +/* */ +/* MessageText: */ +/* */ +/* IDN not available. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_IDN ((TLR_RESULT)0xC0221001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_INVALID_ACCESS_TO_ELEMENT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid access to element 1. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_INVALID_ACCESS_TO_ELEMENT_1 ((TLR_RESULT)0xC0221009L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_NAME */ +/* */ +/* MessageText: */ +/* */ +/* No Name. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_NAME ((TLR_RESULT)0xC0222001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NAME_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Name transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NAME_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0222002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NAME_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Name transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NAME_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0222003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NAME_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Name cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NAME_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0222004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NAME_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Name is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NAME_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0222005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_ATTRIBUTE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Attribute transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_ATTRIBUTE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0223002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_ATTRIBUTE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Attribute transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_ATTRIBUTE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0223003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_ATTRIBUTE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Attribute cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_ATTRIBUTE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0223004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_ATTRIBUTE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Attribute is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_ATTRIBUTE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0223005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_UNIT */ +/* */ +/* MessageText: */ +/* */ +/* No unit. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_UNIT ((TLR_RESULT)0xC0224001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_UNIT_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Unit transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_UNIT_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0224002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_UNIT_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Unit transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_UNIT_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0224003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_UNIT_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Unit cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_UNIT_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0224004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_UNIT_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Unit is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_UNIT_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0224005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* No minimum value. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_MINIMUM_VALUE ((TLR_RESULT)0xC0225001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0225002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0225003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0225004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MINIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0225005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* No maximum value. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_MAXIMUM_VALUE ((TLR_RESULT)0xC0226001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0226002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0226003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0226004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_MAXIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0226005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Operation data transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0227002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Operation data transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0227003L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Operation data cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0227004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at this time. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0227005L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_LOWER_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is lower than Minimum value. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_LOWER_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC0227006L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_HIGHER_THAN_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is higher than Maximum value. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_HIGHER_THAN_MAXIMUM_VALUE ((TLR_RESULT)0xC0227007L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid operation data. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_INVALID ((TLR_RESULT)0xC0227008L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_BY_PASSWORD */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected by password. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_BY_PASSWORD ((TLR_RESULT)0xC0227009L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_DUE_CYCLICALLY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected. It is configured cyclically. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_DUE_CYCLICALLY_CONFIGURED ((TLR_RESULT)0xC022700AL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_INVALID_INDIRECT_ADDRESSING */ +/* */ +/* MessageText: */ +/* */ +/* Invalid indirect addressing. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_INVALID_INDIRECT_ADDRESSING ((TLR_RESULT)0xC022700BL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_DUE_OTHER_SETTINGS */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected due other settings. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_DUE_OTHER_SETTINGS ((TLR_RESULT)0xC022700CL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_INVALID_FLOATING_POINT_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid floating point number. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_INVALID_FLOATING_POINT_NUMBER ((TLR_RESULT)0xC022700DL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_PARAMETERIZATION_LEVEL */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at parameterization level. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_PARAMETERIZATION_LEVEL ((TLR_RESULT)0xC022700EL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_OPERATION_LEVEL */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at operation level. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_IS_WRITE_PROTECTED_AT_OPERATION_LEVEL ((TLR_RESULT)0xC022700FL) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_ALREADY_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Procedure command already active. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_ALREADY_ACTIVE ((TLR_RESULT)0xC0227010L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_INTERRUPTIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Procedure command not interruptible. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_INTERRUPTIBLE ((TLR_RESULT)0xC0227011L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Procedure Command is not executable at this time (e.g. wrong slave state). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_AT_THIS_TIME ((TLR_RESULT)0xC0227012L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_INVALID_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* Procedure Command is not executable due invalid parameters. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_INVALID_PARAM ((TLR_RESULT)0xC0227013L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_NO_DEFAULT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* No default value. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_NO_DEFAULT_VALUE ((TLR_RESULT)0xC0228001L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Default value cannot be changed (read only). */ +/* */ +#define TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0228004L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Default value transmision is too short. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0228002L) + +/* */ +/* MessageId: TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Default value transmision is too long. */ +/* */ +#define TLR_E_ECAT_SOE_SSC_DEFAULT_VALUE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0228003L) + +/*****************************************************************************/ +/* EtherCAT AoE stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_AOE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ECAT_AOE_COMMAND_INVALID ((TLR_RESULT)0xC0250001L) + +/* */ +/* MessageId: TLR_I_ECAT_AOE_CONFIG_INTERFACE_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* configuration interface not initialized. */ +/* */ +#define TLR_I_ECAT_AOE_CONFIG_INTERFACE_NOT_INITIALIZED ((TLR_RESULT)0x40250002L) + +/* */ +/* MessageId: TLR_E_ECAT_AOE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_AOE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC0250003L) + +/*****************************************************************************/ +/* EtherCAT EoE stack error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ECAT_EOE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ECAT_EOE_COMMAND_INVALID ((TLR_RESULT)0xC0230001L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_VIRTUAL_SWITCH_NOT_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* Virtual Switch not present. */ +/* */ +#define TLR_E_ECAT_EOE_VIRTUAL_SWITCH_NOT_PRESENT ((TLR_RESULT)0xC0230002L) + +/* */ +/* MessageId: TLR_I_ECAT_EOE_CONFIG_INTERFACE_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* configuration interface not initialized. */ +/* */ +#define TLR_I_ECAT_EOE_CONFIG_INTERFACE_NOT_INITIALIZED ((TLR_RESULT)0x40230002L) + +/* */ +/* MessageId: TLR_S_ECAT_EOE_IP_CONFIG_DATA_NOT_VALID */ +/* */ +/* MessageText: */ +/* */ +/* IP configuration data not valid. */ +/* */ +#define TLR_S_ECAT_EOE_IP_CONFIG_DATA_NOT_VALID ((TLR_RESULT)0x00230003L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_INVALID_TIMEOUT_PARAMS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid timeout parameters. */ +/* */ +#define TLR_E_ECAT_EOE_INVALID_TIMEOUT_PARAMS ((TLR_RESULT)0xC0230004L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_PARAM_UNSPECIFIED_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Unspecified Error. */ +/* */ +#define TLR_E_ECAT_EOE_PARAM_UNSPECIFIED_ERROR ((TLR_RESULT)0xC0230005L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_PARAM_UNSUPPORTED_FRAME_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported Frame Type. */ +/* */ +#define TLR_E_ECAT_EOE_PARAM_UNSUPPORTED_FRAME_TYPE ((TLR_RESULT)0xC0230006L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_PARAM_NO_IP_SUPPORT */ +/* */ +/* MessageText: */ +/* */ +/* No IP Support. */ +/* */ +#define TLR_E_ECAT_EOE_PARAM_NO_IP_SUPPORT ((TLR_RESULT)0xC0230007L) + +/* */ +/* MessageId: TLR_E_ECAT_EOE_PARAM_NO_FILTER_SUPPORT */ +/* */ +/* MessageText: */ +/* */ +/* No Filter Support. */ +/* */ +#define TLR_E_ECAT_EOE_PARAM_NO_FILTER_SUPPORT ((TLR_RESULT)0xC0230008L) + + + + +#endif /* __ECAT_ERROR_H */ + +#ifndef _APM +#define _APM + +/*****************************************************************************/ +/* Ethernet/IP Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EIP_APM_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EIP_APM_COMMAND_INVALID ((TLR_RESULT)0xC05A0001L) + +/* */ +/* MessageId: TLR_E_EIP_APM_PACKET_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_EIP_APM_PACKET_LENGTH_INVALID ((TLR_RESULT)0xC05A0002L) + +/* */ +/* MessageId: TLR_E_EIP_APM_PACKET_PARAMETER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Parameter of the packet are invalid. */ +/* */ +#define TLR_E_EIP_APM_PACKET_PARAMETER_INVALID ((TLR_RESULT)0xC05A0003L) + +/* */ +/* MessageId: TLR_E_EIP_APM_TCP_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Configuration of TCP/IP failed. */ +/* */ +#define TLR_E_EIP_APM_TCP_CONFIG_FAIL ((TLR_RESULT)0xC05A0004L) + +/* */ +/* MessageId: TLR_E_EIP_APM_CONNECTION_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Existing connection is closed. */ +/* */ +#define TLR_E_EIP_APM_CONNECTION_CLOSED ((TLR_RESULT)0xC05A0005L) + +/* */ +/* MessageId: TLR_E_EIP_APM_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* A application is already registered. */ +/* */ +#define TLR_E_EIP_APM_ALREADY_REGISTERED ((TLR_RESULT)0xC05A0006L) + +/* */ +/* MessageId: TLR_E_EIP_APM_ACCESS_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed. */ +/* */ +#define TLR_E_EIP_APM_ACCESS_FAIL ((TLR_RESULT)0xC05A0007L) + +/* */ +/* MessageId: TLR_E_EIP_APM_STATE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Command not allowed at this state. */ +/* */ +#define TLR_E_EIP_APM_STATE_FAIL ((TLR_RESULT)0xC05A0008L) + +/* */ +/* MessageId: TLR_E_EIP_APM_NO_CONFIG_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Database config.dpm not found. */ +/* */ +#define TLR_E_EIP_APM_NO_CONFIG_DBM ((TLR_RESULT)0xC05A0009L) + +/* */ +/* MessageId: TLR_E_EIP_APM_NO_NWID_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Database nwid.dpm not found. */ +/* */ +#define TLR_E_EIP_APM_NO_NWID_DBM ((TLR_RESULT)0xC05A000AL) + +/* */ +/* MessageId: TLR_E_EIP_APM_CONFIG_DBM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Database config.dpm invalid. */ +/* */ +#define TLR_E_EIP_APM_CONFIG_DBM_INVALID ((TLR_RESULT)0xC05A000BL) + +/* */ +/* MessageId: TLR_E_EIP_APM_NWID_DBM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Database nwid.dpm invalid. */ +/* */ +#define TLR_E_EIP_APM_NWID_DBM_INVALID ((TLR_RESULT)0xC05A000CL) + +/* */ +/* MessageId: TLR_E_EIP_APM_FOLDER_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Channel folder not found. */ +/* */ +#define TLR_E_EIP_APM_FOLDER_NOT_FOUND ((TLR_RESULT)0xC05A000DL) + +/* */ +/* MessageId: TLR_E_EIP_APM_IO_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid dual port memory I/O offset. */ +/* */ +#define TLR_E_EIP_APM_IO_OFFSET_INVALID ((TLR_RESULT)0xC05A000EL) + + + + +#endif /* _APM */ + +#ifndef __EIP_APS_ERROR_H +#define __EIP_APS_ERROR_H + +/*****************************************************************************/ +/* Ethernet/IP Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EIP_APS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EIP_APS_COMMAND_INVALID ((TLR_RESULT)0xC0590001L) + +/* */ +/* MessageId: TLR_E_EIP_APS_PACKET_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_EIP_APS_PACKET_LENGTH_INVALID ((TLR_RESULT)0xC0590002L) + +/* */ +/* MessageId: TLR_E_EIP_APS_PACKET_PARAMETER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Parameter of the packet are invalid. */ +/* */ +#define TLR_E_EIP_APS_PACKET_PARAMETER_INVALID ((TLR_RESULT)0xC0590003L) + +/* */ +/* MessageId: TLR_E_EIP_APS_TCP_CONFIG_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Configuration of TCP/IP failed. */ +/* */ +#define TLR_E_EIP_APS_TCP_CONFIG_FAIL ((TLR_RESULT)0xC0590004L) + +/* */ +/* MessageId: TLR_E_EIP_APS_CONNECTION_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Existing connection is closed. */ +/* */ +#define TLR_E_EIP_APS_CONNECTION_CLOSED ((TLR_RESULT)0xC0590005L) + +/* */ +/* MessageId: TLR_E_EIP_APS_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* A application is already registered. */ +/* */ +#define TLR_E_EIP_APS_ALREADY_REGISTERED ((TLR_RESULT)0xC0590006L) + +/* */ +/* MessageId: TLR_E_EIP_APS_ACCESS_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Command is not allowed. */ +/* */ +#define TLR_E_EIP_APS_ACCESS_FAIL ((TLR_RESULT)0xC0590007L) + +/* */ +/* MessageId: TLR_E_EIP_APS_STATE_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Command not allowed at this state. */ +/* */ +#define TLR_E_EIP_APS_STATE_FAIL ((TLR_RESULT)0xC0590008L) + +/* */ +/* MessageId: TLR_E_EIP_APS_IO_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid offset for I/O data. */ +/* */ +#define TLR_E_EIP_APS_IO_OFFSET_INVALID ((TLR_RESULT)0xC0590009L) + +/* */ +/* MessageId: TLR_E_EIP_APS_FOLDER_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Folder for database not found. */ +/* */ +#define TLR_E_EIP_APS_FOLDER_NOT_FOUND ((TLR_RESULT)0xC059000AL) + +/* */ +/* MessageId: TLR_E_EIP_APS_CONFIG_DBM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Configuration database invalid. */ +/* */ +#define TLR_E_EIP_APS_CONFIG_DBM_INVALID ((TLR_RESULT)0xC059000BL) + +/* */ +/* MessageId: TLR_E_EIP_APS_NO_CONFIG_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Configuration database not found. */ +/* */ +#define TLR_E_EIP_APS_NO_CONFIG_DBM ((TLR_RESULT)0xC059000CL) + +/* */ +/* MessageId: TLR_E_EIP_APS_NWID_DBM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* network database invalid. */ +/* */ +#define TLR_E_EIP_APS_NWID_DBM_INVALID ((TLR_RESULT)0xC059000DL) + +/* */ +/* MessageId: TLR_E_EIP_APS_NO_NWID_DBM */ +/* */ +/* MessageText: */ +/* */ +/* network database not found. */ +/* */ +#define TLR_E_EIP_APS_NO_NWID_DBM ((TLR_RESULT)0xC059000EL) + +/* */ +/* MessageId: TLR_E_EIP_APS_NO_DBM */ +/* */ +/* MessageText: */ +/* */ +/* no database found. */ +/* */ +#define TLR_E_EIP_APS_NO_DBM ((TLR_RESULT)0xC059000FL) + + + + +#endif /* __EIP_APS_ERROR_H */ + +#ifndef __EIP_DLR_ERROR_H +#define __EIP_DLR_ERROR_H + +/*****************************************************************************/ +/* Ethernet/IP DLR Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EIP_DLR_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EIP_DLR_COMMAND_INVALID ((TLR_RESULT)0xC0950001L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* DLR task is not initialized. */ +/* */ +#define TLR_E_EIP_DLR_NOT_INITIALIZED ((TLR_RESULT)0xC0950002L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_FNC_API_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid DLR handle at API function call. */ +/* */ +#define TLR_E_EIP_DLR_FNC_API_INVALID_HANDLE ((TLR_RESULT)0xC0950003L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_INVALID_ATTRIBUTE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid DLR object attribute. */ +/* */ +#define TLR_E_EIP_DLR_INVALID_ATTRIBUTE ((TLR_RESULT)0xC0950004L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_INVALID_PORT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid port. */ +/* */ +#define TLR_E_EIP_DLR_INVALID_PORT ((TLR_RESULT)0xC0950005L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_LINK_DOWN */ +/* */ +/* MessageText: */ +/* */ +/* Port link is down. */ +/* */ +#define TLR_E_EIP_DLR_LINK_DOWN ((TLR_RESULT)0xC0950006L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_MAX_NUM_OF_TASK_INST_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum number of EthernetIP task instances exceeded. */ +/* */ +#define TLR_E_EIP_DLR_MAX_NUM_OF_TASK_INST_EXCEEDED ((TLR_RESULT)0xC0950007L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_INVALID_TASK_INST */ +/* */ +/* MessageText: */ +/* */ +/* Invalid task instance. */ +/* */ +#define TLR_E_EIP_DLR_INVALID_TASK_INST ((TLR_RESULT)0xC0950008L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_CALLBACK_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Callback function is not registered. */ +/* */ +#define TLR_E_EIP_DLR_CALLBACK_NOT_REGISTERED ((TLR_RESULT)0xC0950009L) + +/* */ +/* MessageId: TLR_E_EIP_DLR_WRONG_DLR_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong DLR state. */ +/* */ +#define TLR_E_EIP_DLR_WRONG_DLR_STATE ((TLR_RESULT)0xC095000AL) + +/* */ +/* MessageId: TLR_E_EIP_DLR_NOT_CONFIGURED_AS_SUPERVISOR */ +/* */ +/* MessageText: */ +/* */ +/* Not configured as supervisor. */ +/* */ +#define TLR_E_EIP_DLR_NOT_CONFIGURED_AS_SUPERVISOR ((TLR_RESULT)0xC095000BL) + +/* */ +/* MessageId: TLR_E_EIP_DLR_INVALID_CONFIG_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* Configuration parameter is invalid. */ +/* */ +#define TLR_E_EIP_DLR_INVALID_CONFIG_PARAM ((TLR_RESULT)0xC095000CL) + +/* */ +/* MessageId: TLR_E_EIP_DLR_NO_STARTUP_PARAM_AVAIL */ +/* */ +/* MessageText: */ +/* */ +/* No startup parameters available. */ +/* */ +#define TLR_E_EIP_DLR_NO_STARTUP_PARAM_AVAIL ((TLR_RESULT)0xC095000DL) + + + + +#endif /* __EIP_DLR_ERROR_H */ + +#ifndef __EIP_ENCAP_ERROR_H +#define __EIP_ENCAP_ERROR_H + +/*****************************************************************************/ +/* Ethernet/IP Encapsulation */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EIP_ENCAP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EIP_ENCAP_COMMAND_INVALID ((TLR_RESULT)0xC01E0001L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* Encapsulation layer is not initialized. */ +/* */ +#define TLR_E_EIP_ENCAP_NOT_INITIALIZED ((TLR_RESULT)0xC01E0002L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* System is out of memory. */ +/* */ +#define TLR_E_EIP_ENCAP_OUT_OF_MEMORY ((TLR_RESULT)0xC01E0003L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_OUT_OF_PACKETS */ +/* */ +/* MessageText: */ +/* */ +/* Task runs out of empty packets at the local packet pool. */ +/* */ +#define TLR_E_EIP_ENCAP_OUT_OF_PACKETS ((TLR_RESULT)0xC01E0010L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_SEND_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* Sending a packet failed. */ +/* */ +#define TLR_E_EIP_ENCAP_SEND_PACKET ((TLR_RESULT)0xC01E0011L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_SOCKET_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* No free socket is available. */ +/* */ +#define TLR_E_EIP_ENCAP_SOCKET_OVERRUN ((TLR_RESULT)0xC01E0012L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_SOCKET */ +/* */ +/* MessageText: */ +/* */ +/* Socket ID is invalid. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_SOCKET ((TLR_RESULT)0xC01E0013L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CEP_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Connection could not be open. No resource for a new Connection Endpoint available. */ +/* */ +#define TLR_E_EIP_ENCAP_CEP_OVERRUN ((TLR_RESULT)0xC01E0014L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_UCMM_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Message couldn't send. All Unconnect Message Buffers are in use. */ +/* */ +#define TLR_E_EIP_ENCAP_UCMM_OVERRUN ((TLR_RESULT)0xC01E0015L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_TRANSP_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Connection couldn't be opened. All transports are in use. */ +/* */ +#define TLR_E_EIP_ENCAP_TRANSP_OVERRUN ((TLR_RESULT)0xC01E0016L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_UNKNOWN_CONN_TYP */ +/* */ +/* MessageText: */ +/* */ +/* Received Message include an unknown connection typ. */ +/* */ +#define TLR_E_EIP_ENCAP_UNKNOWN_CONN_TYP ((TLR_RESULT)0xC01E0017L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CONN_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Connection was closed. */ +/* */ +#define TLR_E_EIP_ENCAP_CONN_CLOSED ((TLR_RESULT)0xC01E0000L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CONN_RESETED */ +/* */ +/* MessageText: */ +/* */ +/* Connection is reseted from remote device. */ +/* */ +#define TLR_E_EIP_ENCAP_CONN_RESETED ((TLR_RESULT)0xC01E0019L) + +/* */ +/* MessageId: TLR_S_EIP_ENCAP_CONN_UNREGISTER */ +/* */ +/* MessageText: */ +/* */ +/* We closed the conncetion successful. With an unregister command. */ +/* */ +#define TLR_S_EIP_ENCAP_CONN_UNREGISTER ((TLR_RESULT)0x001E001AL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CONN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong connection state for this service. */ +/* */ +#define TLR_E_EIP_ENCAP_CONN_STATE ((TLR_RESULT)0xC01E001BL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CONN_INACTIV */ +/* */ +/* MessageText: */ +/* */ +/* Encapsulation sesson was deactivated */ +/* */ +#define TLR_E_EIP_ENCAP_CONN_INACTIV ((TLR_RESULT)0xC01E001CL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_IPADDR */ +/* */ +/* MessageText: */ +/* */ +/* received an invalid IP address. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_IPADDR ((TLR_RESULT)0xC01E001DL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_TRANSP */ +/* */ +/* MessageText: */ +/* */ +/* Invalid transport typ. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_TRANSP ((TLR_RESULT)0xC01E001EL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_TRANSP_INUSE */ +/* */ +/* MessageText: */ +/* */ +/* Transport is still in use. */ +/* */ +#define TLR_E_EIP_ENCAP_TRANSP_INUSE ((TLR_RESULT)0xC01E001FL) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_TRANSP_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Transport is closed. */ +/* */ +#define TLR_E_EIP_ENCAP_TRANSP_CLOSED ((TLR_RESULT)0xC01E0020L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_MSGID */ +/* */ +/* MessageText: */ +/* */ +/* The received message has a invalid message ID. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_MSGID ((TLR_RESULT)0xC01E0021L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_MSG */ +/* */ +/* MessageText: */ +/* */ +/* invalid encapsulation message received. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_MSG ((TLR_RESULT)0xC01E0022L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_MSGLEN */ +/* */ +/* MessageText: */ +/* */ +/* Received message with invalid length. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_MSGLEN ((TLR_RESULT)0xC01E0023L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CL3_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Class 3 connection runs into timeout. */ +/* */ +#define TLR_E_EIP_ENCAP_CL3_TIMEOUT ((TLR_RESULT)0xC01E0030L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_UCMM_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Unconnected message gets a timeout. */ +/* */ +#define TLR_E_EIP_ENCAP_UCMM_TIMEOUT ((TLR_RESULT)0xC01E0031L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CL1_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout of a class 3 connection. */ +/* */ +#define TLR_E_EIP_ENCAP_CL1_TIMEOUT ((TLR_RESULT)0xC01E0032L) + +/* */ +/* MessageId: TLR_W_EIP_ENCAP_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Encapsulation service is finished by timeout. */ +/* */ +#define TLR_W_EIP_ENCAP_TIMEOUT ((TLR_RESULT)0x801E0033L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_CMDRUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Encapsulation service is still running. */ +/* */ +#define TLR_E_EIP_ENCAP_CMDRUNNING ((TLR_RESULT)0xC01E0034L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_NO_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* No empty timer available. */ +/* */ +#define TLR_E_EIP_ENCAP_NO_TIMER ((TLR_RESULT)0xC01E0035L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_DATA_IDX */ +/* */ +/* MessageText: */ +/* */ +/* The data index is unknown by the task. Please ensure that it is the same as at the indication. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_DATA_IDX ((TLR_RESULT)0xC01E0036L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_DATA_AREA */ +/* */ +/* MessageText: */ +/* */ +/* The parameter of the data area are invalid. Please check length and offset. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_DATA_AREA ((TLR_RESULT)0xC01E0037L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_INVALID_DATA_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Packet length is invalid. Please check length of the packet. */ +/* */ +#define TLR_E_EIP_ENCAP_INVALID_DATA_LEN ((TLR_RESULT)0xC01E0038L) + +/* */ +/* MessageId: TLR_E_EIP_ENCAP_TASK_RESETING */ +/* */ +/* MessageText: */ +/* */ +/* Ethernet/IP Encapsulation Layer runs a reset. */ +/* */ +#define TLR_E_EIP_ENCAP_TASK_RESETING ((TLR_RESULT)0xC01E0039L) + + + + +#endif /* __EIP_ENCAP_ERROR_H */ + +#ifndef __EIP_OBJECT_ERROR_H +#define __EIP_OBJECT_ERROR_H + +/*****************************************************************************/ +/* Ethernet/IP Object */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EIP_OBJECT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EIP_OBJECT_COMMAND_INVALID ((TLR_RESULT)0xC01F0001L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* System is out of memory. */ +/* */ +#define TLR_E_EIP_OBJECT_OUT_OF_MEMORY ((TLR_RESULT)0xC01F0002L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_OUT_OF_PACKETS */ +/* */ +/* MessageText: */ +/* */ +/* Task runs out of empty packets at the local packet pool. */ +/* */ +#define TLR_E_EIP_OBJECT_OUT_OF_PACKETS ((TLR_RESULT)0xC01F0003L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_SEND_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* Sending a packet failed. */ +/* */ +#define TLR_E_EIP_OBJECT_SEND_PACKET ((TLR_RESULT)0xC01F0004L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_AS_ALLREADY_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Assembly instance already exist. */ +/* */ +#define TLR_E_EIP_OBJECT_AS_ALLREADY_EXIST ((TLR_RESULT)0xC01F0010L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_AS_INVALID_INST */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Assembly Instance. */ +/* */ +#define TLR_E_EIP_OBJECT_AS_INVALID_INST ((TLR_RESULT)0xC01F0011L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_AS_INVALID_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Assembly length. */ +/* */ +#define TLR_E_EIP_OBJECT_AS_INVALID_LEN ((TLR_RESULT)0xC01F0012L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_CONN_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* No free connection buffer available */ +/* */ +#define TLR_E_EIP_OBJECT_CONN_OVERRUN ((TLR_RESULT)0xC01F0020L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_INVALID_CLASS */ +/* */ +/* MessageText: */ +/* */ +/* Object class is invalid. */ +/* */ +#define TLR_E_EIP_OBJECT_INVALID_CLASS ((TLR_RESULT)0xC01F0021L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_SEGMENT_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Segment of the path is invalid. */ +/* */ +#define TLR_E_EIP_OBJECT_SEGMENT_FAULT ((TLR_RESULT)0xC01F0022L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_CLASS_ALLREADY_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Object Class is already used. */ +/* */ +#define TLR_E_EIP_OBJECT_CLASS_ALLREADY_EXIST ((TLR_RESULT)0xC01F0023L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_CONNECTION_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Connection failed. */ +/* */ +#define TLR_E_EIP_OBJECT_CONNECTION_FAIL ((TLR_RESULT)0xC01F0024L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_CONNECTION_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* Unknown format of connection parameter */ +/* */ +#define TLR_E_EIP_OBJECT_CONNECTION_PARAM ((TLR_RESULT)0xC01F0025L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_UNKNOWN_CONNECTION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid connection ID. */ +/* */ +#define TLR_E_EIP_OBJECT_UNKNOWN_CONNECTION ((TLR_RESULT)0xC01F0026L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_NO_OBJ_RESSOURCE */ +/* */ +/* MessageText: */ +/* */ +/* No resource for creating a new class object available. */ +/* */ +#define TLR_E_EIP_OBJECT_NO_OBJ_RESSOURCE ((TLR_RESULT)0xC01F0027L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_ID_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid request parameter. */ +/* */ +#define TLR_E_EIP_OBJECT_ID_INVALID_PARAMETER ((TLR_RESULT)0xC01F0028L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_CONNECTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* General connection failure. See also General Error Code and Extended Error Code for more details. */ +/* */ +#define TLR_E_EIP_OBJECT_CONNECTION_FAILED ((TLR_RESULT)0xC01F0029L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_PACKET_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Packet length of the request is invalid. */ +/* */ +#define TLR_E_EIP_OBJECT_PACKET_LEN ((TLR_RESULT)0xC01F0030L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_READONLY_INST */ +/* */ +/* MessageText: */ +/* */ +/* Access denied. Instance is read only. */ +/* */ +#define TLR_E_EIP_OBJECT_READONLY_INST ((TLR_RESULT)0xC01F0031L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_DPM_USED */ +/* */ +/* MessageText: */ +/* */ +/* DPM address is already used by an other instance. */ +/* */ +#define TLR_E_EIP_OBJECT_DPM_USED ((TLR_RESULT)0xC01F0032L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_SET_OUTPUT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Set Output command is already runnning. */ +/* */ +#define TLR_E_EIP_OBJECT_SET_OUTPUT_RUNNING ((TLR_RESULT)0xC01F0033L) + +/* */ +/* MessageId: TLR_E_EIP_OBJECT_TASK_RESETING */ +/* */ +/* MessageText: */ +/* */ +/* Etthernet/IP Object Task is running a reset. */ +/* */ +#define TLR_E_EIP_OBJECT_TASK_RESETING ((TLR_RESULT)0xC01F0034L) + + + + +#endif /* __EIP_OBJECT_ERROR_H */ + +#ifndef __EPL_ERROR_H +#define __EPL_ERROR_H + +/*****************************************************************************/ +/* POWERLINK EPL PDO Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_PDO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_PDO_COMMAND_INVALID ((TLR_RESULT)0xC0150001L) + +/* */ +/* MessageId: TLR_E_EPL_PDO_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_EPL_PDO_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0150002L) + +/*****************************************************************************/ +/* POWERLINK EPL SDO Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_SDO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_SDO_COMMAND_INVALID ((TLR_RESULT)0xC0160001L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_PROTOCOL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SDO Protocol timeout. */ +/* */ +#define TLR_E_EPL_SDO_PROTOCOL_TIMEOUT ((TLR_RESULT)0xC0160002L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_SCS_SPECIFIER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Client/Server command specifier not valid or unknown. */ +/* */ +#define TLR_E_EPL_SDO_SCS_SPECIFIER_INVALID ((TLR_RESULT)0xC0160003L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of Memory. */ +/* */ +#define TLR_E_EPL_SDO_OUT_OF_MEMORY ((TLR_RESULT)0xC0160004L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_UNSUPPORTED_ACCESS_TO_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported access to an object. */ +/* */ +#define TLR_E_EPL_SDO_UNSUPPORTED_ACCESS_TO_OBJECT ((TLR_RESULT)0xC0160005L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Attempt to read a write only object. */ +/* */ +#define TLR_E_EPL_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT ((TLR_RESULT)0xC0160006L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Attempt to write a read only object. */ +/* */ +#define TLR_E_EPL_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT ((TLR_RESULT)0xC0160007L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_OBJECT_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* The object does not exist in the object dictionary. */ +/* */ +#define TLR_E_EPL_SDO_OBJECT_DOES_NOT_EXIST ((TLR_RESULT)0xC0160008L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_OBJECT_CAN_NOT_BE_MAPPED_INTO_THE_PDO */ +/* */ +/* MessageText: */ +/* */ +/* The object can not be mapped into the PDO. */ +/* */ +#define TLR_E_EPL_SDO_OBJECT_CAN_NOT_BE_MAPPED_INTO_THE_PDO ((TLR_RESULT)0xC0160009L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_OBJECTS_WOULD_EXCEED_PDO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The number and length of the objects to be mapped would exceed the PDO length. */ +/* */ +#define TLR_E_EPL_SDO_OBJECTS_WOULD_EXCEED_PDO_LENGTH ((TLR_RESULT)0xC016000AL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_GENERAL_PARAMETER_INCOMPATIBILITY_REASON */ +/* */ +/* MessageText: */ +/* */ +/* General parameter incompatibility reason. */ +/* */ +#define TLR_E_EPL_SDO_GENERAL_PARAMETER_INCOMPATIBILITY_REASON ((TLR_RESULT)0xC016000BL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_DEVICE */ +/* */ +/* MessageText: */ +/* */ +/* General internal incompatibility in the device. */ +/* */ +#define TLR_E_EPL_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_DEVICE ((TLR_RESULT)0xC016000CL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_ACCESS_FAILED_DUE_TO_A_HARDWARE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Access failed due to a hardware error. */ +/* */ +#define TLR_E_EPL_SDO_ACCESS_FAILED_DUE_TO_A_HARDWARE_ERROR ((TLR_RESULT)0xC016000DL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_DOES_NOT_MATCH */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter does not match. */ +/* */ +#define TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_DOES_NOT_MATCH ((TLR_RESULT)0xC016000EL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too high. */ +/* */ +#define TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_HIGH ((TLR_RESULT)0xC016000FL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too low. */ +/* */ +#define TLR_E_EPL_SDO_DATA_TYPE_DOES_NOT_MATCH_LEN_OF_SRV_PARAM_TOO_LOW ((TLR_RESULT)0xC0160010L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_SUBINDEX_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Subindex does not exist. */ +/* */ +#define TLR_E_EPL_SDO_SUBINDEX_DOES_NOT_EXIST ((TLR_RESULT)0xC0160011L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Value range of parameter exceeded. */ +/* */ +#define TLR_E_EPL_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED ((TLR_RESULT)0xC0160012L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too high. */ +/* */ +#define TLR_E_EPL_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH ((TLR_RESULT)0xC0160013L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too low. */ +/* */ +#define TLR_E_EPL_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW ((TLR_RESULT)0xC0160014L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value is less than minimum value. */ +/* */ +#define TLR_E_EPL_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC0160015L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_GENERAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* General error. */ +/* */ +#define TLR_E_EPL_SDO_GENERAL_ERROR ((TLR_RESULT)0xC0160016L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application. */ +/* */ +#define TLR_E_EPL_SDO_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP ((TLR_RESULT)0xC0160017L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of local control. */ +/* */ +#define TLR_E_EPL_SDO_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL ((TLR_RESULT)0xC0160018L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of present device state. */ +/* */ +#define TLR_E_EPL_SDO_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE ((TLR_RESULT)0xC0160019L) + +/* */ +/* MessageId: TLR_E_EPL_SDO_NO_OBJECT_DICTIONARY_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* Object dictionary dynamic generation fails or no object dictionary present. */ +/* */ +#define TLR_E_EPL_SDO_NO_OBJECT_DICTIONARY_PRESENT ((TLR_RESULT)0xC016001AL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_UNKNOWN_ABORT_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown SDO abort code. */ +/* */ +#define TLR_E_EPL_SDO_UNKNOWN_ABORT_CODE ((TLR_RESULT)0xC016001BL) + +/* */ +/* MessageId: TLR_E_EPL_CONN_BUFFER_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Connection buffer full. */ +/* */ +#define TLR_E_EPL_CONN_BUFFER_FULL ((TLR_RESULT)0xC016001CL) + +/* */ +/* MessageId: TLR_E_EPL_SDO_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_EPL_SDO_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC016001DL) + +/* */ +/* MessageId: TLR_E_EPLCN_SDO_OD_DPM_MODE_OBJECTS_CAN_ONLY_BE_READONLY */ +/* */ +/* MessageText: */ +/* */ +/* DPM Mode Objects can only be set readonly. */ +/* */ +#define TLR_E_EPLCN_SDO_OD_DPM_MODE_OBJECTS_CAN_ONLY_BE_READONLY ((TLR_RESULT)0xC016001EL) + +/* */ +/* MessageId: TLR_E_EPLCN_SDO_OD_DPM_MODE_OBJECTS_DIRECTION_PARAMETER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid direction parameter for DPM Mode Objects. */ +/* */ +#define TLR_E_EPLCN_SDO_OD_DPM_MODE_OBJECTS_DIRECTION_PARAMETER_INVALID ((TLR_RESULT)0xC016001FL) + +/* */ +/* MessageId: TLR_E_EPLCN_SDO_OD_DPM_MODE_SUBOBJECT_OFFSET_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid offset parameter for DPM Mode Objects. */ +/* */ +#define TLR_E_EPLCN_SDO_OD_DPM_MODE_SUBOBJECT_OFFSET_OUT_OF_RANGE ((TLR_RESULT)0xC0160020L) + +/*****************************************************************************/ +/* POWERLINK EPL ALI Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_ALI_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_ALI_COMMAND_INVALID ((TLR_RESULT)0xC0180001L) + +/*****************************************************************************/ +/* POWERLINK EPL NMT Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_NMT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_NMT_COMMAND_INVALID ((TLR_RESULT)0xC0170001L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_OUTPUT_DATA_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Output data invalid. */ +/* */ +#define TLR_E_EPL_NMT_OUTPUT_DATA_INVALID ((TLR_RESULT)0xC0170002L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INPUT_DATA_OVERSIZED */ +/* */ +/* MessageText: */ +/* */ +/* Input data oversized. */ +/* */ +#define TLR_E_EPL_NMT_INPUT_DATA_OVERSIZED ((TLR_RESULT)0xC0170003L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_NODE_INPUT_DATA_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Node-specific Input data invalid. */ +/* */ +#define TLR_E_EPL_NMT_NODE_INPUT_DATA_INVALID ((TLR_RESULT)0xC0170004L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_PDO_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Node-specific PDO does not exist. */ +/* */ +#define TLR_E_EPL_NMT_PDO_DOES_NOT_EXIST ((TLR_RESULT)0xC0170005L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_PDO_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Node-specific PDO exists. */ +/* */ +#define TLR_E_EPL_NMT_PDO_EXISTS ((TLR_RESULT)0xC0170006L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_PDO_EXCEEDS_POLL_IN_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* PDO will exceed Poll In size. */ +/* */ +#define TLR_E_EPL_NMT_PDO_EXCEEDS_POLL_IN_SIZE ((TLR_RESULT)0xC0170007L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_PDO_EXCEEDS_POLL_OUT_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* PDO will exceed Poll Out size. */ +/* */ +#define TLR_E_EPL_NMT_PDO_EXCEEDS_POLL_OUT_SIZE ((TLR_RESULT)0xC0170008L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_EPL_NMT_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0170009L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INVALID_STATE_CHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid state change requested. */ +/* */ +#define TLR_E_EPL_NMT_INVALID_STATE_CHANGE ((TLR_RESULT)0xC017000AL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_FAILED_TO_LOCK_MUTEX */ +/* */ +/* MessageText: */ +/* */ +/* Failed to lock mutex. */ +/* */ +#define TLR_E_EPL_NMT_FAILED_TO_LOCK_MUTEX ((TLR_RESULT)0xC017000BL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_MUTEX */ +/* */ +/* MessageText: */ +/* */ +/* Could not create SDO mutex. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_MUTEX ((TLR_RESULT)0xC017000CL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_MUTEX */ +/* */ +/* MessageText: */ +/* */ +/* Could not create NMT mutex. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_MUTEX ((TLR_RESULT)0xC017000DL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_ERRH_MUTEX */ +/* */ +/* MessageText: */ +/* */ +/* Could not create Error Handling mutex. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_ERRH_MUTEX ((TLR_RESULT)0xC017000EL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_TASK */ +/* */ +/* MessageText: */ +/* */ +/* Could not create SDO task. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_TASK ((TLR_RESULT)0xC017000FL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_TASK */ +/* */ +/* MessageText: */ +/* */ +/* Could not create NMT task. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_TASK ((TLR_RESULT)0xC0170010L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_SIGNAL */ +/* */ +/* MessageText: */ +/* */ +/* Could not create SDO signal. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_SDO_SIGNAL ((TLR_RESULT)0xC0170011L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_SIGNAL */ +/* */ +/* MessageText: */ +/* */ +/* Could not create NMT signal. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_NMT_SIGNAL ((TLR_RESULT)0xC0170012L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_BASIC_ETH_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* Could not create Basic Ethernet timer. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_BASIC_ETH_TIMER ((TLR_RESULT)0xC0170013L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_SOC_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* Could not create SoC timer. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_SOC_TIMER ((TLR_RESULT)0xC0170014L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_SEQU_LAYER_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* Could not create Sequence Layer timer. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_SEQU_LAYER_TIMER ((TLR_RESULT)0xC0170015L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_CREATE_OBJECT_DICTIONARY */ +/* */ +/* MessageText: */ +/* */ +/* Could not create object dictionary. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_CREATE_OBJECT_DICTIONARY ((TLR_RESULT)0xC0170016L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_EMERGENCY_QUEUE_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Emergency Queue overflow. */ +/* */ +#define TLR_E_EPL_NMT_EMERGENCY_QUEUE_OVERFLOW ((TLR_RESULT)0xC0170017L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INVALID_STATUS_ENTRY_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid status entry index. */ +/* */ +#define TLR_E_EPL_NMT_INVALID_STATUS_ENTRY_INDEX ((TLR_RESULT)0xC0170018L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_COULD_NOT_LOCK_MUTEX */ +/* */ +/* MessageText: */ +/* */ +/* Could not lock mutex. */ +/* */ +#define TLR_E_EPL_NMT_COULD_NOT_LOCK_MUTEX ((TLR_RESULT)0xC0170019L) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INVALID_STATIC_BIT_FIELD_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid static bit field bit number. */ +/* */ +#define TLR_E_EPL_NMT_INVALID_STATIC_BIT_FIELD_NUMBER ((TLR_RESULT)0xC017001AL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_NO_MORE_APP_HANDLES */ +/* */ +/* MessageText: */ +/* */ +/* No more App handles. */ +/* */ +#define TLR_E_EPL_NMT_NO_MORE_APP_HANDLES ((TLR_RESULT)0xC017001BL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_APP_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Application queue is not registered. */ +/* */ +#define TLR_E_EPL_NMT_APP_NOT_REGISTERED ((TLR_RESULT)0xC017001CL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_APP_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Application queue is already registered. */ +/* */ +#define TLR_E_EPL_NMT_APP_ALREADY_REGISTERED ((TLR_RESULT)0xC017001DL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_FAILED_TO_INITIALIZE_EPLCN_INTERFACE */ +/* */ +/* MessageText: */ +/* */ +/* EplCn-Interface could not be initialized. */ +/* */ +#define TLR_E_EPL_NMT_FAILED_TO_INITIALIZE_EPLCN_INTERFACE ((TLR_RESULT)0xC017001EL) + +/* */ +/* MessageId: TLR_E_EPL_NMT_INVALID_PARAMETERS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Parameters. */ +/* */ +#define TLR_E_EPL_NMT_INVALID_PARAMETERS ((TLR_RESULT)0xC017001FL) + +/*****************************************************************************/ +/* POWERLINK EPL MN Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_MN_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_MN_COMMAND_INVALID ((TLR_RESULT)0xC03D0001L) + +/* */ +/* MessageId: TLR_E_EPL_MN_CN_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* CN exists already. */ +/* */ +#define TLR_E_EPL_MN_CN_EXISTS ((TLR_RESULT)0xC03D0002L) + +/* */ +/* MessageId: TLR_E_EPL_MN_CN_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* CN does not exist. */ +/* */ +#define TLR_E_EPL_MN_CN_DOES_NOT_EXIST ((TLR_RESULT)0xC03D0003L) + +/* */ +/* MessageId: TLR_E_EPL_MN_CN_ALREADY_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* CN already connected. */ +/* */ +#define TLR_E_EPL_MN_CN_ALREADY_CONNECTED ((TLR_RESULT)0xC03D0004L) + +/* */ +/* MessageId: TLR_E_EPL_MN_CN_NO_OUTPUT_DATA */ +/* */ +/* MessageText: */ +/* */ +/* CN has no valid output data. */ +/* */ +#define TLR_E_EPL_MN_CN_NO_OUTPUT_DATA ((TLR_RESULT)0xC03D0005L) + +/*****************************************************************************/ +/* POWERLINK EPL PLD Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EPL_PLD_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EPL_PLD_COMMAND_INVALID ((TLR_RESULT)0xC0190001L) + + + + +#endif /* __EPL_ERROR_H */ + +#ifndef __ETH_INTF_ERROR_H +#define __ETH_INTF_ERROR_H + +/*****************************************************************************/ +/* Ethernet Interface Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ETH_INTF_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ETH_INTF_COMMAND_INVALID ((TLR_RESULT)0xC05D0001L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is locked. */ +/* */ +#define TLR_E_ETH_INTF_CONFIG_LOCK ((TLR_RESULT)0xC05D0002L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_INVALID_PACKET_LENGHT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length. */ +/* */ +#define TLR_E_ETH_INTF_INVALID_PACKET_LENGHT ((TLR_RESULT)0xC05D0003L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_INVALID_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid mode in request. */ +/* */ +#define TLR_E_ETH_INTF_INVALID_MODE ((TLR_RESULT)0xC05D0004L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_AUTO_NEGOTIATION_PORT_0 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for auto-negotiation port 0. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_AUTO_NEGOTIATION_PORT_0 ((TLR_RESULT)0xC05D0005L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_AUTO_NEGOTIATION_PORT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for auto-negotiation port 1. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_AUTO_NEGOTIATION_PORT_1 ((TLR_RESULT)0xC05D0006L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_DUPLEX_MODE_PORT_0 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for duplex mode port 0. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_DUPLEX_MODE_PORT_0 ((TLR_RESULT)0xC05D0007L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_DUPLEX_MODE_PORT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for duplex mode port 1. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_DUPLEX_MODE_PORT_1 ((TLR_RESULT)0xC05D0008L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_TRANSMISSION_RATE_PORT_0 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for transmission rate port 0. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_TRANSMISSION_RATE_PORT_0 ((TLR_RESULT)0xC05D0009L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_TRANSMISSION_RATE_PORT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for transmission rate port 1. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_TRANSMISSION_RATE_PORT_1 ((TLR_RESULT)0xC05D000AL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_AUTO_CROSSOVER_PORT_0 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for auto cross-over port 0. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_AUTO_CROSSOVER_PORT_0 ((TLR_RESULT)0xC05D000BL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_PARAM_AUTO_CROSSOVER_PORT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for auto cross-over port 1. */ +/* */ +#define TLR_E_ETH_INTF_PARAM_AUTO_CROSSOVER_PORT_1 ((TLR_RESULT)0xC05D000CL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_NO_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Task is not configured. */ +/* */ +#define TLR_E_ETH_INTF_NO_CONFIGURATION ((TLR_RESULT)0xC05D000DL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_APP_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* No application registered. */ +/* */ +#define TLR_E_ETH_INTF_APP_NOT_REGISTERED ((TLR_RESULT)0xC05D000EL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_APP_SET_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* Application set not ready. */ +/* */ +#define TLR_E_ETH_INTF_APP_SET_NOT_READY ((TLR_RESULT)0xC05D000FL) + +/* */ +/* MessageId: TLR_E_ETH_INTF_LINK_DOWN */ +/* */ +/* MessageText: */ +/* */ +/* No Ethernet link. */ +/* */ +#define TLR_E_ETH_INTF_LINK_DOWN ((TLR_RESULT)0xC05D0010L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_GET_SEND_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get send buffer. */ +/* */ +#define TLR_E_ETH_INTF_GET_SEND_BUFFER ((TLR_RESULT)0xC05D0011L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_SEND_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* Failed to send Ethernet frame. */ +/* */ +#define TLR_E_ETH_INTF_SEND_FRAME ((TLR_RESULT)0xC05D0012L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_SET_DRV_EDD_CFG */ +/* */ +/* MessageText: */ +/* */ +/* Failed to set driver EDD configuration. */ +/* */ +#define TLR_E_ETH_INTF_SET_DRV_EDD_CFG ((TLR_RESULT)0xC05D0013L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_INVALID_ETH_PORT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for ethernet port. */ +/* */ +#define TLR_E_ETH_INTF_INVALID_ETH_PORT ((TLR_RESULT)0xC05D0014L) + +/* */ +/* MessageId: TLR_E_ETH_INTF_UNKNOWN_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error detected. */ +/* */ +#define TLR_E_ETH_INTF_UNKNOWN_ERROR ((TLR_RESULT)0xC05DFFFFL) + + + + +#endif /* __ETH_INTF_ERROR_H */ + +#ifndef __ETHERCATMASTER_ERROR_H +#define __ETHERCATMASTER_ERROR_H + +/*****************************************************************************/ +/* EtherCAT Master Packet Status codes (EtherCAT Master Stack) */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COMMAND_INVALID ((TLR_RESULT)0xC0650001L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_NO_LINK */ +/* */ +/* MessageText: */ +/* */ +/* No link exists. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_NO_LINK ((TLR_RESULT)0xC0650002L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_ERROR_READING_BUSCONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Error during reading the bus configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_ERROR_READING_BUSCONFIG ((TLR_RESULT)0xC0650003L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_ERROR_PARSING_BUSCONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Error during processing the bus configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_ERROR_PARSING_BUSCONFIG ((TLR_RESULT)0xC0650004L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_ERROR_BUSSCAN_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Existing bus does not match configured bus. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_ERROR_BUSSCAN_FAILED ((TLR_RESULT)0xC0650005L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_NOT_ALL_SLAVES_AVAIL */ +/* */ +/* MessageText: */ +/* */ +/* Not all slaves are available. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_NOT_ALL_SLAVES_AVAIL ((TLR_RESULT)0xC0650006L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_STOPMASTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during Reset (stopping the master). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_STOPMASTER_ERROR ((TLR_RESULT)0xC0650007L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEINITMASTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during Reset (deinitialize the master). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEINITMASTER_ERROR ((TLR_RESULT)0xC0650008L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CLEANUP_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during Reset (cleanup the dynamic resources). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CLEANUP_ERROR ((TLR_RESULT)0xC0650009L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CRITIAL_ERROR_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Master is in critical error state, reset required. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CRITIAL_ERROR_STATE ((TLR_RESULT)0xC065000AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_BUSCYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* The requested bus cycle time is invalid. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_BUSCYCLETIME ((TLR_RESULT)0xC065000BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_BROKEN_SLAVE_BEHAVIOUR_PARA */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for broken slave behaviour. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_BROKEN_SLAVE_BEHAVIOUR_PARA ((TLR_RESULT)0xC065000CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_WRONG_INTERNAL_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Master is in wrong internal state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_WRONG_INTERNAL_STATE ((TLR_RESULT)0xC065000DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_WATCHDOG_TIMEOUT_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* The watchdog expired. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_WATCHDOG_TIMEOUT_EXPIRED ((TLR_RESULT)0xC065000EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALID_SLAVEID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid SlaveId was used for CoE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALID_SLAVEID ((TLR_RESULT)0xC065000FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_NO_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* No available resources for CoE transfer. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_NO_RESOURCE ((TLR_RESULT)0xC0650010L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INTERNAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Internal error during CoE usage. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INTERNAL_ERROR ((TLR_RESULT)0xC0650011L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALID_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave index requested. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALID_INDEX ((TLR_RESULT)0xC0650012L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALID_COMMUNICATION_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid bus communication state for CoE usage. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALID_COMMUNICATION_STATE ((TLR_RESULT)0xC0650013L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_FRAME_LOST */ +/* */ +/* MessageText: */ +/* */ +/* Frame with CoE data is lost. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_FRAME_LOST ((TLR_RESULT)0xC0650014L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout during CoE service. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_TIMEOUT ((TLR_RESULT)0xC0650015L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_SLAVE_NOT_ADDRESSABLE */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not addressable (not on bus or power down?). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_SLAVE_NOT_ADDRESSABLE ((TLR_RESULT)0xC0650016L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALID_LIST_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid list type requested (during GetOdList). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALID_LIST_TYPE ((TLR_RESULT)0xC0650017L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_SLAVE_RESPONSE_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* Data in Slave Response is too big for confirmation packet. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_SLAVE_RESPONSE_TOO_BIG ((TLR_RESULT)0xC0650018L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALID_ACCESSBITMASK */ +/* */ +/* MessageText: */ +/* */ +/* Invalid access mask selected (during GetEntryDesc). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALID_ACCESSBITMASK ((TLR_RESULT)0xC0650019L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_WKC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave Working Counter error during CoE service. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_WKC_ERROR ((TLR_RESULT)0xC065001AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SERVICE_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* The service is already in use. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SERVICE_IN_USE ((TLR_RESULT)0xC065001BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_COMMUNICATION_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Command is not useable in this communication state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_COMMUNICATION_STATE ((TLR_RESULT)0xC065001CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DC_NOT_ACTIVATED */ +/* */ +/* MessageText: */ +/* */ +/* Distributed Clocks must be activated for this command. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DC_NOT_ACTIVATED ((TLR_RESULT)0xC065001DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_BUS_SCAN_CURRENTLY_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan is currently running. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_BUS_SCAN_CURRENTLY_RUNNING ((TLR_RESULT)0xC065001EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_BUS_SCAN_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan Timeout. No slave found. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_BUS_SCAN_TIMEOUT ((TLR_RESULT)0xC065001FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_BUS_SCAN_NOT_READY_YET */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan is not ready yet. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_BUS_SCAN_NOT_READY_YET ((TLR_RESULT)0xC0650020L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_BUS_SCAN_INVALID_SLAVE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave. No information available. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_BUS_SCAN_INVALID_SLAVE ((TLR_RESULT)0xC0650021L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_INVALIDACCESS */ +/* */ +/* MessageText: */ +/* */ +/* Slave does not allow reading or writing (CoE access). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_INVALIDACCESS ((TLR_RESULT)0xC0650022L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_NO_MBX_SUPPORT */ +/* */ +/* MessageText: */ +/* */ +/* Slave does not support a mailbox. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_NO_MBX_SUPPORT ((TLR_RESULT)0xC0650023L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COE_NO_COE_SUPPORT */ +/* */ +/* MessageText: */ +/* */ +/* Slave does not support CoE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COE_NO_COE_SUPPORT ((TLR_RESULT)0xC0650024L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_TASK_CREATION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Task could not be created during runtime. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_TASK_CREATION_FAILED ((TLR_RESULT)0xC0650025L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_SLAVE_SM_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* The Sync Manager configuration of a slave is invalid. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_SLAVE_SM_CONFIGURATION ((TLR_RESULT)0xC0650026L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TOGGLE */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Toggle bit not alternated. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TOGGLE ((TLR_RESULT)0xC0650027L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: SDO protocol timed out. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TIMEOUT ((TLR_RESULT)0xC0650028L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_CCS_SCS */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Client/server command specifier not valid or unknown. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_CCS_SCS ((TLR_RESULT)0xC0650029L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_BLK_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Invalid block size (block mode only). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_BLK_SIZE ((TLR_RESULT)0xC065002AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_SEQNO */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Invalid sequence number (block mode only). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_SEQNO ((TLR_RESULT)0xC065002BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_CRC */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: CRC error (block mode only). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_CRC ((TLR_RESULT)0xC065002CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Out of memory. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_MEMORY ((TLR_RESULT)0xC065002DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Unsupported access to an object. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_ACCESS ((TLR_RESULT)0xC065002EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_WRITEONLY */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Attempt to read a write only object. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_WRITEONLY ((TLR_RESULT)0xC065002FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_READONLY */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Attempt to write a read only object. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_READONLY ((TLR_RESULT)0xC0650030L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Object does not exist in the object dictionary. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_INDEX ((TLR_RESULT)0xC0650031L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_PDO_MAP */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Object cannot be mapped to the PDO. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_PDO_MAP ((TLR_RESULT)0xC0650032L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_PDO_LEN */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: The number and length of the objects to be mapped would exceed PDO length. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_PDO_LEN ((TLR_RESULT)0xC0650033L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_P_INCOMP */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: General parameter incompatibility reason. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_P_INCOMP ((TLR_RESULT)0xC0650034L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_I_INCOMP */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: General internal incompatibility in the device. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_I_INCOMP ((TLR_RESULT)0xC0650035L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_HARDWARE */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Access failed due to an hardware error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_HARDWARE ((TLR_RESULT)0xC0650036L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data type does not match, length of service parameter does not match. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE ((TLR_RESULT)0xC0650037L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE1 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data type does not match, length of service parameter too high. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE1 ((TLR_RESULT)0xC0650038L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE2 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data type does not match, length of service parameter too low. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_SIZE2 ((TLR_RESULT)0xC0650039L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Sub-index does not exist. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_OFFSET ((TLR_RESULT)0xC065003AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Value range of parameter exceeded (only for write access). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE ((TLR_RESULT)0xC065003BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE1 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Value of parameter written too high. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE1 ((TLR_RESULT)0xC065003CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE2 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Value of parameter written too low. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DATA_RANGE2 ((TLR_RESULT)0xC065003DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_MINMAX */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Maximum value is less than minimum value. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_MINMAX ((TLR_RESULT)0xC065003EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_GENERAL */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: general error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_GENERAL ((TLR_RESULT)0xC065003FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data cannot be transferred or stored to the application. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER ((TLR_RESULT)0xC0650040L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER1 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data cannot be transferred or stored to the application because of local control. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER1 ((TLR_RESULT)0xC0650041L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER2 */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Data cannot be transferred or stored to the application because of the present device state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_TRANSFER2 ((TLR_RESULT)0xC0650042L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DICTIONARY */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: Object dictionary dynamic generation fails or no object dictionary is present (e.g. object dictionary is generated from file and generation fails because of an file error). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_DICTIONARY ((TLR_RESULT)0xC0650043L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* SDO abort code: unknown code. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_SDO_ABORTCODE_UNKNOWN ((TLR_RESULT)0xC0650044L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Unspecified error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_ERROR ((TLR_RESULT)0xC0650045L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVREQSTATECNG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid requested state change. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVREQSTATECNG ((TLR_RESULT)0xC0650046L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_UNKREQSTATE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Unknown requested state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_UNKREQSTATE ((TLR_RESULT)0xC0650047L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_BOOTSTRAPNSUPP */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Bootstrap not supported. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_BOOTSTRAPNSUPP ((TLR_RESULT)0xC0650048L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDFW */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: No valid firmware. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDFW ((TLR_RESULT)0xC0650049L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDMBXCNF1 */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid mailbox configuration1. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDMBXCNF1 ((TLR_RESULT)0xC065004AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDMBXCNF2 */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid mailbox configuration2. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDMBXCNF2 ((TLR_RESULT)0xC065004BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDSMCNF */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid sync manager configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVALIDSMCNF ((TLR_RESULT)0xC065004CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDIN */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: No valid inputs available. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDIN ((TLR_RESULT)0xC065004DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDOUT */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: No valid outputs. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_NOVALIDOUT ((TLR_RESULT)0xC065004EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SYNCERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Synchronization error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SYNCERROR ((TLR_RESULT)0xC065004FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SMWATCHDOG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Sync manager watchdog. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SMWATCHDOG ((TLR_RESULT)0xC0650050L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVSMTYPES */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Sync Manager Types. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVSMTYPES ((TLR_RESULT)0xC0650051L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVOUTCONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Output Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVOUTCONFIG ((TLR_RESULT)0xC0650052L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVINCONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Input Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVINCONFIG ((TLR_RESULT)0xC0650053L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVWDCONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Watchdog Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVWDCONFIG ((TLR_RESULT)0xC0650054L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDCOLDRS */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Slave needs cold start. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDCOLDRS ((TLR_RESULT)0xC0650055L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDINIT */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Slave needs INIT. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDINIT ((TLR_RESULT)0xC0650056L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDPREOP */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Slave needs PREOP. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDPREOP ((TLR_RESULT)0xC0650057L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDSAFEOP */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Slave needs SAFEOP. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_SLVNEEDSAFEOP ((TLR_RESULT)0xC0650058L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVOUTFMMUCNFG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Output FMMU Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVOUTFMMUCNFG ((TLR_RESULT)0xC0650059L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVINFMMUCNFG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid Input FMMU Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVINFMMUCNFG ((TLR_RESULT)0xC065005AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCSYNCCNFG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid DC SYNCH Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCSYNCCNFG ((TLR_RESULT)0xC065005BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCLATCHCNFG */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid DC Latch Configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCLATCHCNFG ((TLR_RESULT)0xC065005CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_PLLERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: PLL Error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_PLLERROR ((TLR_RESULT)0xC065005DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCIOERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid DC IO Error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCIOERROR ((TLR_RESULT)0xC065005EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCTOERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: Invalid DC Timeout Error. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_INVDCTOERROR ((TLR_RESULT)0xC065005FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_EOE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: MBX_EOE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_EOE ((TLR_RESULT)0xC0650060L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_COE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: MBX_COE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_COE ((TLR_RESULT)0xC0650061L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_FOE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: MBX_FOE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_FOE ((TLR_RESULT)0xC0650062L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_SOE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: MBX_SOE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_SOE ((TLR_RESULT)0xC0650063L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_VOE */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: MBX_VOE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_MBX_VOE ((TLR_RESULT)0xC0650064L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_OTHER */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: vendor specific error code. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_DEVICE_STATUSCODE_OTHER ((TLR_RESULT)0xC0650065L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_PREVIOUS_PORT_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* Slave status code: PreviousPort configuration missing in bus configuration file (outdated configurator). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_PREVIOUS_PORT_MISSING ((TLR_RESULT)0xC0650066L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_ALREADY_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* Configuration already started, cannot be started again. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_ALREADY_STARTED ((TLR_RESULT)0xC0650067L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* Configuration was not started before. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_NOT_STARTED ((TLR_RESULT)0xC0650068L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_INDEX_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Slave index already exists, cannot be created again. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_INDEX_ALREADY_EXISTS ((TLR_RESULT)0xC0650069L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_PHYS_ADDR_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Slave physical address already exits, cannot be created again. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_PHYS_ADDR_ALREADY_EXISTS ((TLR_RESULT)0xC065006AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_AUTOINC_ADDR_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Slave auto increment address already exits, cannot be created again. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_AUTOINC_ADDR_ALREADY_EXISTS ((TLR_RESULT)0xC065006BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_INDEX_NOT_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Slave index does not exists, must be created before. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_CONFIG_SLAVE_INDEX_NOT_EXISTS ((TLR_RESULT)0xC065006CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_WRONG_VALIDATE_DATA_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Wrong length value for validate data. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_WRONG_VALIDATE_DATA_LEN ((TLR_RESULT)0xC065006DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_ECAT_CMD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for EtherCAT command. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_ECAT_CMD ((TLR_RESULT)0xC065006EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_PRECONFIGURED_DATA_CURRENTLY_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Sending preconfigured cyclic data is currently not supported. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_PRECONFIGURED_DATA_CURRENTLY_NOT_SUPPORTED ((TLR_RESULT)0xC065006FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for EtherCAT state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_STATE ((TLR_RESULT)0xC0650070L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_INVALID_TRANSITION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for EtherCAT transition. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_INVALID_TRANSITION ((TLR_RESULT)0xC0650071L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_COPY_INFOS_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum amount of copy infos exeeded. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_COPY_INFOS_EXCEEDED ((TLR_RESULT)0xC0650072L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_REDUNDANCY_AND_DC_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* Redundancy and Distributed clocks enabled at the same time (not possible). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_REDUNDANCY_AND_DC_ENABLED ((TLR_RESULT)0xC0650073L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_NO_SLAVES_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* At least one slave must be configured. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_NO_SLAVES_CONFIGURED ((TLR_RESULT)0xC0650074L) + + + + +#endif /* __ETHERCATMASTER_ERROR_H */ + +#ifndef __ETHERCATMASTERAPTASK_ERROR_H +#define __ETHERCATMASTERAPTASK_ERROR_H + +/*****************************************************************************/ +/* EtherCAT Master AP Packet Status codes (EtherCAT Master AP Task) */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_COMMAND_INVALID ((TLR_RESULT)0xC0640001L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_DPM_WATCHDOG_TIMEOUT_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* The watchdog expired. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_DPM_WATCHDOG_TIMEOUT_EXPIRED ((TLR_RESULT)0xC0640002L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_TIME_TOO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* The requested Watchdog time is too small. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_TIME_TOO_SMALL ((TLR_RESULT)0xC0640003L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_TIME_TOO_LARGE */ +/* */ +/* MessageText: */ +/* */ +/* The requested Watchdog time is too large. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_TIME_TOO_LARGE ((TLR_RESULT)0xC0640004L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_RESET_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during Reset (resetting watchdog). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_RESET_ERROR ((TLR_RESULT)0xC0640005L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_CLEANUP_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during Reset (cleanup the dynamic resources). */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_CLEANUP_ERROR ((TLR_RESULT)0xC0640006L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_CRITIAL_ERROR_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Master is in critical error state, reset required. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_CRITIAL_ERROR_STATE ((TLR_RESULT)0xC0640007L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_ACTIVATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error activating the watchdog. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_WATCHDOG_ACTIVATE_ERROR ((TLR_RESULT)0xC0640008L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_INPUT_DATA_TOO_LARGE */ +/* */ +/* MessageText: */ +/* */ +/* Size of configured input data is larger than cyclic DPM input data size. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_INPUT_DATA_TOO_LARGE ((TLR_RESULT)0xC0640009L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_OUTPUT_DATA_TOO_LARGE */ +/* */ +/* MessageText: */ +/* */ +/* Size of configured output data is larger than cyclic DPM output data size. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_OUTPUT_DATA_TOO_LARGE ((TLR_RESULT)0xC064000AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_ENABLE_BUS_SYNC_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Bus Synchronus mode could not be activated. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_ENABLE_BUS_SYNC_FAILED ((TLR_RESULT)0xC064000BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_TASK_CREATION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Task could not be created during runtime. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_TASK_CREATION_FAILED ((TLR_RESULT)0xC064000CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_DEVICE_ECS */ +/* */ +/* MessageText: */ +/* */ +/* NXD: 1:1 relation broken DEVICE -> ECS. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_DEVICE_ECS ((TLR_RESULT)0xC064000DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_CONTROLLER_ECM */ +/* */ +/* MessageText: */ +/* */ +/* NXD: 1:1 relation broken DEVICE -> ECM. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_CONTROLLER_ECM ((TLR_RESULT)0xC064000EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_MBX */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken ECS -> MBX. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_MBX ((TLR_RESULT)0xC064000FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_PROCESSDATA */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken ECS -> PROCESSDATA. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_PROCESSDATA ((TLR_RESULT)0xC0640010L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_PREVIOUSPORT */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken ECS -> PREVIOUSPORT. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_ECS_PREVIOUSPORT ((TLR_RESULT)0xC0640011L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_MBX_COE */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken MBX -> COE. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_MBX_COE ((TLR_RESULT)0xC0640012L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_COE_INITCMDSCOE */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken COE -> COEINITCMDS. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_COE_INITCMDSCOE ((TLR_RESULT)0xC0640013L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_CYCLIC_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken CYCLIC -> FRAME. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_CYCLIC_FRAME ((TLR_RESULT)0xC0640014L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_FRAME_CYCLICCMD */ +/* */ +/* MessageText: */ +/* */ +/* NXD: relation broken FRAME -> CYCLICCMD. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_BROKEN_RELATION_FRAME_CYCLICCMD ((TLR_RESULT)0xC0640015L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_INITCMDS */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on INITCMD handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_INITCMDS ((TLR_RESULT)0xC0640016L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_CYCLIC */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on CYCLIC handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_CYCLIC ((TLR_RESULT)0xC0640017L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on FRAME handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_FRAME ((TLR_RESULT)0xC0640018L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_CYCLICCMD */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on CYCLICCMD handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_CYCLICCMD ((TLR_RESULT)0xC0640019L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_DEVICES */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on DEVICES handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_DEVICES ((TLR_RESULT)0xC0640020L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_STATE */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error, wrong state. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_STATE ((TLR_RESULT)0xC0640021L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_COE_INITCMD */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on COE_INITCMD handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_COE_INITCMD ((TLR_RESULT)0xC0640022L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_ECM */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on ECM handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_ECM ((TLR_RESULT)0xC0640023L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* NXD: interal error on SYNC handing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_INTERROR_SYNC ((TLR_RESULT)0xC0640024L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_CHDIR_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* NXD: Change Directory failed. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_CHDIR_FAILED ((TLR_RESULT)0xC0640025L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_INVALID_INITCMD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid InitCmd length configuration */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_INVALID_INITCMD_LEN ((TLR_RESULT)0xC0640026L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_INVALID_CYCLICCMD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid CyclicCmd length configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_INVALID_CYCLICCMD_LEN ((TLR_RESULT)0xC0640027L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_CONFIG_BY_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is done by "ethercat.xml" or "config.nxd", packet interface inactive. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_CONFIG_BY_FILE ((TLR_RESULT)0xC0640028L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_INVALID_COE_INITCMD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid CoE-InitCmd length configuration. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_INVALID_COE_INITCMD_LEN ((TLR_RESULT)0xC0640029L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CONTROLLERORADAPTER */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table CONTROLLERORADAPTER missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CONTROLLERORADAPTER ((TLR_RESULT)0xC064002AL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_DEVICES */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table DEVICES missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_DEVICES ((TLR_RESULT)0xC064002BL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_ECM */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table ECM missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_ECM ((TLR_RESULT)0xC064002CL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_ECS */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table ECS missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_ECS ((TLR_RESULT)0xC064002DL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_INITCMDS */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table INITCMDS missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_INITCMDS ((TLR_RESULT)0xC064002EL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CYCLIC */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table CYCLIC missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CYCLIC ((TLR_RESULT)0xC064002FL) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table FRAME missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_FRAME ((TLR_RESULT)0xC0640030L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CYCLICCMD */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table CYCLICCMD missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_CYCLICCMD ((TLR_RESULT)0xC0640031L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_PROCESSDATA */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table PROCESSDATA missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_PROCESSDATA ((TLR_RESULT)0xC0640032L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_PREVIOUSPORT */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table PREVIOUSPORT missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_PREVIOUSPORT ((TLR_RESULT)0xC0640033L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_MBX */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table MBX missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_MBX ((TLR_RESULT)0xC0640034L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_COE */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table COE missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_COE ((TLR_RESULT)0xC0640035L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_INITCMDS_COE */ +/* */ +/* MessageText: */ +/* */ +/* NXD: table INITCMDS_COE missing. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_IDENTIFY_FAILED_INITCMDS_COE ((TLR_RESULT)0xC0640036L) + +/* */ +/* MessageId: TLR_E_ETHERCAT_MASTER_AP_NXD_NO_SLAVES_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* At least one slave must be configured. */ +/* */ +#define TLR_E_ETHERCAT_MASTER_AP_NXD_NO_SLAVES_CONFIGURED ((TLR_RESULT)0xC0640037L) + + + + +#endif /* __ETHERCATMASTERAPTASK_ERROR_H */ + +#ifndef __EXAMPLE_TASKS_ERROR_H +#define __EXAMPLE_TASKS_ERROR_H + +/*****************************************************************************/ +/* Example Task 1 Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EXAMPLETASK1_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EXAMPLETASK1_INVALID_COMMAND ((TLR_RESULT)0xC0030001L) + +/* */ +/* MessageId: TLR_E_EXAMPLETASK1_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_EXAMPLETASK1_PROCESS_CANCELED ((TLR_RESULT)0xC0030002L) + +/* */ +/* MessageId: TLR_I_EXAMPLETASK1_TEST_COUNTER_ODD */ +/* */ +/* MessageText: */ +/* */ +/* Counter value of Test-Command is odd. */ +/* */ +#define TLR_I_EXAMPLETASK1_TEST_COUNTER_ODD ((TLR_RESULT)0x40030003L) + +/*****************************************************************************/ +/* Example Task 2 Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EXAMPLETASK2_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EXAMPLETASK2_INVALID_COMMAND ((TLR_RESULT)0xC0040001L) + +/* */ +/* MessageId: TLR_E_EXAMPLETASK2_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_EXAMPLETASK2_PROCESS_CANCELED ((TLR_RESULT)0xC0040002L) + +/* */ +/* MessageId: TLR_I_EXAMPLETASK2_TEST_COUNTER_ODD */ +/* */ +/* MessageText: */ +/* */ +/* Counter value of Test-Command is odd. */ +/* */ +#define TLR_I_EXAMPLETASK2_TEST_COUNTER_ODD ((TLR_RESULT)0x40040003L) + +/*****************************************************************************/ +/* Example Task 3 Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_EXAMPLETASK3_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_EXAMPLETASK3_INVALID_COMMAND ((TLR_RESULT)0xC0050001L) + +/* */ +/* MessageId: TLR_E_EXAMPLETASK3_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_EXAMPLETASK3_PROCESS_CANCELED ((TLR_RESULT)0xC0050002L) + +/* */ +/* MessageId: TLR_I_EXAMPLETASK3_TEST_COUNTER_ODD */ +/* */ +/* MessageText: */ +/* */ +/* Counter value of Test-Command is odd. */ +/* */ +#define TLR_I_EXAMPLETASK3_TEST_COUNTER_ODD ((TLR_RESULT)0x40050003L) + + + + +#endif /* __EXAMPLE_TASKS_ERROR_H */ + +#ifndef __FODMI_ERROR_H +#define __FODMI_ERROR_H + +/*****************************************************************************/ +/* FODMI Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_FODMI_TASK_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Command not valid. */ +/* */ +#define TLR_E_FODMI_TASK_COMMAND_INVALID ((TLR_RESULT)0xC0960001L) + +/* */ +/* MessageId: TLR_DIAG_E_FODMI_TASK_INIT_LOCAL_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failure at create que in init local. */ +/* */ +#define TLR_DIAG_E_FODMI_TASK_INIT_LOCAL_CREATE_QUE_FAILED ((TLR_RESULT)0xC0960002L) + +/* */ +/* MessageId: TLR_DIAG_E_FODMI_TASK_INIT_REMOTE_IDENT_EDD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Identifie EDD (at init remote) faild. */ +/* */ +#define TLR_DIAG_E_FODMI_TASK_INIT_REMOTE_IDENT_EDD_FAILED ((TLR_RESULT)0xC0960003L) + +/* */ +/* MessageId: TLR_DIAG_E_FODMI_TASK_INIT_REMOTE_IDENT_APPLICATION_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failure identifie the application queue. */ +/* */ +#define TLR_DIAG_E_FODMI_TASK_INIT_REMOTE_IDENT_APPLICATION_QUE_FAILED ((TLR_RESULT)0xC0960004L) + +/* */ +/* MessageId: TLR_DIAG_E_FODMI_TASK_EPMAP_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failure at creation of EPMap */ +/* */ +#define TLR_DIAG_E_FODMI_TASK_EPMAP_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC0960005L) + + + + +#endif /* __FODMI_ERROR_H */ + +#ifndef __ICONL_ERROR_H +#define __ICONL_ERROR_H + +/*****************************************************************************/ +/* iCon-L Run Task Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ICONL_RUN_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ICONL_RUN_INVALID_COMMAND ((TLR_RESULT)0xC0290001L) + +/* */ +/* MessageId: TLR_E_ICONL_RUN_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_ICONL_RUN_PROCESS_CANCELED ((TLR_RESULT)0xC0290002L) + +/*****************************************************************************/ +/* iCon-L Timer Task Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ICONL_TIMER_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_ICONL_TIMER_INVALID_COMMAND ((TLR_RESULT)0xC02A0001L) + +/* */ +/* MessageId: TLR_E_ICONL_TIMER_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_ICONL_TIMER_PROCESS_CANCELED ((TLR_RESULT)0xC02A0002L) + + + + +#endif /* __ICONL_ERROR_H */ + +#ifndef __INX_ERROR_H +#define __INX_ERROR_H + +/*****************************************************************************/ +/* Hilscher INX error definitions */ +/*****************************************************************************/ + +/* */ +/* MessageId: TLR_E_INX_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* INX API not initialized. */ +/* */ +#define TLR_E_INX_NOT_INITIALIZED ((TLR_RESULT)0xC0930001L) + +/* */ +/* MessageId: TLR_E_INX_LOCK_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Lock operation failed. */ +/* */ +#define TLR_E_INX_LOCK_FAILED ((TLR_RESULT)0xC0930002L) + +/* */ +/* MessageId: TLR_E_INX_UNLOCK_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Unlock operation failed. */ +/* */ +#define TLR_E_INX_UNLOCK_FAILED ((TLR_RESULT)0xC0930003L) + +/* */ +/* MessageId: TLR_E_INX_NOT_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* Not connected to an API. */ +/* */ +#define TLR_E_INX_NOT_CONNECTED ((TLR_RESULT)0xC0930004L) + +/* */ +/* MessageId: TLR_E_INX_CALLBACK_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* No callback registered. */ +/* */ +#define TLR_E_INX_CALLBACK_ERROR ((TLR_RESULT)0xC0930005L) + +/* */ +/* MessageId: TLR_E_INX_INVALID_API_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid API number. */ +/* */ +#define TLR_E_INX_INVALID_API_NUMBER ((TLR_RESULT)0xC0930006L) + +/* */ +/* MessageId: TLR_E_INX_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid handle. */ +/* */ +#define TLR_E_INX_INVALID_HANDLE ((TLR_RESULT)0xC0930007L) + +/* */ +/* MessageId: TLR_E_INX_INVALID_POINTER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid pointer. */ +/* */ +#define TLR_E_INX_INVALID_POINTER ((TLR_RESULT)0xC0930008L) + +/* */ +/* MessageId: TLR_E_INX_RESOURCE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Resource creation failed. */ +/* */ +#define TLR_E_INX_RESOURCE_CREATE_FAILED ((TLR_RESULT)0xC0930009L) + +/* */ +/* MessageId: TLR_E_INX_RESOURCE_DELETE_NONEXISTING */ +/* */ +/* MessageText: */ +/* */ +/* Resource to be deleted does not exist. */ +/* */ +#define TLR_E_INX_RESOURCE_DELETE_NONEXISTING ((TLR_RESULT)0xC093000AL) + +/* */ +/* MessageId: TLR_E_INX_OPEN_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* Limit of active inxOpen calls exceeded. */ +/* */ +#define TLR_E_INX_OPEN_LIMIT ((TLR_RESULT)0xC093000BL) + +/* */ +/* MessageId: TLR_E_INX_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Call to inxClose without preceding call to inxOpen. */ +/* */ +#define TLR_E_INX_NOT_OPEN ((TLR_RESULT)0xC093000CL) + +/* */ +/* MessageId: TLR_E_INX_CONNECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Call to inxConnect failed. */ +/* */ +#define TLR_E_INX_CONNECT_FAILED ((TLR_RESULT)0xC093000DL) + +/* */ +/* MessageId: TLR_E_INX_DISCONNECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Call to inxDisconnect failed. */ +/* */ +#define TLR_E_INX_DISCONNECT_FAILED ((TLR_RESULT)0xC093000EL) + +/* */ +/* MessageId: TLR_E_INX_CONTROL_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Call to INX control function failed. */ +/* */ +#define TLR_E_INX_CONTROL_FAILED ((TLR_RESULT)0xC093000FL) + +/* */ +/* MessageId: TLR_E_INX_CONTROL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout during call to INX control function. */ +/* */ +#define TLR_E_INX_CONTROL_TIMEOUT ((TLR_RESULT)0xC0930010L) + +/* */ +/* MessageId: TLR_E_INX_PACKET_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* Packet size exceeds INX mailbox size. */ +/* */ +#define TLR_E_INX_PACKET_TOO_BIG ((TLR_RESULT)0xC0930011L) + +/* */ +/* MessageId: TLR_E_INX_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Mailbox send operation failed. */ +/* */ +#define TLR_E_INX_PACKET_SEND_FAILED ((TLR_RESULT)0xC0930012L) + +/* */ +/* MessageId: TLR_E_INX_IO_TOO_MUCH_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Too much data while accessing INX input/output area. */ +/* */ +#define TLR_E_INX_IO_TOO_MUCH_DATA ((TLR_RESULT)0xC0930013L) + + + + +#endif /* __INX_ERROR_H */ + +#ifndef __IOLINK_MASTER_ERROR_H +#define __IOLINK_MASTER_ERROR_H + +/*****************************************************************************/ +/* IO-Link Master Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_IOLINK_MASTER_INVALID_COMMAND ((TLR_RESULT)0xC06D0001L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for object. */ +/* */ +#define TLR_E_IOLINK_MASTER_INVALID_PARAMETER ((TLR_RESULT)0xC06D0002L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_GET_SEND_CONFIRMATION */ +/* */ +/* MessageText: */ +/* */ +/* Error occurs on getting send confirmation with a HAL function IOLM_GetSendConfirmation(). */ +/* */ +#define TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_GET_SEND_CONFIRMATION ((TLR_RESULT)0xC06D0003L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_PARITY */ +/* */ +/* MessageText: */ +/* */ +/* Parity error occurs during receiving of device frame - (PL) Physical Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_PARITY ((TLR_RESULT)0xC06D0004L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_FRAMING */ +/* */ +/* MessageText: */ +/* */ +/* Framing error occurs during receiving of device frame - (PL) Physical Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_FRAMING ((TLR_RESULT)0xC06D0005L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* Buffer overflow on receiving of device frame - (PL) Physical Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_PL_TRANSFER_IND_ERROR_OVERRUN ((TLR_RESULT)0xC06D0006L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_DL_NOT_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* Error in DL_SetMode service - device not connected - (DL-B) Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_DL_NOT_CONNECTED ((TLR_RESULT)0xC06D0007L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_DL_STATE_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* Error in DL_SetMode service - state conflict - (DL-B) Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_DL_STATE_CONFLICT ((TLR_RESULT)0xC06D0008L) + +/* */ +/* MessageId: TLR_E_IOLINK_MASTER_DL_PARAMETER_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* Error in DL_SetMode service - wrong parameter - (DL-B) Layer. */ +/* */ +#define TLR_E_IOLINK_MASTER_DL_PARAMETER_CONFLICT ((TLR_RESULT)0xC06D0009L) + + + + +#endif /* __IOLINK_MASTER_ERROR_H */ + +#ifndef __IO_SIGNALS_ERROR_H +#define __IO_SIGNALS_ERROR_H + +/*****************************************************************************/ +/* IO Signal task ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_IO_SIGNAL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_IO_SIGNAL_COMMAND_INVALID ((TLR_RESULT)0xC0910001L) + +/* */ +/* MessageId: TLR_E_IO_SIGNAL_INVALID_SIGNAL_DIRECTION */ +/* */ +/* MessageText: */ +/* */ +/* The value of signal direction is invalid. */ +/* */ +#define TLR_E_IO_SIGNAL_INVALID_SIGNAL_DIRECTION ((TLR_RESULT)0xC0910002L) + +/* */ +/* MessageId: TLR_E_IO_SIGNAL_INVALID_SIGNAL_AMOUNT */ +/* */ +/* MessageText: */ +/* */ +/* The value of signal amountis is invalid. */ +/* */ +#define TLR_E_IO_SIGNAL_INVALID_SIGNAL_AMOUNT ((TLR_RESULT)0xC0910003L) + +/* */ +/* MessageId: TLR_E_IO_SIGNAL_INVALID_SIGNAL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The value of signal type is invalid. */ +/* */ +#define TLR_E_IO_SIGNAL_INVALID_SIGNAL_TYPE ((TLR_RESULT)0xC0910004L) + +/* */ +/* MessageId: TLR_E_IO_SIGNAL_UNSUPPORTED_SIGNAL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The value of signal type is unsupported. */ +/* */ +#define TLR_E_IO_SIGNAL_UNSUPPORTED_SIGNAL_TYPE ((TLR_RESULT)0xC0910005L) + + + + +#endif /* __IO_SIGNALS_ERROR_H */ + +#ifndef __ITEM_SERVER_ERROR_H +#define __ITEM_SERVER_ERROR_H + +/*****************************************************************************/ +/* ITEM Server Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ITEM_SERVER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_ITEM_SERVER_COMMAND_INVALID ((TLR_RESULT)0xC0870001L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_GROUP_NOT_DEFINED */ +/* */ +/* MessageText: */ +/* */ +/* The requested group is not defined. */ +/* */ +#define TLR_E_ITEM_SERVER_GROUP_NOT_DEFINED ((TLR_RESULT)0xC0870002L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_NOT_ENOUGH_DYN_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* There is not memory enough to process the request. */ +/* */ +#define TLR_E_ITEM_SERVER_NOT_ENOUGH_DYN_MEMORY ((TLR_RESULT)0xC0870003L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_NOT_DEFINED */ +/* */ +/* MessageText: */ +/* */ +/* The requested item is not defined. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_NOT_DEFINED ((TLR_RESULT)0xC0870004L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_TOO_MANY_ITEMS_REQUESTED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum number of requsetd items has been exceeded. */ +/* */ +#define TLR_E_ITEM_SERVER_TOO_MANY_ITEMS_REQUESTED ((TLR_RESULT)0xC0870005L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_IVALID_ITEM_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* The item's parameter is not valid. */ +/* */ +#define TLR_E_ITEM_SERVER_IVALID_ITEM_PARAMETER ((TLR_RESULT)0xC0870006L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_REQUEST_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* There is a request in progress. */ +/* */ +#define TLR_E_ITEM_SERVER_REQUEST_IN_PROGRESS ((TLR_RESULT)0xC0870007L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_OUT_OF_IO_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* The sum of all items' data length and status length can not fit into IO image. */ +/* */ +#define TLR_E_ITEM_SERVER_OUT_OF_IO_MEMORY ((TLR_RESULT)0xC0870008L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_ALREADY_APPENDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested item has already been appended to the group. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_ALREADY_APPENDED ((TLR_RESULT)0xC0870009L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_LOCKED_GROUP_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* The group is Locked/Active. */ +/* */ +#define TLR_E_ITEM_SERVER_LOCKED_GROUP_ACTIVE ((TLR_RESULT)0xC0870010L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_UNSUPPORTED_DB_FORMAT */ +/* */ +/* MessageText: */ +/* */ +/* The database file format is not supported. */ +/* */ +#define TLR_E_ITEM_SERVER_UNSUPPORTED_DB_FORMAT ((TLR_RESULT)0xC0870011L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_INVALID_STATUS_ID */ +/* */ +/* MessageText: */ +/* */ +/* The requested info type is invalid. */ +/* */ +#define TLR_E_ITEM_SERVER_INVALID_STATUS_ID ((TLR_RESULT)0xC0870012L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_PROT_STACK_UNINITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* The corresponding protocol stack is not initialized properly. */ +/* */ +#define TLR_E_ITEM_SERVER_PROT_STACK_UNINITIALIZED ((TLR_RESULT)0xC0870013L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_IS_READ_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* The requested item is Read-Only. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_IS_READ_ONLY ((TLR_RESULT)0xC0870014L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_IS_WRITE_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* The requested item is Write-Only. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_IS_WRITE_ONLY ((TLR_RESULT)0xC0870015L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_IS_INPUT */ +/* */ +/* MessageText: */ +/* */ +/* The requested item is Input type. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_IS_INPUT ((TLR_RESULT)0xC0870016L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_INVALID_ADMININFO_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong administration info type. */ +/* */ +#define TLR_E_ITEM_SERVER_INVALID_ADMININFO_TYPE ((TLR_RESULT)0xC0870017L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_INVALID_CIP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* The requested CIP parameter is invalid. */ +/* */ +#define TLR_E_ITEM_SERVER_INVALID_CIP_PARAMETER ((TLR_RESULT)0xC0870018L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_NO_ITEMS_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* No items have been found into database. */ +/* */ +#define TLR_E_ITEM_SERVER_NO_ITEMS_FOUND ((TLR_RESULT)0xC0870019L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_PROT_STACK_READY_FLAG_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* The READY flag of the correposnding protocol is not set. */ +/* */ +#define TLR_E_ITEM_SERVER_PROT_STACK_READY_FLAG_NOT_SET ((TLR_RESULT)0xC087001AL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_PROT_STACK_RUN_FLAG_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* The RUN flag of the correposnding protocol is not set. */ +/* */ +#define TLR_E_ITEM_SERVER_PROT_STACK_RUN_FLAG_NOT_SET ((TLR_RESULT)0xC087001BL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_PROT_STACK_COM_FLAG_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* The COM flag of the correposnding protocol is not set. */ +/* */ +#define TLR_E_ITEM_SERVER_PROT_STACK_COM_FLAG_NOT_SET ((TLR_RESULT)0xC087001CL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_PROT_STACK_IO_EXCHANGE_ERR */ +/* */ +/* MessageText: */ +/* */ +/* Cyclic exchange with protocol stack faild. */ +/* */ +#define TLR_E_ITEM_SERVER_PROT_STACK_IO_EXCHANGE_ERR ((TLR_RESULT)0xC087001DL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_BAD_ITEM_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* The status of requested item is not valid. */ +/* */ +#define TLR_E_ITEM_SERVER_BAD_ITEM_STATUS ((TLR_RESULT)0xC087001EL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_UNSUPPORTED_ITEM_STATUS_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Signal status length not valid. */ +/* */ +#define TLR_E_ITEM_SERVER_UNSUPPORTED_ITEM_STATUS_LEN ((TLR_RESULT)0xC087001FL) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_SRCLEN_NOT_EQUALTO_DPMLEN */ +/* */ +/* MessageText: */ +/* */ +/* The destination and source lengths of an item are not equal. */ +/* */ +#define TLR_E_ITEM_SERVER_SRCLEN_NOT_EQUALTO_DPMLEN ((TLR_RESULT)0xC0870020L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_SIGNAL_STATUS_PATH_FORMAT */ +/* */ +/* MessageText: */ +/* */ +/* Signal status path format is not valid. */ +/* */ +#define TLR_E_ITEM_SERVER_SIGNAL_STATUS_PATH_FORMAT ((TLR_RESULT)0xC0870021L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_ITEM_IS_COMMON_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* The requested item is Common-Status-Type. */ +/* */ +#define TLR_E_ITEM_SERVER_ITEM_IS_COMMON_STATUS ((TLR_RESULT)0xC0870022L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_UNKNOWN_PROT_STACK_CONF_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Unknown name of protocol configuration file. */ +/* */ +#define TLR_E_ITEM_SERVER_UNKNOWN_PROT_STACK_CONF_NAME ((TLR_RESULT)0xC0870023L) + +/* */ +/* MessageId: TLR_E_ITEM_SERVER_UNKNOW_CONF_MD5_CHECKSUM */ +/* */ +/* MessageText: */ +/* */ +/* Invalid database MD5 check sum. */ +/* */ +#define TLR_E_ITEM_SERVER_UNKNOW_CONF_MD5_CHECKSUM ((TLR_RESULT)0xC0870024L) + + + + +#endif /* __ITEM_SERVER_ERROR_H */ + +#ifndef __LLDP_ERROR_H +#define __LLDP_ERROR_H + + +/*****************************************************************************/ +/* LLDp Protocol */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_LLDP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_LLDP_COMMAND_INVALID ((TLR_RESULT)0xC03E0001L) + +/* */ +/* MessageId: TLR_I_LLDP_UNKNOWN_TLV */ +/* */ +/* MessageText: */ +/* */ +/* Unknwon TLV found. */ +/* */ +#define TLR_I_LLDP_UNKNOWN_TLV ((TLR_RESULT)0x403E0002L) + +/* */ +/* MessageId: TLR_E_LLDP_PDU_MAX_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum Ethernet frame size exceeded. */ +/* */ +#define TLR_E_LLDP_PDU_MAX_SIZE_EXCEEDED ((TLR_RESULT)0xC03E0003L) + +/* */ +/* MessageId: TLR_E_LLDP_TLV_DISCARDED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid TLV content. */ +/* */ +#define TLR_E_LLDP_TLV_DISCARDED ((TLR_RESULT)0xC03E0004L) + +/* */ +/* MessageId: TLR_E_LLDP_FRAME_DISCARDED */ +/* */ +/* MessageText: */ +/* */ +/* One of TLVs has a wrong size or invalid mandatory TLV sequence. */ +/* */ +#define TLR_E_LLDP_FRAME_DISCARDED ((TLR_RESULT)0xC03E0005L) + +/* */ +/* MessageId: TLR_E_LLDP_WRONG_PARAMETERS */ +/* */ +/* MessageText: */ +/* */ +/* Parameters sent to the task are wrong. */ +/* */ +#define TLR_E_LLDP_WRONG_PARAMETERS ((TLR_RESULT)0xC03E0006L) + +/* */ +/* MessageId: TLR_E_NO_MIBS */ +/* */ +/* MessageText: */ +/* */ +/* The Task was unable to recreate MIBs during a reset due to insufficient memory. */ +/* */ +#define TLR_E_NO_MIBS ((TLR_RESULT)0xC03E0007L) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_PORT_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Configured Port higher then configured at startup parameter. */ +/* */ +#define TLR_E_CONFIG_WRONG_PORT_TOO_HIGH ((TLR_RESULT)0xC03E0008L) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_STATUS_RT_2 */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to high RT2 Status */ +/* */ +#define TLR_E_CONFIG_WRONG_STATUS_RT_2 ((TLR_RESULT)0xC03E0009L) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_STATUS_RT_3 */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to high RT3 Status */ +/* */ +#define TLR_E_CONFIG_WRONG_STATUS_RT_3 ((TLR_RESULT)0xC03E000AL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_MODE_RT3 */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to high RT3 Mode */ +/* */ +#define TLR_E_CONFIG_WRONG_MODE_RT3 ((TLR_RESULT)0xC03E000BL) + +/* */ +/* MessageId: TLR_E_CONFIG_SEND_ENABLE_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong value for TX send enable */ +/* */ +#define TLR_E_CONFIG_SEND_ENABLE_RANGE ((TLR_RESULT)0xC03E000CL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_ADMIN_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong value for admin state */ +/* */ +#define TLR_E_CONFIG_WRONG_ADMIN_STATUS ((TLR_RESULT)0xC03E000DL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_PARAM_NOTIFIC_ENABLE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong value for notification enable */ +/* */ +#define TLR_E_CONFIG_WRONG_PARAM_NOTIFIC_ENABLE ((TLR_RESULT)0xC03E000EL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_TX_ENABLE_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to high value for TX enable */ +/* */ +#define TLR_E_CONFIG_WRONG_TX_ENABLE_VALUE ((TLR_RESULT)0xC03E000FL) + +/* */ +/* MessageId: TLR_E_CONFIG_PORT_ID_SIZE_MAX_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to long port id size */ +/* */ +#define TLR_E_CONFIG_PORT_ID_SIZE_MAX_FAULT ((TLR_RESULT)0xC03E0010L) + +/* */ +/* MessageId: TLR_E_CONFIG_PORT_ID_SIZE_MIN_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to short port id size */ +/* */ +#define TLR_E_CONFIG_PORT_ID_SIZE_MIN_FAULT ((TLR_RESULT)0xC03E0011L) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_PORT_ID_TYPE_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong to large port id type */ +/* */ +#define TLR_E_CONFIG_WRONG_PORT_ID_TYPE_MAX ((TLR_RESULT)0xC03E0012L) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_PORT_ID_TYPE_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong to short port id type */ +/* */ +#define TLR_E_CONFIG_WRONG_PORT_ID_TYPE_MIN ((TLR_RESULT)0xC03E0013L) + +/* */ +/* MessageId: TLR_E_CONFIG_TO_LONG_PORT_DESCR */ +/* */ +/* MessageText: */ +/* */ +/* Configured a to long port description */ +/* */ +#define TLR_E_CONFIG_TO_LONG_PORT_DESCR ((TLR_RESULT)0xC03E0014L) + +/* */ +/* MessageId: TLR_E_CONFIG_MAX_CHASSIS_ID */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too long chassis id type */ +/* */ +#define TLR_E_CONFIG_MAX_CHASSIS_ID ((TLR_RESULT)0xC03E0015L) + +/* */ +/* MessageId: TLR_E_CONFIG_MIN_CHASSIS_ID */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too short chassis id type */ +/* */ +#define TLR_E_CONFIG_MIN_CHASSIS_ID ((TLR_RESULT)0xC03E0016L) + +/* */ +/* MessageId: TLR_E_CONFIG_MAX_TX_INTERVAL */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too long TX interval */ +/* */ +#define TLR_E_CONFIG_MAX_TX_INTERVAL ((TLR_RESULT)0xC03E0017L) + +/* */ +/* MessageId: TLR_E_CONFIG_MIN_TX_INTERVAL */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too short TX interval */ +/* */ +#define TLR_E_CONFIG_MIN_TX_INTERVAL ((TLR_RESULT)0xC03E0018L) + +/* */ +/* MessageId: TLR_E_CONFIG_MAX_PPVID */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too large PPVID */ +/* */ +#define TLR_E_CONFIG_MAX_PPVID ((TLR_RESULT)0xC03E0019L) + +/* */ +/* MessageId: TLR_E_CONFIG_MIN_PPVID */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too short PPVID */ +/* */ +#define TLR_E_CONFIG_MIN_PPVID ((TLR_RESULT)0xC03E001AL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_LLDP_SEND_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Configured wrong LLDP send state */ +/* */ +#define TLR_E_CONFIG_WRONG_LLDP_SEND_STATE ((TLR_RESULT)0xC03E001BL) + +/* */ +/* MessageId: TLR_E_CONFIG_TOO_LARGE_DESCRIPTION */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too large system description */ +/* */ +#define TLR_E_CONFIG_TOO_LARGE_DESCRIPTION ((TLR_RESULT)0xC03E001CL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_AUTO_NEG_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong Autonegation state */ +/* */ +#define TLR_E_CONFIG_WRONG_AUTO_NEG_STATE ((TLR_RESULT)0xC03E001DL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_AUTO_NEG_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong Autonegation supported state */ +/* */ +#define TLR_E_CONFIG_WRONG_AUTO_NEG_SUPPORTED ((TLR_RESULT)0xC03E001EL) + +/* */ +/* MessageId: TLR_E_CONFIG_WRONG_AUTO_NEG_ADVERTISED */ +/* */ +/* MessageText: */ +/* */ +/* Configured a wrong Autonegation advertised state */ +/* */ +#define TLR_E_CONFIG_WRONG_AUTO_NEG_ADVERTISED ((TLR_RESULT)0xC03E001FL) + +/* */ +/* MessageId: TLR_E_CONFIG_MAX_MAU_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too high MAU type */ +/* */ +#define TLR_E_CONFIG_MAX_MAU_TYPE ((TLR_RESULT)0xC03E0020L) + +/* */ +/* MessageId: TLR_E_CONFIG_MIN_MAU_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Configured a too low MAU type */ +/* */ +#define TLR_E_CONFIG_MIN_MAU_TYPE ((TLR_RESULT)0xC03E0021L) + +/* */ +/* MessageId: TLR_E_CONFIG_PPVID_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* PPVID was previousley not defined */ +/* */ +#define TLR_E_CONFIG_PPVID_FAILED ((TLR_RESULT)0xC03E0022L) + +/* */ +/* MessageId: TLR_E_IF_TYPE_MAX */ +/* */ +/* MessageText: */ +/* */ +/* IF TYPE too large */ +/* */ +#define TLR_E_IF_TYPE_MAX ((TLR_RESULT)0xC03E0023L) + +/* */ +/* MessageId: TLR_E_IF_TYPE_MIN */ +/* */ +/* MessageText: */ +/* */ +/* IF TYPE too small */ +/* */ +#define TLR_E_IF_TYPE_MIN ((TLR_RESULT)0xC03E0024L) + +/* */ +/* MessageId: TLR_E_OID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* OID too long */ +/* */ +#define TLR_E_OID_MAX ((TLR_RESULT)0xC03E0025L) + +/* */ +/* MessageId: TLR_E_MANAGEMENT_ADDRESS_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Mangement address size too high */ +/* */ +#define TLR_E_MANAGEMENT_ADDRESS_MAX ((TLR_RESULT)0xC03E0026L) + +/* */ +/* MessageId: TLR_E_MANAGEMENT_ADDRESS_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Mangement address size too low */ +/* */ +#define TLR_E_MANAGEMENT_ADDRESS_MIN ((TLR_RESULT)0xC03E0027L) + +/* */ +/* MessageId: TLR_E_MANAGEMENT_ADDRESS_ID_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Management address id not found. Address shall not exist. */ +/* */ +#define TLR_E_MANAGEMENT_ADDRESS_ID_INVALID ((TLR_RESULT)0xC03E0028L) + +/* */ +/* MessageId: TLR_E_TX_HOLD_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for TX hold too high */ +/* */ +#define TLR_E_TX_HOLD_MAX ((TLR_RESULT)0xC03E0029L) + +/* */ +/* MessageId: TLR_E_TX_HOLD_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for TX hold too low */ +/* */ +#define TLR_E_TX_HOLD_MIN ((TLR_RESULT)0xC03E003AL) + +/* */ +/* MessageId: TLR_E_REINIT_DELAY_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for the reinit delay is too high */ +/* */ +#define TLR_E_REINIT_DELAY_MAX ((TLR_RESULT)0xC03E003BL) + +/* */ +/* MessageId: TLR_E_REINIT_DELAY_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for the reinit delay is too low */ +/* */ +#define TLR_E_REINIT_DELAY_MIN ((TLR_RESULT)0xC03E003CL) + +/* */ +/* MessageId: TLR_E_TX_DELAY_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for the tx delay is too high */ +/* */ +#define TLR_E_TX_DELAY_MAX ((TLR_RESULT)0xC03E003DL) + +/* */ +/* MessageId: TLR_E_TX_DELAY_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for the tx delay is too low */ +/* */ +#define TLR_E_TX_DELAY_MIN ((TLR_RESULT)0xC03E003EL) + +/* */ +/* MessageId: TLR_E_NOTIFICATION_INTERVALL_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for the notification intervall to high */ +/* */ +#define TLR_E_NOTIFICATION_INTERVALL_MAX ((TLR_RESULT)0xC03E003FL) + +/* */ +/* MessageId: TLR_E_NOTIFICATION_INTERVALL_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for the notification intervall too low */ +/* */ +#define TLR_E_NOTIFICATION_INTERVALL_MIN ((TLR_RESULT)0xC03E0040L) + +/* */ +/* MessageId: TLR_E_PVID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for the pvid too high */ +/* */ +#define TLR_E_PVID_MAX ((TLR_RESULT)0xC03E0041L) + +/* */ +/* MessageId: TLR_E_PVID_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for the pvid too low */ +/* */ +#define TLR_E_PVID_MIN ((TLR_RESULT)0xC03E0042L) + +/* */ +/* MessageId: TLR_E_PPVID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for the ppvid too high */ +/* */ +#define TLR_E_PPVID_MAX ((TLR_RESULT)0xC03E0043L) + +/* */ +/* MessageId: TLR_E_PPVID_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* Value for ppvid enabled out of range */ +/* */ +#define TLR_E_PPVID_ENABLED ((TLR_RESULT)0xC03E0044L) + +/* */ +/* MessageId: TLR_E_PPVID_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Value for ppvid supported out of range */ +/* */ +#define TLR_E_PPVID_SUPPORTED ((TLR_RESULT)0xC03E0045L) + +/* */ +/* MessageId: TLR_E_WRONG_PARAMETER_COMBINATION */ +/* */ +/* MessageText: */ +/* */ +/* The combination of the different configured values dosen't fit */ +/* */ +#define TLR_E_WRONG_PARAMETER_COMBINATION ((TLR_RESULT)0xC03E0046L) + +/* */ +/* MessageId: TLR_E_NOT_ENOUGH_STORAGE_TLV */ +/* */ +/* MessageText: */ +/* */ +/* Not enough storage for so much of these TLV's */ +/* */ +#define TLR_E_NOT_ENOUGH_STORAGE_TLV ((TLR_RESULT)0xC03E0047L) + +/* */ +/* MessageId: TLR_E_VLAN_NAME_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Vlan name length too long */ +/* */ +#define TLR_E_VLAN_NAME_MAX ((TLR_RESULT)0xC03E0048L) + +/* */ +/* MessageId: TLR_E_VLAN_NAME_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Vlan name length too short */ +/* */ +#define TLR_E_VLAN_NAME_MIN ((TLR_RESULT)0xC03E0049L) + +/* */ +/* MessageId: TLR_E_VLAN_ID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Vlan id length too long */ +/* */ +#define TLR_E_VLAN_ID_MAX ((TLR_RESULT)0xC03E004AL) + +/* */ +/* MessageId: TLR_E_VLAN_ID_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Vlan id length too short */ +/* */ +#define TLR_E_VLAN_ID_MIN ((TLR_RESULT)0xC03E004BL) + +/* */ +/* MessageId: TLR_E_PID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Pid length too long */ +/* */ +#define TLR_E_PID_MAX ((TLR_RESULT)0xC03E004CL) + +/* */ +/* MessageId: TLR_E_MDI_ENABLE_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* MDI Enable out of range */ +/* */ +#define TLR_E_MDI_ENABLE_RANGE ((TLR_RESULT)0xC03E004DL) + +/* */ +/* MessageId: TLR_E_MDI_SUPPORTED_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* MDI Supported out of range */ +/* */ +#define TLR_E_MDI_SUPPORTED_RANGE ((TLR_RESULT)0xC03E004EL) + +/* */ +/* MessageId: TLR_E_PAIR_CONTROLLABEL_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Pair controllable out of range */ +/* */ +#define TLR_E_PAIR_CONTROLLABEL_RANGE ((TLR_RESULT)0xC03E004FL) + +/* */ +/* MessageId: TLR_E_PORT_CLASS_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Port class out of range */ +/* */ +#define TLR_E_PORT_CLASS_RANGE ((TLR_RESULT)0xC03E0050L) + +/* */ +/* MessageId: TLR_E_CLASS_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for class too high */ +/* */ +#define TLR_E_CLASS_MAX ((TLR_RESULT)0xC03E0051L) + +/* */ +/* MessageId: TLR_E_CLASS_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for class too low */ +/* */ +#define TLR_E_CLASS_MIN ((TLR_RESULT)0xC03E0052L) + +/* */ +/* MessageId: TLR_E_PAIRS_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for pairs too high */ +/* */ +#define TLR_E_PAIRS_MAX ((TLR_RESULT)0xC03E0053L) + +/* */ +/* MessageId: TLR_E_PAIRS_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for pairs too low */ +/* */ +#define TLR_E_PAIRS_MIN ((TLR_RESULT)0xC03E0054L) + +/* */ +/* MessageId: TLR_E_LA_SUPPORTED_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Value for LA Supported out of range */ +/* */ +#define TLR_E_LA_SUPPORTED_RANGE ((TLR_RESULT)0xC03E0055L) + +/* */ +/* MessageId: TLR_E_LA_ENABLED_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Value for LA Enabled out of range */ +/* */ +#define TLR_E_LA_ENABLED_RANGE ((TLR_RESULT)0xC03E0056L) + +/* */ +/* MessageId: TLR_E_AGG_PORT_ID_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for Agg Port ID too high */ +/* */ +#define TLR_E_AGG_PORT_ID_MAX ((TLR_RESULT)0xC03E0057L) + +/* */ +/* MessageId: TLR_E_MFS_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value for Mfs too high */ +/* */ +#define TLR_E_MFS_MAX ((TLR_RESULT)0xC03E0058L) + +/* */ +/* MessageId: TLR_E_MFS_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value for Mfs too low */ +/* */ +#define TLR_E_MFS_MIN ((TLR_RESULT)0xC03E0059L) + +/* */ +/* MessageId: TLR_E_NOS_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Name of station too long */ +/* */ +#define TLR_E_NOS_MAX ((TLR_RESULT)0xC03E005AL) + +/* */ +/* MessageId: TLR_E_MRRT_STATE_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Value of MRRT state out of range */ +/* */ +#define TLR_E_MRRT_STATE_RANGE ((TLR_RESULT)0xC03E005BL) + +/* */ +/* MessageId: TLR_E_LENGTH_PERIOD_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value of Length of period too high */ +/* */ +#define TLR_E_LENGTH_PERIOD_MAX ((TLR_RESULT)0xC03E005CL) + +/* */ +/* MessageId: TLR_E_RED_PERIOD_BEGIN_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value of Length of red period begin is too high */ +/* */ +#define TLR_E_RED_PERIOD_BEGIN_MAX ((TLR_RESULT)0xC03E005DL) + +/* */ +/* MessageId: TLR_E_ORANGE_PERIOD_BEGIN_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value of Length of orange period begin is too high */ +/* */ +#define TLR_E_ORANGE_PERIOD_BEGIN_MAX ((TLR_RESULT)0xC03E005EL) + +/* */ +/* MessageId: TLR_E_GREEN_PERIOD_BEGIN_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Value of Length of green period begin is too high */ +/* */ +#define TLR_E_GREEN_PERIOD_BEGIN_MAX ((TLR_RESULT)0xC03E005FL) + +/* */ +/* MessageId: TLR_E_LENGTH_PERIOD_MIN */ +/* */ +/* MessageText: */ +/* */ +/* Value of length of period is too low */ +/* */ +#define TLR_E_LENGTH_PERIOD_MIN ((TLR_RESULT)0xC03E0060L) + + + + +#endif /* __LLDP_ERROR_H */ + +#ifndef __MODBUS_RTU_PERIPH_ERROR_H +#define __MODBUS_RTU_PERIPH_ERROR_H + +/*****************************************************************************/ +/* Modbus RTU Peripheral Task ERROR Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MBR_COM_PHE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_MBR_COM_PHE_COMMAND_INVALID ((TLR_RESULT)0xC09E0001L) + +/* */ +/* MessageId: TLR_E_MBR_COM_PHE_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter received. */ +/* */ +#define TLR_E_MBR_COM_PHE_INVALID_PARAMETER ((TLR_RESULT)0xC09E0002L) + +/* */ +/* MessageId: TLR_E_MBR_COM_PHE_DATA_TRANSMISSION_INPROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Transmission is in progress. */ +/* */ +#define TLR_E_MBR_COM_PHE_DATA_TRANSMISSION_INPROGRESS ((TLR_RESULT)0xC09E0003L) + +/* */ +/* MessageId: TLR_E_MBR_COM_PERIPHERAL_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Uknown peripheral type. */ +/* */ +#define TLR_E_MBR_COM_PERIPHERAL_UNKNOWN ((TLR_RESULT)0xC09E0004L) + + + + +#endif /* __MODBUS_RTU_PERIPH_ERROR_H */ + +#ifndef __MEMORY_MAP_ERROR_H +#define __MEMORY_MAP_ERROR_H + + + + +/*****************************************************************************/ +/* Memory Mapping Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MEMMAP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command in request detected. */ +/* */ +#define TLR_E_MEMMAP_COMMAND_INVALID ((TLR_RESULT)0xC0770001L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_SSIO_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization SSIO Configuration Bytes count. */ +/* */ +#define TLR_E_MEMMAP_INVALID_SSIO_CONFIG ((TLR_RESULT)0xC0770002L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_SSIO_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization SSIO Status Bytes count. */ +/* */ +#define TLR_E_MEMMAP_INVALID_SSIO_STATUS ((TLR_RESULT)0xC0770003L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_INPUT_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization offset in the FB input area. */ +/* */ +#define TLR_E_MEMMAP_INVALID_INPUT_OFFSET ((TLR_RESULT)0xC0770004L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_OUTPUT_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization offset in the FB output area. */ +/* */ +#define TLR_E_MEMMAP_INVALID_OUTPUT_OFFSET ((TLR_RESULT)0xC0770005L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_RESERVED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization values for the reserved areas. */ +/* */ +#define TLR_E_MEMMAP_INVALID_RESERVED ((TLR_RESULT)0xC0770006L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_DIAG_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization offset for the diagnostic mapping in the FB output area. */ +/* */ +#define TLR_E_MEMMAP_INVALID_DIAG_OFFSET ((TLR_RESULT)0xC0770007L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_DIAG_ENTRIES */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization number of diagnostic entries. */ +/* */ +#define TLR_E_MEMMAP_INVALID_DIAG_ENTRIES ((TLR_RESULT)0xC0770008L) + +/* */ +/* MessageId: TLR_E_MEMMAP_INVALID_COLUSION */ +/* */ +/* MessageText: */ +/* */ +/* Colusion between diagnostic mapping and the SSIO inputs in the FB output area. */ +/* */ +#define TLR_E_MEMMAP_INVALID_COLUSION ((TLR_RESULT)0xC0770009L) + + + + +#endif /* __MEMORY_MAP_ERROR_H */ + +#ifndef __MIB_DATABASE_ERROR_H +#define __MIB_DATABASE_ERROR_H + + + + +/*****************************************************************************/ +/* MIB Database Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MIB_DATABASE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MIB_DATABASE_COMMAND_INVALID ((TLR_RESULT)0xC03C0001L) + +/* */ +/* MessageId: TLR_E_MIB_NO_SUCH_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* No such instance of this Mib-variable. */ +/* */ +#define TLR_E_MIB_NO_SUCH_INSTANCE ((TLR_RESULT)0xC03C0002L) + +/* */ +/* MessageId: TLR_E_MIB_END_OF_COL */ +/* */ +/* MessageText: */ +/* */ +/* End of column reached while searching successor (GETNEXT). */ +/* */ +#define TLR_E_MIB_END_OF_COL ((TLR_RESULT)0xC03C0003L) + +/* */ +/* MessageId: TLR_E_MIB_NO_SUCH_NAME */ +/* */ +/* MessageText: */ +/* */ +/* The requested OID is not available. */ +/* */ +#define TLR_E_MIB_NO_SUCH_NAME ((TLR_RESULT)0xC03C0004L) + + + + +#endif /* __MIB_DATABASE_ERROR_H */ + +#ifndef __MID_DBG_ERROR_H +#define __MID_DBG_ERROR_H + + + + +/*****************************************************************************/ +/* Mid_Dbg Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MID_DBG_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MID_DBG_COMMAND_INVALID ((TLR_RESULT)0xC0310001L) + +/* */ +/* MessageId: TLR_E_MID_DBG_REQUESTED_MEM_BLOCK_SIZE_TOO_LARGE */ +/* */ +/* MessageText: */ +/* */ +/* Requested Memory Block Size too large. */ +/* */ +#define TLR_E_MID_DBG_REQUESTED_MEM_BLOCK_SIZE_TOO_LARGE ((TLR_RESULT)0xC0310002L) + +/* */ +/* MessageId: TLR_E_MID_DBG_INVALID_TASK_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid task handle. */ +/* */ +#define TLR_E_MID_DBG_INVALID_TASK_HANDLE ((TLR_RESULT)0xC0310003L) + +/* */ +/* MessageId: TLR_E_MID_DBG_DENIED_ACC_DBG_TASK */ +/* */ +/* MessageText: */ +/* */ +/* Access to debug task denied. */ +/* */ +#define TLR_E_MID_DBG_DENIED_ACC_DBG_TASK ((TLR_RESULT)0xC0310005L) + +/* */ +/* MessageId: TLR_E_MID_DBG_ALL_BKPTS_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* All breakpoints in use. */ +/* */ +#define TLR_E_MID_DBG_ALL_BKPTS_IN_USE ((TLR_RESULT)0xC0310007L) + +/* */ +/* MessageId: TLR_E_MID_DBG_BKPT_ADDRESS_ALREADY_DEFINED */ +/* */ +/* MessageText: */ +/* */ +/* Breakpoint address is already defined. */ +/* */ +#define TLR_E_MID_DBG_BKPT_ADDRESS_ALREADY_DEFINED ((TLR_RESULT)0xC0310008L) + +/* */ +/* MessageId: TLR_E_MID_DBG_UNKNOWN_CODE_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Code type not known. */ +/* */ +#define TLR_E_MID_DBG_UNKNOWN_CODE_TYPE ((TLR_RESULT)0xC0310009L) + +/* */ +/* MessageId: TLR_E_MID_DBG_NO_BKPT_IN_ROM_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* No breakpoint in rom location possible. */ +/* */ +#define TLR_E_MID_DBG_NO_BKPT_IN_ROM_POSSIBLE ((TLR_RESULT)0xC031000AL) + +/* */ +/* MessageId: TLR_E_MID_DBG_NO_SUCH_REGISTER_TO_WRITE */ +/* */ +/* MessageText: */ +/* */ +/* No such register to write to. */ +/* */ +#define TLR_E_MID_DBG_NO_SUCH_REGISTER_TO_WRITE ((TLR_RESULT)0xC031000BL) + +/* */ +/* MessageId: TLR_E_MID_DBG_UNDEFINED_JUMP_TABLE_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MID_DBG_UNDEFINED_JUMP_TABLE_INDEX ((TLR_RESULT)0xC031000CL) + +/* */ +/* MessageId: TLR_E_MID_DBG_NO_JUMP_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MID_DBG_NO_JUMP_TABLE ((TLR_RESULT)0xC031000DL) + + + + +#endif /* __MID_DBG_ERROR_H */ + +#ifndef __MID_STARTUP_ERROR_H +#define __MID_STARTUP_ERROR_H + +/*****************************************************************************/ +/* MID Startup Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MID_STARTUP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_MID_STARTUP_COMMAND_INVALID ((TLR_RESULT)0xC05F0001L) + + + + +#endif /* __MID_STARTUP_ERROR_H */ + +#ifndef __MODBUS_RTU_ERROR_H +#define __MODBUS_RTU_ERROR_H + + + + +/*****************************************************************************/ +/* MODBUS RTU Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MODBUS_RTU_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MODBUS_RTU_COMMAND_INVALID ((TLR_RESULT)0xC06E0001L) + +/* */ +/* MessageId: TLR_E_MODBUS_RTU_CMD_LENGTH_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* Error Text 2. */ +/* */ +#define TLR_E_MODBUS_RTU_CMD_LENGTH_MISMATCH ((TLR_RESULT)0xC06E0002L) + + + + +#endif /* __MODBUS_RTU_ERROR_H */ + +#ifndef __MPI_GATEWAY_ERROR_H +#define __MPI_GATEWAY_ERROR_H + + + + +/*****************************************************************************/ +/* MPI Gateway Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_MPI_GATEWAY_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_MPI_GATEWAY_COMMAND_INVALID ((TLR_RESULT)0xC0780001L) + +/* */ +/* MessageId: TLR_E_MPI_GATEWAY_NO_RECEIVER_FOR_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* Packet could not be assigned to a receiver. */ +/* */ +#define TLR_E_MPI_GATEWAY_NO_RECEIVER_FOR_PACKET ((TLR_RESULT)0xC0780002L) + +/* */ +/* MessageId: TLR_E_MPI_GATEWAY_DISCONNECT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* The disconnect sequence is already running. */ +/* */ +#define TLR_E_MPI_GATEWAY_DISCONNECT_RUNNING ((TLR_RESULT)0xC0780003L) + + + + +#endif /* __CAN_DL_ERROR_H */ + +#ifndef __SSIO_MAP_ERROR_H +#define __SSIO_MAP_ERROR_H + + + + +/*****************************************************************************/ +/* netIC SSIO Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SSIO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command in request detected. */ +/* */ +#define TLR_E_SSIO_COMMAND_INVALID ((TLR_RESULT)0xC0750001L) + +/* */ +/* MessageId: TLR_E_SSIO_NOT_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Initialization GPIOs error. */ +/* */ +#define TLR_E_SSIO_NOT_INIT ((TLR_RESULT)0xC0750002L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_SYSTEM_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization System flags value. */ +/* */ +#define TLR_E_SSIO_INVALID_SYSTEM_FLAGS ((TLR_RESULT)0xC0750003L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_WDG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization Watchdog value. */ +/* */ +#define TLR_E_SSIO_INVALID_WDG ((TLR_RESULT)0xC0750004L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_OUTPUTS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization Output bytes value. */ +/* */ +#define TLR_E_SSIO_INVALID_OUTPUTS ((TLR_RESULT)0xC0750005L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_INPUTS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization Input bytes value. */ +/* */ +#define TLR_E_SSIO_INVALID_INPUTS ((TLR_RESULT)0xC0750006L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_BAUDRATE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization Baudrate value. */ +/* */ +#define TLR_E_SSIO_INVALID_BAUDRATE ((TLR_RESULT)0xC0750007L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_CONFIG_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid initialization Config flags value. */ +/* */ +#define TLR_E_SSIO_INVALID_CONFIG_FLAGS ((TLR_RESULT)0xC0750008L) + +/* */ +/* MessageId: TLR_E_SSIO_INVALID_RESERVED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command in request detected. */ +/* */ +#define TLR_E_SSIO_INVALID_RESERVED ((TLR_RESULT)0xC0750009L) + + + + +#endif /* __SSIO_ERROR_H */ + +#ifndef __NETPLC_IO_HANDLER_ERROR_H +#define __NETPLC_IO_HANDLER_ERROR_H + +/*****************************************************************************/ +/* netPLC I/O Handler status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_MEM_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid memory address. (NULL pointer passing.) */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_MEM_ADDRESS ((TLR_RESULT)0xC0A30001L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_MEMORY ((TLR_RESULT)0xC0A30002L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* Resource initialization problem. (E.g.: Inconsistent number of tags for digital I/O groups or analog channels.) */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_RESOURCE ((TLR_RESULT)0xC0A30003L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_PARAMETER_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter structure version. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_PARAMETER_VERSION ((TLR_RESULT)0xC0A30004L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_PERIPHERAL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported netX peripheral type. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_PERIPHERAL_TYPE ((TLR_RESULT)0xC0A30005L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_PIO_INDEX_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PIO index range. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_PIO_INDEX_RANGE ((TLR_RESULT)0xC0A30006L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_HIFPIO_INDEX_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid HIF-PIO index range. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_HIFPIO_INDEX_RANGE ((TLR_RESULT)0xC0A30007L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_ADC_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ADC index. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_ADC_INDEX ((TLR_RESULT)0xC0A30008L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_ADC_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ADC channel index. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_ADC_CHANNEL ((TLR_RESULT)0xC0A30009L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_RAW_DIGITAL_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping PIO index ranges of two digital I/O group definitions. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_RAW_DIGITAL_OVERLAP ((TLR_RESULT)0xC0A3000AL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_RAW_ANALOG_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Identical ADC index and ADC channel index used by two analog channel definitions. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_RAW_ANALOG_OVERLAP ((TLR_RESULT)0xC0A3000BL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_INPUT_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid input image offset in a digital group definition or in an analog channel definition. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_INPUT_IMAGE_OFFSET ((TLR_RESULT)0xC0A3000CL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_OUTPUT_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid output image offset in a digital group definition or in an analog channel definition. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_OUTPUT_IMAGE_OFFSET ((TLR_RESULT)0xC0A3000DL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_DIGITAL_INPUT_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping input data image ranges of two digital I/O group definitions. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_DIGITAL_INPUT_OVERLAP ((TLR_RESULT)0xC0A3000EL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_DIGITAL_OUTPUT_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping output data image areas of two digital I/O group definitions. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_DIGITAL_OUTPUT_OVERLAP ((TLR_RESULT)0xC0A3000FL) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_ANALOG_INPUT_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping input data image areas of two analog channel definitions. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_ANALOG_INPUT_OVERLAP ((TLR_RESULT)0xC0A30010L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_DIGITAL_ANALOG_INPUT_OVERLAP */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping input data image areas of a digital input group definition and an analog channel definition. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_DIGITAL_ANALOG_INPUT_OVERLAP ((TLR_RESULT)0xC0A30011L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_HIF_SETTINGS */ +/* */ +/* MessageText: */ +/* */ +/* Conflict between PIO and host interface settings. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_HIF_SETTINGS ((TLR_RESULT)0xC0A30012L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_INPUT_IMAGE_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* Error while accessing the PLC input data image. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_INPUT_IMAGE_ACCESS ((TLR_RESULT)0xC0A30013L) + +/* */ +/* MessageId: TLR_E_NETPLC_IO_HANDLER_OUTPUT_IMAGE_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* Error while accessing the PLC output data image. */ +/* */ +#define TLR_E_NETPLC_IO_HANDLER_OUTPUT_IMAGE_ACCESS ((TLR_RESULT)0xC0A30014L) + + + + +#endif /* __NETPLC_IO_HANDLER_ERROR_H */ + +#ifndef __NETSCRIPT_ERROR_H +#define __NETSCRIPT_ERROR_H + +/*****************************************************************************/ +/* netScript Task ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_NETSCRIPT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_NETSCRIPT_COMMAND_INVALID ((TLR_RESULT)0xC0800001L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_OUTOFMEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Memory allocation failure in netSCRIPT task. */ +/* */ +#define TLR_E_NETSCRIPT_OUTOFMEMORY ((TLR_RESULT)0xC0800002L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_LUA_OPEN_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of interpreter (lua_open) failed. */ +/* */ +#define TLR_E_NETSCRIPT_LUA_OPEN_FAIL ((TLR_RESULT)0xC0800080L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_NO_SCRIPT */ +/* */ +/* MessageText: */ +/* */ +/* No script found, or script file could not be loaded. */ +/* */ +#define TLR_E_NETSCRIPT_NO_SCRIPT ((TLR_RESULT)0xC0800081L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_NO_CYCLIC_FN */ +/* */ +/* MessageText: */ +/* */ +/* The value of __CYCLIC_FUNCTION is not a function. */ +/* */ +#define TLR_E_NETSCRIPT_NO_CYCLIC_FN ((TLR_RESULT)0xC0800082L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_LUA_ERROR_HANDLER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred inside an error handler. */ +/* */ +#define TLR_E_NETSCRIPT_LUA_ERROR_HANDLER_FAILED ((TLR_RESULT)0xC0800083L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_LUA_OUTOFMEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Memory allocation failure in interpreter. */ +/* */ +#define TLR_E_NETSCRIPT_LUA_OUTOFMEMORY ((TLR_RESULT)0xC0800084L) + +/* */ +/* MessageId: TLR_E_NETSCRIPT_LUA_PANIC */ +/* */ +/* MessageText: */ +/* */ +/* A Lua panic occurred. */ +/* */ +#define TLR_E_NETSCRIPT_LUA_PANIC ((TLR_RESULT)0xC0800085L) + +/* */ +/* MessageId: TLR_E_NSC_LUA_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* An error was raised by Lua. See extended diagnosis. */ +/* */ +#define TLR_E_NSC_LUA_ERROR ((TLR_RESULT)0xC0800101L) + +/*****************************************************************************/ +/* netScript UART ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_NSC_PORT_INVALID_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Port: Invalid configuration parameter. */ +/* */ +#define TLR_E_NSC_PORT_INVALID_CONFIG ((TLR_RESULT)0xC0800201L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_INVALID_PORT */ +/* */ +/* MessageText: */ +/* */ +/* Port: HAL was called with an invalid port number. */ +/* */ +#define TLR_E_NSC_PORT_INVALID_PORT ((TLR_RESULT)0xC0800202L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_WRONG_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Port: Char mode function called in block mode, or vice versa. */ +/* */ +#define TLR_E_NSC_PORT_WRONG_MODE ((TLR_RESULT)0xC0800203L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_FIFO_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* Port: A FIFO is empty or does not contain as many entries as requested. */ +/* */ +#define TLR_E_NSC_PORT_FIFO_EMPTY ((TLR_RESULT)0x40800204L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_FIFO_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Port: A FIFO is full or does not have enough space to accept the input. */ +/* */ +#define TLR_E_NSC_PORT_FIFO_FULL ((TLR_RESULT)0x40800205L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_XC_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Port: An error occurred while loading/initializing. */ +/* */ +#define TLR_E_NSC_PORT_XC_INIT_FAILED ((TLR_RESULT)0xC0800206L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_NO_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Port: No internal RAM buffers available for block mode operation. */ +/* */ +#define TLR_E_NSC_PORT_NO_BUFFER ((TLR_RESULT)0x40800210L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_NO_SUCH_PORT */ +/* */ +/* MessageText: */ +/* */ +/* Port: The requested port instance does not exist. */ +/* */ +#define TLR_E_NSC_PORT_NO_SUCH_PORT ((TLR_RESULT)0x40800211L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_ALREADY_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Port: Tried to open a port instance which is already open. */ +/* */ +#define TLR_E_NSC_PORT_ALREADY_OPEN ((TLR_RESULT)0x40800212L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Port: Tried to call a function on a port which is not open. */ +/* */ +#define TLR_E_NSC_PORT_NOT_OPEN ((TLR_RESULT)0xC0800213L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_NO_UARTDB */ +/* */ +/* MessageText: */ +/* */ +/* Port: Could not read UART config database. */ +/* */ +#define TLR_E_NSC_PORT_NO_UARTDB ((TLR_RESULT)0xC0800214L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_PARSING_UARTDB */ +/* */ +/* MessageText: */ +/* */ +/* Port: Error parsing UART config database. */ +/* */ +#define TLR_E_NSC_PORT_PARSING_UARTDB ((TLR_RESULT)0xC0800215L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Port: A function argument is of the wrong type, or its value is outside the allowed range. */ +/* */ +#define TLR_E_NSC_PORT_INVALID_PARAMETER ((TLR_RESULT)0x40800216L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_NO_CONFIRMATION */ +/* */ +/* MessageText: */ +/* */ +/* Port: There is no confirmation of the requested type available. */ +/* */ +#define TLR_E_NSC_PORT_NO_CONFIRMATION ((TLR_RESULT)0x40800217L) + +/* */ +/* MessageId: TLR_E_NSC_PORT_STRING_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Port: The string passed to PortSend/PortExchange is too long. */ +/* */ +#define TLR_E_NSC_PORT_STRING_TOO_LONG ((TLR_RESULT)0x40800218L) + + +/*****************************************************************************/ +/* netScript BusIO Error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NO_SUCH_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: The requested instance does not exist. */ +/* */ +#define TLR_E_NSC_BUSIO_NO_SUCH_INSTANCE ((TLR_RESULT)0x40800301L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_INSTANCE_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: The requested instance is already in use. */ +/* */ +#define TLR_E_NSC_BUSIO_INSTANCE_IN_USE ((TLR_RESULT)0x40800302L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_INVALID_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: An invalid configuration parameter was passed. */ +/* */ +#define TLR_E_NSC_BUSIO_INVALID_CONFIG ((TLR_RESULT)0xC0800303L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: A function was called on an instance which is not open or was closed. */ +/* */ +#define TLR_E_NSC_BUSIO_NOT_OPEN ((TLR_RESULT)0xC0800304L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: An invalid parameter was passed. */ +/* */ +#define TLR_E_NSC_BUSIO_INVALID_PARAMETER ((TLR_RESULT)0xC0800305L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_WRONG_MODE */ +/* */ +/* MessageText: */ +/* */ +/* BusIO: Direct mode function called in Ascii mode, or vice versa. */ +/* */ +#define TLR_E_NSC_BUSIO_WRONG_MODE ((TLR_RESULT)0xC0800306L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NO_RX_ACK */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Write: Input buffer not ready. */ +/* */ +#define TLR_E_NSC_BUSIO_NO_RX_ACK ((TLR_RESULT)0x40800311L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NO_RX_EN */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Write: Sending not enabled (RxEnableCmd not set). */ +/* */ +#define TLR_E_NSC_BUSIO_NO_RX_EN ((TLR_RESULT)0x40800312L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_STRING_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Write: String too long for send buffer. Read: Invalid length in header. */ +/* */ +#define TLR_E_NSC_BUSIO_STRING_TOO_LONG ((TLR_RESULT)0x40800313L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_BUFFER_LENGTH_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* BusIO ReadDirect/WriteDirect: Invalid offset or length. */ +/* */ +#define TLR_E_NSC_BUSIO_BUFFER_LENGTH_EXCEEDED ((TLR_RESULT)0x40800314L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NO_TX_CMD */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Read: No new data available. */ +/* */ +#define TLR_E_NSC_BUSIO_NO_TX_CMD ((TLR_RESULT)0x40800321L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_NO_TX_EN */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Read: Reading not enabled (TxEnableCmd not set). */ +/* */ +#define TLR_E_NSC_BUSIO_NO_TX_EN ((TLR_RESULT)0x40800322L) + +/* */ +/* MessageId: TLR_E_NSC_BUSIO_HEADER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* BusIO Read: Error in header (Byte count?). */ +/* */ +#define TLR_E_NSC_BUSIO_HEADER_ERROR ((TLR_RESULT)0x40800323L) + +/*****************************************************************************/ +/* netScript util lib error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_NSC_UTIL_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* util: Invalid parameter value (e.g. target type, endianness, LED identifier). */ +/* */ +#define TLR_E_NSC_UTIL_INVALID_PARAMETER ((TLR_RESULT)0xC0800401L) + +/* */ +/* MessageId: TLR_E_NSC_UTIL_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* util: Number to convert is outside value range of target type. */ +/* */ +#define TLR_E_NSC_UTIL_OUT_OF_RANGE ((TLR_RESULT)0x40800402L) + +/* */ +/* MessageId: TLR_E_NSC_UTIL_WRONG_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* util: Length of string to convert does not match target type. */ +/* */ +#define TLR_E_NSC_UTIL_WRONG_SIZE ((TLR_RESULT)0x40800403L) + +/* */ +/* MessageId: TLR_E_NSC_DB_UNKNOWN_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown variable type in variable NXD file. */ +/* */ +#define TLR_E_NSC_DB_UNKNOWN_TYPE ((TLR_RESULT)0xC0800410L) + +/* */ +/* MessageId: TLR_E_NSC_DB_STRING_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* String length in variable nxd file is too large. */ +/* */ +#define TLR_E_NSC_DB_STRING_TOO_LONG ((TLR_RESULT)0xC0800411L) + + + + +#endif /* __NETSCRIPT_ERROR_H */ + +#ifndef __CO_OBJDICT_ERROR_H +#define __CO_OBJDICT_ERROR_H + +/*****************************************************************************/ +/* Object Dictionary (revised) error codes */ +/* 0x0000-0x7FFF are used for error codes directly mappable to SDO abort codes by using a translation table */ +/* 0x8000-0xFFFF are used for additional error codes which relate to specific functions within the ObjDict */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_CO_OBJDICT_PROTOCOL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SDO Protocol Timeout. */ +/* */ +#define TLR_E_CO_OBJDICT_PROTOCOL_TIMEOUT ((TLR_RESULT)0xC09B0001L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNSUPPORTED_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported access. */ +/* */ +#define TLR_E_CO_OBJDICT_UNSUPPORTED_ACCESS ((TLR_RESULT)0xC09B0002L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_IS_WRITE_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* Object is write only. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_IS_WRITE_ONLY ((TLR_RESULT)0xC09B0003L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_IS_READ_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* Object is read only. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_IS_READ_ONLY ((TLR_RESULT)0xC09B0004L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Object does not exist. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_DOES_NOT_EXIST ((TLR_RESULT)0xC09B0005L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_CANNOT_BE_PDO_MAPPED */ +/* */ +/* MessageText: */ +/* */ +/* Object cannot be mapped into PDO. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_CANNOT_BE_PDO_MAPPED ((TLR_RESULT)0xC09B0006L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECTS_WOULD_EXCEED_PDO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The number and length of the objects to be mapped would exceed the PDO length. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECTS_WOULD_EXCEED_PDO_LENGTH ((TLR_RESULT)0xC09B0007L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_GENERAL_PARAMETER_INCOMPATIBILITY */ +/* */ +/* MessageText: */ +/* */ +/* General parameter incompatibility. */ +/* */ +#define TLR_E_CO_OBJDICT_GENERAL_PARAMETER_INCOMPATIBILITY ((TLR_RESULT)0xC09B0008L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_ACCESS_FAILED_DUE_TO_HW_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Access failed due to hardware error. */ +/* */ +#define TLR_E_CO_OBJDICT_ACCESS_FAILED_DUE_TO_HW_ERROR ((TLR_RESULT)0xC09B0009L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_DOES_NOT_MATCH */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter does not match. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_DOES_NOT_MATCH ((TLR_RESULT)0xC09B000AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_LENGTH_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too high. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_LENGTH_IS_TOO_LONG ((TLR_RESULT)0xC09B000BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_LENGTH_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Data type does not match, length of service parameter too short. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_LENGTH_IS_TOO_SHORT ((TLR_RESULT)0xC09B000CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_SUBINDEX_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Subindex does not exist. */ +/* */ +#define TLR_E_CO_OBJDICT_SUBINDEX_DOES_NOT_EXIST ((TLR_RESULT)0xC09B000DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_RANGE_OF_PARAMETER_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Value range of parameter exceeded. */ +/* */ +#define TLR_E_CO_OBJDICT_RANGE_OF_PARAMETER_EXCEEDED ((TLR_RESULT)0xC09B000EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too high. */ +/* */ +#define TLR_E_CO_OBJDICT_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH ((TLR_RESULT)0xC09B000FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Value of parameter written too low. */ +/* */ +#define TLR_E_CO_OBJDICT_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW ((TLR_RESULT)0xC09B0010L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value is less than minimum value. */ +/* */ +#define TLR_E_CO_OBJDICT_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC09B0011L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_GENERAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* General error. */ +/* */ +#define TLR_E_CO_OBJDICT_GENERAL_ERROR ((TLR_RESULT)0xC09B0012L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application. */ +/* */ +#define TLR_E_CO_OBJDICT_DATA_CANNOT_BE_TRANSFERRED_OR_STORED_TO_THE_APP ((TLR_RESULT)0xC09B0013L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of local control. */ +/* */ +#define TLR_E_CO_OBJDICT_DATA_NO_TRANSFER_DUE_TO_LOCAL_CONTROL ((TLR_RESULT)0xC09B0014L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Data cannot be transferred or stored to the application because of present device state. */ +/* */ +#define TLR_E_CO_OBJDICT_DATA_NO_TRANSFER_DUE_TO_PRESENT_DEVICE_STATE ((TLR_RESULT)0xC09B0015L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_NO_OBJECT_DICTIONARY_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* Object dictionary dynamic generation fails or no object dictionary present. */ +/* */ +#define TLR_E_CO_OBJDICT_NO_OBJECT_DICTIONARY_PRESENT ((TLR_RESULT)0xC09B0016L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_GENERAL_INTERNAL_INCOMPATIBILITY */ +/* */ +/* MessageText: */ +/* */ +/* General internal incompatibility. */ +/* */ +#define TLR_E_CO_OBJDICT_GENERAL_INTERNAL_INCOMPATIBILITY ((TLR_RESULT)0xC09B0017L) + +/* 0x8000-0xFFFF ObjDict range */ +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DELETION_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Deletion is locked. */ +/* */ +#define TLR_E_CO_OBJDICT_DELETION_LOCKED ((TLR_RESULT)0xC09B8000L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OTHER_TASK_HAS_LOCKED_DELETION */ +/* */ +/* MessageText: */ +/* */ +/* Other task has locked deletion. */ +/* */ +#define TLR_E_CO_OBJDICT_OTHER_TASK_HAS_LOCKED_DELETION ((TLR_RESULT)0xC09B8001L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_ONLY_ONE_READ_NOTIFY_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Only one read notify allowed. */ +/* */ +#define TLR_E_CO_OBJDICT_ONLY_ONE_READ_NOTIFY_ALLOWED ((TLR_RESULT)0xC09B8002L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_APPLICATION_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Application task is not registered. */ +/* */ +#define TLR_E_CO_OBJDICT_APPLICATION_NOT_REGISTERED ((TLR_RESULT)0xC09B8003L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNFRAGMENTABLE_PART_DOES_NOT_MATCH_SRCID */ +/* */ +/* MessageText: */ +/* */ +/* Unfragmentable part of packet does not match SrcId. */ +/* */ +#define TLR_E_CO_OBJDICT_UNFRAGMENTABLE_PART_DOES_NOT_MATCH_SRCID ((TLR_RESULT)0xC09B8004L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNFRAGMENTABLE_PART_DOES_NOT_MATCH_DESTID */ +/* */ +/* MessageText: */ +/* */ +/* Unfragmentable part of packet does not match DestId. */ +/* */ +#define TLR_E_CO_OBJDICT_UNFRAGMENTABLE_PART_DOES_NOT_MATCH_DESTID ((TLR_RESULT)0xC09B8005L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_SRCID_DOES_NOT_MATCH_ANY_FRAGMENTATION_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* SrcId does not match any fragmentation buffer. */ +/* */ +#define TLR_E_CO_OBJDICT_SRCID_DOES_NOT_MATCH_ANY_FRAGMENTATION_BUFFER ((TLR_RESULT)0xC09B8006L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DESTID_DOES_NOT_MATCH_ANY_FRAGMENTATION_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* DestId does not match any fragmentation buffer. */ +/* */ +#define TLR_E_CO_OBJDICT_DESTID_DOES_NOT_MATCH_ANY_FRAGMENTATION_BUFFER ((TLR_RESULT)0xC09B8007L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_WAS_DELETED_IN_ACTION */ +/* */ +/* MessageText: */ +/* */ +/* Object was deleted in action. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_WAS_DELETED_IN_ACTION ((TLR_RESULT)0xC09B8008L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_SUBOBJECT_WAS_DELETED_IN_ACTION */ +/* */ +/* MessageText: */ +/* */ +/* Subobject was deleted in action. */ +/* */ +#define TLR_E_CO_OBJDICT_SUBOBJECT_WAS_DELETED_IN_ACTION ((TLR_RESULT)0xC09B8009L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_REQUEST_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Request aborted. */ +/* */ +#define TLR_E_CO_OBJDICT_REQUEST_ABORTED ((TLR_RESULT)0xC09B800AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_VALUE_INFO_ONLY_SUPPORTED_ON_SIMPLE_VAR */ +/* */ +/* MessageText: */ +/* */ +/* Given bValueInfo is only supported on SimpleVar. */ +/* */ +#define TLR_E_CO_OBJDICT_VALUE_INFO_ONLY_SUPPORTED_ON_SIMPLE_VAR ((TLR_RESULT)0xC09B800BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_UNDEFINED */ +/* */ +/* MessageText: */ +/* */ +/* Data type is undefined. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_UNDEFINED ((TLR_RESULT)0xC09B800CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OTHER_APPLICATION_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Other application is already registered. */ +/* */ +#define TLR_E_CO_OBJDICT_OTHER_APPLICATION_REGISTERED ((TLR_RESULT)0xC09B800DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* CANopen Datatype already exists. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_ALREADY_EXISTS ((TLR_RESULT)0xC09B800EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_DATATYPE_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* CANopen Datatype does not exist. */ +/* */ +#define TLR_E_CO_OBJDICT_DATATYPE_DOES_NOT_EXIST ((TLR_RESULT)0xC09B800FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_VIRTUAL_OBJECT_CANNOT_BE_ACCESSED_WITHOUT_INDICATION */ +/* */ +/* MessageText: */ +/* */ +/* Virtual object cannot be accessed without indication. */ +/* */ +#define TLR_E_CO_OBJDICT_VIRTUAL_OBJECT_CANNOT_BE_ACCESSED_WITHOUT_INDICATION ((TLR_RESULT)0xC09B8010L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_FRAGMENTATION_IMPOSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Fragmentation impossible. */ +/* */ +#define TLR_E_CO_OBJDICT_FRAGMENTATION_IMPOSSIBLE ((TLR_RESULT)0xC09B8011L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_ACCESS_VIA_UNDEFINED_NOTIFY_DENIED */ +/* */ +/* MessageText: */ +/* */ +/* Access via undefined notify denied. */ +/* */ +#define TLR_E_CO_OBJDICT_ACCESS_VIA_UNDEFINED_NOTIFY_DENIED ((TLR_RESULT)0xC09B8012L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_OBJECT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Object already exists. */ +/* */ +#define TLR_E_CO_OBJDICT_OBJECT_ALREADY_EXISTS ((TLR_RESULT)0xC09B8013L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_SUBOBJECT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Subobject already exists. */ +/* */ +#define TLR_E_CO_OBJDICT_SUBOBJECT_ALREADY_EXISTS ((TLR_RESULT)0xC09B8014L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_CANNOT_BE_DELETED_NOT_OWNER */ +/* */ +/* MessageText: */ +/* */ +/* Object/Subobject cannot be deleted. Requestor is not owner. */ +/* */ +#define TLR_E_CO_OBJDICT_CANNOT_BE_DELETED_NOT_OWNER ((TLR_RESULT)0xC09B8015L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_MAX_NUMBER_OF_SUBOBJECTS_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum number of subobjects exceeded. */ +/* */ +#define TLR_E_CO_OBJDICT_MAX_NUMBER_OF_SUBOBJECTS_EXCEEDED ((TLR_RESULT)0xC09B8016L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_HAS_NO_DEFAULT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Has no default value. */ +/* */ +#define TLR_E_CO_OBJDICT_HAS_NO_DEFAULT_VALUE ((TLR_RESULT)0xC09B8017L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_INDICATION_FLAGS_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Indication flags not allowed. */ +/* */ +#define TLR_E_CO_OBJDICT_INDICATION_FLAGS_NOT_ALLOWED ((TLR_RESULT)0xC09B8018L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_INDICATION_FLAGS_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Indication flags not supported. */ +/* */ +#define TLR_E_CO_OBJDICT_INDICATION_FLAGS_NOT_SUPPORTED ((TLR_RESULT)0xC09B8019L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_ONLY_ONE_RW_UNDEFINED_SUBOBJ_NOTIFY_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Only one read/write notify for non-existing subobject notify allowed. */ +/* */ +#define TLR_E_CO_OBJDICT_ONLY_ONE_RW_UNDEFINED_SUBOBJ_NOTIFY_ALLOWED ((TLR_RESULT)0xC09B801AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_ONLY_ONE_INFO_UNDEFINED_SUBOBJ_NOTIFY_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Only one info notify for non-existing subobject notify allowed. */ +/* */ +#define TLR_E_CO_OBJDICT_ONLY_ONE_INFO_UNDEFINED_SUBOBJ_NOTIFY_ALLOWED ((TLR_RESULT)0xC09B801BL) + + /* Unexpected Errors (if happening, notify support) */ +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_000 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF000) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_000 ((TLR_RESULT)0xC09BF000L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_001 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF001) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_001 ((TLR_RESULT)0xC09BF001L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_002 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF002) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_002 ((TLR_RESULT)0xC09BF002L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_003 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF003) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_003 ((TLR_RESULT)0xC09BF003L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_004 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF004) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_004 ((TLR_RESULT)0xC09BF004L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_005 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF005) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_005 ((TLR_RESULT)0xC09BF005L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_006 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF006) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_006 ((TLR_RESULT)0xC09BF006L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_007 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF007) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_007 ((TLR_RESULT)0xC09BF007L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_008 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF008) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_008 ((TLR_RESULT)0xC09BF008L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_009 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF009) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_009 ((TLR_RESULT)0xC09BF009L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00A */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00A) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00A ((TLR_RESULT)0xC09BF00AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00B */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00B) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00B ((TLR_RESULT)0xC09BF00BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00C */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00C) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00C ((TLR_RESULT)0xC09BF00CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00D */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00D) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00D ((TLR_RESULT)0xC09BF00DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00E */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00E) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00E ((TLR_RESULT)0xC09BF00EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00F */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF00F) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_00F ((TLR_RESULT)0xC09BF00FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_010 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF010) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_010 ((TLR_RESULT)0xC09BF010L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_011 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF011) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_011 ((TLR_RESULT)0xC09BF011L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_012 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF012) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_012 ((TLR_RESULT)0xC09BF012L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_013 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF013) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_013 ((TLR_RESULT)0xC09BF013L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_014 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF014) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_014 ((TLR_RESULT)0xC09BF014L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_015 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF015) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_015 ((TLR_RESULT)0xC09BF015L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_016 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF016) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_016 ((TLR_RESULT)0xC09BF016L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_017 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF017) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_017 ((TLR_RESULT)0xC09BF017L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_018 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF018) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_018 ((TLR_RESULT)0xC09BF018L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_019 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF019) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_019 ((TLR_RESULT)0xC09BF019L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01A */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01A) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01A ((TLR_RESULT)0xC09BF01AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01B */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01B) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01B ((TLR_RESULT)0xC09BF01BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01C */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01C) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01C ((TLR_RESULT)0xC09BF01CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01D */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01D) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01D ((TLR_RESULT)0xC09BF01DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01E */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01E) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01E ((TLR_RESULT)0xC09BF01EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01F */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF01F) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_01F ((TLR_RESULT)0xC09BF01FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_020 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF020) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_020 ((TLR_RESULT)0xC09BF020L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_021 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF021) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_021 ((TLR_RESULT)0xC09BF021L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_022 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF022) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_022 ((TLR_RESULT)0xC09BF022L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_023 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF023) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_023 ((TLR_RESULT)0xC09BF023L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_024 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF024) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_024 ((TLR_RESULT)0xC09BF024L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_025 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF025) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_025 ((TLR_RESULT)0xC09BF025L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_026 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF026) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_026 ((TLR_RESULT)0xC09BF026L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_027 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF027) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_027 ((TLR_RESULT)0xC09BF027L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_028 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF028) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_028 ((TLR_RESULT)0xC09BF028L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_029 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF029) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_029 ((TLR_RESULT)0xC09BF029L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02A */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02A) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02A ((TLR_RESULT)0xC09BF02AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02B */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02B) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02B ((TLR_RESULT)0xC09BF02BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02C */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02C) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02C ((TLR_RESULT)0xC09BF02CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02D */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02D) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02D ((TLR_RESULT)0xC09BF02DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02E */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02E) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02E ((TLR_RESULT)0xC09BF02EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02F */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF02F) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_02F ((TLR_RESULT)0xC09BF02FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_030 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF030) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_030 ((TLR_RESULT)0xC09BF030L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_031 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF031) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_031 ((TLR_RESULT)0xC09BF031L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_032 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF032) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_032 ((TLR_RESULT)0xC09BF032L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_033 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF033) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_033 ((TLR_RESULT)0xC09BF033L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_034 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF034) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_034 ((TLR_RESULT)0xC09BF034L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_035 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF035) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_035 ((TLR_RESULT)0xC09BF035L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_036 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF036) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_036 ((TLR_RESULT)0xC09BF036L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_037 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF037) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_037 ((TLR_RESULT)0xC09BF037L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_038 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF038) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_038 ((TLR_RESULT)0xC09BF038L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_039 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF039) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_039 ((TLR_RESULT)0xC09BF039L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03A */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03A) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03A ((TLR_RESULT)0xC09BF03AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03B */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03B) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03B ((TLR_RESULT)0xC09BF03BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03C */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03C) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03C ((TLR_RESULT)0xC09BF03CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03D */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03D) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03D ((TLR_RESULT)0xC09BF03DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03E */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03E) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03E ((TLR_RESULT)0xC09BF03EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03F */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF03F) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_03F ((TLR_RESULT)0xC09BF03FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_040 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF040) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_040 ((TLR_RESULT)0xC09BF040L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_041 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF041) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_041 ((TLR_RESULT)0xC09BF041L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_042 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF042) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_042 ((TLR_RESULT)0xC09BF042L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_043 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF043) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_043 ((TLR_RESULT)0xC09BF043L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_044 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF044) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_044 ((TLR_RESULT)0xC09BF044L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_045 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF045) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_045 ((TLR_RESULT)0xC09BF045L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_046 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF046) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_046 ((TLR_RESULT)0xC09BF046L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_047 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF047) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_047 ((TLR_RESULT)0xC09BF047L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_048 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF048) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_048 ((TLR_RESULT)0xC09BF048L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_049 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF049) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_049 ((TLR_RESULT)0xC09BF049L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04A */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04A) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04A ((TLR_RESULT)0xC09BF04AL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04B */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04B) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04B ((TLR_RESULT)0xC09BF04BL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04C */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04C) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04C ((TLR_RESULT)0xC09BF04CL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04D */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04D) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04D ((TLR_RESULT)0xC09BF04DL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04E */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04E) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04E ((TLR_RESULT)0xC09BF04EL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04F */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF04F) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_04F ((TLR_RESULT)0xC09BF04FL) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_050 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF050) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_050 ((TLR_RESULT)0xC09BF050L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_051 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF051) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_051 ((TLR_RESULT)0xC09BF051L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_052 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF052) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_052 ((TLR_RESULT)0xC09BF052L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_053 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF053) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_053 ((TLR_RESULT)0xC09BF053L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_054 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF054) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_054 ((TLR_RESULT)0xC09BF054L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_055 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF055) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_055 ((TLR_RESULT)0xC09BF055L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_056 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF056) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_056 ((TLR_RESULT)0xC09BF056L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_057 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF057) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_057 ((TLR_RESULT)0xC09BF057L) + +/* */ +/* MessageId: TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_058 */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected Error (0xF058) */ +/* */ +#define TLR_E_CO_OBJDICT_UNEXPECTED_ERROR_058 ((TLR_RESULT)0xC09BF058L) + + + + +#endif /* __CO_OBJDICT_ERROR_H */ + +#ifndef __OD2_ERROR_H +#define __OD2_ERROR_H + +/*****************************************************************************/ +/* Object Dictionary error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_OD2_OBJECT_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Object in use. */ +/* */ +#define TLR_E_OD2_OBJECT_IN_USE ((TLR_RESULT)0xC0280001L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_SUBINDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid subindex. No such subobject. */ +/* */ +#define TLR_E_OD2_INVALID_SUBINDEX ((TLR_RESULT)0xC0280002L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_DATATYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid datatype. */ +/* */ +#define TLR_E_OD2_INVALID_DATATYPE ((TLR_RESULT)0xC0280003L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_BUFFER_PTR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid buffer pointer. */ +/* */ +#define TLR_E_OD2_INVALID_BUFFER_PTR ((TLR_RESULT)0xC0280004L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_SECTOR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid sector. */ +/* */ +#define TLR_E_OD2_INVALID_SECTOR ((TLR_RESULT)0xC0280005L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_SUBSECTOR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid subsector. */ +/* */ +#define TLR_E_OD2_INVALID_SUBSECTOR ((TLR_RESULT)0xC0280006L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid object. */ +/* */ +#define TLR_E_OD2_INVALID_OBJECT ((TLR_RESULT)0xC0280007L) + +/* */ +/* MessageId: TLR_E_OD2_INVALID_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid index. No such object. */ +/* */ +#define TLR_E_OD2_INVALID_INDEX ((TLR_RESULT)0xC0280008L) + +/* */ +/* MessageId: TLR_E_OD2_SUBOBJECT_NOT_ALLOCATED */ +/* */ +/* MessageText: */ +/* */ +/* Subobject is not allocated. */ +/* */ +#define TLR_E_OD2_SUBOBJECT_NOT_ALLOCATED ((TLR_RESULT)0xC0280009L) + +/* */ +/* MessageId: TLR_E_OD2_BUFFER_TOO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* Buffer too small. */ +/* */ +#define TLR_E_OD2_BUFFER_TOO_SMALL ((TLR_RESULT)0xC028000AL) + +/* */ +/* MessageId: TLR_E_OD2_READ_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* Read only object. */ +/* */ +#define TLR_E_OD2_READ_ONLY ((TLR_RESULT)0xC028000BL) + +/* */ +/* MessageId: TLR_E_OD2_WRITE_ONLY */ +/* */ +/* MessageText: */ +/* */ +/* Write only object. */ +/* */ +#define TLR_E_OD2_WRITE_ONLY ((TLR_RESULT)0xC028000CL) + +/* */ +/* MessageId: TLR_E_OD2_SUBOBJECT_CNT_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* Subobject count mismatch. */ +/* */ +#define TLR_E_OD2_SUBOBJECT_CNT_MISMATCH ((TLR_RESULT)0xC028000DL) + +/* */ +/* MessageId: TLR_W_OD2_SUBOBJECT_IS_ADDRESSED_RELATIVE */ +/* */ +/* MessageText: */ +/* */ +/* Subobject is addressed relative to a base ptr. */ +/* */ +#define TLR_W_OD2_SUBOBJECT_IS_ADDRESSED_RELATIVE ((TLR_RESULT)0x8028000EL) + +/* */ +/* MessageId: TLR_E_OD2_NOT_ENOUGH_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory. */ +/* */ +#define TLR_E_OD2_NOT_ENOUGH_MEMORY ((TLR_RESULT)0xC028000FL) + +/* */ +/* MessageId: TLR_E_OD2_CALLBACK_IS_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Callback is locked against changes. */ +/* */ +#define TLR_E_OD2_CALLBACK_IS_LOCKED ((TLR_RESULT)0xC0280010L) + +/* */ +/* MessageId: TLR_E_OD2_DATATYPE_LENGTH_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Datatype length is too long. */ +/* */ +#define TLR_E_OD2_DATATYPE_LENGTH_TOO_LONG ((TLR_RESULT)0xC0280011L) + +/* */ +/* MessageId: TLR_E_OD2_PDO_LENGTH_WOULD_EXCEED */ +/* */ +/* MessageText: */ +/* */ +/* PDO length would exceed maximum transfer size. */ +/* */ +#define TLR_E_OD2_PDO_LENGTH_WOULD_EXCEED ((TLR_RESULT)0xC0280012L) + +/* */ +/* MessageId: TLR_E_OD2_OBJECT_CANNOT_BE_PDO_MAPPED */ +/* */ +/* MessageText: */ +/* */ +/* An object cannot be mapped in a PDO. */ +/* */ +#define TLR_E_OD2_OBJECT_CANNOT_BE_PDO_MAPPED ((TLR_RESULT)0xC0280013L) + +/* */ +/* MessageId: TLR_E_OD2_BUFFER_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* Buffer too big. */ +/* */ +#define TLR_E_OD2_BUFFER_TOO_BIG ((TLR_RESULT)0xC0280014L) + +/* */ +/* MessageId: TLR_E_OD2_UNSUPPORTED_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported Access. */ +/* */ +#define TLR_E_OD2_UNSUPPORTED_ACCESS ((TLR_RESULT)0xC0280015L) + +/* */ +/* MessageId: TLR_E_OD2_VALUE_WRITTEN_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Value written too high. */ +/* */ +#define TLR_E_OD2_VALUE_WRITTEN_TOO_HIGH ((TLR_RESULT)0xC0280016L) + +/* */ +/* MessageId: TLR_E_OD2_VALUE_WRITTEN_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Value written too low. */ +/* */ +#define TLR_E_OD2_VALUE_WRITTEN_TOO_LOW ((TLR_RESULT)0xC0280017L) + +/* */ +/* MessageId: TLR_E_OD2_OBJECT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Object already exists. */ +/* */ +#define TLR_E_OD2_OBJECT_ALREADY_EXISTS ((TLR_RESULT)0xC0280018L) + +/* */ +/* MessageId: TLR_E_OD2_SUBOBJECT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Sub-Object already exists. */ +/* */ +#define TLR_E_OD2_SUBOBJECT_ALREADY_EXISTS ((TLR_RESULT)0xC0280019L) + +/* */ +/* MessageId: TLR_E_OD2_SUBOBJECT_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* Sub-Object does not exist. */ +/* */ +#define TLR_E_OD2_SUBOBJECT_DOES_NOT_EXIST ((TLR_RESULT)0xC028001AL) + +/* */ +/* MessageId: TLR_E_OD2_OBJECT_CREATION_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Object creation locked. */ +/* */ +#define TLR_E_OD2_OBJECT_CREATION_LOCKED ((TLR_RESULT)0xC028001BL) + + + + +#endif /* __OD2_ERROR_H */ + +#ifndef __OMB_OMBAPTASK_ERROR_H +#define __OMB_OMBAPTASK_ERROR_H + +/*****************************************************************************/ +/* OMB OmbApTask Packet Status codes (Open Modbus TCP AP Task) */ +/*****************************************************************************/ +/* MessageId = 0x0001 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB_AP */ +/* SymbolicName = TLR_E_OMB_OMBAPTASK_COMMAND_INVALID */ +/* Language = English */ +/* Invalid command received. */ +/* . */ +/* Language = German */ +/* Ungltiges Kommando erhalten. */ +/* . */ +/* MessageId = 0x0002 */ +/* Severity = Information */ +/* Facility = TLR_UNQ_NR_OMB_OMB_AP */ +/* SymbolicName = TLR_I_OMB_OMBAPTASK_CONFIG_LOCK */ +/* Language = English */ +/* Configuration is locked. */ +/* . */ +/* Language = German */ +/* Die Konfiguration ist gesperrt. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_WATCHDOG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for watchdog supervision. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_WATCHDOG_PARAMETER ((TLR_RESULT)0xC0610003L) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_WATCHDOG_ACTIVATE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to activate watchdog supervision. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_WATCHDOG_ACTIVATE ((TLR_RESULT)0xC0610004L) + +/* MessageId = 0x0005 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB_AP */ +/* SymbolicName = TLR_E_OMB_OMBAPTASK_REQUEST_RUNNING */ +/* Language = English */ +/* Request already running. */ +/* . */ +/* Language = German */ +/* Ein Befehl is bereits aktiv. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_SYS_FLAG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for system flags. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_SYS_FLAG_PARAMETER ((TLR_RESULT)0xC0610006L) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulQueElemCnt. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT ((TLR_RESULT)0xC0610007L) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulPoolElemCnt. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT ((TLR_RESULT)0xC0610008L) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_START_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulStartFlags. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_START_FLAGS ((TLR_RESULT)0xC0610009L) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_CHN_INST */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulChnInst. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_INVALID_STARTUP_PARAMETER_CHN_INST ((TLR_RESULT)0xC061000AL) + +/* */ +/* MessageId: TLR_E_OMB_OMBAPTASK_FATAL_ERROR_OMB_TASK */ +/* */ +/* MessageText: */ +/* */ +/* The OMB task reports a fatal error. System has stopped. */ +/* See extended status tMidCodeDiag for further information. */ +/* */ +#define TLR_E_OMB_OMBAPTASK_FATAL_ERROR_OMB_TASK ((TLR_RESULT)0xC061000BL) + + + + +#endif /* __OMB_OMBAPTASK_ERROR_H */ + +#ifndef __OMB_OMBTASK_ERROR_H +#define __OMB_OMBTASK_ERROR_H + +/*****************************************************************************/ +/* OMB OmbTask Packet Status codes (Open Modbus TCP Task) */ +/*****************************************************************************/ +/* Initialization Error Codes */ +/* MessageId = 0x0001 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_COMMAND_INVALID */ +/* Language = English */ +/* Invalid command received. */ +/* . */ +/* Language = German */ +/* Ungltiges Kommando erhalten. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SEND_IP_SET_CONFIG_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to forward the SET_CONFIG information to TCP_UDP task (because of a */ +/* resource problem). */ +/* */ +#define TLR_E_OMB_OMBTASK_SEND_IP_SET_CONFIG_FAILED ((TLR_RESULT)0xC0600002L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SYSTEM_FUNCTION_CODE */ +/* */ +/* MessageText: */ +/* */ +/* System error: Wrong function code. */ +/* */ +#define TLR_E_OMB_OMBTASK_SYSTEM_FUNCTION_CODE ((TLR_RESULT)0xC0600003L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_MEM_MOD_START_ADR */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong Modbus start address. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_MEM_MOD_START_ADR ((TLR_RESULT)0xC0600004L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_MEM_LEN */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong length of Memory map. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_MEM_LEN ((TLR_RESULT)0xC0600005L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_MEM_START_MEM_OFF */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong Start byteoffset in Memory map. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_MEM_START_MEM_OFF ((TLR_RESULT)0xC0600006L) + +/* MessageId = 0x00xx */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_MOD_MEM_ADR_AND_LEN */ +/* Language = English */ +/* IO mode: Wrong Modbus start address in conjunction with the length of Memory map. */ +/* . */ +/* Language = German */ +/* IO-Mode: Falsche Modbus Startadresse in Verbindung mit der Laenge des Abbildspeichers. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_MEM_SYSTEM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: System error. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_MEM_SYSTEM_ERROR ((TLR_RESULT)0xC0600007L) + +/* MessageId = 0x00xx */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_TRIBUFF_INIT_BUFFER */ +/* Language = English */ +/* The initialization of buffer has failed. */ +/* . */ +/* Language = German */ +/* Die Initialisierung der Puffer ist fehlgeschlagen. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulQueElemCnt. */ +/* */ +#define TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT ((TLR_RESULT)0xC0600008L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulPoolElemCnt. */ +/* */ +#define TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT ((TLR_RESULT)0xC0600009L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_START_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulStartFlags. */ +/* */ +#define TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_START_FLAGS ((TLR_RESULT)0xC060000AL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_OMB_CYCLE_EVENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulOmbCycleEvent. */ +/* */ +#define TLR_E_OMB_OMBTASK_INVALID_STARTUP_PARAMETER_OMB_CYCLE_EVENT ((TLR_RESULT)0xC060000BL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_APPLICATION_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create an application timer (Timer task). */ +/* */ +#define TLR_E_OMB_OMBTASK_APPLICATION_TIMER_CREATE_FAILED ((TLR_RESULT)0xC060000CL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_APPLICATION_TIMER_INIT_PACKET_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize a packet of application timer (Timer task). */ +/* */ +#define TLR_E_OMB_OMBTASK_APPLICATION_TIMER_INIT_PACKET_FAILED ((TLR_RESULT)0xC060000DL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_TCP_UDP_IDENTIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify the TCP_UDP task. */ +/* */ +#define TLR_E_OMB_OMBTASK_TCP_UDP_IDENTIFY_FAILED ((TLR_RESULT)0xC060000EL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_TCP_UDP_QUEUE_IDENTIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The queue identification of TCP_UDP task queue has failed. */ +/* */ +#define TLR_E_OMB_OMBTASK_TCP_UDP_QUEUE_IDENTIFY_FAILED ((TLR_RESULT)0xC060000FL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_BUFFER_QUEUE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creation of buffer queue failed. */ +/* */ +#define TLR_E_OMB_OMBTASK_BUFFER_QUEUE_CREATE_FAILED ((TLR_RESULT)0xC0600010L) + +/* MessageId = 0x0011 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_NOT_CONFIGURED */ +/* Language = English */ +/* No configuration available. */ +/* . */ +/* Language = German */ +/* Keine Konfiguration vorhanden. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_FLAGS_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Flags' (ulFlags). */ +/* */ +#define TLR_E_OMB_OMBTASK_FLAGS_VALUE ((TLR_RESULT)0xC0600012L) + +/* Initialization Error Codes (Numbers MessageId are compatible to old RCS errors) */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SERVER_CONNECT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Open Server Sockets' (ulOpenServerSockets). */ +/* */ +#define TLR_E_OMB_OMBTASK_SERVER_CONNECT_VALUE ((TLR_RESULT)0xC0600034L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ANSWER_TIMEOUT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Answer Timeout' (ulAnswerTimeout). */ +/* */ +#define TLR_E_OMB_OMBTASK_ANSWER_TIMEOUT_VALUE ((TLR_RESULT)0xC0600035L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_OPEN_TIMEOUT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Omb Open Time' (ulOmbOpenTime). */ +/* */ +#define TLR_E_OMB_OMBTASK_OPEN_TIMEOUT_VALUE ((TLR_RESULT)0xC0600036L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MODE_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Mode' (ulMode). */ +/* */ +#define TLR_E_OMB_OMBTASK_MODE_VALUE ((TLR_RESULT)0xC0600037L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SEND_TIMEOUT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Send Timeout' (ulSendTimeout). */ +/* */ +#define TLR_E_OMB_OMBTASK_SEND_TIMEOUT_VALUE ((TLR_RESULT)0xC0600038L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_CONNECT_TIMEOUT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Connect Timeout' (ulConnectTimeout). */ +/* */ +#define TLR_E_OMB_OMBTASK_CONNECT_TIMEOUT_VALUE ((TLR_RESULT)0xC0600039L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_CLOSE_TIMEOUT_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Close Timeout' (ulCloseTimeout). */ +/* */ +#define TLR_E_OMB_OMBTASK_CLOSE_TIMEOUT_VALUE ((TLR_RESULT)0xC060003AL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SWAB_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter 'Swap' (ulSwap). */ +/* */ +#define TLR_E_OMB_OMBTASK_SWAB_VALUE ((TLR_RESULT)0xC060003BL) + +/* MessageId = 60 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_ERR_INIT_TCP_TASK_NOT_READY */ +/* Language = English */ +/* TCP_UDP task not ready. */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* MessageId = 61 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_ERR_INIT_PLC_TASK_NOT_READY */ +/* Language = English */ +/* PLC task not found. */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* MessageId = 62 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_ERR_INIT_TASK_CONFIG */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* MessageId = 63 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_PLC_ERR_INIT_MODE */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* Run-time Error Codes (Numbers MessageId are compatible to old RCS errors) */ +/* MessageId = 111 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_UNKNOWN_TX */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_ANSWER */ +/* */ +/* MessageText: */ +/* */ +/* TCP_UDP task answered with an error. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_ANSWER ((TLR_RESULT)0xC0600070L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_STATE */ +/* */ +/* MessageText: */ +/* */ +/* No socket in specific status found. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_STATE ((TLR_RESULT)0xC0600071L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value in command. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_VALUE ((TLR_RESULT)0xC0600072L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_TCP_TASK_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Error in TCP_UDP task state. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_TCP_TASK_STATE ((TLR_RESULT)0xC0600073L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_MODBUS */ +/* */ +/* MessageText: */ +/* */ +/* Error in Modbus telegram - for further information, see variable ulException in this chapter. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_MODBUS ((TLR_RESULT)0xC0600074L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_NO_SOCKET */ +/* */ +/* MessageText: */ +/* */ +/* No free and unused socket found. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_NO_SOCKET ((TLR_RESULT)0xC0600075L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_UNKNOWN_SOCKET */ +/* */ +/* MessageText: */ +/* */ +/* TCP_UDP command for an unknown socket received. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_UNKNOWN_SOCKET ((TLR_RESULT)0xC0600076L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* The timeout for the Client-Job is expired. Timeout-Count starts after target has */ +/* received the command. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_TIMEOUT ((TLR_RESULT)0xC0600077L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_UNEXPECTED_CLOSE */ +/* */ +/* MessageText: */ +/* */ +/* Socket was unexpected closed. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_UNEXPECTED_CLOSE ((TLR_RESULT)0xC0600078L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_USER_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* The User is not ready (not registered). */ +/* */ +#define TLR_E_OMB_OMBTASK_USER_NOT_READY ((TLR_RESULT)0xC0600079L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_NO_SOCKET_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* OMB task is not able to open sockets (TCP_UDP task is not ready). */ +/* */ +#define TLR_E_OMB_OMBTASK_NO_SOCKET_AVAILABLE ((TLR_RESULT)0xC060007AL) + +/* MessageId = 123 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_WATCHDOG */ +/* Language = English */ +/* Watchdog error. */ +/* . */ +/* Language = German */ +/* Watchdog-Fehler. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_ERR_IP_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* TCP_UDP task is in configuration status. */ +/* */ +#define TLR_E_OMB_OMBTASK_ERR_IP_CONFIG ((TLR_RESULT)0xC060007CL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_PLC_TASK_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* No Dualport-memory access. */ +/* */ +#define TLR_E_OMB_OMBTASK_PLC_TASK_NOT_INITIALIZED ((TLR_RESULT)0xC060007DL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SEVER_SOCKET_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Server Socket was closed, before the answer is received. */ +/* */ +#define TLR_E_OMB_OMBTASK_SEVER_SOCKET_CLOSED ((TLR_RESULT)0xC060007EL) + +/* MessageId = 151 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_MESSAGESIZE */ +/* Language = English */ +/* Invalid packet length detected. */ +/* . */ +/* Language = German */ +/* Falsche Packet-Lnge. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_DEVICE_ADR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid device address (IP address). */ +/* */ +#define TLR_E_OMB_OMBTASK_DEVICE_ADR ((TLR_RESULT)0xC06000A1L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Data count. */ +/* */ +#define TLR_E_OMB_OMBTASK_DATA_CNT ((TLR_RESULT)0xC06000A5L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_FUNCTION */ +/* */ +/* MessageText: */ +/* */ +/* Wrong Function code. Function code is not supported. */ +/* */ +#define TLR_E_OMB_OMBTASK_FUNCTION ((TLR_RESULT)0xC06000A7L) + +/* //////// New rxC error codes, starting with a value bigger than the RCS error codes = 255 ////////// */ +/* /// General OMB errors 0x0100 ... 0x01FF (reserved) ///// */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_DATA_ADR */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong Modbus address. Modbus address is outside of Memory map. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_DATA_ADR ((TLR_RESULT)0xC0600100L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong Data count in conjunction with the Modbus address. */ +/* The access area is outside of Memory map. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_DATA_CNT ((TLR_RESULT)0xC0600101L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_FUNCTION_CODE */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong Function code. Function code is not supported. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_FUNCTION_CODE ((TLR_RESULT)0xC0600102L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_DATA_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Wrong data type. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_DATA_TYPE ((TLR_RESULT)0xC0600103L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MOD_BIT_AREA */ +/* */ +/* MessageText: */ +/* */ +/* IO mode: Addressed coil is outside of the IO area. */ +/* */ +#define TLR_E_OMB_OMBTASK_MOD_BIT_AREA ((TLR_RESULT)0xC0600104L) + +/* MessageId = 0x0105 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_OMB_OMB */ +/* SymbolicName = TLR_E_OMB_OMBTASK_REQUEST_RUNNING */ +/* Language = English */ +/* Request already running. */ +/* . */ +/* Language = German */ +/* Ein Befehl is bereits aktiv. */ +/* . */ +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_SEND_TCP_CONFIG_RELOAD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to forward the configuration reload to TCP_UDP task (because of a */ +/* resource problem). */ +/* */ +#define TLR_E_OMB_OMBTASK_SEND_TCP_CONFIG_RELOAD_FAILED ((TLR_RESULT)0xC0600106L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_WRONG_CONFIG_RELOAD_STS */ +/* */ +/* MessageText: */ +/* */ +/* Wrong configuration reload state. */ +/* */ +#define TLR_E_OMB_OMBTASK_WRONG_CONFIG_RELOAD_STS ((TLR_RESULT)0xC0600107L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_RESOURCE_OCCUPIED */ +/* */ +/* MessageText: */ +/* */ +/* System error: The requestet resource is occupied. */ +/* */ +#define TLR_E_OMB_OMBTASK_RESOURCE_OCCUPIED ((TLR_RESULT)0xC0600108L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_AP_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* A application is already registered. */ +/* */ +#define TLR_E_OMB_OMBTASK_AP_ALREADY_REGISTERED ((TLR_RESULT)0xC0600109L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_AP_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* A application is not registered. */ +/* */ +#define TLR_E_OMB_OMBTASK_AP_NOT_REGISTERED ((TLR_RESULT)0xC060010AL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_START_STOP_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Wrong mode ulMode in command OMB_OMBTASK_CMD_START_STOP_OMB_REQ. */ +/* */ +#define TLR_E_OMB_OMBTASK_START_STOP_MODE ((TLR_RESULT)0xC060010BL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_START_STOP_STATE_CHANGE */ +/* */ +/* MessageText: */ +/* */ +/* No senseful state change request (Start/stop) in command */ +/* OMB_OMBTASK_CMD_START_STOP_OMB_REQ. */ +/* */ +#define TLR_E_OMB_OMBTASK_START_STOP_STATE_CHANGE ((TLR_RESULT)0xC060010CL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_IO_MODE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* IO mode:Invalid command received */ +/* */ +#define TLR_E_OMB_OMBTASK_IO_MODE_COMMAND_INVALID ((TLR_RESULT)0xC060010DL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_STATE_NOT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* The OMB stack is not in running state (Info status: ulTaskState is not */ +/* OMB_ST_TASK_RUNNING) or the Communication state is not operating */ +/* (ulCommunicationState is not RCX_COMM_STATE_OPERATE). */ +/* */ +#define TLR_E_OMB_OMBTASK_STATE_NOT_RUNNING ((TLR_RESULT)0xC060010EL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MBAP_HEADER */ +/* */ +/* MessageText: */ +/* */ +/* Wrong MBAP header received (Transaction Identifier, Protocol Identifier) */ +/* */ +#define TLR_E_OMB_OMBTASK_MBAP_HEADER ((TLR_RESULT)0xC060010FL) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_UNIT_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Unit identifier (ulUnitId). */ +/* */ +#define TLR_E_OMB_OMBTASK_UNIT_ID ((TLR_RESULT)0xC0600110L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_EXCEPTION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Exception code (ulException). */ +/* */ +#define TLR_E_OMB_OMBTASK_EXCEPTION ((TLR_RESULT)0xC0600111L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_MBAP_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MBAP header Length value. */ +/* */ +#define TLR_E_OMB_OMBTASK_MBAP_LENGTH ((TLR_RESULT)0xC0600112L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_PDU_BYTE_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDU Byte count. */ +/* */ +#define TLR_E_OMB_OMBTASK_PDU_BYTE_COUNT ((TLR_RESULT)0xC0600113L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_PDU_REF_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDU Reference Number (Starting Address). */ +/* */ +#define TLR_E_OMB_OMBTASK_PDU_REF_NUMBER ((TLR_RESULT)0xC0600114L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_PDU_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDU Data count (Quantity). */ +/* */ +#define TLR_E_OMB_OMBTASK_PDU_DATA_CNT ((TLR_RESULT)0xC0600115L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_PDU_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid PDU Value. */ +/* */ +#define TLR_E_OMB_OMBTASK_PDU_VALUE ((TLR_RESULT)0xC0600116L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_DATA_ADR */ +/* */ +/* MessageText: */ +/* */ +/* Wrong Modbus address. The Modbus address is outside of the Modbus Data model */ +/* (Range 0 ... 65535). */ +/* */ +#define TLR_E_OMB_OMBTASK_DATA_ADR ((TLR_RESULT)0xC0600117L) + +/* */ +/* MessageId: TLR_E_OMB_OMBTASK_DATA_ADR_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Wrong Data count in conjunction with the Modbus address. */ +/* The access area is outside of the Modbus Data model (Range 0 ... 65535). */ +/* */ +#define TLR_E_OMB_OMBTASK_DATA_ADR_CNT ((TLR_RESULT)0xC0600118L) + + + + +#endif /* __OMB_OMBTASK_ERROR_H */ + +#ifndef __P3964R_APP_ERROR_H +#define __P3964R_APP_ERROR_H + +/*****************************************************************************/ +/* 3964R App ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_P3964R_APP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_P3964R_APP_COMMAND_INVALID ((TLR_RESULT)0xC0900001L) + +/* */ +/* MessageId: TLR_E_P3964R_APP_RINGBUFFER_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Ringbuffer full. */ +/* */ +#define TLR_E_P3964R_APP_RINGBUFFER_FULL ((TLR_RESULT)0xC0900002L) + +/* */ +/* MessageId: TLR_E_P3964R_APP_RINGBUFFER_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* Ringbuffer empty. */ +/* */ +#define TLR_E_P3964R_APP_RINGBUFFER_EMPTY ((TLR_RESULT)0x40900003L) + +/* */ +/* MessageId: TLR_E_P3964R_APP_RINGBUFFER_INIT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Ringbuffer init error. */ +/* */ +#define TLR_E_P3964R_APP_RINGBUFFER_INIT_ERROR ((TLR_RESULT)0xC0900004L) + + + + +#endif /* __P3964R_APP_ERROR_H */ + +#ifndef __P3964R_STACK_ERROR_H +#define __P3964R_STACK_ERROR_H + +/*****************************************************************************/ +/* 3964R Stack ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_P3964R_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_P3964R_COMMAND_INVALID ((TLR_RESULT)0xC08F0001L) + +/* */ +/* MessageId: TLR_E_P3964R_STACK_PACKET_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Packet is too long. */ +/* */ +#define TLR_E_P3964R_STACK_PACKET_TOO_LONG ((TLR_RESULT)0xC08F0002L) + +/* */ +/* MessageId: TLR_E_P3964R_STACK_LED_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* LED is not supported. */ +/* */ +#define TLR_E_P3964R_STACK_LED_NOT_SUPPORTED ((TLR_RESULT)0xC08F0003L) + +/* */ +/* MessageId: TLR_E_P3964R_INIT_CONFLICT_HIGH_PRIO */ +/* */ +/* MessageText: */ +/* */ +/* Init conflict, both devices have high priority */ +/* */ +#define TLR_E_P3964R_INIT_CONFLICT_HIGH_PRIO ((TLR_RESULT)0xC08F0004L) + +/* */ +/* MessageId: TLR_E_P3964R_INIT_CONFLICT_LOW_PRIO */ +/* */ +/* MessageText: */ +/* */ +/* Init conflict, both devices have low priority */ +/* */ +#define TLR_E_P3964R_INIT_CONFLICT_LOW_PRIO ((TLR_RESULT)0xC08F0005L) + +/* */ +/* MessageId: TLR_E_P3964R_TX_NEG_ACK_TO_CON_CLEARDOWN */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Negative Ackn at connection cleardown. */ +/* */ +#define TLR_E_P3964R_TX_NEG_ACK_TO_CON_CLEARDOWN ((TLR_RESULT)0xC08F0006L) + +/* */ +/* MessageId: TLR_E_P3964R_TX_NEG_ACK_TO_CON_BUILDUP */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Negative Ackn at connection buildup. */ +/* */ +#define TLR_E_P3964R_TX_NEG_ACK_TO_CON_BUILDUP ((TLR_RESULT)0xC08F0007L) + +/* */ +/* MessageId: TLR_E_P3964R_TX_TRANSM_ABORT_BY_RECEIVER */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Transmission aborted by receiver. */ +/* */ +#define TLR_E_P3964R_TX_TRANSM_ABORT_BY_RECEIVER ((TLR_RESULT)0xC08F0008L) + +/* */ +/* MessageId: TLR_E_P3964R_TX_ACK_TIMEOUT_AT_BUILDUP */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Ackn timeout at connection buildup. */ +/* */ +#define TLR_E_P3964R_TX_ACK_TIMEOUT_AT_BUILDUP ((TLR_RESULT)0xC08F0009L) + +/* */ +/* MessageId: TLR_E_P3964R_TX_ACK_TIMEOUT_AT_CLEARDOWN */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Ackn timeout at connection cleardown. */ +/* */ +#define TLR_E_P3964R_TX_ACK_TIMEOUT_AT_CLEARDOWN ((TLR_RESULT)0xC08F000AL) + +/* */ +/* MessageId: TLR_E_P3964R_TX_DATA_TRANSM_INTERRUPTED */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Transmission interrupted by receiver. */ +/* */ +#define TLR_E_P3964R_TX_DATA_TRANSM_INTERRUPTED ((TLR_RESULT)0xC08F001BL) + +/* */ +/* MessageId: TLR_E_P3964R_TX_RAND_CHAR_TO_CON_BUILDUP */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Recvd arbitrary char at connection buildup. */ +/* */ +#define TLR_E_P3964R_TX_RAND_CHAR_TO_CON_BUILDUP ((TLR_RESULT)0xC08F000CL) + +/* */ +/* MessageId: TLR_E_P3964R_TX_RAND_CHAR_TO_CON_CLEARDOWN */ +/* */ +/* MessageText: */ +/* */ +/* Transm Error: Recvd arbitrary char at connection cleardown. */ +/* */ +#define TLR_E_P3964R_TX_RAND_CHAR_TO_CON_CLEARDOWN ((TLR_RESULT)0xC08F000DL) + +/* */ +/* MessageId: TLR_E_P3964R_RX_FRAME_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: Frame too long. */ +/* */ +#define TLR_E_P3964R_RX_FRAME_TOO_LONG ((TLR_RESULT)0xC08F000EL) + +/* */ +/* MessageId: TLR_E_P3964R_RX_DLE_NOT_DOUBLED */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: DLE not doubled. */ +/* */ +#define TLR_E_P3964R_RX_DLE_NOT_DOUBLED ((TLR_RESULT)0xC08F000FL) + +/* */ +/* MessageId: TLR_E_P3964R_RX_RANDOM_CHAR_RECVD_IN_IDLE */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: char other than STX received in idle state. */ +/* */ +#define TLR_E_P3964R_RX_RANDOM_CHAR_RECVD_IN_IDLE ((TLR_RESULT)0xC08F0010L) + +/* */ +/* MessageId: TLR_E_P3964R_RX_CHARACTER_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: Character timeout. */ +/* */ +#define TLR_E_P3964R_RX_CHARACTER_TIMEOUT ((TLR_RESULT)0xC08F0011L) + +/* */ +/* MessageId: TLR_E_P3964R_RX_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: Checksum error(BCC). */ +/* */ +#define TLR_E_P3964R_RX_CHECKSUM_ERROR ((TLR_RESULT)0xC08F0012L) + +/* */ +/* MessageId: TLR_E_P3964R_RX_NO_MEM_SEG_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Recept. Error: No memory segment available. */ +/* */ +#define TLR_E_P3964R_RX_NO_MEM_SEG_AVAILABLE ((TLR_RESULT)0xC08F0013L) + +/* */ +/* MessageId: TLR_E_P3964R_UART_PARITY_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* UART parity error. */ +/* */ +#define TLR_E_P3964R_UART_PARITY_ERROR ((TLR_RESULT)0xC08F0014L) + +/* */ +/* MessageId: TLR_E_P3964R_UART_BREAK */ +/* */ +/* MessageText: */ +/* */ +/* UART break. */ +/* */ +#define TLR_E_P3964R_UART_BREAK ((TLR_RESULT)0xC08F0015L) + +/* */ +/* MessageId: TLR_E_P3964R_UART_FRAME_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* UART framing error. */ +/* */ +#define TLR_E_P3964R_UART_FRAME_ERROR ((TLR_RESULT)0xC08F0016L) + +/* */ +/* MessageId: TLR_E_P3964R_UART_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* UART overrun. */ +/* */ +#define TLR_E_P3964R_UART_OVERRUN ((TLR_RESULT)0xC08F0017L) + + + + +#endif /* __P3964R_STACK_ERROR_H */ + +#ifndef __PLM_ERROR_H +#define __PLM_ERROR_H + +/*****************************************************************************/ +/* PowerLink MN Errors */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PLM_MN_SDO_LAYER_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* SDO Layer Busy. */ +/* */ +#define TLR_E_PLM_MN_SDO_LAYER_BUSY ((TLR_RESULT)0xC0A40001L) + +/* */ +/* MessageId: TLR_E_PLM_MN_SDO_LOWER_LAYER_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* SDO Lower Layer Abort. */ +/* */ +#define TLR_E_PLM_MN_SDO_LOWER_LAYER_ABORT ((TLR_RESULT)0xC0A40002L) + +/* */ +/* MessageId: TLR_E_PLM_UNKNOWN_SDO_CON_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown SDO Connection State. */ +/* */ +#define TLR_E_PLM_UNKNOWN_SDO_CON_STATE ((TLR_RESULT)0xC0A40003L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_INVALID_FRAGMENTATION_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid fragmentation id. */ +/* */ +#define TLR_E_PLM_SDO_INVALID_FRAGMENTATION_ID ((TLR_RESULT)0xC0A40004L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_WRONG_STATE_FOR_FRAGMENTATION */ +/* */ +/* MessageText: */ +/* */ +/* Wrong State detected during SDO Fragmentation. */ +/* */ +#define TLR_E_PLM_SDO_WRONG_STATE_FOR_FRAGMENTATION ((TLR_RESULT)0xC0A40005L) + +/* 0x1000-0x1FFF used for SDO Abort Code mapping */ +/* */ +/* MessageId: TLR_E_PLM_UNKNOWN_SDO_ABORT_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown SDO Abort Code. */ +/* */ +#define TLR_E_PLM_UNKNOWN_SDO_ABORT_CODE ((TLR_RESULT)0xC0A41000L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_PROTOCOL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SDO Protocol Timeout. */ +/* */ +#define TLR_E_PLM_SDO_PROTOCOL_TIMEOUT ((TLR_RESULT)0xC0A41001L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_COMMAND_ID_NOT_VALID */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Client/Server Command Id not valid or unknown. */ +/* */ +#define TLR_E_PLM_SDO_COMMAND_ID_NOT_VALID ((TLR_RESULT)0xC0A41002L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_INVALID_BLOCK_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Invalid block size. */ +/* */ +#define TLR_E_PLM_SDO_INVALID_BLOCK_SIZE ((TLR_RESULT)0xC0A41003L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_INVALID_SEQUENCE_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid sequence number. */ +/* */ +#define TLR_E_PLM_SDO_INVALID_SEQUENCE_NUMBER ((TLR_RESULT)0xC0A41004L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Out Of Memory. */ +/* */ +#define TLR_E_PLM_SDO_OUT_OF_MEMORY ((TLR_RESULT)0xC0A41005L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_UNSUPPORTED_ACCESS_TO_AN_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Unsupported access to an object. */ +/* */ +#define TLR_E_PLM_SDO_UNSUPPORTED_ACCESS_TO_AN_OBJECT ((TLR_RESULT)0xC0A41006L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Attempt to read a write only object. */ +/* */ +#define TLR_E_PLM_SDO_ATTEMPT_TO_READ_A_WRITE_ONLY_OBJECT ((TLR_RESULT)0xC0A41007L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Attempt to write a read only object. */ +/* */ +#define TLR_E_PLM_SDO_ATTEMPT_TO_WRITE_A_READ_ONLY_OBJECT ((TLR_RESULT)0xC0A41008L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_OBJECT_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Object does not exist. */ +/* */ +#define TLR_E_PLM_SDO_OBJECT_DOES_NOT_EXIST ((TLR_RESULT)0xC0A41009L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_OBJECT_CANNOT_BE_MAPPED_TO_THE_PDO */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Object cannot be mapped to the PDO. */ +/* */ +#define TLR_E_PLM_SDO_OBJECT_CANNOT_BE_MAPPED_TO_THE_PDO ((TLR_RESULT)0xC0A4100AL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_WOULD_EXCEED_PDO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* SDO: The number and length of the objects to be mapped would exceed PDO length. */ +/* */ +#define TLR_E_PLM_SDO_WOULD_EXCEED_PDO_LENGTH ((TLR_RESULT)0xC0A4100BL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_GENERAL_PARAMETER_INCOMPATIBILITY */ +/* */ +/* MessageText: */ +/* */ +/* SDO: General Parameter Incompatibility. */ +/* */ +#define TLR_E_PLM_SDO_GENERAL_PARAMETER_INCOMPATIBILITY ((TLR_RESULT)0xC0A4100CL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_INVALID_HEARTBEAT_DECLARATION */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Invalid heartbeat declaration. */ +/* */ +#define TLR_E_PLM_SDO_INVALID_HEARTBEAT_DECLARATION ((TLR_RESULT)0xC0A4100DL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_THE_DEVICE */ +/* */ +/* MessageText: */ +/* */ +/* SDO: General internal incompatibility in the device. */ +/* */ +#define TLR_E_PLM_SDO_GENERAL_INTERNAL_INCOMPATIBILITY_IN_THE_DEVICE ((TLR_RESULT)0xC0A4100EL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_ACCESS_FAILED_DUE_TO_AN_HARDWARE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Access failed due to an hardware error. */ +/* */ +#define TLR_E_PLM_SDO_ACCESS_FAILED_DUE_TO_AN_HARDWARE_ERROR ((TLR_RESULT)0xC0A4100FL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_DOES_NOT_MATCH */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data type does not match, length of service parameter does not match. */ +/* */ +#define TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_DOES_NOT_MATCH ((TLR_RESULT)0xC0A41010L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data type does not match, length of service parameter too high. */ +/* */ +#define TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_TOO_HIGH ((TLR_RESULT)0xC0A41011L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data type does not match, length of service parameter too low. */ +/* */ +#define TLR_E_PLM_SDO_LENGTH_OF_SVC_PARAM_TOO_LOW ((TLR_RESULT)0xC0A41012L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_SUB_INDEX_DOES_NOT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Sub-index does not exist. */ +/* */ +#define TLR_E_PLM_SDO_SUB_INDEX_DOES_NOT_EXIST ((TLR_RESULT)0xC0A41013L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Value range of parameter exceeded (only for write access). */ +/* */ +#define TLR_E_PLM_SDO_VALUE_RANGE_OF_PARAMETER_EXCEEDED ((TLR_RESULT)0xC0A41014L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Value of parameter written too high. */ +/* */ +#define TLR_E_PLM_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_HIGH ((TLR_RESULT)0xC0A41015L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Value of parameter written too low. */ +/* */ +#define TLR_E_PLM_SDO_VALUE_OF_PARAMETER_WRITTEN_TOO_LOW ((TLR_RESULT)0xC0A41016L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Maximum value is less than minimum value. */ +/* */ +#define TLR_E_PLM_SDO_MAXIMUM_VALUE_IS_LESS_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC0A41017L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_GENERAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* SDO: General error. */ +/* */ +#define TLR_E_PLM_SDO_GENERAL_ERROR ((TLR_RESULT)0xC0A41018L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data cannot be transferred or stored to the application. */ +/* */ +#define TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION ((TLR_RESULT)0xC0A41019L) + +/* */ +/* MessageId: TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION_DUE_LOCAL_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data cannot be transferred or stored to the applciation because of local control. */ +/* */ +#define TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION_DUE_LOCAL_CONTROL ((TLR_RESULT)0xC0A4101AL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION_DUE_DEVICE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Data cannot be transferred or stored to the application because of the present device state. */ +/* */ +#define TLR_E_PLM_SDO_DATA_NOT_TRANSFERRED_TO_APPLICATION_DUE_DEVICE_STATE ((TLR_RESULT)0xC0A4101BL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_NO_OBJECT_DICTIONARY_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* SDO: Object dictionary dynamic generation fails or no object dictionary is present. */ +/* */ +#define TLR_E_PLM_SDO_NO_OBJECT_DICTIONARY_PRESENT ((TLR_RESULT)0xC0A4101CL) + +/* */ +/* MessageId: TLR_E_PLM_SDO_EDS_DCF_OR_CONCISE_DCF_DATA_SET_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* SDO: EDS, DCF or Concise DCF Data set empty. */ +/* */ +#define TLR_E_PLM_SDO_EDS_DCF_OR_CONCISE_DCF_DATA_SET_EMPTY ((TLR_RESULT)0xC0A4101DL) + + + + +#endif /* __PLM_ERROR_H */ + +#ifndef __PNIO_APCTL_ERROR_H +#define __PNIO_APCTL_ERROR_H + +/*****************************************************************************/ +/* PNIO APCTL Diagnostic Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_APCTL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_PNIO_APCTL_COMMAND_INVALID ((TLR_RESULT)0xC00C0001L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_RSC_OUTOFMEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Unsufficient memory to handle the request. */ +/* */ +#define TLR_E_PNIO_APCTL_RSC_OUTOFMEMORY ((TLR_RESULT)0xC00C0002L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_HIF_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Error indetifying HIF. */ +/* */ +#define TLR_E_PNIO_APCTL_HIF_IDENT ((TLR_RESULT)0xC00C0003L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_AREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify requested DPM Channel. */ +/* */ +#define TLR_E_PNIO_APCTL_AREA_IDENT ((TLR_RESULT)0xC00C0004L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_GETAREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "STD INPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_GETAREA_IDENT ((TLR_RESULT)0xC00C0005L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SETAREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "STD OUTPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_SETAREA_IDENT ((TLR_RESULT)0xC00C0006L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SETAREA_INFO_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to get configuration for DPM section "STD OUTPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_SETAREA_INFO_GET ((TLR_RESULT)0xC00C0007L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_TOHOST_MBX_NAME_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "TOHOST MBX". */ +/* */ +#define TLR_E_PNIO_APCTL_TOHOST_MBX_NAME_GET ((TLR_RESULT)0xC00C0008L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_TOHOST_MBX_INFO_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to get configuration for DPM section "TOHOST MBX". */ +/* */ +#define TLR_E_PNIO_APCTL_TOHOST_MBX_INFO_GET ((TLR_RESULT)0xC00C0009L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_MIDSYS_QUE_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify queue to MidSys. */ +/* */ +#define TLR_E_PNIO_APCTL_MIDSYS_QUE_IDENT ((TLR_RESULT)0xC00C000AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ENABLE_BUSON_CBK */ +/* */ +/* MessageText: */ +/* */ +/* Enabling callback function for ApplicationCOS.BUS_ON bit did not succeed. */ +/* */ +#define TLR_E_PNIO_APCTL_ENABLE_BUSON_CBK ((TLR_RESULT)0xC00C000BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ENABLE_APPREADY_CBK */ +/* */ +/* MessageText: */ +/* */ +/* Enabling callback function for ApplicationCOS.APP_READY bit did not succeed. */ +/* */ +#define TLR_E_PNIO_APCTL_ENABLE_APPREADY_CBK ((TLR_RESULT)0xC00C000CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_COMMONAREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "COMMON STATUS". */ +/* */ +#define TLR_E_PNIO_APCTL_COMMONAREA_IDENT ((TLR_RESULT)0xC00C000DL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_STATUSAREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "EXTENDED STATUS". */ +/* */ +#define TLR_E_PNIO_APCTL_STATUSAREA_IDENT ((TLR_RESULT)0xC00C000EL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CONTROLAREA_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify DPM section "CONTROL". */ +/* */ +#define TLR_E_PNIO_APCTL_CONTROLAREA_IDENT ((TLR_RESULT)0xC00C000FL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_GETAREA_INT_ENBL */ +/* */ +/* MessageText: */ +/* */ +/* Unable to enable DPM section "STD INPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_GETAREA_INT_ENBL ((TLR_RESULT)0xC00C0010L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SETAREA_INT_ENBL */ +/* */ +/* MessageText: */ +/* */ +/* Unable to enable DPM section "STD OUTPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_SETAREA_INT_ENBL ((TLR_RESULT)0xC00C0011L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ENABLE_INIT_CBK */ +/* */ +/* MessageText: */ +/* */ +/* Enabling callback function for ApplicationCOS.INITIALIZATION bit did not succeed. */ +/* */ +#define TLR_E_PNIO_APCTL_ENABLE_INIT_CBK ((TLR_RESULT)0xC00C0012L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_VOL_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to identify SysVolume. */ +/* */ +#define TLR_E_PNIO_APCTL_VOL_IDENT ((TLR_RESULT)0xC00C0013L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_VOL_MOUNT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to mount SysVolume */ +/* */ +#define TLR_E_PNIO_APCTL_VOL_MOUNT ((TLR_RESULT)0xC00C0014L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_FAT_FRMT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to format SysVolume. */ +/* */ +#define TLR_E_PNIO_APCTL_FAT_FRMT ((TLR_RESULT)0xC00C0015L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_QUE_CREATE */ +/* */ +/* MessageText: */ +/* */ +/* The Queue for APCTL task could not be created. */ +/* */ +#define TLR_E_PNIO_APCTL_QUE_CREATE ((TLR_RESULT)0xC00C0016L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CMCTL_QUE_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* The Queue for CMCTL task could not be identified. */ +/* */ +#define TLR_E_PNIO_APCTL_CMCTL_QUE_IDENT ((TLR_RESULT)0xC00C0017L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_MGT_QUE_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* The Queue for MGT task could not be identified. */ +/* */ +#define TLR_E_PNIO_APCTL_MGT_QUE_IDENT ((TLR_RESULT)0xC00C0018L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ACP_QUE_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* The Queue for ACP task could not be identified. */ +/* */ +#define TLR_E_PNIO_APCTL_ACP_QUE_IDENT ((TLR_RESULT)0xC00C0019L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_GETAREA_INFO_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to get configuration for DPM section "STD INPUT". */ +/* */ +#define TLR_E_PNIO_APCTL_GETAREA_INFO_GET ((TLR_RESULT)0xC00C001AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CLR_PCK_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to get a free packet from packet pool to unregister DPM channel from rcX. */ +/* */ +#define TLR_E_PNIO_APCTL_CLR_PCK_GET ((TLR_RESULT)0xC00C001BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SET_PCK_GET */ +/* */ +/* MessageText: */ +/* */ +/* Unable to get a free packet from packet pool to register DPM channel from rcX. */ +/* */ +#define TLR_E_PNIO_APCTL_SET_PCK_GET ((TLR_RESULT)0xC00C001CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_IDENT_QUE_MIDSYS */ +/* */ +/* MessageText: */ +/* */ +/* The Queue of rcX MidSys task could not be identified. */ +/* */ +#define TLR_E_PNIO_APCTL_IDENT_QUE_MIDSYS ((TLR_RESULT)0xC00C001DL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CREATE_TIMER_SET */ +/* */ +/* MessageText: */ +/* */ +/* The timer for firmware-controlled handling of IO-data in DPM could not be created. */ +/* */ +#define TLR_E_PNIO_APCTL_CREATE_TIMER_SET ((TLR_RESULT)0xC00C001EL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_MEMALLOC_TIMER_SET */ +/* */ +/* MessageText: */ +/* */ +/* Not enough free memory available for firmware-controlled handling of IO-data in DPM. */ +/* */ +#define TLR_E_PNIO_APCTL_MEMALLOC_TIMER_SET ((TLR_RESULT)0xC00C001FL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_WDG_INIT */ +/* */ +/* MessageText: */ +/* */ +/* The Watchdog timer could not be initialized. */ +/* */ +#define TLR_E_PNIO_APCTL_WDG_INIT ((TLR_RESULT)0xC00C0020L) + +/* */ +/* MessageId: TLR_E_INFO_FIELD_ONE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The field for extended APCTL task status information could not be created. */ +/* */ +#define TLR_E_INFO_FIELD_ONE_CREATE_FAILED ((TLR_RESULT)0xC00C0021L) + +/* */ +/* MessageId: TLR_E_INFO_FIELD_TWO_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An undefined field could not be created (unused). */ +/* */ +#define TLR_E_INFO_FIELD_TWO_CREATE_FAILED ((TLR_RESULT)0xC00C0022L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_POOL_CREATE */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool for APCTL task could not be created. */ +/* */ +#define TLR_E_PNIO_APCTL_POOL_CREATE ((TLR_RESULT)0xC00C0023L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_IOCR_LIST */ +/* */ +/* MessageText: */ +/* */ +/* The number of the input IOCRs is not equal to the number of the output IOCRs. */ +/* */ +#define TLR_E_PNIO_APCTL_IOCR_LIST ((TLR_RESULT)0xC00C0024L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_DPM */ +/* */ +/* MessageText: */ +/* */ +/* The requested function is not supported because DPM is not initialized. */ +/* */ +#define TLR_E_PNIO_APCTL_DPM ((TLR_RESULT)0xC00C0025L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ENABLE_LOCKCONFIG_CBK */ +/* */ +/* MessageText: */ +/* */ +/* Enabling callback function for ApplicationCOS.LOCK_CONFIGURATION bit did not succeed. */ +/* */ +#define TLR_E_PNIO_APCTL_ENABLE_LOCKCONFIG_CBK ((TLR_RESULT)0xC00C0026L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_LED_CREATE */ +/* */ +/* MessageText: */ +/* */ +/* The LEDs could not be initialized. */ +/* */ +#define TLR_E_PNIO_APCTL_LED_CREATE ((TLR_RESULT)0xC00C0027L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ENABLE_DMA_CBK */ +/* */ +/* MessageText: */ +/* */ +/* Enabling callback function to enable DMA mode did not succeed. */ +/* */ +#define TLR_E_PNIO_APCTL_ENABLE_DMA_CBK ((TLR_RESULT)0xC00C0028L) + +/* The following codes are used by Benjamin */ +/* */ +/* MessageId: TLR_E_PNIO_APCTL_RPC_REQUEST_LIMIT_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* Too many outstanding RPC-requests for this IO-Device. */ +/* */ +#define TLR_E_PNIO_APCTL_RPC_REQUEST_LIMIT_REACHED ((TLR_RESULT)0xC00C0030L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending internal message to another task. */ +/* */ +#define TLR_E_PNIO_APCTL_PACKET_SEND_FAILED ((TLR_RESULT)0xC00C0031L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_INVALID_CMCTL_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* The handle used for IO-Device is wrong. */ +/* */ +#define TLR_E_PNIO_APCTL_INVALID_CMCTL_HANDLE ((TLR_RESULT)0xC00C0032L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_INVALID_NAME_OF_STATION_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The name to be set has incorrect length. */ +/* */ +#define TLR_E_PNIO_APCTL_INVALID_NAME_OF_STATION_LENGTH ((TLR_RESULT)0xC00C0033L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_DCP_REQUEST_LIMIT_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* Too many outstanding DCP-requests for this IO-Device. */ +/* */ +#define TLR_E_PNIO_APCTL_DCP_REQUEST_LIMIT_REACHED ((TLR_RESULT)0xC00C0034L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_OTHER_CONFIG_PACKET_IN_PROCESS */ +/* */ +/* MessageText: */ +/* */ +/* An other configuration packet is in process wait for its confimation packet. */ +/* */ +#define TLR_E_PNIO_APCTL_OTHER_CONFIG_PACKET_IN_PROCESS ((TLR_RESULT)0xC00C0035L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_APCFG_QUE_IDENT */ +/* */ +/* MessageText: */ +/* */ +/* Identification of APCFG queue in remote resources failed. */ +/* */ +#define TLR_E_PNIO_APCTL_APCFG_QUE_IDENT ((TLR_RESULT)0xC00C0036L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_UNKNOWN_ALARM_SPECIFIER */ +/* */ +/* MessageText: */ +/* */ +/* The Alarmspecifier is unknown to IO-Controller. */ +/* */ +#define TLR_E_PNIO_APCTL_UNKNOWN_ALARM_SPECIFIER ((TLR_RESULT)0xC00C0037L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_DCP_REQUEST_NO_ANSWER */ +/* */ +/* MessageText: */ +/* */ +/* The requested IO-Device did not answer to the DCP-requests. */ +/* */ +#define TLR_E_PNIO_APCTL_DCP_REQUEST_NO_ANSWER ((TLR_RESULT)0xC00C0038L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_APPLICATION_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* There is alredy an Application registered to APCTL-Task. */ +/* */ +#define TLR_E_PNIO_APCTL_APPLICATION_ALREADY_REGISTERED ((TLR_RESULT)0xC00C0040L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_NO_APPLICATION_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* There is no Application registered to APCTL-Task. */ +/* */ +#define TLR_E_PNIO_APCTL_NO_APPLICATION_REGISTERED ((TLR_RESULT)0xC00C0041L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_UNREGISTER_APPLICATION_IMPOSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* It is impossible to unregister the Application in APCTL-Task. Either there is no Application registered or the Unregister Request was not send by the registered Application. */ +/* */ +#define TLR_E_PNIO_APCTL_UNREGISTER_APPLICATION_IMPOSSIBLE ((TLR_RESULT)0xC00C0042L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CHANNEL_INIT_REQUESTED */ +/* */ +/* MessageText: */ +/* */ +/* The request is rejected because a Channel Init was requested. */ +/* */ +#define TLR_E_PNIO_APCTL_CHANNEL_INIT_REQUESTED ((TLR_RESULT)0xC00C0050L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_BUS_STATE_OFF */ +/* */ +/* MessageText: */ +/* */ +/* The request is rejected because bus state is set OFF or a running request was interrupted by setting bus state to OFF. */ +/* */ +#define TLR_E_PNIO_APCTL_BUS_STATE_OFF ((TLR_RESULT)0xC00C0051L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CYCLIC_WATCHDOG_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* The connection to an IO-Device was closed because too many cyclic frames were missing. */ +/* */ +#define TLR_E_PNIO_APCTL_CYCLIC_WATCHDOG_ERROR ((TLR_RESULT)0xC00C0052L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CONNECTION_CLOSED_BY_IODEVICE */ +/* */ +/* MessageText: */ +/* */ +/* The connection was shutdown by an IO-Device. */ +/* */ +#define TLR_E_PNIO_APCTL_CONNECTION_CLOSED_BY_IODEVICE ((TLR_RESULT)0xC00C0053L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_WATCHDOG_TIME_TOO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* The watchdog time specified is too small. */ +/* */ +#define TLR_E_PNIO_APCTL_WATCHDOG_TIME_TOO_SMALL ((TLR_RESULT)0xC00C0054L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_WATCHDOG_TIME_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* The watchdog time specified is too big. */ +/* */ +#define TLR_E_PNIO_APCTL_WATCHDOG_TIME_TOO_BIG ((TLR_RESULT)0xC00C0055L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_IO_DEVICE_NOT_IN_DATAEXCHANGE */ +/* */ +/* MessageText: */ +/* */ +/* The service is unavailable because the IO-Device is not in cyclic data exchange. */ +/* */ +#define TLR_E_PNIO_APCTL_IO_DEVICE_NOT_IN_DATAEXCHANGE ((TLR_RESULT)0xC00C0056L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_REMOTE */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. The IO-Device answered with an error code which is contained in confirmation packet. */ +/* */ +#define TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_REMOTE ((TLR_RESULT)0xC00C0060L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_RPC */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. The RPC-layer detected an error which is contained in confirmation packet. */ +/* */ +#define TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_RPC ((TLR_RESULT)0xC00C0061L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_INTERNAL */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. An internal error occured. */ +/* */ +#define TLR_E_PNIO_APCTL_ACYCLIC_REQ_FAILED_INTERNAL ((TLR_RESULT)0xC00C0062L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_TOO_MUCH_IO_DATA_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum supported IO-data size is exceeded. */ +/* */ +#define TLR_E_PNIO_APCTL_TOO_MUCH_IO_DATA_CONFIGURED ((TLR_RESULT)0xC00C0063L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_INVALID_IP_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The IP address is invalid. */ +/* */ +#define TLR_E_PNIO_APCTL_INVALID_IP_ADDRESS ((TLR_RESULT)0xC00C0064L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_INVALID_NETMASK */ +/* */ +/* MessageText: */ +/* */ +/* The Netmask is invalid. */ +/* */ +#define TLR_E_PNIO_APCTL_INVALID_NETMASK ((TLR_RESULT)0xC00C0065L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_INVALID_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* The gateway address is invalid. */ +/* */ +#define TLR_E_PNIO_APCTL_INVALID_GATEWAY ((TLR_RESULT)0xC00C0066L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_TOO_MUCH_DATA_REQUESTED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum supported data size for this service is exceeded. */ +/* */ +#define TLR_E_PNIO_APCTL_TOO_MUCH_DATA_REQUESTED ((TLR_RESULT)0xC00C0067L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_CHANNEL_INIT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* The request can not be handled because a ChannelInit is currently running. */ +/* */ +#define TLR_E_PNIO_APCTL_CHANNEL_INIT_RUNNING ((TLR_RESULT)0xC00C0068L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SEND_CMCTL_CHANNEL_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Internal sending of Channel Init to CMCTL failed. */ +/* */ +#define TLR_E_PNIO_APCTL_SEND_CMCTL_CHANNEL_INIT_FAILED ((TLR_RESULT)0xC00C0069L) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_SEND_APCFG_CHANNEL_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Internal sending of Channel Init to APCFG failed. */ +/* */ +#define TLR_E_PNIO_APCTL_SEND_APCFG_CHANNEL_INIT_FAILED ((TLR_RESULT)0xC00C006AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCTL_EMPTY_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* A configuration without IO-Devices has been detected. */ +/* */ +#define TLR_E_PNIO_APCTL_EMPTY_CONFIGURATION ((TLR_RESULT)0xC00C006BL) + +/*****************************************************************************/ +/* PNIO APCFG Diagnostic Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_APCFG_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_PNIO_APCFG_COMMAND_INVALID ((TLR_RESULT)0xC0140001L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_UNKNOWN_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Unknown DBM version. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_UNKNOWN_VERSION ((TLR_RESULT)0xC0140002L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_NO_DATASET */ +/* */ +/* MessageText: */ +/* */ +/* No dataset existing. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_NO_DATASET ((TLR_RESULT)0xC0140003L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_SIZE_OF_DATASET */ +/* */ +/* MessageText: */ +/* */ +/* Wrong size of DBM dataset. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_SIZE_OF_DATASET ((TLR_RESULT)0xC0140004L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_LEN_TYPEOFSTATION */ +/* */ +/* MessageText: */ +/* */ +/* Type of station is too large. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_LEN_TYPEOFSTATION ((TLR_RESULT)0xC0140005L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_LEN_NAMEOFSTATION */ +/* */ +/* MessageText: */ +/* */ +/* Name of station is too large. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_LEN_NAMEOFSTATION ((TLR_RESULT)0xC0140006L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_UNKNOWN_IOCR_KEY */ +/* */ +/* MessageText: */ +/* */ +/* Unkwown IOCR relationship in submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_UNKNOWN_IOCR_KEY ((TLR_RESULT)0xC0140007L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_IOCR_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* IOCR is in use by another IO-Device. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_IOCR_ALREADY_IN_USE ((TLR_RESULT)0xC0140008L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_IOCR_IN_SUBMDESCR */ +/* */ +/* MessageText: */ +/* */ +/* Wrong IO-Type of IOCR in submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_IOCR_IN_SUBMDESCR ((TLR_RESULT)0xC0140009L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_DATALEN_IN_SUBMDESCR */ +/* */ +/* MessageText: */ +/* */ +/* Wrong data length in submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_DATALEN_IN_SUBMDESCR ((TLR_RESULT)0xC014000AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_DATADESCR_IN_SUBMDESCR */ +/* */ +/* MessageText: */ +/* */ +/* Wrong IO-type in data description of the submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_DATADESCR_IN_SUBMDESCR ((TLR_RESULT)0xC014000BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_UNEXP_SUBMDESCR */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_UNEXP_SUBMDESCR ((TLR_RESULT)0xC014000CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_MISSING_SUBMDESCR */ +/* */ +/* MessageText: */ +/* */ +/* Missing submodule description. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_MISSING_SUBMDESCR ((TLR_RESULT)0xC014000DL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_ASSERTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Assertion failed. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_ASSERTION_FAILED ((TLR_RESULT)0xC014000EL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_UNEXP_TREE_IDENTIFICATON */ +/* */ +/* MessageText: */ +/* */ +/* Wrong sequence/numbering in the tree identification numbers. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_UNEXP_TREE_IDENTIFICATON ((TLR_RESULT)0xC014000FL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_OVERWRITING_CONSISTING_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Addressed dataset is already existing and would be overwritten. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_OVERWRITING_CONSISTING_DATA ((TLR_RESULT)0xC0140010L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_MISSING_IOCR */ +/* */ +/* MessageText: */ +/* */ +/* Input or output IOCR of module is missing. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_MISSING_IOCR ((TLR_RESULT)0xC0140011L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_WRONG_IO_TYPE_IN_IOCR */ +/* */ +/* MessageText: */ +/* */ +/* Wrong input or output type in IOCR. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_WRONG_IO_TYPE_IN_IOCR ((TLR_RESULT)0xC0140012L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_WRONG_SEQUENCE_OF_FRAGMENTED_PACKETS */ +/* */ +/* MessageText: */ +/* */ +/* Wrong sequence of fragmented packets. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_WRONG_SEQUENCE_OF_FRAGMENTED_PACKETS ((TLR_RESULT)0xC0140013L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_WRONG_FRAGMENT_IDENTIFIER */ +/* */ +/* MessageText: */ +/* */ +/* Wrong fragment identifier in fragmented packets. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_WRONG_FRAGMENT_IDENTIFIER ((TLR_RESULT)0xC0140014L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_CONFIGURATION_IS_ALREADY_DONE_VIA_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Configuration is already done via DBM configuration packets are not accepted. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_CONFIGURATION_IS_ALREADY_DONE_VIA_DBM ((TLR_RESULT)0xC0140015L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_INCOMPLETE_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Incomplete configuration - not all devices are fully developet until submodule descriptions. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_INCOMPLETE_CONFIGURATION ((TLR_RESULT)0xC0140016L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PKT_DOWNLOAD_ALREADY_FINISHED */ +/* */ +/* MessageText: */ +/* */ +/* Paket download is already finished by download finish request. */ +/* */ +#define TLR_E_PNIO_APCFG_PKT_DOWNLOAD_ALREADY_FINISHED ((TLR_RESULT)0xC0140017L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_UNEXP_NUMBER_OF_RECORDS_IN_PNIOC_TABLES */ +/* */ +/* MessageText: */ +/* */ +/* More than one entry for one key was found in the tables of the fieldbus specific data. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_UNEXP_NUMBER_OF_RECORDS_IN_PNIOC_TABLES ((TLR_RESULT)0xC0140018L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_UNEXP_SIGNAL_ATTRIBUT */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected parameter Signal_Attrib in SIGNALS table. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_UNEXP_SIGNAL_ATTRIBUT ((TLR_RESULT)0xC0140019L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_IMPROPER_DPM_OFFSETS_AND_DATA_LENGTHS_IN_SIGNALS */ +/* */ +/* MessageText: */ +/* */ +/* Improper DPM offset and data length in SIGNALS. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_IMPROPER_DPM_OFFSETS_AND_DATA_LENGTHS_IN_SIGNALS ((TLR_RESULT)0xC014001AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_WRONG_TEST_DATA */ +/* */ +/* MessageText: */ +/* */ +/* Wrong test data. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_WRONG_TEST_DATA ((TLR_RESULT)0xC0140020L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DBM_INVALID_IO_DEVICE_AMOUNT */ +/* */ +/* MessageText: */ +/* */ +/* Too many IO-Devices are configured. */ +/* */ +#define TLR_E_PNIO_APCFG_DBM_INVALID_IO_DEVICE_AMOUNT ((TLR_RESULT)0xC0140021L) + +/* standard error codes */ +/* */ +/* MessageId: TLR_E_PNIO_APCFG_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Not enough memory available for current request. */ +/* */ +#define TLR_E_PNIO_APCFG_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0140030L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending internal message to another task. */ +/* */ +#define TLR_E_PNIO_APCFG_PACKET_SEND_FAILED ((TLR_RESULT)0xC0140031L) + +/* Packet configuration check error codes */ +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The length of parameter NameOfStation is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_LENGTH ((TLR_RESULT)0xC0140040L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_CHARACTER */ +/* */ +/* MessageText: */ +/* */ +/* The NameOfStation contains an invalid character. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_CHARACTER ((TLR_RESULT)0xC0140041L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_TYPE_OF_STATION_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The length of parameter TypeOfStation is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_TYPE_OF_STATION_LENGTH ((TLR_RESULT)0xC0140042L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_TYPE_OF_STATION_CHARACTER */ +/* */ +/* MessageText: */ +/* */ +/* The TypeOfStation cintains an invalid character. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_TYPE_OF_STATION_CHARACTER ((TLR_RESULT)0xC0140043L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_SYSTEMFLAGS */ +/* */ +/* MessageText: */ +/* */ +/* The parameter SystemFlags is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_SYSTEMFLAGS ((TLR_RESULT)0xC0140044L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_WATCHDOG_TIME */ +/* */ +/* MessageText: */ +/* */ +/* The parameter WatchdogTime is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_WATCHDOG_TIME ((TLR_RESULT)0xC0140045L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_VENDORID */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter VendorID is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_VENDORID ((TLR_RESULT)0xC0140046L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_DEVICEID */ +/* */ +/* MessageText: */ +/* */ +/* The parameter DeviceID is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_DEVICEID ((TLR_RESULT)0xC0140047L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IP_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The IP-Address to use is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IP_ADDRESS ((TLR_RESULT)0xC0140048L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NETMASK */ +/* */ +/* MessageText: */ +/* */ +/* The NetworkMask to use is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NETMASK ((TLR_RESULT)0xC0140049L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* The Gateway-Address to use is invalid or unreachable. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_GATEWAY ((TLR_RESULT)0xC014004AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IP_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IPFlags is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IP_FLAGS ((TLR_RESULT)0xC014004BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_STARTLABEL */ +/* */ +/* MessageText: */ +/* */ +/* The NameOfStation shall not start with - . or port-xyz. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NAME_OF_STATION_STARTLABEL ((TLR_RESULT)0xC014004CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_NAME_OF_STATION_LABEL_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* One label of NameOfStation is too short. */ +/* */ +#define TLR_E_PNIO_APCFG_NAME_OF_STATION_LABEL_TOO_SHORT ((TLR_RESULT)0xC014004DL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_NAME_OF_STATION_LABEL_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* One label of NameOfStation is too long. */ +/* */ +#define TLR_E_PNIO_APCFG_NAME_OF_STATION_LABEL_TOO_LONG ((TLR_RESULT)0xC014004EL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_NAME_OF_STATION_TOO_MANY_LABELS */ +/* */ +/* MessageText: */ +/* */ +/* The NameOfStation contains too many labels. */ +/* */ +#define TLR_E_PNIO_APCFG_NAME_OF_STATION_TOO_MANY_LABELS ((TLR_RESULT)0xC014004FL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_RTA_RETRIES */ +/* */ +/* MessageText: */ +/* */ +/* The parameter RTARetries is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_RTA_RETRIES ((TLR_RESULT)0xC0140050L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_RTA_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter RTATimeout is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_RTA_TIMEOUT ((TLR_RESULT)0xC0140051L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_AR_PROPERTIES */ +/* */ +/* MessageText: */ +/* */ +/* The parameter ARProperties is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_AR_PROPERTIES ((TLR_RESULT)0xC0140052L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_AR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The parameter ARType is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_AR_TYPE ((TLR_RESULT)0xC0140053L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_AR_UUID */ +/* */ +/* MessageText: */ +/* */ +/* The parameter ARUUID is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_AR_UUID ((TLR_RESULT)0xC0140054L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_ALARMCR_PROPERTIES */ +/* */ +/* MessageText: */ +/* */ +/* The parameter AlarmCRProperties is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_ALARMCR_PROPERTIES ((TLR_RESULT)0xC0140055L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_ALARMCR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter AlarmCRType is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_ALARMCR_TYPE ((TLR_RESULT)0xC0140056L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_MCAST_MAC */ +/* */ +/* MessageText: */ +/* */ +/* The parameter MulticastMACAddress is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_MCAST_MAC ((TLR_RESULT)0xC0140060L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_FRAMESENDOFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The parameter FrameSendOffset is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_FRAMESENDOFFSET ((TLR_RESULT)0xC0140061L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCR_PROPERTIES */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOCRProperties is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCR_PROPERTIES ((TLR_RESULT)0xC0140062L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCR_DATA_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOCRDataLength is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCR_DATA_LENGTH ((TLR_RESULT)0xC0140063L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOCRType is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCR_TYPE ((TLR_RESULT)0xC0140064L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_DATAHOLDFACTOR */ +/* */ +/* MessageText: */ +/* */ +/* The parameter DataHoldFactor is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_DATAHOLDFACTOR ((TLR_RESULT)0xC0140065L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_WATCHDOGFACTOR */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter WatchdogFactor is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_WATCHDOGFACTOR ((TLR_RESULT)0xC0140066L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_SENDCLOCKFACTOR */ +/* */ +/* MessageText: */ +/* */ +/* The parameter SendClockFactor is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_SENDCLOCKFACTOR ((TLR_RESULT)0xC0140067L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_REDUCTIONRATIO */ +/* */ +/* MessageText: */ +/* */ +/* The parameter ReductionRatio is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_REDUCTIONRATIO ((TLR_RESULT)0xC0140068L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_PHASE */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter Phase is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_PHASE ((TLR_RESULT)0xC0140069L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCS_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOCSLength is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCS_LENGTH ((TLR_RESULT)0xC0140070L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOPS_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOPSLength is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOPS_LENGTH ((TLR_RESULT)0xC0140071L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_DPM_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The parameter DPMOffset is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_DPM_OFFSET ((TLR_RESULT)0xC0140072L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_FRAME_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The parameter FrameOffset is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_FRAME_OFFSET ((TLR_RESULT)0xC0140073L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCS_FRAME_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The parameter IOCSFrameOffset is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCS_FRAME_OFFSET ((TLR_RESULT)0xC0140074L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_SUBMODULE_DATA_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The parameter SubmoduleDataLength is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_SUBMODULE_DATA_LENGTH ((TLR_RESULT)0xC0140075L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_DATA_DESCRIPTION */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter DataDescription is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_DATA_DESCRIPTION ((TLR_RESULT)0xC0140076L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_OVERLAPPING_FRAMEOFFSET_DATA */ +/* */ +/* MessageText: */ +/* */ +/* The frame offset to use for IO-Data is already in use by another submodule. */ +/* */ +#define TLR_E_PNIO_APCFG_OVERLAPPING_FRAMEOFFSET_DATA ((TLR_RESULT)0xC0140077L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_OVERLAPPING_FRAMEOFFSET_IOCS */ +/* */ +/* MessageText: */ +/* */ +/* The frame offset to use for the IOCS is already in use by another submodule. */ +/* */ +#define TLR_E_PNIO_APCFG_OVERLAPPING_FRAMEOFFSET_IOCS ((TLR_RESULT)0xC0140078L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_OVERLAPPING_DPMOFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The DPM offset to use for IO-Data is already in use by another submodule. */ +/* */ +#define TLR_E_PNIO_APCFG_OVERLAPPING_DPMOFFSET ((TLR_RESULT)0xC0140079L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_FRAMEOFFSET_OUTSIDE_DEFINED_IOCR */ +/* */ +/* MessageText: */ +/* */ +/* The frame offset is bigger than the IOCR-length. */ +/* */ +#define TLR_E_PNIO_APCFG_FRAMEOFFSET_OUTSIDE_DEFINED_IOCR ((TLR_RESULT)0xC014007AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_IOCS_FRAMEOFFSET_OUTSIDE_DEFINED_IOCR */ +/* */ +/* MessageText: */ +/* */ +/* The IOCS frame offset is bigger than the IOCR-length. */ +/* */ +#define TLR_E_PNIO_APCFG_IOCS_FRAMEOFFSET_OUTSIDE_DEFINED_IOCR ((TLR_RESULT)0xC014007BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCR_PROD_ID */ +/* */ +/* MessageText: */ +/* */ +/* The IOCRIdProd is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCR_PROD_ID ((TLR_RESULT)0xC014007CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_IOCR_CONS_ID */ +/* */ +/* MessageText: */ +/* */ +/* The IOCRICons is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_IOCR_CONS_ID ((TLR_RESULT)0xC014007DL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_RECORD_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The record data length is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_RECORD_LENGTH ((TLR_RESULT)0xC014007EL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_DUPLICATE_ARUUID */ +/* */ +/* MessageText: */ +/* */ +/* The ARUUID of this IO-Device is already in use by another IO-Device. */ +/* */ +#define TLR_E_PNIO_APCFG_DUPLICATE_ARUUID ((TLR_RESULT)0xC014007FL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_MULTIPLE_CR_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The configuration packet contains more than 1 IOCR for the same direction which is not supported. */ +/* */ +#define TLR_E_PNIO_APCFG_MULTIPLE_CR_NOT_SUPPORTED ((TLR_RESULT)0xC0140080L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_FAULTY_VERSION_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* The content of the version table in database is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_FAULTY_VERSION_TABLE ((TLR_RESULT)0xC0140081L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_UNSUPPORTED_DATABASE_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* The version of database is unsupported. */ +/* */ +#define TLR_E_PNIO_APCFG_UNSUPPORTED_DATABASE_VERSION ((TLR_RESULT)0xC0140082L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_MAUTYPE */ +/* */ +/* MessageText: */ +/* */ +/* The MAUType is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_MAUTYPE ((TLR_RESULT)0xC0140083L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_SIGNAL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The signal type is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_SIGNAL_TYPE ((TLR_RESULT)0xC0140084L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NO_INTF_SUBM */ +/* */ +/* MessageText: */ +/* */ +/* The requested submodule is no Interface Submodule. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NO_INTF_SUBM ((TLR_RESULT)0xC0140085L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_NO_PORT_SUBM */ +/* */ +/* MessageText: */ +/* */ +/* The requested submodule is no Port Submodule. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_NO_PORT_SUBM ((TLR_RESULT)0xC0140086L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_STRUCTURE_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* The value of structure version is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_STRUCTURE_VERSION ((TLR_RESULT)0xC0140087L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_HELLO_MODE */ +/* */ +/* MessageText: */ +/* */ +/* The Hello Mode is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_HELLO_MODE ((TLR_RESULT)0xC0140088L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_HELLO_RETRY */ +/* */ +/* MessageText: */ +/* */ +/* The value of Hello Retry is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_HELLO_RETRY ((TLR_RESULT)0xC0140089L) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_HELLO_INTERVAL */ +/* */ +/* MessageText: */ +/* */ +/* The value of Hello Interval is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_HELLO_INTERVAL ((TLR_RESULT)0xC014008AL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_HELLO_DELAY */ +/* */ +/* MessageText: */ +/* */ +/* The value of Hello Delay is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_HELLO_DELAY ((TLR_RESULT)0xC014008BL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_MRP_ROLE */ +/* */ +/* MessageText: */ +/* */ +/* The value of MRP Role is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_MRP_ROLE ((TLR_RESULT)0xC014008CL) + +/* */ +/* MessageId: TLR_E_PNIO_APCFG_INVALID_ORDERID_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The OrderId length is invalid. */ +/* */ +#define TLR_E_PNIO_APCFG_INVALID_ORDERID_LENGTH ((TLR_RESULT)0xC014008DL) + + + + +#endif /* __PNIO_APCTL_ERROR_H */ + +#ifndef __PNIOC_ERROR_H +#define __PNIOC_ERROR_H + +/*****************************************************************************/ +/* PNIO CTL Status codes */ +/*****************************************************************************/ +/*****************************************************************************/ +/* CMCTL-Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in CMCTL task. */ +/* */ +#define TLR_E_PNIO_CMCTL_COMMAND_INVALID ((TLR_RESULT)0xC00A0001L) + +/* */ +/* MessageId: TLR_E_PNIO_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Generic error code. See packets data-status code for details. */ +/* */ +#define TLR_E_PNIO_STATUS ((TLR_RESULT)0xC00A0002L) + +/* CMCTL */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter in CMCTL_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_CMCTL_INIT_PARAM_INVALID ((TLR_RESULT)0xC00A0010L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* No more CMCTL protocol machines possible. */ +/* */ +#define TLR_E_PNIO_CMCTL_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC00A0011L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for this request to CMCTL. */ +/* */ +#define TLR_E_PNIO_CMCTL_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC00A0012L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* This CMCTL protocol machine was closed. */ +/* */ +#define TLR_E_PNIO_CMCTL_CLOSED ((TLR_RESULT)0xC00A0013L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_STATE_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* This request can not be served in current CMCTL state. */ +/* */ +#define TLR_E_PNIO_CMCTL_STATE_CONFLICT ((TLR_RESULT)0xC00A0014L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_CONFIG_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* The state of CMCTL's managment resource is pending. */ +/* */ +#define TLR_E_PNIO_CMCTL_CONFIG_PENDING ((TLR_RESULT)0xC00A0015L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_CONFIG_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of CMCTL's managment resource is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_CONFIG_STATE_INVALID ((TLR_RESULT)0xC00A0016L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to create a packet in CMCTL task. */ +/* */ +#define TLR_E_PNIO_CMCTL_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC00A0017L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in CMCTL. */ +/* */ +#define TLR_E_PNIO_CMCTL_PACKET_SEND_FAILED ((TLR_RESULT)0xC00A0018L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_CONN_REQ_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The length of the Connect-Packet in CMCTL_Connect_req() is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_CONN_REQ_LEN_INVALID ((TLR_RESULT)0xC00A0019L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_NAME_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The length of the name for IO-Device does not match to the name in CMCTL_Connect_req(). */ +/* */ +#define TLR_E_PNIO_CMCTL_NAME_LEN_INVALID ((TLR_RESULT)0xC00A001AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKNUM_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Confirmation contains an incorrect amount of blocks. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKNUM_UNEXPECTED ((TLR_RESULT)0xC00A001BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKNUM_UNEXPECTED_MEMORY_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Confirmation contains an incorrect amount of blocks but may be received correctly in RPC-layer. CMCTL protocol-machine has not reserved enough memory for the whole confirmation. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKNUM_UNEXPECTED_MEMORY_FAULT ((TLR_RESULT)0xC00A001CL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_INVALID_FRAMEID_RECEIVED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Response from IO-Device specified an invalid FrameID to use for IO-Controllers OutputCR. */ +/* */ +#define TLR_E_PNIO_CMCTL_INVALID_FRAMEID_RECEIVED ((TLR_RESULT)0xC00A001DL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_EMPTY_POOL_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool of CMCTL is empty. */ +/* */ +#define TLR_E_PNIO_CMCTL_EMPTY_POOL_DETECTED ((TLR_RESULT)0xC00A001EL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* The connect-confirmation contains an unexpected block. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED ((TLR_RESULT)0xC00A0020L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_INIT */ +/* */ +/* MessageText: */ +/* */ +/* CMCTL_Connect_req() expected an INIT-block that is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_INIT ((TLR_RESULT)0xC00A0021L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_IODW_REQ */ +/* */ +/* MessageText: */ +/* */ +/* CMCTL_RMWrite_req() expected a WriteReq-block that is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_IODW_REQ ((TLR_RESULT)0xC00A0022L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_IODW_DATA */ +/* */ +/* MessageText: */ +/* */ +/* CMCTL_RMWrite_req() expected a WriteData-block that is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKTYPE_UNEXPECTED_IODW_DATA ((TLR_RESULT)0xC00A0023L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKLEN_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* INIT-block length for CMCTL_Connect_req() is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKLEN_INVALID_INIT ((TLR_RESULT)0xC00A0030L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKLEN_INVALID_IODW_REQ */ +/* */ +/* MessageText: */ +/* */ +/* WriteReq-block's length for CMCTL_RMWrite_req() is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKLEN_INVALID_IODW_REQ ((TLR_RESULT)0xC00A0031L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_BLKLEN_INVALID_IODW_DATA */ +/* */ +/* MessageText: */ +/* */ +/* WriteData-block's length for CMCTL_RMWrite_req() is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_BLKLEN_INVALID_IODW_DATA ((TLR_RESULT)0xC00A0032L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_INVALID_PM_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* The index of CMCTL protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_INVALID_PM_INDEX ((TLR_RESULT)0xC00A0040L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_INVALID_PM */ +/* */ +/* MessageText: */ +/* */ +/* The CMCTL protocol-machine corresponding to index is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_INVALID_PM ((TLR_RESULT)0xC00A0041L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_INVALID_CMCTL_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* The handle to CMCTL protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_INVALID_CMCTL_HANDLE ((TLR_RESULT)0xC00A0042L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_DEVICE_NOT_RESPONDING */ +/* */ +/* MessageText: */ +/* */ +/* The IO-Device which shall be connected does not answer. */ +/* */ +#define TLR_E_PNIO_CMCTL_DEVICE_NOT_RESPONDING ((TLR_RESULT)0xC00A0050L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_DUPLICATE_DEVICE_NAME_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* More than one IO-Device with the specified NameOfStation exists; a connection can not be established. */ +/* */ +#define TLR_E_PNIO_CMCTL_DUPLICATE_DEVICE_NAME_DETECTED ((TLR_RESULT)0xC00A0051L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_DEVICE_IP_ADDRESS_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* The IP-address the controller shall use for the IO-Device is already in use by another network device; a connection can not be established. */ +/* */ +#define TLR_E_PNIO_CMCTL_DEVICE_IP_ADDRESS_ALREADY_IN_USE ((TLR_RESULT)0xC00A0052L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RPC_CONNECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Response of IO-Device contained an error code; a connection could not be established. */ +/* */ +#define TLR_E_PNIO_CMCTL_RPC_CONNECT_FAILED ((TLR_RESULT)0xC00A0060L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RPC_WRITE_PARAM_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Write_Param-Response of IO-Device contained an error code; a connection could not be established. */ +/* */ +#define TLR_E_PNIO_CMCTL_RPC_WRITE_PARAM_FAILED ((TLR_RESULT)0xC00A0061L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RPC_WRITE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Write-Response of IO-Device contained an error code. */ +/* */ +#define TLR_E_PNIO_CMCTL_RPC_WRITE_FAILED ((TLR_RESULT)0xC00A0062L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RPC_READ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Read-Response of IO-Device contained an error code. */ +/* */ +#define TLR_E_PNIO_CMCTL_RPC_READ_FAILED ((TLR_RESULT)0xC00A0063L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_TCP_IP_SHUTDOWN */ +/* */ +/* MessageText: */ +/* */ +/* The TCP/IP-Stack closed a socket needed for communication. */ +/* */ +#define TLR_E_PNIO_CMCTL_TCP_IP_SHUTDOWN ((TLR_RESULT)0xC00A0064L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_RPC_RESPONSE_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* The RPC-Response received does not have the required minimum length. */ +/* */ +#define TLR_E_PNIO_CMCTL_RPC_RESPONSE_TOO_SHORT ((TLR_RESULT)0xC00A0065L) + +/* CMCTL AR */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_BLOCKTYPE */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for AR in CMCTL_RMConnect_req_LoadAr() is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_BLOCKTYPE ((TLR_RESULT)0xC00A0070L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for AR in CMCTL_RMConnect_req_LoadAr() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_BLOCKLEN ((TLR_RESULT)0xC00A0071L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMCTL_RMConnect_req_LoadAr() has an invalid type. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_TYPE ((TLR_RESULT)0xC00A0072L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_UUID */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMCTL_RMConnect_req_LoadAr() has an invalid UUID. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_UUID ((TLR_RESULT)0xC00A0073L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_PROPERTY */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMCTL_RMConnect_req_LoadAr() has an invalid network properties value. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_PROPERTY ((TLR_RESULT)0xC00A0074L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_REF_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* The AR-Reference for CMCTL protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_REF_UNEXPECTED ((TLR_RESULT)0xC00A0075L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_UUID_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The UUID inside IO-Device's Connect-Confirmation is incorrect. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_UUID_COMP_FAILED ((TLR_RESULT)0xC00A0076L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_KEY_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The session-key inside IO-Device's Connect-Confirmation is incorrect. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_KEY_COMP_FAILED ((TLR_RESULT)0xC00A0077L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_AR_MAC_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The MAC-address of IO-Device is incorrect. */ +/* */ +#define TLR_E_PNIO_CMCTL_AR_MAC_COMP_FAILED ((TLR_RESULT)0xC00A0078L) + +/* CMCTL ALCR */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_BLOCKTYPE */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_BLOCKTYPE ((TLR_RESULT)0xC00A0080L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_BLOCKLEN ((TLR_RESULT)0xC00A0081L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() has an invalid type. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_TYPE ((TLR_RESULT)0xC00A0082L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_PROPERTY */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() has an invalid network properties value. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_PROPERTY ((TLR_RESULT)0xC00A0083L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_RTA_FACTOR */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() has an invalid RTA-factor. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_RTA_FACTOR ((TLR_RESULT)0xC00A0084L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ALCR_RTA_RETRY */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for Alarm-CR in CMCTL_RMConnect_req_LoadAlcr() has an invalid value for RTA-retry. */ +/* */ +#define TLR_E_PNIO_CMCTL_ALCR_RTA_RETRY ((TLR_RESULT)0xC00A0085L) + +/* CMCTL IOCR */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_BLOCKLEN ((TLR_RESULT)0xC00A0090L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_TYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The type of IOCR is unsupported. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_TYPE_UNSUPPORTED ((TLR_RESULT)0xC00A0091L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_TYPE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The type of IOCR is unknown. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_TYPE_UNKNOWN ((TLR_RESULT)0xC00A0092L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_RTCCLASS_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The RTC-class is unsupported. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_RTCCLASS_UNSUPPORTED ((TLR_RESULT)0xC00A0093L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_RTCCLASS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The RTC-class is unknown. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_RTCCLASS_UNKNOWN ((TLR_RESULT)0xC00A0094L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_IFTYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() has an unsupported interface-type. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_IFTYPE_UNSUPPORTED ((TLR_RESULT)0xC00A0095L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_SCSYNC_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() has an unsupported value for SendClock. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_SCSYNC_UNSUPPORTED ((TLR_RESULT)0xC00A0096L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_ADDRESS_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() has an unsupported Address-Resolution. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_ADDRESS_UNSUPPORTED ((TLR_RESULT)0xC00A0097L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_REDUNDANCY_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() has an unsupported Media-Redundancy. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_REDUNDANCY_UNSUPPORTED ((TLR_RESULT)0xC00A0098L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* No IOCR could be found or created. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_REFERENCE ((TLR_RESULT)0xC00A0099L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_OBJECT_IOD */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() does not contain any IO-Data. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_OBJECT_IOD ((TLR_RESULT)0xC00A009AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_OBJECT_IOS */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() does not contain any IO-Status. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_OBJECT_IOS ((TLR_RESULT)0xC00A009BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_IOCR_API */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMCTL_RMConnect_req_LoadIocr() does not contain any API. */ +/* */ +#define TLR_E_PNIO_CMCTL_IOCR_API ((TLR_RESULT)0xC00A009CL) + +/* CMCTL EXPS */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_EXPS_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Expected-Submodules in CMCTL_RMConnect_req_LoadExps() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMCTL_EXPS_BLOCKLEN ((TLR_RESULT)0xC00A00A0L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_EXPS_API */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Expected-Submodules in CMCTL_RMConnect_req_LoadExps() does not contain any API. */ +/* */ +#define TLR_E_PNIO_CMCTL_EXPS_API ((TLR_RESULT)0xC00A00A1L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_EXPS_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Expected-Submodules in CMCTL_RMConnect_req_LoadExps() does not contain any submodules. */ +/* */ +#define TLR_E_PNIO_CMCTL_EXPS_SUBMODULE ((TLR_RESULT)0xC00A00A2L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_EXPS_DATADESCRIPTION */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for Expected-Submodules in CMCTL_RMConnect_req_LoadExps() does not contain the expected amount of data-descriptions. */ +/* */ +#define TLR_E_PNIO_CMCTL_EXPS_DATADESCRIPTION ((TLR_RESULT)0xC00A00A3L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_REMOTE */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. The IO-Device answered with an error code which is contained in confirmation packet. */ +/* */ +#define TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_REMOTE ((TLR_RESULT)0xC00A00AAL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_RPC */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. The RPC-layer detected an error which is contained in confirmation packet. */ +/* */ +#define TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_RPC ((TLR_RESULT)0xC00A00ABL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_INTERNAL */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic service failed. An internal error occured. */ +/* */ +#define TLR_E_PNIO_CMCTL_ACYCLIC_REQ_FAILED_INTERNAL ((TLR_RESULT)0xC00A00ACL) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_LATE_ERROR_REPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The NRPM state machine reported a late error. This forced CMCTL to shutdown the connection */ +/* */ +#define TLR_E_PNIO_CMCTL_LATE_ERROR_REPORTED ((TLR_RESULT)0xC00A00ADL) + +/* CMCTL SRInfo */ +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_SRINFO_BLOCKTYPE */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for SRInfo in CMCTL_RMConnect_req_LoadSRInfo() is missing. */ +/* */ +#define TLR_E_PNIO_CMCTL_SRINFO_BLOCKTYPE ((TLR_RESULT)0xC00A00B0L) + +/* */ +/* MessageId: TLR_E_PNIO_CMCTL_SRINFO_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for SRInfo in CMCTL_RMConnect_req_LoadSRInfo() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMCTL_SRINFO_BLOCKLEN ((TLR_RESULT)0xC00A00B1L) + +/*****************************************************************************/ +/* CMDEV-Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in CMDEV task. */ +/* */ +#define TLR_E_PNIO_CMDEV_COMMAND_INVALID ((TLR_RESULT)0xC00B0001L) + +/* CMDEV */ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter in CMDEV_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_CMDEV_INIT_PARAM_INVALID ((TLR_RESULT)0xC00B0010L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* No more CMDEV protocol machines possible. */ +/* */ +#define TLR_E_PNIO_CMDEV_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC00B0011L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for this request to CMDEV. */ +/* */ +#define TLR_E_PNIO_CMDEV_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC00B0012L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* This CMDEV protocol machine was closed. */ +/* */ +#define TLR_E_PNIO_CMDEV_CLOSED ((TLR_RESULT)0xC00B0013L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_STATE_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* This request can not be served in current CMDEV state. */ +/* */ +#define TLR_E_PNIO_CMDEV_STATE_CONFLICT ((TLR_RESULT)0xC00B0014L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_CONFIG_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* The state of CMDEV's managment resource is pending. */ +/* */ +#define TLR_E_PNIO_CMDEV_CONFIG_PENDING ((TLR_RESULT)0xC00B0015L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_CONFIG_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of CMDEV's managment resource is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_CONFIG_STATE_INVALID ((TLR_RESULT)0xC00B0016L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to create a packet in CMDEV task. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC00B0017L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in CMDEV. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_SEND_FAILED ((TLR_RESULT)0xC00B0018L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_CONN_REQ_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The length of the Connect-Packet in CMDEV_Connect_req() is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_CONN_REQ_LEN_INVALID ((TLR_RESULT)0xC00B0019L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_NAME_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The length of the name for IO-Device does not match to the name in CMDEV_Connect_req(). */ +/* */ +#define TLR_E_PNIO_CMDEV_NAME_LEN_INVALID ((TLR_RESULT)0xC00B001AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_BLKNUM_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Confirmation contains an incorrect amount of blocks. */ +/* */ +#define TLR_E_PNIO_CMDEV_BLKNUM_UNEXPECTED ((TLR_RESULT)0xC00B001BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_BLKNUM_UNEXPECTED_MEMORY_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Confirmation contains an incorrect amount of blocks but may be received correctly in RPC-layer. CMDEV protocol-machine has not reserved enough memory for the whole confirmation. */ +/* */ +#define TLR_E_PNIO_CMDEV_BLKNUM_UNEXPECTED_MEMORY_FAULT ((TLR_RESULT)0xC00B001CL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_FRAMEID_RECEIVED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Response from IO-Device specified an invalid FrameID to use for IO-Controllers OutputCR. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_FRAMEID_RECEIVED ((TLR_RESULT)0xC00B001DL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PNIO_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PNIO_STATUS ((TLR_RESULT)0xC00B001EL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_EMPTY_POOL_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool of CMDEV is empty. */ +/* */ +#define TLR_E_PNIO_CMDEV_EMPTY_POOL_DETECTED ((TLR_RESULT)0xC00B001FL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_WRONG_DEVICEHANDLE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_WRONG_DEVICEHANDLE ((TLR_RESULT)0xC00B0020L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_POINTER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_POINTER_INVALID ((TLR_RESULT)0xC00B0021L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_FUNCTION_RETURN_FAILURE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_FUNCTION_RETURN_FAILURE ((TLR_RESULT)0xC00B0022L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_WAIT_FOR_PACKET_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_WAIT_FOR_PACKET_FAILED ((TLR_RESULT)0xC00B0023L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_ALPMI_ACTIVATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_ALPMI_ACTIVATE_FAILED ((TLR_RESULT)0xC00B0024L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_BUILD_CONNECT_RSP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_BUILD_CONNECT_RSP_FAILED ((TLR_RESULT)0xC00B0025L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AP_ENTRY_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_AP_ENTRY_NOT_FOUND ((TLR_RESULT)0xC00B0026L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_TIMER_CREATE_FAILED ((TLR_RESULT)0xC00B0027L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_ERROR_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_ERROR_SEQUENCE ((TLR_RESULT)0xC00B0028L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_PLUG_REQUEST_PCK */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_PLUG_REQUEST_PCK ((TLR_RESULT)0xC00B0029L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_PULL_REQUEST_PCK */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_PULL_REQUEST_PCK ((TLR_RESULT)0xC00B002AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PLUG_SLOT_NOT_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PLUG_SLOT_NOT_EXPECTED ((TLR_RESULT)0xC00B002BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PLUG_SUBSLOT_NOT_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PLUG_SUBSLOT_NOT_EXPECTED ((TLR_RESULT)0xC00B002CL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RPC_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_RPC_PACKET_INVALID ((TLR_RESULT)0xC00B002DL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_ALPMI_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initializing the ALPMI state machine failed. */ +/* */ +#define TLR_E_PNIO_CMDEV_ALPMI_INIT_FAILED ((TLR_RESULT)0xC00B002EL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_CHANGE_BUS_STATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Changing the internal Bus state failed. */ +/* */ +#define TLR_E_PNIO_CMDEV_CHANGE_BUS_STATE_FAILED ((TLR_RESULT)0xC00B002FL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_PM_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* The index of CMDEV protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_PM_INDEX ((TLR_RESULT)0xC00B0040L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_PM */ +/* */ +/* MessageText: */ +/* */ +/* The CMDEV protocol-machine corresponding to index is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_PM ((TLR_RESULT)0xC00B0041L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_CMDEV_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* The handle to CMDEV protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_CMDEV_HANDLE ((TLR_RESULT)0xC00B0042L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SUBMODULE_NOT_IN_CYCLIC_DATA_EXCHANGE */ +/* */ +/* MessageText: */ +/* */ +/* The request can not be handled because the submodule is not contained in cyclic data exchange. */ +/* */ +#define TLR_E_PNIO_CMDEV_SUBMODULE_NOT_IN_CYCLIC_DATA_EXCHANGE ((TLR_RESULT)0xC00B0043L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_DEVICE_NOT_RESPONDING */ +/* */ +/* MessageText: */ +/* */ +/* The IO-Device which shall be connected does not answer. */ +/* */ +#define TLR_E_PNIO_CMDEV_DEVICE_NOT_RESPONDING ((TLR_RESULT)0xC00B0050L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_DUPLICATE_DEVICE_NAME_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* More than one IO-Device with the specified NameOfStation exists; a connection can not be established. */ +/* */ +#define TLR_E_PNIO_CMDEV_DUPLICATE_DEVICE_NAME_DETECTED ((TLR_RESULT)0xC00B0051L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_DEVICE_IP_ADDRESS_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* The IP-address the controller shall use for the IO-Device is already in use by another network device; a connection can not be established. */ +/* */ +#define TLR_E_PNIO_CMDEV_DEVICE_IP_ADDRESS_ALREADY_IN_USE ((TLR_RESULT)0xC00B0052L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_TOO_MUCH_ALARM_DATA */ +/* */ +/* MessageText: */ +/* */ +/* The packet contains to much alarm data. */ +/* */ +#define TLR_E_PNIO_CMDEV_TOO_MUCH_ALARM_DATA ((TLR_RESULT)0xC00B0053L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RPC_CONNECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Connect-Response of IO-Device contained an error code; a connection could not be established. */ +/* */ +#define TLR_E_PNIO_CMDEV_RPC_CONNECT_FAILED ((TLR_RESULT)0xC00B0060L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RPC_WRITE_PARAM_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Write_Param-Response of IO-Device contained an error code; a connection could not be established. */ +/* */ +#define TLR_E_PNIO_CMDEV_RPC_WRITE_PARAM_FAILED ((TLR_RESULT)0xC00B0061L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RPC_WRITE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Write-Response of IO-Device contained an error code. */ +/* */ +#define TLR_E_PNIO_CMDEV_RPC_WRITE_FAILED ((TLR_RESULT)0xC00B0062L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RPC_READ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The Read-Response of IO-Device contained an error code. */ +/* */ +#define TLR_E_PNIO_CMDEV_RPC_READ_FAILED ((TLR_RESULT)0xC00B0063L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_TCP_IP_SHUTDOWN */ +/* */ +/* MessageText: */ +/* */ +/* The TCP/IP-Stack closed a socket needed for communication. */ +/* */ +#define TLR_E_PNIO_CMDEV_TCP_IP_SHUTDOWN ((TLR_RESULT)0xC00B0064L) + +/* CMDEV AR */ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_BLOCKTYPE */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for AR in CMDEV_RMConnect_req_LoadAr() is missing. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_BLOCKTYPE ((TLR_RESULT)0xC00B0070L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for AR in CMDEV_RMConnect_req_LoadAr() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_BLOCKLEN ((TLR_RESULT)0xC00B0071L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMDEV_RMConnect_req_LoadAr() has an invalid type. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_TYPE ((TLR_RESULT)0xC00B0072L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_UUID */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMDEV_RMConnect_req_LoadAr() has an invalid UUID. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_UUID ((TLR_RESULT)0xC00B0073L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_PROPERTY */ +/* */ +/* MessageText: */ +/* */ +/* The configuration block for AR in CMDEV_RMConnect_req_LoadAr() has an invalid network properties value. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_PROPERTY ((TLR_RESULT)0xC00B0074L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_REF_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* The AR-Reference for CMDEV protocol-machine is invalid. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_REF_UNEXPECTED ((TLR_RESULT)0xC00B0075L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_UUID_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The UUID inside IO-Device's Connect-Confirmation is incorrect. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_UUID_COMP_FAILED ((TLR_RESULT)0xC00B0076L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_KEY_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The session-key inside IO-Device's Connect-Confirmation is incorrect. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_KEY_COMP_FAILED ((TLR_RESULT)0xC00B0077L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_MAC_COMP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The MAC-address of IO-Device is incorrect. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_MAC_COMP_FAILED ((TLR_RESULT)0xC00B0078L) + +/* CMDEV adressing related problems */ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INSERT_MODULE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INSERT_MODULE_ERROR ((TLR_RESULT)0xC00B0080L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INSERT_SUBMODULE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INSERT_SUBMODULE_ERROR ((TLR_RESULT)0xC00B0081L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_MAX_API_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_MAX_API_LIMIT_EXCEEDED ((TLR_RESULT)0xC00B0082L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_API_ALREADY_ADDED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_API_ALREADY_ADDED ((TLR_RESULT)0xC00B0083L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SLOT_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SLOT_OUT_OF_RANGE ((TLR_RESULT)0xC00B0084L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SUBSLOT_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SUBSLOT_OUT_OF_RANGE ((TLR_RESULT)0xC00B0085L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SUBSLOT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SUBSLOT_ALREADY_EXISTS ((TLR_RESULT)0xC00B0086L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_WRONG_API */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_WRONG_API ((TLR_RESULT)0xC00B0087L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_WRONG_SLOT */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_WRONG_SLOT ((TLR_RESULT)0xC00B0088L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_PACKET_WRONG_SUBSLOT */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_PACKET_WRONG_SUBSLOT ((TLR_RESULT)0xC00B0089L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SLOT_ENTRY_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SLOT_ENTRY_NOT_FOUND ((TLR_RESULT)0xC00B008AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SLOT_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SLOT_ALREADY_EXISTS ((TLR_RESULT)0xC00B008BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_SUBSLOT_ENTRY_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_SUBSLOT_ENTRY_NOT_FOUND ((TLR_RESULT)0xC00B008CL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_FILTERED */ +/* */ +/* MessageText: */ +/* */ +/* A CheckIndication shall not be forwarded to the user according to configuration. */ +/* */ +#define TLR_E_PNIO_CMDEV_FILTERED ((TLR_RESULT)0xC00B008DL) + +/* CMDEV IOCR */ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_BLOCKLEN */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() has an invalid length. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_BLOCKLEN ((TLR_RESULT)0xC00B0090L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_TYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The type of IOCR is unsupported. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_TYPE_UNSUPPORTED ((TLR_RESULT)0xC00B0091L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_TYPE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The type of IOCR is unknown. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_TYPE_UNKNOWN ((TLR_RESULT)0xC00B0092L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_RTCCLASS_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The RTC-class is unsupported. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_RTCCLASS_UNSUPPORTED ((TLR_RESULT)0xC00B0093L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_RTCCLASS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The RTC-class is unknown. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_RTCCLASS_UNKNOWN ((TLR_RESULT)0xC00B0094L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_IFTYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() has an unsupported interface-type. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_IFTYPE_UNSUPPORTED ((TLR_RESULT)0xC00B0095L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_SCSYNC_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() has an unsupported value for SendClock. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_SCSYNC_UNSUPPORTED ((TLR_RESULT)0xC00B0096L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_ADDRESS_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() has an unsupported Address-Resolution. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_ADDRESS_UNSUPPORTED ((TLR_RESULT)0xC00B0097L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_REDUNDANCY_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() has an unsupported Media-Redundancy. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_REDUNDANCY_UNSUPPORTED ((TLR_RESULT)0xC00B0098L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* No IOCR could be found or created. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_REFERENCE ((TLR_RESULT)0xC00B0099L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_OBJECT_IOD */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() does not contain any IO-Data. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_OBJECT_IOD ((TLR_RESULT)0xC00B009AL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_OBJECT_IOS */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() does not contain any IO-Status. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_OBJECT_IOS ((TLR_RESULT)0xC00B009BL) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_API */ +/* */ +/* MessageText: */ +/* */ +/* The expected configuration block for IOCR in CMDEV_RMConnect_req_LoadIocr() does not contain any API. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_API ((TLR_RESULT)0xC00B009CL) + +/* CMDEV parameter faults */ +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_FRAME_ID_COUNT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_FRAME_ID_COUNT_INVALID ((TLR_RESULT)0xC00B0100L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_FRAME_ID_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_FRAME_ID_OUT_OF_RANGE ((TLR_RESULT)0xC00B0101L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_RT_CLASS_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_RT_CLASS_NOT_SUPPORTED ((TLR_RESULT)0xC00B0102L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INSERT_AR_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INSERT_AR_ERROR ((TLR_RESULT)0xC00B0103L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_MAX_AR_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_MAX_AR_LIMIT_EXCEEDED ((TLR_RESULT)0xC00B0104L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_AR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_AR_INVALID ((TLR_RESULT)0xC00B0105L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_IOCR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_IOCR_INVALID ((TLR_RESULT)0xC00B0106L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_TYPE_LEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_TYPE_LEN_INVALID ((TLR_RESULT)0xC00B0107L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_INVALID_CTRL_REQUEST_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_INVALID_CTRL_REQUEST_BLOCK ((TLR_RESULT)0xC00B0108L) + +/* */ +/* MessageId: TLR_E_PNIO_CMDEV_MODULECONFIG_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_CMDEV_MODULECONFIG_PACKET_INVALID ((TLR_RESULT)0xC00B0109L) + +/*****************************************************************************/ +/* EDD Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_EDD_PROCESS_END */ +/* */ +/* MessageText: */ +/* */ +/* Return value of EDD_Scheduler_PreProcess(). */ +/* */ +#define TLR_E_PNIO_EDD_PROCESS_END ((TLR_RESULT)0xC00E0001L) + +/* */ +/* MessageId: TLR_E_PNIO_EDD_PARAM_INVALID_EDD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter for EDD_Scheduler_Start_req(). */ +/* */ +#define TLR_E_PNIO_EDD_PARAM_INVALID_EDD ((TLR_RESULT)0xC00E0002L) + +/*****************************************************************************/ +/* ACP Task */ +/*****************************************************************************/ +/* ACP */ +/* */ +/* MessageId: TLR_E_PNIO_ACP_PHASE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to initialize ACP-phase. */ +/* */ +#define TLR_E_PNIO_ACP_PHASE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110010L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_PHASE_REDUCTION_RATIO */ +/* */ +/* MessageText: */ +/* */ +/* Invalid reduction-ratio (uiMaxRatio) in ACP_PhaseInit(). */ +/* */ +#define TLR_E_PNIO_ACP_PHASE_REDUCTION_RATIO ((TLR_RESULT)0xC0110011L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_PHASE_SEND_CLOCK_FACTOR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid sendClock-factor (uiScFact) in ACP_PhaseInit(). */ +/* */ +#define TLR_E_PNIO_ACP_PHASE_SEND_CLOCK_FACTOR ((TLR_RESULT)0xC0110012L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_PHASE_FRAME_RESOURCES */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxFrame) in ACP_PhaseInit(). */ +/* */ +#define TLR_E_PNIO_ACP_PHASE_FRAME_RESOURCES ((TLR_RESULT)0xC0110013L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error sending a packet to another task in ACP task. */ +/* */ +#define TLR_E_PNIO_ACP_PACKET_SEND_FAILED ((TLR_RESULT)0xC0110014L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in ACP task. */ +/* */ +#define TLR_E_PNIO_ACP_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110015L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_DRV_EDD_IOCTL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_ACP_DRV_EDD_IOCTL_ERROR ((TLR_RESULT)0xC0110016L) + +/* */ +/* MessageId: TLR_E_PNIO_SYNC_LOAD_IRT_DATA_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_SYNC_LOAD_IRT_DATA_ERROR ((TLR_RESULT)0xC0110017L) + +/* */ +/* MessageId: TLR_E_PNIO_ACP_EMPTY_POOL_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool of ACP is empty. */ +/* */ +#define TLR_E_PNIO_ACP_EMPTY_POOL_DETECTED ((TLR_RESULT)0xC0110018L) + +/* ALARM */ +/* */ +/* MessageId: TLR_E_PNIO_ALARM_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter "uiMaxAlpm" in Alarm_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_ALARM_PARAM_INVALID_INIT ((TLR_RESULT)0xC0110020L) + +/* */ +/* MessageId: TLR_E_PNIO_ALARM_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in Alarm_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_ALARM_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110021L) + +/* ALPMR */ +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_PRIORITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid alarm priority in request packet of ALPMR_AlarmAck_req(). */ +/* */ +#define TLR_E_PNIO_ALPMR_PRIORITY_INVALID ((TLR_RESULT)0xC0110030L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested number of ALPMR protocol machines exceedes the highest possible number in ALPMR_Init_req(). */ +/* */ +#define TLR_E_PNIO_ALPMR_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110031L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in ALPMR_Init_req(). */ +/* */ +#define TLR_E_PNIO_ALPMR_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110032L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The ALPMR protocol-machine corresponding to the index in request packet is invalid. */ +/* */ +#define TLR_E_PNIO_ALPMR_HANDLE_INVALID ((TLR_RESULT)0xC0110033L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The ALPMR protocol-machine state is invalid for the current request. */ +/* */ +#define TLR_E_PNIO_ALPMR_STATE_INVALID ((TLR_RESULT)0xC0110034L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Sending an Alarm-Indication-packet to another task failed in ALPMR. */ +/* */ +#define TLR_E_PNIO_ALPMR_PACKET_SEND_FAILED ((TLR_RESULT)0xC0110035L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Creating an Alarm-Indication-packet to be send to another task failed due to insufficient memory. */ +/* */ +#define TLR_E_PNIO_ALPMR_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0110036L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMR_RESOURCE_INDEX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The index of ALPMR's protocol machine is invalid. */ +/* */ +#define TLR_E_PNIO_ALPMR_RESOURCE_INDEX_INVALID ((TLR_RESULT)0xC0110037L) + +/* APMR */ +/* */ +/* MessageId: TLR_E_PNIO_APMR_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter uiMaxApmr (maximum number of parallel APMR protocol-machines) in APMR_ResourceInit() is invalid. */ +/* */ +#define TLR_E_PNIO_APMR_PARAM_INVALID_INIT ((TLR_RESULT)0xC0110040L) + +/* */ +/* MessageId: TLR_E_PNIO_APMR_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in APMR_ResourceInit() to create the APMR protocol machines. */ +/* */ +#define TLR_E_PNIO_APMR_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110041L) + +/* */ +/* MessageId: TLR_E_PNIO_APMR_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The APMR protocol machine or its index is invalid. */ +/* */ +#define TLR_E_PNIO_APMR_HANDLE_INVALID ((TLR_RESULT)0xC0110042L) + +/* */ +/* MessageId: TLR_E_PNIO_APMR_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of APMR protocol machine is invalid for current request. */ +/* */ +#define TLR_E_PNIO_APMR_STATE_INVALID ((TLR_RESULT)0xC0110043L) + +/* */ +/* MessageId: TLR_E_PNIO_APMR_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Sending an ACK or NAK in response to a received Alarm-PDU failed. */ +/* */ +#define TLR_E_PNIO_APMR_FRAME_SEND_FAILED ((TLR_RESULT)0xC0110044L) + +/* APMS */ +/* */ +/* MessageId: TLR_E_PNIO_APMS_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter uiMaxApms (maximum number of parallel APMS protocol-machines) in APMS_ResourceInit() is invalid. */ +/* */ +#define TLR_E_PNIO_APMS_PARAM_INVALID_INIT ((TLR_RESULT)0xC0110050L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in APMS_ResourceInit() to create the APMS protocol machines. */ +/* */ +#define TLR_E_PNIO_APMS_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110051L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The APMS protocol machine or its index is invalid. */ +/* */ +#define TLR_E_PNIO_APMS_HANDLE_INVALID ((TLR_RESULT)0xC0110052L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of APMS protocol machine is invalid for current request. */ +/* */ +#define TLR_E_PNIO_APMS_STATE_INVALID ((TLR_RESULT)0xC0110053L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* APMS was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_APMS_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC0110054L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while APMS was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_APMS_FRAME_SEND_FAILED ((TLR_RESULT)0xC0110055L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* APMS_Activate_req() was not able to create a TLR-Timer. */ +/* */ +#define TLR_E_PNIO_APMS_TIMER_CREATE_FAILED ((TLR_RESULT)0xC0110056L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for APMS_Send_req_Data() to allocate a timer-indication packet. */ +/* */ +#define TLR_E_PNIO_APMS_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC0110057L) + +/* */ +/* MessageId: TLR_E_PNIO_APMS_INDEX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_APMS_INDEX_INVALID ((TLR_RESULT)0xC0110058L) + +/* CPM */ +/* */ +/* MessageId: TLR_E_PNIO_CPM_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter uiMaxCpmRtc1 and/or uiMaxCpmRtc2 of CPM_ResourceInit() is invalid. */ +/* */ +#define TLR_E_PNIO_CPM_PARAM_INVALID_INIT ((TLR_RESULT)0xC0110060L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_PARAM_INVALID_CLASS */ +/* */ +/* MessageText: */ +/* */ +/* The requested RTC-class is invalid in CPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_CPM_PARAM_INVALID_CLASS ((TLR_RESULT)0xC0110061L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested amount of CPM protocol machines is higher than the highest possible value. */ +/* */ +#define TLR_E_PNIO_CPM_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110062L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for current request in CPM. */ +/* */ +#define TLR_E_PNIO_CPM_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110063L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to CPM protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_CPM_HANDLE_INVALID ((TLR_RESULT)0xC0110064L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of CPM protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_CPM_STATE_INVALID ((TLR_RESULT)0xC0110065L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_PHASE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid phase found in Init-request-packet in CPM_Init_req() or in ACP_PhaseCpmAdd_req() or ACP_PhaseCpmRemove_req(). */ +/* */ +#define TLR_E_PNIO_CPM_PHASE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110066L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_SEND_CLOCK_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The SendClock-factor in Init-request-packet to CPM does not match the one in ACP_Tasks' resources. */ +/* */ +#define TLR_E_PNIO_CPM_SEND_CLOCK_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110067L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_DATALEN_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Packet size to receive is to big. Error is detected in CPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_CPM_DATALEN_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110069L) + +/* */ +/* MessageId: TLR_E_PNIO_CPM_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in CPM. */ +/* */ +#define TLR_E_PNIO_CPM_PACKET_SEND_FAILED ((TLR_RESULT)0xC011006AL) + +/* PPM */ +/* */ +/* MessageId: TLR_E_PNIO_PPM_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter "uiMaxPPMRtc1" and/or "uiMaxPPMRtc2" of PPM_ResourceInit() is invalid. */ +/* */ +#define TLR_E_PNIO_PPM_PARAM_INVALID_INIT ((TLR_RESULT)0xC0110080L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_PARAM_INVALID_CLASS */ +/* */ +/* MessageText: */ +/* */ +/* The requested RTC-class is invalid in PPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_PPM_PARAM_INVALID_CLASS ((TLR_RESULT)0xC0110081L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested amount of PPM protocol machines is higher than the highest possible value. */ +/* */ +#define TLR_E_PNIO_PPM_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110082L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for current request in PPM. */ +/* */ +#define TLR_E_PNIO_PPM_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110083L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to PPM protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_PPM_HANDLE_INVALID ((TLR_RESULT)0xC0110084L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of PPM protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_PPM_STATE_INVALID ((TLR_RESULT)0xC0110085L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_PHASE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid phase found in Init-request-packet in PPM_Init_req() or in ACP_PhasePPMAdd_req() or ACP_PhasePPMRemove_req(). */ +/* */ +#define TLR_E_PNIO_PPM_PHASE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110086L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_SEND_CLOCK_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The SendClock-factor in PPMs Init-request-packet does not match the one in ACP_Tasks' resources. */ +/* */ +#define TLR_E_PNIO_PPM_SEND_CLOCK_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110087L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_DATALEN_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Packet size to send is to big. Error is detected in PPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_PPM_DATALEN_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110089L) + +/* */ +/* MessageId: TLR_E_PNIO_PPM_RESOURCE_CLASS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_PPM_RESOURCE_CLASS_INVALID ((TLR_RESULT)0xC011008AL) + +/* ALPMI */ +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_PRIORITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid alarm priority in request packet of ALPMI_AlarmAck_req(). */ +/* */ +#define TLR_E_PNIO_ALPMI_PRIORITY_INVALID ((TLR_RESULT)0xC0110090L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested number of ALPMI protocol machines exceedes the highest possible number in ALPMI_Init_req(). */ +/* */ +#define TLR_E_PNIO_ALPMI_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0110091L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in ALPMI_Init_req(). */ +/* */ +#define TLR_E_PNIO_ALPMI_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0110092L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The ALPMI protocol-machine corresponding to the index in request packet is invalid. */ +/* */ +#define TLR_E_PNIO_ALPMI_HANDLE_INVALID ((TLR_RESULT)0xC0110093L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The ALPMI protocol-machine state is invalid for the current request. */ +/* */ +#define TLR_E_PNIO_ALPMI_STATE_INVALID ((TLR_RESULT)0xC0110094L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Sending an Alarm-Indication-packet to another task failed in ALPMI. */ +/* */ +#define TLR_E_PNIO_ALPMI_PACKET_SEND_FAILED ((TLR_RESULT)0xC0110095L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Creating an Alarm-Indication-packet to be send to another task failed due to insufficient memory. */ +/* */ +#define TLR_E_PNIO_ALPMI_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0110096L) + +/* */ +/* MessageId: TLR_E_PNIO_ALPMI_RESOURCE_INDEX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The index of ALPIR's protocol machine is invalid. */ +/* */ +#define TLR_E_PNIO_ALPMI_RESOURCE_INDEX_INVALID ((TLR_RESULT)0xC0110097L) + +/*****************************************************************************/ +/* DCP Task */ +/*****************************************************************************/ +/* DCP */ +/* */ +/* MessageId: TLR_E_PNIO_DCP_PARAM_INVALID_EDD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter in Start-Edd-packet for DCP_StartEDD_req(). */ +/* */ +#define TLR_E_PNIO_DCP_PARAM_INVALID_EDD ((TLR_RESULT)0xC012000AL) + +/* DCPMCR */ +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxMcr) in DCPMCR_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPMCR_INIT_PARAM_INVALID ((TLR_RESULT)0xC0120010L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_INIT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to initialize DCPMCR protocol machines in DCPMCR_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPMCR_INIT_OUT_OF_MEMORY ((TLR_RESULT)0xC0120011L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The index of DCPMCR's protocol machine is invalid. */ +/* */ +#define TLR_E_PNIO_DCPMCR_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0120012L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for request in DCPMCR_Activate_req(). */ +/* */ +#define TLR_E_PNIO_DCPMCR_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0120013L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_RESOURCE_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of DCPMCR protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_DCPMCR_RESOURCE_STATE_INVALID ((TLR_RESULT)0xC0120014L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_RESOURCE_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to DCPMCR protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_DCPMCR_RESOURCE_HANDLE_INVALID ((TLR_RESULT)0xC0120015L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR_Activate_req() was unable to create a TLR-timer. */ +/* */ +#define TLR_E_PNIO_DCPMCR_TIMER_CREATE_FAILED ((TLR_RESULT)0xC0120016L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for DCPMCR_Identify_ind() to allocate a timer-indication packet. */ +/* */ +#define TLR_E_PNIO_DCPMCR_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC0120017L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet to be send to another task in DCPMCR. */ +/* */ +#define TLR_E_PNIO_DCPMCR_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0120018L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in DCPMCR. */ +/* */ +#define TLR_E_PNIO_DCPMCR_PACKET_SEND_FAILED ((TLR_RESULT)0xC0120019L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_DCPMCR_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC012001AL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while DCPMCR was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_DCPMCR_FRAME_SEND_FAILED ((TLR_RESULT)0xC012001BL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_WAIT_ACK */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR could not be closed because it is still waiting for an ACK. */ +/* */ +#define TLR_E_PNIO_DCPMCR_WAIT_ACK ((TLR_RESULT)0xC012001CL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_TASK_RES_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR: Invalid parameter (task resources block address) while handling DCP Identify indication. */ +/* */ +#define TLR_E_PNIO_DCPMCR_TASK_RES_ADDRESS ((TLR_RESULT)0xC012001DL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_EDD_FRAME_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR: Invalid parameter (EDD frame address) while handling DCP Identify indication. */ +/* */ +#define TLR_E_PNIO_DCPMCR_EDD_FRAME_ADDRESS ((TLR_RESULT)0xC012001EL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_MCR_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR: Invalid parameter (DCPMCR state machine address) while handling DCP Identify indication. */ +/* */ +#define TLR_E_PNIO_DCPMCR_MCR_ADDRESS ((TLR_RESULT)0xC012001FL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCR_RMPM_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCR: Invalid parameter (RMPM state machine address) while handling DCP Identify indication. */ +/* */ +#define TLR_E_PNIO_DCPMCR_RMPM_ADDRESS ((TLR_RESULT)0xC0120020L) + +/* */ +/* MessageId: TLR_E_PNIO_DCP_EMPTY_POOL_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool of DCP is empty. */ +/* */ +#define TLR_E_PNIO_DCP_EMPTY_POOL_DETECTED ((TLR_RESULT)0xC0120021L) + +/* DCPMCS */ +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxMcs) in DCPMCS_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPMCS_INIT_PARAM_INVALID ((TLR_RESULT)0xC0120100L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_INIT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to initialize DCPMCS protocol machines in DCPMCS_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPMCS_INIT_OUT_OF_MEMORY ((TLR_RESULT)0xC0120101L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* There are too many outstanding DCPMCS requests. New requests will not be accepted. */ +/* */ +#define TLR_E_PNIO_DCPMCS_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0120102L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for request in DCPMCS_Activate_req(). */ +/* */ +#define TLR_E_PNIO_DCPMCS_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0120103L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_RESOURCE_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of DCPMCS protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_DCPMCS_RESOURCE_STATE_INVALID ((TLR_RESULT)0xC0120104L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_RESOURCE_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to DCPMCS protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_DCPMCS_RESOURCE_HANDLE_INVALID ((TLR_RESULT)0xC0120105L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCS_Activate_req() was unable to create a TLR-timer. */ +/* */ +#define TLR_E_PNIO_DCPMCS_TIMER_CREATE_FAILED ((TLR_RESULT)0xC0120106L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for DCPMCS_Identify_req() to allocate a timer-indication packet. */ +/* */ +#define TLR_E_PNIO_DCPMCS_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC0120107L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet to be send to another task in DCPMCS. */ +/* */ +#define TLR_E_PNIO_DCPMCS_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0120108L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in DCPMCS. */ +/* */ +#define TLR_E_PNIO_DCPMCS_PACKET_SEND_FAILED ((TLR_RESULT)0xC0120109L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* DCPMCS was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_DCPMCS_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC012010AL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPMCS_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while DCPMCS was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_DCPMCS_FRAME_SEND_FAILED ((TLR_RESULT)0xC012010BL) + +/* DCPHMCS */ +/* */ +/* MessageId: TLR_E_PNIO_DCPHMCS_RESOURCE_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of DCPHMCS protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_DCPHMCS_RESOURCE_STATE_INVALID ((TLR_RESULT)0xC0120150L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPHMCS_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in DCPHMCS. */ +/* */ +#define TLR_E_PNIO_DCPHMCS_PACKET_SEND_FAILED ((TLR_RESULT)0xC0120151L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPHMCS_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* DCPHMCS was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_DCPHMCS_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC0120152L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPHMCS_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while DCPHMCS was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_DCPHMCS_FRAME_SEND_FAILED ((TLR_RESULT)0xC0120153L) + +/* DCPUCR */ +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxUcr) in DCPUCR_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPUCR_INIT_PARAM_INVALID ((TLR_RESULT)0xC0120200L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_INIT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to initialize DCPUCR protocol machines in DCPUCR_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPUCR_INIT_OUT_OF_MEMORY ((TLR_RESULT)0xC0120201L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The index of DCPUCR's protocol machine is invalid. */ +/* */ +#define TLR_E_PNIO_DCPUCR_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0120202L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for request in DCPUCR_Activate_req(). */ +/* */ +#define TLR_E_PNIO_DCPUCR_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0120203L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_RESOURCE_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of DCPUCR protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_DCPUCR_RESOURCE_STATE_INVALID ((TLR_RESULT)0xC0120204L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_RESOURCE_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to DCPUCR protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_DCPUCR_RESOURCE_HANDLE_INVALID ((TLR_RESULT)0xC0120205L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCR_Activate_req() was unable to create a TLR-timer. */ +/* */ +#define TLR_E_PNIO_DCPUCR_TIMER_CREATE_FAILED ((TLR_RESULT)0xC0120206L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a timer-indication packet. */ +/* */ +#define TLR_E_PNIO_DCPUCR_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC0120207L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet to be send to another task in DCPUCR. */ +/* */ +#define TLR_E_PNIO_DCPUCR_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0120208L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in DCPUCR. */ +/* */ +#define TLR_E_PNIO_DCPUCR_PACKET_SEND_FAILED ((TLR_RESULT)0xC0120209L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCR was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_DCPUCR_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC012020AL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while DCPUCR was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_DCPUCR_FRAME_SEND_FAILED ((TLR_RESULT)0xC012020BL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_SERVICE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The DCP-command of received response does not match the outstanding request in DCPUCR. */ +/* */ +#define TLR_E_PNIO_DCPUCR_SERVICE_INVALID ((TLR_RESULT)0xC012020CL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCR_WAIT_ACK */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCR could not be closed because it is still waiting for an ACK. */ +/* */ +#define TLR_E_PNIO_DCPUCR_WAIT_ACK ((TLR_RESULT)0xC012020DL) + +/* DCPUCS */ +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_INIT_PARAM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxUcs) in DCPUCS_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPUCS_INIT_PARAM_INVALID ((TLR_RESULT)0xC0120300L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_INIT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to initialize DCPUCS protocol machines in DCPUCS_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_DCPUCS_INIT_OUT_OF_MEMORY ((TLR_RESULT)0xC0120301L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* There are too many outstanding DCPUCS requests. New requests will not be accepted. */ +/* */ +#define TLR_E_PNIO_DCPUCS_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0120302L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for request in DCPUCS_Activate_req(). */ +/* */ +#define TLR_E_PNIO_DCPUCS_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0120303L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_RESOURCE_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of DCPUCS protocol machine is incorrect for current request. */ +/* */ +#define TLR_E_PNIO_DCPUCS_RESOURCE_STATE_INVALID ((TLR_RESULT)0xC0120304L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_RESOURCE_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to DCPUCS protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_DCPUCS_RESOURCE_HANDLE_INVALID ((TLR_RESULT)0xC0120305L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCS_Activate_req() was unable to create a TLR-timer. */ +/* */ +#define TLR_E_PNIO_DCPUCS_TIMER_CREATE_FAILED ((TLR_RESULT)0xC0120306L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for DCPUCS_DataSend_req() to allocate a timer-indication packet. */ +/* */ +#define TLR_E_PNIO_DCPUCS_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC0120307L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet to be send to another task in DCPUCS. */ +/* */ +#define TLR_E_PNIO_DCPUCS_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0120308L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in DCPUCS. */ +/* */ +#define TLR_E_PNIO_DCPUCS_PACKET_SEND_FAILED ((TLR_RESULT)0xC0120309L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_FRAME_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCS was not able to get an Edd_FrameBuffer for sending a packet. */ +/* */ +#define TLR_E_PNIO_DCPUCS_FRAME_OUT_OF_MEMORY ((TLR_RESULT)0xC012030AL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_FRAME_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred while DCPUCS was trying to send an Edd_Frame. */ +/* */ +#define TLR_E_PNIO_DCPUCS_FRAME_SEND_FAILED ((TLR_RESULT)0xC012030BL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_FRAME_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* DCPUCS did not get a response to an Edd_Frame send . */ +/* */ +#define TLR_E_PNIO_DCPUCS_FRAME_TIMEOUT ((TLR_RESULT)0xC012030CL) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_OPTION_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The DCP option to set is not supported by IO-Device. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_OPTION_UNSUPPORTED ((TLR_RESULT)0xC0120320L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_SUBOPTION_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The DCP suboption to set is not supported by IO-Device. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_SUBOPTION_UNSUPPORTED ((TLR_RESULT)0xC0120321L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_SUBOPTION_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* The DCP suboption to set was not set inside IO-Device. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_SUBOPTION_NOT_SET ((TLR_RESULT)0xC0120022L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_RESOURCE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* An internal resource error occured in IO-Device while performing a DCP request. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_RESOURCE_ERROR ((TLR_RESULT)0xC0120023L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_SET_IMPOSSIBLE_LOCAL_REASON */ +/* */ +/* MessageText: */ +/* */ +/* The DCP (sub)option could not be set inside IO-Device for IO-Device internal reasons. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_SET_IMPOSSIBLE_LOCAL_REASON ((TLR_RESULT)0xC0120024L) + +/* */ +/* MessageId: TLR_E_PNIO_DCPUCS_DCP_SET_IMPOSSIBLE_WHILE_OPERATION */ +/* */ +/* MessageText: */ +/* */ +/* The DCP (sub)option could not be set inside IO-Device because IO-Device is in operation. */ +/* */ +#define TLR_E_PNIO_DCPUCS_DCP_SET_IMPOSSIBLE_WHILE_OPERATION ((TLR_RESULT)0xC0120025L) + +/*****************************************************************************/ +/* MGT-Task */ +/*****************************************************************************/ +/* MGT */ +/* */ +/* MessageId: TLR_E_PNIO_MGT_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* ACP_EDDStartDCP_req() was unable to send request packet to DCP-Task. */ +/* */ +#define TLR_E_PNIO_MGT_PACKET_SEND_FAILED ((TLR_RESULT)0xC0130001L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_WAIT_FOR_PACKET_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_WAIT_FOR_PACKET_FAILED ((TLR_RESULT)0xC0130002L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_CMDEV_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_CMDEV_HANDLE_INVALID ((TLR_RESULT)0xC0130003L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_MAPPER_REGISTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_MAPPER_REGISTER_ERROR ((TLR_RESULT)0xC0130004L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_SERVER_REGISTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_SERVER_REGISTER_ERROR ((TLR_RESULT)0xC0130005L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_OBJECT_REGISTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_OBJECT_REGISTER_ERROR ((TLR_RESULT)0xC0130006L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_CLIENT_REGISTER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_CLIENT_REGISTER_ERROR ((TLR_RESULT)0xC0130007L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_OPCODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_OPCODE_UNKNOWN ((TLR_RESULT)0xC0130008L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_RPCCLIENT_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_RPCCLIENT_HANDLE_INVALID ((TLR_RESULT)0xC0130009L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_OBJECT_UUID_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_OBJECT_UUID_NOT_FOUND ((TLR_RESULT)0xC013000AL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_ARUUID_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_ARUUID_NOT_FOUND ((TLR_RESULT)0xC013000BL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_INVALID_PORT_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_INVALID_PORT_NUMBER ((TLR_RESULT)0xC013000CL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_DRV_EDD_IOCTL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_DRV_EDD_IOCTL_ERROR ((TLR_RESULT)0xC013000DL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_INVALID_SESSION_KEY */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_INVALID_SESSION_KEY ((TLR_RESULT)0xC013000EL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_TARGET_UUID_NOT_NIL */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_MGT_TARGET_UUID_NOT_NIL ((TLR_RESULT)0xC013000FL) + +/* NRPM */ +/* */ +/* MessageId: TLR_E_PNIO_NRPM_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter (uiMaxNrpm) in NRPM_ResourceInit(). */ +/* */ +#define TLR_E_PNIO_NRPM_PARAM_INVALID_INIT ((TLR_RESULT)0xC0130010L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to NRPM protocol machine in invalid. */ +/* */ +#define TLR_E_PNIO_NRPM_HANDLE_INVALID ((TLR_RESULT)0xC0130011L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of NRPM protocol machine is invalid. */ +/* */ +#define TLR_E_PNIO_NRPM_STATE_INVALID ((TLR_RESULT)0xC0130012L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_IDENTIFY_FLAG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The identify-flag in NRPM_Init_req() is invalid. */ +/* */ +#define TLR_E_PNIO_NRPM_IDENTIFY_FLAG_INVALID ((TLR_RESULT)0xC0130013L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested number of NRPM protocol machines exceedes the highest possible number in NRPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_NRPM_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0130014L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory in NRPM_Init_req(). */ +/* */ +#define TLR_E_PNIO_NRPM_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0130015L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in NRPM. */ +/* */ +#define TLR_E_PNIO_NRPM_PACKET_SEND_FAILED ((TLR_RESULT)0xC0130016L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet in NRPM. */ +/* */ +#define TLR_E_PNIO_NRPM_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0130017L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_DCP_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received request with invalid type of DCP request in NRPM. */ +/* */ +#define TLR_E_PNIO_NRPM_DCP_TYPE_INVALID ((TLR_RESULT)0xC0130018L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_NAME_OF_STATION_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The requested NameOfStation is invalid. Either it has an invalid length or it contains invalid characters. */ +/* */ +#define TLR_E_PNIO_NRPM_NAME_OF_STATION_INVALID ((TLR_RESULT)0xC0130019L) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_DCP_SET_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* The requested DCP Set operation failed. */ +/* */ +#define TLR_E_PNIO_NRPM_DCP_SET_ERROR ((TLR_RESULT)0xC013001AL) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_DEVICE_IP_ADDRESS_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* The IP-address the controller shall set for the IO-Device is already in use by another network device. */ +/* */ +#define TLR_E_PNIO_NRPM_DEVICE_IP_ADDRESS_ALREADY_IN_USE ((TLR_RESULT)0xC013001BL) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_LATE_ERROR_INCONSISTENT_IP_PARAMETERS */ +/* */ +/* MessageText: */ +/* */ +/* The ip parameters of HelloReq and IdentifyRsp are inconsistent. */ +/* */ +#define TLR_E_PNIO_NRPM_LATE_ERROR_INCONSISTENT_IP_PARAMETERS ((TLR_RESULT)0xC013001CL) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_MAC_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* While checking the IP an invalid MAC address was found. */ +/* */ +#define TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_MAC_CONFLICT ((TLR_RESULT)0xC013001DL) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_STATION_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Late error detected while checking the IP. No station was found. */ +/* */ +#define TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_STATION_NOT_FOUND ((TLR_RESULT)0xC013001EL) + +/* */ +/* MessageId: TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_MULTIPLE_STATIONS_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Late error detected while checking the IP. Multiple stations were found. */ +/* */ +#define TLR_E_PNIO_NRPM_LATE_ERROR_IP_LOOKUP_MULTIPLE_STATIONS_FOUND ((TLR_RESULT)0xC013001FL) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_EMPTY_POOL_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* The packet pool of MGT is empty. */ +/* */ +#define TLR_E_PNIO_MGT_EMPTY_POOL_DETECTED ((TLR_RESULT)0xC01300F0L) + +/* */ +/* MessageId: TLR_E_PNIO_MGT_INVALID_DEV_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* The index of the device is invalid. */ +/* */ +#define TLR_E_PNIO_MGT_INVALID_DEV_INDEX ((TLR_RESULT)0xC01300F1L) + +/* RMPM */ +/* */ +/* MessageId: TLR_E_PNIO_RMPM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to RMPM is invalid. */ +/* */ +#define TLR_E_PNIO_RMPM_HANDLE_INVALID ((TLR_RESULT)0xC0130101L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of RMPM is invalid for current request. */ +/* */ +#define TLR_E_PNIO_RMPM_STATE_INVALID ((TLR_RESULT)0xC0130102L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_STATE_CLOSING */ +/* */ +/* MessageText: */ +/* */ +/* The state of RMPM is closed */ +/* */ +#define TLR_E_PNIO_RMPM_STATE_CLOSING ((TLR_RESULT)0xC0130103L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The number of RMPM state-machines is to high. */ +/* */ +#define TLR_E_PNIO_RMPM_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0130104L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to fullfill the current request in RMPM. */ +/* */ +#define TLR_E_PNIO_RMPM_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0130105L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in RMPM. */ +/* */ +#define TLR_E_PNIO_RMPM_PACKET_SEND_FAILED ((TLR_RESULT)0xC0130106L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet in RMPM. */ +/* */ +#define TLR_E_PNIO_RMPM_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0130107L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_ROLE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* The parameter "role" is unsupported in RMPM_Init_req_ParameterRole() . */ +/* */ +#define TLR_E_PNIO_RMPM_ROLE_UNSUPPORTED ((TLR_RESULT)0xC0130108L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_ROLE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The parameter "role" is unknown in RMPM_Init_req_ParameterRole() . */ +/* */ +#define TLR_E_PNIO_RMPM_ROLE_UNKNOWN ((TLR_RESULT)0xC0130109L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_ROLE_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* The parameter "role" is already in use in RMPM_Init_req_ParameterRole() . */ +/* */ +#define TLR_E_PNIO_RMPM_ROLE_IN_USE ((TLR_RESULT)0xC013010AL) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_CONFIG_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Incorrect sequence of configuration in RMPM_ConfigSet_req(). */ +/* */ +#define TLR_E_PNIO_RMPM_CONFIG_SEQUENCE ((TLR_RESULT)0xC013010BL) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_CONFIG_INVALID_VENDOR_ID */ +/* */ +/* MessageText: */ +/* */ +/* Incorrect configuration of Vendor-ID in RMPM_ConfigSet_req(). */ +/* */ +#define TLR_E_PNIO_RMPM_CONFIG_INVALID_VENDOR_ID ((TLR_RESULT)0xC013010CL) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_CONFIG_INVALID_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Incorrect name of station in RMPM_ConfigSet_req(). */ +/* */ +#define TLR_E_PNIO_RMPM_CONFIG_INVALID_NAME ((TLR_RESULT)0xC013010DL) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_CONFIG_INVALID_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Incorrect name of type in RMPM_ConfigSet_req(). */ +/* */ +#define TLR_E_PNIO_RMPM_CONFIG_INVALID_TYPE ((TLR_RESULT)0xC013010EL) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_DUPLICATE_NAME_OF_STATION */ +/* */ +/* MessageText: */ +/* */ +/* The NameOfStation of IO-Controller is in use by another network device. */ +/* */ +#define TLR_E_PNIO_RMPM_DUPLICATE_NAME_OF_STATION ((TLR_RESULT)0xC0130110L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_DUPLICATE_IP */ +/* */ +/* MessageText: */ +/* */ +/* The IP-address the IO-Controller shall use is in use by another network device. */ +/* */ +#define TLR_E_PNIO_RMPM_DUPLICATE_IP ((TLR_RESULT)0xC0130111L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_RPC_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The packet length of an RPC-packet received is invalid (most likely too short). */ +/* */ +#define TLR_E_PNIO_RMPM_RPC_PACKET_INVALID ((TLR_RESULT)0xC0130112L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_DCP_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The packet length of an DCP-packet received is invalid (most likely too short). */ +/* */ +#define TLR_E_PNIO_RMPM_DCP_PACKET_INVALID ((TLR_RESULT)0xC0130113L) + +/* IO-Device error codes */ +/* */ +/* MessageId: TLR_E_PNIO_RMPM_INVALID_IP_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The IP address is invalid. */ +/* */ +#define TLR_E_PNIO_RMPM_INVALID_IP_ADDRESS ((TLR_RESULT)0xC0130120L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_INVALID_NETMASK */ +/* */ +/* MessageText: */ +/* */ +/* The network mask is invalid. */ +/* */ +#define TLR_E_PNIO_RMPM_INVALID_NETMASK ((TLR_RESULT)0xC0130121L) + +/* */ +/* MessageId: TLR_E_PNIO_RMPM_INVALID_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* The gateway address is invalid. */ +/* */ +#define TLR_E_PNIO_RMPM_INVALID_GATEWAY ((TLR_RESULT)0xC0130122L) + +/* NRMC */ +/* */ +/* MessageId: TLR_E_PNIO_NRMC_PARAM_INVALID_INIT */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_NRMC_PARAM_INVALID_INIT ((TLR_RESULT)0xC0130200L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to NRMC is invalid. */ +/* */ +#define TLR_E_PNIO_NRMC_HANDLE_INVALID ((TLR_RESULT)0xC0130201L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of NRMC is invalid for current request. */ +/* */ +#define TLR_E_PNIO_NRMC_STATE_INVALID ((TLR_RESULT)0xC0130202L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_IDENTIFY_FLAG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_NRMC_IDENTIFY_FLAG_INVALID ((TLR_RESULT)0xC0130203L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The number of NRMC state-machines is to high. */ +/* */ +#define TLR_E_PNIO_NRMC_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC0130204L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to fullfill the current request in NRMC. */ +/* */ +#define TLR_E_PNIO_NRMC_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0130205L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task in NRMC. */ +/* */ +#define TLR_E_PNIO_NRMC_PACKET_SEND_FAILED ((TLR_RESULT)0xC0130206L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to allocate a packet in NRMC. */ +/* */ +#define TLR_E_PNIO_NRMC_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0130207L) + +/* */ +/* MessageId: TLR_E_PNIO_NRMC_DCP_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* tbd. */ +/* */ +#define TLR_E_PNIO_NRMC_DCP_TYPE_INVALID ((TLR_RESULT)0xC0130208L) + +/*****************************************************************************/ +/* PNIO CTL Diagnosis-Codes */ +/*****************************************************************************/ +/*****************************************************************************/ +/* CMCTL-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initializing CMCTL's task-resources failed. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC00AF000L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create message-queue for CMCTL. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_CREATE_QUE_FAILED ((TLR_RESULT)0xC00AF001L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_CREATE_SYNC_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create synchronous message-queue for CMCTL. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_CREATE_SYNC_QUE_FAILED ((TLR_RESULT)0xC00AF002L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_RPC_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize CMCTL's local RPC-ressources. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_RPC_INIT_FAILED ((TLR_RESULT)0xC00AF003L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_IDENT_ACP_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to ACP message-queue in CMCTL. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_IDENT_ACP_QUE_FALIED ((TLR_RESULT)0xC00AF004L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_IDENT_MGT_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to MGT message-queue in CMCTL. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_IDENT_MGT_QUE_FALIED ((TLR_RESULT)0xC00AF005L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_IDENT_RPC_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to RPC message-queue in CMCTL. */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_IDENT_RPC_QUE_FALIED ((TLR_RESULT)0xC00AF006L) + +/* */ +/* MessageId: TLR_DIAG_E_CMCTL_TASK_IDENT_TCP_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to TCP/IP message-queue in CMCTL . */ +/* */ +#define TLR_DIAG_E_CMCTL_TASK_IDENT_TCP_QUE_FALIED ((TLR_RESULT)0xC00AF007L) + +/*****************************************************************************/ +/* CMDEV-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initializing CMDEV's task-resources failed. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC00BF000L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create message-queue for CMDEV. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_CREATE_QUE_FAILED ((TLR_RESULT)0xC00BF001L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_CREATE_SYNC_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create synchronous message-queue for CMDEV. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_CREATE_SYNC_QUE_FAILED ((TLR_RESULT)0xC00BF002L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_RPC_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize CMDEV's local RPC-ressources. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_RPC_INIT_FAILED ((TLR_RESULT)0xC00BF003L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_ACP_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to ACP message-queue in CMDEV. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_ACP_QUE_FALIED ((TLR_RESULT)0xC00BF004L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_MGT_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to MGT message-queue in CMDEV. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_MGT_QUE_FALIED ((TLR_RESULT)0xC00BF005L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_RPC_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to RPC message-queue in CMDEV. */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_RPC_QUE_FALIED ((TLR_RESULT)0xC00BF006L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_TCP_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to TCP/IP message-queue in CMDEV . */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_TCP_QUE_FALIED ((TLR_RESULT)0xC00BF007L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_DCP_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to DCP message-queue in CMDEV . */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_DCP_QUE_FALIED ((TLR_RESULT)0xC00BF008L) + +/* */ +/* MessageId: TLR_DIAG_E_CMDEV_TASK_IDENT_PNSIF_QUE_FALIED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to PNSIF message-queue in CMDEV . */ +/* */ +#define TLR_DIAG_E_CMDEV_TASK_IDENT_PNSIF_QUE_FALIED ((TLR_RESULT)0xC00BF009L) + +/*****************************************************************************/ +/* ACP-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_ACP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in ACP task. */ +/* */ +#define TLR_E_PNIO_ACP_COMMAND_INVALID ((TLR_RESULT)0xC011F001L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_ACP_PHASE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize ACP Phase. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_ACP_PHASE_INIT_FAILED ((TLR_RESULT)0xC011F010L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_ALARM_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize Alarm-machines. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_ALARM_INIT_FAILED ((TLR_RESULT)0xC011F011L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_APMR_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize APMR. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_APMR_INIT_FAILED ((TLR_RESULT)0xC011F012L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_APMS_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failes to initialize APMS. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_APMS_INIT_FAILED ((TLR_RESULT)0xC011F013L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_CPM_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize CPM. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_CPM_INIT_FAILED ((TLR_RESULT)0xC011F014L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_PPM_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize PPM. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_PPM_INIT_FAILED ((TLR_RESULT)0xC011F015L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create message-queue for ACP. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_CREATE_QUE_FAILED ((TLR_RESULT)0xC011F016L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_IDENT_EDD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify Drv_EDD. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_IDENT_EDD_FAILED ((TLR_RESULT)0xC011F017L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_IDENT_EDD_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to EDD message-queue. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_IDENT_EDD_QUE_FAILED ((TLR_RESULT)0xC011F018L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_IDENT_DCP_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to DCP message-queue. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_IDENT_DCP_QUE_FAILED ((TLR_RESULT)0xC011F019L) + +/* */ +/* MessageId: TLR_DIAG_E_ACP_TASK_IDENT_CMDEV_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to CMDEV message-queue. */ +/* */ +#define TLR_DIAG_E_ACP_TASK_IDENT_CMDEV_QUE_FAILED ((TLR_RESULT)0xC011F01AL) + +/*****************************************************************************/ +/* EDD-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_EDD_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in EDD task. */ +/* */ +#define TLR_E_PNIO_EDD_COMMAND_INVALID ((TLR_RESULT)0xC00EF001L) + +/* */ +/* MessageId: TLR_DIAG_E_EDD_TASK_INIT_LOCAL_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize EDD's local resources. */ +/* */ +#define TLR_DIAG_E_EDD_TASK_INIT_LOCAL_FAILED ((TLR_RESULT)0xC00EF010L) + +/*****************************************************************************/ +/* DCP-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_DCP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in DCP task. */ +/* */ +#define TLR_E_PNIO_DCP_COMMAND_INVALID ((TLR_RESULT)0xC012F001L) + +/* */ +/* MessageId: TLR_DIAG_E_DCP_TASK_UCS_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize DCPUCS. */ +/* */ +#define TLR_DIAG_E_DCP_TASK_UCS_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC012F010L) + +/* */ +/* MessageId: TLR_DIAG_E_DCP_TASK_UCR_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize DCPUCR. */ +/* */ +#define TLR_DIAG_E_DCP_TASK_UCR_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC012F011L) + +/* */ +/* MessageId: TLR_DIAG_E_DCP_TASK_MCS_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize DCPMCS. */ +/* */ +#define TLR_DIAG_E_DCP_TASK_MCS_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC012F012L) + +/* */ +/* MessageId: TLR_DIAG_E_DCP_TASK_MCR_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize DCPMCR. */ +/* */ +#define TLR_DIAG_E_DCP_TASK_MCR_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC012F013L) + +/* */ +/* MessageId: TLR_DIAG_E_DCP_TASK_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create message-queue for DCP task. */ +/* */ +#define TLR_DIAG_E_DCP_TASK_CREATE_QUE_FAILED ((TLR_RESULT)0xC012F014L) + +/*****************************************************************************/ +/* MGT-Task Diagnosis-Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_MGT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received invalid command in MGT task. */ +/* */ +#define TLR_E_PNIO_MGT_COMMAND_INVALID ((TLR_RESULT)0xC013F001L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_RMPM_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize RMPM. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_RMPM_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC013F010L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_NRPM_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize NRPM. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_NRPM_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC013F011L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create message-queue for MGT task. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_CREATE_QUE_FAILED ((TLR_RESULT)0xC013F012L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_IDENT_TCPUDP_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to TCP/IP task in MGT task. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_IDENT_TCPUDP_QUE_FAILED ((TLR_RESULT)0xC013F013L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_IDENT_DCP_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to DCP task in MGT task. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_IDENT_DCP_QUE_FAILED ((TLR_RESULT)0xC013F014L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_IDENT_EDD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify Drv_EDD im MGT task. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_IDENT_EDD_FAILED ((TLR_RESULT)0xC013F015L) + +/* */ +/* MessageId: TLR_DIAG_E_MGT_TASK_IDENT_RPC_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to get handle to RPC task in MGT task. */ +/* */ +#define TLR_DIAG_E_MGT_TASK_IDENT_RPC_QUE_FAILED ((TLR_RESULT)0xC013F016L) + +/*****************************************************************************/ +/* RTA Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIO_RTA_INVALID_SOURCE_ENDPOINT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter alarm source endpoint is higher than specified maximum AR count. */ +/* */ +#define TLR_E_PNIO_RTA_INVALID_SOURCE_ENDPOINT ((TLR_RESULT)0xC09F0000L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_SOURCE_ENDPOINT_ALREADY_USED */ +/* */ +/* MessageText: */ +/* */ +/* The alarm source endpoint specified is already used by another context managment instance. */ +/* */ +#define TLR_E_PNIO_RTA_SOURCE_ENDPOINT_ALREADY_USED ((TLR_RESULT)0xC09F0001L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_SOURCE_ENDPOINT_NOT_USED */ +/* */ +/* MessageText: */ +/* */ +/* The alarm source endpoint specified is not used by a context managment instance. */ +/* */ +#define TLR_E_PNIO_RTA_SOURCE_ENDPOINT_NOT_USED ((TLR_RESULT)0xC09F0002L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_SOURCE_ENDPOINT_UNINITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* The alarm source endpoint specified is not initialized. */ +/* */ +#define TLR_E_PNIO_RTA_SOURCE_ENDPOINT_UNINITIALIZED ((TLR_RESULT)0xC09F0003L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_INVALID_ALARM_PRIORITY */ +/* */ +/* MessageText: */ +/* */ +/* The requested alarm priority is not supported. */ +/* */ +#define TLR_E_PNIO_RTA_INVALID_ALARM_PRIORITY ((TLR_RESULT)0xC09F0004L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_INVALID_ALARM_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The requested alarm data length exceeds the allowed maximum value of the AR. */ +/* */ +#define TLR_E_PNIO_RTA_INVALID_ALARM_LENGTH ((TLR_RESULT)0xC09F0005L) + +/* */ +/* MessageId: TLR_E_PNIO_RTA_NO_CONTEXT_MANAGMENT */ +/* */ +/* MessageText: */ +/* */ +/* No context managment registered. The indication can not be sent to context managment. */ +/* */ +#define TLR_E_PNIO_RTA_NO_CONTEXT_MANAGMENT ((TLR_RESULT)0xC09F0006L) + + + + +#endif /* __PNIOC_ERROR_H */ + +#ifndef __PNIOD_16BITIO_ERROR_H +#define __PNIOD_16BITIO_ERROR_H + + + + +/*****************************************************************************/ +/* PROFINET IO-Device 16 Bit IO Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIOD_16BITIO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_PNIOD_16BITIO_COMMAND_INVALID ((TLR_RESULT)0xC03A0001L) + + + + +#endif /* __PNIOD_16BITIO_ERROR_H */ + +#ifndef __PNIOD_DPMIF_ERROR_H +#define __PNIOD_DPMIF_ERROR_H + +/*****************************************************************************/ +/* PROFINET IO-Device DPM Interface */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIOD_DPMIF_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PNIOD_DPMIF_COMMAND_INVALID ((TLR_RESULT)0xC01A0001L) + + + + +#endif /* __PNIOD_DPMIF_ERROR_H */ + +#ifndef __PNIOD_LENZE_ERROR_H +#define __PNIOD_LENZE_ERROR_H + +/*****************************************************************************/ +/* Lenze Lenze PROFINET IO-Device */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNIOD_LENZE_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PNIOD_LENZE_COMMAND_INVALID ((TLR_RESULT)0xC0100001L) + +/* */ +/* MessageId: TLR_E_PNIOD_LENZE_INIT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PNIOD_LENZE_INIT_COMMAND_INVALID ((TLR_RESULT)0xC01C0001L) + + + + +#endif /* __PNIOD_LENZE_ERROR_H */ + +#ifndef __PNS_32BITIO_ERROR_H +#define __PNS_32BITIO_ERROR_H + +/*****************************************************************************/ +/* PROFINET IO-Device 32BIT IO Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNS_32BITIO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PNS_32BITIO_COMMAND_INVALID ((TLR_RESULT)0xC05E0001L) + + + + +#endif /* __PNS_32BITIO_ERROR_H */ + +#ifndef __PNS_4BITIO_ERROR_H +#define __PNS_4BITIO_ERROR_H + + + + +/*****************************************************************************/ +/* PROFINET IO-Device 4 Bit IO Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNS_4BITIO_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_PNS_4BITIO_COMMAND_INVALID ((TLR_RESULT)0xC0450001L) + + + + +#endif /* __PNS_4BITIO_ERROR_H */ + +#ifndef __PNS_ERROR_H +#define __PNS_ERROR_H + + + + +/*****************************************************************************/ +/* PROFINET IO-Device Interface Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PNS_IF_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_PNS_IF_COMMAND_INVALID ((TLR_RESULT)0xC0300001L) + +/* */ +/* MessageId: TLR_E_PNS_IF_OS_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of PNS Operating system adapatation failed. */ +/* */ +#define TLR_E_PNS_IF_OS_INIT_FAILED ((TLR_RESULT)0xC0300002L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_INIT_IP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of PNS IP address failed. */ +/* */ +#define TLR_E_PNS_IF_SET_INIT_IP_FAILED ((TLR_RESULT)0xC0300003L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PNIO_SETUP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* PROFINET IO-Device Setup failed. */ +/* */ +#define TLR_E_PNS_IF_PNIO_SETUP_FAILED ((TLR_RESULT)0xC0300004L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_INFO_ALREADY_SET */ +/* */ +/* MessageText: */ +/* */ +/* Device information set already. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_INFO_ALREADY_SET ((TLR_RESULT)0xC0300005L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_DEVICE_INFO_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Setting of device information failed. */ +/* */ +#define TLR_E_PNS_IF_SET_DEVICE_INFO_FAILED ((TLR_RESULT)0xC0300006L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_DEVICE_SETUP */ +/* */ +/* MessageText: */ +/* */ +/* PROFINET IO-Device stack is not initialized. Send PNS_IF_SET_DEVICEINFO_REQ before PNS_IF_OPEN_DEVICE_REQ. */ +/* */ +#define TLR_E_PNS_IF_NO_DEVICE_SETUP ((TLR_RESULT)0xC0300007L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_OPEN_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Opening a device instance failed. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_OPEN_FAILED ((TLR_RESULT)0xC0300008L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_DEVICE_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* No device instance open. */ +/* */ +#define TLR_E_PNS_IF_NO_DEVICE_INSTANCE ((TLR_RESULT)0xC0300009L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_MODULE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Plugging a module failed. */ +/* */ +#define TLR_E_PNS_IF_PLUG_MODULE_FAILED ((TLR_RESULT)0xC030000AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_SUBMODULE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Plugging a submodule failed. */ +/* */ +#define TLR_E_PNS_IF_PLUG_SUBMODULE_FAILED ((TLR_RESULT)0xC030000BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_START_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Start of PROFINET IO-Device failed. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_START_FAILED ((TLR_RESULT)0xC030000CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_EDD_ENABLE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Start of network communication failed. */ +/* */ +#define TLR_E_PNS_IF_EDD_ENABLE_FAILED ((TLR_RESULT)0xC030000DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ALLOC_MNGMNT_BUFFER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Allocation of a device instance management buffer failed. */ +/* */ +#define TLR_E_PNS_IF_ALLOC_MNGMNT_BUFFER_FAILED ((TLR_RESULT)0xC030000EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_HANDLE_NULL */ +/* */ +/* MessageText: */ +/* */ +/* Given device handle is NULL. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_HANDLE_NULL ((TLR_RESULT)0xC030000FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_APPL_READY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Command PNS_IF_SET_APPL_READY_REQ failed. */ +/* */ +#define TLR_E_PNS_IF_SET_APPL_READY_FAILED ((TLR_RESULT)0xC0300010L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_DEVSTATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Command PNS_IF_SET_DEVSTATE_REQ failed. */ +/* */ +#define TLR_E_PNS_IF_SET_DEVSTATE_FAILED ((TLR_RESULT)0xC0300011L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PULL_SUBMODULE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Pulling the submodule failed. */ +/* */ +#define TLR_E_PNS_IF_PULL_SUBMODULE_FAILED ((TLR_RESULT)0xC0300012L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PULL_MODULE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Pulling the module failed. */ +/* */ +#define TLR_E_PNS_IF_PULL_MODULE_FAILED ((TLR_RESULT)0xC0300013L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_DEST_ID */ +/* */ +/* MessageText: */ +/* */ +/* Destination ID in command invalid. */ +/* */ +#define TLR_E_PNS_IF_WRONG_DEST_ID ((TLR_RESULT)0xC0300014L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Device Handle in command invalid. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_HANDLE_INVALID ((TLR_RESULT)0xC0300015L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CALLBACK_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* PNS stack callback timeout. */ +/* */ +#define TLR_E_PNS_IF_CALLBACK_TIMEOUT ((TLR_RESULT)0xC0300016L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_POOL_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* PNS_IF packet pool empty. */ +/* */ +#define TLR_E_PNS_IF_PACKET_POOL_EMPTY ((TLR_RESULT)0xC0300017L) + +/* */ +/* MessageId: TLR_E_PNS_IF_ADD_API_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Command PNS_IF_ADD_API_REQ failed. */ +/* */ +#define TLR_E_PNS_IF_ADD_API_FAILED ((TLR_RESULT)0xC0300018L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_SUB_STATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Setting submodule state failed. */ +/* */ +#define TLR_E_PNS_IF_SET_SUB_STATE_FAILED ((TLR_RESULT)0xC0300019L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_NW_DBM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* No network configuration DBM-file. */ +/* */ +#define TLR_E_PNS_IF_NO_NW_DBM_ERROR ((TLR_RESULT)0xC030001AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_NW_SETUP_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during reading the "SETUP" table of the network configuration DBM-file . */ +/* */ +#define TLR_E_PNS_IF_NW_SETUP_TABLE_ERROR ((TLR_RESULT)0xC030001BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_SETUP_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error during reading the "SETUP" table of the config.xxx DBM-file . */ +/* */ +#define TLR_E_PNS_IF_CFG_SETUP_TABLE_ERROR ((TLR_RESULT)0xC030001CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_CFG_DBM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* No config.xxx DBM-file. */ +/* */ +#define TLR_E_PNS_IF_NO_CFG_DBM_ERROR ((TLR_RESULT)0xC030001DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DBM_DATASET_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error getting dataset pointer. */ +/* */ +#define TLR_E_PNS_IF_DBM_DATASET_ERROR ((TLR_RESULT)0xC030001EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_SETUPEX_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error getting dataset pointer(SETUP_EX table). */ +/* */ +#define TLR_E_PNS_IF_SETUPEX_TABLE_ERROR ((TLR_RESULT)0xC030001FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AP_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error getting either dataset pointer or number of datasets(AP table). */ +/* */ +#define TLR_E_PNS_IF_AP_TABLE_ERROR ((TLR_RESULT)0xC0300020L) + +/* */ +/* MessageId: TLR_E_PNS_IF_MODULES_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error getting either dataset pointer or number of datasets(MODULE table). */ +/* */ +#define TLR_E_PNS_IF_MODULES_TABLE_ERROR ((TLR_RESULT)0xC0300021L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SUBMODULES_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error getting either dataset pointer or number of datasets(SUBMODULE table). */ +/* */ +#define TLR_E_PNS_IF_SUBMODULES_TABLE_ERROR ((TLR_RESULT)0xC0300022L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PNIO_SETUP_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error setting up PNIO configuration(PNIO_setup()). */ +/* */ +#define TLR_E_PNS_IF_PNIO_SETUP_ERROR ((TLR_RESULT)0xC0300023L) + +/* */ +/* MessageId: TLR_E_PNS_IF_MODULES_GET_REC */ +/* */ +/* MessageText: */ +/* */ +/* Error getting record of "MODULES" linked table. */ +/* */ +#define TLR_E_PNS_IF_MODULES_GET_REC ((TLR_RESULT)0xC0300024L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SUBMODULES_GET_REC */ +/* */ +/* MessageText: */ +/* */ +/* Error getting record of "SUBMODULES" linked table. */ +/* */ +#define TLR_E_PNS_IF_SUBMODULES_GET_REC ((TLR_RESULT)0xC0300025L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PNIOD_MODULE_ID_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error accessing "PNIOD_MODULE_ID" table or table record error. */ +/* */ +#define TLR_E_PNS_IF_PNIOD_MODULE_ID_TABLE_ERROR ((TLR_RESULT)0xC0300026L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SIGNALS_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error accessing "SIGNALS" table or table record error. */ +/* */ +#define TLR_E_PNS_IF_SIGNALS_TABLE_ERROR ((TLR_RESULT)0xC0300027L) + +/* */ +/* MessageId: TLR_E_PNS_IF_MODULES_IO_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error accessing "MODULES_IO" table or table record error. */ +/* */ +#define TLR_E_PNS_IF_MODULES_IO_TABLE_ERROR ((TLR_RESULT)0xC0300028L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CHANNEL_SETTING_TABLE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error accessing "CHANNEL_SETTING" table or table record error. */ +/* */ +#define TLR_E_PNS_IF_CHANNEL_SETTING_TABLE_ERROR ((TLR_RESULT)0xC0300029L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRITE_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Error writing DBM-file. */ +/* */ +#define TLR_E_PNS_IF_WRITE_DBM ((TLR_RESULT)0xC030002AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DPM_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* No basic DPM configuration. */ +/* */ +#define TLR_E_PNS_IF_DPM_CONFIG ((TLR_RESULT)0xC030002BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_WATCHDOG */ +/* */ +/* MessageText: */ +/* */ +/* Application did not trigger the watchdog. */ +/* */ +#define TLR_E_PNS_IF_WATCHDOG ((TLR_RESULT)0xC030002CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_SIGNALS_SUBMODULES */ +/* */ +/* MessageText: */ +/* */ +/* Data length in "SIGNALS" table does not correspond to that in "SUBMODULES" table. */ +/* */ +#define TLR_E_PNS_IF_SIGNALS_SUBMODULES ((TLR_RESULT)0xC030002DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_READ_DPM_SUBAREA */ +/* */ +/* MessageText: */ +/* */ +/* Failed to read DPM subarea. */ +/* */ +#define TLR_E_PNS_IF_READ_DPM_SUBAREA ((TLR_RESULT)0xC030002EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_MOD_0_SUB_1 */ +/* */ +/* MessageText: */ +/* */ +/* Error configuring Module 0 Submodule 1. */ +/* */ +#define TLR_E_PNS_IF_MOD_0_SUB_1 ((TLR_RESULT)0xC030002FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_SIGNALS_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Length of I/O signals is bigger then the size of DPM subarea. */ +/* */ +#define TLR_E_PNS_IF_SIGNALS_LENGTH ((TLR_RESULT)0xC0300030L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SUB_TRANSFER_DIRECTION */ +/* */ +/* MessageText: */ +/* */ +/* A submodule can not have input and outputs at the same time. */ +/* */ +#define TLR_E_PNS_IF_SUB_TRANSFER_DIRECTION ((TLR_RESULT)0xC0300031L) + +/* */ +/* MessageId: TLR_E_PNS_IF_FORMAT_PNVOLUME */ +/* */ +/* MessageText: */ +/* */ +/* Error while formatting PNVOLUME. */ +/* */ +#define TLR_E_PNS_IF_FORMAT_PNVOLUME ((TLR_RESULT)0xC0300032L) + +/* */ +/* MessageId: TLR_E_PNS_IF_MOUNT_PNVOLUME */ +/* */ +/* MessageText: */ +/* */ +/* Error while mounting PNVOLUME. */ +/* */ +#define TLR_E_PNS_IF_MOUNT_PNVOLUME ((TLR_RESULT)0xC0300033L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INIT_REMOTE */ +/* */ +/* MessageText: */ +/* */ +/* Error during initialization of the remote resources of the stack. */ +/* */ +#define TLR_E_PNS_IF_INIT_REMOTE ((TLR_RESULT)0xC0300034L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WARMSTART_CONFIG_REDUNDANT */ +/* */ +/* MessageText: */ +/* */ +/* Warmstart parameters are redundant. The stack was configured with DBM or packets. */ +/* */ +#define TLR_E_PNS_IF_WARMSTART_CONFIG_REDUNDANT ((TLR_RESULT)0xC0300035L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WARMSTART_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Incorrect warmstart parameter(s). */ +/* */ +#define TLR_E_PNS_IF_WARMSTART_PARAMETER ((TLR_RESULT)0xC0300036L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_APPL_STATE_READY */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_set_appl_state_ready() returns error. */ +/* */ +#define TLR_E_PNS_IF_SET_APPL_STATE_READY ((TLR_RESULT)0xC0300037L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_DEV_STATE */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_set_dev_state() returns error. */ +/* */ +#define TLR_E_PNS_IF_SET_DEV_STATE ((TLR_RESULT)0xC0300038L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PROCESS_ALARM_SEND */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_process_alarm_send() returns error. */ +/* */ +#define TLR_E_PNS_IF_PROCESS_ALARM_SEND ((TLR_RESULT)0xC0300039L) + +/* */ +/* MessageId: TLR_E_PNS_IF_RET_OF_SUB_ALARM_SEND */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_ret_of_sub_alarm_send() returns error. */ +/* */ +#define TLR_E_PNS_IF_RET_OF_SUB_ALARM_SEND ((TLR_RESULT)0xC030003AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_ALARM_SEND */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_diag_alarm_send() returns error. */ +/* */ +#define TLR_E_PNS_IF_DIAG_ALARM_SEND ((TLR_RESULT)0xC030003BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_GENERIC_ADD */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_diag_generic_add() returns error. */ +/* */ +#define TLR_E_PNS_IF_DIAG_GENERIC_ADD ((TLR_RESULT)0xC030003CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_GENERIC_REMOVE */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_diag_generic_remove() returns error. */ +/* */ +#define TLR_E_PNS_IF_DIAG_GENERIC_REMOVE ((TLR_RESULT)0xC030003DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_CHANNEL_ADD */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_diag_channel_add() returns error. */ +/* */ +#define TLR_E_PNS_IF_DIAG_CHANNEL_ADD ((TLR_RESULT)0xC030003EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_CHANNEL_REMOVE */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_diag_channel_remove() returns error. */ +/* */ +#define TLR_E_PNS_IF_DIAG_CHANNEL_REMOVE ((TLR_RESULT)0xC030003FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_EXT_DIAG_CHANNEL_ADD */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_ext_diag_channel_add() returns error. */ +/* */ +#define TLR_E_PNS_IF_EXT_DIAG_CHANNEL_ADD ((TLR_RESULT)0xC0300040L) + +/* */ +/* MessageId: TLR_E_PNS_IF_EXT_DIAG_CHANNEL_REMOVE */ +/* */ +/* MessageText: */ +/* */ +/* PNIO_ext_diag_channel_remove() returns error. */ +/* */ +#define TLR_E_PNS_IF_EXT_DIAG_CHANNEL_REMOVE ((TLR_RESULT)0xC0300041L) + +/* */ +/* MessageId: TLR_E_PNS_IF_STATION_NAME_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Parameter station name length is incorrect. */ +/* */ +#define TLR_E_PNS_IF_STATION_NAME_LEN ((TLR_RESULT)0xC0300042L) + +/* */ +/* MessageId: TLR_E_PNS_IF_STATION_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Parameter station name is incorrect. */ +/* */ +#define TLR_E_PNS_IF_STATION_NAME ((TLR_RESULT)0xC0300043L) + +/* */ +/* MessageId: TLR_E_PNS_IF_STATION_TYPE_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Parameter station type length is incorrect. */ +/* */ +#define TLR_E_PNS_IF_STATION_TYPE_LEN ((TLR_RESULT)0xC0300044L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter device type is incorrect. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_TYPE ((TLR_RESULT)0xC0300045L) + +/* */ +/* MessageId: TLR_E_PNS_IF_ORDER_ID */ +/* */ +/* MessageText: */ +/* */ +/* Parameter order id is incorrect. */ +/* */ +#define TLR_E_PNS_IF_ORDER_ID ((TLR_RESULT)0xC0300046L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INPUT_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Parameter input data status bytes length is incorrect. */ +/* */ +#define TLR_E_PNS_IF_INPUT_STATUS ((TLR_RESULT)0xC0300047L) + +/* */ +/* MessageId: TLR_E_PNS_IF_OUTPUT_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Parameter output data status bytes length is incorrect. */ +/* */ +#define TLR_E_PNS_IF_OUTPUT_STATUS ((TLR_RESULT)0xC0300048L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WATCHDOG_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Parameter watchdog timing is incorrect(must be >= 10). */ +/* */ +#define TLR_E_PNS_IF_WATCHDOG_PARAMETER ((TLR_RESULT)0xC0300049L) + +/* */ +/* MessageId: TLR_E_PNS_IF_OUT_UPDATE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter output data update timing is incorrect. */ +/* */ +#define TLR_E_PNS_IF_OUT_UPDATE ((TLR_RESULT)0xC030004AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_IN_UPDATE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter input data update timing is incorrect. */ +/* */ +#define TLR_E_PNS_IF_IN_UPDATE ((TLR_RESULT)0xC030004BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_IN_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter input memory area size is incorrect. */ +/* */ +#define TLR_E_PNS_IF_IN_SIZE ((TLR_RESULT)0xC030004CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_OUT_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter output memory area size is incorrect. */ +/* */ +#define TLR_E_PNS_IF_OUT_SIZE ((TLR_RESULT)0xC030004DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_GLOBAL_RESOURCES */ +/* */ +/* MessageText: */ +/* */ +/* Unable to allocate memory for global access to local resources. */ +/* */ +#define TLR_E_PNS_IF_GLOBAL_RESOURCES ((TLR_RESULT)0xC030004EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DYNAMIC_CFG_PCK */ +/* */ +/* MessageText: */ +/* */ +/* Unable to allocate memory for dynamic configuration packet. */ +/* */ +#define TLR_E_PNS_IF_DYNAMIC_CFG_PCK ((TLR_RESULT)0xC030004FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_STOP */ +/* */ +/* MessageText: */ +/* */ +/* Unable to stop device. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_STOP ((TLR_RESULT)0xC0300050L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_ID */ +/* */ +/* MessageText: */ +/* */ +/* Parameter device id is incorrect. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_ID ((TLR_RESULT)0xC0300051L) + +/* */ +/* MessageId: TLR_E_PNS_IF_VENDOR_ID */ +/* */ +/* MessageText: */ +/* */ +/* Parameter vendor id is incorrect. */ +/* */ +#define TLR_E_PNS_IF_VENDOR_ID ((TLR_RESULT)0xC0300052L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SYS_START */ +/* */ +/* MessageText: */ +/* */ +/* Parameter system start is incorrect. */ +/* */ +#define TLR_E_PNS_IF_SYS_START ((TLR_RESULT)0xC0300053L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DYN_CFG_IO_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* The length of IO data expected by the controller exceeds the limit specified in warmstart parameters. */ +/* */ +#define TLR_E_PNS_IF_DYN_CFG_IO_LENGTH ((TLR_RESULT)0xC0300054L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DYN_CFG_MOD_NUM */ +/* */ +/* MessageText: */ +/* */ +/* The count of the IO modules expected by the controller exceeds the supported by the stack count. */ +/* */ +#define TLR_E_PNS_IF_DYN_CFG_MOD_NUM ((TLR_RESULT)0xC0300055L) + +/* */ +/* MessageId: TLR_E_PNS_IF_ACCESS_LOCAL_RSC */ +/* */ +/* MessageText: */ +/* */ +/* No global access to local resources. */ +/* */ +#define TLR_E_PNS_IF_ACCESS_LOCAL_RSC ((TLR_RESULT)0xC0300056L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PULL_PLUG */ +/* */ +/* MessageText: */ +/* */ +/* Plugging and pulling modules during creation of communication is not allowed. */ +/* */ +#define TLR_E_PNS_IF_PULL_PLUG ((TLR_RESULT)0xC0300057L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_NUM */ +/* */ +/* MessageText: */ +/* */ +/* Maximum number of ARs is 1. */ +/* */ +#define TLR_E_PNS_IF_AR_NUM ((TLR_RESULT)0xC0300058L) + +/* */ +/* MessageId: TLR_E_PNS_IF_API_NUM */ +/* */ +/* MessageText: */ +/* */ +/* Only API = 0 is supported. */ +/* */ +#define TLR_E_PNS_IF_API_NUM ((TLR_RESULT)0xC0300059L) + +/* */ +/* MessageId: TLR_E_PNS_IF_ALREADY_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Device is already opened. */ +/* */ +#define TLR_E_PNS_IF_ALREADY_OPEN ((TLR_RESULT)0xC030005AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_API_ADDED */ +/* */ +/* MessageText: */ +/* */ +/* Application is already added. */ +/* */ +#define TLR_E_PNS_IF_API_ADDED ((TLR_RESULT)0xC030005BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CONFIG_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Configuration modes should not be mixed( DBM-files,application,warmstart message ). */ +/* */ +#define TLR_E_PNS_IF_CONFIG_MODE ((TLR_RESULT)0xC030005CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNK_LED_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Unknown LED mode. */ +/* */ +#define TLR_E_PNS_IF_UNK_LED_MODE ((TLR_RESULT)0xC030005DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_PHYSICAL_LINK */ +/* */ +/* MessageText: */ +/* */ +/* Physical link rate is less then 100 Mbit. */ +/* */ +#define TLR_E_PNS_IF_PHYSICAL_LINK ((TLR_RESULT)0xC030005EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_MAX_SLOT_SUBSLOT */ +/* */ +/* MessageText: */ +/* */ +/* Number of slots or subslots too big. */ +/* */ +#define TLR_E_PNS_IF_MAX_SLOT_SUBSLOT ((TLR_RESULT)0xC030005FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_MEM */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Out of memory. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_MEM ((TLR_RESULT)0xC0300060L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Add provider or consumer failed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_FRAME ((TLR_RESULT)0xC0300061L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_MISS */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Consumer missing. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_MISS ((TLR_RESULT)0xC0300062L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* AR error. CMI timeout. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_TIMER ((TLR_RESULT)0xC0300063L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ALARM */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Alarm open failed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ALARM ((TLR_RESULT)0xC0300064L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ALSND */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Alarm send confirmation failed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ALSND ((TLR_RESULT)0xC0300065L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ALACK */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Alarm acknowledge send confirmation failed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ALACK ((TLR_RESULT)0xC0300066L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ALLEN */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Alarm data too long. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ALLEN ((TLR_RESULT)0xC0300067L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ASRT */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Alarm indication error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ASRT ((TLR_RESULT)0xC0300068L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_RPC */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC client call confirmation failed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_RPC ((TLR_RESULT)0xC0300069L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Abort request. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_ABORT ((TLR_RESULT)0xC030006AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_RERUN */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Re-Run. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_RERUN ((TLR_RESULT)0xC030006BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_REL */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Release indication received. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_REL ((TLR_RESULT)0xC030006CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_PAS */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Device deactivated. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_PAS ((TLR_RESULT)0xC030006DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_RMV */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Device/ar removed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_RMV ((TLR_RESULT)0xC030006EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_PROT */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Protocol violation. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_PROT ((TLR_RESULT)0xC030006FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_NARE */ +/* */ +/* MessageText: */ +/* */ +/* AR error. NARE error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_NARE ((TLR_RESULT)0xC0300070L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_BIND */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC-Bind error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_BIND ((TLR_RESULT)0xC0300071L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC-Connect error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_CONNECT ((TLR_RESULT)0xC0300072L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_READ */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC-Read error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_READ ((TLR_RESULT)0xC0300073L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_WRITE */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC-Write error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_WRITE ((TLR_RESULT)0xC0300074L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* AR error. RPC-Control error. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_CONTROL ((TLR_RESULT)0xC0300075L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Unknown. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_UNKNOWN ((TLR_RESULT)0xC0300076L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INIT_WATCHDOG */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog initialization failed. */ +/* */ +#define TLR_E_PNS_IF_INIT_WATCHDOG ((TLR_RESULT)0xC0300077L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_PHYSICAL_LINK */ +/* */ +/* MessageText: */ +/* */ +/* The Device is not connected to a network. */ +/* */ +#define TLR_E_PNS_IF_NO_PHYSICAL_LINK ((TLR_RESULT)0xC0300078L) + +/* */ +/* MessageId: TLR_DPM_CYCLIC_IO_RW */ +/* */ +/* MessageText: */ +/* */ +/* Failed to copy from DPM or to DPM the cyclic IO data. */ +/* */ +#define TLR_DPM_CYCLIC_IO_RW ((TLR_RESULT)0xC0300079L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* Submodule number is wrong. */ +/* */ +#define TLR_E_PNS_IF_SUBMODULE ((TLR_RESULT)0xC030007AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_MODULE */ +/* */ +/* MessageText: */ +/* */ +/* Module number is wrong. */ +/* */ +#define TLR_E_PNS_IF_MODULE ((TLR_RESULT)0xC030007BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_AR */ +/* */ +/* MessageText: */ +/* */ +/* The AR was closed or the AR handle is not valid. */ +/* */ +#define TLR_E_PNS_IF_NO_AR ((TLR_RESULT)0xC030007CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRITE_REC_RES_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout while waiting for response to write_record_indication. */ +/* */ +#define TLR_E_PNS_IF_WRITE_REC_RES_TIMEOUT ((TLR_RESULT)0xC030007DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNREGISTERED_SENDER */ +/* */ +/* MessageText: */ +/* */ +/* The sender of the request in not registered with request PNS_IF_REGISTER_AP_REQ. */ +/* */ +#define TLR_E_PNS_IF_UNREGISTERED_SENDER ((TLR_RESULT)0xC030007EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_RECORD_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Unknown record handle. */ +/* */ +#define TLR_E_PNS_IF_RECORD_HANDLE_INVALID ((TLR_RESULT)0xC030007FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_REGISTER_AP */ +/* */ +/* MessageText: */ +/* */ +/* Another instance is registered at the moment. */ +/* */ +#define TLR_E_PNS_IF_REGISTER_AP ((TLR_RESULT)0xC0300080L) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNREGISTER_AP */ +/* */ +/* MessageText: */ +/* */ +/* One instance can not unregister another one. */ +/* */ +#define TLR_E_PNS_IF_UNREGISTER_AP ((TLR_RESULT)0xC0300081L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CONFIG_DIFFER */ +/* */ +/* MessageText: */ +/* */ +/* The Must-configuration differs from the Is-configuration. */ +/* */ +#define TLR_E_PNS_IF_CONFIG_DIFFER ((TLR_RESULT)0xC0300082L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_COMMUNICATION */ +/* */ +/* MessageText: */ +/* */ +/* No communication processing. */ +/* */ +#define TLR_E_PNS_IF_NO_COMMUNICATION ((TLR_RESULT)0xC0300083L) + +/* */ +/* MessageId: TLR_E_PNS_IF_BAD_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* At least one parameter in a packet was wrong or/and did not meet the requirements. */ +/* */ +#define TLR_E_PNS_IF_BAD_PARAMETER ((TLR_RESULT)0xC0300084L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AREA_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Input or Output data requires more space than available. */ +/* */ +#define TLR_E_PNS_IF_AREA_OVERFLOW ((TLR_RESULT)0xC0300085L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRM_PCK_SAVE */ +/* */ +/* MessageText: */ +/* */ +/* Saving Warmstart Configuration for later use was not successful. */ +/* */ +#define TLR_E_PNS_IF_WRM_PCK_SAVE ((TLR_RESULT)0xC0300086L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_PULLPLUG */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Pull and Plug are forbidden after check.rsp and before in-data.ind. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_PULLPLUG ((TLR_RESULT)0xC0300087L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_AP_RMV */ +/* */ +/* MessageText: */ +/* */ +/* AR error. AP has been removed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_AP_RMV ((TLR_RESULT)0xC0300088L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_LNK_DWN */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Link "down". */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_LNK_DWN ((TLR_RESULT)0xC0300089L) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_MMAC */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Could not register multicast-MAC. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_MMAC ((TLR_RESULT)0xC030008AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Not synchronised(Cannot start companion-AR). */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_SYNC ((TLR_RESULT)0xC030008BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_TOPO */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Wrong topology(Cannot start companion-AR). */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_TOPO ((TLR_RESULT)0xC030008CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_DCP_NAME */ +/* */ +/* MessageText: */ +/* */ +/* AR error. DCP. Station Name changed. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_DCP_NAME ((TLR_RESULT)0xC030008DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_DCP_RESET */ +/* */ +/* MessageText: */ +/* */ +/* AR error. DCP. Reset to factory-settings. */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_DCP_RESET ((TLR_RESULT)0xC030008EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_AR_REASON_PRM */ +/* */ +/* MessageText: */ +/* */ +/* AR error. Cannot start companion-AR because a 0x8ipp submodule in the first AR /has appl-ready-pending/ is locked/ is wrong or pulled/ . */ +/* */ +#define TLR_E_PNS_IF_AR_REASON_PRM ((TLR_RESULT)0xC030008FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_MNGMNT */ +/* */ +/* MessageText: */ +/* */ +/* Packet management error. */ +/* */ +#define TLR_E_PNS_IF_PACKET_MNGMNT ((TLR_RESULT)0xC0300090L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_API_NUM */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRONG_API_NUM ((TLR_RESULT)0xC0300091L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_MODULE_ID */ +/* */ +/* MessageText: */ +/* */ +/* d. */ +/* */ +#define TLR_E_PNS_IF_WRONG_MODULE_ID ((TLR_RESULT)0xC0300092L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_MODULE_NUM */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRONG_MODULE_NUM ((TLR_RESULT)0xC0300093L) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNS_AREA */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNS_AREA ((TLR_RESULT)0xC0300094L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_SUB_ID */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRONG_SUB_ID ((TLR_RESULT)0xC0300095L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_SUBMODULE_NUM */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRONG_SUBMODULE_NUM ((TLR_RESULT)0xC0300096L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DEVICE_STOP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_DEVICE_STOP_FAILED ((TLR_RESULT)0xC0300097L) + +/* */ +/* MessageId: TLR_E_PNS_IF_EDD_DISABLE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_EDD_DISABLE_FAILED ((TLR_RESULT)0xC0300098L) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRITE_IN */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRITE_IN ((TLR_RESULT)0xC0300099L) + +/* */ +/* MessageId: TLR_E_PNS_IF_READ_OUT */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_READ_OUT ((TLR_RESULT)0xC030009AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_PNIO_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_PNIO_STATUS ((TLR_RESULT)0xC030009BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRONG_MODULE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRONG_MODULE_ADDRESS ((TLR_RESULT)0xC030009CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNK_DEVICE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNK_DEVICE_STATE ((TLR_RESULT)0xC030009DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ALARM_DATA_LEN */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_ALARM_DATA_LEN ((TLR_RESULT)0xC030009EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNK_SUBMODULE_STATE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNK_SUBMODULE_STATE ((TLR_RESULT)0xC030009FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_BAD_DIAG_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_BAD_DIAG_HANDLE ((TLR_RESULT)0xC03000A0L) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNS_STRUCT_ID */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNS_STRUCT_ID ((TLR_RESULT)0xC03000A1L) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNK_ALARM_STATE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNK_ALARM_STATE ((TLR_RESULT)0xC03000A2L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_DATA_LEN */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_DIAG_DATA_LEN ((TLR_RESULT)0xC03000A3L) + +/* */ +/* MessageId: TLR_E_PNS_IF_BAD_CHANNEL_ERR_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_BAD_CHANNEL_ERR_TYPE ((TLR_RESULT)0xC03000A4L) + +/* */ +/* MessageId: TLR_E_PNS_IF_BAD_CHANNEL_PROP */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_BAD_CHANNEL_PROP ((TLR_RESULT)0xC03000A5L) + +/* */ +/* MessageId: TLR_E_PNS_IF_BAD_CHANNEL_NUM */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_BAD_CHANNEL_NUM ((TLR_RESULT)0xC03000A6L) + +/* */ +/* MessageId: TLR_E_PNS_IF_RCX_RESTART */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_RCX_RESTART ((TLR_RESULT)0xC03000A7L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_MNGMNT */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_CFG_MNGMNT ((TLR_RESULT)0xC03000A8L) + +/* */ +/* MessageId: TLR_E_PNS_IF_UNK_INTERN_REQ */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_UNK_INTERN_REQ ((TLR_RESULT)0xC03000A9L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_STORE */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_CFG_STORE ((TLR_RESULT)0xC03000AAL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_DELETE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_CFG_DELETE_FAILED ((TLR_RESULT)0xC03000ABL) + +/* */ +/* MessageId: TLR_E_PNS_IF_READ_CFG */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_READ_CFG ((TLR_RESULT)0xC03000ACL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ACCESS_SYS_VOLUME */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_ACCESS_SYS_VOLUME ((TLR_RESULT)0xC03000ADL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ACCESS_BCKUP_VOLUME */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_ACCESS_BCKUP_VOLUME ((TLR_RESULT)0xC03000AEL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_BAD_LEN */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_CFG_BAD_LEN ((TLR_RESULT)0xC03000AFL) + +/* */ +/* MessageId: TLR_E_PNS_IF_WRM_CFG_MNGMNT */ +/* */ +/* MessageText: */ +/* */ +/* dd. */ +/* */ +#define TLR_E_PNS_IF_WRM_CFG_MNGMNT ((TLR_RESULT)0xC03000B0L) + +/* */ +/* MessageId: TLR_E_PNS_IF_RESET_FACTORY_IND */ +/* */ +/* MessageText: */ +/* */ +/* No registered application. Reset_to_factory_settings Indication failed. */ +/* */ +#define TLR_E_PNS_IF_RESET_FACTORY_IND ((TLR_RESULT)0xC03000B1L) + +/* */ +/* MessageId: TLR_E_PNS_IF_MODULE_ALREADY_PLUGGED */ +/* */ +/* MessageText: */ +/* */ +/* A module was already plugged to the slot. */ +/* */ +#define TLR_E_PNS_IF_MODULE_ALREADY_PLUGGED ((TLR_RESULT)0xC03000B2L) + +/* */ +/* MessageId: TLR_E_PNS_IF_OSINIT */ +/* */ +/* MessageText: */ +/* */ +/* Failed to init the OS adaptation layer. */ +/* */ +#define TLR_E_PNS_IF_OSINIT ((TLR_RESULT)0xC03000B3L) + +/* */ +/* MessageId: TLR_E_PNS_IF_OSSOCKINIT */ +/* */ +/* MessageText: */ +/* */ +/* Failed to init the TCPIP adaptation layer. */ +/* */ +#define TLR_E_PNS_IF_OSSOCKINIT ((TLR_RESULT)0xC03000B4L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_NETMASK */ +/* */ +/* MessageText: */ +/* */ +/* Invalid subnetwork mask. */ +/* */ +#define TLR_E_PNS_IF_INVALID_NETMASK ((TLR_RESULT)0xC03000B5L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_IP_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IP address. */ +/* */ +#define TLR_E_PNS_IF_INVALID_IP_ADDR ((TLR_RESULT)0xC03000B6L) + +/* */ +/* MessageId: TLR_E_PNS_IF_STA_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Erroneous Task start-up parameters. */ +/* */ +#define TLR_E_PNS_IF_STA_STARTUP_PARAMETER ((TLR_RESULT)0xC03000B7L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INIT_LOCAL */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize the Task local resources. */ +/* */ +#define TLR_E_PNS_IF_INIT_LOCAL ((TLR_RESULT)0xC03000B8L) + +/* */ +/* MessageId: TLR_E_PNS_IF_APP_CONFIG_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* The configuration per packets is incomplete. */ +/* */ +#define TLR_E_PNS_IF_APP_CONFIG_INCOMPLETE ((TLR_RESULT)0xC03000B9L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INIT_EDD */ +/* */ +/* MessageText: */ +/* */ +/* EDD Initialization failed. */ +/* */ +#define TLR_E_PNS_IF_INIT_EDD ((TLR_RESULT)0xC03000BAL) + +/* */ +/* MessageId: TLR_E_PNS_IF_DPM_NOT_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* DPM is not enabled. */ +/* */ +#define TLR_E_PNS_IF_DPM_NOT_ENABLED ((TLR_RESULT)0xC03000BBL) + +/* */ +/* MessageId: TLR_E_PNS_IF_READ_LINK_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Reading Link Status failed. */ +/* */ +#define TLR_E_PNS_IF_READ_LINK_STATUS ((TLR_RESULT)0xC03000BCL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* Invalid gateway address (not reachable with configured netmask). */ +/* */ +#define TLR_E_PNS_IF_INVALID_GATEWAY ((TLR_RESULT)0xC03000BDL) + +/* these #defines are from Benjamin - for use with new PNIO stack (none-Siemens) */ +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending a packet to another task. */ +/* */ +#define TLR_E_PNS_IF_PACKET_SEND_FAILED ((TLR_RESULT)0xC0300100L) + +/* */ +/* MessageId: TLR_E_PNS_IF_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Unsufficient memory to handle the request. */ +/* */ +#define TLR_E_PNS_IF_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0300101L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_APPLICATION_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* No application to send the indication to is registered. */ +/* */ +#define TLR_E_PNS_IF_NO_APPLICATION_REGISTERED ((TLR_RESULT)0xC0300102L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_SOURCE_ID */ +/* */ +/* MessageText: */ +/* */ +/* The host-application returned a packet with invalid (changed) SourceID. */ +/* */ +#define TLR_E_PNS_IF_INVALID_SOURCE_ID ((TLR_RESULT)0xC0300103L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_BUFFER_FULL */ +/* */ +/* MessageText: */ +/* */ +/* The buffer used to store packets exchanged between host-application and stack is full. */ +/* */ +#define TLR_E_PNS_IF_PACKET_BUFFER_FULL ((TLR_RESULT)0xC0300104L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PULL_NO_MODULE */ +/* */ +/* MessageText: */ +/* */ +/* Pulling the (sub)module failed because no module is plugged into the slot specified. */ +/* */ +#define TLR_E_PNS_IF_PULL_NO_MODULE ((TLR_RESULT)0xC0300105L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PULL_NO_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* Pulling the submodule failed because no submodule is plugged into the subslot specified. */ +/* */ +#define TLR_E_PNS_IF_PULL_NO_SUBMODULE ((TLR_RESULT)0xC0300106L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_BUFFER_RESTORE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* The packet buffer storing packets exchanged between host-application and stack returned an invalid packet. */ +/* */ +#define TLR_E_PNS_IF_PACKET_BUFFER_RESTORE_ERROR ((TLR_RESULT)0xC0300107L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_NO_MODULE */ +/* */ +/* MessageText: */ +/* */ +/* Diagnosis data not accepted because no module is plugged into the slot specified. */ +/* */ +#define TLR_E_PNS_IF_DIAG_NO_MODULE ((TLR_RESULT)0xC0300108L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DIAG_NO_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* Diagnosis data not accepted because no submodule is plugged into the subslot specified. */ +/* */ +#define TLR_E_PNS_IF_DIAG_NO_SUBMODULE ((TLR_RESULT)0xC0300109L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CYCLIC_EXCHANGE_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* The services requested is not available while cyclic communication is running. */ +/* */ +#define TLR_E_PNS_IF_CYCLIC_EXCHANGE_ACTIVE ((TLR_RESULT)0xC030010AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_FATAL_ERROR_CLB_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* This fatal error callback function could not be registered because there is already a function registered. */ +/* */ +#define TLR_E_PNS_IF_FATAL_ERROR_CLB_ALREADY_REGISTERED ((TLR_RESULT)0xC030010BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ERROR_STACK_WARMSTART_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* The stack did not accept the warmstart parameters. */ +/* */ +#define TLR_E_PNS_IF_ERROR_STACK_WARMSTART_CONFIGURATION ((TLR_RESULT)0xC030010CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_ERROR_STACK_MODULE_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* The stack did not accept the module configuration packet. */ +/* */ +#define TLR_E_PNS_IF_ERROR_STACK_MODULE_CONFIGURATION ((TLR_RESULT)0xC030010DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_MODULE */ +/* */ +/* MessageText: */ +/* */ +/* The stack sent a Check Indication for an unexpected module. This module was not part of the CR Info Indication. */ +/* */ +#define TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_MODULE ((TLR_RESULT)0xC030010EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* The stack sent a Check Indication for an unexpected submodule. This submodule was not part of the CR Info Indication. */ +/* */ +#define TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_SUBMODULE ((TLR_RESULT)0xC030010FL) + +/* */ +/* MessageId: TLR_E_PNS_DIAG_BUFFER_FULL */ +/* */ +/* MessageText: */ +/* */ +/* No more diagnosis records can be added to the stack because the maximum amount is already reached. */ +/* */ +#define TLR_E_PNS_DIAG_BUFFER_FULL ((TLR_RESULT)0xC0300110L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_API */ +/* */ +/* MessageText: */ +/* */ +/* The stack sent a Check Indication for an unexpected API. This API was not part of the CR Info Indication. */ +/* */ +#define TLR_E_PNS_IF_CHECK_IND_FOR_UNEXPECTED_API ((TLR_RESULT)0xC0300111L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DPM_ACCESS_WITH_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* The DPM shall be accessed with an invalid data offset. */ +/* */ +#define TLR_E_PNS_IF_DPM_ACCESS_WITH_INVALID_OFFSET ((TLR_RESULT)0xC0300112L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DUPLICATE_INPUT_CR_INFO */ +/* */ +/* MessageText: */ +/* */ +/* The stack indicated to CR Info Indications with type input. */ +/* */ +#define TLR_E_PNS_IF_DUPLICATE_INPUT_CR_INFO ((TLR_RESULT)0xC0300113L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DUPLICATE_OUTPUT_CR_INFO */ +/* */ +/* MessageText: */ +/* */ +/* The stack indicated to CR Info Indications with type output. */ +/* */ +#define TLR_E_PNS_IF_DUPLICATE_OUTPUT_CR_INFO ((TLR_RESULT)0xC0300114L) + +/* */ +/* MessageId: TLR_E_PNS_IF_FAULTY_CR_INFO_IND_RECEIVED */ +/* */ +/* MessageText: */ +/* */ +/* The stack indicated a faulty CR Info Indications. */ +/* */ +#define TLR_E_PNS_IF_FAULTY_CR_INFO_IND_RECEIVED ((TLR_RESULT)0xC0300115L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CONFIG_RELOAD_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* The request can not be executed because configuration reload respectively ChannelInit is running. */ +/* */ +#define TLR_E_PNS_IF_CONFIG_RELOAD_RUNNING ((TLR_RESULT)0xC0300116L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_MAC_ADDRESS_SET */ +/* */ +/* MessageText: */ +/* */ +/* There is no valid chassis MAC address set Without MAC address the stack will not work. */ +/* */ +#define TLR_E_PNS_IF_NO_MAC_ADDRESS_SET ((TLR_RESULT)0xC0300117L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SET_PORT_MAC_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* The Port MAC addresses have to be set before sending Set-Configuration Request to the stack. */ +/* */ +#define TLR_E_PNS_IF_SET_PORT_MAC_NOT_POSSIBLE ((TLR_RESULT)0xC0300118L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_MODULE_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Evaluating the module configuration failed. */ +/* */ +#define TLR_E_PNS_IF_INVALID_MODULE_CONFIGURATION ((TLR_RESULT)0xC030011AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CONF_IO_LEN_TO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* The sum of IO-data length exceeds the maximum allowed value. */ +/* */ +#define TLR_E_PNS_IF_CONF_IO_LEN_TO_BIG ((TLR_RESULT)0xC030011BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_MODULE_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* The module configuration does not contain at least one module. */ +/* */ +#define TLR_E_PNS_IF_NO_MODULE_CONFIGURED ((TLR_RESULT)0xC030011CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_SW_REV_PREFIX */ +/* */ +/* MessageText: */ +/* */ +/* The value of bSwRevisionPrefix is invalid. */ +/* */ +#define TLR_E_PNS_IF_INVALID_SW_REV_PREFIX ((TLR_RESULT)0xC030011DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_RESERVED_VALUE_NOT_ZERO */ +/* */ +/* MessageText: */ +/* */ +/* The value of usReserved it not zero. */ +/* */ +#define TLR_E_PNS_IF_RESERVED_VALUE_NOT_ZERO ((TLR_RESULT)0xC030011EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_IDENTIFY_CMDEV_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Identifying the stack message queue CMDEV failed. */ +/* */ +#define TLR_E_PNS_IF_IDENTIFY_CMDEV_QUEUE_FAILED ((TLR_RESULT)0xC030011FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CREATE_SYNC_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating the sync message queue failed. */ +/* */ +#define TLR_E_PNS_IF_CREATE_SYNC_QUEUE_FAILED ((TLR_RESULT)0xC0300120L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CREATE_ALARM_LOW_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating the low alarm message queue failed. */ +/* */ +#define TLR_E_PNS_IF_CREATE_ALARM_LOW_QUEUE_FAILED ((TLR_RESULT)0xC0300121L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CREATE_ALARM_HIGH_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating the high alarm message queue failed. */ +/* */ +#define TLR_E_PNS_IF_CREATE_ALARM_HIGH_QUEUE_FAILED ((TLR_RESULT)0xC0300122L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CFG_PACKET_TO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* While evaulating SetConfiguration packet the packet length was found smaller than amount of configured modules needs. */ +/* */ +#define TLR_E_PNS_IF_CFG_PACKET_TO_SMALL ((TLR_RESULT)0xC0300123L) + +/* */ +/* MessageId: TLR_E_PNS_IF_FATAL_ERROR_OCCURRED */ +/* */ +/* MessageText: */ +/* */ +/* A fatal error occurred prior to this request. Therefore this request can not be fullfiled. */ +/* */ +#define TLR_E_PNS_IF_FATAL_ERROR_OCCURRED ((TLR_RESULT)0xC0300124L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SUBMODULE_NOT_IN_CYCLIC_EXCHANGE */ +/* */ +/* MessageText: */ +/* */ +/* The request could not be executed because the submodule is not in cyclic dataexchange. */ +/* */ +#define TLR_E_PNS_IF_SUBMODULE_NOT_IN_CYCLIC_EXCHANGE ((TLR_RESULT)0xC0300125L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SERVICE_NOT_AVAILABLE_THROUGH_DPM */ +/* */ +/* MessageText: */ +/* */ +/* This service is not available through DPM. */ +/* */ +#define TLR_E_PNS_IF_SERVICE_NOT_AVAILABLE_THROUGH_DPM ((TLR_RESULT)0xC0300126L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_PARAMETER_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* The version of parameters is invalid (most likely too old). */ +/* */ +#define TLR_E_PNS_IF_INVALID_PARAMETER_VERSION ((TLR_RESULT)0xC0300127L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DATABASE_USAGE_IS_FORBIDDEN */ +/* */ +/* MessageText: */ +/* */ +/* The usage of database is forbidden by task's startup parameters. */ +/* */ +#define TLR_E_PNS_IF_DATABASE_USAGE_IS_FORBIDDEN ((TLR_RESULT)0xC0300128L) + +/* */ +/* MessageId: TLR_E_PNS_IF_RECORD_LENGTH_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* The amount of record data is too big. */ +/* */ +#define TLR_E_PNS_IF_RECORD_LENGTH_TOO_BIG ((TLR_RESULT)0xC0300129L) + +/* */ +/* MessageId: TLR_E_PNS_IF_IDENTIFY_LLDP_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Identifying the stack message queue LLDP failed. */ +/* */ +#define TLR_E_PNS_IF_IDENTIFY_LLDP_QUEUE_FAILED ((TLR_RESULT)0xC030012AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_TOTAL_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* SetConfiguration Requests total packet length is invalid. */ +/* */ +#define TLR_E_PNS_IF_INVALID_TOTAL_PACKET_LENGTH ((TLR_RESULT)0xC030012BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_APPLICATION_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* The application needed to much time to respond to an indication. */ +/* */ +#define TLR_E_PNS_IF_APPLICATION_TIMEOUT ((TLR_RESULT)0xC030012CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_PACKET_BUFFER_INVALID_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* The packet buffer storing packets exchanged between host-application and stack returned a faulty packet. */ +/* */ +#define TLR_E_PNS_IF_PACKET_BUFFER_INVALID_PACKET ((TLR_RESULT)0xC030012DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_IO_IMAGE_CONFIGURATION_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* The request can not be handled until a valid IO Image configuration is available. */ +/* */ +#define TLR_E_PNS_IF_NO_IO_IMAGE_CONFIGURATION_AVAILABLE ((TLR_RESULT)0xC030012EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_IO_IMAGE_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* A valid IO Image configuration is already available. */ +/* */ +#define TLR_E_PNS_IF_IO_IMAGE_ALREADY_CONFIGURED ((TLR_RESULT)0xC030012FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_PDEV_SUBSLOT */ +/* */ +/* MessageText: */ +/* */ +/* A submodule may only be plugged into a PDEV-subslot which does not exceed the number of supported interfaces and portnumbers. */ +/* */ +#define TLR_E_PNS_IF_INVALID_PDEV_SUBSLOT ((TLR_RESULT)0xC0300130L) + +/* */ +/* MessageId: TLR_E_PNS_IF_NO_DAP_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* The module configuration does not contain a the Device Access Point DAP-submodule in slot 0 subslot 1. */ +/* */ +#define TLR_E_PNS_IF_NO_DAP_PRESENT ((TLR_RESULT)0xC0300131L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_SUBMOD_OUTPUT_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Output size of the submodule exceeded. Configured value of ulCompleteOutputSize is smaller then the Output size of all plugged input modules. Upgrade ulCompleteOutputSize. */ +/* */ +#define TLR_E_PNS_IF_PLUG_SUBMOD_OUTPUT_SIZE_EXCEEDED ((TLR_RESULT)0xC0300132L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_SUBMOD_INPUT_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Input size of the submodule exceeded. Configured value of ulCompleteInputSize is smaller then the Input size of all plugged input modules. Upgrade ulCompleteInputSize. */ +/* */ +#define TLR_E_PNS_IF_PLUG_SUBMOD_INPUT_SIZE_EXCEEDED ((TLR_RESULT)0xC0300133L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_SUBMOD_NO_MODULE_ATTACHED_TO_ADD_TO */ +/* */ +/* MessageText: */ +/* */ +/* No module attached to add the submodule to. */ +/* */ +#define TLR_E_PNS_IF_PLUG_SUBMOD_NO_MODULE_ATTACHED_TO_ADD_TO ((TLR_RESULT)0xC0300134L) + +/* */ +/* MessageId: TLR_E_PNS_IF_PLUG_SUBMOD_ALREADY_PLUGGED_THIS_SUBMOD */ +/* */ +/* MessageText: */ +/* */ +/* Submodule already plugged. */ +/* */ +#define TLR_E_PNS_IF_PLUG_SUBMOD_ALREADY_PLUGGED_THIS_SUBMOD ((TLR_RESULT)0xC0300135L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SETIOXS_INVALID_PROV_IMAGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IOXS provider image. */ +/* */ +#define TLR_E_PNS_IF_SETIOXS_INVALID_PROV_IMAGE ((TLR_RESULT)0xC0300136L) + +/* */ +/* MessageId: TLR_E_PNS_IF_SETIOXS_INVALID_CONS_IMAGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IOXS consumer image. */ +/* */ +#define TLR_E_PNS_IF_SETIOXS_INVALID_CONS_IMAGE ((TLR_RESULT)0xC0300137L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_IOPS_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IOPS mode. */ +/* */ +#define TLR_E_PNS_IF_INVALID_IOPS_MODE ((TLR_RESULT)0xC0300138L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_IOCS_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IOCS mode. */ +/* */ +#define TLR_E_PNS_IF_INVALID_IOCS_MODE ((TLR_RESULT)0xC0300139L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_API */ +/* */ +/* MessageText: */ +/* */ +/* Invalid API. */ +/* */ +#define TLR_E_PNS_IF_INVALID_API ((TLR_RESULT)0xC030013AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_SLOT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slot. */ +/* */ +#define TLR_E_PNS_IF_INVALID_SLOT ((TLR_RESULT)0xC030013BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_SUBSLOT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid subslot. */ +/* */ +#define TLR_E_PNS_IF_INVALID_SUBSLOT ((TLR_RESULT)0xC030013CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_CHANNEL_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid channel number. */ +/* */ +#define TLR_E_PNS_IF_INVALID_CHANNEL_NUMBER ((TLR_RESULT)0xC030013DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_CHANNEL_PROPERTIES */ +/* */ +/* MessageText: */ +/* */ +/* Invalid channel properties. */ +/* */ +#define TLR_E_PNS_IF_INVALID_CHANNEL_PROPERTIES ((TLR_RESULT)0xC030013EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CHANNEL_ERRORTYPE_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid channel errortype not allowed. */ +/* */ +#define TLR_E_PNS_IF_CHANNEL_ERRORTYPE_NOT_ALLOWED ((TLR_RESULT)0xC030013FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_EXT_CHANNEL_ERRORTYPE_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid channel EXT errortype not allowed. */ +/* */ +#define TLR_E_PNS_IF_EXT_CHANNEL_ERRORTYPE_NOT_ALLOWED ((TLR_RESULT)0xC0300140L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_USER_STRUCT_IDENTIFIER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid user struct identifier. */ +/* */ +#define TLR_E_PNS_IF_INVALID_USER_STRUCT_IDENTIFIER ((TLR_RESULT)0xC0300141L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid submodule. */ +/* */ +#define TLR_E_PNS_IF_INVALID_SUBMODULE ((TLR_RESULT)0xC0300142L) + +/* */ +/* MessageId: TLR_E_PNS_IF_INVALID_IM_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid IM type. */ +/* */ +#define TLR_E_PNS_IF_INVALID_IM_TYPE ((TLR_RESULT)0xC0300143L) + +/* */ +/* MessageId: TLR_E_PNS_IF_IDENTIFY_FODMI_QUEUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify the FODMI Queue. */ +/* */ +#define TLR_E_PNS_IF_IDENTIFY_FODMI_QUEUE_FAILED ((TLR_RESULT)0xC0300144L) + +/* */ +/* MessageId: TLR_E_PNS_IF_DPM_MAILBOX_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* The DPM Receive Mailbox Queue run out of space. Most likely the host did not fetch the packets. */ +/* */ +#define TLR_E_PNS_IF_DPM_MAILBOX_OVERFLOW ((TLR_RESULT)0xC0300145L) + +/* START: On 12.11.08 Konstantin added: Area for Abort- and Offline- Reason error codes to support Siemens Stack */ +/* MessageId = 0x0A00 - 0x0AFF */ +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_NONE */ +/* */ +/* MessageText: */ +/* */ +/* None. Unused. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_NONE ((TLR_RESULT)0xC0300A00L) + +/* MessageId = 0x0A01 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_PNS_IF */ +/* SymbolicName = TLR_E_PNS_IF_ */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* */ +/* MessageId = 0x0A02 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_PNS_IF */ +/* SymbolicName = TLR_E_PNS_IF_ */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_MEM */ +/* */ +/* MessageText: */ +/* */ +/* AR Out of memory. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_MEM ((TLR_RESULT)0xC0300A03L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* AR add provider or consumer failed. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_FRAME ((TLR_RESULT)0xC0300A04L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_MISS */ +/* */ +/* MessageText: */ +/* */ +/* AR consumer DHT/WDT expired. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_MISS ((TLR_RESULT)0xC0300A05L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* AR cmi timeout. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_TIMER ((TLR_RESULT)0xC0300A06L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ALARM */ +/* */ +/* MessageText: */ +/* */ +/* AR alarm-open failed. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ALARM ((TLR_RESULT)0xC0300A07L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ALSND */ +/* */ +/* MessageText: */ +/* */ +/* AR alarm-send.cnf(-). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ALSND ((TLR_RESULT)0xC0300A08L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ALACK */ +/* */ +/* MessageText: */ +/* */ +/* AR alarm-ack-send.cnf(-). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ALACK ((TLR_RESULT)0xC0300A09L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ALLEN */ +/* */ +/* MessageText: */ +/* */ +/* AR alarm data too long. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ALLEN ((TLR_RESULT)0xC0300A0AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ASRT */ +/* */ +/* MessageText: */ +/* */ +/* AR alarm.ind(err). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ASRT ((TLR_RESULT)0xC0300A0BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_RPC */ +/* */ +/* MessageText: */ +/* */ +/* AR rpc-client call.cnf(-). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_RPC ((TLR_RESULT)0xC0300A0CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* AR abort.req. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_ABORT ((TLR_RESULT)0xC0300A0DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_RERUN */ +/* */ +/* MessageText: */ +/* */ +/* AR re-run aborts existing AR. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_RERUN ((TLR_RESULT)0xC0300A0EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_REL */ +/* */ +/* MessageText: */ +/* */ +/* AR release.ind received. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_REL ((TLR_RESULT)0xC0300A0FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_PAS */ +/* */ +/* MessageText: */ +/* */ +/* AR device deactivated. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_PAS ((TLR_RESULT)0xC0300A10L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_RMV */ +/* */ +/* MessageText: */ +/* */ +/* AR removed. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_RMV ((TLR_RESULT)0xC0300A11L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_PROT */ +/* */ +/* MessageText: */ +/* */ +/* AR protocol violation. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_PROT ((TLR_RESULT)0xC0300A12L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_NARE */ +/* */ +/* MessageText: */ +/* */ +/* AR name resolution error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_NARE ((TLR_RESULT)0xC0300A13L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_BIND */ +/* */ +/* MessageText: */ +/* */ +/* AR RPC-Bind error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_BIND ((TLR_RESULT)0xC0300A14L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* AR RPC-Connect error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_CONNECT ((TLR_RESULT)0xC0300A15L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_READ */ +/* */ +/* MessageText: */ +/* */ +/* AR RPC-Read error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_READ ((TLR_RESULT)0xC0300A16L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_WRITE */ +/* */ +/* MessageText: */ +/* */ +/* AR RPC-Write error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_WRITE ((TLR_RESULT)0xC0300A17L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_CONTROL */ +/* */ +/* MessageText: */ +/* */ +/* AR RPC-Control error. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_CONTROL ((TLR_RESULT)0xC0300A18L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_PULLPLUG */ +/* */ +/* MessageText: */ +/* */ +/* AR forbidden pull or plug after check.rsp and before in-data.ind. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_PULLPLUG ((TLR_RESULT)0xC0300A19L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_AP_RMV */ +/* */ +/* MessageText: */ +/* */ +/* AR AP removed. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_AP_RMV ((TLR_RESULT)0xC0300A1AL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_LNK_DWN */ +/* */ +/* MessageText: */ +/* */ +/* AR link down. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_LNK_DWN ((TLR_RESULT)0xC0300A1BL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_MMAC */ +/* */ +/* MessageText: */ +/* */ +/* AR could not register multicast-mac address. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_MMAC ((TLR_RESULT)0xC0300A1CL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* Not synchronized (cannot start companion-ar). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_SYNC ((TLR_RESULT)0xC0300A1DL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_TOPO */ +/* */ +/* MessageText: */ +/* */ +/* Wrong topology (cannot start companion-ar). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_TOPO ((TLR_RESULT)0xC0300A1EL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_DCP_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DCP, station-name changed. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_DCP_NAME ((TLR_RESULT)0xC0300A1FL) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_DCP_RESET */ +/* */ +/* MessageText: */ +/* */ +/* DCP, reset to factory-settings. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_DCP_RESET ((TLR_RESULT)0xC0300A20L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_PRM */ +/* */ +/* MessageText: */ +/* */ +/* 0x8ipp submodule in the first AR has either an appl-ready-pending (erroneous parameterisation) or is locked (no parameterisation) or is wrong or pulled (no parameterisation). */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_PRM ((TLR_RESULT)0xC0300A21L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_IRDATA */ +/* */ +/* MessageText: */ +/* */ +/* No irdata record yet. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_IRDATA ((TLR_RESULT)0xC0300A22L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_PDEV */ +/* */ +/* MessageText: */ +/* */ +/* Ownership of PDEV. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_PDEV ((TLR_RESULT)0xC0300A23L) + +/* */ +/* MessageId: TLR_E_PNS_IF_CM_AR_REASON_MAX */ +/* */ +/* MessageText: */ +/* */ +/* Max. Unused. */ +/* */ +#define TLR_E_PNS_IF_CM_AR_REASON_MAX ((TLR_RESULT)0xC0300AFFL) + +/* END: On 12.11.08 Konstantin added: Area for Abort- and Offline- Reason error codes to support Siemens Stack */ +/* MessageId = 0x0A00 - 0x0AFF */ + + + +#endif /* __PNS_ERROR_H */ + +#ifndef __PROFIBUS_APM_ERROR_H +#define __PROFIBUS_APM_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS Master APM Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_APM_COMMAND_INVALID ((TLR_RESULT)0xC0390001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_COMMAND_ALREADY_IN_RQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Command already in request. */ +/* */ +#define TLR_E_PROFIBUS_APM_COMMAND_ALREADY_IN_RQUEST ((TLR_RESULT)0xC0390002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_TIO_RESET_W_MODE_STOP */ +/* */ +/* MessageText: */ +/* */ +/* Timeout while stopping PROFIBUS. */ +/* */ +#define TLR_E_PROFIBUS_APM_TIO_RESET_W_MODE_STOP ((TLR_RESULT)0xC0390003L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_TIO_RESET_W_INIT_FSPMM */ +/* */ +/* MessageText: */ +/* */ +/* Timeout while resetting PROFIBUS. */ +/* */ +#define TLR_E_PROFIBUS_APM_TIO_RESET_W_INIT_FSPMM ((TLR_RESULT)0xC0390004L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_NON_EXCHANGE_SLAVE */ +/* */ +/* MessageText: */ +/* */ +/* No data exchange with at least one slave. */ +/* */ +#define TLR_E_PROFIBUS_APM_NON_EXCHANGE_SLAVE ((TLR_RESULT)0xC0390005L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_NON_EXCHANGE_ALL */ +/* */ +/* MessageText: */ +/* */ +/* No slave in data exchange. */ +/* */ +#define TLR_E_PROFIBUS_APM_NON_EXCHANGE_ALL ((TLR_RESULT)0xC0390006L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Configuration locked . */ +/* */ +#define TLR_E_PROFIBUS_APM_CONFIG_LOCK ((TLR_RESULT)0xC0390007L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_CONFIG_VIA_DBM */ +/* */ +/* MessageText: */ +/* */ +/* Already configured via data base. */ +/* */ +#define TLR_E_PROFIBUS_APM_CONFIG_VIA_DBM ((TLR_RESULT)0xC0390008L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Already configured. */ +/* */ +#define TLR_E_PROFIBUS_APM_ALREADY_CONFIGURED ((TLR_RESULT)0xC0390009L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_CHANNEL_INIT_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Channel initialization in progress. */ +/* */ +#define TLR_E_PROFIBUS_APM_CHANNEL_INIT_IN_PROGRESS ((TLR_RESULT)0xC039000AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APM_CHANNEL_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Channel initialization failed. */ +/* */ +#define TLR_E_PROFIBUS_APM_CHANNEL_INIT_FAILED ((TLR_RESULT)0xC039000BL) + + + + +#endif /* __PROFIBUS_APM_ERROR_H */ + +#ifndef __PROFIBUS_APS_ERROR_H +#define __PROFIBUS_APS_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS APS Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_APS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_APS_COMMAND_INVALID ((TLR_RESULT)0xC01D0001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APS_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Device is already configured. The new configuration is discard. */ +/* */ +#define TLR_E_PROFIBUS_APS_ALREADY_CONFIGURED ((TLR_RESULT)0xC01D0002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APS_NO_CONFIG_DBM */ +/* */ +/* MessageText: */ +/* */ +/* No database available. */ +/* */ +#define TLR_E_PROFIBUS_APS_NO_CONFIG_DBM ((TLR_RESULT)0xC01D0003L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APS_CONFIG_DBM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Database is invalid. */ +/* */ +#define TLR_E_PROFIBUS_APS_CONFIG_DBM_INVALID ((TLR_RESULT)0xC01D0004L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_APS_CONFIG_MODULE_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Modul configuration consists invalid length. */ +/* */ +#define TLR_E_PROFIBUS_APS_CONFIG_MODULE_LENGTH ((TLR_RESULT)0xC01D0005L) + + + + +#endif /* __PROFIBUS_APS_ERROR_H */ + +#ifndef __PROFIBUS_DL_ERROR_H +#define __PROFIBUS_DL_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS DL Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_DL_COMMAND_INVALID ((TLR_RESULT)0xC0060001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_XC_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The assigned XC-Data Link Layer is not installed or has a pending error. */ +/* */ +#define TLR_E_PROFIBUS_DL_XC_INVALID ((TLR_RESULT)0xC0060040L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_BAUDRATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The specified baudrate option is not supported and is out of range. */ +/* */ +#define TLR_E_PROFIBUS_DL_BAUDRATE_INVALID ((TLR_RESULT)0xC0060041L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_GAP_UPDATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The specified GAP update factor option is not supported and is out of range 1-100. */ +/* */ +#define TLR_E_PROFIBUS_DL_GAP_UPDATE_INVALID ((TLR_RESULT)0xC0060042L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_DL_ADDR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The specified local profibus address option is not supported and is out of range 0-125. */ +/* */ +#define TLR_E_PROFIBUS_DL_DL_ADDR_INVALID ((TLR_RESULT)0xC0060043L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_RETRY_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* The specified retry limit option is not supported and is zero. */ +/* */ +#define TLR_E_PROFIBUS_DL_RETRY_LIMIT ((TLR_RESULT)0xC0060044L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_HSA_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The specified highest station address option is not supported and is out of range 0-126. */ +/* */ +#define TLR_E_PROFIBUS_DL_HSA_INVALID ((TLR_RESULT)0xC0060045L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_NO_BUS_PARAMETER_SET */ +/* */ +/* MessageText: */ +/* */ +/* The service can not be executed, there are no bus parameter specified yet. */ +/* */ +#define TLR_E_PROFIBUS_DL_NO_BUS_PARAMETER_SET ((TLR_RESULT)0xC0060046L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_DLE_NOT_RESPONDING */ +/* */ +/* MessageText: */ +/* */ +/* The service has detected a timeout at the connected XC-Data Link Layer entity. */ +/* */ +#define TLR_E_PROFIBUS_DL_DLE_NOT_RESPONDING ((TLR_RESULT)0xC0060047L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_NO_DL_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* There are no further resource blocks available to execute the service within the connected XC-Data Link Layer entity. */ +/* */ +#define TLR_E_PROFIBUS_DL_NO_DL_RESOURCE ((TLR_RESULT)0xC0060048L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_FATAL_DL_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* There are no further resource blocks available to execute the service within the connected XC-Data Link Layer entity. */ +/* */ +#define TLR_E_PROFIBUS_DL_FATAL_DL_RESOURCE ((TLR_RESULT)0xC0060049L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_STOPPED */ +/* */ +/* MessageText: */ +/* */ +/* Profibus is stopped command can not be handled. */ +/* */ +#define TLR_E_PROFIBUS_DL_STOPPED ((TLR_RESULT)0xC0060050L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_PENDING_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* Previous pending packet is returned. It could not be handled. */ +/* */ +#define TLR_E_PROFIBUS_DL_PENDING_PACKET ((TLR_RESULT)0xC0060051L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_SLAVE_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Command could not be executed, DL-task is running at slave mode. */ +/* */ +#define TLR_E_PROFIBUS_DL_SLAVE_MODE ((TLR_RESULT)0xC0060052L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_UE */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to indicates a User Error as service acknowlegdement. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_UE ((TLR_RESULT)0xC0060080L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_RR */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to indicates a Resource Error as service acknowlegdement. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_RR ((TLR_RESULT)0xC0060081L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_RS */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to indicates a Service Access Point Error as service acknowlegdement. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_RS ((TLR_RESULT)0xC0060082L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_NR */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to confirms its positive reception but has no data to confirm. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_NR ((TLR_RESULT)0xC0060083L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_RDH */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to, confirms its reception negatively but has returned high priority data in the response. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_RDH ((TLR_RESULT)0xC0060084L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_RDL */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to, confirms its reception negatively but has returned low priority data in the response. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_RDL ((TLR_RESULT)0xC0060085L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_DH */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to, confirms its reception positively and has returned high priority data in the response. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_DH ((TLR_RESULT)0xC0060086L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_DL */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to, confirms its reception positively and has returned low priority data in the response. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_DL ((TLR_RESULT)0xC0060087L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_NA */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent to shows no or no plausible reaction at all. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_NA ((TLR_RESULT)0xC0060088L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The remote station the service has been sent has returned an unknown acknowledgement code. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_UNKNOWN ((TLR_RESULT)0xC0060089L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_LS */ +/* */ +/* MessageText: */ +/* */ +/* The requested service is not activated within the local SAP configuration. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_LS ((TLR_RESULT)0xC006008AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_LR */ +/* */ +/* MessageText: */ +/* */ +/* The local resources needed to execute the requested service are not available or not sufficient. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_LR ((TLR_RESULT)0xC006008BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_DS */ +/* */ +/* MessageText: */ +/* */ +/* The local data link layer is not in the logical token ring or disconnected from the network. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_DS ((TLR_RESULT)0xC006008CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_IV */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter detected in the requested service. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_IV ((TLR_RESULT)0xC006008DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_NO */ +/* */ +/* MessageText: */ +/* */ +/* The local SAP is not activated because it has been activated already or resources are not sufficient. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_NO ((TLR_RESULT)0xC006008EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_NO_SET */ +/* */ +/* MessageText: */ +/* */ +/* The variable to be set does not exist. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_NO_SET ((TLR_RESULT)0xC006008FL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_ACK_RE */ +/* */ +/* MessageText: */ +/* */ +/* Format error of the telegram. */ +/* */ +#define TLR_E_PROFIBUS_DL_ACK_RE ((TLR_RESULT)0xC0060090L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_TSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The specified parameter TSET is out of range 1-255. */ +/* */ +#define TLR_E_PROFIBUS_DL_TSET_INVALID ((TLR_RESULT)0xC0060091L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_MAX_SUBSCRIBER_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* The subscriber could not be started, maximum of supported subscribers reached. */ +/* */ +#define TLR_E_PROFIBUS_DL_MAX_SUBSCRIBER_REACHED ((TLR_RESULT)0xC0060092L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DL_NO_SUBSCRIBER_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* The subscriber with the given address could not be found. */ +/* */ +#define TLR_E_PROFIBUS_DL_NO_SUBSCRIBER_FOUND ((TLR_RESULT)0xC0060093L) + + + + +#endif /* __PROFIBUS_DL_ERROR_H */ + +#ifndef __PROFIBUS_FSPMM2_ERROR_H +#define __PROFIBUS_FSPMM2_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS Master FSPMM2 Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_COMMAND_INVALID ((TLR_RESULT)0xC0690000L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data length. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_LENGTH_INVALID ((TLR_RESULT)0xC0690001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_NOT_IMPLEMENTED */ +/* */ +/* MessageText: */ +/* */ +/* Service not implemented. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_NOT_IMPLEMENTED ((TLR_RESULT)0xC0690002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_ADD_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid address. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_ADD_INVALID ((TLR_RESULT)0xC0690003L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_SERVICE_IN_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Previous service already in request. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_SERVICE_IN_REQUEST ((TLR_RESULT)0xC0690004L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_NOT_IN_OPEN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Connection is not in state open. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_NOT_IN_OPEN_STATE ((TLR_RESULT)0xC0690005L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_OUT_OF_RESOURCES */ +/* */ +/* MessageText: */ +/* */ +/* Out of resources for new connections. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_OUT_OF_RESOURCES ((TLR_RESULT)0xC0690006L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Connection to this slave already in use. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_IN_USE ((TLR_RESULT)0xC0690007L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_ALREADY_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Stack is already initialized. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_ALREADY_INIT ((TLR_RESULT)0xC0690008L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_COM_REFERENCE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid communication reference. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_COM_REFERENCE_INVALID ((TLR_RESULT)0xC0690009L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timout error. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_TIMEOUT ((TLR_RESULT)0xC069000AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_INITIATE_ABT_STO */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Send Timeout to small. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_INITIATE_ABT_STO ((TLR_RESULT)0xC069000BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_INITIATE_ABT_FE */ +/* */ +/* MessageText: */ +/* */ +/* Telegram format error. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_INITIATE_ABT_FE ((TLR_RESULT)0xC069000CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_NRS */ +/* */ +/* MessageText: */ +/* */ +/* Negativ response. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_NRS ((TLR_RESULT)0xC069000DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* Service Aborted. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_ABORT ((TLR_RESULT)0xC069000EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM2_CON_XX */ +/* */ +/* MessageText: */ +/* */ +/* Service confirmation negative. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM2_CON_XX ((TLR_RESULT)0xC0690100L) + + + + +#endif /* __PROFIBUS_FSPMM2_ERROR_H */ + +#ifndef __PROFIBUS_FSPMM_ERROR_H +#define __PROFIBUS_FSPMM_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS Master FSPMM Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_COMMAND_INVALID ((TLR_RESULT)0xC0380001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_INV_BUSMODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid bus mode for this command. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_INV_BUSMODE ((TLR_RESULT)0xC0380002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_RESET */ +/* */ +/* MessageText: */ +/* */ +/* FSPMM task is reseted. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_RESET ((TLR_RESULT)0xC0380003L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ACLR */ +/* */ +/* MessageText: */ +/* */ +/* Profibus master is at auto clear state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ACLR ((TLR_RESULT)0xC0380004L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_CONTROL_TIMER_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* Data Control Timer expired. No bus access for sending global control. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_CONTROL_TIMER_EXPIRED ((TLR_RESULT)0xC0380005L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Alarm buffer overflow. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_OVERFLOW ((TLR_RESULT)0xC0380006L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_NOT_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Alarm handler is not initialized. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_NOT_INIT ((TLR_RESULT)0xC0380007L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* Alarm handler is not started. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_NOT_STARTED ((TLR_RESULT)0xC0380008L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_NOT_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* Alarm are disabled. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_NOT_ENABLED ((TLR_RESULT)0xC0380009L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_NOT_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* Alarm is not at a pending state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_NOT_PENDING ((TLR_RESULT)0xC038000AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Alarm state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_STATE_ERROR ((TLR_RESULT)0xC038000BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALARM_SEQ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Alarm sequence error occurred. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALARM_SEQ_ERROR ((TLR_RESULT)0xC038000CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_MSAC1_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Alarm handler is not at the prober state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_MSAC1_STATE_ERROR ((TLR_RESULT)0xC038000DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_MSAC1_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Get an alarm acknowledge without an alarm. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_MSAC1_FAULT ((TLR_RESULT)0xC038000EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_INVALID_AREA_CODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid area code or slave address received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_INVALID_AREA_CODE ((TLR_RESULT)0xC038000FL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_IV_DL_DATA_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data length. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_IV_DL_DATA_LEN ((TLR_RESULT)0xC0380011L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_IV_BUS_PRM */ +/* */ +/* MessageText: */ +/* */ +/* Invalid bus parameter received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_IV_BUS_PRM ((TLR_RESULT)0xC0380012L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_IV_SLAVE_PRM */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave parameter received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_IV_SLAVE_PRM ((TLR_RESULT)0xC0380013L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ACK_NO */ +/* */ +/* MessageText: */ +/* */ +/* Command can not executed at the actual bus state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ACK_NO ((TLR_RESULT)0xC0380014L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ACK_GE */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending global control. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ACK_GE ((TLR_RESULT)0xC0380015L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_MSAL1_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Failture at alarm handler. Alarm handler is stopped. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_MSAL1_FAULT ((TLR_RESULT)0xC0380016L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_MSAC2_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* Failture at MSAC2 handler. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_MSAC2_FAULT ((TLR_RESULT)0xC0380017L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_REJ_SE */ +/* */ +/* MessageText: */ +/* */ +/* Device is stopping the communication or not in OPEN state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_REJ_SE ((TLR_RESULT)0xC0380018L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_REJ_PS */ +/* */ +/* MessageText: */ +/* */ +/* A previous service is still in process. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_REJ_PS ((TLR_RESULT)0xC0380019L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_REJ_LE */ +/* */ +/* MessageText: */ +/* */ +/* Message have a invalid length. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_REJ_LE ((TLR_RESULT)0xC038001AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_REJ_IV */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter at request. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_REJ_IV ((TLR_RESULT)0xC038001BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_REJ_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* Device aborts DP V1 communication. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_REJ_ABORT ((TLR_RESULT)0xC038001CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_INVALID_SLAVE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave address. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_INVALID_SLAVE_ADDRESS ((TLR_RESULT)0xC038001DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_ALREADY_INITIALZED */ +/* */ +/* MessageText: */ +/* */ +/* FSPMM Alraedy initialized. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_ALREADY_INITIALZED ((TLR_RESULT)0xC038001EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_INVALID_APPLICATION */ +/* */ +/* MessageText: */ +/* */ +/* Command from not registerd application. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_INVALID_APPLICATION ((TLR_RESULT)0xC038001FL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_DMPMM_IV_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Command not allowed in actual state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_DMPMM_IV_STATE ((TLR_RESULT)0xC0380020L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_PB_FLAG_ERROR_ACTION_FLAG */ +/* */ +/* MessageText: */ +/* */ +/* Function 'AUTO CLEAR' not supported. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_PB_FLAG_ERROR_ACTION_FLAG ((TLR_RESULT)0xC0380021L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_PB_FLAG_ISO_MODE_MSK */ +/* */ +/* MessageText: */ +/* */ +/* Function 'ISO_MODE' not supported. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_PB_FLAG_ISO_MODE_MSK ((TLR_RESULT)0xC0380022L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_DL_PB_FLAG_ISOM_SYNC */ +/* */ +/* MessageText: */ +/* */ +/* Function 'ISO_MODE_SYNC' not supported. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_DL_PB_FLAG_ISOM_SYNC ((TLR_RESULT)0xC0380023L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_DL_PB_FLAG_ISOM_FREEZE */ +/* */ +/* MessageText: */ +/* */ +/* Function 'ISO_MODE_FREEZE' not supported. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_DL_PB_FLAG_ISOM_FREEZE ((TLR_RESULT)0xC0380024L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMM_MSAC1_NRS */ +/* */ +/* MessageText: */ +/* */ +/* Negative response received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMM_MSAC1_NRS ((TLR_RESULT)0xC0380025L) + + + + +#endif /* __PROFIBUS_FSPMM_ERROR_H */ + +#ifndef __PROFIBUS_FSPMS_ERROR_H +#define __PROFIBUS_FSPMS_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS FSPMS Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_COMMAND_INVALID ((TLR_RESULT)0xC0090001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_MAX_EXT_DIAG_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Setting the slave diagnostic failed, because the limit of the maximum number of 238 extended diagnostic bytes is exceeded. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_MAX_EXT_DIAG_SIZE_EXCEEDED ((TLR_RESULT)0xC0090002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_MAX_CFG_DATA_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* Setting the slave's configuration data failed, because the limit of the maximum number of 244 configuration bytes is exceeded. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_MAX_CFG_DATA_SIZE_EXCEEDED ((TLR_RESULT)0xC0090003L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_MS0_INIT_WRONG_STATE */ +/* */ +/* MessageText: */ +/* */ +/* The cyclic slave state machine cannot be initialized, state machine is not in "POWER-ON" state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_MS0_INIT_WRONG_STATE ((TLR_RESULT)0xC0090004L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SLAVE_DIAG_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Setting the Slave Diagnostic Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SLAVE_DIAG_POWER_ON ((TLR_RESULT)0xC0090005L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SET_CFG_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Setting the Slave Configuration Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SET_CFG_POWER_ON ((TLR_RESULT)0xC0090006L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Getting the Slave Output Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_POWER_ON ((TLR_RESULT)0xC0090007L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_WAIT_PRM */ +/* */ +/* MessageText: */ +/* */ +/* Getting the Slave Output Data cannot be performed, because slave state is currently in state "WAIT-PRM". */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_WAIT_PRM ((TLR_RESULT)0xC0090008L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SET_INPUT_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Setting the Slave Input Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SET_INPUT_POWER_ON ((TLR_RESULT)0xC0090009L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SET_INPUT_WAIT_PRM */ +/* */ +/* MessageText: */ +/* */ +/* Setting the Slave Input Data cannot be performed, because slave state is currently in state "WAIT-PRM". */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SET_INPUT_WAIT_PRM ((TLR_RESULT)0xC009000AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Confirming the Slave Parameter Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_POWER_ON ((TLR_RESULT)0xC009000BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_NOT_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* There is no Parameter Data checking command pending, command ignored. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_NOT_PENDING ((TLR_RESULT)0xC009000CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_NEW_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the Slave Parameter Data is obsolete, there is new Slave Parameter Data available. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_NEW_PARAMETER ((TLR_RESULT)0xC009000DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_CFG_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Confirming the Slave Configuration Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_CFG_POWER_ON ((TLR_RESULT)0xC009000EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_CFG_NOT_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* There is no Configuration Data checking command pending, command ignored. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_CFG_NOT_PENDING ((TLR_RESULT)0xC009000FL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_CFG_NEW_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the Slave Configruation Data is obsolete, there is new Slave Configuration Data available. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_CFG_NEW_CONFIGURATION ((TLR_RESULT)0xC0090010L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_POWER_ON */ +/* */ +/* MessageText: */ +/* */ +/* Confirming the extended Slave Parameter Data cannot be performed, because slave state machine isn't initialized yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_POWER_ON ((TLR_RESULT)0xC0090011L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_NOT_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* There is no extended Parameter Data checking command pending, command ignored. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_NOT_PENDING ((TLR_RESULT)0xC0090012L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_NEW_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the extended Slave Parameter Data is obsolete, there is new extended Slave Parameter Data available. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_NEW_PARAMETER ((TLR_RESULT)0xC0090013L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_ABORT_IGNORED */ +/* */ +/* MessageText: */ +/* */ +/* The abort command is ignored in the current state of the slave state machine. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_ABORT_IGNORED ((TLR_RESULT)0xC0090014L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_WAIT_CFG */ +/* */ +/* MessageText: */ +/* */ +/* Getting the Slave Output Data cannot be performed, because slave state is currently in state "WAIT-CFG". */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_WAIT_CFG ((TLR_RESULT)0xC0090015L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SET_INPUT_NOT_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* Setting the Slave Input Data cannot be performed, because input update is not pending. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SET_INPUT_NOT_PENDING ((TLR_RESULT)0xC0090016L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_INVALID_MASTER_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the Slave Parameter Data is obsolete, because meanwhile an other master has parameterized the slave. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_USER_PRM_INVALID_MASTER_ADDRESS ((TLR_RESULT)0xC0090017L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_CFG_INVALID_MASTER_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the Slave Configruation Data is obsolete, because meanwhile an other master has configured the slave. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_CFG_INVALID_MASTER_ADDRESS ((TLR_RESULT)0xC0090018L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_APPLICATION_READY_IGNORED */ +/* */ +/* MessageText: */ +/* */ +/* The Application ready command is ignored in the current state of the slave state machine. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_APPLICATION_READY_IGNORED ((TLR_RESULT)0xC0090019L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_INVALID_MASTER_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The confirmation of the extended Slave Parameter Data is obsolete, because meanwhile an other master has parameterized the slave. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_CHECK_EXT_USER_PRM_INVALID_MASTER_ADDRESS ((TLR_RESULT)0xC009001AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_DATA_EXCHANGE_NO_CYCLE */ +/* */ +/* MessageText: */ +/* */ +/* Getting the Slave Output Data cannot be performed, because slave state machine is in state "DATA-EXCH" but no output cycle has been driven yet. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_GET_OUTPUT_DATA_EXCHANGE_NO_CYCLE ((TLR_RESULT)0xC009001BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_APPLICATION_ALREADY_READY */ +/* */ +/* MessageText: */ +/* */ +/* The Application ready command is ignored, because the application has already signaled its readyness. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_APPLICATION_ALREADY_READY ((TLR_RESULT)0xC009001CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SLAVE_DIAG_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* A new Slave Diagnostic command can not be accepted, while a previous one is pending. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SLAVE_DIAG_PENDING ((TLR_RESULT)0xC009001DL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_READ_RESPONSE_NEG */ +/* */ +/* MessageText: */ +/* */ +/* The read command can not be A new Slave Diagnostic command can not be accepted, while a previous one is pending. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_READ_RESPONSE_NEG ((TLR_RESULT)0xC009001EL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_MS1_INIT_WRONG_STATE */ +/* */ +/* MessageText: */ +/* */ +/* The acyclic slave state machine cannot be initialized, state machine is not in "POWER-ON" state. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_MS1_INIT_WRONG_STATE ((TLR_RESULT)0xC009001FL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* The Alarm Handler state machine isn't started yet, an Alarm cannot be notified. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_NOT_STARTED ((TLR_RESULT)0xC0090020L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_NOT_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* The requested Type of Alarm is not enabled, this Alarm cannot be notified. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_NOT_ENABLED ((TLR_RESULT)0xC0090022L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_LIMIT_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* The limit of parallel running alarms is expired, this Alarm cannot be notified. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_LIMIT_EXPIRED ((TLR_RESULT)0xC0090023L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* This requested Type of Alarm is still pending and in operation, this is why the Alarm cannot be notified. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_ALARM_HANDLER_PENDING ((TLR_RESULT)0xC0090024L) + +/* */ +/* MessageId: TLR_W_PROFIBUS_FSPMS_NOTREADY_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* Application is at not ready state. */ +/* */ +#define TLR_W_PROFIBUS_FSPMS_NOTREADY_EXPIRED ((TLR_RESULT)0x80090025L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_WATCHDOG_EXPIRED */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog error expired. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_WATCHDOG_EXPIRED ((TLR_RESULT)0xC0090026L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Subscriber with given address not configured. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_CONFIGURED ((TLR_RESULT)0xC0090027L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_IN_WSTART_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Subscriber in wrong state, state w_start expected. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_IN_WSTART_STATE ((TLR_RESULT)0xC0090028L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_IN_RUN_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Subscriber in wrong state, state run expected. */ +/* */ +#define TLR_E_PROFIBUS_FSPMS_SUBSCRIBER_NOT_IN_RUN_STATE ((TLR_RESULT)0xC0090029L) + + + + +#endif /* __PROFIBUS_FSPMS_ERROR_H */ + +#ifndef __PROFIBUS_MPI_AP_ERROR_H +#define __PROFIBUS_MPI_AP_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS MPI Application ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_MPI_AP_COMMAND_INVALID ((TLR_RESULT)0xC0680001L) + + + + +#endif /* __PROFIBUS_MPI_AP_ERROR_H */ + +#ifndef __PROFIBUS_MPI_ERROR_H +#define __PROFIBUS_MPI_ERROR_H + +/*****************************************************************************/ +/* PROFIBUS MPI ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_PROFIBUS_MPI_COMMAND_INVALID ((TLR_RESULT)0xC0670001L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_INVALID_PACKET_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid packet length received. */ +/* */ +#define TLR_E_PROFIBUS_MPI_INVALID_PACKET_LENGTH ((TLR_RESULT)0xC0670002L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_DATA_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Data Counter Error. */ +/* */ +#define TLR_E_PROFIBUS_DATA_CNT ((TLR_RESULT)0xC0670005L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_ILLEGAL_STATION_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Station Address is invalid. */ +/* */ +#define TLR_E_PROFIBUS_MPI_ILLEGAL_STATION_ADDRESS ((TLR_RESULT)0xC0670006L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_ILLEGAL_SOCKET_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Socket number is invalid. */ +/* */ +#define TLR_E_PROFIBUS_MPI_ILLEGAL_SOCKET_NUMBER ((TLR_RESULT)0xC0670007L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_COMMUNICATION_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Communcation is aborted by the remote station. */ +/* */ +#define TLR_E_PROFIBUS_MPI_COMMUNICATION_ABORTED ((TLR_RESULT)0xC0670008L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_COMMUNICATION_REFUSED */ +/* */ +/* MessageText: */ +/* */ +/* Communcation is refused by the remote station. */ +/* */ +#define TLR_E_PROFIBUS_MPI_COMMUNICATION_REFUSED ((TLR_RESULT)0xC0670009L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_ERROR_WHILE_BARGAIN_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Communcation error while bargain max data len. */ +/* */ +#define TLR_E_PROFIBUS_MPI_ERROR_WHILE_BARGAIN_LEN ((TLR_RESULT)0xC067000AL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_DATA_OUT_OF_ORDER */ +/* */ +/* MessageText: */ +/* */ +/* Recived packet has wrong sequence number. */ +/* */ +#define TLR_E_PROFIBUS_MPI_DATA_OUT_OF_ORDER ((TLR_RESULT)0xC067000BL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_DISCONNECT_REQUEST */ +/* */ +/* MessageText: */ +/* */ +/* Host application has send an disconnect request. */ +/* */ +#define TLR_E_PROFIBUS_MPI_DISCONNECT_REQUEST ((TLR_RESULT)0xC067000CL) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_CON_TO */ +/* */ +/* MessageText: */ +/* */ +/* Timeout. */ +/* */ +#define TLR_E_PROFIBUS_MPI_CON_TO ((TLR_RESULT)0xC0670130L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_CON_SE */ +/* */ +/* MessageText: */ +/* */ +/* Sequenceerror. */ +/* */ +#define TLR_E_PROFIBUS_MPI_CON_SE ((TLR_RESULT)0xC0670139L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_BUS_UNCONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Bus unconfigured. */ +/* */ +#define TLR_E_PROFIBUS_MPI_BUS_UNCONFIGURED ((TLR_RESULT)0xC0670202L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_ILLEGAL_FUNCTION_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Illegalfunction number. */ +/* */ +#define TLR_E_PROFIBUS_MPI_ILLEGAL_FUNCTION_NUMBER ((TLR_RESULT)0xC0670203L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_RESET_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Reset in progress. */ +/* */ +#define TLR_E_PROFIBUS_MPI_RESET_IN_PROGRESS ((TLR_RESULT)0xC0670204L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_TOO_MANY_REQ_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Too many requests in progress. */ +/* */ +#define TLR_E_PROFIBUS_MPI_TOO_MANY_REQ_IN_PROGRESS ((TLR_RESULT)0xC0670205L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_DENIED_BY_WATCHDOG_TO */ +/* */ +/* MessageText: */ +/* */ +/* No Access because of Watchdog Timeout. */ +/* */ +#define TLR_E_PROFIBUS_MPI_DENIED_BY_WATCHDOG_TO ((TLR_RESULT)0xC0670206L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_ILLEGAL_WATCHDOG_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Illegal Watchdog time. */ +/* */ +#define TLR_E_PROFIBUS_MPI_ILLEGAL_WATCHDOG_TIME ((TLR_RESULT)0xC0670207L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_CON_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Connection to Plc in progress. */ +/* */ +#define TLR_E_PROFIBUS_MPI_CON_IN_PROGRESS ((TLR_RESULT)0xC0670208L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_BUS_ALREADY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Bus already configured. */ +/* */ +#define TLR_E_PROFIBUS_MPI_BUS_ALREADY_CONFIGURED ((TLR_RESULT)0xC0670209L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_SE */ +/* */ +/* MessageText: */ +/* */ +/* Device stopped communication or is not in Open State. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_SE ((TLR_RESULT)0xC0670281L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_ABORT */ +/* */ +/* MessageText: */ +/* */ +/* Device aborts communication. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_ABORT ((TLR_RESULT)0xC0670282L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_PS */ +/* */ +/* MessageText: */ +/* */ +/* Previous Service still in Progress */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_PS ((TLR_RESULT)0xC0670283L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_LE */ +/* */ +/* MessageText: */ +/* */ +/* Length Error. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_LE ((TLR_RESULT)0xC0670284L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_IV */ +/* */ +/* MessageText: */ +/* */ +/* Specified offset out of limits or not known to remote station. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_IV ((TLR_RESULT)0xC0670285L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_PDU */ +/* */ +/* MessageText: */ +/* */ +/* Wrong PDU coding. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_PDU ((TLR_RESULT)0xC0670286L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_OP */ +/* */ +/* MessageText: */ +/* */ +/* Specified Length to read or write out of limits. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_OP ((TLR_RESULT)0xC0670287L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_HW */ +/* */ +/* MessageText: */ +/* */ +/* Specified address not defined in remote station. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_HW ((TLR_RESULT)0xC0670288L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_REJ_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Remote station not in right operational Mode. */ +/* */ +#define TLR_E_PROFIBUS_MPI_REJ_MODE ((TLR_RESULT)0xC0670289L) + +/* */ +/* MessageId: TLR_E_PROFIBUS_MPI_UNKNOWN_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error. */ +/* */ +#define TLR_E_PROFIBUS_MPI_UNKNOWN_ERROR ((TLR_RESULT)0xC0670290L) + + + + +#endif /* __PROFIBUS_MPI_ERROR_H */ + +#ifndef __PROFIDRIVE_E_RROR_H +#define __PROFIDRIVE_E_RROR_H + +/*****************************************************************************/ +/* PROFIdrive Task */ +/*****************************************************************************/ +/* */ +/* MessageId: PROFIDRIVE_E_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Command not valid. */ +/* */ +#define PROFIDRIVE_E_COMMAND_INVALID ((TLR_RESULT)0xC0970001L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_ID_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Drive UNIT ID. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_ID_INVALID ((TLR_RESULT)0xC0970002L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Drive UNIT Not Found. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_NOT_FOUND ((TLR_RESULT)0xC0970003L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_ID_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Drive UNIT ID already exist. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_ID_ALREADY_EXISTS ((TLR_RESULT)0xC0970004L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_OBJECT_ID_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Drive Object ID. */ +/* */ +#define PROFIDRIVE_E_DRIVE_OBJECT_ID_INVALID ((TLR_RESULT)0xC0970005L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_OBJECT_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Drive Object Not Found. */ +/* */ +#define PROFIDRIVE_E_DRIVE_OBJECT_NOT_FOUND ((TLR_RESULT)0xC0970006L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_OBJECT_ID_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Drive Object ID already exist. */ +/* */ +#define PROFIDRIVE_E_DRIVE_OBJECT_ID_ALREADY_EXISTS ((TLR_RESULT)0xC0970007L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_HAS_NO_DRIVE_OBJECT */ +/* */ +/* MessageText: */ +/* */ +/* Drive Unit has no drive Object. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_HAS_NO_DRIVE_OBJECT ((TLR_RESULT)0xC0970008L) + +/* */ +/* MessageId: PROFIDRIVE_E_MAX_NUMBER_OF_DRIVE_UNIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The P-Device has exceeded the maximum number of allowed Drive Units. */ +/* */ +#define PROFIDRIVE_E_MAX_NUMBER_OF_DRIVE_UNIT_EXCEEDED ((TLR_RESULT)0xC0970009L) + +/* */ +/* MessageId: PROFIDRIVE_E_MAX_NUMBER_OF_DRIVE_OBJECT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The P-Device or Drive Unit has exceeded the maximum number of allowed Drive Object. */ +/* */ +#define PROFIDRIVE_E_MAX_NUMBER_OF_DRIVE_OBJECT_EXCEEDED ((TLR_RESULT)0xC097000AL) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* PROFIdrive Parameter already exist. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_ALREADY_EXISTS ((TLR_RESULT)0xC097000BL) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_NUMBER_IMPERMISSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* PROFIdrive Parameter number impermissible. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_NUMBER_IMPERMISSIBLE ((TLR_RESULT)0xC097000CL) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* PROFIdrive Parameter not found. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_NOT_FOUND ((TLR_RESULT)0xC097000DL) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_DELTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Drive Unit cannot be deleted. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_DELTION_FAILED ((TLR_RESULT)0xC097000EL) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_OBJECT_DELTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Drive Object cannot be deleted. */ +/* */ +#define PROFIDRIVE_E_DRIVE_OBJECT_DELTION_FAILED ((TLR_RESULT)0xC097000FL) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_VALIDITY_RANGE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* the range of validity for the PROFIdrive parameter is invalid. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_VALIDITY_RANGE_INVALID ((TLR_RESULT)0xC0970010L) + +/* */ +/* MessageId: PROFIDRIVE_E_SLOT_ENTRY_DOESNT_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* slot list entry doesn't exist . */ +/* */ +#define PROFIDRIVE_E_SLOT_ENTRY_DOESNT_EXIST ((TLR_RESULT)0xC0970011L) + +/* */ +/* MessageId: PROFIDRIVE_E_SLOT_ENTRY_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* slot list entry already exists . */ +/* */ +#define PROFIDRIVE_E_SLOT_ENTRY_ALREADY_EXISTS ((TLR_RESULT)0xC0970012L) + +/* */ +/* MessageId: PROFIDRIVE_E_MAX_NUMBER_OF_TEXT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The Parameter has exceeded the maximum number of allowed Texts. */ +/* */ +#define PROFIDRIVE_E_MAX_NUMBER_OF_TEXT_EXCEEDED ((TLR_RESULT)0xC0970013L) + +/* */ +/* MessageId: PROFIDRIVE_E_ALL_FAULT_MESSAGES_ACKNOLEDGED */ +/* */ +/* MessageText: */ +/* */ +/* all Fault message of last (unacknowledged) fault situation are acknowledged. */ +/* */ +#define PROFIDRIVE_E_ALL_FAULT_MESSAGES_ACKNOLEDGED ((TLR_RESULT)0xC0970014L) + +/* */ +/* MessageId: PROFIDRIVE_E_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define PROFIDRIVE_E_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC0970015L) + +/* */ +/* MessageId: PROFIDRIVE_E_CANNOT_CREATED_PARAMETER_LIST */ +/* */ +/* MessageText: */ +/* */ +/* Parameter list cannot be created . */ +/* */ +#define PROFIDRIVE_E_CANNOT_CREATED_PARAMETER_LIST ((TLR_RESULT)0xC0970016L) + +/* */ +/* MessageId: PROFIDRIVE_E_FAULT_BUFFER_SCALING_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* invalid scale for fault buffer situations . */ +/* */ +#define PROFIDRIVE_E_FAULT_BUFFER_SCALING_INVALID ((TLR_RESULT)0xC0970017L) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_NOTIFY_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Parameter is already for notification registered. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_NOTIFY_ALREADY_REGISTERED ((TLR_RESULT)0xC0970018L) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_NOTIFY_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Parameter is not registered or already unregistered. */ +/* */ +#define PROFIDRIVE_E_PARAMETER_NOTIFY_NOT_REGISTERED ((TLR_RESULT)0xC0970019L) + +/* */ +/* MessageId: PROFIDRIVE_E_PARAMETER_LIST_UNAVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter List PNU 980 is unavailable (not implemented). */ +/* */ +#define PROFIDRIVE_E_PARAMETER_LIST_UNAVAILABLE ((TLR_RESULT)0xC097001AL) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_AXIS_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Axis with given Axis number arleady exists. */ +/* */ +#define PROFIDRIVE_E_DRIVE_AXIS_ALREADY_EXISTS ((TLR_RESULT)0xC097001BL) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_UNIT_CONTAINS_AT_LEAST_ONE_DO */ +/* */ +/* MessageText: */ +/* */ +/* DU cannot be deleted, firstly delete the related DO's. */ +/* */ +#define PROFIDRIVE_E_DRIVE_UNIT_CONTAINS_AT_LEAST_ONE_DO ((TLR_RESULT)0xC097001CL) + +/* */ +/* MessageId: PROFIDRIVE_E_AXIS_NUMBER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Axis-Number. */ +/* */ +#define PROFIDRIVE_E_AXIS_NUMBER_INVALID ((TLR_RESULT)0xC097001DL) + +/* */ +/* MessageId: PROFIDRIVE_E_PAP_MAPPED_TO_WRONG_SUBMODULE */ +/* */ +/* MessageText: */ +/* */ +/* PROFIdrive Parameter Access Point (PAP) mapped to wrong subslot. */ +/* */ +#define PROFIDRIVE_E_PAP_MAPPED_TO_WRONG_SUBMODULE ((TLR_RESULT)0xC097001EL) + +/* */ +/* MessageId: PROFIDRIVE_E_SUBMODULE_ID_RESERVED */ +/* */ +/* MessageText: */ +/* */ +/* SubmoduleID is reserved . */ +/* */ +#define PROFIDRIVE_E_SUBMODULE_ID_RESERVED ((TLR_RESULT)0xC097001FL) + +/* */ +/* MessageId: PROFIDRIVE_E_IO_DATA_INPUT_LENGTH_INCORRECT */ +/* */ +/* MessageText: */ +/* */ +/* The configured input IO-Data length is incorrect. */ +/* */ +#define PROFIDRIVE_E_IO_DATA_INPUT_LENGTH_INCORRECT ((TLR_RESULT)0xC0970020L) + +/* */ +/* MessageId: PROFIDRIVE_E_IO_DATA_OUTPUT_LENGTH_INCORRECT */ +/* */ +/* MessageText: */ +/* */ +/* The configured output IO-Data length is incorrect. */ +/* */ +#define PROFIDRIVE_E_IO_DATA_OUTPUT_LENGTH_INCORRECT ((TLR_RESULT)0xC0970021L) + +/* */ +/* MessageId: PROFIDRIVE_E_DRIVE_OBJECT_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Drive object type invalid. */ +/* */ +#define PROFIDRIVE_E_DRIVE_OBJECT_TYPE_INVALID ((TLR_RESULT)0xC0970022L) + + + + +#endif /* __PROFIDRIVE_E_RROR_H */ + +#ifndef __RCX_ERROR_H +#define __RCX_ERROR_H + +/*****************************************************************************/ +/* RCX Task error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_RCX_QUE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Queue unknown. */ +/* */ +#define TLR_E_RCX_QUE_UNKNOWN ((TLR_RESULT)0xC02B0001L) + +/* */ +/* MessageId: TLR_E_RCX_QUE_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Queue table index does not exist. */ +/* */ +#define TLR_E_RCX_QUE_IDX_UNKNOWN ((TLR_RESULT)0xC02B0002L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task unknown. */ +/* */ +#define TLR_E_RCX_TSK_UNKNOWN ((TLR_RESULT)0xC02B0003L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task table index does not exist. */ +/* */ +#define TLR_E_RCX_TSK_IDX_UNKNOWN ((TLR_RESULT)0xC02B0004L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Task handle invalid. */ +/* */ +#define TLR_E_RCX_TSK_HANDLE_INVALID ((TLR_RESULT)0xC02B0005L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_INFO_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task info field index unknown. */ +/* */ +#define TLR_E_RCX_TSK_INFO_IDX_UNKNOWN ((TLR_RESULT)0xC02B0006L) + +/* */ +/* MessageId: TLR_I_RCX_FILE_RETRANSMIT */ +/* */ +/* MessageText: */ +/* */ +/* The last data block was invalid, please retransmit. */ +/* */ +#define TLR_I_RCX_FILE_RETRANSMIT ((TLR_RESULT)0x402B0001L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_XFR_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Requested transfer type invalid. */ +/* */ +#define TLR_E_RCX_FILE_XFR_TYPE_INVALID ((TLR_RESULT)0xC02B0007L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_REQUEST_INCORRECT */ +/* */ +/* MessageText: */ +/* */ +/* Request is incorrectly formatted i.e. wrong parameters. */ +/* */ +#define TLR_E_RCX_FILE_REQUEST_INCORRECT ((TLR_RESULT)0xC02B0008L) + +/* */ +/* MessageId: TLR_E_RCX_UNKNOWN_PORT_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Unknown port index. */ +/* */ +#define TLR_E_RCX_UNKNOWN_PORT_INDEX ((TLR_RESULT)0xC02B0009L) + +/* */ +/* MessageId: TLR_E_RCX_ROUTER_TABLE_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Router Table is full. */ +/* */ +#define TLR_E_RCX_ROUTER_TABLE_FULL ((TLR_RESULT)0xC02B000AL) + +/* */ +/* MessageId: TLR_E_RCX_NO_SUCH_ROUTER_IN_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* No such router in table. */ +/* */ +#define TLR_E_RCX_NO_SUCH_ROUTER_IN_TABLE ((TLR_RESULT)0xC02B000BL) + +/* */ +/* MessageId: TLR_E_RCX_INSTANCE_NOT_NULL */ +/* */ +/* MessageText: */ +/* */ +/* Mid_Sys Instance is not 0. */ +/* */ +#define TLR_E_RCX_INSTANCE_NOT_NULL ((TLR_RESULT)0xC02B000CL) + +/* */ +/* MessageId: TLR_E_RCX_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_RCX_COMMAND_INVALID ((TLR_RESULT)0xC02B000DL) + +/* */ +/* MessageId: TLR_E_RCX_TSK_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid task handle. */ +/* */ +#define TLR_E_RCX_TSK_INVALID ((TLR_RESULT)0xC02B000EL) + +/* */ +/* MessageId: TLR_E_RCX_TSK_NOT_A_USER_TASK */ +/* */ +/* MessageText: */ +/* */ +/* Access denied. Not a user task (See Config-File). */ +/* */ +#define TLR_E_RCX_TSK_NOT_A_USER_TASK ((TLR_RESULT)0xC02B000FL) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_SETTABLE */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle not settable. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_SETTABLE ((TLR_RESULT)0xC02B0010L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle invalid. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_INVALID ((TLR_RESULT)0xC02B0011L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle has not been set. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_SET ((TLR_RESULT)0xC02B0012L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_ALREADY_USED */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle is already in use. */ +/* */ +#define TLR_E_RCX_LOG_QUE_ALREADY_USED ((TLR_RESULT)0xC02B0013L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_NO_DEFAULT_QUEUE */ +/* */ +/* MessageText: */ +/* */ +/* Task has no default process queue. */ +/* */ +#define TLR_E_RCX_TSK_NO_DEFAULT_QUEUE ((TLR_RESULT)0xC02B0014L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module is invalid. CRC-32 check failed. */ +/* */ +#define TLR_E_RCX_MODULE_INVALID ((TLR_RESULT)0xC02B0015L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has not been found. Maybe it has not been downloaded before. */ +/* */ +#define TLR_E_RCX_MODULE_NOT_FOUND ((TLR_RESULT)0xC02B0016L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_RELOC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has an invalid reloc table. */ +/* */ +#define TLR_E_RCX_MODULE_RELOC_ERROR ((TLR_RESULT)0xC02B0017L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NO_INIT_TBL */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has no init table. */ +/* */ +#define TLR_E_RCX_MODULE_NO_INIT_TBL ((TLR_RESULT)0xC02B0018L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NO_ENTRY_POINT */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has no code entry point. */ +/* */ +#define TLR_E_RCX_MODULE_NO_ENTRY_POINT ((TLR_RESULT)0xC02B0019L) + +/* */ +/* MessageId: TLR_E_RCX_ACCESS_DENIED_IN_LOCKED_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Access denied due to current operating conditions. */ +/* */ +#define TLR_E_RCX_ACCESS_DENIED_IN_LOCKED_STATE ((TLR_RESULT)0xC02B001AL) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_FIRMWARE_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Firmware does not fit into flash. */ +/* */ +#define TLR_E_RCX_INVALID_FIRMWARE_SIZE ((TLR_RESULT)0xC02B001BL) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_RELOCATION_DISTANCE_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* The relocation distance is too long. */ +/* */ +#define TLR_E_RCX_MODULE_RELOCATION_DISTANCE_TOO_LONG ((TLR_RESULT)0xC02B001CL) + +/* */ +/* MessageId: TLR_E_RCX_SEC_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Access to the security flash failed. */ +/* */ +#define TLR_E_RCX_SEC_FAILED ((TLR_RESULT)0xC02B001DL) + +/* */ +/* MessageId: TLR_E_RCX_SEC_DISABLED */ +/* */ +/* MessageText: */ +/* */ +/* Security flash is disabled at firmware. */ +/* */ +#define TLR_E_RCX_SEC_DISABLED ((TLR_RESULT)0xC02B001EL) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_EXTENSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Extension field. */ +/* */ +#define TLR_E_RCX_INVALID_EXTENSION ((TLR_RESULT)0xC02B001FL) + +/* */ +/* MessageId: TLR_E_RCX_BLOCK_SIZE_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Block size out of range. */ +/* */ +#define TLR_E_RCX_BLOCK_SIZE_OUT_OF_RANGE ((TLR_RESULT)0xC02B0020L) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Channel. */ +/* */ +#define TLR_E_RCX_INVALID_CHANNEL ((TLR_RESULT)0xC02B0021L) + +/* */ +/* MessageId: TLR_E_RCX_INVLAID_FILE_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid File Length. */ +/* */ +#define TLR_E_RCX_INVLAID_FILE_LENGTH ((TLR_RESULT)0xC02B0022L) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_CHARACTER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Character. */ +/* */ +#define TLR_E_RCX_INVALID_CHARACTER ((TLR_RESULT)0xC02B0023L) + +/* */ +/* MessageId: TLR_E_RCX_PACKET_OUT_OF_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Packet out of sequence. */ +/* */ +#define TLR_E_RCX_PACKET_OUT_OF_SEQUENCE ((TLR_RESULT)0xC02B0024L) + +/* */ +/* MessageId: TLR_E_RCX_NOT_POSSIBLE_IN_CURRENT_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Not possible in current state. */ +/* */ +#define TLR_E_RCX_NOT_POSSIBLE_IN_CURRENT_STATE ((TLR_RESULT)0xC02B0025L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_INVALID_ZONE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone Parameter is invalid. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_INVALID_ZONE ((TLR_RESULT)0xC02B0026L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom access is not allowed in current state. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_NOT_ALLOWED ((TLR_RESULT)0xC02B0027L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom is not available. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_NOT_AVAILABLE ((TLR_RESULT)0xC02B0028L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_INVALID_CHECKSUM */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom has an invalid checksum. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_INVALID_CHECKSUM ((TLR_RESULT)0xC02B0029L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_WRITABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone is not writeable. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_WRITABLE ((TLR_RESULT)0xC02B002AL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_READ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Read Failed. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_READ_FAILED ((TLR_RESULT)0xC02B002BL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_WRITE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Write Failed. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_WRITE_FAILED ((TLR_RESULT)0xC02B002CL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_ACCESS_DENIED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone Access Denied. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_ACCESS_DENIED ((TLR_RESULT)0xC02B002DL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_EMULATED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Emulated. No write possible. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_EMULATED ((TLR_RESULT)0xC02B002EL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_NAME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File name is invalid. */ +/* */ +#define TLR_E_RCX_FILE_NAME_INVALID ((TLR_RESULT)0xC02B002FL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_ERROR ((TLR_RESULT)0xC02B0030L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_END_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence End Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_END_ERROR ((TLR_RESULT)0xC02B0031L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_BEGIN_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence Begin Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_BEGIN_ERROR ((TLR_RESULT)0xC02B0032L) + +/* */ +/* MessageId: TLR_E_RCX_UNEXPECTED_BLOCK_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected File Transfer Block Size. */ +/* */ +#define TLR_E_RCX_UNEXPECTED_BLOCK_SIZE ((TLR_RESULT)0xC02B0033L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_CRC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header has invalid CRC error. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_CRC_ERROR ((TLR_RESULT)0xC02B0034L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_MODULE_SIZE_DIFFERS */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header specifies a different module size than the actual module header itself. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_MODULE_SIZE_DIFFERS ((TLR_RESULT)0xC02B0035L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_MD5_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header contains a wrong MD-5 checksum for file data. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_MD5_CHECKSUM_ERROR ((TLR_RESULT)0xC02B0036L) + +/* */ +/* MessageId: TLR_E_RCX_PACKET_WOULD_BE_TOO_LONG_FOR_MTU */ +/* */ +/* MessageText: */ +/* */ +/* The packet would be too long for transfer. */ +/* */ +#define TLR_E_RCX_PACKET_WOULD_BE_TOO_LONG_FOR_MTU ((TLR_RESULT)0xC02B0037L) + +/* */ +/* MessageId: TLR_E_INVALID_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* Invalid block id */ +/* */ +#define TLR_E_INVALID_BLOCK ((TLR_RESULT)0xC02B0038L) + +/* */ +/* MessageId: TLR_E_INVALID_STRUCT_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid structure number */ +/* */ +#define TLR_E_INVALID_STRUCT_NUMBER ((TLR_RESULT)0xC02B0039L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file header */ +/* */ +#define TLR_E_HIL_FILE_HEADER_INVALID ((TLR_RESULT)0xC02B003AL) + +/* */ +/* MessageId: TLR_E_LICENSE_CHIPTYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Target device not supported for license update */ +/* */ +#define TLR_E_LICENSE_CHIPTYPE_UNSUPPORTED ((TLR_RESULT)0xC02B003BL) + +/* */ +/* MessageId: TLR_E_LICENSE_CHIPTYPE_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* License incompatible for target device */ +/* */ +#define TLR_E_LICENSE_CHIPTYPE_MISMATCH ((TLR_RESULT)0xC02B003CL) + +/* */ +/* MessageId: TLR_E_LICENSE_HW_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* License generated for different device */ +/* */ +#define TLR_E_LICENSE_HW_MISMATCH ((TLR_RESULT)0xC02B003DL) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_NO_MODULE_DESCRIPTOR */ +/* */ +/* MessageText: */ +/* */ +/* Missing module descriptor in module. */ +/* */ +#define TLR_E_MODULE_CONTAINS_NO_MODULE_DESCRIPTOR ((TLR_RESULT)0xC02B003EL) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNKNOWN_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Unknown version in module descriptor. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNKNOWN_VERSION ((TLR_RESULT)0xC02B003FL) + +/* */ +/* MessageId: TLR_E_MODULE_HAS_NO_INIT_FUNCTION */ +/* */ +/* MessageText: */ +/* */ +/* Module has no init function. */ +/* */ +#define TLR_E_MODULE_HAS_NO_INIT_FUNCTION ((TLR_RESULT)0xC02B0040L) + +/* */ +/* MessageId: TLR_E_MODULE_OFFSET_RANGE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Module part exceeded offset range. */ +/* */ +#define TLR_E_MODULE_OFFSET_RANGE_ERROR ((TLR_RESULT)0xC02B0041L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_HEADER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF header in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_HEADER ((TLR_RESULT)0xC02B0042L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_SECTION_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF section reference in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_SECTION_REFERENCE ((TLR_RESULT)0xC02B0043L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_SYMBOL_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF symbol reference in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_SYMBOL_REFERENCE ((TLR_RESULT)0xC02B0044L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_AN_UNDEFINED_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an undefined symbol. */ +/* */ +#define TLR_E_MODULE_CONTAINS_AN_UNDEFINED_SYMBOL ((TLR_RESULT)0xC02B0045L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_INVALID_CODE_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains invalid symbol to code area. */ +/* */ +#define TLR_E_MODULE_CONTAINS_INVALID_CODE_SYMBOL ((TLR_RESULT)0xC02B0046L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_BINDING */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an supported symbol binding. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_BINDING ((TLR_RESULT)0xC02B0047L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an supported symbol type. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_TYPE ((TLR_RESULT)0xC02B0048L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_SECTION_OFFSET_ENCOUNTERED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid section offset encountered. */ +/* */ +#define TLR_E_MODULE_INVALID_SECTION_OFFSET_ENCOUNTERED ((TLR_RESULT)0xC02B0049L) + +/* */ +/* MessageId: TLR_E_MODULE_UNSUPPORTED_RELOC_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported reloc type. */ +/* */ +#define TLR_E_MODULE_UNSUPPORTED_RELOC_TYPE ((TLR_RESULT)0xC02B004AL) + +/* */ +/* MessageId: TLR_E_MODULE_RELOC_DISTANCE_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Reloc distance too long. */ +/* */ +#define TLR_E_MODULE_RELOC_DISTANCE_TOO_LONG ((TLR_RESULT)0xC02B004BL) + +/* */ +/* MessageId: TLR_E_MODULE_RELOC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Reloc error. */ +/* */ +#define TLR_E_MODULE_RELOC_ERROR ((TLR_RESULT)0xC02B004CL) + +/* */ +/* MessageId: TLR_E_MODULE_SHT_RELA_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Rela relocs not supported. */ +/* */ +#define TLR_E_MODULE_SHT_RELA_NOT_SUPPORTED ((TLR_RESULT)0xC02B004DL) + +/* */ +/* MessageId: TLR_E_MODULE_SPECIAL_SYM_PARSE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Special syms could not be parsed. */ +/* */ +#define TLR_E_MODULE_SPECIAL_SYM_PARSE_ERROR ((TLR_RESULT)0xC02B004EL) + +/* */ +/* MessageId: TLR_E_MODULE_MISSING_SPECIAL_SYMS */ +/* */ +/* MessageText: */ +/* */ +/* Missing special symbols in ELF symtab. */ +/* */ +#define TLR_E_MODULE_MISSING_SPECIAL_SYMS ((TLR_RESULT)0xC02B004FL) + +/* */ +/* MessageId: TLR_E_MODULE_RCX_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* rcX Jump table is shorter than expected. */ +/* */ +#define TLR_E_MODULE_RCX_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED ((TLR_RESULT)0xC02B0050L) + +/* */ +/* MessageId: TLR_E_MODULE_LIBC_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* libc Jump table is shorter than expected. */ +/* */ +#define TLR_E_MODULE_LIBC_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED ((TLR_RESULT)0xC02B0051L) + +/* */ +/* MessageId: TLR_E_MODULE_TASK_GROUP_RANGE_DOES_NOT_MATCH_STATIC_TASK_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Task Group Range does not match static task table. */ +/* */ +#define TLR_E_MODULE_TASK_GROUP_RANGE_DOES_NOT_MATCH_STATIC_TASK_TABLE ((TLR_RESULT)0xC02B0052L) + +/* */ +/* MessageId: TLR_E_MODULE_INTERRUPT_GROUP_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt Group Range does not match interrupt table. */ +/* */ +#define TLR_E_MODULE_INTERRUPT_GROUP_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE ((TLR_RESULT)0xC02B0053L) + +/* */ +/* MessageId: TLR_E_MODULE_INTERRUPT_GROUP_TASK_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt Group Task-Range does not match interrupt table. */ +/* */ +#define TLR_E_MODULE_INTERRUPT_GROUP_TASK_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE ((TLR_RESULT)0xC02B0054L) + +/* */ +/* MessageId: TLR_E_MODULE_LED_TAG_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* LED-Tag is too short. */ +/* */ +#define TLR_E_MODULE_LED_TAG_TOO_SHORT ((TLR_RESULT)0xC02B0055L) + +/* */ +/* MessageId: TLR_E_MODULE_LED_TAG_CONTAINS_INVALID_PARAMETERS */ +/* */ +/* MessageText: */ +/* */ +/* LED-Tag contains invalid parameters. */ +/* */ +#define TLR_E_MODULE_LED_TAG_CONTAINS_INVALID_PARAMETERS ((TLR_RESULT)0xC02B0056L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_COMMON_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains unsupported *COM* symbol. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_COMMON_SYMBOL ((TLR_RESULT)0xC02B0057L) + +/* */ +/* MessageId: TLR_E_RCX_DEVICE_CLASS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Device class in file header does not match target. */ +/* */ +#define TLR_E_RCX_DEVICE_CLASS_INVALID ((TLR_RESULT)0xC02B0058L) + +/* */ +/* MessageId: TLR_E_RCX_MFG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Manufacturer in file header does not match target. */ +/* */ +#define TLR_E_RCX_MFG_INVALID ((TLR_RESULT)0xC02B0059L) + +/* */ +/* MessageId: TLR_E_RCX_HW_COMPATIBILITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Hardware compatibility index in file header does not match target. */ +/* */ +#define TLR_E_RCX_HW_COMPATIBILITY_INVALID ((TLR_RESULT)0xC02B005AL) + +/* */ +/* MessageId: TLR_E_RCX_HW_OPTIONS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Hardware options in file header does not match target. */ +/* */ +#define TLR_E_RCX_HW_OPTIONS_INVALID ((TLR_RESULT)0xC02B005BL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_READABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone is not readable. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_READABLE ((TLR_RESULT)0xC02B4D52L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer in use. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_IN_USE ((TLR_RESULT)0xC02B524CL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer Packet invalid. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_PACKET_INVALID ((TLR_RESULT)0xC02B4444L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_NOT_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer is not active. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_NOT_ACTIVE ((TLR_RESULT)0xC02B5342L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer has invalid type code. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_INVALID ((TLR_RESULT)0xC02B5257L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_CRC_REPEATEDLY_WRONG */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer was tried repeatedly with a wrong CRC. */ +/* */ +#define TLR_E_RCX_FILE_CRC_REPEATEDLY_WRONG ((TLR_RESULT)0xC02B4352L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_TYPE_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Transfer Type is not available. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_TYPE_NOT_AVAILABLE ((TLR_RESULT)0xC02B4353L) + +/* */ +/* MessageId: TLR_E_RCX_PATH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Path submitted in File Transfer was invalid. */ +/* */ +#define TLR_E_RCX_PATH_INVALID ((TLR_RESULT)0xC02B5555L) + +/* */ +/* MessageId: TLR_E_RCX_DRIVER_CFG_TABLE_INIT_FUNCTION_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* Driver Configuration Table Init Function missing. */ +/* */ +#define TLR_E_RCX_DRIVER_CFG_TABLE_INIT_FUNCTION_MISSING ((TLR_RESULT)0xC02BFFFFL) + +/* */ +/* MessageId: TLR_E_RCX_CONFIGURATION_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Configuration has been locked. */ +/* */ +#define TLR_E_RCX_CONFIGURATION_LOCKED ((TLR_RESULT)0xC02B4B54L) + +/* */ +/* MessageId: TLR_E_RCX_NOT_ENOUGH_SPACE_FOR_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Not enough space on volume for file. */ +/* */ +#define TLR_E_RCX_NOT_ENOUGH_SPACE_FOR_FILE ((TLR_RESULT)0xC02B4242L) + +/* */ +/* MessageId: TLR_E_RCX_FORMAT_ERASE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error formatting / erasing volume. */ +/* */ +#define TLR_E_RCX_FORMAT_ERASE_FAILED ((TLR_RESULT)0xC02B4243L) + +/* */ +/* MessageId: TLR_E_RCX_FORMAT_VERIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error erasing sector. */ +/* */ +#define TLR_E_RCX_FORMAT_VERIFY_FAILED ((TLR_RESULT)0xC02B4244L) + + + + +#endif /* __RCX_ERROR_H */ + +/*****************************************************************************/ +/* rcX Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_RCX_RX_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_TIMEOUT ((TLR_RESULT)0x00000001L) + +/* */ +/* MessageId: TLR_E_RCX_RX_GET_NO_TOKEN */ +/* */ +/* MessageText: */ +/* */ +/* RX_GET_NO_TOKEN. */ +/* */ +#define TLR_E_RCX_RX_GET_NO_TOKEN ((TLR_RESULT)0x00000002L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIORITY_EXIST */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIORITY_EXIST. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIORITY_EXIST ((TLR_RESULT)0x00000003L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIORITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIORITY_INVALID. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIORITY_INVALID ((TLR_RESULT)0x00000004L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIORITY_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIORITY_ERROR. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIORITY_ERROR ((TLR_RESULT)0x00000005L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TASK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TASK_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_KNL_TASK_UNKNOWN ((TLR_RESULT)0x00000006L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TASK_NOT_BLOCKED */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TASK_NOT_BLOCKED. */ +/* */ +#define TLR_E_RCX_RX_KNL_TASK_NOT_BLOCKED ((TLR_RESULT)0x00000007L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_STACK_UNDERRUN */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_STACK_UNDERRUN. */ +/* */ +#define TLR_E_RCX_RX_KNL_STACK_UNDERRUN ((TLR_RESULT)0x00000008L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TASK_BLOCKED */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TASK_BLOCKED. */ +/* */ +#define TLR_E_RCX_RX_KNL_TASK_BLOCKED ((TLR_RESULT)0x00000009L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TOKEN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TOKEN_INVALID. */ +/* */ +#define TLR_E_RCX_RX_KNL_TOKEN_INVALID ((TLR_RESULT)0x0000000AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TOKEN_DOUBLE */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TOKEN_DOUBLE. */ +/* */ +#define TLR_E_RCX_RX_KNL_TOKEN_DOUBLE ((TLR_RESULT)0x0000000BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TASK_DOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TASK_DOWN. */ +/* */ +#define TLR_E_RCX_RX_KNL_TASK_DOWN ((TLR_RESULT)0x0000000CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIOTYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIOTYPE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIOTYPE_INVALID ((TLR_RESULT)0x0000000DL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIOLEVEL_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIOLEVEL_INVALID. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIOLEVEL_INVALID ((TLR_RESULT)0x0000000EL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_PRIORITY_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_PRIORITY_RESOURCE. */ +/* */ +#define TLR_E_RCX_RX_KNL_PRIORITY_RESOURCE ((TLR_RESULT)0x0000000FL) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TOKEN_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TOKEN_RESOURCE. */ +/* */ +#define TLR_E_RCX_RX_KNL_TOKEN_RESOURCE ((TLR_RESULT)0x00000010L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_KEEP_HOOK */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_KEEP_HOOK. */ +/* */ +#define TLR_E_RCX_RX_KNL_KEEP_HOOK ((TLR_RESULT)0x00000011L) + +/* */ +/* MessageId: TLR_E_RCX_RX_KNL_TASK_REACTIVATION */ +/* */ +/* MessageText: */ +/* */ +/* RX_KNL_TASK_REACTIVATION. */ +/* */ +#define TLR_E_RCX_RX_KNL_TASK_REACTIVATION ((TLR_RESULT)0x00000012L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_MEM_NO_INIT ((TLR_RESULT)0x00000100L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_NAME. */ +/* */ +#define TLR_E_RCX_RX_MEM_NAME ((TLR_RESULT)0x00000101L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_ERR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_ERR. */ +/* */ +#define TLR_E_RCX_RX_MEM_ERR ((TLR_RESULT)0x00000102L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_RESOURCE. */ +/* */ +#define TLR_E_RCX_RX_MEM_RESOURCE ((TLR_RESULT)0x00000103L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_ALLOCATE_HEAP_ERR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_ALLOCATE_HEAP_ERR. */ +/* */ +#define TLR_E_RCX_RX_MEM_ALLOCATE_HEAP_ERR ((TLR_RESULT)0x00000104L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_FREE_HEAP_ERR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_FREE_HEAP_ERR. */ +/* */ +#define TLR_E_RCX_RX_MEM_FREE_HEAP_ERR ((TLR_RESULT)0x00000105L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_ALLOCATE_SIZE_ERR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_ALLOCATE_SIZE_ERR. */ +/* */ +#define TLR_E_RCX_RX_MEM_ALLOCATE_SIZE_ERR ((TLR_RESULT)0x00000106L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_FREE_SIZE_ERR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_FREE_SIZE_ERR. */ +/* */ +#define TLR_E_RCX_RX_MEM_FREE_SIZE_ERR ((TLR_RESULT)0x00000107L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_MEMORY_BLOCKS */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_MEMORY_BLOCKS. */ +/* */ +#define TLR_E_RCX_RX_MEM_MEMORY_BLOCKS ((TLR_RESULT)0x00000108L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_MEM_UNKNOWN ((TLR_RESULT)0x00000109L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MEM_INVALID ((TLR_RESULT)0x0000010AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_RX_MEM_NO_ACCESS ((TLR_RESULT)0x0000010BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_MEM_TIMEOUT ((TLR_RESULT)0x0000010CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_DELETED. */ +/* */ +#define TLR_E_RCX_RX_MEM_DELETED ((TLR_RESULT)0x0000010DL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_MEM_INVALID_CALLER ((TLR_RESULT)0x0000010EL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_NO_UPDATE */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_NO_UPDATE. */ +/* */ +#define TLR_E_RCX_RX_MEM_NO_UPDATE ((TLR_RESULT)0x0000010FL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_NO_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_NO_BUFFER. */ +/* */ +#define TLR_E_RCX_RX_MEM_NO_BUFFER ((TLR_RESULT)0x00000110L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MEM_MEMORY_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_MEM_MEMORY_NAME. */ +/* */ +#define TLR_E_RCX_RX_MEM_MEMORY_NAME ((TLR_RESULT)0x00000111L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_TIM_NO_INIT ((TLR_RESULT)0x00000200L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_INVALID. */ +/* */ +#define TLR_E_RCX_RX_TIM_INVALID ((TLR_RESULT)0x00000201L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_TIM_INVALID_CALLER ((TLR_RESULT)0x00000202L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_ZERO */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_ZERO. */ +/* */ +#define TLR_E_RCX_RX_TIM_ZERO ((TLR_RESULT)0x00000203L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_TIM_ALRDY_CLR ((TLR_RESULT)0x00000204L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_TIM_NO_EVE_HDLR ((TLR_RESULT)0x00000205L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_NOT_HALTED */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_NOT_HALTED. */ +/* */ +#define TLR_E_RCX_RX_TIM_NOT_HALTED ((TLR_RESULT)0x00000206L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_NAME. */ +/* */ +#define TLR_E_RCX_RX_TIM_NAME ((TLR_RESULT)0x00000207L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TIM_CYCLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_TIM_CYCLE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_TIM_CYCLE_INVALID ((TLR_RESULT)0x00000208L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_MBX_NO_INIT ((TLR_RESULT)0x00000300L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NAME. */ +/* */ +#define TLR_E_RCX_RX_MBX_NAME ((TLR_RESULT)0x00000301L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MBX_INVALID ((TLR_RESULT)0x00000302L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_DELETED. */ +/* */ +#define TLR_E_RCX_RX_MBX_DELETED ((TLR_RESULT)0x00000303L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_MBX_INVALID_CALLER ((TLR_RESULT)0x00000304L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_MBX_TIMEOUT ((TLR_RESULT)0x00000305L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_MBX_UNKNOWN ((TLR_RESULT)0x00000306L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_MSG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_MSG_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MBX_MSG_INVALID ((TLR_RESULT)0x00000307L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_SEG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_SEG_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MBX_SEG_INVALID ((TLR_RESULT)0x00000308L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_INTGY_LOAD */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_INTGY_LOAD. */ +/* */ +#define TLR_E_RCX_RX_MBX_INTGY_LOAD ((TLR_RESULT)0x00000309L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_INTGY_DOUBLE */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_INTGY_DOUBLE. */ +/* */ +#define TLR_E_RCX_RX_MBX_INTGY_DOUBLE ((TLR_RESULT)0x0000030AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_QUE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_QUE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MBX_QUE_INVALID ((TLR_RESULT)0x0000030BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_QUE_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_QUE_EMPTY. */ +/* */ +#define TLR_E_RCX_RX_MBX_QUE_EMPTY ((TLR_RESULT)0x0000030CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_QUE_INTGY_LOAD */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_QUE_INTGY_LOAD. */ +/* */ +#define TLR_E_RCX_RX_MBX_QUE_INTGY_LOAD ((TLR_RESULT)0x0000030DL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_MBX_ALRDY_CLR ((TLR_RESULT)0x0000030EL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NO_EVENTHDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NO_EVENTHDLR. */ +/* */ +#define TLR_E_RCX_RX_MBX_NO_EVENTHDLR ((TLR_RESULT)0x0000030FL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_EMPTY. */ +/* */ +#define TLR_E_RCX_RX_MBX_EMPTY ((TLR_RESULT)0x00000310L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NO_SEGMENT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NO_SEGMENT. */ +/* */ +#define TLR_E_RCX_RX_MBX_NO_SEGMENT ((TLR_RESULT)0x00000311L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_MBX_NO_EVE_HDLR ((TLR_RESULT)0x00000312L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_TYPE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_TYPE_ERROR. */ +/* */ +#define TLR_E_RCX_RX_MBX_TYPE_ERROR ((TLR_RESULT)0x00000313L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_PARENT_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_PARENT_CONFLICT. */ +/* */ +#define TLR_E_RCX_RX_MBX_PARENT_CONFLICT ((TLR_RESULT)0x00000314L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_SEG_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_SEG_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_MBX_SEG_TIMEOUT ((TLR_RESULT)0x00000315L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_NOT_INSTALLED */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_NOT_INSTALLED. */ +/* */ +#define TLR_E_RCX_RX_MBX_NOT_INSTALLED ((TLR_RESULT)0x00000316L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MBX_MAILBOX_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MBX_MAILBOX_LIMIT. */ +/* */ +#define TLR_E_RCX_RX_MBX_MAILBOX_LIMIT ((TLR_RESULT)0x00000317L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_SER_NO_INIT ((TLR_RESULT)0x00000400L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_NAME. */ +/* */ +#define TLR_E_RCX_RX_SER_NAME ((TLR_RESULT)0x00000401L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_INVALID. */ +/* */ +#define TLR_E_RCX_RX_SER_INVALID ((TLR_RESULT)0x00000402L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_DELETED. */ +/* */ +#define TLR_E_RCX_RX_SER_DELETED ((TLR_RESULT)0x00000403L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_SER_INVALID_CALLER ((TLR_RESULT)0x00000404L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_SER_TIMEOUT ((TLR_RESULT)0x00000405L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_SER_UNKNOWN ((TLR_RESULT)0x00000406L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_RESOURCE. */ +/* */ +#define TLR_E_RCX_RX_SER_RESOURCE ((TLR_RESULT)0x00000407L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_OVERRUN */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_OVERRUN. */ +/* */ +#define TLR_E_RCX_RX_SER_OVERRUN ((TLR_RESULT)0x00000408L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_NO_TASK_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_NO_TASK_PENDING. */ +/* */ +#define TLR_E_RCX_RX_SER_NO_TASK_PENDING ((TLR_RESULT)0x00000409L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_CONF_PENDING */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_CONF_PENDING. */ +/* */ +#define TLR_E_RCX_RX_SER_CONF_PENDING ((TLR_RESULT)0x0000040AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_NO_LOAD */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_NO_LOAD. */ +/* */ +#define TLR_E_RCX_RX_SER_NO_LOAD ((TLR_RESULT)0x0000040BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_ACCESS_DENIED */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_ACCESS_DENIED. */ +/* */ +#define TLR_E_RCX_RX_SER_ACCESS_DENIED ((TLR_RESULT)0x0000040CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_FULL */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_FULL. */ +/* */ +#define TLR_E_RCX_RX_SER_FULL ((TLR_RESULT)0x0000040DL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SER_OVERRUN_WARN */ +/* */ +/* MessageText: */ +/* */ +/* RX_SER_OVERRUN_WARN. */ +/* */ +#define TLR_E_RCX_RX_SER_OVERRUN_WARN ((TLR_RESULT)0x0000040EL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_SEM_NO_INIT ((TLR_RESULT)0x00000500L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_NAME. */ +/* */ +#define TLR_E_RCX_RX_SEM_NAME ((TLR_RESULT)0x00000501L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_INVALID. */ +/* */ +#define TLR_E_RCX_RX_SEM_INVALID ((TLR_RESULT)0x00000502L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_DELETED. */ +/* */ +#define TLR_E_RCX_RX_SEM_DELETED ((TLR_RESULT)0x00000503L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_SEM_INVALID_CALLER ((TLR_RESULT)0x00000504L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_SEM_TIMEOUT ((TLR_RESULT)0x00000505L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_SEM_UNKNOWN ((TLR_RESULT)0x00000506L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_OVERFLOW. */ +/* */ +#define TLR_E_RCX_RX_SEM_OVERFLOW ((TLR_RESULT)0x00000507L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_NOT_AVAILABLE. */ +/* */ +#define TLR_E_RCX_RX_SEM_NOT_AVAILABLE ((TLR_RESULT)0x00000508L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_INTGY_SEM */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_INTGY_SEM. */ +/* */ +#define TLR_E_RCX_RX_SEM_INTGY_SEM ((TLR_RESULT)0x00000509L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_SEM_ALRDY_CLR ((TLR_RESULT)0x0000050AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_NO_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_NO_COUNT. */ +/* */ +#define TLR_E_RCX_RX_SEM_NO_COUNT ((TLR_RESULT)0x0000050BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SEM_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_SEM_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_SEM_NO_EVE_HDLR ((TLR_RESULT)0x0000050CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_MTX_NO_INIT ((TLR_RESULT)0x00000600L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_NAME. */ +/* */ +#define TLR_E_RCX_RX_MTX_NAME ((TLR_RESULT)0x00000601L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MTX_INVALID ((TLR_RESULT)0x00000602L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_DELETED. */ +/* */ +#define TLR_E_RCX_RX_MTX_DELETED ((TLR_RESULT)0x00000603L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_MTX_INVALID_CALLER ((TLR_RESULT)0x00000604L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_MTX_TIMEOUT ((TLR_RESULT)0x00000605L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_MTX_UNKNOWN ((TLR_RESULT)0x00000606L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_LOCKED. */ +/* */ +#define TLR_E_RCX_RX_MTX_LOCKED ((TLR_RESULT)0x00000607L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_OVERFLOW. */ +/* */ +#define TLR_E_RCX_RX_MTX_OVERFLOW ((TLR_RESULT)0x00000608L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_INTGY_MTX */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_INTGY_MTX. */ +/* */ +#define TLR_E_RCX_RX_MTX_INTGY_MTX ((TLR_RESULT)0x00000609L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_MTX_NO_EVE_HDLR ((TLR_RESULT)0x0000060AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_MTX_ALRDY_CLR ((TLR_RESULT)0x0000060BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_INTGY_ELMT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_INTGY_ELMT. */ +/* */ +#define TLR_E_RCX_RX_MTX_INTGY_ELMT ((TLR_RESULT)0x0000060CL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_NO_EVE_HANDLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_NO_EVE_HANDLER. */ +/* */ +#define TLR_E_RCX_RX_MTX_NO_EVE_HANDLER ((TLR_RESULT)0x0000060DL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_OUT_OF_MEMORY. */ +/* */ +#define TLR_E_RCX_RX_MTX_OUT_OF_MEMORY ((TLR_RESULT)0x0000060EL) + +/* */ +/* MessageId: TLR_E_RCX_RX_MTX_PROCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_MTX_PROCESS_INVALID. */ +/* */ +#define TLR_E_RCX_RX_MTX_PROCESS_INVALID ((TLR_RESULT)0x0000060FL) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_NO_INIT ((TLR_RESULT)0x00000700L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_NAME. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_NAME ((TLR_RESULT)0x00000701L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_INVALID. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_INVALID ((TLR_RESULT)0x00000702L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_DELETED. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_DELETED ((TLR_RESULT)0x00000703L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_INVALID_CALLER ((TLR_RESULT)0x00000704L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_TIMEOUT ((TLR_RESULT)0x00000706L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_UNKNOWN ((TLR_RESULT)0x00000707L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_NOEVENT */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_NOEVENT. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_NOEVENT ((TLR_RESULT)0x00000708L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_ALRDY_CLR ((TLR_RESULT)0x00000709L) + +/* */ +/* MessageId: TLR_E_RCX_RX_EVEGRP_MODE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_EVEGRP_MODE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_EVEGRP_MODE_INVALID ((TLR_RESULT)0x0000070AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_BAR_NO_INIT ((TLR_RESULT)0x00000800L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_NAME. */ +/* */ +#define TLR_E_RCX_RX_BAR_NAME ((TLR_RESULT)0x00000801L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_INVALID. */ +/* */ +#define TLR_E_RCX_RX_BAR_INVALID ((TLR_RESULT)0x00000802L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_DELETED. */ +/* */ +#define TLR_E_RCX_RX_BAR_DELETED ((TLR_RESULT)0x00000803L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_BAR_INVALID_CALLER ((TLR_RESULT)0x00000804L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_BAR_TIMEOUT ((TLR_RESULT)0x00000805L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_BAR_UNKNOWN ((TLR_RESULT)0x00000806L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_COUNT. */ +/* */ +#define TLR_E_RCX_RX_BAR_COUNT ((TLR_RESULT)0x00000807L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_NOT_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_NOT_REACHED. */ +/* */ +#define TLR_E_RCX_RX_BAR_NOT_REACHED ((TLR_RESULT)0x00000808L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_BAR_NO_EVE_HDLR ((TLR_RESULT)0x00000809L) + +/* */ +/* MessageId: TLR_E_RCX_RX_BAR_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_BAR_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_BAR_ALRDY_CLR ((TLR_RESULT)0x0000080AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_QUE_NO_INIT ((TLR_RESULT)0x00000900L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_NAME. */ +/* */ +#define TLR_E_RCX_RX_QUE_NAME ((TLR_RESULT)0x00000901L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_QUE_INVALID ((TLR_RESULT)0x00000902L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_DELETED */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_DELETED. */ +/* */ +#define TLR_E_RCX_RX_QUE_DELETED ((TLR_RESULT)0x00000903L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_QUE_INVALID_CALLER ((TLR_RESULT)0x00000904L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_QUE_TIMEOUT ((TLR_RESULT)0x00000905L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_QUE_UNKNOWN ((TLR_RESULT)0x00000906L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_FULL */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_FULL. */ +/* */ +#define TLR_E_RCX_RX_QUE_FULL ((TLR_RESULT)0x00000907L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_EMPTY. */ +/* */ +#define TLR_E_RCX_RX_QUE_EMPTY ((TLR_RESULT)0x00000908L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_NO_EVE_HDLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_NO_EVE_HDLR. */ +/* */ +#define TLR_E_RCX_RX_QUE_NO_EVE_HDLR ((TLR_RESULT)0x00000909L) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_ALRDY_CLR */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_ALRDY_CLR. */ +/* */ +#define TLR_E_RCX_RX_QUE_ALRDY_CLR ((TLR_RESULT)0x0000090AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_QUE_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* RX_QUE_NOT_AVAILABLE. */ +/* */ +#define TLR_E_RCX_RX_QUE_NOT_AVAILABLE ((TLR_RESULT)0x0000090BL) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_TSS_NO_INIT ((TLR_RESULT)0x00000B00L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_EMPTY. */ +/* */ +#define TLR_E_RCX_RX_TSS_EMPTY ((TLR_RESULT)0x00000B01L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_INVALID. */ +/* */ +#define TLR_E_RCX_RX_TSS_INVALID ((TLR_RESULT)0x00000B02L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_TASK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_TASK_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_TSS_TASK_UNKNOWN ((TLR_RESULT)0x00000B03L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_TASK_PRIORITY */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_TASK_PRIORITY. */ +/* */ +#define TLR_E_RCX_RX_TSS_TASK_PRIORITY ((TLR_RESULT)0x00000B04L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_TASK_NOT_LISTED */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_TASK_NOT_LISTED. */ +/* */ +#define TLR_E_RCX_RX_TSS_TASK_NOT_LISTED ((TLR_RESULT)0x00000B05L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_PRIORITY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_PRIORITY_EXISTS. */ +/* */ +#define TLR_E_RCX_RX_TSS_PRIORITY_EXISTS ((TLR_RESULT)0x00000B06L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_TASK_CREATION */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_TASK_CREATION. */ +/* */ +#define TLR_E_RCX_RX_TSS_TASK_CREATION ((TLR_RESULT)0x00000B07L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_TASK_REMOVE_IDLE */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_TASK_REMOVE_IDLE. */ +/* */ +#define TLR_E_RCX_RX_TSS_TASK_REMOVE_IDLE ((TLR_RESULT)0x00000B08L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_PRIORITY_ASSIGNED */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_PRIORITY_ASSIGNED. */ +/* */ +#define TLR_E_RCX_RX_TSS_PRIORITY_ASSIGNED ((TLR_RESULT)0x00000B09L) + +/* */ +/* MessageId: TLR_E_RCX_RX_TSS_USAGE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_TSS_USAGE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_TSS_USAGE_INVALID ((TLR_RESULT)0x00000B0AL) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_SIG_NO_INIT ((TLR_RESULT)0x00000C00L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_NAME. */ +/* */ +#define TLR_E_RCX_RX_SIG_NAME ((TLR_RESULT)0x00000C01L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_EVENT_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_EVENT_NOT_SET. */ +/* */ +#define TLR_E_RCX_RX_SIG_EVENT_NOT_SET ((TLR_RESULT)0x00000C02L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_OUTOF_EVENTS */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_OUTOF_EVENTS. */ +/* */ +#define TLR_E_RCX_RX_SIG_OUTOF_EVENTS ((TLR_RESULT)0x00000C03L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_SIG_TIMEOUT ((TLR_RESULT)0x00000C04L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_EVENT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_EVENT_INVALID. */ +/* */ +#define TLR_E_RCX_RX_SIG_EVENT_INVALID ((TLR_RESULT)0x00000C05L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_EVENT_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_EVENT_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_SIG_EVENT_UNKNOWN ((TLR_RESULT)0x00000C06L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_MULTI_WAIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_MULTI_WAIT. */ +/* */ +#define TLR_E_RCX_RX_SIG_MULTI_WAIT ((TLR_RESULT)0x00000C07L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SIG_NOT_PRESENT */ +/* */ +/* MessageText: */ +/* */ +/* RX_SIG_NOT_PRESENT. */ +/* */ +#define TLR_E_RCX_RX_SIG_NOT_PRESENT ((TLR_RESULT)0x00000C08L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_FSM_NO_INIT ((TLR_RESULT)0x00000D00L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_NAME. */ +/* */ +#define TLR_E_RCX_RX_FSM_NAME ((TLR_RESULT)0x00000D01L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_FSM_UNKNOWN ((TLR_RESULT)0x00000D02L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_NOT_INITIALIZED. */ +/* */ +#define TLR_E_RCX_RX_FSM_NOT_INITIALIZED ((TLR_RESULT)0x00000D03L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_UNKNOWN_RETURN */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_UNKNOWN_RETURN. */ +/* */ +#define TLR_E_RCX_RX_FSM_UNKNOWN_RETURN ((TLR_RESULT)0x00000D04L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_STATE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_FSM_STATE_INVALID ((TLR_RESULT)0x00000D05L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_NEXTSTATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_NEXTSTATE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_FSM_NEXTSTATE_INVALID ((TLR_RESULT)0x00000D06L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_STATEMACHINE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_STATEMACHINE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_FSM_STATEMACHINE_INVALID ((TLR_RESULT)0x00000D07L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FSM_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* RX_FSM_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_RX_FSM_INVALID_CALLER ((TLR_RESULT)0x00000D08L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CPR_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_CPR_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_CPR_NO_INIT ((TLR_RESULT)0x00000E00L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CPR_DESTINATION_BUFFER_LEN */ +/* */ +/* MessageText: */ +/* */ +/* RX_CPR_DESTINATION_BUFFER_LEN. */ +/* */ +#define TLR_E_RCX_RX_CPR_DESTINATION_BUFFER_LEN ((TLR_RESULT)0x00000E01L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_CRC_NO_INIT ((TLR_RESULT)0x00000F00L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_NAME. */ +/* */ +#define TLR_E_RCX_RX_CRC_NAME ((TLR_RESULT)0x00000F01L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_ORDER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_ORDER_INVALID. */ +/* */ +#define TLR_E_RCX_RX_CRC_ORDER_INVALID ((TLR_RESULT)0x00000F02L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_POLYNOM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_POLYNOM_INVALID. */ +/* */ +#define TLR_E_RCX_RX_CRC_POLYNOM_INVALID ((TLR_RESULT)0x00000F03L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_RESETVALUE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_RESETVALUE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_CRC_RESETVALUE_INVALID ((TLR_RESULT)0x00000F04L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_XORVALUE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_XORVALUE_INVALID. */ +/* */ +#define TLR_E_RCX_RX_CRC_XORVALUE_INVALID ((TLR_RESULT)0x00000F05L) + +/* */ +/* MessageId: TLR_E_RCX_RX_CRC_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_CRC_INVALID. */ +/* */ +#define TLR_E_RCX_RX_CRC_INVALID ((TLR_RESULT)0x00000F06L) + +/* */ +/* MessageId: TLR_E_RCX_RX_DIA_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_DIA_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_DIA_NO_INIT ((TLR_RESULT)0x00001000L) + +/* */ +/* MessageId: TLR_E_RCX_RX_DIA_INFO_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* RX_DIA_INFO_INVALID. */ +/* */ +#define TLR_E_RCX_RX_DIA_INFO_INVALID ((TLR_RESULT)0x00001001L) + +/* */ +/* MessageId: TLR_E_RCX_RX_DIA_NO_INFO */ +/* */ +/* MessageText: */ +/* */ +/* RX_DIA_NO_INFO. */ +/* */ +#define TLR_E_RCX_RX_DIA_NO_INFO ((TLR_RESULT)0x00001002L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_MLP_NO_INIT ((TLR_RESULT)0x00001100L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_OBJECT_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_OBJECT_UNKNOWN. */ +/* */ +#define TLR_E_RCX_RX_MLP_OBJECT_UNKNOWN ((TLR_RESULT)0x00001101L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_MASK_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_MASK_IN_USE. */ +/* */ +#define TLR_E_RCX_RX_MLP_MASK_IN_USE ((TLR_RESULT)0x00001102L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_INVALID_MASK */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_INVALID_MASK. */ +/* */ +#define TLR_E_RCX_RX_MLP_INVALID_MASK ((TLR_RESULT)0x00001103L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_NO_EVENT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_NO_EVENT. */ +/* */ +#define TLR_E_RCX_RX_MLP_NO_EVENT ((TLR_RESULT)0x00001104L) + +/* */ +/* MessageId: TLR_E_RCX_RX_MLP_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* RX_MLP_TIMEOUT. */ +/* */ +#define TLR_E_RCX_RX_MLP_TIMEOUT ((TLR_RESULT)0x00001105L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FLT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* RX_FLT_NO_INIT. */ +/* */ +#define TLR_E_RCX_RX_FLT_NO_INIT ((TLR_RESULT)0x00001200L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FLT_NAME */ +/* */ +/* MessageText: */ +/* */ +/* RX_FLT_NAME. */ +/* */ +#define TLR_E_RCX_RX_FLT_NAME ((TLR_RESULT)0x00001201L) + +/* */ +/* MessageId: TLR_E_RCX_RX_FLT_NO_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* RX_FLT_NO_FAULT. */ +/* */ +#define TLR_E_RCX_RX_FLT_NO_FAULT ((TLR_RESULT)0x00001202L) + +/* */ +/* MessageId: TLR_E_RCX_RX_SYSTIME_TIMESTAMP_NS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* RX_SYSTIME_TIMESTAMP_NS_ERROR. */ +/* */ +#define TLR_E_RCX_RX_SYSTIME_TIMESTAMP_NS_ERROR ((TLR_RESULT)0x00001300L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_NO_INIT ((TLR_RESULT)0x00004000L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_NAME. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_NAME ((TLR_RESULT)0x00004001L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_INVALID ((TLR_RESULT)0x00004002L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_UNKNOWN ((TLR_RESULT)0x00004003L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_ACCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_ACCESS_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_ACCESS_INVALID ((TLR_RESULT)0x00004004L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_UNKNOWN_DATATYPE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_UNKNOWN_DATATYPE. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_UNKNOWN_DATATYPE ((TLR_RESULT)0x00004005L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_UNKNOWN_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_UNKNOWN_ACCESS. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_UNKNOWN_ACCESS ((TLR_RESULT)0x00004006L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_POINTER_VIOLATION */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_POINTER_VIOLATION. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_POINTER_VIOLATION ((TLR_RESULT)0x00004007L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_UNKNOWN_VENDOR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_UNKNOWN_VENDOR. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_UNKNOWN_VENDOR ((TLR_RESULT)0x00004008L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_UNKNOWN_DEVICE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_UNKNOWN_DEVICE. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_UNKNOWN_DEVICE ((TLR_RESULT)0x00004009L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_SECTOR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_SECTOR_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_SECTOR_INVALID ((TLR_RESULT)0x0000400AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_ERASURE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_ERASURE_FAILED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_ERASURE_FAILED ((TLR_RESULT)0x0000400BL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_RAM_INSUFFICIENT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_RAM_INSUFFICIENT. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_RAM_INSUFFICIENT ((TLR_RESULT)0x0000400CL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_PROGRAM_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_PROGRAM_FAILED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_PROGRAM_FAILED ((TLR_RESULT)0x0000400DL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_OFFSET_ODD */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_OFFSET_ODD. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_OFFSET_ODD ((TLR_RESULT)0x0000400EL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_NUMBER_ODD */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_NUMBER_ODD. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_NUMBER_ODD ((TLR_RESULT)0x0000400FL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_RANGE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_RANGE_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_RANGE_EXCEEDED ((TLR_RESULT)0x00004010L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_PROTECTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_PROTECTED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_PROTECTED ((TLR_RESULT)0x00004011L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_OFFSET_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_OFFSET_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_OFFSET_EXCEEDED ((TLR_RESULT)0x00004012L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PFLS_MAX_SECTOR_ENTRIES_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PFLS_MAX_SECTOR_ENTRIES_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_PFLS_MAX_SECTOR_ENTRIES_EXCEEDED ((TLR_RESULT)0x00004013L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_CCH_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_CCH_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_CCH_NO_INIT ((TLR_RESULT)0x00004080L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_CCH_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_CCH_NAME. */ +/* */ +#define TLR_E_RCX_DRV_CCH_NAME ((TLR_RESULT)0x00004081L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_CCH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_CCH_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_CCH_INVALID ((TLR_RESULT)0x00004082L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_CCH_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_CCH_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_CCH_UNKNOWN ((TLR_RESULT)0x00004083L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MMU_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MMU_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_MMU_NO_INIT ((TLR_RESULT)0x00004100L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MMU_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MMU_NAME. */ +/* */ +#define TLR_E_RCX_DRV_MMU_NAME ((TLR_RESULT)0x00004101L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MMU_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MMU_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_MMU_INVALID ((TLR_RESULT)0x00004102L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MMU_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MMU_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_MMU_UNKNOWN ((TLR_RESULT)0x00004103L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_TCM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_TCM_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_TCM_NO_INIT ((TLR_RESULT)0x00004180L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_TCM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_TCM_NAME. */ +/* */ +#define TLR_E_RCX_DRV_TCM_NAME ((TLR_RESULT)0x00004181L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_TCM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_TCM_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_TCM_INVALID ((TLR_RESULT)0x00004182L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_XC_NO_INIT ((TLR_RESULT)0x00004200L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_NAME. */ +/* */ +#define TLR_E_RCX_DRV_XC_NAME ((TLR_RESULT)0x00004201L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_XC_UNKNOWN ((TLR_RESULT)0x00004202L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_XC_INVALID ((TLR_RESULT)0x00004203L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_VERIFY_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_VERIFY_ERROR. */ +/* */ +#define TLR_E_RCX_DRV_XC_VERIFY_ERROR ((TLR_RESULT)0x00004204L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_INVALID_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_INVALID_INSTANCE. */ +/* */ +#define TLR_E_RCX_DRV_XC_INVALID_INSTANCE ((TLR_RESULT)0x00004205L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_XC_IO_MEMORY_INSUFFICIENT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_XC_IO_MEMORY_INSUFFICIENT. */ +/* */ +#define TLR_E_RCX_DRV_XC_IO_MEMORY_INSUFFICIENT ((TLR_RESULT)0x00004206L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MPU_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MPU_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_MPU_NO_INIT ((TLR_RESULT)0x00004280L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MPU_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MPU_NAME. */ +/* */ +#define TLR_E_RCX_DRV_MPU_NAME ((TLR_RESULT)0x00004281L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_MPU_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_MPU_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_MPU_INVALID ((TLR_RESULT)0x00004282L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_PHY_NO_INIT ((TLR_RESULT)0x00004300L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_NAME. */ +/* */ +#define TLR_E_RCX_DRV_PHY_NAME ((TLR_RESULT)0x00004301L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_PHY_UNKNOWN ((TLR_RESULT)0x00004302L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PHY_INVALID ((TLR_RESULT)0x00004303L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_OUI_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_OUI_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PHY_OUI_INVALID ((TLR_RESULT)0x00004304L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_MODEL_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_MODEL_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PHY_MODEL_INVALID ((TLR_RESULT)0x00004305L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_REVISION_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_REVISION_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PHY_REVISION_INVALID ((TLR_RESULT)0x00004306L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PHY_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PHY_INIT_FAILED. */ +/* */ +#define TLR_E_RCX_DRV_PHY_INIT_FAILED ((TLR_RESULT)0x00004307L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PIO_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PIO_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_PIO_NO_INIT ((TLR_RESULT)0x00004380L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PIO_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PIO_NAME. */ +/* */ +#define TLR_E_RCX_DRV_PIO_NAME ((TLR_RESULT)0x00004381L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PIO_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PIO_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_PIO_UNKNOWN ((TLR_RESULT)0x00004382L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PIO_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PIO_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_PIO_INVALID ((TLR_RESULT)0x00004383L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_PIO_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* DRV_PIO_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_DRV_PIO_NO_ACCESS ((TLR_RESULT)0x00004384L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_LED_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_LED_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_LED_NO_INIT ((TLR_RESULT)0x00004400L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_LED_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_LED_NAME. */ +/* */ +#define TLR_E_RCX_DRV_LED_NAME ((TLR_RESULT)0x00004401L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_LED_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_LED_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_LED_UNKNOWN ((TLR_RESULT)0x00004402L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_LED_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_LED_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_LED_INVALID ((TLR_RESULT)0x00004403L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_LED_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* DRV_LED_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_DRV_LED_NO_ACCESS ((TLR_RESULT)0x00004404L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EBUS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EBUS_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_EBUS_NO_INIT ((TLR_RESULT)0x00004480L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EBUS_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EBUS_NAME. */ +/* */ +#define TLR_E_RCX_DRV_EBUS_NAME ((TLR_RESULT)0x00004481L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EBUS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EBUS_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_EBUS_UNKNOWN ((TLR_RESULT)0x00004482L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EBUS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EBUS_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_EBUS_INVALID ((TLR_RESULT)0x00004483L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_NO_INIT ((TLR_RESULT)0x00004500L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_NAME. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_NAME ((TLR_RESULT)0x00004501L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_INVALID ((TLR_RESULT)0x00004502L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_NO_ACCESS ((TLR_RESULT)0x00004503L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_UNKNOWN ((TLR_RESULT)0x00004504L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HWTIM_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HWTIM_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_HWTIM_INVALID_CALLER ((TLR_RESULT)0x00004505L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_HIF_NO_INIT ((TLR_RESULT)0x00004580L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_NAME. */ +/* */ +#define TLR_E_RCX_DRV_HIF_NAME ((TLR_RESULT)0x00004581L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_HIF_INVALID ((TLR_RESULT)0x00004582L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_HIF_UNKNOWN ((TLR_RESULT)0x00004583L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_ALREADY_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_ALREADY_INITIALIZED. */ +/* */ +#define TLR_E_RCX_DRV_HIF_ALREADY_INITIALIZED ((TLR_RESULT)0x00004584L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_SUBBLOCK_AUTOMATICALLY_ENABLED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_SUBBLOCK_AUTOMATICALLY_ENABLED. */ +/* */ +#define TLR_E_RCX_DRV_HIF_SUBBLOCK_AUTOMATICALLY_ENABLED ((TLR_RESULT)0x00004585L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIF_INVALID_INT_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIF_INVALID_INT_CONFIGURATION. */ +/* */ +#define TLR_E_RCX_DRV_HIF_INVALID_INT_CONFIGURATION ((TLR_RESULT)0x00004586L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIFPIO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIFPIO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_HIFPIO_INIT ((TLR_RESULT)0x000045C0L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIFPIO_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIFPIO_NAME. */ +/* */ +#define TLR_E_RCX_DRV_HIFPIO_NAME ((TLR_RESULT)0x000045C1L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIFPIO_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIFPIO_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_HIFPIO_INVALID ((TLR_RESULT)0x000045C2L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_HIFPIO_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_HIFPIO_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_HIFPIO_UNKNOWN ((TLR_RESULT)0x000045C3L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_INT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_INT_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_INT_NO_INIT ((TLR_RESULT)0x00004600L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_INT_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_INT_NAME. */ +/* */ +#define TLR_E_RCX_DRV_INT_NAME ((TLR_RESULT)0x00004601L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_INT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_INT_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_INT_INVALID ((TLR_RESULT)0x00004602L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_INT_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_INT_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_INT_INVALID_CALLER ((TLR_RESULT)0x00004603L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_INT_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_INT_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_INT_UNKNOWN ((TLR_RESULT)0x00004604L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIQ_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIQ_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_FIQ_NO_INIT ((TLR_RESULT)0x00004640L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIQ_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIQ_NAME. */ +/* */ +#define TLR_E_RCX_DRV_FIQ_NAME ((TLR_RESULT)0x00004641L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIQ_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIQ_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_FIQ_INVALID ((TLR_RESULT)0x00004642L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIQ_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIQ_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_FIQ_INVALID_CALLER ((TLR_RESULT)0x00004643L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIQ_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIQ_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_FIQ_UNKNOWN ((TLR_RESULT)0x00004644L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_NO_INIT ((TLR_RESULT)0x00004680L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_NAME. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_NAME ((TLR_RESULT)0x00004681L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_INVALID ((TLR_RESULT)0x00004682L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_UNKNOWN ((TLR_RESULT)0x00004683L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_ACCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_ACCESS_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_ACCESS_INVALID ((TLR_RESULT)0x00004684L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_UNKNOWN_FLASH */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_UNKNOWN_FLASH. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_UNKNOWN_FLASH ((TLR_RESULT)0x00004685L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SFLS_ERASURE_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SFLS_ERASURE_NOT_SUPPORTED. */ +/* */ +#define TLR_E_RCX_DRV_SFLS_ERASURE_NOT_SUPPORTED ((TLR_RESULT)0x00004686L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_URT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_URT_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_URT_NO_INIT ((TLR_RESULT)0x00004700L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_URT_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_URT_NAME. */ +/* */ +#define TLR_E_RCX_DRV_URT_NAME ((TLR_RESULT)0x00004701L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_URT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_URT_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_URT_INVALID ((TLR_RESULT)0x00004702L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_URT_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_URT_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_URT_UNKNOWN ((TLR_RESULT)0x00004703L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_URT_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_URT_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_URT_INVALID_CALLER ((TLR_RESULT)0x00004704L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_GPIO_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_GPIO_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_GPIO_NO_INIT ((TLR_RESULT)0x00004780L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_GPIO_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_GPIO_NAME. */ +/* */ +#define TLR_E_RCX_DRV_GPIO_NAME ((TLR_RESULT)0x00004781L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_GPIO_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_GPIO_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_GPIO_INVALID ((TLR_RESULT)0x00004782L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_GPIO_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_GPIO_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_GPIO_UNKNOWN ((TLR_RESULT)0x00004783L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_USB_NO_INIT ((TLR_RESULT)0x00004880L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_NAME. */ +/* */ +#define TLR_E_RCX_DRV_USB_NAME ((TLR_RESULT)0x00004881L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_PERIPHERAL_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_PERIPHERAL_NOT_SUPPORTED. */ +/* */ +#define TLR_E_RCX_DRV_USB_PERIPHERAL_NOT_SUPPORTED ((TLR_RESULT)0x00004882L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_USB_UNKNOWN ((TLR_RESULT)0x00004883L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_OTG_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_OTG_NAME. */ +/* */ +#define TLR_E_RCX_DRV_USB_OTG_NAME ((TLR_RESULT)0x00004884L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_OTG_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_OTG_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_USB_OTG_UNKNOWN ((TLR_RESULT)0x00004885L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_OTG_FATAL */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_OTG_FATAL. */ +/* */ +#define TLR_E_RCX_DRV_USB_OTG_FATAL ((TLR_RESULT)0x00004886L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_COM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_COM_NAME. */ +/* */ +#define TLR_E_RCX_DRV_USB_COM_NAME ((TLR_RESULT)0x00004887L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_COM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_COM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_USB_COM_UNKNOWN ((TLR_RESULT)0x00004888L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_COM_DISCONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_COM_DISCONNECTED. */ +/* */ +#define TLR_E_RCX_DRV_USB_COM_DISCONNECTED ((TLR_RESULT)0x00004889L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_COM_FATAL */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_COM_FATAL. */ +/* */ +#define TLR_E_RCX_DRV_USB_COM_FATAL ((TLR_RESULT)0x0000488AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_USB_COM_XFER_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_USB_COM_XFER_ACTIVE. */ +/* */ +#define TLR_E_RCX_DRV_USB_COM_XFER_ACTIVE ((TLR_RESULT)0x0000488BL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_VOL_NO_INIT ((TLR_RESULT)0x00004900L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_NAME. */ +/* */ +#define TLR_E_RCX_DRV_VOL_NAME ((TLR_RESULT)0x00004901L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_VOL_INVALID ((TLR_RESULT)0x00004902L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_VOL_UNKNOWN ((TLR_RESULT)0x00004903L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_ALREADY_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_ALREADY_MOUNTED. */ +/* */ +#define TLR_E_RCX_DRV_VOL_ALREADY_MOUNTED ((TLR_RESULT)0x00004904L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_NOT_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_NOT_MOUNTED. */ +/* */ +#define TLR_E_RCX_DRV_VOL_NOT_MOUNTED ((TLR_RESULT)0x00004905L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_SECTOR_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_SECTOR_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_VOL_SECTOR_INVALID ((TLR_RESULT)0x00004906L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_RANGE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_RANGE_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_VOL_RANGE_EXCEEDED ((TLR_RESULT)0x00004907L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_UNKNOWN_DRIVE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_UNKNOWN_DRIVE. */ +/* */ +#define TLR_E_RCX_DRV_VOL_UNKNOWN_DRIVE ((TLR_RESULT)0x00004908L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_IS_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_IS_MOUNTED. */ +/* */ +#define TLR_E_RCX_DRV_VOL_IS_MOUNTED ((TLR_RESULT)0x00004909L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_VOL_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_VOL_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_VOL_INVALID_CALLER ((TLR_RESULT)0x0000490AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NO_INIT ((TLR_RESULT)0x00004980L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_PERIPHERAL_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_PERIPHERAL_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_FTL_PERIPHERAL_UNKNOWN ((TLR_RESULT)0x00004981L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NOT_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NOT_MOUNTED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NOT_MOUNTED ((TLR_RESULT)0x00004982L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_ALREADY_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_ALREADY_MOUNTED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_ALREADY_MOUNTED ((TLR_RESULT)0x00004983L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_PERIPHERAL_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_PERIPHERAL_NOT_SUPPORTED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_PERIPHERAL_NOT_SUPPORTED ((TLR_RESULT)0x00004984L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NO_FTL_FORMAT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NO_FTL_FORMAT_FOUND. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NO_FTL_FORMAT_FOUND ((TLR_RESULT)0x00004985L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_FTL_FORMAT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_FTL_FORMAT_ERROR. */ +/* */ +#define TLR_E_RCX_DRV_FTL_FTL_FORMAT_ERROR ((TLR_RESULT)0x00004986L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_FTL_SIZE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_FTL_SIZE_ERROR. */ +/* */ +#define TLR_E_RCX_DRV_FTL_FTL_SIZE_ERROR ((TLR_RESULT)0x00004987L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NOT_INITIALIZED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NOT_INITIALIZED ((TLR_RESULT)0x00004988L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NOT_FORMATTED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NOT_FORMATTED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NOT_FORMATTED ((TLR_RESULT)0x00004989L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_RANGE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_RANGE_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_FTL_RANGE_EXCEEDED ((TLR_RESULT)0x0000498AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NO_SPACE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NO_SPACE. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NO_SPACE ((TLR_RESULT)0x0000498BL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_ERASE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_ERASE_ERROR. */ +/* */ +#define TLR_E_RCX_DRV_FTL_ERASE_ERROR ((TLR_RESULT)0x0000498CL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NO_FREE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NO_FREE_BLOCK. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NO_FREE_BLOCK ((TLR_RESULT)0x0000498DL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_NO_TRANSFER_UNIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_NO_TRANSFER_UNIT. */ +/* */ +#define TLR_E_RCX_DRV_FTL_NO_TRANSFER_UNIT ((TLR_RESULT)0x0000498EL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FTL_VOLUME_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FTL_VOLUME_TOO_BIG. */ +/* */ +#define TLR_E_RCX_DRV_FTL_VOLUME_TOO_BIG ((TLR_RESULT)0x0000498FL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_EDD_NO_INIT ((TLR_RESULT)0x00004A00L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_NAME. */ +/* */ +#define TLR_E_RCX_DRV_EDD_NAME ((TLR_RESULT)0x00004A01L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_EDD_UNKNOWN ((TLR_RESULT)0x00004A02L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_EDD_INVALID ((TLR_RESULT)0x00004A03L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_DRV_EDD_NO_ACCESS ((TLR_RESULT)0x00004A04L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_RESOURCE. */ +/* */ +#define TLR_E_RCX_DRV_EDD_RESOURCE ((TLR_RESULT)0x00004A05L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_ETH_TYPE_OCCUPIED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_ETH_TYPE_OCCUPIED. */ +/* */ +#define TLR_E_RCX_DRV_EDD_ETH_TYPE_OCCUPIED ((TLR_RESULT)0x00004A06L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_NO_FRAME_BUF */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_NO_FRAME_BUF. */ +/* */ +#define TLR_E_RCX_DRV_EDD_NO_FRAME_BUF ((TLR_RESULT)0x00004A07L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_INVALID_FRAME_BUF_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_INVALID_FRAME_BUF_TYPE. */ +/* */ +#define TLR_E_RCX_DRV_EDD_INVALID_FRAME_BUF_TYPE ((TLR_RESULT)0x00004A08L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_INVALID_APP_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_INVALID_APP_HANDLE. */ +/* */ +#define TLR_E_RCX_DRV_EDD_INVALID_APP_HANDLE ((TLR_RESULT)0x00004A09L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_EDD_PARAM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* DRV_EDD_PARAM_ERROR. */ +/* */ +#define TLR_E_RCX_DRV_EDD_PARAM_ERROR ((TLR_RESULT)0x00004A0AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_FIF_NO_INIT ((TLR_RESULT)0x00004A80L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_NAME. */ +/* */ +#define TLR_E_RCX_DRV_FIF_NAME ((TLR_RESULT)0x00004A81L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_FIF_UNKNOWN ((TLR_RESULT)0x00004A82L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_FIF_INVALID ((TLR_RESULT)0x00004A83L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFOCHANNEL_OUTOF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFOCHANNEL_OUTOF_RANGE. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFOCHANNEL_OUTOF_RANGE ((TLR_RESULT)0x00004A84L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_ELEMENTDEPTH_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_ELEMENTDEPTH_EXCEEDED. */ +/* */ +#define TLR_E_RCX_DRV_FIF_ELEMENTDEPTH_EXCEEDED ((TLR_RESULT)0x00004A85L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFODEPTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFODEPTH_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFODEPTH_INVALID ((TLR_RESULT)0x00004A86L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_INVALID ((TLR_RESULT)0x00004A87L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_EMPTY. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_EMPTY ((TLR_RESULT)0x00004A88L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_FULL */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_FULL. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_FULL ((TLR_RESULT)0x00004A89L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_CHANNEL_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_CHANNEL_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_FIF_CHANNEL_INVALID ((TLR_RESULT)0x00004A8AL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_UNDERRUN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_UNDERRUN. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_UNDERRUN ((TLR_RESULT)0x00004A8BL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_OVERFLOW. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_OVERFLOW ((TLR_RESULT)0x00004A8CL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_FIF_FIFO_NOTEMPTY */ +/* */ +/* MessageText: */ +/* */ +/* DRV_FIF_FIFO_NOTEMPTY. */ +/* */ +#define TLR_E_RCX_DRV_FIF_FIFO_NOTEMPTY ((TLR_RESULT)0x00004A8DL) + +/* */ +/* MessageId: TLR_E_RCX_DRV_ICM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_ICM_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_ICM_NO_INIT ((TLR_RESULT)0x00004B00L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_ICM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_ICM_NAME. */ +/* */ +#define TLR_E_RCX_DRV_ICM_NAME ((TLR_RESULT)0x00004B01L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_ICM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_ICM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_ICM_UNKNOWN ((TLR_RESULT)0x00004B02L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_ICM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_ICM_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_ICM_INVALID ((TLR_RESULT)0x00004B03L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SECPROM_NOT_PERSONALIZED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SECPROM_NOT_PERSONALIZED. */ +/* */ +#define TLR_E_RCX_DRV_SECPROM_NOT_PERSONALIZED ((TLR_RESULT)0x00004B80L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SECPROM_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SECPROM_NOT_INITIALIZED. */ +/* */ +#define TLR_E_RCX_DRV_SECPROM_NOT_INITIALIZED ((TLR_RESULT)0x00004B81L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SECPROM_INVALID_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SECPROM_INVALID_INSTANCE. */ +/* */ +#define TLR_E_RCX_DRV_SECPROM_INVALID_INSTANCE ((TLR_RESULT)0x00004B82L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SECPROM_FLUSH_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SECPROM_FLUSH_FAILED. */ +/* */ +#define TLR_E_RCX_DRV_SECPROM_FLUSH_FAILED ((TLR_RESULT)0x00004B83L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_SPI_NO_INIT ((TLR_RESULT)0x00004F00L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_NAME. */ +/* */ +#define TLR_E_RCX_DRV_SPI_NAME ((TLR_RESULT)0x00004F01L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_SPI_INVALID ((TLR_RESULT)0x00004F02L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_SPI_UNKNOWN ((TLR_RESULT)0x00004F03L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_SPI_INVALID_CALLER ((TLR_RESULT)0x00004F04L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_SPI_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_SPI_NOT_OPEN. */ +/* */ +#define TLR_E_RCX_DRV_SPI_NOT_OPEN ((TLR_RESULT)0x00004F05L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_IIC_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* DRV_IIC_NO_INIT. */ +/* */ +#define TLR_E_RCX_DRV_IIC_NO_INIT ((TLR_RESULT)0x00004F80L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_IIC_NAME */ +/* */ +/* MessageText: */ +/* */ +/* DRV_IIC_NAME. */ +/* */ +#define TLR_E_RCX_DRV_IIC_NAME ((TLR_RESULT)0x00004F81L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_IIC_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* DRV_IIC_INVALID. */ +/* */ +#define TLR_E_RCX_DRV_IIC_INVALID ((TLR_RESULT)0x00004F82L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_IIC_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* DRV_IIC_UNKNOWN. */ +/* */ +#define TLR_E_RCX_DRV_IIC_UNKNOWN ((TLR_RESULT)0x00004F83L) + +/* */ +/* MessageId: TLR_E_RCX_DRV_IIC_INVALID_CALLER */ +/* */ +/* MessageText: */ +/* */ +/* DRV_IIC_INVALID_CALLER. */ +/* */ +#define TLR_E_RCX_DRV_IIC_INVALID_CALLER ((TLR_RESULT)0x00004F84L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_URT_NO_INIT ((TLR_RESULT)0x00005000L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_NO_PORT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_NO_PORT. */ +/* */ +#define TLR_E_RCX_HAL_URT_NO_PORT ((TLR_RESULT)0x00005001L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_PORT_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_PORT_IN_USE. */ +/* */ +#define TLR_E_RCX_HAL_URT_PORT_IN_USE ((TLR_RESULT)0x00005002L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_PORT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_PORT_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_URT_PORT_INVALID ((TLR_RESULT)0x00005003L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_PARITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_PARITY_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_URT_PARITY_INVALID ((TLR_RESULT)0x00005004L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_STOPBIT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_STOPBIT_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_URT_STOPBIT_INVALID ((TLR_RESULT)0x00005005L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_MODE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_MODE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_URT_MODE_INVALID ((TLR_RESULT)0x00005006L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_PORT_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_PORT_LIMIT. */ +/* */ +#define TLR_E_RCX_HAL_URT_PORT_LIMIT ((TLR_RESULT)0x00005007L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_PORT_NAME */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_PORT_NAME. */ +/* */ +#define TLR_E_RCX_HAL_URT_PORT_NAME ((TLR_RESULT)0x00005008L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_HAL_URT_NO_ACCESS ((TLR_RESULT)0x00005009L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_NO_DATA */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_NO_DATA. */ +/* */ +#define TLR_E_RCX_HAL_URT_NO_DATA ((TLR_RESULT)0x0000500AL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_RECEIVE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_RECEIVE_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_URT_RECEIVE_ERROR ((TLR_RESULT)0x0000500BL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_URT_TRANSMITTER_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_URT_TRANSMITTER_BUSY. */ +/* */ +#define TLR_E_RCX_HAL_URT_TRANSMITTER_BUSY ((TLR_RESULT)0x0000500CL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_TCM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_TCM_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_TCM_NO_INIT ((TLR_RESULT)0x00005080L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_TCM_BOUNDARY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_TCM_BOUNDARY. */ +/* */ +#define TLR_E_RCX_HAL_TCM_BOUNDARY ((TLR_RESULT)0x00005081L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_TCM_SIZE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_TCM_SIZE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_TCM_SIZE_INVALID ((TLR_RESULT)0x00005082L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_TCM_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_TCM_TYPE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_TCM_TYPE_INVALID ((TLR_RESULT)0x00005083L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIM_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_HWTIM_NO_INIT ((TLR_RESULT)0x00005100L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIM_NAME */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIM_NAME. */ +/* */ +#define TLR_E_RCX_HAL_HWTIM_NAME ((TLR_RESULT)0x00005101L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIM_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HWTIM_INVALID ((TLR_RESULT)0x00005102L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIM_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIM_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_HAL_HWTIM_NO_ACCESS ((TLR_RESULT)0x00005103L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIME_PRESCALE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIME_PRESCALE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HWTIME_PRESCALE_INVALID ((TLR_RESULT)0x00005104L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HWTIME_MAXVALUE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HWTIME_MAXVALUE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HWTIME_MAXVALUE_INVALID ((TLR_RESULT)0x00005105L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_CCH_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_CCH_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_CCH_NO_INIT ((TLR_RESULT)0x00005180L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_CCH_UNKNOWN_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_CCH_UNKNOWN_TYPE. */ +/* */ +#define TLR_E_RCX_HAL_CCH_UNKNOWN_TYPE ((TLR_RESULT)0x00005181L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_INT_NO_INIT ((TLR_RESULT)0x00005200L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_NAME */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_NAME. */ +/* */ +#define TLR_E_RCX_HAL_INT_NAME ((TLR_RESULT)0x00005201L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_NUM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_NUM_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_INT_NUM_INVALID ((TLR_RESULT)0x00005202L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_TRIGGER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_TRIGGER_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_INT_TRIGGER_INVALID ((TLR_RESULT)0x00005203L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_HAL_INT_NO_ACCESS ((TLR_RESULT)0x00005204L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_FULL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_FULL. */ +/* */ +#define TLR_E_RCX_HAL_INT_FULL ((TLR_RESULT)0x00005205L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_PRIORITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_PRIORITY_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_INT_PRIORITY_INVALID ((TLR_RESULT)0x00005206L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_ALREADY_IN_USE. */ +/* */ +#define TLR_E_RCX_HAL_INT_ALREADY_IN_USE ((TLR_RESULT)0x00005207L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_INT_DOUBLE_PRIORITY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_INT_DOUBLE_PRIORITY. */ +/* */ +#define TLR_E_RCX_HAL_INT_DOUBLE_PRIORITY ((TLR_RESULT)0x00005208L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EBUS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EBUS_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_EBUS_NO_INIT ((TLR_RESULT)0x00005280L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EBUS_DATAWIDTH */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EBUS_DATAWIDTH. */ +/* */ +#define TLR_E_RCX_HAL_EBUS_DATAWIDTH ((TLR_RESULT)0x00005281L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EBUS_NUM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EBUS_NUM_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EBUS_NUM_INVALID ((TLR_RESULT)0x00005282L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_LED_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_LED_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_LED_NO_INIT ((TLR_RESULT)0x00005300L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_LED_NO_ACCESS */ +/* */ +/* MessageText: */ +/* */ +/* HAL_LED_NO_ACCESS. */ +/* */ +#define TLR_E_RCX_HAL_LED_NO_ACCESS ((TLR_RESULT)0x00005301L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_XC_NO_INIT ((TLR_RESULT)0x00005400L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_XC_UNKNOWN ((TLR_RESULT)0x00005401L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_MEMTYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_MEMTYPE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_XC_MEMTYPE_INVALID ((TLR_RESULT)0x00005402L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_PROTECTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_PROTECTION_FAILED. */ +/* */ +#define TLR_E_RCX_HAL_XC_PROTECTION_FAILED ((TLR_RESULT)0x00005403L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_BOARDERSET_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_BOARDERSET_FAILED. */ +/* */ +#define TLR_E_RCX_HAL_XC_BOARDERSET_FAILED ((TLR_RESULT)0x00005404L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_XC_BOADER_NOT_SETTABLE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_XC_BOADER_NOT_SETTABLE. */ +/* */ +#define TLR_E_RCX_HAL_XC_BOADER_NOT_SETTABLE ((TLR_RESULT)0x00005405L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PHY_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PHY_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_PHY_NO_INIT ((TLR_RESULT)0x00005500L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PHY_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PHY_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_PHY_UNKNOWN ((TLR_RESULT)0x00005501L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PHY_ACCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PHY_ACCESS_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_PHY_ACCESS_INVALID ((TLR_RESULT)0x00005502L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PHY_MACINSTANCE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PHY_MACINSTANCE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_PHY_MACINSTANCE_INVALID ((TLR_RESULT)0x00005503L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PHY_ACCESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PHY_ACCESS_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_PHY_ACCESS_ERROR ((TLR_RESULT)0x00005504L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_PFL_NO_INIT ((TLR_RESULT)0x00005600L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_UKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_UKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_PFL_UKNOWN ((TLR_RESULT)0x00005601L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_BUSY. */ +/* */ +#define TLR_E_RCX_HAL_PFL_BUSY ((TLR_RESULT)0x00005602L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_ERSUSP */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_ERSUSP. */ +/* */ +#define TLR_E_RCX_HAL_PFL_ERSUSP ((TLR_RESULT)0x00005603L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_TIMEOUT. */ +/* */ +#define TLR_E_RCX_HAL_PFL_TIMEOUT ((TLR_RESULT)0x00005604L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_PFL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_PFL_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_PFL_ERROR ((TLR_RESULT)0x00005605L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_DPM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_DPM_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_DPM_NO_INIT ((TLR_RESULT)0x00005700L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_DPM_PORT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_DPM_PORT_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_DPM_PORT_INVALID ((TLR_RESULT)0x00005702L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_DPM_SIZE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_DPM_SIZE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_DPM_SIZE_INVALID ((TLR_RESULT)0x00005703L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_DPM_HOST_MAILBOX_FULL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_DPM_HOST_MAILBOX_FULL. */ +/* */ +#define TLR_E_RCX_HAL_DPM_HOST_MAILBOX_FULL ((TLR_RESULT)0x00005704L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_DPM_NO_MESSAGE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_DPM_NO_MESSAGE. */ +/* */ +#define TLR_E_RCX_HAL_DPM_NO_MESSAGE ((TLR_RESULT)0x00005705L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MMU_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MMU_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_MMU_NO_INIT ((TLR_RESULT)0x00005800L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MMU_BOUNDARY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MMU_BOUNDARY. */ +/* */ +#define TLR_E_RCX_HAL_MMU_BOUNDARY ((TLR_RESULT)0x00005801L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MMU_TYPE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MMU_TYPE_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_MMU_TYPE_UNKNOWN ((TLR_RESULT)0x00005802L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MPU_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MPU_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_MPU_NO_INIT ((TLR_RESULT)0x00005880L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MPU_BOUNDARY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MPU_BOUNDARY. */ +/* */ +#define TLR_E_RCX_HAL_MPU_BOUNDARY ((TLR_RESULT)0x00005881L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_MPU_REGION_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_MPU_REGION_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_MPU_REGION_UNKNOWN ((TLR_RESULT)0x00005882L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_EDD_NO_INIT ((TLR_RESULT)0x00005900L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_EDD_UNKNOWN ((TLR_RESULT)0x00005901L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_ACCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_ACCESS_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EDD_ACCESS_INVALID ((TLR_RESULT)0x00005902L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_ACCESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_ACCESS_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_ACCESS_ERROR ((TLR_RESULT)0x00005903L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_HANDLE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EDD_HANDLE_INVALID ((TLR_RESULT)0x00005904L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_CALLBACK_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_CALLBACK_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EDD_CALLBACK_INVALID ((TLR_RESULT)0x00005905L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_BUFFER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_BUFFER_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EDD_BUFFER_INVALID ((TLR_RESULT)0x00005906L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_NO_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_NO_RESOURCE. */ +/* */ +#define TLR_E_RCX_HAL_EDD_NO_RESOURCE ((TLR_RESULT)0x00005907L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_MGMT_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_MGMT_FRAME. */ +/* */ +#define TLR_E_RCX_HAL_EDD_MGMT_FRAME ((TLR_RESULT)0x00005908L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_FRAME_DEQUEUED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_FRAME_DEQUEUED. */ +/* */ +#define TLR_E_RCX_HAL_EDD_FRAME_DEQUEUED ((TLR_RESULT)0x00005909L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_LATE_COLLISION */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_LATE_COLLISION. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_LATE_COLLISION ((TLR_RESULT)0x0000590AL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_LINK_DOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_LINK_DOWN. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_LINK_DOWN ((TLR_RESULT)0x0000590BL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_EXCESSIVE_COLLISION */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_EXCESSIVE_COLLISION. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_EXCESSIVE_COLLISION ((TLR_RESULT)0x0000590CL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_FRAME_LENGTH_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_FRAME_LENGTH_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_FRAME_LENGTH_ERROR ((TLR_RESULT)0x0000590DL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_POINTER_ADDRESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_POINTER_ADDRESS_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_POINTER_ADDRESS_ERROR ((TLR_RESULT)0x0000590EL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_TX_FIFO_UNDERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_TX_FIFO_UNDERFLOW. */ +/* */ +#define TLR_E_RCX_HAL_EDD_TX_FIFO_UNDERFLOW ((TLR_RESULT)0x0000590FL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_FCS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_FCS_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_FCS_ERROR ((TLR_RESULT)0x00005910L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_ALIGNMENT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_ALIGNMENT_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_ALIGNMENT_ERROR ((TLR_RESULT)0x00005911L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_FRAME_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_FRAME_TOO_LONG. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_FRAME_TOO_LONG ((TLR_RESULT)0x00005912L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_RUNT_FRAME */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_RUNT_FRAME. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_RUNT_FRAME ((TLR_RESULT)0x00005913L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_COLLISION_FRAGMENT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_COLLISION_FRAGMENT. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_COLLISION_FRAGMENT ((TLR_RESULT)0x00005914L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_START_OF_FRAME_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_START_OF_FRAME_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_START_OF_FRAME_ERROR ((TLR_RESULT)0x00005915L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_RX_FIFO_OVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_RX_FIFO_OVERFLOW. */ +/* */ +#define TLR_E_RCX_HAL_EDD_RX_FIFO_OVERFLOW ((TLR_RESULT)0x00005916L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_PARAM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_PARAM_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_EDD_PARAM_ERROR ((TLR_RESULT)0x00005917L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_EDD_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_EDD_COMMAND_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_EDD_COMMAND_INVALID ((TLR_RESULT)0x00005918L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_ICM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_ICM_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_ICM_NO_INIT ((TLR_RESULT)0x00005A00L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_ICM_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_ICM_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_ICM_UNKNOWN ((TLR_RESULT)0x00005A01L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_ICM_ACCESS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_ICM_ACCESS_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_ICM_ACCESS_INVALID ((TLR_RESULT)0x00005A02L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_ICM_ACCESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* HAL_ICM_ACCESS_ERROR. */ +/* */ +#define TLR_E_RCX_HAL_ICM_ACCESS_ERROR ((TLR_RESULT)0x00005A03L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_ICM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_ICM_HANDLE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_ICM_HANDLE_INVALID ((TLR_RESULT)0x00005A04L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_HIF_NO_INIT ((TLR_RESULT)0x00005B80L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_ILLVECTID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_ILLVECTID. */ +/* */ +#define TLR_E_RCX_HAL_HIF_ILLVECTID ((TLR_RESULT)0x00005B81L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_NOHANDLER */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_NOHANDLER. */ +/* */ +#define TLR_E_RCX_HAL_HIF_NOHANDLER ((TLR_RESULT)0x00005B82L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_ILLSUBIRQMASK */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_ILLSUBIRQMASK. */ +/* */ +#define TLR_E_RCX_HAL_HIF_ILLSUBIRQMASK ((TLR_RESULT)0x00005B83L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_UNINITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_UNINITIALIZED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_UNINITIALIZED ((TLR_RESULT)0x00005B84L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_ALREADY_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_ALREADY_INITIALIZED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_ALREADY_INITIALIZED ((TLR_RESULT)0x00005B85L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_NUM_OF_AREABLOCKS_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_NUM_OF_AREABLOCKS_EXCEEDED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_NUM_OF_AREABLOCKS_EXCEEDED ((TLR_RESULT)0x00005B86L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_SIZE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_SIZE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_SIZE_INVALID ((TLR_RESULT)0x00005B87L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_LAYOUT_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_LAYOUT_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_LAYOUT_UNKNOWN ((TLR_RESULT)0x00005B88L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_SIZE_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_SIZE_EXCEEDED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_SIZE_EXCEEDED ((TLR_RESULT)0x00005B89L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_HOST_MAILBOX_FULL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_HOST_MAILBOX_FULL. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_HOST_MAILBOX_FULL ((TLR_RESULT)0x00005B8AL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_SEGMENT_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_SEGMENT_LIMIT. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_SEGMENT_LIMIT ((TLR_RESULT)0x00005B8BL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_SEGMENT_UNUSED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_SEGMENT_UNUSED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_SEGMENT_UNUSED ((TLR_RESULT)0x00005B8CL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_NAME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_NAME_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_NAME_INVALID ((TLR_RESULT)0x00005B8DL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_UNKNOWN ((TLR_RESULT)0x00005B8EL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_AREA_ALREADY_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_AREA_ALREADY_INITIALIZED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_AREA_ALREADY_INITIALIZED ((TLR_RESULT)0x00005B8FL) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_SUBBLOCK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_SUBBLOCK_UNKNOWN. */ +/* */ +#define TLR_E_RCX_HAL_HIF_SUBBLOCK_UNKNOWN ((TLR_RESULT)0x00005B90L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_SUBBLOCK_CREATION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_SUBBLOCK_CREATION_FAILED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_SUBBLOCK_CREATION_FAILED ((TLR_RESULT)0x00005B91L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_SUBBLOCK_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_SUBBLOCK_OFFSET_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HIF_SUBBLOCK_OFFSET_INVALID ((TLR_RESULT)0x00005B92L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_FUNCTION_POSITION_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_FUNCTION_POSITION_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_HIF_FUNCTION_POSITION_INVALID ((TLR_RESULT)0x00005B93L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_HIF_FUNCTION_ALREADY_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* HAL_HIF_FUNCTION_ALREADY_INITIALIZED. */ +/* */ +#define TLR_E_RCX_HAL_HIF_FUNCTION_ALREADY_INITIALIZED ((TLR_RESULT)0x00005B94L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_SPI_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_SPI_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_SPI_NO_INIT ((TLR_RESULT)0x00005D00L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_SPI_NULL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_SPI_NULL. */ +/* */ +#define TLR_E_RCX_HAL_SPI_NULL ((TLR_RESULT)0x00005D01L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_SPI_PORT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_SPI_PORT_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_SPI_PORT_INVALID ((TLR_RESULT)0x00005D02L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_SPI_SLAVE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_SPI_SLAVE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_SPI_SLAVE_INVALID ((TLR_RESULT)0x00005D03L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_SPI_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* HAL_SPI_BUSY. */ +/* */ +#define TLR_E_RCX_HAL_SPI_BUSY ((TLR_RESULT)0x00005D04L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_WAIT_FOR_SIGNAL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_WAIT_FOR_SIGNAL. */ +/* */ +#define TLR_E_RCX_HAL_WAIT_FOR_SIGNAL ((TLR_RESULT)0x00005D05L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_NO_INIT. */ +/* */ +#define TLR_E_RCX_HAL_IIC_NO_INIT ((TLR_RESULT)0x00005E00L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_NULL */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_NULL. */ +/* */ +#define TLR_E_RCX_HAL_IIC_NULL ((TLR_RESULT)0x00005E01L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_NOT_OPEN. */ +/* */ +#define TLR_E_RCX_HAL_IIC_NOT_OPEN ((TLR_RESULT)0x00005E02L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_PORT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_PORT_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_IIC_PORT_INVALID ((TLR_RESULT)0x00005E03L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_SLAVE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_SLAVE_INVALID. */ +/* */ +#define TLR_E_RCX_HAL_IIC_SLAVE_INVALID ((TLR_RESULT)0x00005E04L) + +/* */ +/* MessageId: TLR_E_RCX_HAL_IIC_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* HAL_IIC_TIMEOUT. */ +/* */ +#define TLR_E_RCX_HAL_IIC_TIMEOUT ((TLR_RESULT)0x00005E05L) + +/* */ +/* MessageId: TLR_E_RCX_MID_NVR_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_NVR_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_NVR_NO_INIT ((TLR_RESULT)0x00006000L) + +/* */ +/* MessageId: TLR_E_RCX_MID_NVR_PORT_LIMIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_NVR_PORT_LIMIT. */ +/* */ +#define TLR_E_RCX_MID_NVR_PORT_LIMIT ((TLR_RESULT)0x00006001L) + +/* */ +/* MessageId: TLR_E_RCX_MID_COM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_COM_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_COM_NO_INIT ((TLR_RESULT)0x00006080L) + +/* */ +/* MessageId: TLR_E_RCX_MID_COM_TASK_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* MID_COM_TASK_FAILED. */ +/* */ +#define TLR_E_RCX_MID_COM_TASK_FAILED ((TLR_RESULT)0x00006081L) + +/* */ +/* MessageId: TLR_E_RCX_MID_STA_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_STA_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_STA_NO_INIT ((TLR_RESULT)0x00006100L) + +/* */ +/* MessageId: TLR_E_RCX_MID_STA_TASK_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* MID_STA_TASK_FAILED. */ +/* */ +#define TLR_E_RCX_MID_STA_TASK_FAILED ((TLR_RESULT)0x00006101L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_FAT_NO_INIT ((TLR_RESULT)0x00006180L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_NOT_FOUND. */ +/* */ +#define TLR_E_RCX_MID_FAT_NOT_FOUND ((TLR_RESULT)0x00006181L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_VOLUME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_VOLUME_INVALID. */ +/* */ +#define TLR_E_RCX_MID_FAT_VOLUME_INVALID ((TLR_RESULT)0x00006182L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FATTYPE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FATTYPE_UNKNOWN. */ +/* */ +#define TLR_E_RCX_MID_FAT_FATTYPE_UNKNOWN ((TLR_RESULT)0x00006183L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_VOLUME_FULL */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_VOLUME_FULL. */ +/* */ +#define TLR_E_RCX_MID_FAT_VOLUME_FULL ((TLR_RESULT)0x00006184L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_ALREADY_EXISTS. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_ALREADY_EXISTS ((TLR_RESULT)0x00006185L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_NOT_FOUND. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_NOT_FOUND ((TLR_RESULT)0x00006186L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_INVALID. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_INVALID ((TLR_RESULT)0x00006187L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_ORIGIN_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_ORIGIN_INVALID. */ +/* */ +#define TLR_E_RCX_MID_FAT_ORIGIN_INVALID ((TLR_RESULT)0x00006188L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_PATH_NOT_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_PATH_NOT_EXISTS. */ +/* */ +#define TLR_E_RCX_MID_FAT_PATH_NOT_EXISTS ((TLR_RESULT)0x00006189L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_PATH_ATTRIBUTE */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_PATH_ATTRIBUTE. */ +/* */ +#define TLR_E_RCX_MID_FAT_PATH_ATTRIBUTE ((TLR_RESULT)0x0000618AL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_DIRECTORY_NOT_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_DIRECTORY_NOT_EMPTY. */ +/* */ +#define TLR_E_RCX_MID_FAT_DIRECTORY_NOT_EMPTY ((TLR_RESULT)0x0000618BL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_END_OF_FILE */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_END_OF_FILE. */ +/* */ +#define TLR_E_RCX_MID_FAT_END_OF_FILE ((TLR_RESULT)0x0000618CL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_DIRECTORY_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_DIRECTORY_ALREADY_EXISTS. */ +/* */ +#define TLR_E_RCX_MID_FAT_DIRECTORY_ALREADY_EXISTS ((TLR_RESULT)0x0000618DL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_NO_FILESYSTEM_INSTALLED */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_NO_FILESYSTEM_INSTALLED. */ +/* */ +#define TLR_E_RCX_MID_FAT_NO_FILESYSTEM_INSTALLED ((TLR_RESULT)0x0000618EL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_VOLUME_NOT_MOUNTED */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_VOLUME_NOT_MOUNTED. */ +/* */ +#define TLR_E_RCX_MID_FAT_VOLUME_NOT_MOUNTED ((TLR_RESULT)0x0000618FL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_IS_DIRECTORY */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_IS_DIRECTORY. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_IS_DIRECTORY ((TLR_RESULT)0x00006190L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_READONLY */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_READONLY. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_READONLY ((TLR_RESULT)0x00006191L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FILE_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FILE_OPEN. */ +/* */ +#define TLR_E_RCX_MID_FAT_FILE_OPEN ((TLR_RESULT)0x00006192L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_FATTABLE_CORRUPT */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_FATTABLE_CORRUPT. */ +/* */ +#define TLR_E_RCX_MID_FAT_FATTABLE_CORRUPT ((TLR_RESULT)0x00006193L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_NO_MORE_RECORD */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_NO_MORE_RECORD. */ +/* */ +#define TLR_E_RCX_MID_FAT_NO_MORE_RECORD ((TLR_RESULT)0x00006194L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_READ_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_READ_ERROR ((TLR_RESULT)0x00006195L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_WRITE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_WRITE_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_WRITE_ERROR ((TLR_RESULT)0x00006196L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_CLUSTER_ALLOC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_CLUSTER_ALLOC_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_CLUSTER_ALLOC_ERROR ((TLR_RESULT)0x00006197L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_CLUSTER_FAT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_CLUSTER_FAT_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_CLUSTER_FAT_ERROR ((TLR_RESULT)0x00006198L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_CLUSTER_CHANGE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_CLUSTER_CHANGE_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_CLUSTER_CHANGE_ERROR ((TLR_RESULT)0x00006199L) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_READ_FAT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_READ_FAT_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_READ_FAT_ERROR ((TLR_RESULT)0x0000619AL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_WRITE_FAT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_WRITE_FAT_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_WRITE_FAT_ERROR ((TLR_RESULT)0x0000619BL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_WRITE_DIR_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_WRITE_DIR_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_WRITE_DIR_ERROR ((TLR_RESULT)0x0000619CL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_READ_DIR_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_READ_DIR_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_READ_DIR_ERROR ((TLR_RESULT)0x0000619DL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_READ_FSINFO_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_READ_FSINFO_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_READ_FSINFO_ERROR ((TLR_RESULT)0x0000619EL) + +/* */ +/* MessageId: TLR_E_RCX_MID_FAT_WRITE_FSINFO_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_FAT_WRITE_FSINFO_ERROR. */ +/* */ +#define TLR_E_RCX_MID_FAT_WRITE_FSINFO_ERROR ((TLR_RESULT)0x0000619FL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_DBM_NO_INIT ((TLR_RESULT)0x00006200L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_NO_SYSVOLUME */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_NO_SYSVOLUME. */ +/* */ +#define TLR_E_RCX_MID_DBM_NO_SYSVOLUME ((TLR_RESULT)0x00006201L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_FILE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_FILE_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_FILE_INVALID ((TLR_RESULT)0x00006202L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_TABLE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_TABLE_UNKNOWN. */ +/* */ +#define TLR_E_RCX_MID_DBM_TABLE_UNKNOWN ((TLR_RESULT)0x00006203L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_HANDLE_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_HANDLE_INVALID ((TLR_RESULT)0x00006204L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_DATASET_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_DATASET_ERROR. */ +/* */ +#define TLR_E_RCX_MID_DBM_DATASET_ERROR ((TLR_RESULT)0x00006205L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_INDEX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_INDEX_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_INDEX_INVALID ((TLR_RESULT)0x00006206L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_UNKNOWN_FILE */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_UNKNOWN_FILE. */ +/* */ +#define TLR_E_RCX_MID_DBM_UNKNOWN_FILE ((TLR_RESULT)0x00006207L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_FNC_ONLY_ON_NEW_DBM */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_FNC_ONLY_ON_NEW_DBM. */ +/* */ +#define TLR_E_RCX_MID_DBM_FNC_ONLY_ON_NEW_DBM ((TLR_RESULT)0x00006208L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_NO_REC0 */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_NO_REC0. */ +/* */ +#define TLR_E_RCX_MID_DBM_NO_REC0 ((TLR_RESULT)0x00006209L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_FNC_NEEDS_LL_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_FNC_NEEDS_LL_TABLE. */ +/* */ +#define TLR_E_RCX_MID_DBM_FNC_NEEDS_LL_TABLE ((TLR_RESULT)0x0000620AL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_INVALID_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_INVALID_PARAM. */ +/* */ +#define TLR_E_RCX_MID_DBM_INVALID_PARAM ((TLR_RESULT)0x0000620BL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_KEY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_KEY_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_KEY_INVALID ((TLR_RESULT)0x0000620CL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_KEY_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_KEY_NOT_FOUND. */ +/* */ +#define TLR_E_RCX_MID_DBM_KEY_NOT_FOUND ((TLR_RESULT)0x0000620DL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_NO_RECORD_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_NO_RECORD_AVAILABLE. */ +/* */ +#define TLR_E_RCX_MID_DBM_NO_RECORD_AVAILABLE ((TLR_RESULT)0x0000620EL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_FNC_NOT_ON_LL */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_FNC_NOT_ON_LL. */ +/* */ +#define TLR_E_RCX_MID_DBM_FNC_NOT_ON_LL ((TLR_RESULT)0x0000620FL) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_UNKNOWN_PROPERTY */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_UNKNOWN_PROPERTY. */ +/* */ +#define TLR_E_RCX_MID_DBM_UNKNOWN_PROPERTY ((TLR_RESULT)0x00006210L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_FNC_NOT_ON_TAB_TYPE1 */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_FNC_NOT_ON_TAB_TYPE1. */ +/* */ +#define TLR_E_RCX_MID_DBM_FNC_NOT_ON_TAB_TYPE1 ((TLR_RESULT)0x00006211L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_CHECKSUM_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_CHECKSUM_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_CHECKSUM_INVALID ((TLR_RESULT)0x00006212L) + +/* */ +/* MessageId: TLR_E_RCX_MID_DBM_BOUNDARY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* MID_DBM_BOUNDARY_INVALID. */ +/* */ +#define TLR_E_RCX_MID_DBM_BOUNDARY_INVALID ((TLR_RESULT)0x00006213L) + +/* */ +/* MessageId: TLR_E_RCX_MID_LED_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_LED_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_LED_NO_INIT ((TLR_RESULT)0x00006280L) + +/* */ +/* MessageId: TLR_E_RCX_MID_SYS_NO_INIT */ +/* */ +/* MessageText: */ +/* */ +/* MID_SYS_NO_INIT. */ +/* */ +#define TLR_E_RCX_MID_SYS_NO_INIT ((TLR_RESULT)0x00006300L) + +/* */ +/* MessageId: TLR_E_RCX_MID_SYS_NO_LINKAGE */ +/* */ +/* MessageText: */ +/* */ +/* MID_SYS_NO_LINKAGE. */ +/* */ +#define TLR_E_RCX_MID_SYS_NO_LINKAGE ((TLR_RESULT)0x00006302L) + +/* */ +/* MessageId: TLR_E_RCX_AAI_OK */ +/* */ +/* MessageText: */ +/* */ +/* AAI_OK. */ +/* */ +#define TLR_E_RCX_AAI_OK ((TLR_RESULT)0x00007FFFL) + +#ifndef __RECORDING_ERROR_H +#define __RECORDING_ERROR_H + +/*****************************************************************************/ +/* Recording Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_RECORDING_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_RECORDING_COMMAND_INVALID ((TLR_RESULT)0xC0A60001L) + + + + +#endif /* __RECORDING_ERROR_H */ + +#ifndef __RPC_ERROR_H +#define __RPC_ERROR_H + + + + +/* ////////////////////////////////////////////////////////////////////////////// */ +/* RPC TASK's ERROR AND DIAGNOSIS - CODES */ +/* ////////////////////////////////////////////////////////////////////////////// */ +/* */ +/* MessageId: TLR_E_RPC_TASK_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Received packet with invalid command. */ +/* */ +#define TLR_E_RPC_TASK_COMMAND_INVALID ((TLR_RESULT)0xC02E0001L) + +/* RPC DIAGNOSIS - CODES */ +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_CLIENT_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initiating CLRPC-Client failed. (CLRPC_Client_Initialize()) */ +/* */ +#define TLR_DIAG_E_RPC_TASK_CLIENT_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC02E0010L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_SERVER_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initiating CLRPC-Server failed (CLRPC_Server_Initialize()). */ +/* */ +#define TLR_DIAG_E_RPC_TASK_SERVER_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC02E0011L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_EPMAP_RESOURCE_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initiating CLRPC-Endpoint-Mapper failed (CLRPC_Mapper_Initialize()). */ +/* */ +#define TLR_DIAG_E_RPC_TASK_EPMAP_RESOURCE_INIT_FAILED ((TLR_RESULT)0xC02E0012L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_INIT_LOCAL_CREATE_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating message queue failed. */ +/* */ +#define TLR_DIAG_E_RPC_TASK_INIT_LOCAL_CREATE_QUE_FAILED ((TLR_RESULT)0xC02E0013L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_INIT_REMOTE_IDENT_EDD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Identifying Drv_EDD failed. */ +/* */ +#define TLR_DIAG_E_RPC_TASK_INIT_REMOTE_IDENT_EDD_FAILED ((TLR_RESULT)0xC02E0014L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_INIT_REMOTE_GET_MAC_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Getting the MAC address failed. */ +/* */ +#define TLR_DIAG_E_RPC_TASK_INIT_REMOTE_GET_MAC_FAILED ((TLR_RESULT)0xC02E0015L) + +/* */ +/* MessageId: TLR_DIAG_E_RPC_TASK_INIT_REMOTE_IDENT_TCPUDP_QUE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Getting queue handle to TCPIP-Task failed. */ +/* */ +#define TLR_DIAG_E_RPC_TASK_INIT_REMOTE_IDENT_TCPUDP_QUE_FAILED ((TLR_RESULT)0xC02E0016L) + +/* GENERIC RPC ERROR - CODES */ +/* */ +/* MessageId: TLR_E_RPC_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Generic RPC-error code. See Profinet-status code for details. */ +/* */ +#define TLR_E_RPC_STATUS ((TLR_RESULT)0xC02E0100L) + +/* */ +/* MessageId: TLR_E_RPC_CONNECT_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* There was not enough memory allocated to receive the whole IO-Device's Connect-Response PDU. Most likely it containes a very large ModuleDiff-Block. */ +/* */ +#define TLR_E_RPC_CONNECT_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0101L) + +/* */ +/* MessageId: TLR_E_RPC_FATAL_ERROR_CLB_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* The fatal error callback function is already registered. */ +/* */ +#define TLR_E_RPC_FATAL_ERROR_CLB_ALREADY_REGISTERED ((TLR_RESULT)0xC02E0102L) + +/* */ +/* MessageId: TLR_E_CLRPC_PACKET_SEND_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending internal message to another task. */ +/* */ +#define TLR_E_CLRPC_PACKET_SEND_FAILED ((TLR_RESULT)0xC02E0200L) + +/* */ +/* MessageId: TLR_E_CLRPC_TIMER_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Creating a TLR-Timer-packet in RPC task failed due to insufficient memory. */ +/* */ +#define TLR_E_CLRPC_TIMER_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0201L) + +/* */ +/* MessageId: TLR_E_CLRPC_REF_COUNTER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The reference counter value is invalid. */ +/* */ +#define TLR_E_CLRPC_REF_COUNTER_INVALID ((TLR_RESULT)0xC02E0202L) + +/* */ +/* MessageId: TLR_E_CLRPC_INVALID_PORT_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* The port handle is invalid. */ +/* */ +#define TLR_E_CLRPC_INVALID_PORT_HANDLE ((TLR_RESULT)0xC02E0203L) + +/* */ +/* MessageId: TLR_E_CLRPC_TIMER_ALREADY_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* The soft timer is already active (expected inactive). */ +/* */ +#define TLR_E_CLRPC_TIMER_ALREADY_ACTIVE ((TLR_RESULT)0xC02E0204L) + +/* RPC ENDPOINT - MAPPER */ +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The parameter "uiMaxReg" (maximum amount of RPC-mapper registrations) is invalid in CLRPC_EPMap_Initialize(). */ +/* */ +#define TLR_E_CLRPC_MAPPER_INIT_FAILED ((TLR_RESULT)0xC02E0300L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The requested Endpoint-Mapper index is invalid. */ +/* */ +#define TLR_E_CLRPC_MAPPER_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC02E0301L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for this request. */ +/* */ +#define TLR_E_CLRPC_MAPPER_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0302L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_STATUS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of Endpoint-Mapper is invalid for this request. */ +/* */ +#define TLR_E_CLRPC_MAPPER_STATUS_INVALID ((TLR_RESULT)0xC02E0303L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_STATUS_CLOSING */ +/* */ +/* MessageText: */ +/* */ +/* The Endpoint-Mapper is waiting for close-confirmation and therefore its status isinvalid for this request. */ +/* */ +#define TLR_E_CLRPC_MAPPER_STATUS_CLOSING ((TLR_RESULT)0xC02E0304L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_STATUS_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* The status of Endpoint-Mapper is unknown. */ +/* */ +#define TLR_E_CLRPC_MAPPER_STATUS_UNKNOWN ((TLR_RESULT)0xC02E0305L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_STATUS_CONFLICT */ +/* */ +/* MessageText: */ +/* */ +/* The status of Endpoint-Mapper is not "Ready" and therefore request CLRPC_EPMap_Deregister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_MAPPER_STATUS_CONFLICT ((TLR_RESULT)0xC02E0306L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_PARAMETER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter in CLRPC_EPMap_Register_req_Compare(). */ +/* */ +#define TLR_E_CLRPC_MAPPER_PARAMETER_FAILED ((TLR_RESULT)0xC02E0307L) + +/* */ +/* MessageId: TLR_E_CLRPC_MAPPER_SERVER_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* CLRPC_EPMap_Deregister_req() is not allowed because at least one RPC-Server is registered to this Endpoint-Mapper. */ +/* */ +#define TLR_E_CLRPC_MAPPER_SERVER_REGISTERED ((TLR_RESULT)0xC02E0308L) + +/* RPC SERVER */ +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* An error occurred in CLRPC_Server_Initialize(). */ +/* */ +#define TLR_E_CLRPC_SERVER_INIT_FAILED ((TLR_RESULT)0xC02E0400L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum number of registered RPC-Servers is exceeded or the maximum number of outstanding requests is exceeded. */ +/* */ +#define TLR_E_CLRPC_SERVER_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC02E0401L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating TLR-Timer for RPC-Server failed. */ +/* */ +#define TLR_E_CLRPC_SERVER_TIMER_CREATE_FAILED ((TLR_RESULT)0xC02E0402L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_NO_SERVER_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* There is no RPC-Server registered that could be deregistered (CLRPC_ServerDeregister_req()). */ +/* */ +#define TLR_E_CLRPC_SERVER_NO_SERVER_REGISTERED ((TLR_RESULT)0xC02E0403L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to create an instance of RPC-Server. */ +/* */ +#define TLR_E_CLRPC_SERVER_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0404L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_MAPPER_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to Endpoint-Mapper in CLRPC_ServerRegister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_SERVER_MAPPER_HANDLE_INVALID ((TLR_RESULT)0xC02E0405L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_MAPPER_STATUS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The status of Endpoint-Mapper in CLRPC_ServerRegister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_SERVER_MAPPER_STATUS_INVALID ((TLR_RESULT)0xC02E0406L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to RPC-Server instance is invalid. */ +/* */ +#define TLR_E_CLRPC_SERVER_HANDLE_INVALID ((TLR_RESULT)0xC02E0407L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_OBJECT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* There is at least one object registered to RPC-Server instance. CLRPC_ServerDeregister_req() can not proceed. */ +/* */ +#define TLR_E_CLRPC_SERVER_OBJECT_REGISTERED ((TLR_RESULT)0xC02E0408L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_PARAM_RECV_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter "ulMaxRecv" in request-packet in CLRPC_ServerRegister_req(). */ +/* */ +#define TLR_E_CLRPC_SERVER_PARAM_RECV_INVALID ((TLR_RESULT)0xC02E0409L) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_PARAM_SEND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter "ulMaxSend" in request-packet in CLRPC_ServerRegister_req(). */ +/* */ +#define TLR_E_CLRPC_SERVER_PARAM_SEND_INVALID ((TLR_RESULT)0xC02E040AL) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_ELEMENT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid RPC-Server element "ptElem". Internal RPC-Error. */ +/* */ +#define TLR_E_CLRPC_SERVER_ELEMENT_INVALID ((TLR_RESULT)0xC02E040BL) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_REQUEST_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* This RPC-Request was cancled. */ +/* */ +#define TLR_E_CLRPC_SERVER_REQUEST_CANCELED ((TLR_RESULT)0xC02E040CL) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_STATE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of RPC server is invalid for this request. */ +/* */ +#define TLR_E_CLRPC_SERVER_STATE_INVALID ((TLR_RESULT)0xC02E040DL) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_ACTIVITY_ALREADY_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* The activity has already been initialized. */ +/* */ +#define TLR_E_CLRPC_SERVER_ACTIVITY_ALREADY_INITIALIZED ((TLR_RESULT)0xC02E040EL) + +/* */ +/* MessageId: TLR_E_CLRPC_SERVER_RECEIVED_INVALID_RSP_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* The RPC server received an invalid (unexpected) resposne packet. */ +/* */ +#define TLR_E_CLRPC_SERVER_RECEIVED_INVALID_RSP_PACKET ((TLR_RESULT)0xC02E040FL) + +/* RPC OBJECT */ +/* */ +/* MessageId: TLR_E_CLRPC_OBJECT_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to create an RPC-Object instance in CLRPC_ObjectRegister_req(). */ +/* */ +#define TLR_E_CLRPC_OBJECT_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0500L) + +/* */ +/* MessageId: TLR_E_CLRPC_OBJECT_SERVER_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to RPC-Server instance in CLRPC_ObjectRegister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_OBJECT_SERVER_HANDLE_INVALID ((TLR_RESULT)0xC02E0501L) + +/* */ +/* MessageId: TLR_E_CLRPC_OBJECT_SERVER_STATUS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The status of RPC-Server instance in CLRPC_ObjectRegister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_OBJECT_SERVER_STATUS_INVALID ((TLR_RESULT)0xC02E0502L) + +/* */ +/* MessageId: TLR_E_CLRPC_OBJECT_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to RPC-Object instance in CLRPC_ObjectDeregister_req() is invalid. */ +/* */ +#define TLR_E_CLRPC_OBJECT_HANDLE_INVALID ((TLR_RESULT)0xC02E0503L) + +/* RPC CLIENT */ +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_INIT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* One of the parameters "uiMaxReg" or "uiMaxReq" in CLRPC_Client_Initialize() is invalid. */ +/* */ +#define TLR_E_CLRPC_CLIENT_INIT_FAILED ((TLR_RESULT)0xC02E0600L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_RESOURCE_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum number of parallel RPC-Client instances in reached in CLRPC_ClientRegister_req() */ +/* */ +#define TLR_E_CLRPC_CLIENT_RESOURCE_LIMIT_EXCEEDED ((TLR_RESULT)0xC02E0601L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Creating the TLR-Timer for RPC-Client instance in CLRPC_ClientRegister_req() failed. */ +/* */ +#define TLR_E_CLRPC_CLIENT_TIMER_CREATE_FAILED ((TLR_RESULT)0xC02E0602L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_RESOURCE_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory for this request. */ +/* */ +#define TLR_E_CLRPC_CLIENT_RESOURCE_OUT_OF_MEMORY ((TLR_RESULT)0xC02E0603L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_MAPPER_STATUS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The state of RPC Client is invalid for this request. */ +/* */ +#define TLR_E_CLRPC_CLIENT_MAPPER_STATUS_INVALID ((TLR_RESULT)0xC02E0604L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The handle to RPC-Client instance is invalid. */ +/* */ +#define TLR_E_CLRPC_CLIENT_HANDLE_INVALID ((TLR_RESULT)0xC02E0605L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_REQUEST_LIMIT_EXCEEDED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum amount of outstanding RPC-Requests for this RPC-Clients instance is reached. */ +/* */ +#define TLR_E_CLRPC_CLIENT_REQUEST_LIMIT_EXCEEDED ((TLR_RESULT)0xC02E0606L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_OPCODE_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* RPC-Client instances can only connect to an IO-Device if there are no outstanding RPC-Requests. Currently at least one RPC-Request is outstanding. */ +/* */ +#define TLR_E_CLRPC_CLIENT_OPCODE_SEQUENCE ((TLR_RESULT)0xC02E0607L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_DEREGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* The RPC-Client instance you tried to use is going to deregister right now. Aborting your Request ! */ +/* */ +#define TLR_E_CLRPC_CLIENT_DEREGISTERED ((TLR_RESULT)0xC02E0608L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_ELEMENT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid RPC-Client instance element "ptElem". Internal RPC-Error. */ +/* */ +#define TLR_E_CLRPC_CLIENT_ELEMENT_INVALID ((TLR_RESULT)0xC02E0609L) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_LONG_TIMEOUT_HIT */ +/* */ +/* MessageText: */ +/* */ +/* The LONG timeout TLR-timer for an outstanding RPC-Request hit. Used internaly in RPC only. */ +/* */ +#define TLR_E_CLRPC_CLIENT_LONG_TIMEOUT_HIT ((TLR_RESULT)0xC02E060AL) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_RESPONSE_SEQUENCE_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid sequence number in RPC-Message received by RPC-Client instance. */ +/* */ +#define TLR_E_CLRPC_CLIENT_RESPONSE_SEQUENCE_NUMBER ((TLR_RESULT)0xC02E060BL) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_CANCEL_TIMED_OUT */ +/* */ +/* MessageText: */ +/* */ +/* Canceling a running request timed out. This RPC Client will no longer be usable. */ +/* */ +#define TLR_E_CLRPC_CLIENT_CANCEL_TIMED_OUT ((TLR_RESULT)0xC02E060CL) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_NO_REQUEST_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* The RPC Client did not have a packet to return. */ +/* */ +#define TLR_E_CLRPC_CLIENT_NO_REQUEST_PACKET ((TLR_RESULT)0xC02E060DL) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_RECV_REQ_WITH_UNEXPECTED_FLAG */ +/* */ +/* MessageText: */ +/* */ +/* The RPC Client received a request with an unexpected Flag value. */ +/* */ +#define TLR_E_CLRPC_CLIENT_RECV_REQ_WITH_UNEXPECTED_FLAG ((TLR_RESULT)0xC02E060EL) + +/* */ +/* MessageId: TLR_E_CLRPC_CLIENT_ABORTED_BY_UNBIND_REQ */ +/* */ +/* MessageText: */ +/* */ +/* The request was aborted because the RPC client was unbind. */ +/* */ +#define TLR_E_CLRPC_CLIENT_ABORTED_BY_UNBIND_REQ ((TLR_RESULT)0xC02E060FL) + +/* */ +/* MessageId: TLR_E_CLRPC_MAX_ACTIVITY_RESEND_RETRY_REACHED */ +/* */ +/* MessageText: */ +/* */ +/* The maximum resend number was reached by the activity. */ +/* */ +#define TLR_E_CLRPC_MAX_ACTIVITY_RESEND_RETRY_REACHED ((TLR_RESULT)0xC02E0610L) + + + + +#endif /* __RPC_ERROR_H */ + +#ifndef __SERCOS_SL_ERROR_H +#define __SERCOS_SL_ERROR_H + +/*****************************************************************************/ +/* Sercos3 Slave Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOS_SL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_SERCOS_SL_COMMAND_INVALID ((TLR_RESULT)0xC04B0001L) + + + + +#endif /* __SERCOS_SL_ERROR_H */ + +#ifndef __SERCOSIII_API_ERROR_H +#define __SERCOSIII_API_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_API_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_SERCOSIII_API_COMMAND_INVALID ((TLR_RESULT)0xC0340001L) + + + + +#endif /* __SERCOSIII_API_ERROR_H */ + +#ifndef __SERCOSIII_CYCLIC_ERROR_H +#define __SERCOSIII_CYCLIC_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_CYCLIC_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_SERCOSIII_CYCLIC_COMMAND_INVALID ((TLR_RESULT)0xC0370001L) + + + + +#endif /* __SERCOSIII_CYCLIC_ERROR_H */ + +#ifndef __SERCOSIII_DL_ERROR_H +#define __SERCOSIII_DL_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_DL_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_SERCOSIII_DL_COMMAND_INVALID ((TLR_RESULT)0xC0350001L) + + + + +#endif /* __SERCOSIII_DL_ERROR_H */ + +#ifndef __SERCOSIII_ETH_ERROR_H +#define __SERCOSIII_ETH_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_ETH_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_SERCOSIII_ETH_COMMAND_INVALID ((TLR_RESULT)0xC0360001L) + +/* */ +/* MessageId: TLR_E_SIII_SL_NRT_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid startup parameters. */ +/* */ +#define TLR_E_SIII_SL_NRT_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0360002L) + +/* */ +/* MessageId: TLR_E_SIII_SL_NRT_LLD_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* Link Layer Driver not started. */ +/* */ +#define TLR_E_SIII_SL_NRT_LLD_NOT_STARTED ((TLR_RESULT)0xC0360003L) + + + + +#endif /* __SERCOSIII_ETH_ERROR_H */ + +#ifndef __SERCOSIII_SL_IDN_ERROR_H +#define __SERCOSIII_SL_IDN_ERROR_H + +/*****************************************************************************/ +/* SercosIII Slave IDN error codes */ +/*****************************************************************************/ +/* Range 0x1000-0x7FFF is reserved for SVC error mapping */ +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_COMMAND_INVALID ((TLR_RESULT)0xC0850001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* IDN already exists. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ALREADY_EXISTS ((TLR_RESULT)0xC0850004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid attribute specified. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_INVALID ((TLR_RESULT)0xC0850005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INVALID_MAX_DATA_SIZE_SPECIFIED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid max data size specified. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INVALID_MAX_DATA_SIZE_SPECIFIED ((TLR_RESULT)0xC0850006L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_SLAVE_INDEX_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Slave index invalid. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_SLAVE_INDEX_INVALID ((TLR_RESULT)0xC0850007L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNDEFINED_NOTIFY_ALREADY_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Undefined notify already in use. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNDEFINED_NOTIFY_ALREADY_IN_USE ((TLR_RESULT)0xC0850008L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INVALID_ELEMENT_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid element id. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INVALID_ELEMENT_ID ((TLR_RESULT)0xC0850009L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_APP_PACKET_RESPONSE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Application's Response Packet invalid. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_APP_PACKET_RESPONSE_INVALID ((TLR_RESULT)0xC085000AL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_APP_TRANSFER_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Application's Transfer Data too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_APP_TRANSFER_TOO_LONG ((TLR_RESULT)0xC085000BL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_APP_TRANSFER_LENGTH_WRONG */ +/* */ +/* MessageText: */ +/* */ +/* Application's Transfer Data length is invalid. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_APP_TRANSFER_LENGTH_WRONG ((TLR_RESULT)0xC085000CL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_APP_MTU_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Application's MTU is too low. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_APP_MTU_TOO_LOW ((TLR_RESULT)0xC085000DL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INVALID_DEST_ID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid DestId. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INVALID_DEST_ID ((TLR_RESULT)0xC085000EL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_LISTS_CANNOT_HAVE_A_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Lists cannot have a minimum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_LISTS_CANNOT_HAVE_A_MINIMUM_VALUE ((TLR_RESULT)0xC085000FL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_LISTS_CANNOT_HAVE_A_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Lists cannot have a maximum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_LISTS_CANNOT_HAVE_A_MAXIMUM_VALUE ((TLR_RESULT)0xC0850010L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NAME_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Name exceeds allocated length. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NAME_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0850011L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNIT_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Unit exceeds allocated length. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNIT_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0850012L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* OpData exceeds allocated length. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0850013L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INVALID_MAX_LIST_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid max list length. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INVALID_MAX_LIST_LENGTH ((TLR_RESULT)0xC0850014L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_DEFAULT_VALUE_EXCEEDS_ALLOCATED_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Default value exceeds allocated length. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_DEFAULT_VALUE_EXCEEDS_ALLOCATED_LENGTH ((TLR_RESULT)0xC0850015L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MINIMUM_AND_MAXIMUM_VALUE_MUST_BE_USED_TOGETHER */ +/* */ +/* MessageText: */ +/* */ +/* Minimum and maximum value must be used together. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MINIMUM_AND_MAXIMUM_VALUE_MUST_BE_USED_TOGETHER ((TLR_RESULT)0xC0850016L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_USER_APPLICATION_TRANSFER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* User application transfer error. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_USER_APPLICATION_TRANSFER_ERROR ((TLR_RESULT)0xC0850017L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INTERNALLY_HANDLED_IDN */ +/* */ +/* MessageText: */ +/* */ +/* IDN is internally handled. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INTERNALLY_HANDLED_IDN ((TLR_RESULT)0xC0850018L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NO_IDN */ +/* */ +/* MessageText: */ +/* */ +/* IDN not available. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NO_IDN ((TLR_RESULT)0xC0851001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_INVALID_ACCESS_TO_ELEMENT_1 */ +/* */ +/* MessageText: */ +/* */ +/* Invalid access to element 1. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_INVALID_ACCESS_TO_ELEMENT_1 ((TLR_RESULT)0xC0851009L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NO_NAME */ +/* */ +/* MessageText: */ +/* */ +/* No Name. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NO_NAME ((TLR_RESULT)0xC0852001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NAME_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Name transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NAME_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0852002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NAME_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Name transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NAME_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0852003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NAME_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Name cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NAME_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0852004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NAME_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Name is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NAME_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0852005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Attribute transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0853002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Attribute transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0853003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Attribute cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0853004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Attribute is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_ATTRIBUTE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0853005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NO_UNIT */ +/* */ +/* MessageText: */ +/* */ +/* No unit. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NO_UNIT ((TLR_RESULT)0xC0854001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNIT_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Unit transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNIT_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0854002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNIT_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Unit transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNIT_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0854003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNIT_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Unit cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNIT_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0854004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_UNIT_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Unit is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_UNIT_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0854005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NO_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* No minimum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NO_MINIMUM_VALUE ((TLR_RESULT)0xC0855001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0855002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0855003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0855004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Minimum value is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MINIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0855005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_NO_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* No maximum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_NO_MAXIMUM_VALUE ((TLR_RESULT)0xC0856001L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0856002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0856003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0856004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Maximum value is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_MAXIMUM_VALUE_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0856005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_TRANSMISSION_IS_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Operation data transmision is too short. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_TRANSMISSION_IS_TOO_SHORT ((TLR_RESULT)0xC0857002L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_TRANSMISSION_IS_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Operation data transmision is too long. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_TRANSMISSION_IS_TOO_LONG ((TLR_RESULT)0xC0857003L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_CANNOT_BE_CHANGED */ +/* */ +/* MessageText: */ +/* */ +/* Operation data cannot be changed (read only). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_CANNOT_BE_CHANGED ((TLR_RESULT)0xC0857004L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at this time. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_THIS_TIME ((TLR_RESULT)0xC0857005L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_LOWER_THAN_MINIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is lower than Minimum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_LOWER_THAN_MINIMUM_VALUE ((TLR_RESULT)0xC0857006L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_HIGHER_THAN_MAXIMUM_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is higher than Maximum value. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_HIGHER_THAN_MAXIMUM_VALUE ((TLR_RESULT)0xC0857007L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid operation data. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_INVALID ((TLR_RESULT)0xC0857008L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_BY_PASSWORD */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected by password. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_BY_PASSWORD ((TLR_RESULT)0xC0857009L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_DUE_CYCLICALLY_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected. It is configured cyclically. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_DUE_CYCLICALLY_CONFIGURED ((TLR_RESULT)0xC085700AL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_INVALID_INDIRECT_ADDRESSING */ +/* */ +/* MessageText: */ +/* */ +/* Invalid indirect addressing. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_INVALID_INDIRECT_ADDRESSING ((TLR_RESULT)0xC085700BL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_DUE_OTHER_SETTINGS */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected due other settings. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_DUE_OTHER_SETTINGS ((TLR_RESULT)0xC085700CL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_INVALID_FLOATING_POINT_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid floating point number. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_INVALID_FLOATING_POINT_NUMBER ((TLR_RESULT)0xC085700DL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_PARAMETERIZATION_LEVEL */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at parameterization level. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_PARAMETERIZATION_LEVEL ((TLR_RESULT)0xC085700EL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_OPERATION_LEVEL */ +/* */ +/* MessageText: */ +/* */ +/* Operation data is write protected at operation level. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_IS_WRITE_PROTECTED_AT_OPERATION_LEVEL ((TLR_RESULT)0xC085700FL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_ALREADY_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Procedure command already active. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_ALREADY_ACTIVE ((TLR_RESULT)0xC0857010L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_INTERRUPTIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Procedure command not interruptible. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_INTERRUPTIBLE ((TLR_RESULT)0xC0857011L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_AT_THIS_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Procedure Command is not executable at this time (e.g. wrong slave state). */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_AT_THIS_TIME ((TLR_RESULT)0xC0857012L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_INVALID_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* Procedure Command is not executable due invalid parameters. */ +/* */ +#define TLR_E_SERCOSIII_SL_IDN_OPDATA_PROCEDURE_COMMAND_NOT_EXECUTABLE_INVALID_PARAM ((TLR_RESULT)0xC0857013L) + + + + +#endif /* __SERCOSIII_IDN_ERROR_H */ + +#ifndef __SERCOSIII_MA_AP_ERROR_H +#define __SERCOSIII_MA_AP_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SIII_MA_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command value. */ +/* */ +#define TLR_E_SIII_MA_AP_COMMAND_INVALID ((TLR_RESULT)0xC0720001L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_SIII_MA_AP_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0720002L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_MDT_PROCESS_DATA_IMAGE_SIZE_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Output Process Data Image Size not possible (MDT). */ +/* */ +#define TLR_E_SIII_MA_AP_MDT_PROCESS_DATA_IMAGE_SIZE_NOT_POSSIBLE ((TLR_RESULT)0xC0720003L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_AT_PROCESS_DATA_IMAGE_SIZE_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Input Process Data Image Size not possible (AT). */ +/* */ +#define TLR_E_SIII_MA_AP_AT_PROCESS_DATA_IMAGE_SIZE_NOT_POSSIBLE ((TLR_RESULT)0xC0720004L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_LLD_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* SercosIII Low Level Driver not started. */ +/* */ +#define TLR_E_SIII_MA_AP_LLD_NOT_STARTED ((TLR_RESULT)0xC0720005L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_SET_PHASE_NOT_ALLOWED_DURING_CFG_LOADING */ +/* */ +/* MessageText: */ +/* */ +/* Set Phase command not allowed during configuration loading. */ +/* */ +#define TLR_E_SIII_MA_AP_SET_PHASE_NOT_ALLOWED_DURING_CFG_LOADING ((TLR_RESULT)0xC0720006L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_PACKET_CFG_INTERFACE_NOT_AVAILABLE_DURING_CFG_LOADING */ +/* */ +/* MessageText: */ +/* */ +/* Configuration via packets is not available during configuration loading. */ +/* */ +#define TLR_E_SIII_MA_AP_PACKET_CFG_INTERFACE_NOT_AVAILABLE_DURING_CFG_LOADING ((TLR_RESULT)0xC0720007L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_C1D_DIAGNOSIS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* C1D Diagnosis Error. */ +/* */ +#define TLR_E_SIII_MA_AP_C1D_DIAGNOSIS_ERROR ((TLR_RESULT)0xC0720008L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_BUS_SYNC_ERROR_THRESHOLD */ +/* */ +/* MessageText: */ +/* */ +/* Bus Sync Error Threshold reached. */ +/* */ +#define TLR_E_SIII_MA_AP_BUS_SYNC_ERROR_THRESHOLD ((TLR_RESULT)0xC0720009L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CHANNEL_INIT */ +/* */ +/* MessageText: */ +/* */ +/* Channel-Init detected. */ +/* */ +#define TLR_E_SIII_MA_AP_CHANNEL_INIT ((TLR_RESULT)0xC072000AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CPX_CP0_DEV_STATUS_INVALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CPx -> CP0 Dev Status Invalid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CPX_CP0_DEV_STATUS_INVALID_TIMEOUT ((TLR_RESULT)0xC072000BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP1_CP2_DEV_STATUS_INVALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP1 -> CP2 Dev Status Invalid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP1_CP2_DEV_STATUS_INVALID_TIMEOUT ((TLR_RESULT)0xC072000CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP2_CP3_DEV_STATUS_INVALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP2 -> CP3 Dev Status Invalid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP2_CP3_DEV_STATUS_INVALID_TIMEOUT ((TLR_RESULT)0xC072000DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP3_CP4_DEV_STATUS_INVALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP3 -> CP4 Dev Status Invalid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP3_CP4_DEV_STATUS_INVALID_TIMEOUT ((TLR_RESULT)0xC072000EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP1_DEV_STATUS_VALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP1 Dev Status Valid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP1_DEV_STATUS_VALID_TIMEOUT ((TLR_RESULT)0xC072000FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP2_DEV_STATUS_VALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP2 Dev Status Valid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP2_DEV_STATUS_VALID_TIMEOUT ((TLR_RESULT)0xC0720010L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP3_DEV_STATUS_VALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP3 Dev Status Valid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP3_DEV_STATUS_VALID_TIMEOUT ((TLR_RESULT)0xC0720011L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP4_DEV_STATUS_VALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP4 Dev Status Valid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP4_DEV_STATUS_VALID_TIMEOUT ((TLR_RESULT)0xC0720012L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP3_TIMING_CONFIGURATION_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* CP3 Timing Configuration Error. */ +/* */ +#define TLR_E_SIII_MA_AP_CP3_TIMING_CONFIGURATION_ERROR ((TLR_RESULT)0xC0720013L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CP0_CP1_TOPO_ADDR_INVALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* CP0 -> CP1 Topology Address Invalid Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_CP0_CP1_TOPO_ADDR_INVALID_TIMEOUT ((TLR_RESULT)0xC0720014L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_UNKNOWN_STATE_CHG_STOPPED_REASON */ +/* */ +/* MessageText: */ +/* */ +/* Unknown State Change Stopped Reason. */ +/* */ +#define TLR_E_SIII_MA_AP_UNKNOWN_STATE_CHG_STOPPED_REASON ((TLR_RESULT)0xC0720015L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_INITCMD_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Service channel access failed (InitCmd). */ +/* */ +#define TLR_E_SIII_MA_AP_INITCMD_ERROR ((TLR_RESULT)0xC0720016L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_CONN_LENGTH_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Connection Length mismatch. */ +/* */ +#define TLR_E_SIII_MA_AP_CONN_LENGTH_ERROR ((TLR_RESULT)0xC0720017L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_S_0_127_COMMAND_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* S-0-127 Command execution ended with error. */ +/* */ +#define TLR_E_SIII_MA_AP_S_0_127_COMMAND_ERROR ((TLR_RESULT)0xC0720018L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_S_0_128_COMMAND_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* S-0-128 Command execution ended with error. */ +/* */ +#define TLR_E_SIII_MA_AP_S_0_128_COMMAND_ERROR ((TLR_RESULT)0xC0720019L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_S_0_1024_COMMAND_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* S-0-1024 Command execution ended with error. */ +/* */ +#define TLR_E_SIII_MA_AP_S_0_1024_COMMAND_ERROR ((TLR_RESULT)0xC072001AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_MDT_NOT_EXCHANGED */ +/* */ +/* MessageText: */ +/* */ +/* MDT not exchanged. */ +/* */ +#define TLR_E_SIII_MA_AP_MDT_NOT_EXCHANGED ((TLR_RESULT)0xC072001BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_AT_NOT_EXCHANGED */ +/* */ +/* MessageText: */ +/* */ +/* AT not exchanged. */ +/* */ +#define TLR_E_SIII_MA_AP_AT_NOT_EXCHANGED ((TLR_RESULT)0xC072001CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_FRAME_LOSS */ +/* */ +/* MessageText: */ +/* */ +/* Frame loss. */ +/* */ +#define TLR_E_SIII_MA_AP_FRAME_LOSS ((TLR_RESULT)0xC072001DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_EXT_TRIGGER_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* No signal on External Trigger input within timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_EXT_TRIGGER_TIMEOUT ((TLR_RESULT)0xC072001EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_EXT_TRIGGER_LOSS */ +/* */ +/* MessageText: */ +/* */ +/* Signal lost on External Trigger input. */ +/* */ +#define TLR_E_SIII_MA_AP_EXT_TRIGGER_LOSS ((TLR_RESULT)0xC072001FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_ALL_SLAVES_LOST */ +/* */ +/* MessageText: */ +/* */ +/* All slaves lost. */ +/* */ +#define TLR_E_SIII_MA_AP_ALL_SLAVES_LOST ((TLR_RESULT)0xC0720020L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_BUS_SCAN_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan Timeout. */ +/* */ +#define TLR_E_SIII_MA_AP_BUS_SCAN_TIMEOUT ((TLR_RESULT)0xC0720021L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_INTERNAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Internal Error detected. */ +/* */ +#define TLR_E_SIII_MA_AP_INTERNAL_ERROR ((TLR_RESULT)0xC0720022L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_S_0_1050_X_5_CONN_LENGTH_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Connection Length could not be read due to incorrect configuration. */ +/* */ +#define TLR_E_SIII_MA_AP_S_0_1050_X_5_CONN_LENGTH_READ_ERROR ((TLR_RESULT)0xC0720023L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_OPENING_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing Tag does not match opening tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_OPENING_TAG ((TLR_RESULT)0xC0724000L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_NUMBER_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in number field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_NUMBER_FIELD ((TLR_RESULT)0xC0724001L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_NUMBER_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in number field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_NUMBER_FIELD ((TLR_RESULT)0xC0724002L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_NUMBER_FIELD_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match number field tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_NUMBER_FIELD_TAG ((TLR_RESULT)0xC0724003L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_NUMBER_FIELD_IS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Number Field is invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_NUMBER_FIELD_IS_INVALID ((TLR_RESULT)0xC0724004L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_STRING_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in string field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_STRING_FIELD ((TLR_RESULT)0xC0724005L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STRING_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in string field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STRING_FIELD ((TLR_RESULT)0xC0724006L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STRING_FIELD_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match string field tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STRING_FIELD_TAG ((TLR_RESULT)0xC0724007L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_DATA_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in data field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_DATA_FIELD ((TLR_RESULT)0xC0724008L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_DATA_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in data field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_DATA_FIELD ((TLR_RESULT)0xC0724009L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_DATA_FIELD_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match data field tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_DATA_FIELD_TAG ((TLR_RESULT)0xC072400AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DATA_FIELD_IS_NOT_A_HEX_STRING */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Data field is not a hex string. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DATA_FIELD_IS_NOT_A_HEX_STRING ((TLR_RESULT)0xC072400BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SIIICFG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in SIIICfg block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SIIICFG_BLOCK ((TLR_RESULT)0xC072400CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SIIICFG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected tag in SIIICfg block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SIIICFG_BLOCK ((TLR_RESULT)0xC072400DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_CLOSING_TAG_IN_SIIICFG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected closing tag in SIIICfg block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_CLOSING_TAG_IN_SIIICFG_BLOCK ((TLR_RESULT)0xC072400EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_TAG_IN_SIIICFG_BLOCK_SLAVE_PART */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected closing tag in SIIICfg block (Slave Part). */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_TAG_IN_SIIICFG_BLOCK_SLAVE_PART ((TLR_RESULT)0xC072400FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SIIICFG_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match SIIICfg tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SIIICFG_TAG ((TLR_RESULT)0xC0724010L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_FILE_IS_NOT_A_SIIICFG_XML */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: XML file does not contain a SIIICfg xml. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_FILE_IS_NOT_A_SIIICFG_XML ((TLR_RESULT)0xC0724011L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STD_PARAMS_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected tag in std_params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STD_PARAMS_MASTER_BLOCK ((TLR_RESULT)0xC0724012L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_STD_PARAMS_MASTER_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Incomplete std_params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_STD_PARAMS_MASTER_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724013L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_STD_PARAMS_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in std_params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_STD_PARAMS_MASTER_BLOCK ((TLR_RESULT)0xC0724014L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STD_PARAMS_MASTER_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match std_params_master tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STD_PARAMS_MASTER_TAG ((TLR_RESULT)0xC0724015L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_PARAMS_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_PARAMS_MASTER_BLOCK ((TLR_RESULT)0xC0724016L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_PARAMS_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_PARAMS_MASTER_BLOCK ((TLR_RESULT)0xC0724017L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_PARAMS_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_PARAMS_MASTER_BLOCK ((TLR_RESULT)0xC0724018L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_PARAMS_MASTER_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match params_master tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_PARAMS_MASTER_TAG ((TLR_RESULT)0xC0724019L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_PARAMS_MASTER_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Incomplete params_master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_PARAMS_MASTER_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC072401AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SYS_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in sys_idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SYS_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC072401BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SYS_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in sys_idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SYS_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC072401CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SYS_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in sys_idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SYS_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC072401DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SYS_IDN_ENTRY_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match sys_idn_entry tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SYS_IDN_ENTRY_TAG ((TLR_RESULT)0xC072401EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_SYS_IDN_ENTRY_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Incomplete sys_idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_SYS_IDN_ENTRY_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC072401FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SYS_GLOBAL_IDNS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SYS_GLOBAL_IDNS_BLOCK ((TLR_RESULT)0xC0724020L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SYS_GLOBAL_IDNS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SYS_GLOBAL_IDNS_BLOCK ((TLR_RESULT)0xC0724021L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SYS_GLOBAL_IDNS_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match sys_global_idns tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SYS_GLOBAL_IDNS_TAG ((TLR_RESULT)0xC0724022L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_SYS_GLOBAL_IDNS_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Incomplete sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_SYS_GLOBAL_IDNS_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724023L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_MASTER_BLOCK ((TLR_RESULT)0xC0724024L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_MASTER_BLOCK ((TLR_RESULT)0xC0724025L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_MASTER_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match master tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_MASTER_TAG ((TLR_RESULT)0xC0724026L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_MASTER_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Incomplete master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_MASTER_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724027L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_MASTER_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in master block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_MASTER_BLOCK ((TLR_RESULT)0xC0724028L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in telegram assignment block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK ((TLR_RESULT)0xC0724029L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in telegram assignment block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK ((TLR_RESULT)0xC072402AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in telegram assignment block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_TELEGRAM_ASSIGNMENT_BLOCK ((TLR_RESULT)0xC072402BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_TELEGRAM_ASSIGNMENT_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match telegram assignment tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_TELEGRAM_ASSIGNMENT_TAG ((TLR_RESULT)0xC072402CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_TELEGRAM_ASSIGNMENT_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: telegram assignment block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_TELEGRAM_ASSIGNMENT_IS_INCOMPLETE ((TLR_RESULT)0xC072402DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STD_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in std_params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_STD_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC072402EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_STD_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in std_params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_STD_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC072402FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_STD_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in std_params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_STD_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC0724030L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STD_PARAMS_SLAVE_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match std_params_slave tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_STD_PARAMS_SLAVE_TAG ((TLR_RESULT)0xC0724031L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_STD_PARAMS_SLAVE_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: std_params_slave block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_STD_PARAMS_SLAVE_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724032L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC0724033L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC0724034L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_PARAMS_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in params_slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_PARAMS_SLAVE_BLOCK ((TLR_RESULT)0xC0724035L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_PARAMS_SLAVE_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match params_slave tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_PARAMS_SLAVE_TAG ((TLR_RESULT)0xC0724036L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_PARAMS_SLAVE_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: params_slave block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_PARAMS_SLAVE_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724037L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_SLAVE_BLOCK ((TLR_RESULT)0xC0724038L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_SLAVE_BLOCK ((TLR_RESULT)0xC0724039L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SLAVE_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in slave block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SLAVE_BLOCK ((TLR_RESULT)0xC072403AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SLAVE_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match slave tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_SLAVE_TAG ((TLR_RESULT)0xC072403BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_SLAVE_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: slave block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_SLAVE_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC072403CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_ENTRY_DATA_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_ENTRY_DATA_BLOCK ((TLR_RESULT)0xC072403DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_ENTRY_DATA_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_ENTRY_DATA_BLOCK ((TLR_RESULT)0xC072403EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_IDN_ENTRY_DATA_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_IDN_ENTRY_DATA_BLOCK ((TLR_RESULT)0xC072403FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_ENTRY_DATA_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match idn_entry tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_ENTRY_DATA_TAG ((TLR_RESULT)0xC0724040L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_DATA_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: idn_entry block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_DATA_IS_INCOMPLETE ((TLR_RESULT)0xC0724041L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_HAS_INVALID_ATTRIBUTE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: idn_entry block has invalid attribute. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_HAS_INVALID_ATTRIBUTE ((TLR_RESULT)0xC0724042L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ENTRY_DATA_BLOCK_HAS_INVALID_DATA */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: idn_entry block has invalid data. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ENTRY_DATA_BLOCK_HAS_INVALID_DATA ((TLR_RESULT)0xC0724043L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ENTRY_DATA_BLOCK_CONTAINS_NON_HEX_DIGIT_CHARACTERS */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: idn_entry block contains non-hex digit characters. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ENTRY_DATA_BLOCK_CONTAINS_NON_HEX_DIGIT_CHARACTERS ((TLR_RESULT)0xC0724044L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC0724045L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC0724046L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC0724047L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_ENTRY_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match idn_entry tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_ENTRY_TAG ((TLR_RESULT)0xC0724048L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: idn_entry block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ENTRY_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724049L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SEQUENCE_OF_TAGS_IN_IDN_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected sequence of tags in idn_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SEQUENCE_OF_TAGS_IN_IDN_ENTRY_BLOCK ((TLR_RESULT)0xC072404AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in idn_config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_IDN_CONFIG_BLOCK ((TLR_RESULT)0xC072404BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in idn_config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_IDN_CONFIG_BLOCK ((TLR_RESULT)0xC072404CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_CONFIG_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match idn_config tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_IDN_CONFIG_TAG ((TLR_RESULT)0xC072404DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONNECTION_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in connection_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONNECTION_ENTRY_BLOCK ((TLR_RESULT)0xC072404EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONNECTION_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in connection_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONNECTION_ENTRY_BLOCK ((TLR_RESULT)0xC072404FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_CONNECTION_ENTRY_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in connection_entry block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_CONNECTION_ENTRY_BLOCK ((TLR_RESULT)0xC0724050L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONNECTION_ENTRY_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match connection_entry tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONNECTION_ENTRY_TAG ((TLR_RESULT)0xC0724051L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_ENTRY_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: connection_entry block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_ENTRY_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC0724052L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONNECTIONS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in connections block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONNECTIONS_BLOCK ((TLR_RESULT)0xC0724053L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONNECTIONS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in connections block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONNECTIONS_BLOCK ((TLR_RESULT)0xC0724054L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONNECTIONS_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match connections tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONNECTIONS_TAG ((TLR_RESULT)0xC0724055L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected single tag in config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SINGLE_TAG_IN_CONFIG_BLOCK ((TLR_RESULT)0xC0724056L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected opening tag in config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_OPENING_TAG_IN_CONFIG_BLOCK ((TLR_RESULT)0xC0724057L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_CONFIG_BLOCK ((TLR_RESULT)0xC0724058L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONFIG_TAG */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Closing tag does not match config tag. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CLOSING_TAG_DOES_NOT_MATCH_CONFIG_TAG ((TLR_RESULT)0xC0724059L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONFIG_BLOCK_IS_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: config block is incomplete. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONFIG_BLOCK_IS_INCOMPLETE ((TLR_RESULT)0xC072405AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNEXPECTED_SEQUENCE_OF_TAGS_IN_CONFIG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unexpected sequence of tags in config block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNEXPECTED_SEQUENCE_OF_TAGS_IN_CONFIG_BLOCK ((TLR_RESULT)0xC072405BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_DATA_LENGTH_OF_SYS_IDN_ENTRY */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Data Length of Sys Idn Entry. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_DATA_LENGTH_OF_SYS_IDN_ENTRY ((TLR_RESULT)0xC072405CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SYS_GLOBAL_IDNS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Duplicate tag in sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_DUPLICATE_TAG_IN_SYS_GLOBAL_IDNS_BLOCK ((TLR_RESULT)0xC072405DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_UNSUPPORTED_IDN_IN_SYS_GLOBAL_IDNS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Unsupported IDN in sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_UNSUPPORTED_IDN_IN_SYS_GLOBAL_IDNS_BLOCK ((TLR_RESULT)0xC072405EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_IDN_DATA_IN_SYS_GLOBAL_IDNS_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid IDN data in sys_global_idns block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_IDN_DATA_IN_SYS_GLOBAL_IDNS_BLOCK ((TLR_RESULT)0xC072405FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_TELEGRAM_NUMBER_IN_TELEGRAM_ASSIGNMENT */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Telegram Number in Telegram Assignment. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_TELEGRAM_NUMBER_IN_TELEGRAM_ASSIGNMENT ((TLR_RESULT)0xC0724060L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_TELEGRAM_OFFSET_IN_TELEGRAM_ASSIGNMENT */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Telegram Offset in Telegram Assignment. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_TELEGRAM_OFFSET_IN_TELEGRAM_ASSIGNMENT ((TLR_RESULT)0xC0724061L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_ACTIVE_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Value in Active Field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_ACTIVE_FIELD ((TLR_RESULT)0xC0724062L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_SERCOS_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid SERCOS Address in Configuration. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_SERCOS_ADDRESS ((TLR_RESULT)0xC0724063L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_HOTPLUG_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Value in Hot Plug Field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_HOTPLUG_FIELD ((TLR_RESULT)0xC0724064L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_NRT_SUPPORT_FIELD */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid Value in NRT Support Field. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_VALUE_IN_NRT_SUPPORT_FIELD ((TLR_RESULT)0xC0724065L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_DATA_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: IDN Data Length invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_DATA_LENGTH_INVALID ((TLR_RESULT)0xC0724066L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_PHASE_TRANSITION_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: IDN Phase Transition invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_PHASE_TRANSITION_INVALID ((TLR_RESULT)0xC0724067L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_IDN_ELEMENT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: IDN Element invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_IDN_ELEMENT_INVALID ((TLR_RESULT)0xC0724068L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_NUMBER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection Number invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_NUMBER_INVALID ((TLR_RESULT)0xC0724069L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection Telegram Offset invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_OFFSET_INVALID ((TLR_RESULT)0xC072406AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_NUMBER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection Telegram Number invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_NUMBER_INVALID ((TLR_RESULT)0xC072406BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection Telegram Type invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_TELEGRAM_TYPE_INVALID ((TLR_RESULT)0xC072406CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_LENGTH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection Length invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_LENGTH_INVALID ((TLR_RESULT)0xC072406DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_RTDATA_DPM_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection RtData DPM Offset invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_RTDATA_DPM_OFFSET_INVALID ((TLR_RESULT)0xC072406EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_CONNECTION_CCTRL_DPM_OFFSET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Connection CCtrl DPM Offset invalid. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_CONNECTION_CCTRL_DPM_OFFSET_INVALID ((TLR_RESULT)0xC072406FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_XML_INVALID_SEQUENCE_OF_TAGS_IN_SIIICFG_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* XML structure: Invalid sequence of tags in SIIICfg Block. */ +/* */ +#define TLR_E_SIII_MA_AP_XML_INVALID_SEQUENCE_OF_TAGS_IN_SIIICFG_BLOCK ((TLR_RESULT)0xC0724070L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_AT_LEAST_ONE_SLAVE_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* At least one slave is missing. */ +/* */ +#define TLR_E_SIII_MA_AP_AT_LEAST_ONE_SLAVE_MISSING ((TLR_RESULT)0xC0724071L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_BUS_IS_SPLIT_IN_TWO_LINES */ +/* */ +/* MessageText: */ +/* */ +/* Bus is split in two lines. */ +/* */ +#define TLR_E_SIII_MA_AP_BUS_IS_SPLIT_IN_TWO_LINES ((TLR_RESULT)0xC0724072L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_NO_SLAVES_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* No slaves connected. */ +/* */ +#define TLR_E_SIII_MA_AP_NO_SLAVES_CONNECTED ((TLR_RESULT)0xC0724073L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_UNCONFIGURED_SLAVE_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* At least one unconfigured slave detected. */ +/* */ +#define TLR_E_SIII_MA_AP_UNCONFIGURED_SLAVE_DETECTED ((TLR_RESULT)0xC0724074L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_DUPLICATE_SERCOS_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Duplicate SERCOS address detected. */ +/* */ +#define TLR_E_SIII_MA_AP_DUPLICATE_SERCOS_ADDRESS ((TLR_RESULT)0xC0724075L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_INVALID_SERCOS_ADDRESS_DETECTED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid SERCOS address detected. */ +/* */ +#define TLR_E_SIII_MA_AP_INVALID_SERCOS_ADDRESS_DETECTED ((TLR_RESULT)0xC0724076L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_SVCH_ERROR_ON_SLAVE */ +/* */ +/* MessageText: */ +/* */ +/* Service channel access on one slave ended with error. */ +/* */ +#define TLR_E_SIII_MA_AP_SVCH_ERROR_ON_SLAVE ((TLR_RESULT)0xC0724077L) + +/* */ +/* MessageId: TLR_E_SIII_MA_AP_INVALID_CP0_BUS_STATUS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid CP0 Bus Status. */ +/* */ +#define TLR_E_SIII_MA_AP_INVALID_CP0_BUS_STATUS ((TLR_RESULT)0xC0724078L) + + + + +#endif /* __SERCOSIII_MA_AP_ERROR_H */ + +#ifndef __SERCOSIII_MA_CP_ERROR_H +#define __SERCOSIII_MA_CP_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SIII_MA_CP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command value. */ +/* */ +#define TLR_E_SIII_MA_CP_COMMAND_INVALID ((TLR_RESULT)0xC0700001L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_SIII_MA_CP_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0700002L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_WAITING_FOR_TOPOLOGY_DETECT */ +/* */ +/* MessageText: */ +/* */ +/* Waiting for Topology Detect (CP0). */ +/* */ +#define TLR_E_SIII_MA_CP_WAITING_FOR_TOPOLOGY_DETECT ((TLR_RESULT)0xC0700003L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* SercosIII Low Level Driver not started. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_NOT_STARTED ((TLR_RESULT)0xC0700004L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INIT_CALLBACK_HP_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of HP Callback failed. */ +/* */ +#define TLR_E_SIII_MA_CP_INIT_CALLBACK_HP_FAILED ((TLR_RESULT)0xC0700005L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INIT_CALLBACK_DEVSTATUS_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of DevStatus Callback failed. */ +/* */ +#define TLR_E_SIII_MA_CP_INIT_CALLBACK_DEVSTATUS_FAILED ((TLR_RESULT)0xC0700006L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INIT_CALLBACK_TOPOLOGY_DETECT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Initialization of Topology Detect Callback failed. */ +/* */ +#define TLR_E_SIII_MA_CP_INIT_CALLBACK_TOPOLOGY_DETECT_FAILED ((TLR_RESULT)0xC0700007L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_CONFIGURATION_BUFFER_ALREADY_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Configuration Buffer is already open. */ +/* */ +#define TLR_E_SIII_MA_CP_CONFIGURATION_BUFFER_ALREADY_OPEN ((TLR_RESULT)0xC0700008L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_CONFIGURATION_BUFFER_IS_NOT_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Configuration Buffer is not open. */ +/* */ +#define TLR_E_SIII_MA_CP_CONFIGURATION_BUFFER_IS_NOT_OPEN ((TLR_RESULT)0xC0700009L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INVALID_SLAVE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave address. */ +/* */ +#define TLR_E_SIII_MA_CP_INVALID_SLAVE_ADDRESS ((TLR_RESULT)0xC070000AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* Telegram offset cannot be set to MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM ((TLR_RESULT)0xC070000BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* Telegram offset cannot be set to AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM ((TLR_RESULT)0xC070000CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram offset has invalid telegram number. */ +/* */ +#define TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO ((TLR_RESULT)0xC070000DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_HAS_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Telegram offset has invalid offset in frame. */ +/* */ +#define TLR_E_SIII_MA_CP_TELEGRAM_OFFSET_HAS_INVALID_OFFSET ((TLR_RESULT)0xC070000EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* MDT ServiceChannel Telegram offset cannot be set to AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM ((TLR_RESULT)0xC070000FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO */ +/* */ +/* MessageText: */ +/* */ +/* MDT ServiceChannel Telegram offset has invalid telegram number. */ +/* */ +#define TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO ((TLR_RESULT)0xC0700010L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* MDT ServiceChannel Telegram offset has invalid offset in frame. */ +/* */ +#define TLR_E_SIII_MA_CP_MDT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_OFFSET ((TLR_RESULT)0xC0700011L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* AT ServiceChannel Telegram offset cannot be set to MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM ((TLR_RESULT)0xC0700012L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO */ +/* */ +/* MessageText: */ +/* */ +/* AT ServiceChannel Telegram offset has invalid telegram number. */ +/* */ +#define TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO ((TLR_RESULT)0xC0700013L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* AT ServiceChannel Telegram offset has invalid offset in frame. */ +/* */ +#define TLR_E_SIII_MA_CP_AT_SVCH_TELEGRAM_OFFSET_HAS_INVALID_OFFSET ((TLR_RESULT)0xC0700014L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* DeviceControl Telegram offset cannot be set to AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_CANNOT_BE_IN_AT_TELEGRAM ((TLR_RESULT)0xC0700015L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO */ +/* */ +/* MessageText: */ +/* */ +/* DeviceControl Telegram offset has invalid telegram number. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO ((TLR_RESULT)0xC0700016L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_HAS_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Device Control Telegram offset has invalid offset in frame. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_CTRL_TELEGRAM_OFFSET_HAS_INVALID_OFFSET ((TLR_RESULT)0xC0700017L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM */ +/* */ +/* MessageText: */ +/* */ +/* DeviceControl Telegram offset cannot be set to MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_CANNOT_BE_IN_MDT_TELEGRAM ((TLR_RESULT)0xC0700018L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO */ +/* */ +/* MessageText: */ +/* */ +/* DeviceStatus Telegram offset has invalid telegram number. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_HAS_INVALID_TELEGRAM_NO ((TLR_RESULT)0xC0700019L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_HAS_INVALID_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* DeviceStatus Telegram offset has invalid offset in frame. */ +/* */ +#define TLR_E_SIII_MA_CP_DEV_STATUS_TELEGRAM_OFFSET_HAS_INVALID_OFFSET ((TLR_RESULT)0xC070001AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_ALREADY_IN_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Slave already in configuration. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_ALREADY_IN_CONFIGURATION ((TLR_RESULT)0xC070001BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_NOT_IN_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Slave is not in configuration. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_NOT_IN_CONFIGURATION ((TLR_RESULT)0xC070001CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INITCMD_SEGMENT_DOES_NOT_MATCH_FIRST_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* InitCmd segment does not match the first packet. */ +/* */ +#define TLR_E_SIII_MA_CP_INITCMD_SEGMENT_DOES_NOT_MATCH_FIRST_PACKET ((TLR_RESULT)0xC070001DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_TO_BE_IMPLEMENTED */ +/* */ +/* MessageText: */ +/* */ +/* Unimplemented function detected. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_TO_BE_IMPLEMENTED ((TLR_RESULT)0xC070001EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_UNKNOWN_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_UNKNOWN_ERROR ((TLR_RESULT)0xC070001FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_OUT_OF_MEMORY ((TLR_RESULT)0xC0700020L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_SERVICE_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Service Channel number. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_SERVICE_CHANNEL ((TLR_RESULT)0xC0700021L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Slave address. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE ((TLR_RESULT)0xC0700022L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_PHASE_TRANSITION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Phase transition. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_PHASE_TRANSITION ((TLR_RESULT)0xC0700023L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_NO_CONFIGURATION_DATA_FOR_CP3_4 */ +/* */ +/* MessageText: */ +/* */ +/* No Configuration data for CP3/CP4 available. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_NO_CONFIGURATION_DATA_FOR_CP3_4 ((TLR_RESULT)0xC0700024L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT0_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT0 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT0_SIZE ((TLR_RESULT)0xC0700025L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT1_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT1 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT1_SIZE ((TLR_RESULT)0xC0700026L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT2_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT2 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT2_SIZE ((TLR_RESULT)0xC0700027L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT3_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT3 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT3_SIZE ((TLR_RESULT)0xC0700028L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT0_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT0 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT0_SIZE ((TLR_RESULT)0xC0700029L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT1_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT1 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT1_SIZE ((TLR_RESULT)0xC070002AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT2_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT2 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT2_SIZE ((TLR_RESULT)0xC070002BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT3_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT3 length. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT3_SIZE ((TLR_RESULT)0xC070002CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Device Control offset cannot be placed into AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_TEL_TYPE ((TLR_RESULT)0xC070002DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in Device Control offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_TEL_NO ((TLR_RESULT)0xC070002EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Control offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC070002FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Control offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC0700030L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Control offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_CONTROL_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC0700031L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Device Status offset cannot be placed into MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_TEL_TYPE ((TLR_RESULT)0xC0700032L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in Device Status offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_TEL_NO ((TLR_RESULT)0xC0700033L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Status offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC0700034L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Status offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC0700035L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in Device Status offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_DEVICE_STATUS_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC0700036L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* MDT Service Channel offset cannot be placed into AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_TEL_TYPE ((TLR_RESULT)0xC0700037L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in MDT Service Channel offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_TEL_NO ((TLR_RESULT)0xC0700038L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Service Channel offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC0700039L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Service Channel offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC070003AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Service Channel offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_SVC_CHANNEL_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC070003BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* AT Service Channel offset cannot be placed into MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_TEL_TYPE ((TLR_RESULT)0xC070003CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in AT Service Channel offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_TEL_NO ((TLR_RESULT)0xC070003DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Service Channel offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC070003EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Service Channel offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC070003FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Service Channel offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_SVC_CHANNEL_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC0700040L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* MDT Connection offset cannot be placed into AT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_TEL_TYPE ((TLR_RESULT)0xC0700041L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in MDT Connection offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_TEL_NO ((TLR_RESULT)0xC0700042L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Connection offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC0700043L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Connection offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC0700044L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Connection offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC0700045L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_TEL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* AT Connection offset cannot be placed into MDT telegram. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_TEL_TYPE ((TLR_RESULT)0xC0700046L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_TEL_NO */ +/* */ +/* MessageText: */ +/* */ +/* Telegram Number in AT Connection offset is invalid. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_TEL_NO ((TLR_RESULT)0xC0700047L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_TOO_LOW */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Connection offset is too low. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_TOO_LOW ((TLR_RESULT)0xC0700048L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_TOO_HIGH */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in AT Connection offset is too high. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_TOO_HIGH ((TLR_RESULT)0xC0700049L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_NOT_EVEN */ +/* */ +/* MessageText: */ +/* */ +/* Frame Offset in MDT Connection offset is not word-aligned (16bit word). */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_OFFSET_OFS_NOT_EVEN ((TLR_RESULT)0xC070004AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_OVERLAPPING_REGIONS_DETECTED_IN_MDT_FRAMES */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping regions detected within MDT frames. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_OVERLAPPING_REGIONS_DETECTED_IN_MDT_FRAMES ((TLR_RESULT)0xC070004BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_OVERLAPPING_REGIONS_DETECTED_IN_AT_FRAMES */ +/* */ +/* MessageText: */ +/* */ +/* Overlapping regions detected within AT frames. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_OVERLAPPING_REGIONS_DETECTED_IN_AT_FRAMES ((TLR_RESULT)0xC070004CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_SLAVE_ADDRESS_IN_CP3_4_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Slave address in CP3/CP4 configuration data. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_SLAVE_ADDRESS_IN_CP3_4_CONFIG ((TLR_RESULT)0xC070004DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_CONFIGURE_NOT_ALLOWED_IN_CURRENT_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Configuring CP3/CP4 not allowed in current state. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_CONFIGURE_NOT_ALLOWED_IN_CURRENT_STATE ((TLR_RESULT)0xC070004EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_BUILDING_COPY_ROUTINES_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Building of copy routines failed. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_BUILDING_COPY_ROUTINES_FAILED ((TLR_RESULT)0xC070004FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_CONNCTRL_PROCESS_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT Connection Control Process Image offset. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_CONNCTRL_PROCESS_IMAGE_OFFSET ((TLR_RESULT)0xC0700050L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_PROCESS_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid MDT real time data Process Image offset. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_MDT_RTDATA_PROCESS_IMAGE_OFFSET ((TLR_RESULT)0xC0700051L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_CONNCTRL_PROCESS_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT Connection Control Process Image offset. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_CONNCTRL_PROCESS_IMAGE_OFFSET ((TLR_RESULT)0xC0700052L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_PROCESS_IMAGE_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid AT real time data Control Process Image offset. */ +/* */ +#define TLR_E_SIII_MA_CP_LLD_INVALID_AT_RTDATA_PROCESS_IMAGE_OFFSET ((TLR_RESULT)0xC0700053L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_CONFIGURATION_NOT_POSSIBLE_IN_CURRENT_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Configuration not possible in current master state. */ +/* */ +#define TLR_E_SIII_MA_CP_CONFIGURATION_NOT_POSSIBLE_IN_CURRENT_STATE ((TLR_RESULT)0xC0700054L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_PHASE_CHANGE_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Phase Change is in progress. */ +/* */ +#define TLR_E_SIII_MA_CP_PHASE_CHANGE_IN_PROGRESS ((TLR_RESULT)0xC0700055L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_REQUESTED_PHASE_IS_ALREADY_CURRENT_PHASE */ +/* */ +/* MessageText: */ +/* */ +/* Requested Phase is already current phase. */ +/* */ +#define TLR_E_SIII_MA_CP_REQUESTED_PHASE_IS_ALREADY_CURRENT_PHASE ((TLR_RESULT)0xC0700056L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_FINISH_CONFIGURATION_DOWNLOAD_FIRST */ +/* */ +/* MessageText: */ +/* */ +/* Finish configuration download first. */ +/* */ +#define TLR_E_SIII_MA_CP_FINISH_CONFIGURATION_DOWNLOAD_FIRST ((TLR_RESULT)0xC0700057L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NO_CONFIGURATION_FOR_CP3_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* No configuration for CP3 available. */ +/* */ +#define TLR_E_SIII_MA_CP_NO_CONFIGURATION_FOR_CP3_AVAILABLE ((TLR_RESULT)0xC0700058L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NO_CONFIGURATION_FOR_CP4_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* No configuration for CP4 available. */ +/* */ +#define TLR_E_SIII_MA_CP_NO_CONFIGURATION_FOR_CP4_AVAILABLE ((TLR_RESULT)0xC0700059L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INCOMPLETE_INITCMD_DOWNLOAD */ +/* */ +/* MessageText: */ +/* */ +/* Incomplete InitCmd download detected. */ +/* */ +#define TLR_E_SIII_MA_CP_INCOMPLETE_INITCMD_DOWNLOAD ((TLR_RESULT)0xC070005AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INVALID_TRANSITION_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid transition flags specified in InitCmd download. */ +/* */ +#define TLR_E_SIII_MA_CP_INVALID_TRANSITION_FLAGS ((TLR_RESULT)0xC070005BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INVALID_INITCMD_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid length specified in InitCmd download. */ +/* */ +#define TLR_E_SIII_MA_CP_INVALID_INITCMD_LENGTH ((TLR_RESULT)0xC070005CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_PHASE_INDS_RECEIVER_LIST_IS_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Phase Indication receiver list is full. */ +/* */ +#define TLR_E_SIII_MA_CP_PHASE_INDS_RECEIVER_LIST_IS_FULL ((TLR_RESULT)0xC070005DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_APP_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Application queue is not registered. */ +/* */ +#define TLR_E_SIII_MA_CP_APP_NOT_REGISTERED ((TLR_RESULT)0xC070005EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_APP_REGISTERED_ALREADY */ +/* */ +/* MessageText: */ +/* */ +/* Application queue is registered already. */ +/* */ +#define TLR_E_SIII_MA_CP_APP_REGISTERED_ALREADY ((TLR_RESULT)0xC070005FL) + +/* */ +/* MessageId: TLR_I_SIII_MA_CP_BUS_IS_OFF */ +/* */ +/* MessageText: */ +/* */ +/* Please issue the BusOn command, since the bus is off. */ +/* */ +#define TLR_I_SIII_MA_CP_BUS_IS_OFF ((TLR_RESULT)0x40700060L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NO_DIAG_ENTRY_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* No further diagnostic entries currently available. */ +/* */ +#define TLR_E_SIII_MA_CP_NO_DIAG_ENTRY_AVAILABLE ((TLR_RESULT)0xC0700061L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LOCKED_DUE_TO_ERROR_IN_PREVIOUS_PHASE_SWITCH */ +/* */ +/* MessageText: */ +/* */ +/* Locked due to error in previous phase switch. */ +/* */ +#define TLR_E_SIII_MA_CP_LOCKED_DUE_TO_ERROR_IN_PREVIOUS_PHASE_SWITCH ((TLR_RESULT)0xC0700062L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LOCKED_DUE_TO_DPM_WATCHDOG_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Locked due to error on DPM watchdog. */ +/* */ +#define TLR_E_SIII_MA_CP_LOCKED_DUE_TO_DPM_WATCHDOG_ERROR ((TLR_RESULT)0xC0700063L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_BUS_SCAN_NOT_POSSIBLE_WITHOUT_BUS_ON */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan not possible without Bus On. */ +/* */ +#define TLR_E_SIII_MA_CP_BUS_SCAN_NOT_POSSIBLE_WITHOUT_BUS_ON ((TLR_RESULT)0xC0700064L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_ELECTRONIC_LABEL_NOT_READABLE */ +/* */ +/* MessageText: */ +/* */ +/* Electronic Label could not be read. */ +/* */ +#define TLR_E_SIII_MA_CP_ELECTRONIC_LABEL_NOT_READABLE ((TLR_RESULT)0xC0700065L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_BUS_SCAN_ALREADY_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan already active. */ +/* */ +#define TLR_E_SIII_MA_CP_BUS_SCAN_ALREADY_ACTIVE ((TLR_RESULT)0xC0700066L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_BUS_SCAN_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan aborted. */ +/* */ +#define TLR_E_SIII_MA_CP_BUS_SCAN_ABORTED ((TLR_RESULT)0xC0700067L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* NRT Channel exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC0700068L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_MDT_IS_LATER_THAN_START_OF_AT */ +/* */ +/* MessageText: */ +/* */ +/* End of MDT is later than start of AT. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_MDT_IS_LATER_THAN_START_OF_AT ((TLR_RESULT)0xC0700069L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_MDT_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* End of MDT exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_MDT_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC070006AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_START_OF_AT_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Start of AT exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_START_OF_AT_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC070006BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_AT_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* End of AT exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_AT_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC070006CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_NRT_IS_LATER_THAN_START_OF_NRT */ +/* */ +/* MessageText: */ +/* */ +/* End of NRT is later than start of NRT. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_END_OF_NRT_IS_LATER_THAN_START_OF_NRT ((TLR_RESULT)0xC070006DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_OVERLAPS_MDT_TRANSMISSION */ +/* */ +/* MessageText: */ +/* */ +/* NRT Channel overlaps MDT transmission. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_OVERLAPS_MDT_TRANSMISSION ((TLR_RESULT)0xC070006EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_OVERLAPS_AT_TRANSMISSION */ +/* */ +/* MessageText: */ +/* */ +/* NRT Channel overlaps AT transmission. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_NRT_CHANNEL_OVERLAPS_AT_TRANSMISSION ((TLR_RESULT)0xC070006FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TIMING_PARAMETER_START_OF_AT_IS_EARLIER_THAN_START_OF_MDT */ +/* */ +/* MessageText: */ +/* */ +/* Start of AT is earlier than start of MDT. */ +/* */ +#define TLR_E_SIII_MA_CP_TIMING_PARAMETER_START_OF_AT_IS_EARLIER_THAN_START_OF_MDT ((TLR_RESULT)0xC0700070L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_LOCKED_DUE_PREVIOUS_FATAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Locked due previous fatal error. */ +/* */ +#define TLR_E_SIII_MA_CP_LOCKED_DUE_PREVIOUS_FATAL_ERROR ((TLR_RESULT)0xC0700071L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_INFO_NOT_VALID_AT_THE_MOMENT */ +/* */ +/* MessageText: */ +/* */ +/* Topology info not valid at the moment. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_INFO_NOT_VALID_AT_THE_MOMENT ((TLR_RESULT)0xC0700072L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_AT_TRANSMISSION_START_TIME_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* AT Transmission start time exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_AT_TRANSMISSION_START_TIME_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC0700073L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NRT_START_TIME_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* NRT start time exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_NRT_START_TIME_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC0700074L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NRT_END_TIME_EXCEEDS_CYCLE_TIME */ +/* */ +/* MessageText: */ +/* */ +/* NRT End time exceeds cycle time. */ +/* */ +#define TLR_E_SIII_MA_CP_NRT_END_TIME_EXCEEDS_CYCLE_TIME ((TLR_RESULT)0xC0700075L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NRT_START_TIME_IS_GREATER_THAN_NRT_END_TIME */ +/* */ +/* MessageText: */ +/* */ +/* NRT End time is greater than NRT start time. */ +/* */ +#define TLR_E_SIII_MA_CP_NRT_START_TIME_IS_GREATER_THAN_NRT_END_TIME ((TLR_RESULT)0xC0700076L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_NRT */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request aborted due NRT phase. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_NRT ((TLR_RESULT)0xC0700077L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_CP0 */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request aborted due CP0 phase. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_CP0 ((TLR_RESULT)0xC0700078L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request aborted due timeout. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_TIMEOUT ((TLR_RESULT)0xC0700079L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_UNRELATED_SLAVE_TOPOLOGY_CHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request aborted other unrelated slave changed topology state. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_UNRELATED_SLAVE_TOPOLOGY_CHANGE ((TLR_RESULT)0xC070007AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_SLAVE_DENIED_TOPOLOGY_CHANGE */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request aborted due to slave denying topology state change. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_REQUEST_ABORTED_DUE_SLAVE_DENIED_TOPOLOGY_CHANGE ((TLR_RESULT)0xC070007BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_TOPOLOGY_NOT_ALLOWED_CURRENTLY */ +/* */ +/* MessageText: */ +/* */ +/* Topology Request not allowed currently due to topology status. */ +/* */ +#define TLR_E_SIII_MA_CP_TOPOLOGY_NOT_ALLOWED_CURRENTLY ((TLR_RESULT)0xC070007CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_NOT_IN_TOPOLOGY */ +/* */ +/* MessageText: */ +/* */ +/* Slave not in topology. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_NOT_IN_TOPOLOGY ((TLR_RESULT)0xC070007DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_ANOTHER_TOPOLOGY_REQUEST_IN_PROGRESS */ +/* */ +/* MessageText: */ +/* */ +/* Another Topology Request in progress. */ +/* */ +#define TLR_E_SIII_MA_CP_ANOTHER_TOPOLOGY_REQUEST_IN_PROGRESS ((TLR_RESULT)0xC070007EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_CONFIGURATION_FLAGS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid slave configuration flags. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_CONFIGURATION_FLAGS_INVALID ((TLR_RESULT)0xC070007FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_INVALID_ELEMENT_ID_IN_ADD_INITCMD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid element id in Add InitCmd. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_INVALID_ELEMENT_ID_IN_ADD_INITCMD ((TLR_RESULT)0xC0700080L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_INVALID_ACTION_IN_ADD_INITCMD */ +/* */ +/* MessageText: */ +/* */ +/* Invalid action in Add InitCmd. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_INVALID_ACTION_IN_ADD_INITCMD ((TLR_RESULT)0xC0700081L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_BUS_SCAN_NOT_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Bus Scan not active. */ +/* */ +#define TLR_E_SIII_MA_CP_BUS_SCAN_NOT_ACTIVE ((TLR_RESULT)0xC0700082L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SLAVE_NOT_IN_BUS_COMMUNICATION */ +/* */ +/* MessageText: */ +/* */ +/* Slave not in bus communication. */ +/* */ +#define TLR_E_SIII_MA_CP_SLAVE_NOT_IN_BUS_COMMUNICATION ((TLR_RESULT)0xC0700083L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_HOTPLUG_SLAVE_NOT_IN_BUS_COMMUNICATION */ +/* */ +/* MessageText: */ +/* */ +/* Hotplug Slave not in bus communication. */ +/* */ +#define TLR_E_SIII_MA_CP_HOTPLUG_SLAVE_NOT_IN_BUS_COMMUNICATION ((TLR_RESULT)0xC0700084L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_C1D_DIAGNOSTIC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* C1D-Diagnostic Error. */ +/* */ +#define TLR_E_SIII_MA_CP_C1D_DIAGNOSTIC_ERROR ((TLR_RESULT)0xC0700085L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SVC_MHS_AHS_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SVC: MHS-AHS Timeout. */ +/* */ +#define TLR_E_SIII_MA_CP_SVC_MHS_AHS_TIMEOUT ((TLR_RESULT)0xC0700086L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_SVC_BUSY_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* SVC: Busy Timeout. */ +/* */ +#define TLR_E_SIII_MA_CP_SVC_BUSY_TIMEOUT ((TLR_RESULT)0xC0700087L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_S_0_99_COMMAND_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* S-0-99 Command execution ended with error. */ +/* */ +#define TLR_E_SIII_MA_CP_S_0_99_COMMAND_ERROR ((TLR_RESULT)0xC0700088L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_MDT_NRT_AT_CONFIGURATION_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* MDT/NRT/AT order not supported. */ +/* */ +#define TLR_E_SIII_MA_CP_MDT_NRT_AT_CONFIGURATION_NOT_SUPPORTED ((TLR_RESULT)0xC0700089L) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INITCMD_SVCH_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* InitCmd FSM did not succeed processing configured IDN parameters due to Service channel error. */ +/* */ +#define TLR_E_SIII_MA_CP_INITCMD_SVCH_ERROR ((TLR_RESULT)0xC070008AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INITCMD_COMPARE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* InitCmd FSM did not succeed processing configured IDN parameters due mismatch during compare. */ +/* */ +#define TLR_E_SIII_MA_CP_INITCMD_COMPARE_FAILED ((TLR_RESULT)0xC070008BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INITCMD_PROCCMD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* InitCmd FSM did not succeed processing a configured procedure. */ +/* */ +#define TLR_E_SIII_MA_CP_INITCMD_PROCCMD_FAILED ((TLR_RESULT)0xC070008CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_INITCMD_SVCH_TASK_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* InitCmd FSM did not succeed due to Service Channel Task error. */ +/* */ +#define TLR_E_SIII_MA_CP_INITCMD_SVCH_TASK_ERROR ((TLR_RESULT)0xC070008DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_CP_NOT_AVAILABLE_IN_CONFIGURATION */ +/* */ +/* MessageText: */ +/* */ +/* Not available in configuration. */ +/* */ +#define TLR_E_SIII_MA_CP_NOT_AVAILABLE_IN_CONFIGURATION ((TLR_RESULT)0xC070008EL) + + + + +#endif /* __SERCOSIII_MA_CP_ERROR_H */ + +#ifndef __SERCOSIII_MA_NRT_ERROR_H +#define __SERCOSIII_MA_NRT_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SIII_MA_NRT_INVALID_STARTUP_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup parameter. */ +/* */ +#define TLR_E_SIII_MA_NRT_INVALID_STARTUP_PARAMETER ((TLR_RESULT)0xC0790001L) + +/* */ +/* MessageId: TLR_E_SIII_MA_NRT_S3FRAMES_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* SERCOSIII frames not allowed. */ +/* */ +#define TLR_E_SIII_MA_NRT_S3FRAMES_NOT_ALLOWED ((TLR_RESULT)0xC0790002L) + +/* */ +/* MessageId: TLR_E_SIII_MA_NRT_LLD_NOT_STARTED */ +/* */ +/* MessageText: */ +/* */ +/* SercosIII Low Level Driver not started. */ +/* */ +#define TLR_E_SIII_MA_NRT_LLD_NOT_STARTED ((TLR_RESULT)0xC0790003L) + + + + +#endif /* __SERCOSIII_MA_NRT_ERROR_H */ + +#ifndef __SERCOSIII_MA_SVC_ERROR_H +#define __SERCOSIII_MA_SVC_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command value. */ +/* */ +#define TLR_E_SIII_MA_SVC_COMMAND_INVALID ((TLR_RESULT)0xC0710001L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_SLAVE_HS_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Slave Service Channel Handshake timeout. */ +/* */ +#define TLR_E_SIII_MA_SVC_SLAVE_HS_TIMEOUT ((TLR_RESULT)0xC0710002L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_SLAVE_BUSY_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Slave Service Channel Busy timeout. */ +/* */ +#define TLR_E_SIII_MA_SVC_SLAVE_BUSY_TIMEOUT ((TLR_RESULT)0xC0710003L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_SLAVE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Slave Service Channel error. */ +/* */ +#define TLR_E_SIII_MA_SVC_SLAVE_ERROR ((TLR_RESULT)0xC0710004L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_TRANSFER_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel transfer aborted. */ +/* */ +#define TLR_E_SIII_MA_SVC_TRANSFER_ABORTED ((TLR_RESULT)0xC0710005L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INTERN_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channels internally locked. */ +/* */ +#define TLR_E_SIII_MA_SVC_INTERN_LOCKED ((TLR_RESULT)0xC0710006L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_MACRO_STEP_OPENIDN_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel Macro FSM: OpenIdn failed. */ +/* */ +#define TLR_E_SIII_MA_SVC_MACRO_STEP_OPENIDN_FAILED ((TLR_RESULT)0xC0710010L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_MACRO_STEP_READATTR_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel Macro FSM: ReadAttribute failed. */ +/* */ +#define TLR_E_SIII_MA_SVC_MACRO_STEP_READATTR_FAILED ((TLR_RESULT)0xC0710011L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_MACRO_STEP_GETLL_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel Macro FSM: Get ListLength failed. */ +/* */ +#define TLR_E_SIII_MA_SVC_MACRO_STEP_GETLL_FAILED ((TLR_RESULT)0xC0710012L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_MACRO_STEP_ACCESSDATA_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel Macro FSM: Data access failed. */ +/* */ +#define TLR_E_SIII_MA_SVC_MACRO_STEP_ACCESSDATA_FAILED ((TLR_RESULT)0xC0710013L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INTERNAL_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Internal Error. */ +/* */ +#define TLR_E_SIII_MA_SVC_INTERNAL_ERROR ((TLR_RESULT)0xC0710014L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_SLAVE_VALID_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel valid timeout. */ +/* */ +#define TLR_E_SIII_MA_SVC_SLAVE_VALID_TIMEOUT ((TLR_RESULT)0xC0710015L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_SENDER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Sender. */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_SENDER ((TLR_RESULT)0xC0710016L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_ABORT_ALREADY_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Abort Already Running. */ +/* */ +#define TLR_E_SIII_MA_SVC_ABORT_ALREADY_RUNNING ((TLR_RESULT)0xC0710017L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_ELEMENT */ +/* */ +/* MessageText: */ +/* */ +/* The parameter element is wrong. */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_ELEMENT ((TLR_RESULT)0xC0710018L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_SLAVE_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* The parameter slave address is wrong. */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_SLAVE_ADDRESS ((TLR_RESULT)0xC0710019L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_ATOMIC_TRANSFER_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* Atomic transfer in use. */ +/* */ +#define TLR_E_SIII_MA_SVC_ATOMIC_TRANSFER_IN_USE ((TLR_RESULT)0xC071001AL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_ABORT_NOT_POSSIBLE */ +/* */ +/* MessageText: */ +/* */ +/* Abort not possible. */ +/* */ +#define TLR_E_SIII_MA_SVC_ABORT_NOT_POSSIBLE ((TLR_RESULT)0xC071001BL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_DESTID_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected DestId in packet. */ +/* */ +#define TLR_E_SIII_MA_SVC_DESTID_UNEXPECTED ((TLR_RESULT)0xC071001CL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_SEQUENCE_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected sequence in packet. */ +/* */ +#define TLR_E_SIII_MA_SVC_SEQUENCE_UNEXPECTED ((TLR_RESULT)0xC071001DL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Service Channel is closed. */ +/* */ +#define TLR_E_SIII_MA_SVC_CLOSED ((TLR_RESULT)0xC071001EL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_PARAMETER_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* SVC parameter is unexpected. */ +/* */ +#define TLR_E_SIII_MA_SVC_PARAMETER_UNEXPECTED ((TLR_RESULT)0xC071001FL) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_PRIORITY */ +/* */ +/* MessageText: */ +/* */ +/* Invalid priority. */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_PRIORITY ((TLR_RESULT)0xC0710020L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_ISLIST */ +/* */ +/* MessageText: */ +/* */ +/* IsList parameter is wrong. */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_ISLIST ((TLR_RESULT)0xC0710021L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_MACRO_TRANSFER_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* A macro transfer is already started. */ +/* */ +#define TLR_E_SIII_MA_SVC_MACRO_TRANSFER_IN_USE ((TLR_RESULT)0xC0710022L) + +/* */ +/* MessageId: TLR_E_SIII_MA_SVC_INVALID_CP */ +/* */ +/* MessageText: */ +/* */ +/* Access the Service Channel is currently not allowed (wrong CP). */ +/* */ +#define TLR_E_SIII_MA_SVC_INVALID_CP ((TLR_RESULT)0xC0710023L) + + + + +#endif /* __SERCOSIII_MA_SVC_ERROR_H */ + +#ifndef __SERCOSIII_SL_COM_ERROR_H +#define __SERCOSIII_SL_COM_ERROR_H + +/*****************************************************************************/ +/* SercosIII Slave COM error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_NUM_OF_SLAVES */ +/* */ +/* MessageText: */ +/* */ +/* Invalid number of slaves or invalid slave number. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_NUM_OF_SLAVES ((TLR_RESULT)0xC04E0031L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SYNC_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported SCP_Sync version. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SYNC_VERSION ((TLR_RESULT)0xC04E0032L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SMP_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported SCP_SMP version. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SMP_VERSION ((TLR_RESULT)0xC04E0033L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_NRT_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported SCP_NRT version. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_NRT_VERSION ((TLR_RESULT)0xC04E0034L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SYNC_CONFIG_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported Sync configuration flags. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SYNC_CONFIG_FLAGS ((TLR_RESULT)0xC04E0035L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_CONCLK_SIGNAL_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* ConClk is enabled, but signal length below minimum 1000 ns. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_CONCLK_SIGNAL_TOO_SHORT ((TLR_RESULT)0xC04E0036L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_DIVCLK_SIGNAL */ +/* */ +/* MessageText: */ +/* */ +/* DivClk is enabled, but signal length below minimum 1us or greater than 20us. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_DIVCLK_SIGNAL ((TLR_RESULT)0xC04E0037L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_DIVCLK_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* DivClk is enabled, but config is invalid. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_DIVCLK_CONFIG ((TLR_RESULT)0xC04E0038L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SERCOS_ADR */ +/* */ +/* MessageText: */ +/* */ +/* Invalid SERCOS address. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SERCOS_ADR ((TLR_RESULT)0xC04E0039L) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SCP_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported SCP version. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SCP_VERSION ((TLR_RESULT)0xC04E003AL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_SLAVE_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported slave flags. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_SLAVE_FLAGS ((TLR_RESULT)0xC04E003BL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_DEFAULT_OD_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Default object dictionary not available. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_DEFAULT_OD_NOT_AVAILABLE ((TLR_RESULT)0xC04E003CL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_USER_SCP_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported USER_SCP version. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_USER_SCP_VERSION ((TLR_RESULT)0xC04E003DL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_FSP_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported FSP Type. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_FSP_TYPE ((TLR_RESULT)0xC04E003EL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_INVALID_PROCESS_DATA_IMG */ +/* */ +/* MessageText: */ +/* */ +/* Invalid or not supported process data image, it is greater than 256 bytes. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_INVALID_PROCESS_DATA_IMG ((TLR_RESULT)0xC04E003FL) + +/* */ +/* MessageId: TLR_E_SERCOSIII_SL_COM_CLEAN_UP_OD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Cleaning up the object dictionary failed. */ +/* */ +#define TLR_E_SERCOSIII_SL_COM_CLEAN_UP_OD_FAILED ((TLR_RESULT)0xC04E0040L) + + + + +#endif /* __SERCOSIII_COM_ERROR_H */ + +#ifndef __SERCOSIII_SVR_ERROR_H +#define __SERCOSIII_SVR_ERROR_H + + + + +/*****************************************************************************/ +/* Sercos III - Result and Status Codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SERCOSIII_SVC_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid data in request detected. */ +/* */ +#define TLR_E_SERCOSIII_SVC_COMMAND_INVALID ((TLR_RESULT)0xC0330001L) + + + + +#endif /* __SERCOSIII_SVR_ERROR_H */ + +#ifndef __SERVX_ERROR_H +#define __SERVX_ERROR_H + +/*****************************************************************************/ +/* ServX ERROR codes */ +/*****************************************************************************/ + + + +#endif /* __SERVX_ERROR_H */ + +#ifndef __SNMP_SERVER_ERROR_H +#define __SNMP_SERVER_ERROR_H + + + + +/*****************************************************************************/ +/* SNMP Server Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_SNMP_SERVER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_SNMP_SERVER_COMMAND_INVALID ((TLR_RESULT)0xC03B0001L) + + + + +#endif /* __SNMP_SERVER_ERROR_H */ + +#ifndef __TCP_CONNECTOR_ERROR_H +#define __TCP_CONNECTOR_ERROR_H + +/*****************************************************************************/ +/* Marshaller TCP Connector status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_MEM_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid memory address. (NULL pointer passing.) */ +/* */ +#define TLR_E_TCP_CONNECTOR_MEM_ADDRESS ((TLR_RESULT)0xC0860001L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define TLR_E_TCP_CONNECTOR_MEMORY ((TLR_RESULT)0xC0860002L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* Resource initialization problem. */ +/* */ +#define TLR_E_TCP_CONNECTOR_RESOURCE ((TLR_RESULT)0xC0860003L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_PARAMETER_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter value. */ +/* */ +#define TLR_E_TCP_CONNECTOR_PARAMETER_VALUE ((TLR_RESULT)0xC0860004L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_STATE_MACHINE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid state. (Resetting state machine ...) */ +/* */ +#define TLR_E_TCP_CONNECTOR_STATE_MACHINE ((TLR_RESULT)0xC0860005L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_PROTOCOL_SUPPORT */ +/* */ +/* MessageText: */ +/* */ +/* TCP not supported by network protocol stack. */ +/* */ +#define TLR_E_TCP_CONNECTOR_PROTOCOL_SUPPORT ((TLR_RESULT)0xC0860006L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_ADDRESS_INFO */ +/* */ +/* MessageText: */ +/* */ +/* Invalid addressing information from network protocol stack. */ +/* */ +#define TLR_E_TCP_CONNECTOR_ADDRESS_INFO ((TLR_RESULT)0xC0860007L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_SERVICE_CNF */ +/* */ +/* MessageText: */ +/* */ +/* Error in service confirmation from network protocol stack. */ +/* */ +#define TLR_E_TCP_CONNECTOR_SERVICE_CNF ((TLR_RESULT)0xC0860008L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_SEND */ +/* */ +/* MessageText: */ +/* */ +/* Error while sending request to the network protocol stack. */ +/* */ +#define TLR_E_TCP_CONNECTOR_SEND ((TLR_RESULT)0xC0860009L) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_MAX_RETRIES */ +/* */ +/* MessageText: */ +/* */ +/* Maximum number of service retries exceeded. */ +/* */ +#define TLR_E_TCP_CONNECTOR_MAX_RETRIES ((TLR_RESULT)0xC086000AL) + +/* */ +/* MessageId: TLR_E_TCP_CONNECTOR_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Remote connection timeout. */ +/* */ +#define TLR_E_TCP_CONNECTOR_TIMEOUT ((TLR_RESULT)0xC086000BL) + + + + +#endif /* __TCP_CONNECTOR_ERROR_H */ + +#ifndef __TCPIP_SOCKIF_ERROR_H +#define __TCPIP_SOCKIF_ERROR_H + +/*****************************************************************************/ +/* TCP/IP Socket Interface Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_TCPIP_SOCKIF_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_TCPIP_SOCKIF_COMMAND_INVALID ((TLR_RESULT)0xC0740001L) + +/* */ +/* MessageId: TLR_E_TCPIP_SOCKIF_TCP_UDP_IDENTIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify the TCP_UDP task. */ +/* */ +#define TLR_E_TCPIP_SOCKIF_TCP_UDP_IDENTIFY_FAILED ((TLR_RESULT)0xC0740002L) + +/* */ +/* MessageId: TLR_E_TCPIP_SOCKIF_TCP_UDP_QUEUE_IDENTIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The queue identification of TCP_UDP task queue has failed. */ +/* */ +#define TLR_E_TCPIP_SOCKIF_TCP_UDP_QUEUE_IDENTIFY_FAILED ((TLR_RESULT)0xC0740003L) + +/* */ +/* MessageId: TLR_E_TCPIP_SOCKIF_SEMAPHORE_CREATION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The semaphore creation has failed. */ +/* */ +#define TLR_E_TCPIP_SOCKIF_SEMAPHORE_CREATION_FAILED ((TLR_RESULT)0xC0740004L) + + + + +#endif /* __TCPIP_SOCKIF_ERROR_H */ + +#ifndef __TCPIP_TCP_AP_ERROR_H +#define __TCPIP_TCP_AP_ERROR_H + +/*****************************************************************************/ +/* TCPIP TCP Application Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_TCPIP_TCP_AP_SOCKET_NOT_CONNECTED */ +/* */ +/* MessageText: */ +/* */ +/* Socket not connected. */ +/* */ +#define TLR_E_TCPIP_TCP_AP_SOCKET_NOT_CONNECTED ((TLR_RESULT)0xC0940001L) + + + + +#endif /* __TCPIP_TCP_AP_ERROR_H */ + +#ifndef __TCPIP_ERROR_H +#define __TCPIP_ERROR_H + +/*****************************************************************************/ +/* IP Packet Status codes (TCP_UDP task) */ +/*****************************************************************************/ +/* Initialization Error Codes */ +/* MessageId = 50 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_NO_TCP_TASK */ +/* Language = English */ +/* TCP/UDP task not available. */ +/* . */ +/* Language = German */ +/* TCP/UDP Task nicht vorhanden. */ +/* . */ +/* MessageId = 51 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_TASK_CONFIG */ +/* Language = English */ +/* Internal task configuration data not available. */ +/* . */ +/* Language = German */ +/* Interne Task Konfigurationsdaten nicht verfgbar. */ +/* . */ +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_NO_ETHERNET_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* There is no Ethernet address (MAC address) available. */ +/* */ +#define TLR_E_IP_ERR_INIT_NO_ETHERNET_ADDR ((TLR_RESULT)0xC0070034L) + +/* MessageId = 53 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_WAIT_FOR_WARMSTART */ +/* Language = English */ +/* Waiting for warm-start by application program. */ +/* . */ +/* Language = German */ +/* Warte auf einen Warmstart der Applikation. */ +/* . */ +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_FLAG */ +/* */ +/* MessageText: */ +/* */ +/* The start parameters contains one or more unknown flags. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_FLAG ((TLR_RESULT)0xC0070036L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_IP_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* The start parameters contains an invalid IP address. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_IP_ADDR ((TLR_RESULT)0xC0070037L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_NETMASK */ +/* */ +/* MessageText: */ +/* */ +/* The start parameters contains an invalid subnet mask. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_NETMASK ((TLR_RESULT)0xC0070038L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* The start parameters contains an invalid gateway IP address. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_GATEWAY ((TLR_RESULT)0xC0070039L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_UNKNOWN_HARDWARE */ +/* */ +/* MessageText: */ +/* */ +/* The device type is unknown. */ +/* */ +#define TLR_E_IP_ERR_INIT_UNKNOWN_HARDWARE ((TLR_RESULT)0xC007003BL) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_NO_IP_ADDR */ +/* */ +/* MessageText: */ +/* */ +/* Failed to obtain an IP address from the specified source(s). */ +/* */ +#define TLR_E_IP_ERR_INIT_NO_IP_ADDR ((TLR_RESULT)0xC007003CL) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_DRIVER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The initialisation of the driver layer (EDD) is failed. */ +/* */ +#define TLR_E_IP_ERR_INIT_DRIVER_FAILED ((TLR_RESULT)0xC007003DL) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_NO_IP_ADDR_CFG */ +/* */ +/* MessageText: */ +/* */ +/* There is no source for an IP address (BOOTP, DHCP, IP address parameter) specified. */ +/* */ +#define TLR_E_IP_ERR_INIT_NO_IP_ADDR_CFG ((TLR_RESULT)0xC007003EL) + +/* MessageId = 63 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_INVALID_SERIAL_NUMBER */ +/* Language = English */ +/* Invalid serial number. */ +/* . */ +/* Language = German */ +/* Ungltige Seriennummer. */ +/* . */ +/* MessageId = 64 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_MEM_NOT_ON_CHIP */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* MessageId = 65 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_NO_MEM */ +/* Language = English */ +/* . */ +/* . */ +/* Language = German */ +/* . */ +/* . */ +/* MessageId = 66 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_CREATE_MBX */ +/* Language = English */ +/* Failed to create the IP mailbox. */ +/* . */ +/* Language = German */ +/* Das Erzeugen der IP Mailbox ist fehlgeschlagen. */ +/* . */ +/* MessageId = 67 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_CREATE_INFO_FIELD */ +/* Language = English */ +/* Failed to create a task information field (task state). */ +/* . */ +/* Language = German */ +/* Das Erzeugen eines Task Informationsfeldes (Taskstatus) ist fehlgeschlagen. */ +/* . */ +/* MessageId = 68 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_INIT_IDENTIFY_MBX */ +/* Language = English */ +/* Failed to identify the mailbox of TCP task. */ +/* . */ +/* Language = German */ +/* Das Identifizieren der Mailbox der TCP Task ist fehlgeschlagen. */ +/* . */ +/* Run-time Error Codes */ +/* */ +/* MessageId: TLR_E_IP_ERR_ETH_ADDR_INVALID_IP_CMD_SET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The Ethernet address (MAC address) abEthernetAddr in command TCPIP_IP_CMD_SET_PARAM_REQ is invalid. */ +/* Invalid means, abEthernetAddr is equal to the broadcast address FF-FF-FF-FF-FF-FF. */ +/* */ +#define TLR_E_IP_ERR_ETH_ADDR_INVALID_IP_CMD_SET_PARAM ((TLR_RESULT)0xC007007CL) + +/* MessageId = 130 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_MODE_UNKNOWN */ +/* Language = English */ +/* The mode parameter is invalid. */ +/* . */ +/* Language = German */ +/* Der Mode Parameter ist ungltig. */ +/* . */ +/* */ +/* MessageId: TLR_E_IP_ERR_ARP_CACHE_FULL_IP_CMD_SET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_IP_CMD_SET_PARAM_REQ could not be executed, because the ARP cache is full. */ +/* The ARP cache has per default configuration 64 entries. */ +/* */ +#define TLR_E_IP_ERR_ARP_CACHE_FULL_IP_CMD_SET_PARAM ((TLR_RESULT)0xC0070083L) + +/* */ +/* MessageId: TLR_E_IP_ERR_ARP_ENTRY_NOT_FOUND_IP_CMD_SET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The specified ARP entry in command TCPIP_IP_CMD_SET_PARAM_REQ could not be deleted. */ +/* The ARP entry was not found in ARP cache. */ +/* */ +#define TLR_E_IP_ERR_ARP_ENTRY_NOT_FOUND_IP_CMD_SET_PARAM ((TLR_RESULT)0xC0070086L) + +/* */ +/* MessageId: TLR_E_IP_ERR_ARP_ENTRY_NOT_FOUND_IP_CMD_GET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The requested ARP information in command TCPIP_IP_CMD_GET_PARAM_REQ could not be delivered. */ +/* The ARP entry was not found in ARP cache. */ +/* */ +#define TLR_E_IP_ERR_ARP_ENTRY_NOT_FOUND_IP_CMD_GET_PARAM ((TLR_RESULT)0xC0070087L) + +/* MessageId = 149 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_IP */ +/* SymbolicName = TLR_E_IP_ERR_UNEXP_ANSWER */ +/* Language = English */ +/* Unexpected answer message received. */ +/* . */ +/* Language = German */ +/* Unerwartete Anwortmessage empfangen. */ +/* . */ +/* Special Error Codes from file TcpipIpbase.h */ +/* */ +/* MessageId: TLR_E_IP_ERR_DELAYED */ +/* */ +/* MessageText: */ +/* */ +/* Special internal error code returned by IpStart function. */ +/* */ +#define TLR_E_IP_ERR_DELAYED ((TLR_RESULT)0xC00700FEL) + +/* */ +/* MessageId: TLR_E_IP_ERR_GENERIC */ +/* */ +/* MessageText: */ +/* */ +/* Special internal error code returned by IpStart function. */ +/* */ +#define TLR_E_IP_ERR_GENERIC ((TLR_RESULT)0xC00700FFL) + +/*****************************************************************************/ +/* TCP_UDP task Packet Status codes */ +/* */ +/* Added here also the "TCP_UDP Diagnostic Status codes" from file tcpip_diag.mc - */ +/* there are no conflicts (except the MessageId 0x0001 and 0x0002 because of old and */ +/* comment out errors/diag codes, see below) - so the error numbers are unchanged. */ +/* But some codes are also comment out, because the corresponding error code exists! */ +/* Renamed from TLR_DIAG_E_xx to TLR_E_xx */ +/*****************************************************************************/ +/* MessageId = 0x0001 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCPIP_TCP_TASK_COMMAND_INVALID --> TLR_E_UNKNOWN_COMMAND */ +/* Language = English */ +/* Invalid command received. */ +/* . */ +/* Language = German */ +/* Ungltiges Kommando erhalten. */ +/* . */ +/* MessageId = 0x0001 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_DIAG_E_TCP_ERR_TASK_PROCESS_TERMINATED */ +/* Language = English */ +/* The task process was terminated with error - see task status. */ +/* . */ +/* Language = German */ +/* Die Task wurde beendet - siehe Taskstatus. */ +/* . */ +/* MessageId = 0x0002 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCPIP_TCP_TASK_PROCESS_CANCELED */ +/* Language = English */ +/* Cancel process is in progress, command can not be executed. */ +/* . */ +/* Language = German */ +/* Task wird gerade beendet, das Kommando kann nicht ausgefhrt werden. */ +/* . */ +/* MessageId = 0x0002 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_DIAG_E_TCP_ERR_INIT_RESET_CYCLE */ +/* Language = English */ +/* Failed to reset the cyclic event. */ +/* . */ +/* Language = German */ +/* Das Reseten des zyklischen Events ist fehlgeschlagen. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCP_ERR_CODEDIAG_FATAL */ +/* */ +/* MessageText: */ +/* */ +/* A fatal error is occured. Terminate the task. */ +/* */ +#define TLR_E_TCP_ERR_CODEDIAG_FATAL ((TLR_RESULT)0xC0080003L) + +/* MessageId = 0x0004 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_NOT_INITIALIZED */ +/* Language = English */ +/* Task is not initialized. */ +/* . */ +/* Language = German */ +/* Die Task ist nicht initialisiert. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCP_TASK_F_INITIALIZATION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize the task. */ +/* Accept Init packets and Config packets only. */ +/* */ +#define TLR_E_TCP_TASK_F_INITIALIZATION_FAILED ((TLR_RESULT)0xC0080005L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_SERIAL_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid serial number. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_SERIAL_NUMBER ((TLR_RESULT)0xC0080006L) + +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_IP_INIT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize the IP layer - see task status. */ +/* */ +#define TLR_E_IP_ERR_INIT_IP_INIT_ERROR ((TLR_RESULT)0xC0080007L) + +/* MessageId = 0x0008 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_OS_CYCLETIME */ +/* Language = English */ +/* The configured operating system cycletime is out of range (0.1 ms ... 20 ms). */ +/* . */ +/* Language = German */ +/* Die konfigurierte Zykluszeit des Betriebssystems liegt ausserhalb der zulssigen Grenzen (0,1 ms ... 20 ms). */ +/* . */ +/* */ +/* MessageId: TLR_E_TCPIP_TCP_TASK_PROCESS_CANCELED */ +/* */ +/* MessageText: */ +/* */ +/* Cancel process is in progress, command can not be executed. */ +/* */ +#define TLR_E_TCPIP_TCP_TASK_PROCESS_CANCELED ((TLR_RESULT)0xC0080009L) + +/* */ +/* MessageId: TLR_E_TCPIP_EDD_IDENTIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to identify the EDD (Ethernet Device Driver). */ +/* */ +#define TLR_E_TCPIP_EDD_IDENTIFY_FAILED ((TLR_RESULT)0xC008000AL) + +/* */ +/* MessageId: TLR_E_TCPIP_APPLICATION_TIMER_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create an application timer (Timer task). */ +/* */ +#define TLR_E_TCPIP_APPLICATION_TIMER_CREATE_FAILED ((TLR_RESULT)0xC008000BL) + +/* */ +/* MessageId: TLR_E_TCPIP_APPLICATION_TIMER_INIT_PACKET_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize a packet of application timer (Timer task). */ +/* */ +#define TLR_E_TCPIP_APPLICATION_TIMER_INIT_PACKET_FAILED ((TLR_RESULT)0xC008000CL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_SOCKET_MAX_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulSocketMaxCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_SOCKET_MAX_CNT ((TLR_RESULT)0xC008000DL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulPoolElemCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_POOL_ELEM_CNT ((TLR_RESULT)0xC008000EL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_OUT_BUF_MAX_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulEddOutBufMaxCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_OUT_BUF_MAX_CNT ((TLR_RESULT)0xC008000FL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_ARP_CACHE_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulArpCacheSize. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_ARP_CACHE_SIZE ((TLR_RESULT)0xC0080010L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_QUE_FREE_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulQueFreeElemCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_QUE_FREE_ELEM_CNT ((TLR_RESULT)0xC0080011L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_TCP_CYCLE_EVENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulTcpCycleEvent. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_TCP_CYCLE_EVENT ((TLR_RESULT)0xC0080012L) + +/* MessageId = 0x0013 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_OS_AND_TCPUDP_CYCLETIME */ +/* Language = English */ +/* The combination of configured operating system cycletime and TCP/IP stacks cycletime (startup-parameter */ +/* ulTcpCycleEvent) is not possible. The operating system cycletime must be smaller or equal than the */ +/* TCP/IP stacks cycletime. */ +/* . */ +/* Language = German */ +/* Die Kombination aus konfigurierter Zykluszeit des Betriebssystems und der Zykluszeit des TCP/IP Stacks */ +/* (Startparameter ulTcpCycleEvent) ist nicht mglich. Die konfigurierter Zykluszeit des Betriebssystems */ +/* muss kleiner oder gleich der Zykluszeit des TCP/IP Stacks sein. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT_AP */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulQueElemCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_QUE_ELEM_CNT_AP ((TLR_RESULT)0xC0080014L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_QUE_POOL_ELEM_CNT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulEddQuePoolElemCnt. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_QUE_POOL_ELEM_CNT ((TLR_RESULT)0xC0080015L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_START_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulStartFlags. Unknown flags are set. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_START_FLAGS ((TLR_RESULT)0xC0080016L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter pszEddName. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EDD_NAME ((TLR_RESULT)0xC0080017L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_EDD_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF pszEddName. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_EDD_NAME ((TLR_RESULT)0xC0080018L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_EDD_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF ulEddInstance. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_EDD_INSTANCE ((TLR_RESULT)0xC0080019L) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_ETH_INTF_NAME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF pszEifEthIntfName. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_ETH_INTF_NAME ((TLR_RESULT)0xC008001AL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF ulEifMode. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_MODE ((TLR_RESULT)0xC008001BL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_PORT_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIFs ulEifPortStart, ulEifPortEnd. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_PORT_RANGE ((TLR_RESULT)0xC008001CL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_PORT_NMB */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF ulEifPortNmb. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_PORT_NMB ((TLR_RESULT)0xC008001DL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_ARP_TIMEOUT_CACHE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter ulArpTimeoutCache. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_ARP_TIMEOUT_CACHE ((TLR_RESULT)0xC008001EL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_FLAGS */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter EIF ulEifFlags. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_EIF_FLAGS ((TLR_RESULT)0xC008001FL) + +/* */ +/* MessageId: TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_HW_NAME_NETX */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Startup Parameter pszHwNameNetX. */ +/* */ +#define TLR_E_TCPIP_INVALID_STARTUP_PARAMETER_HW_NAME_NETX ((TLR_RESULT)0xC0080020L) + +/* Initialization Error Codes */ +/* */ +/* MessageId: TLR_E_TCP_ERR_INIT_IP_TASK_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* The IP layer is not ready. */ +/* */ +#define TLR_E_TCP_ERR_INIT_IP_TASK_NOT_READY ((TLR_RESULT)0xC0080032L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_INIT_IP_TASK_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* The initialization of IP layer has failed. */ +/* */ +#define TLR_E_TCP_ERR_INIT_IP_TASK_FAILED ((TLR_RESULT)0xC0080034L) + +/* MessageId = 61 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_CREATE_CYCLE */ +/* Language = English */ +/* Failed to create the cyclic event. */ +/* . */ +/* Language = German */ +/* Das Erzeugen des zyklischen Events ist fehlgeschlagen. */ +/* . */ +/* MessageId = 62 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_RESET_CYCLE */ +/* Language = English */ +/* Failed to reset the cyclic event. */ +/* . */ +/* Language = German */ +/* Das Reseten des zyklischen Events ist fehlgeschlagen. */ +/* . */ +/* MessageId = 63 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_CREATE_MULTIPLE */ +/* Language = English */ +/* Failed to create the multiple object. */ +/* . */ +/* Language = German */ +/* Das Erzeugen des Multiple Objekt ist fehlgeschlagen. */ +/* . */ +/* MessageId = 64 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_INIT_CREATE_INFO_FIELD */ +/* Language = English */ +/* The creation of an information field (task state) has failed. */ +/* . */ +/* Language = German */ +/* Das Erzeugen eines Informationsfeldes (Taskstatus) ist fehlgeschlagen. */ +/* . */ +/* */ +/* MessageId: TLR_W_TCP_ERR_INIT_TPIF_INIT_REQ_PCKT */ +/* */ +/* MessageText: */ +/* */ +/* Warning: A pending application packet has discarded (because of a new application packet). */ +/* */ +#define TLR_W_TCP_ERR_INIT_TPIF_INIT_REQ_PCKT ((TLR_RESULT)0x80080043L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_INIT_OS_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* The configured operating system cycletime is out of range (0.1 ms ... 20 ms). */ +/* */ +#define TLR_E_TCP_ERR_INIT_OS_CYCLETIME ((TLR_RESULT)0xC0080044L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_INIT_OS_AND_TCPUDP_CYCLETIME */ +/* */ +/* MessageText: */ +/* */ +/* The combination of configured operating system cycletime and TCP/IP stacks cycletime (startup-parameter */ +/* ulTcpCycleEvent) is not possible. The operating system cycletime must be smaller or equal than the */ +/* TCP/IP stacks cycletime. */ +/* */ +#define TLR_E_TCP_ERR_INIT_OS_AND_TCPUDP_CYCLETIME ((TLR_RESULT)0xC0080045L) + +/* Run-time Error Codes */ +/* MessageId = 111 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_TIMEOUT_INVALID */ +/* Language = English */ +/* The timeout parameter is invalid. */ +/* . */ +/* Language = German */ +/* Der Timeout Parameter ist ungltig. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCP_ERR_SOCKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* The socket handle ulDestId is invalid. */ +/* A further reason for this error: The command (Mode) is not applicable on this socket type (TCP/UDP). */ +/* */ +#define TLR_E_TCP_ERR_SOCKET_INVALID ((TLR_RESULT)0xC0080070L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_OPTION_NOT_SUPPORTED_TCP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The option parameter ulOptions in command TCPIP_TCP_CMD_SEND_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_OPTION_NOT_SUPPORTED_TCP_CMD_SEND ((TLR_RESULT)0xC0080074L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_PARAMETER_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* The parameter in command TCPIP_TCP_UDP_CMD_SET_SOCK_OPTION_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_PARAMETER_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION ((TLR_RESULT)0xC0080075L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_CONN_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* The connection has closed (Graceful close). */ +/* */ +#define TLR_E_TCP_ERR_CONN_CLOSED ((TLR_RESULT)0xC0080078L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_CONN_RESET */ +/* */ +/* MessageText: */ +/* */ +/* The Connection has closed by reset (Hard close). */ +/* */ +#define TLR_E_TCP_ERR_CONN_RESET ((TLR_RESULT)0xC0080079L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_PROTOCOL_UNKNOWN_TCP_UDP_CMD_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* The protocol parameter ulProtocol in command TCPIP_TCP_UDP_CMD_OPEN_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_PROTOCOL_UNKNOWN_TCP_UDP_CMD_OPEN ((TLR_RESULT)0xC008007AL) + +/* */ +/* MessageId: TLR_E_TCP_ERR_NO_SOCKETS_TCP_UDP_CMD_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_UDP_CMD_OPEN_REQ: There are no socket handles available. */ +/* */ +#define TLR_E_TCP_ERR_NO_SOCKETS_TCP_UDP_CMD_OPEN ((TLR_RESULT)0xC008007BL) + +/* MessageId = 130 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_MODE_UNKNOWN */ +/* Language = English */ +/* The mode parameter in command is invalid. */ +/* . */ +/* Language = German */ +/* Das Kommando enthlt einen ungltigen Mode Parameter. */ +/* . */ +/* MessageId = 131 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_MAX_DATA_LEN_EXCEEDED */ +/* Language = English */ +/* The maximum data length has exceeded. */ +/* . */ +/* Language = German */ +/* Die maximale Datenlnge wurde berschritten. */ +/* . */ +/* MessageId = 132 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_ERR_MAX_PCKT_CNT_EXCEEDED_UDP_CMD_SEND */ +/* Language = English */ +/* Command TCPIP_UDP_CMD_SEND_REQ: The maximum number of queued packets ( = TCPHDL_RCX_PCKT_QUEUED_MAX (6) ) */ +/* has exceeded. The request command was rejected. The application must wait for at least one confirmation */ +/* command from stack before sending the next request command. */ +/* . */ +/* Language = German */ +/* Kommando TCPIP_UDP_CMD_SEND_REQ: Die maximale Anzahl gequeueter Pakete ( = TCPHDL_RCX_PCKT_QUEUED_MAX (6) ) */ +/* wurde berschritten. Das Request Command wurde abgelehnt. Die Applikation muss mindestens auf ein */ +/* Confirmation Command vom Stack warten, bevor das nchste Request Command gesendet werden kann. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCP_ERR_MAX_GROUP_EXCEEDED_TCP_UDP_CMD_SET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_UDP_CMD_SET_SOCK_OPTION_REQ, ulMode = TCP_SOCK_ADD_MEMBERSHIP: The maximum number of */ +/* IP multicast groups has exceeded (Default configuration = 64). */ +/* */ +#define TLR_E_TCP_ERR_MAX_GROUP_EXCEEDED_TCP_UDP_CMD_SET_SOCK_OPTION ((TLR_RESULT)0xC0080085L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DISCARD_KEPT_REQ_CMD */ +/* */ +/* MessageText: */ +/* */ +/* A kept request command has discarded. This confirmation has no further meaning for the application, unless */ +/* the application must give back this packet to their resource pool! */ +/* */ +#define TLR_E_TCP_ERR_DISCARD_KEPT_REQ_CMD ((TLR_RESULT)0xC0080086L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_UNEXP_ANSWER */ +/* */ +/* MessageText: */ +/* */ +/* An unexpected/unknown confirmation command has received. */ +/* */ +#define TLR_E_TCP_ERR_UNEXP_ANSWER ((TLR_RESULT)0xC0080095L) + +/* MessageId = 151 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_MESSAGESIZE --> TLR_E_INVALID_PACKET_LEN */ +/* Language = English */ +/* The packet length parameter ulLen is invalid. The correct packet lenght depends on the command parameter ulCmd. */ +/* . */ +/* Language = German */ +/* Die Paketlnge (Parameter ulLen) ist ungltig. Die korrekte Paketlnge hngt vom Kommando Parameter ulCmd ab. */ +/* . */ +/* MessageId = 152 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_MESSAGECOMMAND --> TLR_E_UNKNOWN_COMMAND */ +/* Language = English */ +/* The command ulCmd is unknown. */ +/* . */ +/* Language = German */ +/* Das Kommando ulCmd ist unbekannt. */ +/* . */ +/* MessageId = 156 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_MESSAGESEQUENCE */ +/* Language = English */ +/* Sequence error during segmented message transfer. */ +/* . */ +/* Language = German */ +/* Es ist ein Sequenzfehler whrend einem segmentierten Messagetransfer aufgetreten. */ +/* . */ +/* MessageId = 158 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_MESSAGECOMMANDRUNNING */ +/* Language = English */ +/* The command cannot be executed, because the previous command is still running. */ +/* . */ +/* Language = German */ +/* Das Kommando kann nicht ausgefhrt werden, weil das vorhergehende Kommando noch luft. */ +/* . */ +/* */ +/* MessageId: TLR_E_TCP_TASK_F_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* The task is not initialized. */ +/* */ +#define TLR_E_TCP_TASK_F_NOT_INITIALIZED ((TLR_RESULT)0xC00800C8L) + +/* */ +/* MessageId: TLR_E_TCP_TASK_F_BUSY */ +/* */ +/* MessageText: */ +/* */ +/* The task is busy (intern). */ +/* */ +#define TLR_E_TCP_TASK_F_BUSY ((TLR_RESULT)0xC00800C9L) + +/* MessageId = 210 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_DATABASE --> TLR_E_DATABASE_ACCESS_FAILED */ +/* Language = English */ +/* The configuration database is not available. */ +/* . */ +/* Language = German */ +/* Die Parameterdatenbank ist nicht vorhanden. */ +/* . */ +/* System Error Codes */ +/* MessageId = 212 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_DATABASE_READ --> TLR_E_DATABASE_ACCESS_FAILED */ +/* Language = English */ +/* Error while reading configuration database. */ +/* . */ +/* Language = German */ +/* Beim Lesen der Parameterdatenbank ist ein Fehler aufgetreten. */ +/* . */ +/* MessageId = 213 */ +/* Severity = Error */ +/* Facility = TLR_UNQ_NR_TCPIP_TCP */ +/* SymbolicName = TLR_E_TCP_TASK_F_STRUCTURE */ +/* Language = English */ +/* Error while registering diagnostics structure. */ +/* . */ +/* Language = German */ +/* Beim Registrieren einer Diagnosestruktur ist ein Fehler aufgetreten. */ +/* . */ +/* //////// New rcX error codes, starting with a value bigger than the RCS error codes = 255 ////////// */ +/* //////// for IP and TCP_UDP error codes! ////////// */ +/* //////// The order of this errors is: ////////// */ +/* //////// - Parameter errors from application: 0x0100 ... 0x01FF ////////// */ +/* //////// - Local source of errors (stack) : 0x0200 ... 0x02FF ////////// */ +/* //////// - Remote source of errors : 0x0300 ... 0x03FF ////////// */ +/* //////// - Parameter errors from application: 0x0100 ... 0x01FF ////////// */ +/* /// IP address invalid errors 0x0100 ... 0x010F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_IP_ADDR_INVALID_IP_CMD_PING */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr in command TCPIP_IP_CMD_PING_REQ is invalid. */ +/* This means, the IP address ulIpAddr is equal to the TCP/IP stacks own IP address. */ +/* */ +#define TLR_E_IP_ERR_IP_ADDR_INVALID_IP_CMD_PING ((TLR_RESULT)0xC0070100L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr in command TCPIP_TCP_UDP_CMD_OPEN_REQ is invalid. */ +/* The parameter ulIpAddr must be zero (0.0.0.0) or equal to the TCP/IP stacks own IP address. */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_OPEN ((TLR_RESULT)0xC0080101L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr in command TCPIP_TCP_CMD_CONNECT_REQ is invalid. */ +/* The parameter ulIpAddr must be unequal to the TCP/IP stacks own IP address. */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080102L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr in command TCPIP_UDP_CMD_SEND_REQ is invalid or doesn't match to the local sub network. */ +/* This error occurs, if the IP address is zero (0.0.0.0) or equal to the address of the local subnet. */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_UDP_CMD_SEND ((TLR_RESULT)0xC0080103L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* The parameter ulMulticastGroup (ulMode = TCP_SOCK_ADD_MEMBERSHIP or TCP_SOCK_DROP_MEMBERSHIP) in command */ +/* TCPIP_TCP_UDP_CMD_SET_SOCK_OPTION_REQ is invalid. */ +/* The parameter ulMulticastGroup must be a valid Multicast address. */ +/* Valid Multicast addresses are 224.0.0.1 ... 239.255.255.255 (224.0.0.0 is reserved as Base-multicast address). */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION ((TLR_RESULT)0xC0080104L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_BIND */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr in command TCPIP_TCP_UDP_CMD_BIND_REQ is invalid. */ +/* The parameter ulIpAddr must be zero (0.0.0.0) or equal to the TCP/IP stacks own IP address. */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_TCP_UDP_CMD_BIND ((TLR_RESULT)0xC0080105L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_IP_ADDR_INVALID_NO_GATEWAY */ +/* */ +/* MessageText: */ +/* */ +/* The IP address parameter ulIpAddr is invalid, because there is no gateway configured. */ +/* The parameter ulIpAddr must be inside the local network. */ +/* */ +#define TLR_E_TCP_ERR_IP_ADDR_INVALID_NO_GATEWAY ((TLR_RESULT)0xC0080106L) + +/* /// Port invalid errors 0x0110 ... 0x011F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_TCP_ERR_PORT_INVALID_TCP_UDP_CMD_OPEN */ +/* */ +/* MessageText: */ +/* */ +/* The port parameter ulPort in command TCPIP_TCP_UDP_CMD_OPEN_REQ is invalid or not available. */ +/* The parameter ulPort must be in range 0 ... 65535. */ +/* */ +#define TLR_E_TCP_ERR_PORT_INVALID_TCP_UDP_CMD_OPEN ((TLR_RESULT)0xC0080110L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_PORT_INVALID_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The port parameter ulPort in command TCPIP_TCP_CMD_CONNECT_REQ is invalid or not available. */ +/* The parameter ulPort must be in range 1 ... 65535. */ +/* */ +#define TLR_E_TCP_ERR_PORT_INVALID_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080111L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_PORT_INVALID_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The port parameter ulPort in command TCPIP_UDP_CMD_SEND_REQ is invalid or not available. */ +/* The parameter ulPort must be in range 0 ... 65535. */ +/* */ +#define TLR_E_TCP_ERR_PORT_INVALID_UDP_CMD_SEND ((TLR_RESULT)0xC0080112L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_PORT_INVALID_TCP_UDP_CMD_BIND */ +/* */ +/* MessageText: */ +/* */ +/* The port parameter ulPort in command TCPIP_TCP_UDP_CMD_BIND_REQ is invalid or not available. */ +/* The parameter ulPort must be in range 0 ... 65535. */ +/* */ +#define TLR_E_TCP_ERR_PORT_INVALID_TCP_UDP_CMD_BIND ((TLR_RESULT)0xC0080113L) + +/* /// Timeout invalid errors 0x0120 ... 0x012F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_TIMEOUT_INVALID_IP_CMD_PING */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeout in command TCPIP_IP_CMD_PING_REQ is invalid. */ +/* */ +#define TLR_E_IP_ERR_TIMEOUT_INVALID_IP_CMD_PING ((TLR_RESULT)0xC0070120L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_CLOSE */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeout in command TCPIP_TCP_UDP_CMD_CLOSE_REQ is invalid. */ +/* Consider the distinction between TCP and UDP sockets! For UDP sockets, ulTimeout must be zero. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_CLOSE ((TLR_RESULT)0xC0080121L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_CLOSE_ALL */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeout in command TCPIP_TCP_UDP_CMD_CLOSE_ALL_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_CLOSE_ALL ((TLR_RESULT)0xC0080122L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_CMD_WAIT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeoutSend and/or ulTimeoutListen in command TCPIP_TCP_CMD_WAIT_CONNECT_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_CMD_WAIT_CONNECT ((TLR_RESULT)0xC0080123L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeoutSend and/or ulTimeoutConnect in command TCPIP_TCP_CMD_CONNECT_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080124L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* The timeout parameter ulTimeoutSend (ulMode = TCP_SOCK_SEND_TIMEOUT) or ulTimeoutInactive */ +/* (ulMode = TCP_SOCK_INACTIVE_TIMEOUT) or ulTimeoutKeepAlive (ulMode = TCP_SOCK_KEEPALIVE_TIMEOUT) */ +/* in command TCPIP_TCP_UDP_CMD_SET_SOCK_OPTION_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_INVALID_TCP_UDP_CMD_SET_SOCK_OPTION ((TLR_RESULT)0xC0080125L) + +/* /// Mode unknown errors 0x0130 ... 0x013F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_MODE_UNKNOWN_IP_CMD_SET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The mode parameter ulMode in command TCPIP_IP_CMD_SET_PARAM_REQ is invalid. */ +/* */ +#define TLR_E_IP_ERR_MODE_UNKNOWN_IP_CMD_SET_PARAM ((TLR_RESULT)0xC0070130L) + +/* */ +/* MessageId: TLR_E_IP_ERR_MODE_UNKNOWN_IP_CMD_GET_PARAM */ +/* */ +/* MessageText: */ +/* */ +/* The mode parameter ulMode in command TCPIP_IP_CMD_GET_PARAM_REQ is invalid. */ +/* */ +#define TLR_E_IP_ERR_MODE_UNKNOWN_IP_CMD_GET_PARAM ((TLR_RESULT)0xC0070131L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_MODE_UNKNOWN_TCP_UDP_CMD_SET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* The mode parameter ulMode in command TCPIP_TCP_UDP_CMD_SET_SOCK_OPTION_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_MODE_UNKNOWN_TCP_UDP_CMD_SET_SOCK_OPTION ((TLR_RESULT)0xC0080132L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_MODE_UNKNOWN_TCP_UDP_CMD_GET_SOCK_OPTION */ +/* */ +/* MessageText: */ +/* */ +/* The mode parameter ulMode in command TCPIP_TCP_UDP_CMD_GET_SOCK_OPTION_REQ is invalid. */ +/* */ +#define TLR_E_TCP_ERR_MODE_UNKNOWN_TCP_UDP_CMD_GET_SOCK_OPTION ((TLR_RESULT)0xC0080133L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_MODE_UNKNOWN_FATAL_DUMMY */ +/* */ +/* MessageText: */ +/* */ +/* Internal fatal error in module TcpipTcphdlPckt.c! */ +/* */ +#define TLR_E_TCP_ERR_MODE_UNKNOWN_FATAL_DUMMY ((TLR_RESULT)0xC0080134L) + +/* /// Data len errors 0x0140 ... 0x014F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_TCP_ERR_MAX_DATA_LEN_EXCEEDED_TCP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The maximum TCP data count n in command TCPIP_TCP_CMD_SEND_REQ has exceeded. See parameter ulLen. */ +/* The maximum value for n is TCPIP_MAX_TCP_DATA_CNT (1460). */ +/* */ +#define TLR_E_TCP_ERR_MAX_DATA_LEN_EXCEEDED_TCP_CMD_SEND ((TLR_RESULT)0xC0080140L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_MAX_DATA_LEN_EXCEEDED_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The maximum UDP data count n in command TCPIP_UDP_CMD_SEND_REQ has exceeded. See parameter ulLen. */ +/* The maximum value for n is TCPIP_MAX_UDP_DATA_CNT (1472). */ +/* */ +#define TLR_E_TCP_ERR_MAX_DATA_LEN_EXCEEDED_UDP_CMD_SEND ((TLR_RESULT)0xC0080141L) + +/* /// IP Configuration errors 0x0150 ... 0x015F (reserved) - implemented further checkings ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_INIT_INVALID_FLAGS_IP_CONFIG */ +/* */ +/* MessageText: */ +/* */ +/* The start parameters configures an invalid flag combination for the manual IP configuration */ +/* (IP_CFG_FLAG_IP_ADDR, IP_CFG_FLAG_NET_MASK, IP_CFG_FLAG_GATEWAY). */ +/* Valid flag combinations are: */ +/* - No flag set: No manual configuration - only DHCP and/or BOOTP */ +/* - IP_CFG_FLAG_IP_ADDR + IP_CFG_FLAG_NET_MASK: Local network without gateway */ +/* - IP_CFG_FLAG_IP_ADDR + IP_CFG_FLAG_NET_MASK + IP_CFG_FLAG_GATEWAY: Network with gateway. */ +/* */ +#define TLR_E_IP_ERR_INIT_INVALID_FLAGS_IP_CONFIG ((TLR_RESULT)0xC0070150L) + +/* //////// - Local source of errors (stack) : 0x0200 ... 0x02FF ////////// */ +/* /// Socket state errors 0x0200 ... 0x020F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_WAIT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_TCP_CMD_WAIT_CONNECT_REQ cannot be executed, because the socket is in an inappropriate state. */ +/* */ +#define TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_WAIT_CONNECT ((TLR_RESULT)0xC0080200L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_TCP_CMD_CONNECT_REQ cannot be executed, because the socket is in an inappropriate state. */ +/* */ +#define TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080201L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_TCP_CMD_SEND_REQ cannot be executed, because the socket is in an inappropriate state. */ +/* */ +#define TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_SEND ((TLR_RESULT)0xC0080202L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_BIND */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_TCP_UDP_CMD_BIND_REQ cannot be executed, because the TCP socket is in an inappropriate state. */ +/* */ +#define TLR_E_TCP_ERR_SOCKET_STATE_TCP_CMD_BIND ((TLR_RESULT)0xC0080203L) + +/* /// Resource errors (queues, buffers) 0x0210 ... 0x021F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_TCP_ERR_NO_FREE_QUEUE_ELEMENT_TCP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The TCP send command TCPIP_TCP_CMD_SEND_REQ must be rejected, because the list of free queue elements is empty. */ +/* Remark: Per default configuration, the initial size of this list is 128. */ +/* Every send command (TCPIP_TCP_CMD_SEND_REQ or TCPIP_UDP_CMD_SEND_REQ) occupy one queue element, until the */ +/* confirmation command is given back to the application. To avoid this resource problem, the application must */ +/* reduce the count of open send jobs over all sockets. */ +/* */ +#define TLR_E_TCP_ERR_NO_FREE_QUEUE_ELEMENT_TCP_CMD_SEND ((TLR_RESULT)0xC0080210L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_NO_FREE_QUEUE_ELEMENT_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The UDP send command TCPIP_UDP_CMD_SEND_REQ must be rejected, because the list of free queue elements is empty. */ +/* Remark: Per default configuration, the initial size of this list is 128. */ +/* Every send command (TCPIP_TCP_CMD_SEND_REQ or TCPIP_UDP_CMD_SEND_REQ) occupy one queue element, until the */ +/* confirmation command is given back to the application. To avoid this resource problem, the application must */ +/* reduce the count of open send jobs over all sockets. */ +/* */ +#define TLR_E_TCP_ERR_NO_FREE_QUEUE_ELEMENT_UDP_CMD_SEND ((TLR_RESULT)0xC0080211L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_NO_ETH_OUT_BUFFER_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The UDP send command TCPIP_UDP_CMD_SEND_REQ must be rejected, because all outgoing Ethernet buffers are occupied. */ +/* */ +#define TLR_E_TCP_ERR_NO_ETH_OUT_BUFFER_UDP_CMD_SEND ((TLR_RESULT)0xC0080212L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_NO_FREE_RESOURCE_FOR_ARP_REQ_INTF */ +/* */ +/* MessageText: */ +/* */ +/* The command TCPIP_IP_CMD_SET_PARAM_REQ in mode IP_PRM_SEND_ARP_REQ/IP_PRM_SEND_ARP_TMT_REQ must be rejected, */ +/* because all free resources for this command are occupied. A maximum of 128 parallel jobs is possible. */ +/* */ +#define TLR_E_TCP_ERR_NO_FREE_RESOURCE_FOR_ARP_REQ_INTF ((TLR_RESULT)0xC0080213L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_ETH_OUT_SEND_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* The send of the outgoing Ethernet buffer has failed. The reason of this error is normally a */ +/* resource problem - there is no EDD buffer available. */ +/* */ +#define TLR_E_TCP_ERR_ETH_OUT_SEND_BUFFER ((TLR_RESULT)0xC0080214L) + +/* /// Multicast errors 0x0220 ... 0x022F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_TCP_ERR_MCAST_CREATE */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create an IP Multicast group. */ +/* */ +#define TLR_E_TCP_ERR_MCAST_CREATE ((TLR_RESULT)0xC0080220L) + +/* //////// - Remote source of errors : 0x0300 ... 0x03FF ////////// */ +/* /// Destination unreachable errors 0x0300 ... 0x030F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_DEST_UNREACHABLE_IP_CMD_PING */ +/* */ +/* MessageText: */ +/* */ +/* The target IP address ulIpAddr in command TCPIP_IP_CMD_PING_REQ is not reachable. */ +/* */ +#define TLR_E_IP_ERR_DEST_UNREACHABLE_IP_CMD_PING ((TLR_RESULT)0xC0070300L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_UDP_CMD_CLOSE */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_UDP_CMD_CLOSE_REQ: The destination (host, network, or port) is unreachable. */ +/* */ +#define TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_UDP_CMD_CLOSE ((TLR_RESULT)0xC0080301L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_UDP_CMD_CLOSE_ALL */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_UDP_CMD_CLOSE_ALL_REQ: The destination (host, network, or port) is unreachable. */ +/* */ +#define TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_UDP_CMD_CLOSE_ALL ((TLR_RESULT)0xC0080302L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_CMD_WAIT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_CMD_WAIT_CONNECT_REQ: The destination (host, network, or port) is unreachable. */ +/* */ +#define TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_CMD_WAIT_CONNECT ((TLR_RESULT)0xC0080303L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_TCP_CMD_CONNECT_REQ: The destination (host, network, or port) is unreachable. */ +/* */ +#define TLR_E_TCP_ERR_DEST_UNREACHABLE_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080304L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_DEST_UNREACHABLE_UDP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* Command TCPIP_UDP_CMD_SEND_REQ: The destination (host, network, or port) is unreachable. */ +/* */ +#define TLR_E_TCP_ERR_DEST_UNREACHABLE_UDP_CMD_SEND ((TLR_RESULT)0xC0080305L) + +/* /// Timeout errors 0x0310 ... 0x031F (reserved) ///// */ +/* */ +/* MessageId: TLR_E_IP_ERR_TIMEOUT_IP_CMD_PING */ +/* */ +/* MessageText: */ +/* */ +/* The specified timeout ulTimeout in command TCPIP_IP_CMD_PING_REQ has expired. */ +/* The specified host is not reachable. */ +/* */ +#define TLR_E_IP_ERR_TIMEOUT_IP_CMD_PING ((TLR_RESULT)0xC0070310L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_TCP_UDP_CMD_CLOSE */ +/* */ +/* MessageText: */ +/* */ +/* The TCP Close timeout has expired. A connection to the remote host could not be closed gracefully */ +/* within this time. */ +/* For this timeout, see command TCPIP_TCP_UDP_CMD_CLOSE_REQ, parameter ulTimeout. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_TCP_UDP_CMD_CLOSE ((TLR_RESULT)0xC0080311L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_TCP_UDP_CMD_CLOSE_ALL */ +/* */ +/* MessageText: */ +/* */ +/* The TCP Close timeout has expired. One or more connections to remote host(s) could not be closed gracefully */ +/* within this time. */ +/* For this timeout, see command TCPIP_TCP_UDP_CMD_CLOSE_ALL_REQ, parameter ulTimeout. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_TCP_UDP_CMD_CLOSE_ALL ((TLR_RESULT)0xC0080312L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_WAIT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The TCP Connect timeout has expired. No remote host has connected within this time. */ +/* For this timeout, see command TCPIP_TCP_CMD_WAIT_CONNECT_REQ, parameter ulTimeoutListen. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_WAIT_CONNECT ((TLR_RESULT)0xC0080313L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* The TCP Connect timeout has expired. A connection to the specified remote host could not be established */ +/* within this time. */ +/* For this timeout, see command TCPIP_TCP_CMD_CONNECT_REQ, parameter ulTimeoutConnect. */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_CONNECT ((TLR_RESULT)0xC0080314L) + +/* */ +/* MessageId: TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_SEND */ +/* */ +/* MessageText: */ +/* */ +/* The TCP Send timeout has expired by sending TCP data with command TCPIP_TCP_CMD_SEND_REQ. */ +/* The remote host has not answered within the Send Timeout. */ +/* The TCP Send timeout is set in command TCPIP_TCP_CMD_WAIT_CONNECT_REQ or */ +/* TCPIP_TCP_CMD_CONNECT_REQ, parameter ulTimeoutSend (Default = 31 s). */ +/* */ +#define TLR_E_TCP_ERR_TIMEOUT_TCP_CMD_SEND ((TLR_RESULT)0xC0080315L) + +/* /// Further errors 0x0xxx ... ///// */ + + + +#endif /* __TCPIP_ERROR_H */ + +#ifndef __TLR_GLOBAL_ERROR_H +#define __TLR_GLOBAL_ERROR_H + +/*****************************************************************************/ +/* Hilscher TLR_STATUS definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* common status codes */ +/*****************************************************************************/ + +/* */ +/* MessageId: TLR_S_OK */ +/* */ +/* MessageText: */ +/* */ +/* Operation succeeded. */ +/* */ +#define TLR_S_OK ((TLR_RESULT)0x00000000L) + +/* */ +/* MessageId: TLR_E_FAIL */ +/* */ +/* MessageText: */ +/* */ +/* Common error, detailed error information optionally present in the data area of packet. */ +/* */ +#define TLR_E_FAIL ((TLR_RESULT)0xC0000001L) + +/* */ +/* MessageId: TLR_E_UNEXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected failure. */ +/* */ +#define TLR_E_UNEXPECTED ((TLR_RESULT)0xC0000002L) + +/* */ +/* MessageId: TLR_E_OUTOFMEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Ran out of memory. */ +/* */ +#define TLR_E_OUTOFMEMORY ((TLR_RESULT)0xC0000003L) + +/* */ +/* MessageId: TLR_E_UNKNOWN_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Unknown Command in Packet received. */ +/* */ +#define TLR_E_UNKNOWN_COMMAND ((TLR_RESULT)0xC0000004L) + +/* */ +/* MessageId: TLR_E_UNKNOWN_DESTINATION */ +/* */ +/* MessageText: */ +/* */ +/* Unknown Destination in Packet received. */ +/* */ +#define TLR_E_UNKNOWN_DESTINATION ((TLR_RESULT)0xC0000005L) + +/* */ +/* MessageId: TLR_E_UNKNOWN_DESTINATION_ID */ +/* */ +/* MessageText: */ +/* */ +/* Unknown Destination Id in Packet received. */ +/* */ +#define TLR_E_UNKNOWN_DESTINATION_ID ((TLR_RESULT)0xC0000006L) + +/* */ +/* MessageId: TLR_E_INVALID_PACKET_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Packet length is invalid. */ +/* */ +#define TLR_E_INVALID_PACKET_LEN ((TLR_RESULT)0xC0000007L) + +/* */ +/* MessageId: TLR_E_INVALID_EXTENSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Extension in Packet received. */ +/* */ +#define TLR_E_INVALID_EXTENSION ((TLR_RESULT)0xC0000008L) + +/* */ +/* MessageId: TLR_E_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Parameter in Packet found. */ +/* */ +#define TLR_E_INVALID_PARAMETER ((TLR_RESULT)0xC0000009L) + +/* */ +/* MessageId: TLR_E_INVALID_ALIGNMENT */ +/* */ +/* MessageText: */ +/* */ +/* Invalid alignment. */ +/* */ +#define TLR_E_INVALID_ALIGNMENT ((TLR_RESULT)0xC000000AL) + +/* */ +/* MessageId: TLR_E_WATCHDOG_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog error occurred. */ +/* */ +#define TLR_E_WATCHDOG_TIMEOUT ((TLR_RESULT)0xC000000CL) + +/* */ +/* MessageId: TLR_E_INVALID_LIST_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* List type is invalid. */ +/* */ +#define TLR_E_INVALID_LIST_TYPE ((TLR_RESULT)0xC000000DL) + +/* */ +/* MessageId: TLR_E_UNKNOWN_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Handle is unknown. */ +/* */ +#define TLR_E_UNKNOWN_HANDLE ((TLR_RESULT)0xC000000EL) + +/* */ +/* MessageId: TLR_E_PACKET_OUT_OF_SEQ */ +/* */ +/* MessageText: */ +/* */ +/* A packet index has been not in the expected sequence. */ +/* */ +#define TLR_E_PACKET_OUT_OF_SEQ ((TLR_RESULT)0xC000000FL) + +/* */ +/* MessageId: TLR_E_PACKET_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* The amount of fragmented data contained the packet sequence has been too large. */ +/* */ +#define TLR_E_PACKET_OUT_OF_MEMORY ((TLR_RESULT)0xC0000010L) + +/* */ +/* MessageId: TLR_E_QUE_PACKETDONE */ +/* */ +/* MessageText: */ +/* */ +/* The packet done function has failed. */ +/* */ +#define TLR_E_QUE_PACKETDONE ((TLR_RESULT)0xC0000011L) + +/* */ +/* MessageId: TLR_E_QUE_SENDPACKET */ +/* */ +/* MessageText: */ +/* */ +/* The sending of a packet has failed. */ +/* */ +#define TLR_E_QUE_SENDPACKET ((TLR_RESULT)0xC0000012L) + +/* */ +/* MessageId: TLR_E_POOL_PACKET_GET */ +/* */ +/* MessageText: */ +/* */ +/* The request of a packet from packet pool has failed. */ +/* */ +#define TLR_E_POOL_PACKET_GET ((TLR_RESULT)0xC0000013L) + +/* */ +/* MessageId: TLR_E_POOL_PACKET_RELEASE */ +/* */ +/* MessageText: */ +/* */ +/* The release of a packet to packet pool has failed. */ +/* */ +#define TLR_E_POOL_PACKET_RELEASE ((TLR_RESULT)0xC0000014L) + +/* */ +/* MessageId: TLR_E_POOL_GET_LOAD */ +/* */ +/* MessageText: */ +/* */ +/* The get packet pool load function has failed. */ +/* */ +#define TLR_E_POOL_GET_LOAD ((TLR_RESULT)0xC0000015L) + +/* */ +/* MessageId: TLR_E_QUE_GET_LOAD */ +/* */ +/* MessageText: */ +/* */ +/* The get queue load function has failed. */ +/* */ +#define TLR_E_QUE_GET_LOAD ((TLR_RESULT)0xC0000016L) + +/* */ +/* MessageId: TLR_E_QUE_WAITFORPACKET */ +/* */ +/* MessageText: */ +/* */ +/* The waiting for a packet from queue has failed. */ +/* */ +#define TLR_E_QUE_WAITFORPACKET ((TLR_RESULT)0xC0000017L) + +/* */ +/* MessageId: TLR_E_QUE_POSTPACKET */ +/* */ +/* MessageText: */ +/* */ +/* The posting of a packet has failed. */ +/* */ +#define TLR_E_QUE_POSTPACKET ((TLR_RESULT)0xC0000018L) + +/* */ +/* MessageId: TLR_E_QUE_PEEKPACKET */ +/* */ +/* MessageText: */ +/* */ +/* The peek of a packet from queue has failed. */ +/* */ +#define TLR_E_QUE_PEEKPACKET ((TLR_RESULT)0xC0000019L) + +/* */ +/* MessageId: TLR_E_REQUEST_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Request is already running. */ +/* */ +#define TLR_E_REQUEST_RUNNING ((TLR_RESULT)0xC000001AL) + +/* */ +/* MessageId: TLR_E_CREATE_TIMER */ +/* */ +/* MessageText: */ +/* */ +/* Creating a timer failed. */ +/* */ +#define TLR_E_CREATE_TIMER ((TLR_RESULT)0xC000001BL) + +/* */ +/* MessageId: TLR_E_INIT_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* General initialization fault. */ +/* */ +#define TLR_E_INIT_FAULT ((TLR_RESULT)0xC0000100L) + +/* */ +/* MessageId: TLR_E_DATABASE_ACCESS_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Database access failure. */ +/* */ +#define TLR_E_DATABASE_ACCESS_FAILED ((TLR_RESULT)0xC0000101L) + +/* */ +/* MessageId: TLR_E_CIR_MASTER_PARAMETER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Master parameter can not activated at state operate. */ +/* */ +#define TLR_E_CIR_MASTER_PARAMETER_FAILED ((TLR_RESULT)0xC0000102L) + +/* */ +/* MessageId: TLR_E_CIR_SLAVE_PARAMTER_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Slave parameter can not activated at state operate. */ +/* */ +#define TLR_E_CIR_SLAVE_PARAMTER_FAILED ((TLR_RESULT)0xC0000103L) + +/* */ +/* MessageId: TLR_E_NOT_CONFIGURED */ +/* */ +/* MessageText: */ +/* */ +/* Configuration not available */ +/* */ +#define TLR_E_NOT_CONFIGURED ((TLR_RESULT)0xC0000119L) + +/* */ +/* MessageId: TLR_E_CONFIGURATION_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* General configuration fault. */ +/* */ +#define TLR_E_CONFIGURATION_FAULT ((TLR_RESULT)0xC0000120L) + +/* */ +/* MessageId: TLR_E_INCONSISTENT_DATA_SET */ +/* */ +/* MessageText: */ +/* */ +/* Inconsistent configuration data. */ +/* */ +#define TLR_E_INCONSISTENT_DATA_SET ((TLR_RESULT)0xC0000121L) + +/* */ +/* MessageId: TLR_E_DATA_SET_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* Configuration data set mismatch. */ +/* */ +#define TLR_E_DATA_SET_MISMATCH ((TLR_RESULT)0xC0000122L) + +/* */ +/* MessageId: TLR_E_INSUFFICIENT_LICENSE */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient license. */ +/* */ +#define TLR_E_INSUFFICIENT_LICENSE ((TLR_RESULT)0xC0000123L) + +/* */ +/* MessageId: TLR_E_PARAMETER_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Parameter error. */ +/* */ +#define TLR_E_PARAMETER_ERROR ((TLR_RESULT)0xC0000124L) + +/* */ +/* MessageId: TLR_E_INVALID_NETWORK_ADDRESS */ +/* */ +/* MessageText: */ +/* */ +/* Network address invalid. */ +/* */ +#define TLR_E_INVALID_NETWORK_ADDRESS ((TLR_RESULT)0xC0000125L) + +/* */ +/* MessageId: TLR_E_NO_SECURITY_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Security memory chip missing or broken. */ +/* */ +#define TLR_E_NO_SECURITY_MEMORY ((TLR_RESULT)0xC0000126L) + +/* */ +/* MessageId: TLR_E_NETWORK_FAULT */ +/* */ +/* MessageText: */ +/* */ +/* General communication fault. */ +/* */ +#define TLR_E_NETWORK_FAULT ((TLR_RESULT)0xC0000140L) + +/* */ +/* MessageId: TLR_E_CONNECTION_CLOSED */ +/* */ +/* MessageText: */ +/* */ +/* Connection closed. */ +/* */ +#define TLR_E_CONNECTION_CLOSED ((TLR_RESULT)0xC0000141L) + +/* */ +/* MessageId: TLR_E_CONNECTION_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Connection timeout. */ +/* */ +#define TLR_E_CONNECTION_TIMEOUT ((TLR_RESULT)0xC0000142L) + +/* */ +/* MessageId: TLR_E_LONELY_NETWORK */ +/* */ +/* MessageText: */ +/* */ +/* Lonely network. */ +/* */ +#define TLR_E_LONELY_NETWORK ((TLR_RESULT)0xC0000143L) + +/* */ +/* MessageId: TLR_E_DUPLICATE_NODE */ +/* */ +/* MessageText: */ +/* */ +/* Duplicate network address. */ +/* */ +#define TLR_E_DUPLICATE_NODE ((TLR_RESULT)0xC0000144L) + +/* */ +/* MessageId: TLR_E_CABLE_DISCONNECT */ +/* */ +/* MessageText: */ +/* */ +/* Cable disconnected. */ +/* */ +#define TLR_E_CABLE_DISCONNECT ((TLR_RESULT)0xC0000145L) + +/* */ +/* MessageId: TLR_E_BUS_OFF */ +/* */ +/* MessageText: */ +/* */ +/* Bus Off flag is set. */ +/* */ +#define TLR_E_BUS_OFF ((TLR_RESULT)0xC0000180L) + +/* */ +/* MessageId: TLR_E_CONFIG_LOCK */ +/* */ +/* MessageText: */ +/* */ +/* Changing configuration is not allowed. */ +/* */ +#define TLR_E_CONFIG_LOCK ((TLR_RESULT)0xC0000181L) + +/* */ +/* MessageId: TLR_E_APPLICATION_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* Application is not at ready state. */ +/* */ +#define TLR_E_APPLICATION_NOT_READY ((TLR_RESULT)0xC0000182L) + +/* */ +/* MessageId: TLR_E_RESET_IN_PROCESS */ +/* */ +/* MessageText: */ +/* */ +/* Application is performing a reset. */ +/* */ +#define TLR_E_RESET_IN_PROCESS ((TLR_RESULT)0xC0000183L) + +/* */ +/* MessageId: TLR_E_WATCHDOG_TIME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog time is out of range. */ +/* */ +#define TLR_E_WATCHDOG_TIME_INVALID ((TLR_RESULT)0xC0000200L) + +/* */ +/* MessageId: TLR_E_APPLICATION_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Application is already registered. */ +/* */ +#define TLR_E_APPLICATION_ALREADY_REGISTERED ((TLR_RESULT)0xC0000201L) + +/* */ +/* MessageId: TLR_E_NO_APPLICATION_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* No application registered. */ +/* */ +#define TLR_E_NO_APPLICATION_REGISTERED ((TLR_RESULT)0xC0000202L) + +/* */ +/* MessageId: TLR_S_FRAGMENTED */ +/* */ +/* MessageText: */ +/* */ +/* Fragment accepted. */ +/* */ +#define TLR_S_FRAGMENTED ((TLR_RESULT)0x0000F005L) + +/* */ +/* MessageId: TLR_E_RESET_REQUIRED */ +/* */ +/* MessageText: */ +/* */ +/* Reset required. */ +/* */ +#define TLR_E_RESET_REQUIRED ((TLR_RESULT)0xC000F006L) + +/*****************************************************************************/ +/* TLR Timer Packet Status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_TIMER_TASK_INVALID_INSTANCE */ +/* */ +/* MessageText: */ +/* */ +/* Task Instance is invalid. Multiple instances of TLR Timer task are forbidden. */ +/* */ +#define TLR_E_TIMER_TASK_INVALID_INSTANCE ((TLR_RESULT)0xC0020001L) + +/* */ +/* MessageId: TLR_E_TIMER_IRQ_PARAM_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Interrupt Timer Handle is invalid. */ +/* */ +#define TLR_E_TIMER_IRQ_PARAM_INVALID_HANDLE ((TLR_RESULT)0xC0020002L) + +/* */ +/* MessageId: TLR_E_TIMER_IRQ_PARAM_INVALID_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Interrupt Timer Reload Value is invalid. */ +/* */ +#define TLR_E_TIMER_IRQ_PARAM_INVALID_VALUE ((TLR_RESULT)0xC0020003L) + +/* */ +/* MessageId: TLR_E_TIMER_IRQ_RESOURCE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* There is no resource to create an interrupt timer. */ +/* */ +#define TLR_E_TIMER_IRQ_RESOURCE_CREATE_FAILED ((TLR_RESULT)0xC0020004L) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_PARAM_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Application Timer Handle is invalid. */ +/* */ +#define TLR_E_TIMER_APPL_PARAM_INVALID_HANDLE ((TLR_RESULT)0xC0020005L) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_PARAM_INVALID_VALUE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Application Timer Reload Value is invalid. */ +/* */ +#define TLR_E_TIMER_APPL_PARAM_INVALID_VALUE ((TLR_RESULT)0xC0020006L) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_PARAM_INVALID_QUEUE */ +/* */ +/* MessageText: */ +/* */ +/* Parameter Queue Handle is invalid. */ +/* */ +#define TLR_E_TIMER_APPL_PARAM_INVALID_QUEUE ((TLR_RESULT)0xC0020007L) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_RESOURCE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* There is no resource to create an application timer. */ +/* */ +#define TLR_E_TIMER_APPL_RESOURCE_CREATE_FAILED ((TLR_RESULT)0xC0020008L) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_RESOURCE_INSERTED */ +/* */ +/* MessageText: */ +/* */ +/* Application timer is already inserted into timer list. */ +/* */ +#define TLR_E_TIMER_APPL_RESOURCE_INSERTED ((TLR_RESULT)0xC0020009L) + +/* */ +/* MessageId: TLR_E_TIMER_PACKET_RESOURCE_CREATE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* No Resource to retry sending of packet. */ +/* */ +#define TLR_E_TIMER_PACKET_RESOURCE_CREATE_FAILED ((TLR_RESULT)0xC002000AL) + +/* */ +/* MessageId: TLR_E_TIMER_TASK_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* TLR Timer Task not initialized. */ +/* */ +#define TLR_E_TIMER_TASK_NOT_INITIALIZED ((TLR_RESULT)0xC002000BL) + +/* */ +/* MessageId: TLR_E_TIMER_APPL_PACKET_SENT */ +/* */ +/* MessageText: */ +/* */ +/* Packet of application timer was sent to queue. */ +/* */ +#define TLR_E_TIMER_APPL_PACKET_SENT ((TLR_RESULT)0xC002000CL) + +/*****************************************************************************/ +/* User Area */ +/*****************************************************************************/ + +/* */ +/* MessageId: TLR_S_USER_AREA */ +/* */ +/* MessageText: */ +/* */ +/* User code. */ +/* */ +#define TLR_S_USER_AREA ((TLR_RESULT)0x0FF00000L) + + + + +#endif /* __TLR_GLOBAL_ERROR_H */ + +#ifndef __TLR_ROUTER_ERROR_H +#define __TLR_ROUTER_ERROR_H + + + + +/*****************************************************************************/ +/* TLR router error/status codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_ROUTER_PACKET_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* Router: Packet is too big (maximum overall size is 2048 Bytes). */ +/* */ +#define TLR_E_ROUTER_PACKET_TOO_BIG ((TLR_RESULT)0xC02F0001L) + +/* */ +/* MessageId: TLR_E_ROUTER_LINK_INACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Router: Link inactive. */ +/* */ +#define TLR_E_ROUTER_LINK_INACTIVE ((TLR_RESULT)0xC02F0002L) + +/* */ +/* MessageId: TLR_E_ROUTER_FRAGMENT_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* Router: Fragment Missing. */ +/* */ +#define TLR_E_ROUTER_FRAGMENT_MISSING ((TLR_RESULT)0xC02F0003L) + +/* */ +/* MessageId: TLR_E_ROUTER_SEND_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Router: Packet Send Timeout reached. */ +/* */ +#define TLR_E_ROUTER_SEND_TIMEOUT ((TLR_RESULT)0xC02F0004L) + +/* */ +/* MessageId: TLR_E_ROUTER_LOGICAL_QUEUE_UNDEFINED */ +/* */ +/* MessageText: */ +/* */ +/* Router: Logical queue handle is undefined. */ +/* */ +#define TLR_E_ROUTER_LOGICAL_QUEUE_UNDEFINED ((TLR_RESULT)0xC02F0005L) + + + + +#endif /* __TLR_ROUTER_ERROR_H */ + +#ifndef __UDP_DEBUG_ERROR_H +#define __UDP_DEBUG_ERROR_H + +/*****************************************************************************/ +/* UDP Debug Client */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_DEBUG_CLIENT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_DEBUG_CLIENT_COMMAND_INVALID ((TLR_RESULT)0xC01B0001L) + + + + +#endif /* __UDP_DEBUG_ERROR_H */ + +#ifndef __USB_ROUTER_ERROR_H +#define __USB_ROUTER_ERROR_H + +/*****************************************************************************/ +/* Usb-TLR-Router Task */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_USB_TLRROUTER_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_USB_TLRROUTER_COMMAND_INVALID ((TLR_RESULT)0xC0440001L) + + + + +#endif /* __USB_ROUTER_ERROR_H */ + +#ifndef __VARAN_CLIENT_APP_ERROR_H +#define __VARAN_CLIENT_APP_ERROR_H + +/*****************************************************************************/ +/* VARAN Client APP ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_AP_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_VARAN_CLIENT_AP_COMMAND_INVALID ((TLR_RESULT)0xC09D0000L) + + + + +#endif /* __VARAN_CLIENT_AP_ERROR_H */ + +#ifndef __VARAN_CLIENT_ERROR_H +#define __VARAN_CLIENT_ERROR_H + +/*****************************************************************************/ +/* VARAN Client ERROR codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command received. */ +/* */ +#define TLR_E_VARAN_CLIENT_COMMAND_INVALID ((TLR_RESULT)0xC09C0000L) + +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_INV_PRM_WATCHDOG_TIME */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for client watchdog time. */ +/* */ +#define TLR_E_VARAN_CLIENT_INV_PRM_WATCHDOG_TIME ((TLR_RESULT)0xC09C0001L) + +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_INV_PRM_MEM_RW_LEN */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for memory area length. */ +/* */ +#define TLR_E_VARAN_CLIENT_INV_PRM_MEM_RW_LEN ((TLR_RESULT)0xC09C0002L) + +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_INV_PRM_MEM_OFFSET */ +/* */ +/* MessageText: */ +/* */ +/* Invalid value for memory area offset. */ +/* */ +#define TLR_E_VARAN_CLIENT_INV_PRM_MEM_OFFSET ((TLR_RESULT)0xC09C0003L) + +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_INV_PRM_MEM_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* Parameter for memory Area1 and Area2 are in mismatch. */ +/* */ +#define TLR_E_VARAN_CLIENT_INV_PRM_MEM_MISMATCH ((TLR_RESULT)0xC09C0004L) + +/* */ +/* MessageId: TLR_E_VARAN_CLIENT_INV_PRM_IDENTITY */ +/* */ +/* MessageText: */ +/* */ +/* Parameter for identity is invalid. */ +/* */ +#define TLR_E_VARAN_CLIENT_INV_PRM_IDENTITY ((TLR_RESULT)0xC09C0005L) + + + + +#endif /* __VARAN_CLIOENT_ERROR_H */ + +#ifndef __VIRTUALSWITCH_ERROR_H +#define __VIRTUALSWITCH_ERROR_H + +/*****************************************************************************/ +/* VirtualSwitch error codes */ +/*****************************************************************************/ +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_VIRTUALSWITCH_COMMAND_INVALID ((TLR_RESULT)0xC0270001L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_PORT_ALREADY_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Port parameter already defined by another port. */ +/* */ +#define TLR_E_VIRTUALSWITCH_PORT_ALREADY_REGISTERED ((TLR_RESULT)0xC0270002L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_OUT_OF_MEMORY */ +/* */ +/* MessageText: */ +/* */ +/* Out of memory. */ +/* */ +#define TLR_E_VIRTUALSWITCH_OUT_OF_MEMORY ((TLR_RESULT)0xC0270003L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_INVALID_PORT_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid port handle. */ +/* */ +#define TLR_E_VIRTUALSWITCH_INVALID_PORT_HANDLE ((TLR_RESULT)0xC0270004L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_INVALID_PORT_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid port mode. */ +/* */ +#define TLR_E_VIRTUALSWITCH_INVALID_PORT_MODE ((TLR_RESULT)0xC0270005L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_TABLE_ALREADY_CREATED */ +/* */ +/* MessageText: */ +/* */ +/* MAC routing table already created. */ +/* */ +#define TLR_E_VIRTUALSWITCH_TABLE_ALREADY_CREATED ((TLR_RESULT)0xC0270006L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_TABLE_INSTANCE_NOT_PREDEFINED */ +/* */ +/* MessageText: */ +/* */ +/* Named Virtual Switch Instance does not exist. */ +/* */ +#define TLR_E_VIRTUALSWITCH_TABLE_INSTANCE_NOT_PREDEFINED ((TLR_RESULT)0xC0270007L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_NO_SUCH_NAME */ +/* */ +/* MessageText: */ +/* */ +/* No such name. */ +/* */ +#define TLR_E_VIRTUALSWITCH_NO_SUCH_NAME ((TLR_RESULT)0xC0270008L) + +/* */ +/* MessageId: TLR_E_VIRTUALSWITCH_NAME_EXISTS_ALREADY */ +/* */ +/* MessageText: */ +/* */ +/* Name exists already. */ +/* */ +#define TLR_E_VIRTUALSWITCH_NAME_EXISTS_ALREADY ((TLR_RESULT)0xC0270009L) + + + +#endif /* __VIRTUALSWITCH_ERROR_H */ + diff --git a/examples/tcpserver/Marshaller/APIHeader/TLR_Types.h b/examples/tcpserver/Marshaller/APIHeader/TLR_Types.h new file mode 100644 index 0000000..cead5bd --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/TLR_Types.h @@ -0,0 +1,403 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: TLR_Types.h 13107 2019-08-15 08:42:43Z Robert $: + + Description: + TLR type definitions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2015-03-31 Added guard for _MSC_VER to allow compilation using -wundef + 2015-01-15 Undo packing of TLR_PACKET_HEADER_T/TLR_UUID_T to avoid alignment issues + 2014-07-07 Added support for IAR C/C++ Compiler (ARM Cores only) + 2014-04-28 Added support for armcc compiler, + packed TLR_PACKET_HEADER_T and TLR_UUID_T to handle + strict packing rules of armcc compiler + 2010-06-14 Added __PACKED_PRE / POST macros (as old header + files might illegally contain them. Theses files + should be changed to use __TLR_PACKED_PRE / POST) + 2010-04-27 Re-added all TLR_TASK_UID_xx from TLR_Common.h + Re-added TLR_TASK_UID_T from TLR_Common.h + 2010-04-14 Added Logical Queue defines TLR_PACKET_DEST_xx + 2010-04-07 Added TLR_TBF_BUFFERPOOL_T, TLR_TBF_CALLBACK + 2010-03-23 File created. + +**************************************************************************************/ + + +#ifndef __TLR_TYPES_H +#define __TLR_TYPES_H + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + + + +/*****************************************************************************/ +/* Include Files Required */ +/*****************************************************************************/ + +#if defined( __RX_INCLUDES_H ) + #error Problem with include order. Please include TLR_Includes.h before rX_Includes.h. +#endif + +#if defined (__TLR_USE_CUSTOM_TYPES__) + #include "TLR_CustomTypes.h" +#else + #include /* ISO/IEC 9899:1999 fixed width data types */ +#endif + + + +/*****************************************************************************/ +/* Symbol Definitions */ +/*****************************************************************************/ + + +/************************ General Symbol Definitions *************************/ + +/* boolean evaluation */ +#define TLR_FALSE (0) +#define TLR_TRUE (1) + +/* pointer types */ +#ifndef FAR + #define FAR +#endif /* FAR */ + +/* storage classes */ +#ifndef CONST + #define CONST const +#endif /* CONST */ + +#ifndef EXTERN + #define EXTERN extern +#endif /* EXTERN */ + +#ifndef STATIC + #define STATIC static +#endif /* STATIC */ + + +/******************* Compiler Specific Symbol Definitions ********************/ + +/* MSVC defines a version rather than a key symbol. Prepare standard key symbol handling. */ +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #define __MSVC__ + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + + +/* check for known compilers using the key symbols of which one should be defined */ +#if !defined (__GNUC__) && !defined (__MSVC__) && !defined (__ADS__) && !defined (__REALVIEW__) && !defined (__CC_ARM) && !defined (__ICCARM__) && !defined(__TLR_USE_CUSTOM_COMPILER__) + #error Unknown compiler type. (Check definitions in TLR_Types.h.) +#endif /* __MSVC__, __GNUC__, __ADS__, __REALVIEW__ */ + + +/* specific definitions for GNU C compiler */ +#if defined (__GNUC__) + /* tight packing of structure members */ + #define __TLR_PACKED_PRE + #define __TLR_PACKED_POST __attribute__ ((packed)) + /* redefinition for inline */ + #ifndef INLINE + #define INLINE static inline + #endif /* INLINE */ +#endif /* __GNUC__ */ + + +/* specific definitions for Microsoft C compiler */ +#if defined (__MSVC__) + /* tight packing of structure members */ + #define __TLR_PACKED_PRE + #define __TLR_PACKED_POST + #define PRAGMA_PACK_ENABLE + #define PRAGMA_PACK_1(label) pack(push, label, 1) + #define PRAGMA_UNPACK_1(label) pack(pop, label) + /* redefinition for inline */ + #ifndef INLINE + #define INLINE static + #endif /* INLINE */ + /* strict data type checking */ + #ifndef STRICT + #define STRICT + #endif +#endif /* _MSC_VER >= 1000 */ + + +/* specific definitions for REALVIEW ARM and IAR compiler (ARM cores only) */ +#if defined (__ADS__) || defined (__REALVIEW__) || defined (__CC_ARM) || defined (__ICCARM__) + /* tight packing of structure members */ + #define __TLR_PACKED_PRE __packed + #define __TLR_PACKED_POST + /* redefinition for inline */ + #ifndef INLINE + #define INLINE static + #endif /* INLINE */ +#endif /* __ADS__, __REALVIEW__ */ + +#if defined(__TLR_USE_CUSTOM_COMPILER__) + #include +#endif /* __TLR_USE_CUSTOM_COMPILER__ */ + +#ifndef __RCX__ + #ifndef __PACKED_PRE + #define __PACKED_PRE __TLR_PACKED_PRE + #endif + + #ifndef __PACKED_POST + #define __PACKED_POST __TLR_PACKED_POST + #endif +#endif + +/************************ General Packet Definitions *************************/ + +/* total packet size definition */ +#define TLR_MAX_PACKET_SIZE (1596) + + +/* Logical Queue defines */ +#define TLR_PACKET_DEST_MID_SYS (0) +#define TLR_PACKET_DEST_CHANNEL_0 (1) +#define TLR_PACKET_DEST_CHANNEL_1 (2) +#define TLR_PACKET_DEST_CHANNEL_2 (3) +#define TLR_PACKET_DEST_CHANNEL_3 (4) + +#define TLR_PACKET_DEST_DEFAULT_CHANNEL (32) + + +/*** Definitions for the Packet Extension Field ***/ + +/* mask for sequence number and sequence control portions */ +#define TLR_PACKET_SEQ_NR_MASK (0x0000003F) /* used for filtering the sequence number */ +#define TLR_PACKET_SEQ_MASK (0x000000C0) /* used for filtering the sequence control code */ + +/* sequence control codes */ +#define TLR_PACKET_SEQ_NONE (0x00000000) /* packet is not part of a packet sequence */ +#define TLR_PACKET_SEQ_LAST (0x00000040) /* last packet of a packet sequence */ +#define TLR_PACKET_SEQ_FIRST (0x00000080) /* first packet of a packet sequence */ +#define TLR_PACKET_SEQ_MIDDLE (0x000000C0) /* packet in the middle of a packet sequence */ + +/* packet handling flags */ +#define TLR_PACKET_NOT_DELETE (0x00000100) /* packet must not be returned to a packet pool */ +#define TLR_PACKET_RETRY (0x00000200) /* packet will be resent based on a predefined retry mechanism */ + +/* router flags */ +#define TLR_PACKET_NO_CNF_THRU_ROUTER (0x00000400) /* router must not send response/confirmation packet back */ + + +/*********************** Task Types for TLR_TASK_UID_T ***********************/ + +/* task type not set */ +#define TLR_TASK_UID_TASK_TYPE_INVALID (0x0000) +/* user application task */ +#define TLR_TASK_UID_TASK_TYPE_USER (0x0001) +/* task belonging to a communication protocol stack */ +#define TLR_TASK_UID_TASK_TYPE_PROTOCOL_STACK (0x0002) +/* task belonging to the rcX operating system */ +#define TLR_TASK_UID_TASK_TYPE_RCX (0x0003) +/* task belonging to the Windows CE operating system */ +#define TLR_TASK_UID_TASK_TYPE_WINCE (0x0004) +/* XPEC channel that has not yet been allocated by a protocol stack */ +#define TLR_TASK_UID_TASK_TYPE_XPEC (0x0005) + + +/********************* Protocol Types for TLR_TASK_UID_T *********************/ + +/* protocol type IDs for TLR_TASK_UID_TASK_TYPE_PROTOCOL_STACK */ +#define TLR_TASK_UID_STACK_PROFINET_SLAVE (0x00000001) +#define TLR_TASK_UID_STACK_PROFINET_MASTER (0x00000002) +#define TLR_TASK_UID_STACK_PROFIBUS_SLAVE (0x00000003) +#define TLR_TASK_UID_STACK_PROFIBUS_MASTER (0x00000004) +#define TLR_TASK_UID_STACK_POWERLINK_SLAVE (0x00000005) +#define TLR_TASK_UID_STACK_ETHERNETIP_MASTER (0x00000006) +#define TLR_TASK_UID_STACK_ETHERNETIP_SLAVE (0x00000007) +#define TLR_TASK_UID_STACK_ETHERCAT_SLAVE (0x00000008) +#define TLR_TASK_UID_STACK_TCPIP (0x00000009) +#define TLR_TASK_UID_STACK_ASI_MASTER (0x0000000A) +#define TLR_TASK_UID_STACK_PROFIBUS (0x0000000B) +#define TLR_TASK_UID_STACK_SERCOSIII_SLAVE (0x0000000C) +#define TLR_TASK_UID_STACK_ETHERCAT_MASTER (0x0000000D) + +/* protocol type IDs for TLR_TASK_UID_TASK_TYPE_RCX */ +#define TLR_TASK_UID_RCX_MID_SYS (0x00000001) +#define TLR_TASK_UID_RCX_MID_DBG (0x00000002) + + + +/*****************************************************************************/ +/* Class, Type, and Structure Definitions */ +/*****************************************************************************/ + +#if !defined (__TLR_USE_CUSTOM_TYPES__) + /* signed integers with defined length */ + typedef int8_t TLR_INT8; + typedef int16_t TLR_INT16; + typedef int32_t TLR_INT32; + typedef int64_t TLR_INT64; + /* unsigned integers with defined length */ + typedef uint8_t TLR_UINT8; + typedef uint16_t TLR_UINT16; + typedef uint32_t TLR_UINT32; + typedef uint64_t TLR_UINT64; + /* 8-bit ANSI characters */ + typedef char TLR_CHAR; + typedef char TLR_STR; + /* data types with machine word length (avoid use in structures) */ + typedef int TLR_INT; + typedef unsigned int TLR_UINT; + typedef unsigned int TLR_BOOLEAN; +#endif + +/* simply nothing */ +typedef void TLR_VOID; + +/* boolean values with defined length */ +typedef TLR_UINT8 TLR_BOOLEAN8; +typedef TLR_UINT32 TLR_BOOLEAN32; + +/* context specific data types */ +typedef TLR_UINT32 TLR_RESULT; +typedef TLR_UINT32 TLR_STATUS; +typedef void* TLR_HANDLE; + + +/******************** Other Basic Structure Definitions **********************/ + +/* UUID */ +typedef struct +{ + TLR_UINT32 ulData1; + TLR_UINT16 usData2; + TLR_UINT16 usData3; + TLR_UINT8 abData4[8]; +} TLR_UUID_T; + + +/* task UUID with special meaning of the elements */ +typedef __TLR_PACKED_PRE struct +{ + TLR_UINT32 ulProtocolType; /* see TLR_TASK_UID_STACK_xxx */ + TLR_UINT16 usMajorVersion; /* major number of the task (or stack) version */ + TLR_UINT16 usTaskType; /* see TLR_TASK_UID_TASK_TYPE_xxx */ + TLR_UINT32 ulLayerLevel; /* layer number (per the OSI model) */ + TLR_UINT32 ulLayerSubTask; /* subtask number, e.g. in case of multiple channels */ +} __TLR_PACKED_POST TLR_TASK_UID_T; + + +/* destination queue link (used for routing support) */ +typedef struct +{ + TLR_HANDLE hQue; /* handle of the queue to send the packets to */ + TLR_UINT32 ulDest; /* ulDest value for the packets to send */ + TLR_UINT32 ulDestId; /* ulDestId value for the packets to send */ + TLR_UINT32 ulMTU; /* maximum transfer unit to be sent unfragmented */ +} TLR_QUE_LINK_T; + + +/* source queue link (used for routing support) */ +typedef struct +{ + TLR_UINT32 ulSrc; /* ulSrc value for the packets to send back */ + TLR_UINT32 ulSrcId; /* ulSrcId value for the packets to send back */ +} TLR_QUE_LINK_SOURCE_T; + + +/* packed access */ +__TLR_PACKED_PRE struct TLR_PACKED_UINT16_Ttag { + TLR_UINT16 usData; +} __TLR_PACKED_POST; +typedef struct TLR_PACKED_UINT16_Ttag TLR_PACKED_UINT16_T; + + +__TLR_PACKED_PRE struct TLR_PACKED_UINT32_Ttag { + TLR_UINT32 ulData; +} __TLR_PACKED_POST; +typedef struct TLR_PACKED_UINT32_Ttag TLR_PACKED_UINT32_T; + + +/* buffer pointer set (Triple buffer - TBF) */ +typedef struct +{ + TLR_UINT8* pabBufA; + TLR_UINT8* pabBufB; + TLR_UINT8* pabBufC; +} TLR_BUFFERPOOL_T; + +typedef TLR_BUFFERPOOL_T TLR_TBF_BUFFERPOOL_T; +typedef TLR_VOID (*TLR_TBF_CALLBACK)(TLR_HANDLE hTripleBuffer, TLR_VOID* pvParam); + + +/*********************** Packet Structure Definitions ************************/ + +/* packet header definition */ +typedef struct +{ + TLR_UINT32 ulDest; /* destination of the packet (task message queue reference) */ + TLR_UINT32 ulSrc; /* source of the packet (task message queue reference) */ + TLR_UINT32 ulDestId; /* destination reference (internal use for message routing) */ + TLR_UINT32 ulSrcId; /* source reference (internal use for message routing) */ + TLR_UINT32 ulLen; /* length of packet data (starting from the end of the header) */ + TLR_UINT32 ulId; /* identification reference (internal use by the sender) */ + TLR_UINT32 ulSta; /* operation status code (error code, initialize with 0) */ + TLR_UINT32 ulCmd; /* operation command code */ + TLR_UINT32 ulExt; /* extension count (nonzero in multi-packet transfers) */ + TLR_UINT32 ulRout; /* router reference (internal use for message routing) */ +} TLR_PACKET_HEADER_T; + + +/* definition of a packet with maximum size */ +typedef struct +{ + TLR_PACKET_HEADER_T tHead; + TLR_UINT8 abData[TLR_MAX_PACKET_SIZE - sizeof (TLR_PACKET_HEADER_T)]; +} TLR_PACKET_T; + + +/* definition of a packet with minimum size */ +typedef struct +{ + TLR_PACKET_HEADER_T tHead; +} TLR_EMPTY_PACKET_T; + + + +/*****************************************************************************/ +/* Global Variables */ +/*****************************************************************************/ + + +/* none */ + + + +/*****************************************************************************/ +/* Macros */ +/*****************************************************************************/ + + +/* none */ + + + +/*****************************************************************************/ +/* Functions */ +/*****************************************************************************/ + + +/* none */ + + + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __TLR_TYPES_H */ diff --git a/examples/tcpserver/Marshaller/APIHeader/netXConnectorErrors.h b/examples/tcpserver/Marshaller/APIHeader/netXConnectorErrors.h new file mode 100644 index 0000000..ed19df7 --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/netXConnectorErrors.h @@ -0,0 +1,325 @@ +#ifndef __NETXCONNECTORERRORS_H__ +#define __NETXCONNECTORERRORS_H__ + +/******************************************************************************* +* netX Connector Errors +*******************************************************************************/ +// +// Values are 32 bit values layed out as follows: +// +// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +---+-+-+-----------------------+-------------------------------+ +// |Sev|C|R| Facility | Code | +// +---+-+-+-----------------------+-------------------------------+ +// +// where +// +// Sev - is the severity code +// +// 00 - Success +// 01 - Informational +// 10 - Warning +// 11 - Error +// +// C - is the Customer code flag +// +// R - is a reserved bit +// +// Facility - is the facility code +// +// Code - is the facility's status code +// +// +// Define the facility codes +// + + +// +// Define the severity codes +// + + +// +// MessageId: NXCON_NO_ERROR +// +// MessageText: +// +// No Error +// +#define NXCON_NO_ERROR ((int32_t)0x00000000L) + +/******************************************************************************* +* Generic Connector Errors +*******************************************************************************/ +// +// MessageId: NXCON_DRV_INVALID_POINTER +// +// MessageText: +// +// Invalid pointer (NULL) +// +#define NXCON_DRV_INVALID_POINTER ((int32_t)0x800F0001L) + +// +// MessageId: NXCON_DRV_INVALID_PARAMETER +// +// MessageText: +// +// NetX Connector invalid parameters +// +#define NXCON_DRV_INVALID_PARAMETER ((int32_t)0x800F0002L) + +// +// MessageId: NXCON_DRV_NOT_INITIALIZED +// +// MessageText: +// +// NetX Connector not initialized +// +#define NXCON_DRV_NOT_INITIALIZED ((int32_t)0x800F0003L) + +// +// MessageId: NXCON_DRV_FUNC_NOT_IMPL +// +// MessageText: +// +// NetX Connector function not implemented +// +#define NXCON_DRV_FUNC_NOT_IMPL ((int32_t)0x800F0004L) + +// +// MessageId: NXCON_DRV_WAS_OPENED_BEFORE +// +// MessageText: +// +// NetX Connector was opened before +// +#define NXCON_DRV_WAS_OPENED_BEFORE ((int32_t)0x800F0005L) + +// +// MessageId: NXCON_DRV_NOT_OPENED +// +// MessageText: +// +// NetX Connector was not opened +// +#define NXCON_DRV_NOT_OPENED ((int32_t)0x800F0006L) + +// +// MessageId: NXCON_DRV_INIT_ERROR +// +// MessageText: +// +// Failed to initialize NetX Connector +// +#define NXCON_DRV_INIT_ERROR ((int32_t)0x800F0007L) + +// +// MessageId: NXCON_DRV_NOT_START +// +// MessageText: +// +// Failed to start NetX Connector +// +#define NXCON_DRV_NOT_START ((int32_t)0x800F0008L) + +// +// MessageId: NXCON_DRV_SEND_ERROR +// +// MessageText: +// +// Failed to send data +// +#define NXCON_DRV_SEND_ERROR ((int32_t)0x800F0009L) + +// +// MessageId: NXCON_DRV_BUFFER_TOO_SHORT +// +// MessageText: +// +// The supplied buffer was too short +// +#define NXCON_DRV_BUFFER_TOO_SHORT ((int32_t)0x800F000AL) + +// +// MessageId: NXCON_DRV_DISABLED +// +// MessageText: +// +// The connector is disabled +// +#define NXCON_DRV_DISABLED ((int32_t)0x800F000BL) + +// +// MessageId: NXCON_CONNECTOR_IDENTIFIER_EMPTY +// +// MessageText: +// +// The connector identifier is empty +// +#define NXCON_CONNECTOR_IDENTIFIER_EMPTY ((int32_t)0x800F0010L) + +// +// MessageId: NXCON_CONNECTOR_DUPLICATE_IDENTIFIER +// +// MessageText: +// +// Duplicate connector identifier found +// +#define NXCON_CONNECTOR_DUPLICATE_IDENTIFIER ((int32_t)0x800F0011L) + +// +// MessageId: NXCON_CONNECTOR_FUNCTIONS_READ_ERROR +// +// MessageText: +// +// Failed to read all connector functions +// +#define NXCON_CONNECTOR_FUNCTIONS_READ_ERROR ((int32_t)0x800F0012L) + +/******************************************************************************* +* Hardware depending errors +*******************************************************************************/ +// +// MessageId: NXCON_DRV_GETCOMMSTATE +// +// MessageText: +// +// Failed to read connector hardware status +// +#define NXCON_DRV_GETCOMMSTATE ((int32_t)0x800F0020L) + +// +// MessageId: NXCON_DRV_SETCOMMSTATE +// +// MessageText: +// +// Failed to setup connector hardware status +// +#define NXCON_DRV_SETCOMMSTATE ((int32_t)0x800F0021L) + +// +// MessageId: NXCON_DRV_GETTIMEOUT +// +// MessageText: +// +// Failed to read connector hardware timeouts +// +#define NXCON_DRV_GETTIMEOUT ((int32_t)0x800F0022L) + +// +// MessageId: NXCON_DRV_SETTIMEOUT +// +// MessageText: +// +// Failed to set connector hardware timeouts +// +#define NXCON_DRV_SETTIMEOUT ((int32_t)0x800F0023L) + +// +// MessageId: NXCON_DRV_SETUPCOMBUFFER +// +// MessageText: +// +// Failed to set connector hardware buffers +// +#define NXCON_DRV_SETUPCOMBUFFER ((int32_t)0x800F0024L) + +// +// MessageId: NXCON_DRV_SETUPCOMMASK +// +// MessageText: +// +// Failed to set connector hardware event masks +// +#define NXCON_DRV_SETUPCOMMASK ((int32_t)0x800F0025L) + +// +// MessageId: NXCON_DRV_SETUPCOMHWSIGNAL +// +// MessageText: +// +// Failed to set connector hardware signals +// +#define NXCON_DRV_SETUPCOMHWSIGNAL ((int32_t)0x800F0026L) + +// +// MessageId: NXCON_DRV_SOCKETERROR +// +// MessageText: +// +// Generic socket error +// +#define NXCON_DRV_SOCKETERROR ((int32_t)0x800F0027L) + +// +// MessageId: NXCON_DRV_CONNECTION_FAILED +// +// MessageText: +// +// Failed to establish connection +// +#define NXCON_DRV_CONNECTION_FAILED ((int32_t)0x800F0028L) + +// +// MessageId: NXCON_DRV_CONNECT_TIMEOUT +// +// MessageText: +// +// Connection failed due to a timeout +// +// +#define NXCON_DRV_CONNECT_TIMEOUT ((int32_t)0x800F0029L) + +/******************************************************************************* +* Configuration errors +*******************************************************************************/ +// +// MessageId: NXCON_CONF_INVALID_KEY +// +// MessageText: +// +// Supplied configuration key is invalid +// +#define NXCON_CONF_INVALID_KEY ((int32_t)0xC00F0100L) + +// +// MessageId: NXCON_CONF_INVALID_VALUE +// +// MessageText: +// +// Supplied configuration value is invalid +// +#define NXCON_CONF_INVALID_VALUE ((int32_t)0xC00F0101L) + +// +// MessageId: NXCON_CONF_INVALID_INTERFACE +// +// MessageText: +// +// Supplied interface name is invalid +// +#define NXCON_CONF_INVALID_INTERFACE ((int32_t)0xC00F0102L) + +// +// MessageId: NXCON_CONF_READ_FAILED +// +// MessageText: +// +// Failed to read configuration +// +#define NXCON_CONF_READ_FAILED ((int32_t)0xC00F0103L) + +// +// MessageId: NXCON_CONF_WRITE_FAILED +// +// MessageText: +// +// Failed to write configuration +// +#define NXCON_CONF_WRITE_FAILED ((int32_t)0xC00F0104L) + +/*******************************************************************************/ + +#endif /*__NETXCONNECTORERRORS_H__ */ diff --git a/examples/tcpserver/Marshaller/APIHeader/rcX_Error.h b/examples/tcpserver/Marshaller/APIHeader/rcX_Error.h new file mode 100644 index 0000000..9346672 --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/rcX_Error.h @@ -0,0 +1,956 @@ +#ifndef __RCX_ERROR_H +#define __RCX_ERROR_H + +/* /////////////////////////////////////////////////////////////////////////////////// */ +/* RCX Task error codes */ +/* /////////////////////////////////////////////////////////////////////////////////// */ +/* */ +/* MessageId: TLR_E_RCX_QUE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Queue unknown. */ +/* */ +#define TLR_E_RCX_QUE_UNKNOWN ((TLR_RESULT)0xC02B0001L) + +/* */ +/* MessageId: TLR_E_RCX_QUE_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Queue table index does not exist. */ +/* */ +#define TLR_E_RCX_QUE_IDX_UNKNOWN ((TLR_RESULT)0xC02B0002L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task unknown. */ +/* */ +#define TLR_E_RCX_TSK_UNKNOWN ((TLR_RESULT)0xC02B0003L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task table index does not exist. */ +/* */ +#define TLR_E_RCX_TSK_IDX_UNKNOWN ((TLR_RESULT)0xC02B0004L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_HANDLE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Task handle invalid. */ +/* */ +#define TLR_E_RCX_TSK_HANDLE_INVALID ((TLR_RESULT)0xC02B0005L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_INFO_IDX_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Task info field index unknown. */ +/* */ +#define TLR_E_RCX_TSK_INFO_IDX_UNKNOWN ((TLR_RESULT)0xC02B0006L) + +/* */ +/* MessageId: TLR_I_RCX_FILE_RETRANSMIT */ +/* */ +/* MessageText: */ +/* */ +/* The last data block was invalid, please retransmit. */ +/* */ +#define TLR_I_RCX_FILE_RETRANSMIT ((TLR_RESULT)0x402B0001L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_XFR_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Requested transfer type invalid. */ +/* */ +#define TLR_E_RCX_FILE_XFR_TYPE_INVALID ((TLR_RESULT)0xC02B0007L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_REQUEST_INCORRECT */ +/* */ +/* MessageText: */ +/* */ +/* Request is incorrectly formatted i.e. wrong parameters. */ +/* */ +#define TLR_E_RCX_FILE_REQUEST_INCORRECT ((TLR_RESULT)0xC02B0008L) + +/* */ +/* MessageId: TLR_E_RCX_UNKNOWN_PORT_INDEX */ +/* */ +/* MessageText: */ +/* */ +/* Unknown port index. */ +/* */ +#define TLR_E_RCX_UNKNOWN_PORT_INDEX ((TLR_RESULT)0xC02B0009L) + +/* */ +/* MessageId: TLR_E_RCX_ROUTER_TABLE_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Router Table is full. */ +/* */ +#define TLR_E_RCX_ROUTER_TABLE_FULL ((TLR_RESULT)0xC02B000AL) + +/* */ +/* MessageId: TLR_E_RCX_NO_SUCH_ROUTER_IN_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* No such router in table. */ +/* */ +#define TLR_E_RCX_NO_SUCH_ROUTER_IN_TABLE ((TLR_RESULT)0xC02B000BL) + +/* */ +/* MessageId: TLR_E_RCX_INSTANCE_NOT_NULL */ +/* */ +/* MessageText: */ +/* */ +/* Mid_Sys Instance is not 0. */ +/* */ +#define TLR_E_RCX_INSTANCE_NOT_NULL ((TLR_RESULT)0xC02B000CL) + +/* */ +/* MessageId: TLR_E_RCX_COMMAND_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command. */ +/* */ +#define TLR_E_RCX_COMMAND_INVALID ((TLR_RESULT)0xC02B000DL) + +/* */ +/* MessageId: TLR_E_RCX_TSK_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid task handle. */ +/* */ +#define TLR_E_RCX_TSK_INVALID ((TLR_RESULT)0xC02B000EL) + +/* */ +/* MessageId: TLR_E_RCX_TSK_NOT_A_USER_TASK */ +/* */ +/* MessageText: */ +/* */ +/* Access denied. Not a user task (See Config-File). */ +/* */ +#define TLR_E_RCX_TSK_NOT_A_USER_TASK ((TLR_RESULT)0xC02B000FL) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_SETTABLE */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle not settable. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_SETTABLE ((TLR_RESULT)0xC02B0010L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle invalid. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_INVALID ((TLR_RESULT)0xC02B0011L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_NOT_SET */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle has not been set. */ +/* */ +#define TLR_E_RCX_LOG_QUE_NOT_SET ((TLR_RESULT)0xC02B0012L) + +/* */ +/* MessageId: TLR_E_RCX_LOG_QUE_ALREADY_USED */ +/* */ +/* MessageText: */ +/* */ +/* Logical queue handle is already in use. */ +/* */ +#define TLR_E_RCX_LOG_QUE_ALREADY_USED ((TLR_RESULT)0xC02B0013L) + +/* */ +/* MessageId: TLR_E_RCX_TSK_NO_DEFAULT_QUEUE */ +/* */ +/* MessageText: */ +/* */ +/* Task has no default process queue. */ +/* */ +#define TLR_E_RCX_TSK_NO_DEFAULT_QUEUE ((TLR_RESULT)0xC02B0014L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module is invalid. CRC-32 check failed. */ +/* */ +#define TLR_E_RCX_MODULE_INVALID ((TLR_RESULT)0xC02B0015L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NOT_FOUND */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has not been found. Maybe it has not been downloaded before. */ +/* */ +#define TLR_E_RCX_MODULE_NOT_FOUND ((TLR_RESULT)0xC02B0016L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_RELOC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has an invalid reloc table. */ +/* */ +#define TLR_E_RCX_MODULE_RELOC_ERROR ((TLR_RESULT)0xC02B0017L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NO_INIT_TBL */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has no init table. */ +/* */ +#define TLR_E_RCX_MODULE_NO_INIT_TBL ((TLR_RESULT)0xC02B0018L) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_NO_ENTRY_POINT */ +/* */ +/* MessageText: */ +/* */ +/* Firmware Module has no code entry point. */ +/* */ +#define TLR_E_RCX_MODULE_NO_ENTRY_POINT ((TLR_RESULT)0xC02B0019L) + +/* */ +/* MessageId: TLR_E_RCX_ACCESS_DENIED_IN_LOCKED_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Access denied due to current operating conditions. */ +/* */ +#define TLR_E_RCX_ACCESS_DENIED_IN_LOCKED_STATE ((TLR_RESULT)0xC02B001AL) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_FIRMWARE_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Firmware does not fit into flash. */ +/* */ +#define TLR_E_RCX_INVALID_FIRMWARE_SIZE ((TLR_RESULT)0xC02B001BL) + +/* */ +/* MessageId: TLR_E_RCX_MODULE_RELOCATION_DISTANCE_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* The relocation distance is too long. */ +/* */ +#define TLR_E_RCX_MODULE_RELOCATION_DISTANCE_TOO_LONG ((TLR_RESULT)0xC02B001CL) + +/* */ +/* MessageId: TLR_E_RCX_SEC_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Access to the security flash failed. */ +/* */ +#define TLR_E_RCX_SEC_FAILED ((TLR_RESULT)0xC02B001DL) + +/* */ +/* MessageId: TLR_E_RCX_SEC_DISABLED */ +/* */ +/* MessageText: */ +/* */ +/* Security flash is disabled at firmware. */ +/* */ +#define TLR_E_RCX_SEC_DISABLED ((TLR_RESULT)0xC02B001EL) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_EXTENSION */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Extension field. */ +/* */ +#define TLR_E_RCX_INVALID_EXTENSION ((TLR_RESULT)0xC02B001FL) + +/* */ +/* MessageId: TLR_E_RCX_BLOCK_SIZE_OUT_OF_RANGE */ +/* */ +/* MessageText: */ +/* */ +/* Block size out of range. */ +/* */ +#define TLR_E_RCX_BLOCK_SIZE_OUT_OF_RANGE ((TLR_RESULT)0xC02B0020L) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Channel. */ +/* */ +#define TLR_E_RCX_INVALID_CHANNEL ((TLR_RESULT)0xC02B0021L) + +/* */ +/* MessageId: TLR_E_RCX_INVLAID_FILE_LENGTH */ +/* */ +/* MessageText: */ +/* */ +/* Invalid File Length. */ +/* */ +#define TLR_E_RCX_INVLAID_FILE_LENGTH ((TLR_RESULT)0xC02B0022L) + +/* */ +/* MessageId: TLR_E_RCX_INVALID_CHARACTER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid Character. */ +/* */ +#define TLR_E_RCX_INVALID_CHARACTER ((TLR_RESULT)0xC02B0023L) + +/* */ +/* MessageId: TLR_E_RCX_PACKET_OUT_OF_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Packet out of sequence. */ +/* */ +#define TLR_E_RCX_PACKET_OUT_OF_SEQUENCE ((TLR_RESULT)0xC02B0024L) + +/* */ +/* MessageId: TLR_E_RCX_NOT_POSSIBLE_IN_CURRENT_STATE */ +/* */ +/* MessageText: */ +/* */ +/* Not possible in current state. */ +/* */ +#define TLR_E_RCX_NOT_POSSIBLE_IN_CURRENT_STATE ((TLR_RESULT)0xC02B0025L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_INVALID_ZONE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone Parameter is invalid. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_INVALID_ZONE ((TLR_RESULT)0xC02B0026L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_NOT_ALLOWED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom access is not allowed in current state. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_NOT_ALLOWED ((TLR_RESULT)0xC02B0027L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom is not available. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_NOT_AVAILABLE ((TLR_RESULT)0xC02B0028L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_INVALID_CHECKSUM */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom has an invalid checksum. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_INVALID_CHECKSUM ((TLR_RESULT)0xC02B0029L) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_WRITABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone is not writeable. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_WRITABLE ((TLR_RESULT)0xC02B002AL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_READ_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Read Failed. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_READ_FAILED ((TLR_RESULT)0xC02B002BL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_WRITE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Write Failed. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_WRITE_FAILED ((TLR_RESULT)0xC02B002CL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_ACCESS_DENIED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone Access Denied. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_ACCESS_DENIED ((TLR_RESULT)0xC02B002DL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_EMULATED */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Emulated. No write possible. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_EMULATED ((TLR_RESULT)0xC02B002EL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_NAME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File name is invalid. */ +/* */ +#define TLR_E_RCX_FILE_NAME_INVALID ((TLR_RESULT)0xC02B002FL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_ERROR ((TLR_RESULT)0xC02B0030L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_END_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence End Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_END_ERROR ((TLR_RESULT)0xC02B0031L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_SEQUENCE_BEGIN_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File Sequence Begin Error. */ +/* */ +#define TLR_E_RCX_FILE_SEQUENCE_BEGIN_ERROR ((TLR_RESULT)0xC02B0032L) + +/* */ +/* MessageId: TLR_E_RCX_UNEXPECTED_BLOCK_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Unexpected File Transfer Block Size. */ +/* */ +#define TLR_E_RCX_UNEXPECTED_BLOCK_SIZE ((TLR_RESULT)0xC02B0033L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_CRC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header has invalid CRC error. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_CRC_ERROR ((TLR_RESULT)0xC02B0034L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_MODULE_SIZE_DIFFERS */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header specifies a different module size than the actual module header itself. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_MODULE_SIZE_DIFFERS ((TLR_RESULT)0xC02B0035L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_MD5_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Hilscher File Header contains a wrong MD-5 checksum for file data. */ +/* */ +#define TLR_E_HIL_FILE_HEADER_MD5_CHECKSUM_ERROR ((TLR_RESULT)0xC02B0036L) + +/* */ +/* MessageId: TLR_E_RCX_PACKET_WOULD_BE_TOO_LONG_FOR_MTU */ +/* */ +/* MessageText: */ +/* */ +/* The packet would be too long for transfer. */ +/* */ +#define TLR_E_RCX_PACKET_WOULD_BE_TOO_LONG_FOR_MTU ((TLR_RESULT)0xC02B0037L) + +/* */ +/* MessageId: TLR_E_INVALID_BLOCK */ +/* */ +/* MessageText: */ +/* */ +/* Invalid block id */ +/* */ +#define TLR_E_INVALID_BLOCK ((TLR_RESULT)0xC02B0038L) + +/* */ +/* MessageId: TLR_E_INVALID_STRUCT_NUMBER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid structure number */ +/* */ +#define TLR_E_INVALID_STRUCT_NUMBER ((TLR_RESULT)0xC02B0039L) + +/* */ +/* MessageId: TLR_E_HIL_FILE_HEADER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file header */ +/* */ +#define TLR_E_HIL_FILE_HEADER_INVALID ((TLR_RESULT)0xC02B003AL) + +/* */ +/* MessageId: TLR_E_LICENSE_CHIPTYPE_UNSUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Target device not supported for license update */ +/* */ +#define TLR_E_LICENSE_CHIPTYPE_UNSUPPORTED ((TLR_RESULT)0xC02B003BL) + +/* */ +/* MessageId: TLR_E_LICENSE_CHIPTYPE_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* License incompatible for target device */ +/* */ +#define TLR_E_LICENSE_CHIPTYPE_MISMATCH ((TLR_RESULT)0xC02B003CL) + +/* */ +/* MessageId: TLR_E_LICENSE_HW_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* License generated for different device */ +/* */ +#define TLR_E_LICENSE_HW_MISMATCH ((TLR_RESULT)0xC02B003DL) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_NO_MODULE_DESCRIPTOR */ +/* */ +/* MessageText: */ +/* */ +/* Missing module descriptor in module. */ +/* */ +#define TLR_E_MODULE_CONTAINS_NO_MODULE_DESCRIPTOR ((TLR_RESULT)0xC02B003EL) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNKNOWN_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Unknown version in module descriptor. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNKNOWN_VERSION ((TLR_RESULT)0xC02B003FL) + +/* */ +/* MessageId: TLR_E_MODULE_HAS_NO_INIT_FUNCTION */ +/* */ +/* MessageText: */ +/* */ +/* Module has no init function. */ +/* */ +#define TLR_E_MODULE_HAS_NO_INIT_FUNCTION ((TLR_RESULT)0xC02B0040L) + +/* */ +/* MessageId: TLR_E_MODULE_OFFSET_RANGE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Module part exceeded offset range. */ +/* */ +#define TLR_E_MODULE_OFFSET_RANGE_ERROR ((TLR_RESULT)0xC02B0041L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_HEADER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF header in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_HEADER ((TLR_RESULT)0xC02B0042L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_SECTION_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF section reference in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_SECTION_REFERENCE ((TLR_RESULT)0xC02B0043L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_ELF_SYMBOL_REFERENCE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid ELF symbol reference in module. */ +/* */ +#define TLR_E_MODULE_INVALID_ELF_SYMBOL_REFERENCE ((TLR_RESULT)0xC02B0044L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_AN_UNDEFINED_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an undefined symbol. */ +/* */ +#define TLR_E_MODULE_CONTAINS_AN_UNDEFINED_SYMBOL ((TLR_RESULT)0xC02B0045L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_INVALID_CODE_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains invalid symbol to code area. */ +/* */ +#define TLR_E_MODULE_CONTAINS_INVALID_CODE_SYMBOL ((TLR_RESULT)0xC02B0046L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_BINDING */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an supported symbol binding. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_BINDING ((TLR_RESULT)0xC02B0047L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Module contains an supported symbol type. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_SYMBOL_TYPE ((TLR_RESULT)0xC02B0048L) + +/* */ +/* MessageId: TLR_E_MODULE_INVALID_SECTION_OFFSET_ENCOUNTERED */ +/* */ +/* MessageText: */ +/* */ +/* Invalid section offset encountered. */ +/* */ +#define TLR_E_MODULE_INVALID_SECTION_OFFSET_ENCOUNTERED ((TLR_RESULT)0xC02B0049L) + +/* */ +/* MessageId: TLR_E_MODULE_UNSUPPORTED_RELOC_TYPE */ +/* */ +/* MessageText: */ +/* */ +/* Unsupported reloc type. */ +/* */ +#define TLR_E_MODULE_UNSUPPORTED_RELOC_TYPE ((TLR_RESULT)0xC02B004AL) + +/* */ +/* MessageId: TLR_E_MODULE_RELOC_DISTANCE_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Reloc distance too long. */ +/* */ +#define TLR_E_MODULE_RELOC_DISTANCE_TOO_LONG ((TLR_RESULT)0xC02B004BL) + +/* */ +/* MessageId: TLR_E_MODULE_RELOC_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Reloc error. */ +/* */ +#define TLR_E_MODULE_RELOC_ERROR ((TLR_RESULT)0xC02B004CL) + +/* */ +/* MessageId: TLR_E_MODULE_SHT_RELA_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* Rela relocs not supported. */ +/* */ +#define TLR_E_MODULE_SHT_RELA_NOT_SUPPORTED ((TLR_RESULT)0xC02B004DL) + +/* */ +/* MessageId: TLR_E_MODULE_SPECIAL_SYM_PARSE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Special syms could not be parsed. */ +/* */ +#define TLR_E_MODULE_SPECIAL_SYM_PARSE_ERROR ((TLR_RESULT)0xC02B004EL) + +/* */ +/* MessageId: TLR_E_MODULE_MISSING_SPECIAL_SYMS */ +/* */ +/* MessageText: */ +/* */ +/* Missing special symbols in ELF symtab. */ +/* */ +#define TLR_E_MODULE_MISSING_SPECIAL_SYMS ((TLR_RESULT)0xC02B004FL) + +/* */ +/* MessageId: TLR_E_MODULE_RCX_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* rcX Jump table is shorter than expected. */ +/* */ +#define TLR_E_MODULE_RCX_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED ((TLR_RESULT)0xC02B0050L) + +/* */ +/* MessageId: TLR_E_MODULE_LIBC_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED */ +/* */ +/* MessageText: */ +/* */ +/* libc Jump table is shorter than expected. */ +/* */ +#define TLR_E_MODULE_LIBC_JUMP_TABLE_IS_SHORTER_THAN_EXPECTED ((TLR_RESULT)0xC02B0051L) + +/* */ +/* MessageId: TLR_E_MODULE_TASK_GROUP_RANGE_DOES_NOT_MATCH_STATIC_TASK_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Task Group Range does not match static task table. */ +/* */ +#define TLR_E_MODULE_TASK_GROUP_RANGE_DOES_NOT_MATCH_STATIC_TASK_TABLE ((TLR_RESULT)0xC02B0052L) + +/* */ +/* MessageId: TLR_E_MODULE_INTERRUPT_GROUP_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt Group Range does not match interrupt table. */ +/* */ +#define TLR_E_MODULE_INTERRUPT_GROUP_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE ((TLR_RESULT)0xC02B0053L) + +/* */ +/* MessageId: TLR_E_MODULE_INTERRUPT_GROUP_TASK_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt Group Task-Range does not match interrupt table. */ +/* */ +#define TLR_E_MODULE_INTERRUPT_GROUP_TASK_RANGE_DOES_NOT_MATCH_INTERRUPT_TABLE ((TLR_RESULT)0xC02B0054L) + +/* */ +/* MessageId: TLR_E_MODULE_LED_TAG_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* LED-Tag is too short. */ +/* */ +#define TLR_E_MODULE_LED_TAG_TOO_SHORT ((TLR_RESULT)0xC02B0055L) + +/* */ +/* MessageId: TLR_E_MODULE_LED_TAG_CONTAINS_INVALID_PARAMETERS */ +/* */ +/* MessageText: */ +/* */ +/* LED-Tag contains invalid parameters. */ +/* */ +#define TLR_E_MODULE_LED_TAG_CONTAINS_INVALID_PARAMETERS ((TLR_RESULT)0xC02B0056L) + +/* */ +/* MessageId: TLR_E_MODULE_CONTAINS_UNSUPPORTED_COMMON_SYMBOL */ +/* */ +/* MessageText: */ +/* */ +/* Module contains unsupported *COM* symbol. */ +/* */ +#define TLR_E_MODULE_CONTAINS_UNSUPPORTED_COMMON_SYMBOL ((TLR_RESULT)0xC02B0057L) + +/* */ +/* MessageId: TLR_E_RCX_DEVICE_CLASS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Device class in file header does not match target. */ +/* */ +#define TLR_E_RCX_DEVICE_CLASS_INVALID ((TLR_RESULT)0xC02B0058L) + +/* */ +/* MessageId: TLR_E_RCX_MFG_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Manufacturer in file header does not match target. */ +/* */ +#define TLR_E_RCX_MFG_INVALID ((TLR_RESULT)0xC02B0059L) + +/* */ +/* MessageId: TLR_E_RCX_HW_COMPATIBILITY_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Hardware compatibility index in file header does not match target. */ +/* */ +#define TLR_E_RCX_HW_COMPATIBILITY_INVALID ((TLR_RESULT)0xC02B005AL) + +/* */ +/* MessageId: TLR_E_RCX_HW_OPTIONS_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Hardware options in file header does not match target. */ +/* */ +#define TLR_E_RCX_HW_OPTIONS_INVALID ((TLR_RESULT)0xC02B005BL) + +/* */ +/* MessageId: TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_READABLE */ +/* */ +/* MessageText: */ +/* */ +/* Security Eeprom Zone is not readable. */ +/* */ +#define TLR_E_RCX_SECURITY_EEPROM_ZONE_NOT_READABLE ((TLR_RESULT)0xC02B4D52L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_IN_USE */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer in use. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_IN_USE ((TLR_RESULT)0xC02B524CL) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_PACKET_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer Packet invalid. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_PACKET_INVALID ((TLR_RESULT)0xC02B4444L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_NOT_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer is not active. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_NOT_ACTIVE ((TLR_RESULT)0xC02B5342L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer has invalid type code. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_INVALID ((TLR_RESULT)0xC02B5257L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_CRC_REPEATEDLY_WRONG */ +/* */ +/* MessageText: */ +/* */ +/* File Transfer was tried repeatedly with a wrong CRC. */ +/* */ +#define TLR_E_RCX_FILE_CRC_REPEATEDLY_WRONG ((TLR_RESULT)0xC02B4352L) + +/* */ +/* MessageId: TLR_E_RCX_FILE_TRANSFER_TYPE_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Transfer Type is not available. */ +/* */ +#define TLR_E_RCX_FILE_TRANSFER_TYPE_NOT_AVAILABLE ((TLR_RESULT)0xC02B4353L) + +/* */ +/* MessageId: TLR_E_RCX_PATH_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* File Path submitted in File Transfer was invalid. */ +/* */ +#define TLR_E_RCX_PATH_INVALID ((TLR_RESULT)0xC02B5555L) + +/* */ +/* MessageId: TLR_E_RCX_DRIVER_CFG_TABLE_INIT_FUNCTION_MISSING */ +/* */ +/* MessageText: */ +/* */ +/* Driver Configuration Table Init Function missing. */ +/* */ +#define TLR_E_RCX_DRIVER_CFG_TABLE_INIT_FUNCTION_MISSING ((TLR_RESULT)0xC02BFFFFL) + +/* */ +/* MessageId: TLR_E_RCX_CONFIGURATION_LOCKED */ +/* */ +/* MessageText: */ +/* */ +/* Configuration has been locked. */ +/* */ +#define TLR_E_RCX_CONFIGURATION_LOCKED ((TLR_RESULT)0xC02B4B54L) + +/* */ +/* MessageId: TLR_E_RCX_NOT_ENOUGH_SPACE_FOR_FILE */ +/* */ +/* MessageText: */ +/* */ +/* Not enough space on volume for file. */ +/* */ +#define TLR_E_RCX_NOT_ENOUGH_SPACE_FOR_FILE ((TLR_RESULT)0xC02B4242L) + +/* */ +/* MessageId: TLR_E_RCX_FORMAT_ERASE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error formatting / erasing volume. */ +/* */ +#define TLR_E_RCX_FORMAT_ERASE_FAILED ((TLR_RESULT)0xC02B4243L) + +/* */ +/* MessageId: TLR_E_RCX_FORMAT_VERIFY_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Error erasing sector. */ +/* */ +#define TLR_E_RCX_FORMAT_VERIFY_FAILED ((TLR_RESULT)0xC02B4244L) + + + + +#endif /* __RCX_ERROR_H */ + diff --git a/examples/tcpserver/Marshaller/APIHeader/rcX_Public.h b/examples/tcpserver/Marshaller/APIHeader/rcX_Public.h new file mode 100644 index 0000000..a99081d --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/rcX_Public.h @@ -0,0 +1,2996 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: rcX_Public.h 13107 2019-08-15 08:42:43Z Robert $: + + Description: + rcX Public Packet functions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2016-04-22 fixed typedef of RCX_TSK_GET_INFO_STRUCT_IDX_REQ_T + changed TLR_BOOLEAN to TLR_BOOLEAN32 in RCX_LINK_STATUS_T to be portable + 2016-02-26 added command definition for RCX_COMM_START/RCX_COMM_STOP + 2014-12-05 added structure definition for RCX_PHYSMEM_READ_REQ + 2014-05-06 added RCX_FILE_RENAME_REQ to support file renaming + 2014-04-28 packed RCX_VERIFY_MASTER_DATABASE_T to handle strict + packing rules of armcc compiler + 2012-08-28 added RCX_LINK_STATUS_CHANGE_IND and definitions + 2012-07-17 added RCX_GET_FW_PARAMETER_REQ and definitions + 2012-06-27 added parameter id PID_BAUDRATE (RCX_SET_FW_PARAMETER_REQ) + 2012-03-28 removed C++ comments, to prevent compiler warnings + 2012-02-13 added RCX_SET_FW_PARAMETER_REQ and definitions + 2011-12-06 added RCX_TIME_COMMAND_REQ and definitions + 2011-05-13 added definitions for configuration in run + 2011-02-25 added structure definition for RCX_FORMAT_REQ + 2011-02-24 added command definition for RCX_FORMAT_REQ + 2010-12-02 added packet RCX_MALLINFO_REQ + 2010-10-06 renamed ulCmd to ulAction in RCX_BUSSCAN_REQ_DATA_T + 2010-09-14 Added RCX_FILE_GET_HEADER_MD5_REQ + 2010-04-28 Removed define CIFX_TOOLKIT and included common + packing __TLR_PACKED_PRE / POST + 2010-04-27 For CIFX_TOOLKIT: Changed defines + __TKITPACKED_xx from __PACKED_xx to + __TLR_PACKED_xx + Changed include of TLR_INX_Includes.h to TLR_Types.h + 2010-04-20 added new packet definition RCX_SET_HANDSHAKE_CONFIG_REQ + 2010-04-16 RCX_VERIFY_DATABASE_REQ_SIZE did not work due + to an additional space character + 2010-04-13 Included TLR_INX_Includes.h instead of TLR_Includes.h + 2010-03-23 File created. + +**************************************************************************************/ + + +#ifndef __RCX_PUBLIC_H +#define __RCX_PUBLIC_H + + +#include "TLR_Types.h" +#include "rcX_User.h" + +#define RCX_PROCESS_QUEUE_NAME "RCX_QUE" + +/* firmware control */ +#define RCX_FIRMWARE_RESET_REQ 0x00001E00 +#define RCX_FIRMWARE_RESET_CNF 0x00001E01 + +/* firmware information */ +#define RCX_LISTS_GET_NUM_ENTRIES_REQ 0x00001E10 +#define RCX_LISTS_GET_NUM_ENTRIES_CNF 0x00001E11 + +/* queue identification */ +#define RCX_QUE_IDENTIFY_REQ 0x00001E20 +#define RCX_QUE_IDENTIFY_CNF 0x00001E21 +#define RCX_QUE_IDENTIFY_IDX_REQ 0x00001E22 +#define RCX_QUE_IDENTIFY_IDX_CNF 0x00001E23 + +/* queue load retrieval */ +#define RCX_QUE_GET_LOAD_REQ 0x00001E30 +#define RCX_QUE_GET_LOAD_CNF 0x00001E31 + +/* DPM data access functions */ +#define RCX_SYSTEM_INFORMATION_BLOCK_REQ 0x00001E32 +#define RCX_SYSTEM_INFORMATION_BLOCK_CNF 0x00001E33 +#define RCX_CHANNEL_INFORMATION_BLOCK_REQ 0x00001E34 +#define RCX_CHANNEL_INFORMATION_BLOCK_CNF 0x00001E35 +#define RCX_SYSTEM_CONTROL_BLOCK_REQ 0x00001E36 +#define RCX_SYSTEM_CONTROL_BLOCK_CNF 0x00001E37 +#define RCX_SYSTEM_STATUS_BLOCK_REQ 0x00001E38 +#define RCX_SYSTEM_STATUS_BLOCK_CNF 0x00001E39 +#define RCX_CONTROL_BLOCK_REQ 0x00001E3A +#define RCX_CONTROL_BLOCK_CNF 0x00001E3B +#define RCX_HANDSHAKE_CHANNEL_REQ 0x00001E3C +#define RCX_HANDSHAKE_CHANNEL_CNF 0x00001E3D + +/* task identification and readout of diagnosis data */ +#define RCX_TSK_GET_NAME_REQ 0x00001E3E +#define RCX_TSK_GET_NAME_CNF 0x00001E3F +#define RCX_TSK_IDENTIFY_REQ 0x00001E40 +#define RCX_TSK_IDENTIFY_CNF 0x00001E41 +#define RCX_TSK_IDENTIFY_IDX_REQ 0x00001E42 +#define RCX_TSK_IDENTIFY_IDX_CNF 0x00001E43 +#define RCX_TSK_GET_STATUS_REQ 0x00001E44 +#define RCX_TSK_GET_STATUS_CNF 0x00001E45 +#define RCX_TSK_GET_INFO_FIELD_REQ 0x00001E46 +#define RCX_TSK_GET_INFO_FIELD_CNF 0x00001E47 + +/* task control */ +#define RCX_TSK_START_REQ 0x00001E48 +#define RCX_TSK_START_CNF 0x00001E49 +#define RCX_TSK_STOP_REQ 0x00001E4A +#define RCX_TSK_STOP_CNF 0x00001E4B + +#define RCX_TSK_GET_STATUS_ARRAY_REQ 0x00001E4E +#define RCX_TSK_GET_STATUS_ARRAY_CNF 0x00001E4F + +/* task array identification and structure information readout */ +#define RCX_TSK_GET_INFO_ARRAY_REQ 0x00001E50 +#define RCX_TSK_GET_INFO_ARRAY_CNF 0x00001E51 +#define RCX_TSK_GET_INFO_STRUCT_REQ 0x00001E52 +#define RCX_TSK_GET_INFO_STRUCT_CNF 0x00001E53 +#define RCX_TSK_GET_INFO_STRUCT_IDX_REQ 0x00001E54 +#define RCX_TSK_GET_INFO_STRUCT_IDX_CNF 0x00001E55 +#define RCX_TSK_GET_INFO_FIELD_SIZE_REQ 0x00001E56 +#define RCX_TSK_GET_INFO_FIELD_SIZE_CNF 0x00001E57 +#define RCX_TSK_GET_INFO_FIELD_SIZE_IDX_REQ 0x00001E58 +#define RCX_TSK_GET_INFO_FIELD_SIZE_IDX_CNF 0x00001E59 + +/* read information about memory usage */ +#define RCX_MALLINFO_REQ 0x00001E5A +#define RCX_MALLINFO_CNF 0x00001E5B + +/* file upload/download */ +#define RCX_FILE_DOWNLOAD_REQ 0x00001E62 +#define RCX_FILE_DOWNLOAD_CNF 0x00001E63 +#define RCX_FILE_DOWNLOAD_DATA_REQ 0x00001E64 +#define RCX_FILE_DOWNLOAD_DATA_CNF 0x00001E65 + +#define RCX_FILE_DOWNLOAD_ABORT_REQ 0x00001E66 +#define RCX_FILE_DOWNLOAD_ABORT_CNF 0x00001E67 + +#define RCX_FILE_UPLOAD_REQ 0x00001E60 +#define RCX_FILE_UPLOAD_CNF 0x00001E61 +#define RCX_FILE_UPLOAD_DATA_REQ 0x00001E6E +#define RCX_FILE_UPLOAD_DATA_CNF 0x00001E6F + +#define RCX_FILE_UPLOAD_ABORT_REQ 0x00001E5E +#define RCX_FILE_UPLOAD_ABORT_CNF 0x00001E5F + +#define RCX_FORMAT_REQ 0x00001ED6 +#define RCX_FORMAT_CNF 0x00001ED7 + +/* file information */ +#define RCX_FILE_GET_MD5_REQ 0x00001E68 +#define RCX_FILE_GET_MD5_CNF 0x00001E69 +#define RCX_FILE_GET_HEADER_MD5_REQ 0x00001E72 +#define RCX_FILE_GET_HEADER_MD5_CNF 0x00001E73 + +/* file delete */ +#define RCX_FILE_DELETE_REQ 0x00001E6A +#define RCX_FILE_DELETE_CNF 0x00001E6B + +/* file rename */ +#define RCX_FILE_RENAME_REQ 0x00001E7C +#define RCX_FILE_RENAME_CNF 0x00001E7D + +/* volume information */ +#define RCX_VOLUME_GET_ENTRY_REQ 0x00001E6C +#define RCX_VOLUME_GET_ENTRY_CNF 0x00001E6D + +/* directory list */ +#define RCX_DIR_LIST_REQ 0x00001E70 +#define RCX_DIR_LIST_CNF 0x00001E71 + +/* indexed task access */ +#define RCX_TSK_GET_STATUS_IDX_REQ 0x00001E74 +#define RCX_TSK_GET_STATUS_IDX_CNF 0x00001E75 +#define RCX_TSK_GET_INFO_FIELD_IDX_REQ 0x00001E76 +#define RCX_TSK_GET_INFO_FIELD_IDX_CNF 0x00001E77 + +/* indexed task control */ +#define RCX_TSK_START_IDX_REQ 0x00001E78 +#define RCX_TSK_START_IDX_CNF 0x00001E79 +#define RCX_TSK_STOP_IDX_REQ 0x00001E7A +#define RCX_TSK_STOP_IDX_CNF 0x00001E7B + +/* log queues */ +#define RCX_QUE_LOG_SET_REQ 0x00001EA0 +#define RCX_QUE_LOG_SET_CNF 0x00001EA1 +#define RCX_QUE_LOG_CLR_REQ 0x00001EA2 +#define RCX_QUE_LOG_CLR_CNF 0x00001EA3 + +/* read/write memory */ +#define RCX_PHYSMEM_READ_REQ 0x00001EA8 +#define RCX_PHYSMEM_READ_CNF 0x00001EA9 + +#define RCX_PHYSMEM_WRITE_REQ 0x00001EAA +#define RCX_PHYSMEM_WRITE_CNF 0x00001EAB + +/* firmware info */ +#define RCX_GET_LIB_VERSION_INFO_REQ 0x00001EBA +#define RCX_GET_LIB_VERSION_INFO_CNF 0x00001EBB + + +#define RCX_FIRMWARE_IDENTIFY_REQ 0x00001EB6 +#define RCX_FIRMWARE_IDENTIFY_CNF 0x00001EB7 + +#define RCX_HW_IDENTIFY_REQ 0x00001EB8 +#define RCX_HW_IDENTIFY_CNF 0x00001EB9 + +#define RCX_SECURITY_EEPROM_READ_REQ 0x00001EBC +#define RCX_SECURITY_EEPROM_READ_CNF 0x00001EBD +#define RCX_SECURITY_EEPROM_WRITE_REQ 0x00001EBE +#define RCX_SECURITY_EEPROM_WRITE_CNF 0x00001EBF + +/* module management */ +#define RCX_MODULE_INSTANTIATE_REQ 0x00001EC0 +#define RCX_MODULE_INSTANTIATE_CNF 0x00001EC1 +#define RCX_MODULE_GET_INFO_IDX_REQ 0x00001EC2 +#define RCX_MODULE_GET_INFO_IDX_CNF 0x00001EC3 +#define RCX_CHANNEL_INSTANTIATE_REQ 0x00001EC4 +#define RCX_CHANNEL_INSTANTIATE_CNF 0x00001EC5 + +#define RCX_SET_MAC_ADDR_REQ 0x00001EEE +#define RCX_SET_MAC_ADDR_CNF 0x00001EEF + +#define RCX_HW_LICENSE_INFO_REQ 0x00001EF4 +#define RCX_HW_LICENSE_INFO_CNF 0x00001EF5 + +#define RCX_HW_HARDWARE_INFO_REQ 0x00001EF6 +#define RCX_HW_HARDWARE_INFO_CNF 0x00001EF7 + +/* DPM info functions */ +#define RCX_DPM_GET_BLOCK_INFO_REQ 0x00001EF8 +#define RCX_DPM_GET_BLOCK_INFO_CNF 0x00001EF9 + +/* Communication flag info functions */ +#define RCX_DPM_GET_COMFLAG_INFO_REQ 0x00001EFA +#define RCX_DPM_GET_COMFLAG_INFO_CNF 0x00001EFB + + +/* Common Status block functions */ +#define RCX_DPM_GET_COMMON_STATE_REQ 0x00001EFC +#define RCX_DPM_GET_COMMON_STATE_CNF 0x00001EFD + +/* Extended status block */ +#define RCX_DPM_GET_EXTENDED_STATE_REQ 0x00001EFE +#define RCX_DPM_GET_EXTENDED_STATE_CNF 0x00001EFF + +/* reserved for further functions (documented at DPM Spec) */ + +#define RCX_ENABLE_PERF_MEASUREMENT_REQ 0x00001ED2 +#define RCX_ENABLE_PERF_MEASUREMENT_CNF 0x00001ED3 + +#define RCX_GET_PERF_COUNTERS_REQ 0x00001ED4 +#define RCX_GET_PERF_COUNTERS_CNF 0x00001ED5 + +/* Time handling requests */ +#define RCX_TIME_COMMAND_REQ 0x00001ED8 +#define RCX_TIME_COMMAND_CNF 0x00001ED9 + + +/* Backup / Restore commands */ +#define RCX_BACKUP_REQ 0x00001F50 +#define RCX_BACKUP_CNF 0x00001F51 +#define RCX_RESTORE_REQ 0x00001F52 +#define RCX_RESTORE_CNF 0x00001F53 +/* do NOT add further commands in the range 0x00001FXX (because of collosion with PNS_IF task) */ + +/***************************************************************************************/ +/* Common global stack commands */ + +#define RCX_GET_WATCHDOG_TIME_REQ 0x00002F02 +#define RCX_GET_WATCHDOG_TIME_CNF 0x00002F03 + +#define RCX_SET_WATCHDOG_TIME_REQ 0x00002F04 +#define RCX_SET_WATCHDOG_TIME_CNF 0x00002F05 + +#define RCX_GET_SLAVE_HANDLE_REQ 0x00002F08 +#define RCX_GET_SLAVE_HANDLE_CNF 0x00002F09 + +#define RCX_GET_SLAVE_CONN_INFO_REQ 0x00002F0A +#define RCX_GET_SLAVE_CONN_INFO_CNF 0x00002F0B + +#define RCX_GET_DPM_IO_INFO_REQ 0x00002F0C +#define RCX_GET_DPM_IO_INFO_CNF 0x00002F0D + +#define RCX_REGISTER_APP_REQ 0x00002F10 +#define RCX_REGISTER_APP_CNF 0x00002F11 + +#define RCX_UNREGISTER_APP_REQ 0x00002F12 +#define RCX_UNREGISTER_APP_CNF 0x00002F13 + +#define RCX_DELETE_CONFIG_REQ 0x00002F14 +#define RCX_DELETE_CONFIG_CNF 0x00002F15 + +#define RCX_READ_IO_DATA_IMAGE_REQ 0x00002F20 +#define RCX_READ_IO_DATA_IMAGE_CNF 0x00002F21 + +#define RCX_BUSSCAN_REQ 0x00002f22 +#define RCX_BUSSCAN_CNF 0x00002f23 + +#define RCX_GET_DEVICE_INFO_REQ 0x00002f24 +#define RCX_GET_DEVICE_INFO_CNF 0x00002f25 + +#define RCX_START_STOP_COMM_REQ 0x00002F30 +#define RCX_START_STOP_COMM_CNF 0x00002F31 + +#define RCX_LOCK_UNLOCK_CONFIG_REQ 0x00002F32 +#define RCX_LOCK_UNLOCK_CONFIG_CNF 0x00002F33 + +#define RCX_SET_HANDSHAKE_CONFIG_REQ 0x00002F34 +#define RCX_SET_HANDSHAKE_CONFIG_CNF 0x00002F35 + +#define RCX_CHANNEL_INIT_REQ 0x00002F80 +#define RCX_CHANNEL_INIT_CNF 0x00002F81 + +#define RCX_VERIFY_DATABASE_REQ 0x00002F82 +#define RCX_VERIFY_DATABASE_CNF 0x00002F83 + +#define RCX_ACTIVATE_DATABASE_REQ 0x00002F84 +#define RCX_ACTIVATE_DATABASE_CNF 0x00002F85 + +#define RCX_SET_FW_PARAMETER_REQ 0x00002F86 +#define RCX_SET_FW_PARAMETER_CNF 0x00002F87 + +#define RCX_GET_FW_PARAMETER_REQ 0x00002F88 +#define RCX_GET_FW_PARAMETER_CNF 0x00002F89 + +#define RCX_LINK_STATUS_CHANGE_IND 0x00002F8A +#define RCX_LINK_STATUS_CHANGE_RES 0x00002F8B + + +/* pragma pack */ +#ifdef PRAGMA_PACK_ENABLE + #pragma PRAGMA_PACK_1(RCX_PUBLIC) +#endif + +/****************************************************************************** + * Packet: RCX_TIME_COMMAND_REQ/RCX_TIME_COMMAND_CNF + * + */ + +/* Time command codes */ +#define TIME_CMD_GETSTATE 0x00000001 +#define TIME_CMD_GETTIME 0x00000002 +#define TIME_CMD_SETTIME 0x00000003 + +/* Time RTC information */ +#define TIME_INFO_RTC_MSK 0x00000007 +#define TIME_INFO_RTC_TYPE_MSK 0x00000003 +#define TIME_INFO_RTC_RTC_STATE 0x00000004 + +typedef __TLR_PACKED_PRE struct RCX_TIME_CMD_DATA_Ttag +{ + TLR_UINT32 ulTimeCmd; + TLR_UINT32 ulData; + TLR_UINT32 ulReserved; +} __TLR_PACKED_POST RCX_TIME_CMD_DATA_T; + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TIME_CMD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TIME_CMD_DATA_T tData; /* packet data */ +} RCX_TIME_CMD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TIME_CMD_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TIME_CMD_DATA_T tData; /* packet data */ +} RCX_TIME_CMD_CNF_T; + + +/****************************************************************************** + * Packet: RCX_ENABLE_PERF_MEASUREMENT_REQ/RCX_ENABLE_PERF_MEASUREMENT_CNF + * + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_ENABLE_PERF_MEASUREMENT_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_ENABLE_PERF_MEASUREMENT_REQ_T; + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_ENABLE_PERF_MEASUREMENT_CNF_DATA_Ttag +{ + TLR_UINT32 ulOldState; +} RCX_ENABLE_PERF_MEASUREMENT_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_ENABLE_PERF_MEASUREMENT_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_ENABLE_PERF_MEASUREMENT_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_ENABLE_PERF_MEASUREMENT_CNF_T; + +/****************************************************************************** + * Packet: RCX_GET_PERF_COUNTERS_REQ/RCX_GET_PERF_COUNTERS_CNF + * + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_GET_PERF_COUNTERS_REQ_DATA_Ttag +{ + TLR_UINT16 usStartToken; + TLR_UINT16 usTokenCount; +} __TLR_PACKED_POST RCX_GET_PERF_COUNTERS_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_PERF_COUNTERS_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_PERF_COUNTERS_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_PERF_COUNTERS_REQ_T; + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_PERF_COUNTER_DATA_Ttag +{ + TLR_UINT32 ulNanosecondsLower; + TLR_UINT32 ulNanosecondsUpper; +} __TLR_PACKED_POST RCX_PERF_COUNTER_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_PERF_COUNTERS_CNF_DATA_Ttag +{ + TLR_UINT16 usStartToken; + TLR_UINT16 usTokenCount; + RCX_PERF_COUNTER_DATA_T tPerfSystemUptime; + /* following entry is a placeholder for a dynamic array whose length is given by ulLen in the packet header */ + RCX_PERF_COUNTER_DATA_T atPerfCounters[1]; +} __TLR_PACKED_POST RCX_GET_PERF_COUNTERS_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_PERF_COUNTERS_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_PERF_COUNTERS_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_PERF_COUNTERS_CNF_T; + +/****************************************************************************** + * Packet: RCX_SET_MAC_ADDR_REQ/RCX_SET_MAC_ADDR_CNF + * + * This packet reconfigures the MAC address + * If RCX_STORE_MAC_ADDRESS is set, it will also update the Sec EEPROM permanently. + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SET_MAC_ADDR_REQ_DATA_Ttag +{ + TLR_UINT32 ulParam; /* Parameter Bit Field */ + TLR_UINT8 abMacAddr[6]; /* MAC address */ + TLR_UINT8 abPad[2]; /* Pad bytes, set to zero */ +} __TLR_PACKED_POST RCX_SET_MAC_ADDR_REQ_DATA_T; + +#define RCX_STORE_MAC_ADDRESS 0x00000001 +#define RCX_FORCE_MAC_ADDRESS 0x00000002 + +typedef __TLR_PACKED_PRE struct RCX_SET_MAC_ADDR_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_SET_MAC_ADDR_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_SET_MAC_ADDR_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SET_MAC_ADDR_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_SET_MAC_ADDR_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FIRMWARE_RESET_REQ/RCX_FIRMWARE_RESET_CNF + * + * This packet executes a RESET on the netX + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_RESET_REQ_DATA_Ttag +{ + TLR_UINT32 ulTimeToReset; /* time to reset in ms */ + TLR_UINT32 ulResetMode; /* reset mode param */ +} __TLR_PACKED_POST RCX_FIRMWARE_RESET_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_RESET_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FIRMWARE_RESET_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FIRMWARE_RESET_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_RESET_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FIRMWARE_RESET_CNF_T; + + +/****************************************************************************** + * Packet: RCX_QUE_IDENTIFY_REQ/RCX_QUE_IDENTIFY_CNF + * + * This packet allows identifying a queue by name + */ + + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_REQ_DATA_Ttag +{ + TLR_STR szQueName[16]; /* queue name */ + TLR_UINT32 ulInst; /* instance of queue */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_CNF_DATA_Ttag +{ + TLR_UINT32 ulQue; /* queue handle */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_QUE_IDENTIFY_IDX_REQ/RCX_QUE_IDENTIFY_IDX_CNF + * + * This packet allows identifying a queue by index + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_IDX_REQ_DATA_Ttag +{ + TLR_UINT32 ulIndex; /* queue table index */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_IDX_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_IDX_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_IDENTIFY_IDX_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_IDX_CNF_DATA_Ttag +{ + TLR_UINT32 ulIndex; /* queue table index */ + TLR_STR szQueName[16]; /* queue name */ + TLR_UINT32 ulInst; /* instance of queue */ + TLR_UINT32 ulQue; /* queue handle */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_IDX_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_IDENTIFY_IDX_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_IDENTIFY_IDX_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_IDENTIFY_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_IDENTIFY_REQ/RCX_TSK_IDENTIFY_CNF + * + * This packet allows identifying a task by name + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_REQ_DATA_Ttag +{ + TLR_STR szTskName[16]; /* task name */ + TLR_UINT32 ulInst; /* task instance */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_CNF_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulTskIdentifier; /* task identifier */ + TLR_UINT16 usTskMajorVersion; /* task major version */ + TLR_UINT16 usTskMinorVersion; /* task minor version */ + TLR_UINT32 ulNumOfDiagStructs; /* count of task diagnostic structures */ + TLR_UINT32 ulPriority; /* task priority */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_NAME_REQ/RCX_TSK_GET_NAME_CNF + * + * This packet allows retrieving a task name from a given handle + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_NAME_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ +} __TLR_PACKED_POST RCX_TSK_GET_NAME_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_NAME_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_NAME_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_NAME_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_NAME_CNF_DATA_Ttag +{ + TLR_UINT8 abTskName[16]; /* task name */ + TLR_UINT32 ulInstance; /* task instance */ +} __TLR_PACKED_POST RCX_TSK_GET_NAME_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_NAME_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_NAME_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_NAME_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_IDENTIFY_IDX_REQ/RCX_TSK_IDENTIFY_IDX_CNF + * + * This packet allows identifying a task by index + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_IDX_REQ_DATA_Ttag +{ + TLR_UINT32 ulIndex; /* task table index */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_IDX_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_IDX_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_IDENTIFY_IDX_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_IDX_CNF_DATA_Ttag +{ + TLR_UINT32 ulIndex; /* task table index */ + TLR_STR szTskName[16]; /* task name */ + TLR_UINT32 ulInstance; /* task instance */ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulTskIdentifier; /* task identifier */ + TLR_UINT16 usTskMajorVersion; /* task major version */ + TLR_UINT16 usTskMinorVersion; /* task minor version */ + TLR_UINT32 ulNumOfDiagStructs; /* count of task diagnostic structures */ + TLR_UINT32 ulPriority; /* task priority */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_IDX_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_IDENTIFY_IDX_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_IDENTIFY_IDX_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_IDENTIFY_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_STATUS_IDX_REQ/RCX_TSK_GET_STATUS_IDX_CNF + * Packet: RCX_TSK_GET_STATUS_REQ /RCX_TSK_GET_STATUS_CNF + * + * These packets allow retrieving the task status either by index or handle + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_STATUS_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_REQ_T; + +typedef RCX_TSK_GET_STATUS_REQ_T RCX_TSK_GET_STATUS_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_CNF_DATA_Ttag +{ + TLR_UINT32 ulStatusCode; /* task status code */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_STATUS_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_CNF_T; + +typedef RCX_TSK_GET_STATUS_CNF_T RCX_TSK_GET_STATUS_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_INFO_FIELD_REQ/RCX_TSK_GET_INFO_FIELD_CNF + * + * This packet retrieves the diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulInfoNo; /* index of information field */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_FIELD_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_REQ_T; + +typedef RCX_TSK_GET_INFO_FIELD_REQ_T RCX_TSK_GET_INFO_FIELD_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_CNF_DATA_Ttag +{ + TLR_UINT8 abData[1]; /* ATTENTION: This is a placeholder for info field data. + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_FIELD_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_CNF_T; + +typedef RCX_TSK_GET_INFO_FIELD_CNF_T RCX_TSK_GET_INFO_FIELD_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_INFO_FIELD_SIZE_REQ/RCX_TSK_GET_INFO_FIELD_SIZE_CNF + * + * This function retrieves the sizes of the diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulInfoNo; /* index of information field */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_SIZE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_SIZE_REQ_T; + +typedef RCX_TSK_GET_INFO_FIELD_SIZE_REQ_T RCX_TSK_GET_INFO_FIELD_SIZE_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_Ttag +{ + TLR_UINT32 ulInfoSize; /* info field size in bytes */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_FIELD_SIZE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_FIELD_SIZE_CNF_T; + +typedef RCX_TSK_GET_INFO_FIELD_SIZE_CNF_T RCX_TSK_GET_INFO_FIELD_SIZE_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_INFO_STRUCT_REQ/RCX_TSK_GET_INFO_STRUCT_CNF + * + * This function retrieves the structural information of the + * diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_STRUCT_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulInfoNo; /* index of information field */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_STRUCT_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STRUCT_FIELD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_STRUCT_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_STRUCT_REQ_T; + +typedef RCX_TSK_GET_INFO_STRUCT_REQ_T RCX_TSK_GET_INFO_STRUCT_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_STRUCT_CNF_DATA_Ttag +{ + TLR_UINT8 abData[1]; /* ATTENTION: This is a placeholder for info field data. + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_STRUCT_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_STRUCT_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_STRUCT_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_STRUCT_CNF_T; + +typedef RCX_TSK_GET_INFO_STRUCT_CNF_T RCX_TSK_GET_INFO_STRUCT_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_INFO_ARRAY_REQ/RCX_TSK_GET_INFO_ARRAY_CNF + * + * This function retrieves the diagnostic structure count and the task handle + * by reading the task table in an indexed way + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_ARRAY_REQ_DATA_Ttag +{ + TLR_UINT32 ulStartIndex; /* start index of requested list */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_ARRAY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_ARRAY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_ARRAY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_ARRAY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENTtag +{ + TLR_UINT32 ulTsk; /* task handle */ + TLR_UINT32 ulNumberOfInfoFields; /* number of info fields */ + /* the field ulInfoNo of the earlier two requests will have the value range of 0 - (ulNumberOfInfoFields-1) */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENT; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_ARRAY_CNF_DATA_Ttag +{ + TLR_UINT32 ulStartIndex; /* start index */ + TLR_UINT32 ulNumberOfEntries; /* number of entries (declaring range of start to start+count-1) */ + TLR_UINT32 ulCurrentTskCount; /* current number of tasks */ + RCX_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENT atInfoData[1]; /* ATTENTION: This is a placeholder for task info data. + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_ARRAY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_INFO_ARRAY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_INFO_ARRAY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_INFO_ARRAY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_START_REQ/RCX_TSK_START_CNF + * + * This packet allows starting a user task + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_START_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ +} __TLR_PACKED_POST RCX_TSK_START_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_START_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_START_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_START_REQ_T; + +typedef RCX_TSK_START_REQ_T RCX_TSK_START_IDX_REQ_T; + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_START_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_TSK_START_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_STOP_REQ/RCX_TSK_STOP_CNF + * + * This packet allows stopping a user task + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_STOP_REQ_DATA_Ttag +{ + TLR_UINT32 ulTsk; /* task handle */ +} __TLR_PACKED_POST RCX_TSK_STOP_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_STOP_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_STOP_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_STOP_REQ_T; + +typedef RCX_TSK_STOP_REQ_T RCX_TSK_STOP_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_STOP_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_TSK_STOP_CNF_T; + + +/****************************************************************************** + * Packet: MID_SYS_QUE_LOG_SET_REQ/MID_SYS_QUE_LOG_SET_CNF + * + * This packet sets a logical queue entry + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_SET_REQ_DATA_Ttag +{ + TLR_UINT32 ulLogQue; /* logical queue id */ +} __TLR_PACKED_POST RCX_QUE_LOG_SET_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_SET_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_LOG_SET_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_LOG_SET_REQ_T; + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_SET_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_QUE_LOG_SET_CNF_T; + + +/****************************************************************************** + * Packet: MID_SYS_QUE_LOG_CLR_REQ/MID_SYS_QUE_LOG_CLR_CNF + * + * This packet clears a logical queue entry + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_CLR_REQ_DATA_Ttag +{ + TLR_UINT32 ulLogQue; /* logical queue id */ +} __TLR_PACKED_POST RCX_QUE_LOG_CLR_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_CLR_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_LOG_CLR_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_LOG_CLR_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_LOG_CLR_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_LOG_CLR_CNF_T; + + +/****************************************************************************** + * Packet: RCX_QUE_GET_LOAD_REQ/RCX_QUE_GET_LOAD_CNF + * + * This packet allows retrieving the queue load of a given queue + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_GET_LOAD_REQ_DATA_Ttag +{ + TLR_UINT32 ulQue[1]; /* ATTENTION: This is a placeholder for number of queues to query. + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_QUE_GET_LOAD_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_QUE_GET_LOAD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_GET_LOAD_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_GET_LOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_QUE_GET_LOAD_CNF_DATA_Ttag +{ + TLR_UINT32 ulQueLoad[1]; /* ATTENTION: This is a placeholder for queue load entries + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_QUE_GET_LOAD_CNF_DATA_T; + +#define RCX_QUE_LOAD_INVALID (0xffffffffL) + +typedef __TLR_PACKED_PRE struct RCX_QUE_GET_LOAD_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_QUE_GET_LOAD_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_QUE_GET_LOAD_CNF_T; + +/****************************************************************************** + * Packet: RCX_PHYSMEM_READ_REQ/RCX_PHYSMEM_READ_CNF + * + * This packet allows read accesss to physical memory area + */ + +#define RCX_PHYSMEM_ACCESSTYPE_8BIT 0 +#define RCX_PHYSMEM_ACCESSTYPE_16BIT 1 +#define RCX_PHYSMEM_ACCESSTYPE_32BIT 2 +#define RCX_PHYSMEM_ACCESSTYPE_TASK 3 + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_READ_REQ_DATA_Ttag +{ + TLR_UINT32 ulPhysicalAddress; + TLR_UINT32 ulAccessType; + TLR_UINT32 ulReadLength; + +} __TLR_PACKED_POST RCX_PHYSMEM_READ_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_READ_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PHYSMEM_READ_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_PHYSMEM_READ_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_READ_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_PHYSMEM_READ_CNF_T; + +/****************************************************************************** + * Packet: RCX_PHYSMEM_WRITE_REQ/RCX_PHYSMEM_WRITE_CNF + * + * This packet allows write accesss to physical memory area + */ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_WRITE_REQ_DATA_Ttag +{ + TLR_UINT32 ulPhysicalAddress; + TLR_UINT32 ulAccessType; +} __TLR_PACKED_POST RCX_PHYSMEM_WRITE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_WRITE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PHYSMEM_WRITE_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_PHYSMEM_WRITE_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PHYSMEM_WRITE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_PHYSMEM_WRITE_CNF_T; + +/****************************************************************************** + * Packet: RCX_MODULE_INSTANTIATE_REQ/RCX_MODULE_INSTANTIATE_CNF + * + * This packet allows starting of a firmware module for a given channel + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_MODULE_INSTANTIATE_REQ_DATA_Ttag +{ + TLR_TASK_UID_T tModuleUuid; /* packet header */ + TLR_UINT32 ulInst; /* packet data */ +} __TLR_PACKED_POST RCX_MODULE_INSTANTIATE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_MODULE_INSTANTIATE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_MODULE_INSTANTIATE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_MODULE_INSTANTIATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_MODULE_INSTANTIATE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_MODULE_INSTANTIATE_CNF_T; + + +/****************************************************************************** + * Packet: RCX_MODULE_CHANNEL_REQ/RCX_MODULE_CHANNEL_CNF + * + * This packet allows starting of a previously downloaded firmware module for a given channel + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_CHANNEL_INSTANTIATE_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelNo; /* channel number */ +} __TLR_PACKED_POST RCX_CHANNEL_INSTANTIATE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_CHANNEL_INSTANTIATE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_CHANNEL_INSTANTIATE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_CHANNEL_INSTANTIATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_CHANNEL_INSTANTIATE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_CHANNEL_INSTANTIATE_CNF_T; + + +/****************************************************************************** + * Packet: RCX_MODULE_GET_INFO_IDX_REQ/RCX_MODULE_GET_INFO_IDX_CNF + * + * This packet reads out the current available module information from the + * module table + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_MODULE_GET_INFO_IDX_REQ_DATA_Ttag +{ + TLR_UINT32 ulIdx; /* module table index */ +} __TLR_PACKED_POST RCX_MODULE_GET_INFO_IDX_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_MODULE_GET_INFO_IDX_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_MODULE_GET_INFO_IDX_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_MODULE_GET_INFO_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_MODULE_GET_INFO_IDX_CNF_DATA_Ttag +{ + /* index in module table */ + TLR_UINT32 ulIdx; + /* module uuid */ + TLR_UUID_T tModuleUuid; + /* init table address */ + TLR_UINT32 ulInitTableAddress; + /* code block start address */ + TLR_UINT32 ulCodeBlockStart; + /* data block start address */ + TLR_UINT32 ulDataBlockStart; + /* bss block start address */ + TLR_UINT32 ulBssBlockStart; + /* GOT start address */ + TLR_UINT32 ulGOT; + /* PLT start address */ + TLR_UINT32 ulPLT; + /* task associated with module */ + TLR_UINT32 ulNumTasks; + /* static task table start */ + TLR_UINT32 ulStaticTaskTableStart; + /* debug table start */ + TLR_UINT32 ulDebugTableStart; + TLR_UINT32 ulDebugTableSize; + /* export table start */ + TLR_UINT32 ulExportTableStart; + TLR_UINT32 ulExportTableEntries; +} __TLR_PACKED_POST RCX_MODULE_GET_INFO_IDX_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_MODULE_GET_INFO_IDX_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_MODULE_GET_INFO_IDX_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_MODULE_GET_INFO_IDX_CNF_T; + + +/****************************************************************************** + * Packet: RCX_TSK_GET_STATUS_ARRAY_REQ/RCX_TSK_GET_STATUS_ARRAY_CNF + * + * This function reads out the task status' in an indexed way + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_ARRAY_REQ_DATA_Ttag +{ + TLR_UINT32 ulStartIndex; /* start index of requested list */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_ARRAY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_ARRAY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_STATUS_ARRAY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_ARRAY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_ARRAY_CNF_DATA_Ttag +{ + TLR_UINT32 ulStartIndex; /* start index */ + TLR_UINT32 ulNumberOfEntries; /* number of entries (declaring range of start to start+count-1) */ + TLR_UINT32 ulCurrentTskCount; /* current number of tasks */ + TLR_UINT32 aulStatusCodes[1]; /* ATTENTION: This is a placeholder for the status codes + The packet must be allocated in correct size*/ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_ARRAY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_TSK_GET_STATUS_ARRAY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_TSK_GET_STATUS_ARRAY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_TSK_GET_STATUS_ARRAY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_DPM_GET_BLOCK_INFO_REQ/RCX_DPM_GET_BLOCK_INFO_CNF + * + * This function retrieves the DPM Channel Block information + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_BLOCK_INFO_REQ_DATA_Ttag +{ + TLR_UINT32 ulAreaIndex; /* area index */ + TLR_UINT32 ulSubblockIndex; /* subblock index */ +} __TLR_PACKED_POST RCX_DPM_GET_BLOCK_INFO_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_BLOCK_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_BLOCK_INFO_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_BLOCK_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_BLOCK_INFO_CNF_DATA_Ttag +{ + TLR_UINT32 ulAreaIndex; /* area index */ + TLR_UINT32 ulSubblockIndex; /* number of subblock to request data of */ + TLR_UINT32 ulType; /* Type of subblock */ + TLR_UINT32 ulOffset; /* Relative Offset of this Subblock within the Area */ + TLR_UINT32 ulSize; /* Size of the Subblock */ + TLR_UINT16 usFlags; /* flags of the subblock */ + TLR_UINT16 usHandshakeMode; /* Handshake Mode */ + TLR_UINT16 usHandshakeBit; /* Bit position in the Handshake register */ + TLR_UINT16 usReserved; /* res */ +} __TLR_PACKED_POST RCX_DPM_GET_BLOCK_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_BLOCK_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_BLOCK_INFO_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_BLOCK_INFO_CNF_T; + + +/****************************************************************************** + * Packet: RCX_DPM_GET_COMFLAG_INFO_REQ/RCX_DPM_GET_COMFLAG_INFO_CNF + * + * This packet retrieves the currently set COM Flags + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMFLAG_INFO_REQ_DATA_Ttag +{ + TLR_UINT32 ulAreaIndex; /* area index */ +} __TLR_PACKED_POST RCX_DPM_GET_COMFLAG_INFO_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMFLAG_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_COMFLAG_INFO_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_COMFLAG_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMFLAG_INFO_CNF_DATA_Ttag +{ + TLR_UINT32 ulAreaIndex; /* area index */ + TLR_UINT32 ulNetxComFlag; + TLR_UINT32 ulHostComFlag; +} __TLR_PACKED_POST RCX_DPM_GET_COMFLAG_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMFLAG_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_COMFLAG_INFO_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_COMFLAG_INFO_CNF_T; + + +/****************************************************************************** + * Packet: RCX_LISTS_GET_NUM_ENTRIES_REQ/RCX_LISTS_GET_NUM_ENTRIES_CNF + * + * This function retrieves the number of tasks and queues available on + * the system. + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_LISTS_GET_NUM_ENTRIES_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_LISTS_GET_NUM_ENTRIES_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_LISTS_GET_NUM_ENTRIES_CNF_DATA_Ttag +{ + TLR_UINT32 ulNumTasks; /* number of tasks */ + TLR_UINT32 ulNumQueues; /* number of queues */ +} __TLR_PACKED_POST RCX_LISTS_GET_NUM_ENTRIES_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_LISTS_GET_NUM_ENTRIES_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_LISTS_GET_NUM_ENTRIES_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_LISTS_GET_NUM_ENTRIES_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FIRMWARE_IDENTIFY_REQ/RCX_FIRMWARE_IDENTIFY_CNF + * + * This function identifies the currently running firmware on a given channel + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_IDENTIFY_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelId; /* channel id */ +} __TLR_PACKED_POST RCX_FIRMWARE_IDENTIFY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_IDENTIFY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FIRMWARE_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FIRMWARE_IDENTIFY_REQ_T; + +#define RCX_FIRMWARE_IDENTIFY_SYSTEM 0xFFFFFFFF + +/***** confirmation packet *****/ + +/*****************************************************************************/ +/*! Firmware Identification Structure */ +/*****************************************************************************/ + +typedef __TLR_PACKED_PRE struct RCX_FW_VERSION_Ttag +{ + unsigned short usMajor; + unsigned short usMinor; + unsigned short usBuild; + unsigned short usRevision; +} __TLR_PACKED_POST RCX_FW_VERSION_T; + +typedef __TLR_PACKED_PRE struct RCX_FW_NAME_Ttag +{ + unsigned char bNameLength; + unsigned char abName[63]; +} __TLR_PACKED_POST RCX_FW_NAME_T; + +typedef __TLR_PACKED_PRE struct RCX_FW_DATE_Ttag +{ + unsigned short usYear; + unsigned char bMonth; + unsigned char bDay; +} __TLR_PACKED_POST RCX_FW_DATE_T; + +typedef __TLR_PACKED_PRE struct RCX_FW_IDENTIFICATION_Ttag +{ + RCX_FW_VERSION_T tFwVersion; /* !< firmware version */ + RCX_FW_NAME_T tFwName; /* !< firmware name */ + RCX_FW_DATE_T tFwDate; /* !< firmware date */ +} __TLR_PACKED_POST RCX_FW_IDENTIFICATION_T; + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_IDENTIFY_CNF_DATA_Ttag +{ + RCX_FW_IDENTIFICATION_T tFirmwareIdentification; /* firmware identification */ +} __TLR_PACKED_POST RCX_FIRMWARE_IDENTIFY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FIRMWARE_IDENTIFY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FIRMWARE_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FIRMWARE_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_HW_IDENTIFY_REQ/RCX_HW_IDENTIFY_CNF + * + * This function retrieves the hardware identification + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_HW_IDENTIFY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_HW_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_HW_IDENTIFY_CNF_DATA_Ttag +{ + TLR_UINT32 ulDeviceNumber; /* device number */ + TLR_UINT32 ulSerialNumber; /* serial number */ + TLR_UINT16 ausHwOptions[4]; /* hardware options */ + TLR_UINT16 usDeviceClass; /* device class */ + TLR_UINT8 bHwRevision; /* hardware revision */ + TLR_UINT8 bHwCompatibility; /* hardware compatibility */ + TLR_UINT32 ulBootType; /* how did the device boot up */ + TLR_UINT32 ulChipTyp; /* chip typ */ + TLR_UINT32 ulChipStep; /* chip step */ + TLR_UINT32 ulRomcodeRevision; /* romcode revision */ +} __TLR_PACKED_POST RCX_HW_IDENTIFY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_HW_IDENTIFY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_HW_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_HW_IDENTIFY_CNF_T; + + + + + + +/************************************************************************************************** + * file transfer packets + */ + +#define RCX_FILE_XFER_INVALID 0 +#define RCX_FILE_XFER_FILESYSTEM 1 /* transfer is related to the Filesystem installed in the Firmware (i.e. 2nd stage bootloader etc.) */ +#define RCX_FILE_XFER_FILE RCX_FILE_XFER_FILESYSTEM +#define RCX_FILE_XFER_MODULE 2 /* will be directly loaded into ram and relocated to be integrated in the running firmware */ +#define RCX_FILE_XFER_PARALLEL_FLASH 3 /* flasher interface */ +#define RCX_FILE_XFER_SERIAL_FLASH 4 /* flasher interface */ +#define RCX_FILE_XFER_LICENSE_CODE 5 /* license code interface */ + +#define RCX_FILE_CHANNEL_0 (0) +#define RCX_FILE_CHANNEL_1 (1) +#define RCX_FILE_CHANNEL_2 (2) +#define RCX_FILE_CHANNEL_3 (3) +#define RCX_FILE_CHANNEL_4 (4) +#define RCX_FILE_CHANNEL_5 (5) + +#define RCX_FILE_SYSTEM (0xFFFFFFFF) + + +/****************************************************************************** + * Packet: RCX_FILE_UPLOAD_REQ/RCX_FILE_UPLOAD_CNF + * + * This packet starts a file upload + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_REQ_DATA_Ttag +{ + TLR_UINT32 ulXferType; + TLR_UINT32 ulMaxBlockSize; + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_UPLOAD_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_CNF_DATA_Ttag +{ + TLR_UINT32 ulMaxBlockSize; /* maximum block size possible */ + TLR_UINT32 ulFileLength; /* file size to transfer */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_UPLOAD_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FILE_UPLOAD_DATA_REQ/RCX_FILE_UPLOAD_DATA_CNF + * + * This packet requests the data from a previously successful RCX_FILE_UPLOAD_REQ + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_DATA_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_DATA_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_DATA_CNF_DATA_Ttag +{ + TLR_UINT32 ulBlockNo; /* block number starting from 0 in a download sequence */ + TLR_UINT32 ulChksum; /* cumulative CRC-32 checksum */ + /* data block follows here */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_DATA_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_DATA_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_UPLOAD_DATA_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_DATA_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FILE_UPLOAD_ABORT_REQ/RCX_FILE_UPLOAD_ABORT_CNF + * + * This packet aborts a currently running file upload + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_ABORT_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_ABORT_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_UPLOAD_ABORT_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_UPLOAD_ABORT_CNF_T; + + + +/****************************************************************************** + * Packet: RCX_FORMAT_REQ/RCX_FORMAT_CNF_T + * + * Formats the default volume + */ +#define RCX_FORMAT_REQ_DATA_FLAGS_QUICKFORMAT 0x00000000 +#define RCX_FORMAT_REQ_DATA_FLAGS_FULLFORMAT 0x00000001 + +typedef __TLR_PACKED_PRE struct RCX_FORMAT_REQ_DATA_Ttag +{ + TLR_UINT32 ulFlags; + TLR_UINT32 ulReserved; + /* Future version may have the volume name starting here as NUL terminated string, + Currently unsupported */ +} __TLR_PACKED_POST RCX_FORMAT_REQ_DATA_T; + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_FORMAT_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FORMAT_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_FORMAT_REQ_T; + + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_FORMAT_CNF_DATA_Ttag +{ + /* Valid if format has failed during a full format with an error during + erase / verify (ulSta = TLR_E_RCX_FORMAT_ERASE_FAILED or TLR_E_RCX_FORMAT_VERIFY_FAILED */ + TLR_UINT32 ulExtendedErrorInfo; + TLR_UINT32 ulErrorOffset; +} __TLR_PACKED_POST RCX_FORMAT_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FORMAT_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FORMAT_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_FORMAT_CNF_T; + +/****************************************************************************** + * Packet: RCX_FILE_DOWNLOAD_REQ/RCX_FILE_DOWNLOAD_CNF + * + * This packet starts a file download + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_REQ_DATA_Ttag +{ + TLR_UINT32 ulXferType; /* transfer type */ + TLR_UINT32 ulMaxBlockSize; /* maximum possible download size by requestor */ + TLR_UINT32 ulFileLength; /* file size to download */ + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_DOWNLOAD_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_CNF_DATA_Ttag +{ + TLR_UINT32 ulMaxBlockSize; /* download block size selected */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_DOWNLOAD_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FILE_DOWNLOAD_DATA_REQ/RCX_FILE_DOWNLOAD_DATA_CNF + * + * This packet transfers the file data of a previously successful RCX_DOWNLOAD_REQ + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_DATA_REQ_DATA_Ttag +{ + TLR_UINT32 ulBlockNo; /* block number */ + TLR_UINT32 ulChksum; /* cumulative CRC-32 checksum */ + /* data block follows here */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_DATA_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_DATA_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_DOWNLOAD_DATA_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_DATA_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_DATA_CNF_DATA_Ttag +{ + TLR_UINT32 ulExpectedCrc32; /* expected CRC-32 checksum */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_DATA_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_DATA_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_DOWNLOAD_DATA_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_DATA_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FILE_DOWNLOAD_ABORT_REQ/RCX_FILE_DOWNLOAD_ABORT_CNF + * + * This packet aborts a currently running file download + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_ABORT_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_ABORT_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DOWNLOAD_ABORT_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_DOWNLOAD_ABORT_CNF_T; + + +/****************************************************************************** + * Packet: RCX_FILE_GET_MD5_REQ/RCX_FILE_GET_MD5_CNF + * + * This packet retrieves the MD5 sum of a given file + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_GET_MD5_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} __TLR_PACKED_POST RCX_FILE_GET_MD5_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_GET_MD5_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_GET_MD5_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_GET_MD5_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_GET_MD5_CNF_DATA_Ttag +{ + TLR_UINT8 abMD5[16]; /* MD5 checksum */ +} __TLR_PACKED_POST RCX_FILE_GET_MD5_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_GET_MD5_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_GET_MD5_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_GET_MD5_CNF_T; + +/* This packet has the same structure, so we are using a typedef here instead of copy and paste */ +typedef RCX_FILE_GET_MD5_REQ_T RCX_FILE_GET_HEADER_MD5_REQ_T; +typedef RCX_FILE_GET_MD5_CNF_T RCX_FILE_GET_HEADER_MD5_CNF_T; + +/****************************************************************************** + * Packet: RCX_FILE_DELETE_REQ/RCX_FILE_DELETE_CNF + * + * This packet allows deleting a file on the system + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DELETE_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} __TLR_PACKED_POST RCX_FILE_DELETE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_DELETE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_DELETE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_DELETE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_DELETE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_DELETE_CNF_T; + +/****************************************************************************** + * Packet: RCX_FILE_RENAME_REQ/RCX_FILE_RENAME_CNF + * + * This packet allows renaming a file on the system + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_RENAME_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usOldNameLength; /* length of NUL-terminated old file name that will follow */ + TLR_UINT16 usNewNameLength; /* length of NUL-terminated new file name that will follow */ + /* a NUL-terminated file name will follow here */ +} __TLR_PACKED_POST RCX_FILE_RENAME_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_FILE_RENAME_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_FILE_RENAME_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_FILE_RENAME_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_FILE_RENAME_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_FILE_RENAME_CNF_T; + +/****************************************************************************** + * Packet: RCX_DIR_LIST_REQ/RCX_DIR_LIST_CNF + * + * This packet retrieves a Directory Listing of a given directory + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DIR_LIST_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see RCX_FILE_xxxx */ + TLR_UINT16 usDirNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated dir name will follow here */ +} __TLR_PACKED_POST RCX_DIR_LIST_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DIR_LIST_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_DIR_LIST_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_DIR_LIST_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DIR_LIST_CNF_DATA_Ttag +{ + TLR_STR szName[16]; /* file name */ + TLR_UINT32 ulFileSize; /* file size */ + TLR_UINT8 bFileType; /* file type */ + TLR_UINT8 bReserved; /* reserved */ + TLR_UINT16 bReserved2; /* reserved */ +} __TLR_PACKED_POST RCX_DIR_LIST_CNF_DATA_T; + +#define RCX_DIR_LIST_CNF_FILE_TYPE_DIRECTORY 1 +#define RCX_DIR_LIST_CNF_FILE_TYPE_FILE 2 + +typedef __TLR_PACKED_PRE struct RCX_DIR_LIST_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DIR_LIST_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DIR_LIST_CNF_T; + +/****************************************************************************** + * Packet: RCX_VOLUME_GET_ENTRY_REQ/RCX_VOLUME_GET_ENTRY_CNF + * + * This packet retrieves the volume information from the system by index + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_VOLUME_GET_ENTRY_REQ_DATA_Ttag +{ + TLR_UINT32 ulVolumeIndex; /* volume entry table index */ +} __TLR_PACKED_POST RCX_VOLUME_GET_ENTRY_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_VOLUME_GET_ENTRY_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_VOLUME_GET_ENTRY_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_VOLUME_GET_ENTRY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_VOLUME_GET_ENTRY_CNF_DATA_Ttag +{ + TLR_UINT32 ulVolumeCount; /* count of volumes */ + TLR_STR szName[16]; /* name of currently requested volume entry */ +} __TLR_PACKED_POST RCX_VOLUME_GET_ENTRY_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_VOLUME_GET_ENTRY_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_VOLUME_GET_ENTRY_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_VOLUME_GET_ENTRY_CNF_T; + + +/****************************************************************************** + * Packet: RCX_GET_COMMON_STATE_REQ/RCX_GET_COMMON_STATE_CNF + * + * This packet retrieves the Common State Block of a given Channel in the DPM + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_READ_COMMON_STS_BLOCK_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelId; +} __TLR_PACKED_POST RCX_READ_COMMON_STS_BLOCK_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_COMMON_STS_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_COMMON_STS_BLOCK_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_COMMON_STS_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_COMMON_STS_BLOCK_CNF_DATA_Ttag +{ + NETX_COMMON_STATUS_BLOCK tCommonStatus; +} __TLR_PACKED_POST RCX_READ_COMMON_STS_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_COMMON_STS_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_COMMON_STS_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_COMMON_STS_BLOCK_CNF_T; + + +/************************************** + * legacy definitions of RCX_READ_COMMON_STS_BLOCK_REQ_T packet for compatibility reasons + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_GET_COMMON_STATE_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelIndex; /* channel number */ +} __TLR_PACKED_POST RCX_DPM_GET_COMMON_STATE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMMON_STATE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_COMMON_STATE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_COMMON_STATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMMON_STATE_CNF_DATA_Ttag +{ + TLR_UINT8 abData[64]; /* common status block data */ +} __TLR_PACKED_POST RCX_DPM_GET_COMMON_STATE_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_COMMON_STATE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_COMMON_STATE_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_COMMON_STATE_CNF_T; + + + +/****************************************************************************** + * Packet: RCX_GET_EXTENDED_STATE_REQ/RCX_GET_EXTENDED_STATE_CNF + * + * This packet retrieves the Extended State Block of a given Channel in the DPM + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_EXTENDED_STATE_REQ_DATA_Ttag +{ + TLR_UINT32 ulOffset; /* offset to start the reading from the extended status block */ + TLR_UINT32 ulDataLen; /* size of block to be read from extended status block */ + TLR_UINT32 ulChannelIndex; /* channel number from which to read the extended status block */ +} __TLR_PACKED_POST RCX_DPM_GET_EXTENDED_STATE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_EXTENDED_STATE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_EXTENDED_STATE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_EXTENDED_STATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_EXTENDED_STATE_CNF_DATA_Ttag +{ + TLR_UINT32 ulOffset; /* offset to start the reading from the extended status block */ + TLR_UINT32 ulDataLen; /* size of block to be read from extended status block */ + TLR_UINT8 abData[432]; /* data block */ +} __TLR_PACKED_POST RCX_DPM_GET_EXTENDED_STATE_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_DPM_GET_EXTENDED_STATE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_DPM_GET_EXTENDED_STATE_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_DPM_GET_EXTENDED_STATE_CNF_T; + + +/****************************************************************************** + * Packet: RCX_SECURITY_EEPROM_READ_REQ/RCX_SECURITY_EEPROM_READ_CNF + * + * This packet allows reading the security eeprom + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_READ_REQ_DATA_Ttag +{ + TLR_UINT32 ulZoneId; /* zone id */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_READ_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_READ_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_SECURITY_EEPROM_READ_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_READ_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_READ_CNF_DATA_Ttag +{ + TLR_UINT8 abZoneData[32]; /* zone data */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_READ_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_READ_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_SECURITY_EEPROM_READ_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_READ_CNF_T; + +#define RCX_SECURITY_EEPROM_ZONE_0 0 +#define RCX_SECURITY_EEPROM_ZONE_1 1 +#define RCX_SECURITY_EEPROM_ZONE_2 2 +#define RCX_SECURITY_EEPROM_ZONE_3 3 + + +/****************************************************************************** + * Packet: RCX_SECURITY_EEPROM_WRITE_REQ/RCX_SECURITY_EEPROM_WRITE_CNF + * + * This packet allows writing of the user zones in the security eeprom + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_WRITE_REQ_DATA_Ttag +{ + TLR_UINT32 ulZoneId; /* zone id , see RCX_SECURITY_EEPROM_ZONE_* defines */ + TLR_UINT8 abZoneData[32]; /* zone data */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_WRITE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_WRITE_REQ_Ttag +{ + /* Packet header */ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_SECURITY_EEPROM_WRITE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_WRITE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SECURITY_EEPROM_WRITE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_SECURITY_EEPROM_WRITE_CNF_T; + + +/****************************************************************************** + * Packet: RCX_GET_LIB_VERSION_INFO_REQ/RCX_GET_LIB_VERSION_INFO_CNF + * + * This packet allows retrieving the version information of libraries integrated + * into the firmware + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_GET_LIB_VERSION_INFO_REQ_DATA_Ttag +{ + TLR_UINT32 ulVersionIndex; /* version table index */ +} __TLR_PACKED_POST RCX_GET_LIB_VERSION_INFO_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_LIB_VERSION_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_GET_LIB_VERSION_INFO_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_GET_LIB_VERSION_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_LIB_VERSION_Ttag +{ + unsigned short usMajor; + unsigned short usMinor; + unsigned short usBuild; + unsigned short usRevision; +} __TLR_PACKED_POST RCX_LIB_VERSION_T; + +typedef __TLR_PACKED_PRE struct RCX_LIB_NAME_Ttag +{ + unsigned char bNameLength; + unsigned char abName[63]; +} __TLR_PACKED_POST RCX_LIB_NAME_T; + +typedef __TLR_PACKED_PRE struct RCX_LIB_DATE_Ttag +{ + unsigned short usYear; + unsigned char bMonth; + unsigned char bDay; +} __TLR_PACKED_POST RCX_LIB_DATE_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_LIB_VERSION_INFO_CNF_DATA_Ttag +{ + RCX_LIB_VERSION_T tLibVersion; /* !< library version */ + RCX_LIB_NAME_T tLibName; /* !< library name */ + RCX_LIB_DATE_T tLibDate; /* !< library date */ + TLR_UINT32 ulType; /* type of library */ +} __TLR_PACKED_POST RCX_GET_LIB_VERSION_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_LIB_VERSION_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_GET_LIB_VERSION_INFO_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_GET_LIB_VERSION_INFO_CNF_T; + + + +/****************************************************************************** + * Packet: RCX_GET_WATCHDOG_TIME_REQ/RCX_GET_WATCHDOG_TIME_CNF + * + * This packet allows retrieving the actual watchdog time + */ + +/***** request packet *****/ + +typedef TLR_EMPTY_PACKET_T RCX_GET_WATCHDOG_TIME_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_GET_WATCHDOG_TIME_CNF_DATA_Ttag +{ + /** watchdog time in us */ + TLR_UINT32 ulWdgTime; +} __TLR_PACKED_POST RCX_GET_WATCHDOG_TIME_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_WATCHDOG_TIME_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_WATCHDOG_TIME_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_WATCHDOG_TIME_CNF_T; + +/****************************************************************************** + * Packet: RCX_SET_WATCHDOG_TIME_REQ/RCX_SET_WATCHDOG_TIME_CNF + * + * This packet allows setting the actual watchdog time + */ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_SET_WATCHDOG_TIME_REQ_DATA_Ttag +{ + /** watchdog time in us */ + TLR_UINT32 ulWdgTime; +} __TLR_PACKED_POST RCX_SET_WATCHDOG_TIME_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SET_WATCHDOG_TIME_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_SET_WATCHDOG_TIME_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_SET_WATCHDOG_TIME_REQ_T; + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_SET_WATCHDOG_TIME_CNF_T; + +/****************************************************************************** + * Packet: RCX_PACKET_GET_SLAVE_HANDLE_REQ/RCX_PACKET_GET_SLAVE_HANDLE_CNF + * + * This packet allows retrieving diagnostic information of the + * connected devices + */ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_HANDLE_REQ_DATA_Tag +{ + TLR_UINT32 ulParam; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_HANDLE_REQ_DATA_T; + +#define RCX_LIST_CONF_SLAVES 0x00000001 +#define RCX_LIST_ACTV_SLAVES 0x00000002 +#define RCX_LIST_FAULTED_SLAVES 0x00000003 + +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_HANDLE_REQ_Tag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PACKET_GET_SLAVE_HANDLE_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_HANDLE_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_HANDLE_CNF_DATA_Tag +{ + TLR_UINT32 ulParam; + TLR_UINT32 aulHandle[1]; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_HANDLE_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_HANDLE_CNF_Tag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PACKET_GET_SLAVE_HANDLE_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_HANDLE_CNF_T; + +/****************************************************************************** + * Packet: RCX_PACKET_GET_SLAVE_CONN_INFO_REQ/RCX_PACKET_GET_SLAVE_CONN_INFO_CNF + * + * This packet allows retrieving detail information of a slave + */ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_Tag +{ + TLR_UINT32 ulHandle; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_CONN_INFO_REQ_Tag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_CONN_INFO_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_Tag +{ + TLR_UINT32 ulHandle; + TLR_UINT32 ulStructID; + /* + Feldbus specific structure + */ +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_PACKET_GET_SLAVE_CONN_INFO_CNF_Tag +{ + TLR_PACKET_HEADER_T tHead; + RCX_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_PACKET_GET_SLAVE_CONN_INFO_CNF_T; + + +/****************************************************************************** + * Packet: RCX_GET_DPM_IO_INFO__REQ/RCX_GET_DPM_IO_INFO__CNF + * + * This packet allows retrieving the used I/O length + */ + +/***** request packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_GET_DPM_IO_INFO_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_DPM_IO_BLOCK_INFO_Ttag +{ + TLR_UINT32 ulSubblockIndex; /* number of sub block */ + TLR_UINT32 ulType; /* type of sub block */ + TLR_UINT16 usFlags; /* flags of the sub block */ + TLR_UINT16 usReserved; /* reserved */ + TLR_UINT32 ulOffset; /* start offset of the IO data */ + TLR_UINT32 ulLength; /* length of used IO data */ +} __TLR_PACKED_POST RCX_DPM_IO_BLOCK_INFO_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_DPM_IO_INFO_CNF_DATA_Ttag +{ + TLR_UINT32 ulNumIOBlockInfo; /* Number of IO Block Info */ + RCX_DPM_IO_BLOCK_INFO_T atIOBlockInfo[2]; /* Array of I/O Block information */ +} __TLR_PACKED_POST RCX_GET_DPM_IO_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_DPM_IO_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packer header */ + RCX_GET_DPM_IO_INFO_CNF_DATA_T tData; /* packet header */ +} __TLR_PACKED_POST RCX_GET_DPM_IO_INFO_CNF_T; + + + +/****************************************************************************** + * Packet: RCX_REGISTER_APP_REQ/RCX_REGISTER_APP_CNF + * + * This packet allows to register a application + */ + +/***** request packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_REGISTER_APP_REQ_T; + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_REGISTER_APP_CNF_T; + + +/****************************************************************************** + * Packet: RCX_UNREGISTER_APP_REQ/RCX_UNREGISTER_APP_CNF + * + * This packet allows to unregister a application + */ + +/***** request packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_UNREGISTER_APP_REQ_T; + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_UNREGISTER_APP_CNF_T; + + +/****************************************************************************** + * Packet: RCX_DELETE_CONFIG_REQ/RCX_DELETE_CONFIG_CNF + * + * This packet allows to delete the actual configuration + */ + +/***** request packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_DELETE_CONFIG_REQ_T; + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_DELETE_CONFIG_CNF_T; + + + + +/****************************************************************************** + * Packet: RCX_START_STOP_COMM_REQ/RCX_START_STOP_COMM_CNF + * + * This packet allows start and stop bus communication + */ + +#define RCX_COMM_START_CMD 0x00000001 +#define RCX_COMM_STOP_CMD 0x00000002 +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_START_STOP_COMM_REQ_DATA_Ttag +{ + TLR_UINT32 ulParam; /* Start = 1 / Stop = 2 Communication */ +} __TLR_PACKED_POST RCX_START_STOP_COMM_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_START_STOP_COMM_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packer header */ + RCX_START_STOP_COMM_REQ_DATA_T tData; /* packet header */ +} __TLR_PACKED_POST RCX_START_STOP_COMM_REQ_T; + + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_START_STOP_COMM_CNF_T; + +/****************************************************************************** + * Packet: RCX_LOCK_UNLOCK_CONFIG_REQ/RCX_LOCK_UNLOCK_CONFIG_CNF + * + * This packet allows lock and unlock the configuration settings + */ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_LOCK_UNLOCK_CONFIG_REQ_DATA_Ttag +{ + TLR_UINT32 ulParam; /* Boolean to set Lock(1) or Unlock(2) config */ +} __TLR_PACKED_POST RCX_LOCK_UNLOCK_CONFIG_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_LOCK_UNLOCK_CONFIG_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packer header */ + RCX_LOCK_UNLOCK_CONFIG_REQ_DATA_T tData; /* packet header */ +} __TLR_PACKED_POST RCX_LOCK_UNLOCK_CONFIG_REQ_T; + + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_LOCK_UNLOCK_CONFIG_CNF_T; + +/****************************************************************************** + * Packet: RCX_CHANNEL_INIT_REQ/RCX_CHANNEL_INIT_CNF + * + * This packet allows retrieving the used I/O length + */ + +/***** request packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_CHANNEL_INIT_REQ_T; + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_CHANNEL_INIT_CNF_T; + + +/****************************************************************************** + * Packet: RCX_VERIFY_DATABASE_REQ /RCX_VERIFY_DATABASE_CNF + * + * This packet adds new slaves to the database + */ + /***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_VERIFY_DATABASE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_VERIFY_DATABASE_REQ_T; + +#define RCX_VERIFY_DATABASE_REQ_SIZE 0 + + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_VERIFY_SLAVE_DATABASE_LIST_Ttag +{ + TLR_UINT32 ulLen; + TLR_UINT8 abData[16]; +} __TLR_PACKED_POST RCX_VERIFY_SLAVE_DATABASE_LIST_T; + +typedef __TLR_PACKED_PRE struct RCX_VERIFY_MASTER_DATABASE_Ttag +{ + TLR_UINT32 ulMasterSettings; /* field bus independent changes */ + TLR_UINT32 ulMasterStatus; /* field bus specific status */ + TLR_UINT32 ulReserved[2]; +} __TLR_PACKED_POST RCX_VERIFY_MASTER_DATABASE_T; + + +#define RCX_VERIFY_SLAVE_DATABASE_LIST_SIZE sizeof(RCX_VERIFY_SLAVE_DATABASE_LIST_T) +#define RCX_CIR_MST_SET_STARTUP 0x00000001 +#define RCX_CIR_MST_SET_WATCHDOG 0x00000002 +#define RCX_CIR_MST_SET_STATUSOFFSET 0x00000004 +#define RCX_CIR_MST_SET_BUSPARAMETER 0x00000008 + +typedef __TLR_PACKED_PRE struct RCX_VERIFY_DATABASE_CNF_DATA_Ttag +{ + RCX_VERIFY_SLAVE_DATABASE_LIST_T tNewSlaves; + RCX_VERIFY_SLAVE_DATABASE_LIST_T tDeactivatedSlaves; + RCX_VERIFY_SLAVE_DATABASE_LIST_T tChangedSlaves; + RCX_VERIFY_SLAVE_DATABASE_LIST_T tUnchangedSlaves; + RCX_VERIFY_SLAVE_DATABASE_LIST_T tImpossibleSlaveChanges; + RCX_VERIFY_MASTER_DATABASE_T tMasterChanges; +} __TLR_PACKED_POST RCX_VERIFY_DATABASE_CNF_DATA_T; + +#define RCX_VERIFY_DATABASE_CNF_DATA_SIZE sizeof(RCX_VERIFY_DATABASE_CNF_DATA_T) + +typedef __TLR_PACKED_PRE struct RCX_VERIFY_DATABASE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_VERIFY_DATABASE_CNF_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_VERIFY_DATABASE_CNF_T; + +#define RCX_VERFIY_DATABASE_CNF_PACKET_SIZE sizeof(RCX_VERIFY_DATABASE_CNF_T) + + + +/****************************************************************************** + * Packet: RCX_CHANNEL_ACTIVATE_REQ/RCX_CHANNEL_NEW_DATABASE_CNF + * + * This packet activates the new configured slaves + */ + /***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_ACTIVATE_DATABASE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_ACTIVATE_DATABASE_REQ_T; + + + + /***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_ACTIVATE_DATABASE_CNF_DATA_Ttag +{ + TLR_UINT8 abSlvSt[16]; /* State of the slaves after configuration */ +} __TLR_PACKED_POST RCX_ACTIVATE_DATABASE_CNF_DATA_T; + +#define RCX_ACTIVATE_DATABASE_CNF_DATA_SIZE sizeof(RCX_ACTIVATE_DATABASE_CNF_DATA_T) + + +typedef __TLR_PACKED_PRE struct RCX_ACTIVATE_DATABASE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_ACTIVATE_DATABASE_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_ACTIVATE_DATABASE_CNF_T; + +#define RCX_ACTIVATE_DATABASE_CNF_PACKET_SIZE sizeof(RCX_ACTIVATE_DATABASE_CNF_T) + + + +/****************************************************************************** + * Packet: RCX_HW_LICENSE_INFO_REQ/RCX_HW_LICENSE_INFO_CNF + * + * This packet allows retrieving the license information from the security memory + */ + +/* request packet */ +typedef __TLR_PACKED_PRE struct RCX_HW_LICENSE_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_HW_LICENSE_INFO_REQ_T; + +/* confirmation packet */ +typedef __TLR_PACKED_PRE struct RCX_HW_LICENSE_INFO_CNF_DATA_Ttag +{ + TLR_UINT32 ulLicenseFlags1; + TLR_UINT32 ulLicenseFlags2; + TLR_UINT16 usNetxLicenseID; + TLR_UINT16 usNetxLicenseFlags; +} __TLR_PACKED_POST RCX_HW_LICENSE_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_HW_LICENSE_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_HW_LICENSE_INFO_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_HW_LICENSE_INFO_CNF_T; + +/****************************************************************************** + * Packet: RCX_HW_HARDWARE_INFO_REQ/RCX_HW_HARDWARE_INFO_CNF + * + * This packet allows retrieving hardware information + */ + +/* request packet */ +typedef __TLR_PACKED_PRE struct RCX_HW_HARDWARE_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_HW_HARDWARE_INFO_REQ_T; + +/* confirmation packet */ +typedef __TLR_PACKED_PRE struct RCX_HW_HARDWARE_INFO_CNF_DATA_Ttag +{ + /* device number */ + TLR_UINT32 ulDeviceNumber; + /* serial number */ + TLR_UINT32 ulSerialNumber; + /* hardware options */ + TLR_UINT16 ausHwOptions[4]; + /* manufacturer code */ + TLR_UINT16 usManufacturer; + /* production date */ + TLR_UINT16 usProductionDate; + /* license info */ + TLR_UINT32 ulLicenseFlags1; + TLR_UINT32 ulLicenseFlags2; + TLR_UINT16 usNetxLicenseID; + TLR_UINT16 usNetxLicenseFlags; + /* device class */ + TLR_UINT16 usDeviceClass; + /* hardware revision */ + TLR_UINT8 bHwRevision; + /* hardware compatibility */ + TLR_UINT8 bHwCompatibility; + /* hardware features 1 */ + TLR_UINT32 ulHardwareFeatures1; + /* hardware features 2 */ + TLR_UINT32 ulHardwareFeatures2; + /* boot option */ + TLR_UINT8 bBootOption; + /* reserved */ + TLR_UINT8 bReserved[11]; +} __TLR_PACKED_POST RCX_HW_HARDWARE_INFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_HW_HARDWARE_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_HW_HARDWARE_INFO_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_HW_HARDWARE_INFO_CNF_T; + +/***************************************************************************** + * RCX_BACKUP_REQ/RCX_BACKUP_CNF +*****************************************************************************/ + +/***************************************************************************** + * This packet initiates a backup of the SYSVOLUME onto the given device +*****************************************************************************/ +typedef __TLR_PACKED_PRE struct RCX_BACKUP_REQ_DATA_Ttag +{ + TLR_CHAR szBackupPoint[1]; /*!< NULL terminated string containing the path + to backup to. This is just a placeholder, and the strucure needs to + be extended by the number of characters of the backup point, + e.g. "SDMMC:/backup" */ +} __TLR_PACKED_POST RCX_BACKUP_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_BACKUP_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_BACKUP_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_BACKUP_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_BACKUP_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_BACKUP_CNF_T; + +/***************************************************************************** + * RCX_RESTORE_REQ/RCX_RESTORE_CNF +*****************************************************************************/ + +/***************************************************************************** + * This packet initiates a restore of the SYSVOLUME from the given device / path +*****************************************************************************/ +typedef __TLR_PACKED_PRE struct RCX_RESTORE_REQ_DATA_Ttag +{ + TLR_CHAR szRestorePoint[1]; /*!< NULL terminated string containing the path + to restore from. This is just a placeholder, and the strucure needs to + be extended by the number of characters of the restore point + e.g. "SDMMC:/backup" */ +} __TLR_PACKED_POST RCX_RESTORE_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_RESTORE_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ + RCX_RESTORE_REQ_DATA_T tData; /* packet data */ +} __TLR_PACKED_POST RCX_RESTORE_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_RESTORE_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; /* packet header */ +} __TLR_PACKED_POST RCX_RESTORE_CNF_T; + + +/****************************************************************************** + * RCX_SYSTEM_INFORMATION_BLOCK_REQ/RCX_SYSTEM_INFORMATION_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_INFO_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_READ_SYS_INFO_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_INFO_BLOCK_CNF_DATA_Ttag +{ + NETX_SYSTEM_INFO_BLOCK tSystemInfo; +} __TLR_PACKED_POST RCX_READ_SYS_INFO_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_INFO_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_SYS_INFO_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_SYS_INFO_BLOCK_CNF_T; + + +/****************************************************************************** + * RCX_CHANNEL_INFORMATION_BLOCK_REQ/RCX_CHANNEL_INFORMATION_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_CHNL_INFO_BLOCK_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelId; +} __TLR_PACKED_POST RCX_READ_CHNL_INFO_BLOCK_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_CHNL_INFO_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_CHNL_INFO_BLOCK_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_CHNL_INFO_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_CHNL_INFO_BLOCK_CNF_DATA_Ttag +{ + NETX_CHANNEL_INFO_BLOCK tChannelInfo; +} RCX_READ_CHNL_INFO_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_CHNL_INFO_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_CHNL_INFO_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_CHNL_INFO_BLOCK_CNF_T; + + +/****************************************************************************** + * RCX_SYSTEM_CONTROL_BLOCK_REQ/RCX_SYSTEM_CONTROL_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_CNTRL_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_READ_SYS_CNTRL_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_CNTRL_BLOCK_CNF_DATA_Ttag +{ + NETX_SYSTEM_CONTROL_BLOCK tSystemControl; +} __TLR_PACKED_POST RCX_READ_SYS_CNTRL_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_CNTRL_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_SYS_CNTRL_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_SYS_CNTRL_BLOCK_CNF_T; + +/****************************************************************************** + * RCX_SYSTEM_STATUS_BLOCK_REQ/RCX_SYSTEM_STATUS_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_STATUS_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_READ_SYS_STATUS_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_STATUS_BLOCK_CNF_DATA_Ttag +{ + NETX_SYSTEM_STATUS_BLOCK tSystemState; +} __TLR_PACKED_POST RCX_READ_SYS_STATUS_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_SYS_STATUS_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_SYS_STATUS_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_SYS_STATUS_BLOCK_CNF_T; + + +/****************************************************************************** + * RCX_CONTROL_BLOCK_REQ/RCX_CONTROL_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_COMM_CNTRL_BLOCK_REQ_DATA_Ttag +{ + TLR_UINT32 ulChannelId; +} __TLR_PACKED_POST RCX_READ_COMM_CNTRL_BLOCK_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_COMM_CNTRL_BLOCK_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_COMM_CNTRL_BLOCK_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_COMM_CNTRL_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_READ_COMM_CNTRL_BLOCK_CNF_DATA_Ttag +{ + NETX_CONTROL_BLOCK tControl; +} __TLR_PACKED_POST RCX_READ_COMM_CNTRL_BLOCK_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_READ_COMM_CNTRL_BLOCK_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_READ_COMM_CNTRL_BLOCK_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_READ_COMM_CNTRL_BLOCK_CNF_T; + + +/****************************************************************************** + * RCX_BUSSCAN_REQ + ******************************************************************************/ +#define RCX_BUSSCAN_CMD_START 0x01 +#define RCX_BUSSCAN_CMD_STATUS 0x02 +#define RCX_BUSSCAN_CMD_ABORT 0x03 + +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_BUSSCAN_REQ_DATA_Ttag +{ + TLR_UINT32 ulAction; +} __TLR_PACKED_POST RCX_BUSSCAN_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_BUSSCAN_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_BUSSCAN_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_BUSSCAN_REQ_T; + +#define RCX_BUSSCAN_REQ_SIZE (sizeof(RCX_BUSSCAN_REQ_DATA_T)) + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_BUSSCAN_CNF_DATA_Ttag +{ + TLR_UINT32 ulMaxProgress; + TLR_UINT32 ulActProgress; + TLR_UINT8 abDeviceList[4]; +} __TLR_PACKED_POST RCX_BUSSCAN_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_BUSSCAN_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_BUSSCAN_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_BUSSCAN_CNF_T; + +#define RCX_BUSSCAN_CNF_SIZE (sizeof(RCX_BUSSCAN_CNF_DATA_T) - 4) + + +/****************************************************************************** + * RCX_GET_DEVICE_INFO_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_GET_DEVICE_INFO_REQ_DATA_Ttag +{ + TLR_UINT32 ulDeviceIdx; +} __TLR_PACKED_POST RCX_GET_DEVICE_INFO_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_DEVICE_INFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_DEVICE_INFO_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_DEVICE_INFO_REQ_T; + +#define RCX_GET_DEVICE_INFO_REQ_SIZE (sizeof(RCX_GET_DEVICE_INFO_REQ_DATA_T)) + +/***** confirmation packet *****/ +typedef __TLR_PACKED_PRE struct RCX_GET_DEVICE_INFO_CNF_DATA_Ttag +{ + TLR_UINT32 ulDeviceIdx; + TLR_UINT32 ulStructId; + /* TLR_UINT8 tStruct; Fieldbus specific structure */ +} __TLR_PACKED_POST RCX_GET_DEVICE_INFO_CNF_DATA_T; + +typedef struct RCX_GET_DEVICE_INFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_DEVICE_INFO_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_DEVICE_INFO_CNF_T; + +#define RCX_GET_DEVICE_INFO_CNF_SIZE (sizeof(RCX_GET_DEVICE_INFO_CNF_DATA_T)) + + +/****************************************************************************** + * RCX_SET_HANDSHAKE_CONFIG_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_SET_HANDSHAKE_CONFIG_REQ_DATA_Ttag +{ + /* Input process data handshake mode */ + TLR_UINT8 bPDInHskMode; + /* Input process data trigger source. Currently unused, set to zero. */ + TLR_UINT8 bPDInSource; + /* Threshold for input process data handshake handling errors */ + TLR_UINT16 usPDInErrorTh; + + /* Output process data handshake mode */ + TLR_UINT8 bPDOutHskMode; + /* Output process data trigger source. Currently unused, set to zero. */ + TLR_UINT8 bPDOutSource; + /* Threshold for output process data handshake handling errors */ + TLR_UINT16 usPDOutErrorTh; + + /* Synchronization handshake mode */ + TLR_UINT8 bSyncHskMode; + /* Synchronization source */ + TLR_UINT8 bSyncSource; + /* Threshold for synchronization handshake handling errors */ + TLR_UINT16 usSyncErrorTh; + + /* Reserved for future use. Set to zero. */ + TLR_UINT32 aulReserved[2]; +} __TLR_PACKED_POST RCX_SET_HANDSHAKE_CONFIG_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SET_HANDSHAKE_CONFIG_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_SET_HANDSHAKE_CONFIG_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_SET_HANDSHAKE_CONFIG_REQ_T; + +#define RCX_SET_HANDSHAKE_CONFIG_REQ_SIZE (sizeof(RCX_SET_HANDSHAKE_CONFIG_REQ_DATA_T)) + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_SET_HANDSHAKE_CONFIG_CNF_T; + +#define RCX_SET_HANDSHAKE_CONFIG_CNF_SIZE (0) + + +/****************************************************************************** + * RCX_MALLINFO_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __TLR_PACKED_PRE struct RCX_MALLINFO_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; +} __TLR_PACKED_POST RCX_MALLINFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_MALLINFO_CNF_DATA_Ttag +{ + /* values reported by mallinfo() call, see malloc documentation for further description */ + TLR_INT32 arena; /* total space allocated from system */ + TLR_INT32 ordblks; /* number of non-inuse chunks */ + TLR_INT32 hblks; /* number of mmapped regions */ + TLR_INT32 hblkhd; /* total space in mmapped regions */ + TLR_INT32 uordblks; /* total allocated space */ + TLR_INT32 fordblks; /* total non-inuse space */ + TLR_INT32 keepcost; /* top-most, releasable (via malloc_trim) space */ + TLR_UINT32 ulTotalHeap; /* Total Heap area size in bytes */ +} __TLR_PACKED_POST RCX_MALLINFO_CNF_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_MALLINFO_CNF_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_MALLINFO_CNF_DATA_T tData; +} __TLR_PACKED_POST RCX_MALLINFO_CNF_T; + + +/****************************************************************************** + * RCX_SET_FW_PARAMETER_REQ + ******************************************************************************/ + +/***** PID defines *****/ + +#define PID_STATION_ADDRESS 0x30000001 /* Station address of device*/ +#define PID_BAUDRATE 0x30000002 /* Baudrate of device */ +#define PID_PN_NAME_OF_STATION 0x30015001 /* PROFINET Name of Station String */ + + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_SET_FW_PARAMETER_REQ_DATA_Ttag +{ + TLR_UINT32 ulParameterID; + TLR_UINT32 ulParameterLen; + TLR_UINT8 abParameter[4]; /* padded to DWORD boundary*/ +} __TLR_PACKED_POST RCX_SET_FW_PARAMETER_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_SET_FW_PARAMETER_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_SET_FW_PARAMETER_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_SET_FW_PARAMETER_REQ_T; + +#define RCX_SET_FW_PARAMETER_REQ_SIZE (sizeof(RCX_SET_FW_PARAMETER_REQ_DATA_T) - 4) + + +/***** confirmation packet *****/ +typedef TLR_EMPTY_PACKET_T RCX_SET_FW_PARAMETER_CNF_T; + +#define RCX_SET_FW_PARAMETER_CNF_SIZE (0) + + +/****************************************************************************** + * RCX_GET_FW_PARAMETER_REQ + ******************************************************************************/ + +/***** request packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_GET_FW_PARAMETER_REQ_DATA_Ttag +{ + TLR_UINT32 ulParameterID; +} __TLR_PACKED_POST RCX_GET_FW_PARAMETER_REQ_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_GET_FW_PARAMETER_REQ_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_GET_FW_PARAMETER_REQ_DATA_T tData; +} __TLR_PACKED_POST RCX_GET_FW_PARAMETER_REQ_T; + +#define RCX_GET_FW_PARAMETER_REQ_SIZE (sizeof(RCX_GET_FW_PARAMETER_REQ_DATA_T)) + + +/***** confirmation packet *****/ + +typedef RCX_SET_FW_PARAMETER_REQ_T RCX_GET_FW_PARAMETER_CNF_T; + +#define RCX_GET_FW_PARAMETER_CNF_SIZE RCX_SET_FW_PARAMETER_REQ_SIZE + +/****************************************************************************** + * RCX_LINK_STATUS_CHANGE_IND + ******************************************************************************/ + +/***** indication packet *****/ + +typedef __TLR_PACKED_PRE struct RCX_LINK_STATUS_Ttag +{ + + TLR_UINT32 ulPort; /*!< Port the link status is for */ + + TLR_BOOLEAN32 fIsFullDuplex; /*!< If a full duplex link is available on this port */ + + TLR_BOOLEAN32 fIsLinkUp; /*!< If a link is available on this port */ + + TLR_UINT32 ulSpeed; /*!< Speed of the link \n\n + \valueRange + 0: No link \n + 10: 10MBit \n + 100: 100MBit \n */ + +} __TLR_PACKED_POST RCX_LINK_STATUS_T; + + +typedef __TLR_PACKED_PRE struct RCX_LINK_STATUS_CHANGE_IND_DATA_Ttag +{ + RCX_LINK_STATUS_T atLinkData[2]; +} __TLR_PACKED_POST RCX_LINK_STATUS_CHANGE_IND_DATA_T; + +typedef __TLR_PACKED_PRE struct RCX_LINK_STATUS_CHANGE_IND_Ttag +{ + TLR_PACKET_HEADER_T tHead; + RCX_LINK_STATUS_CHANGE_IND_DATA_T tData; +} __TLR_PACKED_POST RCX_LINK_STATUS_CHANGE_IND_T; + +#define RCX_LINK_STATUS_CHANGE_IND_SIZE (sizeof(RCX_LINK_STATUS_CHANGE_IND_DATA_T)) + +/***** response packet *****/ + +typedef TLR_EMPTY_PACKET_T RCX_LINK_STATUS_CHANGE_RES_T; + +#define RCX_LINK_STATUS_CHANGE_RES_SIZE (0) + + +/* pragma unpack */ +#ifdef PRAGMA_PACK_ENABLE +#pragma PRAGMA_UNPACK_1(RCX_PUBLIC) +#endif + +/***************************************************************************************/ + +#endif /* #ifndef __RCX_PUBLIC_H */ diff --git a/examples/tcpserver/Marshaller/APIHeader/rcX_User.h b/examples/tcpserver/Marshaller/APIHeader/rcX_User.h new file mode 100644 index 0000000..7e9fe30 --- /dev/null +++ b/examples/tcpserver/Marshaller/APIHeader/rcX_User.h @@ -0,0 +1,1382 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: rcX_User.h 13107 2019-08-15 08:42:43Z Robert $: + + Description: + Definition file for the rcX operating system + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2016-11-01 Added devices classes for NETX_4000_COM, CIFX_4000, NETX_90_COM, NETRAPID_51_IO + 2016-04-25 Added general error definition for DDP (RCX_SYS_SECURE_DDP_NOT_INIT) + 2015-07-07 Added RCX_HW_DEV_CLASS_GW_NETTAP_151 + 2015-05-18 Added RCX_COMM_CLASS_SCADA + Added RCX_PROT_CLASS_ATVISE, RCX_PROT_CLASS_MQTT, RCX_PROT_CLASS_OPCUA + 2014-09-17 Added RCX_HW_DEV_CLASS_NETIC_52 + 2014-07-07 Added support for IAR C/C++ Compiler (ARM Cores only) + 2014-04-28 Added support for armcc compiler + 2013-12-17 Added RCX_HW_DEV_CLASS_NETPLC_J500 + 2013-11-07 Added RCX_HW_DEV_CLASS_NETSMART_T51, RCX_HW_DEV_CLASS_NETSCADA_T52, + RCX_HW_DEV_CLASS_NETSAFETY_51, RCX_HW_DEV_CLASS_NETSAFETY_52 + 2013-10-01 Added RCX_HW_DEV_CLASS_NETRAPID_52 + 2013-05-28 Added RCX_HW_DEV_CLASS_NETSCOPE_C100 + 2013-04-03 Added RCX_HW_DEV_CLASS_NETHOST_T100 + 2013-01-15 Added RCX_HW_DEV_CLASS_COMX_51, RCX_HW_DEV_CLASS_NETJACK_51 + 2012-08-03 Added RCX_HW_DEV_CLASS_CHIP_NETX_52, RCX_HW_DEV_CLASS_NETSCADA_T50, + RCX_HW_DEV_CLASS_NETSMART_50, RCX_HW_DEV_CLASS_IOLINK_GW_51, + RCX_HW_DEV_CLASS_NETHMI_B500 + 2012-07-23 Changed RCX_MAX_PACKET_SIZE to 1596 Bytes (Comm. Channel Mailbox Size) + 2012-05-29 Added DPM structure NETX_8K_DPM_COMM_CHANNEL + for hardware with only 8 KByte DPM (e.g. COMX10) + 2012-02-29 Added RCX_HW_DEV_CLASS_GW_EU5C + 2012-01-31 Added RCX_HW_DEV_CLASS_NETSCADA_T51, + RCX_HW_DEV_CLASS_CHIP_NETX_51, RCX_HW_DEV_CLASS_NETRAPID_51 + 2011-12-12 Updated ulHWFeatures definitions for extended memory (MRAM) + 2011-12-06 Added ulHWFeatures into SYSTEM_STATUS_BLOCK (RTC/MRAM) + 2011-10-31 Added RCX_HW_DEV_CLASS_NETRAPID_10/50 + 2011-07-07 Added PROT_CLASS_3S_PLC_HANDLER + 2010-12-10 Added RCX_HW_DEV_CLASS_NETJACK_10/50/100/500 and RCX_HW_DEV_CLASS_NETLINK_10_USB + 2010-11-29 fixed Mantis 11689 (update rcx_user.h (sync stuff)) + 2010-11-15 Added RCX_HW_DEV_CLASS_COMX_50 + Added RCX_PROT_CLASS_VARAN + 2010-11-10 Added RCX_HW_DEV_CLASS_COMX_10 + Added RCX_HW_DEV_CLASS_NETIC_10 + Rename RCX_HW_DEV_CLASS_COMX to RCX_HW_DEV_CLASS_COMX_100 + Rename RCX_HW_DEV_CLASS_NETIC to RCX_HW_DEV_CLASS_NETIC_50 + 2010-09-02 Added RCX_HW_DEV_CLASS_CHIP_NETX_10 + 2010-08-03 Added RCX_E_INVALID_ALIGNMENT + 2010-07-22 Added RCX_PROT_CLASS_DF1 + 2010-05-04 Added HW option validation start/end defines + 2010-05-04 Added "System Status" defines + 2010-03-23 File created. + +**************************************************************************************/ + + +/* Prevent multiple inclusion */ +#ifndef __RCX_USER_H +#define __RCX_USER_H + +#include + +/*---------------------------------------------------------------------------*/ +/* Compiler settings */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST + #pragma once + #pragma pack(1) /* Always align structures to byte boundery */ + #ifndef STRICT /* Check Typdefinition */ + #define STRICT + #endif + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __RCX_PACKED_PRE + #define __RCX_PACKED_POST __attribute__((__packed__)) +#endif + +/* support for REALVIEW ARM and IAR compiler (ARM cores only) */ +#if defined (__ADS__) || defined (__REALVIEW__) || defined (__CC_ARM) || defined (__ICCARM__) + #define __RCX_PACKED_PRE __packed + #define __RCX_PACKED_POST +#endif + +/*===========================================================================*/ +/* */ +/* DEFAULT DPM structure */ +/* */ +/*===========================================================================*/ +/* */ +/* ------------------------- DPM Offset 0 */ +/* | System Channel | */ +/* ------------------------- */ +/* | Handshake channel | */ +/* ------------------------- */ +/* | Communication channel 0 | */ +/* ------------------------- */ +/* | Communication channel 1 | */ +/* ------------------------- */ +/* | Communication channel 2 | */ +/* ------------------------- */ +/* | Communication channel 3 | */ +/* ------------------------- */ +/* | Application channel 0 | */ +/* ------------------------- */ +/* | Application channel 1 | */ +/* ------------------------- DPM Offset xxxx */ +/*===========================================================================*/ +/*\/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ */ + +/* Global definitions */ +#define NETX_MAX_SUPPORTED_CHANNELS 8 /*!< Maximum number of possible channels */ + +/* Global system channel definitions */ +#define NETX_SYSTEM_HSK_CELL_OFFSET 0 /*!< Offset of the system handshake cells */ +#define NETX_SYSTEM_BLOCK_VERSION 0 /*!< Version of the system block structure */ +#define NETX_SYSTEM_CHANNEL_SIZE 512 /*!< Size of the system channel in bytes */ +#define NETX_SYSTEM_MAILBOX_MIN_SIZE 124 /*!< Size of a system packet mailbox in bytes */ + +#define NETX_SYSTEM_CHANNEL_INDEX 0 /*!< Index of the system channel, always 0 */ +#define NETX_HANDSHAKE_CHANNEL_INDEX 1 /*!< Index of the handshake channel, always 1 if available */ +#define NETX_COM_CHANNEL_START_INDEX 2 /*!< Start index of communication channel 0 */ + +/* Global handshake channel size */ +#define NETX_HANDSHAKE_CHANNEL_SIZE 256 /*!< Length of the handshake channel in bytes */ +#define NETX_HANDSHAKE_PAIRS 16 /*!< Number of possible handshake pairs */ + +/* Global communication channel definitions */ +#define NETX_STATUS_BLOCK_VERSION 2 /*!< version of the common status block structure */ +#define NETX_EXT_STATE_SIZE 432 /*!< Default size of the extended state block */ + +#define NETX_CHANNEL_MAILBOX_SIZE 1596 /*!< Default size of a channel packet mailbox in bytes */ +#define NETX_HP_IO_DATA_SIZE 64 /*!< Default size of the high prio I/O data */ +#define NETX_IO_DATA_SIZE 5760 /*!< Default I/O data size in bytes */ +#define NETX_IO_DATA_SIZE_8K_DPM 1536 /*!< I/O data size in bytes for hardware with 8KByte DPM */ + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX SYSTEM CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! System channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_CHANNEL_INFOtag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bReserved; /*!< 0x01 reserved */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint16_t usSizeOfMailbox; /*!< 0x08 Size of the send and receive mailbox */ + uint16_t usMailboxStartOffset; /*!< 0x0A Start offset of the mailbox structure (see NETX_MAILBOX) */ + uint8_t abReserved[4]; /*!< 0x0C:0x0F Reserved area */ +} __RCX_PACKED_POST NETX_SYSTEM_CHANNEL_INFO; + +/*****************************************************************************/ +/*! Handshake channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_HANDSHAKE_CHANNEL_INFOtag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bReserved[3]; /*!< 0x01 reserved */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint8_t abReserved[8]; /*!< 0x08:0x0F Reserved area */ +} __RCX_PACKED_POST NETX_HANDSHAKE_CHANNEL_INFO; + +/*****************************************************************************/ +/*! Communication channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_COMMUNICATION_CHANNEL_INFOtag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bChannelId; /*!< 0x01 Channel / Port ID */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint16_t usCommunicationClass; /*!< 0x08 Communication Class (Master, Slave...) */ + uint16_t usProtocolClass; /*!< 0x0A Protocol Class (PROFIBUS, PROFINET....) */ + uint16_t usProtocolConformanceClass; /*!< 0x0C Protocol Conformance Class (DPV1, DPV2...) */ + uint8_t abReserved[2]; /*!< 0x0E:0x0F Reserved area */ +} __RCX_PACKED_POST NETX_COMMUNICATION_CHANNEL_INFO; + +/*****************************************************************************/ +/*! Application channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_APPLICATION_CHANNEL_INFOtag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bChannelId; /*!< 0x01 Channel / Port ID */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint8_t abReserved[8]; /*!< 0x0C:0x0F Reserved area */ +} __RCX_PACKED_POST NETX_APPLICATION_CHANNEL_INFO; + +/*****************************************************************************/ +/*! System information block (Size = 48 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_INFO_BLOCKtag +{ + uint8_t abCookie[4]; /*!< 0x00 "netX" cookie */ + uint32_t ulDpmTotalSize; /*!< 0x04 Total Size of the whole dual-port memory in bytes */ + uint32_t ulDeviceNumber; /*!< 0x08 Device number */ + uint32_t ulSerialNumber; /*!< 0x0C Serial number */ + uint16_t ausHwOptions[4]; /*!< 0x10 Hardware options, xC port 0..3 */ + uint16_t usManufacturer; /*!< 0x18 Manufacturer Location */ + uint16_t usProductionDate; /*!< 0x1A Date of production */ + uint32_t ulLicenseFlags1; /*!< 0x1C License code flags 1 */ + uint32_t ulLicenseFlags2; /*!< 0x20 License code flags 2 */ + uint16_t usNetxLicenseID; /*!< 0x24 netX license identification */ + uint16_t usNetxLicenseFlags; /*!< 0x26 netX license flags */ + uint16_t usDeviceClass; /*!< 0x28 netX device class */ + uint8_t bHwRevision; /*!< 0x2A Hardware revision index */ + uint8_t bHwCompatibility; /*!< 0x2B Hardware compatibility index */ + uint8_t bDevIdNumber; /*!< 0x2C Device identification number (rotary switch) */ + uint8_t bReserved; /*!< 0x2D Reserved byte */ + uint16_t usReserved; /*!< 0x2E:0x2F Reserved */ +} __RCX_PACKED_POST NETX_SYSTEM_INFO_BLOCK; + +/*****************************************************************************/ +/*! Channel information block (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE union NETX_CHANNEL_INFO_BLOCKtag +{ + NETX_SYSTEM_CHANNEL_INFO tSystem; + NETX_HANDSHAKE_CHANNEL_INFO tHandshake; + NETX_COMMUNICATION_CHANNEL_INFO tCom; + NETX_APPLICATION_CHANNEL_INFO tApp; +} __RCX_PACKED_POST NETX_CHANNEL_INFO_BLOCK; + +/*****************************************************************************/ +/*! System information block (Size = 8 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_CONTROL_BLOCKtag +{ + uint32_t ulSystemCommandCOS; /*!< 0x00 System channel change of state command */ + uint32_t ulReserved; /*!< 0x04 Reserved */ +} __RCX_PACKED_POST NETX_SYSTEM_CONTROL_BLOCK; + +/*****************************************************************************/ +/*! System status block (Size = 64 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_STATUS_BLOCKtag +{ + uint32_t ulSystemCOS; /*!< 0x00 System channel change of state acknowledge */ + uint32_t ulSystemStatus; /*!< 0x04 Actual system state */ + uint32_t ulSystemError; /*!< 0x08 Actual system error */ + uint32_t ulBootError; /*!< 0x0C Bootup error (only set by 2nd Stage Bootloader) */ + uint32_t ulTimeSinceStart; /*!< 0x10 time since start in seconds */ + uint16_t usCpuLoad; /*!< 0x14 cpu load in 0,01% units (10000 => 100%) */ + uint16_t usReserved; /*!< 0x16 Reserved */ + uint32_t ulHWFeatures; /*!< 0x18 Hardware features */ + uint8_t abReserved[36]; /*!< 0x1C:3F Reserved */ +} __RCX_PACKED_POST NETX_SYSTEM_STATUS_BLOCK; + +/*****************************************************************************/ +/*! System send packet mailbox (Size 128 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_SEND_MAILBOXtag +{ + uint16_t usPackagesAccepted; /*!< Number of packages that can be accepted */ + uint16_t usReserved; /*!< Reserved */ + uint8_t abSendMbx[NETX_SYSTEM_MAILBOX_MIN_SIZE]; /*!< Send mailbox packet buffer */ +} __RCX_PACKED_POST NETX_SYSTEM_SEND_MAILBOX; + +/*****************************************************************************/ +/*! System receive packet mailbox (Size 128 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_RECV_MAILBOXtag +{ + uint16_t usWaitingPackages; /*!< Number of packages waiting to be processed */ + uint16_t usReserved; /*!< Reserved */ + uint8_t abRecvMbx[NETX_SYSTEM_MAILBOX_MIN_SIZE]; /*!< Receive mailbox packet buffer */ +} __RCX_PACKED_POST NETX_SYSTEM_RECV_MAILBOX; + +/*****************************************************************************/ +/*! Handshake cell definition */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE union NETX_HANDSHAKE_CELLtag +{ + __RCX_PACKED_PRE struct + { + volatile uint8_t abData[2]; /*!< Data value, not belonging to handshake */ + volatile uint8_t bNetxFlags; /*!< Device status flags (8Bit Mode) */ + volatile uint8_t bHostFlags; /*!< Device command flags (8Bit Mode) */ + } __RCX_PACKED_POST t8Bit; + + __RCX_PACKED_PRE struct + { + volatile uint16_t usNetxFlags; /*!< Device status flags (16Bit Mode) */ + volatile uint16_t usHostFlags; /*!< Device command flags (16Bit Mode)*/ + } __RCX_PACKED_POST t16Bit; + volatile uint32_t ulValue; /*!< Handshake cell value */ +} __RCX_PACKED_POST NETX_HANDSHAKE_CELL; + +/*****************************************************************************/ +/*! Structure of the whole system channel (DPM) (Size 512 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SYSTEM_CHANNELtag +{ + NETX_SYSTEM_INFO_BLOCK tSystemInfo; /*!< 0x000:0x02F System information block */ + NETX_CHANNEL_INFO_BLOCK atChannelInfo[NETX_MAX_SUPPORTED_CHANNELS]; /*!< 0x030:0x0AF Channel information block */ + NETX_HANDSHAKE_CELL tSysHandshake; /*!< 0x0B0:0x0B3 Handshake cells used, if not in Handshake block */ + uint8_t abReserved[4]; /*!< 0x0B4:0x0B7 unused/reserved */ + NETX_SYSTEM_CONTROL_BLOCK tSystemControl; /*!< 0x0B8:0x0BF System control block */ + NETX_SYSTEM_STATUS_BLOCK tSystemState; /*!< 0x0C0:0x0FF System state block */ + NETX_SYSTEM_SEND_MAILBOX tSystemSendMailbox; /*!< 0x100:0x17F Send mailbox */ + NETX_SYSTEM_RECV_MAILBOX tSystemRecvMailbox; /*!< 0x180:0x1FF Receive mailbox */ +} __RCX_PACKED_POST NETX_SYSTEM_CHANNEL; + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX HANDSHAKE CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! Handshake array definition */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_HANDSHAKE_ARRAYtag +{ + NETX_HANDSHAKE_CELL atHsk[NETX_HANDSHAKE_PAIRS]; /*!< Handshake cell block definition */ +} __RCX_PACKED_POST NETX_HANDSHAKE_ARRAY; + +/*****************************************************************************/ +/*! Handshake channel definition */ +/*****************************************************************************/ +typedef struct NETX_HANDSHAKE_CHANNELtag +{ + NETX_HANDSHAKE_CELL tSysFlags; /*!< 0x00 System handshake flags */ + NETX_HANDSHAKE_CELL tHskFlags; /*!< 0x04 not used */ + NETX_HANDSHAKE_CELL tCommFlags0; /*!< 0x08 channel 0 handshake flags */ + NETX_HANDSHAKE_CELL tCommFlags1; /*!< 0x0C channel 1 handshake flags */ + NETX_HANDSHAKE_CELL tCommFlags2; /*!< 0x10 channel 2 handshake flags */ + NETX_HANDSHAKE_CELL tCommFlags3; /*!< 0x14 channel 3 handshake flags */ + NETX_HANDSHAKE_CELL tAppFlags0; /*!< 0x18 not supported yet */ + NETX_HANDSHAKE_CELL tAppFlags1; /*!< 0x1C not supported yet */ + uint32_t aulReserved[ 56 ]; /*!< 0x20 - 0xFF */ +} NETX_HANDSHAKE_CHANNEL; + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX COMMUNICATION CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! Default master status structure */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_MASTER_STATUStag +{ + uint32_t ulSlaveState; /*!< Slave status */ + uint32_t ulSlaveErrLogInd; /*!< Slave error indication */ + uint32_t ulNumOfConfigSlaves; /*!< Number of configured slaves */ + uint32_t ulNumOfActiveSlaves; /*!< Number of active slaves */ + uint32_t ulNumOfDiagSlaves; /*!< Number of slaves in diag mode */ + uint32_t ulReserved; /*!< unused/reserved */ +} __RCX_PACKED_POST NETX_MASTER_STATUS; + +/* Master Status definitions */ +#define RCX_SLAVE_STATE_UNDEFINED 0x00000000 +#define RCX_SLAVE_STATE_OK 0x00000001 +#define RCX_SLAVE_STATE_FAILED 0x00000002 + +/*****************************************************************************/ +/*! Channel handshake block (Size always 8 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_HANDSHAKE_BLOCKtag +{ + uint8_t abReserved[8]; /*!< unused/reserved */ +} __RCX_PACKED_POST NETX_HANDSHAKE_BLOCK; + +/*****************************************************************************/ +/*! Channel control block (Size 8 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_CONTROL_BLOCKtag +{ + uint32_t ulApplicationCOS; /*!< 0x00 Application "Change Of State" flags */ + uint32_t ulDeviceWatchdog; /*!< 0x04 Watchdog cell written by the Host */ +} __RCX_PACKED_POST NETX_CONTROL_BLOCK; + +/*****************************************************************************/ +/*! Channel common status block (Size 64 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_COMMON_STATUS_BLOCKtag +{ + uint32_t ulCommunicationCOS; /*!< 0x00 Communication channel "Change Of State" */ + uint32_t ulCommunicationState; /*!< 0x04 Actual communication state */ + uint32_t ulCommunicationError; /*!< 0x08 Actual communication error */ + uint16_t usVersion; /*!< 0x0C Version of the diagnostic structure */ + uint16_t usWatchdogTime; /*!< 0x0E Configured watchdog time */ + uint8_t bPDInHskMode; /*!< 0x10 Input area handshake mode. */ + uint8_t bPDInSource; /*!< 0x11 Reserved. Set to zero.*/ + uint8_t bPDOutHskMode; /*!< 0x12 Output area handshake mode. */ + uint8_t bPDOutSource; /*!< 0x13 Reserved. Set to zero.*/ + uint32_t ulHostWatchdog; /*!< 0x14 Host watchdog */ + uint32_t ulErrorCount; /*!< 0x18 Number of erros since power-up */ + uint8_t bErrorLogInd; /*!< 0x1C Counter of available Log Entries (not supported yet) */ + uint8_t bErrorPDInCnt; /*!< 0x1D Counter of input process data handshake handling errors */ + uint8_t bErrorPDOutCnt; /*!< 0x1E Counter of output process data handshake handling errors */ + uint8_t bErrorSyncCnt; /*!< 0x1F Counter of synchronization handshake handling errors */ + uint8_t bSyncHskMode; /*!< 0x20 Synchronization Handshake mode. */ + uint8_t bSyncSource; /*!< 0x21 Synchronization source. */ + uint16_t ausReserved[3]; /*!< 0x22 Reserved */ + __RCX_PACKED_PRE union + { + NETX_MASTER_STATUS tMasterStatusBlock; /*!< For master implementations */ + uint32_t aulReserved[6]; /*!< reserved */ + } __RCX_PACKED_POST uStackDepended; /*!< 0x28 Stack depend status block */ +} __RCX_PACKED_POST NETX_COMMON_STATUS_BLOCK; + +/*****************************************************************************/ +/*! Channel extended status block (Size 432 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_EXTENDED_STATUS_BLOCKtag +{ + uint8_t abExtendedStatus[NETX_EXT_STATE_SIZE]; /*!< 0x00 Extended status buffer */ +} __RCX_PACKED_POST NETX_EXTENDED_STATUS_BLOCK; + +/* Description of the extended status block structure */ +#define RCX_EXT_STS_MAX_STRUCTURES 24 +/* Location definiton of the ext. state information (bStateArea) */ +#define RCX_EXT_STS_STD_OUTPUT_BLK_ID 8 /* State field located in standard output area */ +#define RCX_EXT_STS_HI_OUTPUT_BLK_ID 9 /* State field located in high prio. output area */ +#define RCX_EXT_STS_STD_INPUT_BLK_ID 0 /* State field located in standard input area */ +#define RCX_EXT_STS_HI_INPUT_BLK_ID 1 /* State field located in high prio. input area */ +/* Definition of state information (bStateTypeID) */ +#define RCX_EXT_STS_SLAVE_CONFIGURED 1 /* Configured slave bit field */ +#define RCX_EXT_STS_SLAVE_ACTIV 2 /* Activ slave bit field */ +#define RCX_EXT_STS_SLAVE_DIAGNOSTIC 3 /* Slave diagnostic bit field */ +typedef __RCX_PACKED_PRE struct NETX_EXTENDED_STATE_STRUCT_Ttag +{ + uint8_t bStateArea; /* Location of the ext. state information */ + uint8_t bStateTypeID; /* Type of the state information */ + uint16_t usNumOfStateEntries; /* Number of state entries of the type bStateTypeID */ + uint32_t ulStateOffset; /* Byte start offset in the defined I/O area*/ +} __RCX_PACKED_POST NETX_EXTENDED_STATE_STRUCT_T; + +typedef __RCX_PACKED_PRE struct NETX_EXTENDED_STATE_FIELD_Ttag +{ + uint8_t bReserved[3]; /* 3 Bytes preserved. Not used. */ + uint8_t bNumStateStructs; /* Number of following state structures */ + NETX_EXTENDED_STATE_STRUCT_T atStateStruct[RCX_EXT_STS_MAX_STRUCTURES]; +} __RCX_PACKED_POST NETX_EXTENDED_STATE_FIELD_T; +typedef __RCX_PACKED_PRE struct NETX_EXTENDED_STATE_FIELD_DEFINITION_Ttag +{ + uint8_t abReserved[172]; /* Default, protocol specific information area */ + NETX_EXTENDED_STATE_FIELD_T tExtStateField; /* Extended status structures */ +} __RCX_PACKED_POST NETX_EXTENDED_STATE_FIELD_DEFINITION_T; +/*****************************************************************************/ +/*! Channel send packet mailbox block (Size 1600 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_SEND_MAILBOX_BLOCKtag +{ + uint16_t usPackagesAccepted; /*!< 0x00 Number of packages that can be accepted */ + uint16_t usReserved; /*!< 0x02 Reserved */ + uint8_t abSendMailbox[NETX_CHANNEL_MAILBOX_SIZE]; /*!< 0x04 Send mailbox packet buffer */ +} __RCX_PACKED_POST NETX_SEND_MAILBOX_BLOCK; + +/*****************************************************************************/ +/*! Channel receive packet mailbox block (Size 1600 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_RECV_MAILBOX_BLOCKtag +{ + uint16_t usWaitingPackages; /*!< 0x00 Number of packages waiting to be processed */ + uint16_t usReserved; /*!< 0x02 Reserved */ + uint8_t abRecvMailbox[NETX_CHANNEL_MAILBOX_SIZE]; /*!< 0x04 Receive mailbox packet buffer */ +} __RCX_PACKED_POST NETX_RECV_MAILBOX_BLOCK; + +/*****************************************************************************/ +/*! Structure of the DEFAULT communication channel (Size 15616 Byte) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_DEFAULT_COMM_CHANNELtag +{ + NETX_HANDSHAKE_BLOCK tReserved; /*!< 0x000:0x007 Reserved for later use */ + NETX_CONTROL_BLOCK tControl; /*!< 0x008:0x00F Control block */ + NETX_COMMON_STATUS_BLOCK tCommonStatus; /*!< 0x010:0x04F Common status block */ + NETX_EXTENDED_STATUS_BLOCK tExtendedStatus; /*!< 0x050:0x1FF Extended status block */ + NETX_SEND_MAILBOX_BLOCK tSendMbx; /*!< 0x200:0x83F Send mailbox block */ + NETX_RECV_MAILBOX_BLOCK tRecvMbx; /*!< 0x840:0xE7F Recveice mailbox block */ + uint8_t abPd1Output[NETX_HP_IO_DATA_SIZE]; /*!< 0xE80:0xEBF Process data 1 output area */ + uint8_t abPd1Input[NETX_HP_IO_DATA_SIZE]; /*!< 0xEC0:0xEFF Process data 1 input area */ + uint8_t abReserved1[256]; /*!< 0xF00:0xFFF Reserved */ + uint8_t abPd0Output[NETX_IO_DATA_SIZE]; /*!< 0x1000:0x267F Process data 0 output area */ + uint8_t abPd0Input[NETX_IO_DATA_SIZE]; /*!< 0x2680:0x3CFF Process data 0 input area */ +} __RCX_PACKED_POST NETX_DEFAULT_COMM_CHANNEL; + + +/*****************************************************************************/ +/*! Structure of the communication channel for 8K DPM hardware (e.g. COMX10) */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct NETX_8K_DPM_COMM_CHANNELtag +{ + NETX_HANDSHAKE_BLOCK tReserved; /*!< 0x000:0x007 Reserved for later use */ + NETX_CONTROL_BLOCK tControl; /*!< 0x008:0x00F Control block */ + NETX_COMMON_STATUS_BLOCK tCommonStatus; /*!< 0x010:0x04F Common status block */ + NETX_EXTENDED_STATUS_BLOCK tExtendedStatus; /*!< 0x050:0x1FF Extended status block */ + NETX_SEND_MAILBOX_BLOCK tSendMbx; /*!< 0x200:0x83F Send mailbox block */ + NETX_RECV_MAILBOX_BLOCK tRecvMbx; /*!< 0x840:0xE7F Recveice mailbox block */ + uint8_t abPd1Output[NETX_HP_IO_DATA_SIZE]; /*!< 0xE80:0xEBF Process data 1 output area */ + uint8_t abPd1Input[NETX_HP_IO_DATA_SIZE]; /*!< 0xEC0:0xEFF Process data 1 input area */ + uint8_t abReserved1[256]; /*!< 0xF00:0xFFF Reserved */ + uint8_t abPd0Output[NETX_IO_DATA_SIZE_8K_DPM]; /*!< 0x1000:0x15FF Process data 0 output area */ + uint8_t abPd0Input[NETX_IO_DATA_SIZE_8K_DPM]; /*!< 0x1600:0x1BFF Process data 0 input area */ + uint8_t abReserved2[256]; /*!< 0x1C00:0x1CFF Reserved */ +} __RCX_PACKED_POST NETX_8K_DPM_COMM_CHANNEL; + + +/* /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ */ +/* End of DPM Layout definition */ + +/*===========================================================================*/ +/* */ +/* Standardized Handshake Flags */ +/* */ +/*===========================================================================*/ + +/* --------------------------------------------*/ +/* System Channel Handshake Flags */ +/* --------------------------------------------*/ +/* HOST Flags */ +#define HSF_RESET 0x0001 /*!< Reset command bitmask */ +#define HSF_BOOTSTART 0x0002 /*!< Set when device has a second stage loader, to enter bootloader mode after a system start */ +#define HSF_HOST_COS_CMD 0x0004 /*!< Host "Change Of State" command bitmask */ +#define HSF_NETX_COS_ACK 0x0008 /*!< NetX "Change Of State" acknowlegde bitmask */ +#define HSF_SEND_MBX_CMD 0x0010 /*!< Send mailbox command bitmask */ +#define HSF_RECV_MBX_ACK 0x0020 /*!< Receive mailbox acknowledge bitmask */ +#define HSF_EXT_SEND_MBX_CMD 0x0040 /*!< Second stage loader extended mailbox command bitmask */ +#define HSF_EXT_RECV_MBX_ACK 0x0080 /*!< Second stage loader extended mailbox ack bitmask */ + +/* HOST Flags as Bit number */ +#define HSF_RESET_BIT_NO 0 /*!< Reset command bitnumber */ +#define HSF_BOOTLOADER_BIT_NO 1 /*!< Bitnumber to be set when device has a second stage loader, to enter bootloader mode after a system start */ +#define HSF_HOST_COS_CMD_BIT_NO 2 /*!< Host "Change Of State" command bitnumber */ +#define HSF_NETX_COS_ACK_BIT_NO 3 /*!< NetX "Change Of State" acknowlegde bitnumber */ +#define HSF_SEND_MBX_CMD_BIT_NO 4 /*!< Send mailbox command bitnumber */ +#define HSF_RECV_MBX_ACK_BIT_NO 5 /*!< Receive mailbox acknowledge bitnumber */ +#define HSF_EXT_SEND_MBX_CMD_BIT_NO 6 /*!< Second stage loader extended mailbox command bitnumber */ +#define HSF_EXT_RECV_MBX_ACK_BIT_NO 7 /*!< Second stage loader extended mailbox ack bitnumber */ + + +/* netX Flags */ +#define NSF_READY 0x0001 /*!< netX System READY bitmask */ +#define NSF_ERROR 0x0002 /*!< General system error bitmask */ +#define NSF_HOST_COS_ACK 0x0004 /*!< Host "Change Of State" acknowledge bitmask */ +#define NSF_NETX_COS_CMD 0x0008 /*!< NetX "Change of State command bitmask */ +#define NSF_SEND_MBX_ACK 0x0010 /*!< Send mailbox acknowledge bitmask */ +#define NSF_RECV_MBX_CMD 0x0020 /*!< Receive mailbox command bitmask */ +#define NSF_EXT_SEND_MBX_ACK 0x0040 /*!< Second stage loader extended mailbox ack bitmask */ +#define NSF_EXT_RECV_MBX_CMD 0x0080 /*!< Second stage loader extended mailbox command bitmask */ +/* netX Flags as Bit number */ +#define NSF_READY_BIT_NO 0 /*!< netX System READY bitnumber */ +#define NSF_ERROR_BIT_NO 1 /*!< General system error bitnumber */ +#define NSF_HOST_COS_ACK_BIT_NO 2 /*!< Host "Change Of State" acknowledge bitnumber */ +#define NSF_NETX_COS_CMD_BIT_NO 3 /*!< NetX "Change of State command bitnumber */ +#define NSF_SEND_MBX_ACK_BIT_NO 4 /*!< Send mailbox acknowledge bitnumber */ +#define NSF_RECV_MBX_CMD_BIT_NO 5 /*!< Receive mailbox command bitnumber */ +#define NSF_EXT_SEND_MBX_ACK_BIT_NO 6 /*!< Second stage loader extended mailbox ack bitnumber */ +#define NSF_EXT_RECV_MBX_CMD_BIT_NO 7 /*!< Second stage loader extended mailbox command bitnumber */ + +/*--------------------------------------------*/ +/* Communication Channel Handshake Flags */ +/*--------------------------------------------*/ +/* HOST Communication Channel Flags */ +#define HCF_HOST_READY 0x0001 /*!< Host application is Ready bitmask */ +#define HCF_unused 0x0002 /*!< unused */ +#define HCF_HOST_COS_CMD 0x0004 /*!< Host "Change Of State" command bitmask */ +#define HCF_NETX_COS_ACK 0x0008 /*!< NetX "Change Of State" acknowledge bitmask */ +#define HCF_SEND_MBX_CMD 0x0010 /*!< Send mailbox command bitmask */ +#define HCF_RECV_MBX_ACK 0x0020 /*!< Receive mailbox ackowledge bitmask */ +#define HCF_PD0_OUT_CMD 0x0040 /*!< Process data, block 0, output command bitmask */ +#define HCF_PD0_IN_ACK 0x0080 /*!< Process data, block 0, input acknowlegde bitmask */ +#define HCF_PD1_OUT_CMD 0x0100 /*!< Process data, block 1, output command bitmask */ +#define HCF_PD1_IN_ACK 0x0200 /*!< Process data, block 1, input acknowlegde bitmask */ +/* HOST Communication Channel Flags as Bit number */ +#define HCF_HOST_READY_BIT_NO 0 /*!< Host application is Ready bitnumber */ +#define HCF_unused_BIT_NO 1 /*!< unused */ +#define HCF_HOST_COS_CMD_BIT_NO 2 /*!< Host "Change Of State" command bitnumber */ +#define HCF_NETX_COS_ACK_BIT_NO 3 /*!< NetX "Change Of State" acknowledge bitnumber */ +#define HCF_SEND_MBX_CMD_BIT_NO 4 /*!< Send mailbox command bitnumber */ +#define HCF_RECV_MBX_ACK_BIT_NO 5 /*!< Receive mailbox ackowledge bitnumber */ +#define HCF_PD0_OUT_CMD_BIT_NO 6 /*!< Process data, block 0, output command bitnumber */ +#define HCF_PD0_IN_ACK_BIT_NO 7 /*!< Process data, block 0, input acknowlegde bitnumber */ +#define HCF_PD1_OUT_CMD_BIT_NO 8 /*!< Process data, block 1, output command bitnumber */ +#define HCF_PD1_IN_ACK_BIT_NO 9 /*!< Process data, block 1, input acknowlegde bitnumber */ + +/* netX Communication Channel Flags */ +#define NCF_COMMUNICATING 0x0001 /*!< Channel has an active conection bitmask */ +#define NCF_ERROR 0x0002 /*!< Communication channel error bitmask */ +#define NCF_HOST_COS_ACK 0x0004 /*!< Host "Change Of State" acknowledge bitmask */ +#define NCF_NETX_COS_CMD 0x0008 /*!< NetX "Change Of State" command bitmask */ +#define NCF_SEND_MBX_ACK 0x0010 /*!< Send mailbox acknowldege bitmask */ +#define NCF_RECV_MBX_CMD 0x0020 /*!< Receive mailbox command bitmask */ +#define NCF_PD0_OUT_ACK 0x0040 /*!< Process data, block 0, output acknowledge bitmask */ +#define NCF_PD0_IN_CMD 0x0080 /*!< Process data, block 0, input command bitmask */ +#define NCF_PD1_OUT_ACK 0x0100 /*!< Process data, block 1, output acknowlegde bitmask */ +#define NCF_PD1_IN_CMD 0x0200 /*!< Process data, block 1, input command bitmask */ +/* netX Communication Channel Flags as Bit number */ +#define NCF_COMMUNICATING_BIT_NO 0 /*!< Channel has an active conection bitnumber */ +#define NCF_ERROR_BIT_NO 1 /*!< Communication channel error bitnumber */ +#define NCF_HOST_COS_ACK_BIT_NO 2 /*!< Host "Change Of State" acknowledge bitnumber */ +#define NCF_NETX_COS_CMD_BIT_NO 3 /*!< NetX "Change Of State" command bitnumber */ +#define NCF_SEND_MBX_ACK_BIT_NO 4 /*!< Send mailbox acknowldege bitnumber */ +#define NCF_RECV_MBX_CMD_BIT_NO 5 /*!< Receive mailbox command bitnumber */ +#define NCF_PD0_OUT_ACK_BIT_NO 6 /*!< Process data, block 0, output acknowledge bitnumber */ +#define NCF_PD0_IN_CMD_BIT_NO 7 /*!< Process data, block 0, input command bitnumber */ +#define NCF_PD1_OUT_ACK_BIT_NO 8 /*!< Process data, block 1, output acknowlegde bitnumber */ +#define NCF_PD1_IN_CMD_BIT_NO 9 /*!< Process data, block 1, input command bitnumber */ + +/*--------------------------------------------*/ +/* Handshake Flags State Definitions */ +/*--------------------------------------------*/ +/* Flag state definition */ +#define RCX_FLAGS_EQUAL 0 +#define RCX_FLAGS_NOT_EQUAL 1 +#define RCX_FLAGS_CLEAR 2 +#define RCX_FLAGS_SET 3 +#define RCX_FLAGS_NONE 0xFF + +#define RCX_FLAG_CLEAR 0 +#define RCX_FLAG_SET 1 + +/*===========================================================================*/ +/* */ +/* SYSTEM CHANNEL Configuration definitions */ +/* */ +/*===========================================================================*/ + +/*--------------------------------------------*/ +/* SYSTEM STATUS BLOCK */ +/*--------------------------------------------*/ +/* System Change of State flags */ +#define RCX_SYS_COS_UNDEFINED 0 +#define RCX_SYS_COS_DEFAULT_MEMORY 0x80000000 +/* System Change of State flags as bit number */ +#define RCX_SYS_COS_DEFAULT_MEMORY_BIT_NO 31 + +/* System Status */ +#define RCX_SYS_STATUS_UNDEFINED 0x00000000 +#define RCX_SYS_STATUS_OK 0x00000001 +#define RCX_SYS_STATUS_BOOTMEDIUM_MASK 0x0F000000 +#define RCX_SYS_STATUS_BOOTMEDIUM_RAM 0x00000000 +#define RCX_SYS_STATUS_BOOTMEDIUM_SERFLASH 0x01000000 +#define RCX_SYS_STATUS_BOOTMEDIUM_PARFLASH 0x02000000 +#define RCX_SYS_STATUS_NO_SYSVOLUME 0x20000000 +#define RCX_SYS_STATUS_SYSVOLUME_FFS 0x40000000 /* _FFS = Flash File System */ +#define RCX_SYS_STATUS_NXO_SUPPORTED 0x80000000 + +/* System Status definition */ +#define RCX_SYS_STATE_UNDEFINED 0 +#define RCX_SYS_STATE_OK 1 + +/* System Error definitions */ +#define RCX_SYS_ERROR_SUCCESS 0 + +/* System Status */ +#define RCX_SYS_STATE_RESET 0x000000F0 +#define RCX_SYS_STATE_SELF_TEST 0x000000EF +#define RCX_SYS_STATE_RAM_TEST 0x000000EE +#define RCX_SYS_STATE_FAULT_INIT 0x000000ED +#define RCX_SYS_STATE_DEVICE_INIT 0x000000EC +#define RCX_SYS_STATE_MAILBOX_INIT 0x000000EB +#define RCX_SYS_STATE_SERIAL_INIT 0x000000EA +#define RCX_SYS_STATE_SEMAPHORE_INIT 0x000000E9 +#define RCX_SYS_STATE_QUEUE_INIT 0x000000E8 +#define RCX_SYS_STATE_MUTEX_INIT 0x000000E7 +#define RCX_SYS_STATE_EVENT_INIT 0x000000E6 +#define RCX_SYS_STATE_SIGNAL_INIT 0x000000E5 +#define RCX_SYS_STATE_TIMER_INIT 0x000000E4 +#define RCX_SYS_STATE_BARRIER_INIT 0x000000E3 +#define RCX_SYS_STATE_DIAGNOSTIC_INIT 0x000000E2 +#define RCX_SYS_STATE_FINITE_STATE_INIT 0x000000E1 +#define RCX_SYS_STATE_INTERRUPT_INIT 0x000000E0 +#define RCX_SYS_STATE_LED_INIT 0x000000DF +/*#define RCX_SYS_STATE_TIMER_INIT 0x000000DE*/ +#define RCX_SYS_STATE_PAR_FLASH_INIT 0x000000DD +#define RCX_SYS_STATE_XC_INIT 0x000000DC +#define RCX_SYS_STATE_PHY_INIT 0x000000DB +#define RCX_SYS_STATE_UART_INIT 0x000000DA +#define RCX_SYS_STATE_VOL_INIT 0x000000D9 +#define RCX_SYS_STATE_EDD_INIT 0x000000D8 +#define RCX_SYS_STATE_ICM_INIT 0x000000D7 +#define RCX_SYS_STATE_USB_INIT 0x000000D6 +#define RCX_SYS_STATE_FIFO_INIT 0x000000D5 +#define RCX_SYS_STATE_EBUS_INIT 0x000000D4 +#define RCX_SYS_STATE_MMU_INIT 0x000000D3 +#define RCX_SYS_STATE_TCM_INIT 0x000000D2 +#define RCX_SYS_STATE_CCH_INIT 0x000000D1 +#define RCX_SYS_STATE_MID_SYS_INIT 0x000000D0 +#define RCX_SYS_STATE_MID_DBM_INIT 0x000000CF +#define RCX_SYS_STATE_HIF_INIT 0x000000CE +#define RCX_SYS_STATE_HIFPIO_INIT 0x000000CD +#define RCX_SYS_STATE_SPI_INIT 0x000000CC +#define RCX_SYS_STATE_FIQ_INIT 0x000000CB +#define RCX_SYS_STATE_SEC_INIT 0x000000CA +#define RCX_SYS_STATE_CRC_INIT 0x000000C9 +#define RCX_SYS_STATE_MEMORY_INIT 0x000000C8 +#define RCX_SYS_STATE_SER_FLASH_INIT 0x000000C7 +#define RCX_SYS_STATE_TASKS_INIT 0x000000C6 +#define RCX_SYS_STATE_MID_STA_INIT 0x000000C5 +#define RCX_SYS_STATE_MULTITASK_INIT 0x000000C4 +#define RCX_SYS_STATE_IDLE_TASK_INIT 0x000000C3 +#define RCX_SYS_STATE_GPIO_INIT 0x000000C2 +#define RCX_SYS_STATE_PIO_INIT 0x000000C1 +#define RCX_SYS_STATE_SUCCESS 0x00000000 + +/* System Error */ +#define RCX_SYS_SUCCESS 0x00000000 +#define RCX_SYS_RAM_NOT_FOUND 0x00000001 +#define RCX_SYS_RAM_TYPE 0x00000002 +#define RCX_SYS_RAM_SIZE 0x00000003 +#define RCX_SYS_RAM_TEST 0x00000004 +#define RCX_SYS_FLASH_NOT_FOUND 0x00000005 +#define RCX_SYS_FLASH_TYPE 0x00000006 +#define RCX_SYS_FLASH_SIZE 0x00000007 +#define RCX_SYS_FLASH_TEST 0x00000008 +#define RCX_SYS_EEPROM_NOT_FOUND 0x00000009 +#define RCX_SYS_EEPROM_TYPE 0x0000000A +#define RCX_SYS_EEPROM_SIZE 0x0000000B +#define RCX_SYS_EEPROM_TEST 0x0000000C +#define RCX_SYS_SECURE_EEPROM 0x0000000D +#define RCX_SYS_SECURE_EEPROM_NOT_INIT 0x0000000E +#define RCX_SYS_SECURE_DDP_NOT_INIT RCX_SYS_SECURE_EEPROM_NOT_INIT +#define RCX_SYS_FILE_SYSTEM_FAULT 0x0000000F +#define RCX_SYS_VERSION_CONFLICT 0x00000010 +#define RCX_SYS_NOT_INITIALIZED 0x00000011 +#define RCX_SYS_MEM_ALLOC 0x00000012 + +/* LED State definition */ +#define RCX_LED_STATE_MASK 0x0F +#define RCX_LED_STATE_OFF 0x00 +#define RCX_LED_STATE_SOLID_ON 0x01 +#define RCX_LED_STATE_FLICKER 0x02 +#define RCX_LED_STATE_SINGLE_FLICKER 0x03 +#define RCX_LED_STATE_FLASH_CYCLIC 0x04 +#define RCX_LED_STATE_FLASH_CYCLIC_FAST 0x05 +#define RCX_LED_STATE_SINGLE_FLASH 0x06 +#define RCX_LED_STATE_DOUBLE_FLASH 0x07 +#define RCX_LED_STATE_QUADRUPLE_FLASH 0x08 +#define RCX_LED_STATE_FLASH_NON_CYCLIC 0x09 +#define RCX_LED_STATE_TRIPLE_FLASH 0x0A + +/* LED Color State */ +#define RCX_LED_COLOR_STATE_MASK 0xF0 +#define RCX_LED_COLOR_NOT_USED 0x00 +#define RCX_LED_COLOR_RED 0x10 +#define RCX_LED_COLOR_YELLOW 0x20 +#define RCX_LED_COLOR_GREEN 0x30 +#define RCX_LED_COLOR_BLUE 0x40 +#define RCX_LED_COLOR_RED_GREEN 0x50 +#define RCX_LED_COLOR_RED_YELLOW 0x60 +#define RCX_LED_COLOR_GREEN_YELLOW 0x70 + +/* System LED definition */ +#define RCX_LED_OFF 0x00 +#define RCX_LED_YEL_CYCLIC_FAST 0x25 +#define RCX_LED_YEL_CYCLIC 0x24 +#define RCX_LED_YEL_NONCYCLIC 0x29 +#define RCX_LED_GRN_SOLID 0x31 +#define RCX_LED_GRN_CYCLIC 0x34 +#define RCX_LED_GRN_NONCYCLIC 0x39 + +/* System Hardware Features */ +/* Extended Memory */ +#define RCX_SYSTEM_EXTMEM_TYPE_MSK 0x0000000F +#define RCX_SYSTEM_EXTMEM_TYPE_NONE 0x00000000 +#define RCX_SYSTEM_EXTMEM_TYPE_MRAM_128K 0x00000001 + +#define RCX_SYSTEM_EXTMEM_ACCESS_MSK 0x000000C0 +#define RCX_SYSTEM_EXTMEM_ACCESS_NONE 0x00000000 +#define RCX_SYSTEM_EXTMEM_ACCESS_EXTERNAL 0x00000040 +#define RCX_SYSTEM_EXTMEM_ACCESS_INTERNAL 0x00000080 +#define RCX_SYSTEM_EXTMEM_ACCESS_BOTH 0x000000C0 + +/* RTC */ +#define RCX_SYSTEM_HW_RTC_MSK 0x00000700 +#define RCX_SYSTEM_HW_RTC_TYPE_MSK 0x00000300 +#define RCX_SYSTEM_HW_RTC_TYPE_NONE 0x00000000 +#define RCX_SYSTEM_HW_RTC_TYPE_INTERNAL 0x00000100 +#define RCX_SYSTEM_HW_RTC_TYPE_EXTERNAL 0x00000200 +#define RCX_SYSTEM_HW_RTC_TYPE_EMULATED 0x00000300 +#define RCX_SYSTEM_HW_RTC_STATE 0x00000400 + +/*--------------------------------------------*/ +/* SYSTEM INFORMATION BLOCK */ +/*--------------------------------------------*/ +/* Hardware options */ +#define RCX_HW_ASSEMBLY_UNDEFINED 0x0000 +#define RCX_HW_ASSEMBLY_NOT_AVAILABLE 0x0001 + +#define RCX_HW_ASSEMBLY_VALIDATION_START 0x0010 /* Start of HW option validation area */ + +#define RCX_HW_ASSEMBLY_SERIAL 0x0010 +#define RCX_HW_ASSEMBLY_ASI 0x0020 +#define RCX_HW_ASSEMBLY_CAN 0x0030 +#define RCX_HW_ASSEMBLY_DEVICENET 0x0040 +#define RCX_HW_ASSEMBLY_PROFIBUS 0x0050 + +#define RCX_HW_ASSEMBLY_CCLINK 0x0070 +#define RCX_HW_ASSEMBLY_ETHERNET 0x0080 +#define RCX_HW_ASSEMBLY_ETHERNET_X_PHY 0x0081 +#define RCX_HW_ASSEMBLY_ETHERNET_FIBRE_OPTIC 0x0082 + +#define RCX_HW_ASSEMBLY_SPI 0x0090 +#define RCX_HW_ASSEMBLY_IO_LINK 0x00A0 +#define RCX_HW_ASSEMBLY_COMPONET 0x00B0 + +#define RCX_HW_ASSEMBLY_VALIDATION_END 0xFFEF /* End of HW option validation area */ + +#define RCX_HW_ASSEMBLY_I2C_UNKNOWN 0xFFF4 +#define RCX_HW_ASSEMBLY_SSI 0xFFF5 +#define RCX_HW_ASSEMBLY_SYNC 0xFFF6 + +#define RCX_HW_ASSEMBLY_FIELDBUS 0xFFF8 + +#define RCX_HW_ASSEMBLY_TOUCH_SCREEN 0xFFFA +#define RCX_HW_ASSEMBLY_I2C_PIO 0xFFFB +#define RCX_HW_ASSEMBLY_I2C_PIO_NT 0xFFFC +#define RCX_HW_ASSEMBLY_PROPRIETARY 0xFFFD +#define RCX_HW_ASSEMBLY_NOT_CONNECTED 0xFFFE +#define RCX_HW_ASSEMBLY_RESERVED 0xFFFF + +/* Manufacturer definition */ +#define RCX_MANUFACTURER_UNDEFINED 0x0000 +#define RCX_MANUFACTURER_HILSCHER_GMBH 0x0001 /* Hilscher GmbH */ +#define RCX_MANUFACTURER_HILSCHER_GMBH_MAX 0x00FF /* Hilscher GmbH max. value*/ + +/* Production date definition */ +#define RCX_PRODUCTION_DATE_YEAR_MASK 0xFF00 /* Year offset (0..255) starting at 2000 */ +#define RCX_PRODUCTION_DATE_WEEK_MASK 0x00FF /* Week of year ( 1..52) */ + +/* Device class definition */ +#define RCX_HW_DEV_CLASS_UNDEFINED 0x0000 +#define RCX_HW_DEV_CLASS_UNCLASSIFIABLE 0x0001 +#define RCX_HW_DEV_CLASS_CHIP_NETX_500 0x0002 +#define RCX_HW_DEV_CLASS_CIFX 0x0003 +#define RCX_HW_DEV_CLASS_COMX_100 0x0004 +#define RCX_HW_DEV_CLASS_COMX 0x0004 /* old definition only for compatibility reasons */ +#define RCX_HW_DEV_CLASS_EVA_BOARD 0x0005 +#define RCX_HW_DEV_CLASS_NETDIMM 0x0006 +#define RCX_HW_DEV_CLASS_CHIP_NETX_100 0x0007 +#define RCX_HW_DEV_CLASS_NETX_HMI 0x0008 + +#define RCX_HW_DEV_CLASS_NETIO_50 0x000A +#define RCX_HW_DEV_CLASS_NETIO_100 0x000B +#define RCX_HW_DEV_CLASS_CHIP_NETX_50 0x000C +#define RCX_HW_DEV_CLASS_GW_NETPAC 0x000D +#define RCX_HW_DEV_CLASS_GW_NETTAP 0x000E +#define RCX_HW_DEV_CLASS_NETSTICK 0x000F +#define RCX_HW_DEV_CLASS_NETANALYZER 0x0010 +#define RCX_HW_DEV_CLASS_NETSWITCH 0x0011 +#define RCX_HW_DEV_CLASS_NETLINK 0x0012 +#define RCX_HW_DEV_CLASS_NETIC_50 0x0013 +#define RCX_HW_DEV_CLASS_NETIC 0x0013 /* old definition only for compatibility reasons */ +#define RCX_HW_DEV_CLASS_NPLC_C100 0x0014 +#define RCX_HW_DEV_CLASS_NPLC_M100 0x0015 +#define RCX_HW_DEV_CLASS_GW_NETTAP_50 0x0016 +#define RCX_HW_DEV_CLASS_NETBRICK 0x0017 +#define RCX_HW_DEV_CLASS_NPLC_T100 0x0018 +#define RCX_HW_DEV_CLASS_NETLINK_PROXY 0x0019 +#define RCX_HW_DEV_CLASS_CHIP_NETX_10 0x001A +#define RCX_HW_DEV_CLASS_NETJACK_10 0x001B +#define RCX_HW_DEV_CLASS_NETJACK_50 0x001C +#define RCX_HW_DEV_CLASS_NETJACK_100 0x001D +#define RCX_HW_DEV_CLASS_NETJACK_500 0x001E +#define RCX_HW_DEV_CLASS_NETLINK_10_USB 0x001F +#define RCX_HW_DEV_CLASS_COMX_10 0x0020 +#define RCX_HW_DEV_CLASS_NETIC_10 0x0021 +#define RCX_HW_DEV_CLASS_COMX_50 0x0022 +#define RCX_HW_DEV_CLASS_NETRAPID_10 0x0023 +#define RCX_HW_DEV_CLASS_NETRAPID_50 0x0024 +#define RCX_HW_DEV_CLASS_NETSCADA_T51 0x0025 +#define RCX_HW_DEV_CLASS_CHIP_NETX_51 0x0026 +#define RCX_HW_DEV_CLASS_NETRAPID_51 0x0027 +#define RCX_HW_DEV_CLASS_GW_EU5C 0x0028 +#define RCX_HW_DEV_CLASS_NETSCADA_T50 0x0029 +#define RCX_HW_DEV_CLASS_NETSMART_50 0x002A +#define RCX_HW_DEV_CLASS_IOLINK_GW_51 0x002B +#define RCX_HW_DEV_CLASS_NETHMI_B500 0x002C +#define RCX_HW_DEV_CLASS_CHIP_NETX_52 0x002D +#define RCX_HW_DEV_CLASS_COMX_51 0x002E +#define RCX_HW_DEV_CLASS_NETJACK_51 0x002F +#define RCX_HW_DEV_CLASS_NETHOST_T100 0x0030 +#define RCX_HW_DEV_CLASS_NETSCOPE_C100 0x0031 +#define RCX_HW_DEV_CLASS_NETRAPID_52 0x0032 +#define RCX_HW_DEV_CLASS_NETSMART_T51 0x0033 +#define RCX_HW_DEV_CLASS_NETSCADA_T52 0x0034 +#define RCX_HW_DEV_CLASS_NETSAFETY_51 0x0035 +#define RCX_HW_DEV_CLASS_NETSAFETY_52 0x0036 +#define RCX_HW_DEV_CLASS_NETPLC_J500 0x0037 +#define RCX_HW_DEV_CLASS_NETIC_52 0x0038 +#define RCX_HW_DEV_CLASS_GW_NETTAP_151 0x0039 + +#define RCX_HW_DEV_CLASS_CHIP_NETX_4000_COM 0x003A +#define RCX_HW_DEV_CLASS_CIFX_4000 0x003B +#define RCX_HW_DEV_CLASS_CHIP_NETX_90_COM 0x003C +#define RCX_HW_DEV_CLASS_NETRAPID_51_IO 0x003D +#define RCX_HW_DEV_CLASS_GW_NETTAP_151_CCIES 0x003E +#define RCX_HW_DEV_CLASS_CIFX_CCIES 0x003F +#define RCX_HW_DEV_CLASS_COMX_51_CCIES 0x0040 +#define RCX_HW_DEV_CLASS_NIOT_E_NPEX_BP52_IO 0x0041 +#define RCX_HW_DEV_CLASS_NIOT_E_NPEX_BP52_IOL 0x0042 + +#define RCX_HW_DEV_CLASS_HILSCHER_GMBH_MAX 0x7FFF /* Hilscher GmbH max. value*/ +#define RCX_HW_DEV_CLASS_OEM_DEVICE 0xFFFE + +/*--------------------------------------------*/ +/* CHANNEL INFORMATION BLOCK */ +/*--------------------------------------------*/ +/* Channel type definitions */ +#define RCX_CHANNEL_TYPE_UNDEFINED 0 /*!< Type of the channel is undefined */ +#define RCX_CHANNEL_TYPE_NOT_AVAILABLE 1 /*!< Type of the channel not available */ +#define RCX_CHANNEL_TYPE_RESERVED 2 /*!< Reserved */ +#define RCX_CHANNEL_TYPE_SYSTEM 3 /*!< System channel */ +#define RCX_CHANNEL_TYPE_HANDSHAKE 4 /*!< Handshake channel */ +#define RCX_CHANNEL_TYPE_COMMUNICATION 5 /*!< Communication channel */ +#define RCX_CHANNEL_TYPE_APPLICATION 6 /*!< Application channnel */ +#define RCX_CHANNEL_TYPE_MAX 127 /*!< Maximum used channel number */ +#define RCX_CHANNEL_TYPE_USER_DEFINED_START 128 /*!< User defined channel */ + +/* Handshake cell, size and position */ +#define RCX_HANDSHAKE_SIZE_MASK 0x0F /*!< Handshake size mask */ +#define RCX_HANDSHAKE_SIZE_NOT_AVAILABLE 0x00 /*!< No handshake cells */ +#define RCX_HANDSHAKE_SIZE_8BIT 0x01 /*!< Handshake cell size 8bit */ +#define RCX_HANDSHAKE_SIZE_16BIT 0x02 /*!< Handshake cell size 16bit */ + +#define RCX_HANDSHAKE_POSITION_MASK 0xF0 /*!< Handshake position mask */ +#define RCX_HANDSHAKE_POSITION_BEGINNING 0x00 /*!< Handshake cells located at the start of each channel */ +#define RCX_HANDSHAKE_POSITION_CHANNEL 0x10 /*!< Handshake cells located in an own channel */ + +/* Communication Class information */ +#define RCX_COMM_CLASS_UNDEFINED 0x0000 +#define RCX_COMM_CLASS_UNCLASSIFIABLE 0x0001 +#define RCX_COMM_CLASS_MASTER 0x0002 +#define RCX_COMM_CLASS_SLAVE 0x0003 +#define RCX_COMM_CLASS_SCANNER 0x0004 +#define RCX_COMM_CLASS_ADAPTER 0x0005 +#define RCX_COMM_CLASS_MESSAGING 0x0006 +#define RCX_COMM_CLASS_CLIENT 0x0007 +#define RCX_COMM_CLASS_SERVER 0x0008 +#define RCX_COMM_CLASS_IO_CONTROLLER 0x0009 +#define RCX_COMM_CLASS_IO_DEVICE 0x000A +#define RCX_COMM_CLASS_IO_SUPERVISOR 0x000B +#define RCX_COMM_CLASS_GATEWAY 0x000C +#define RCX_COMM_CLASS_MONITOR 0x000D +#define RCX_COMM_CLASS_PRODUCER 0x000E +#define RCX_COMM_CLASS_CONSUMER 0x000F +#define RCX_COMM_CLASS_SWITCH 0x0010 +#define RCX_COMM_CLASS_HUB 0x0011 +#define RCX_COMM_CLASS_COMBI 0x0012 +#define RCX_COMM_CLASS_MANAGING_NODE 0x0013 +#define RCX_COMM_CLASS_CONTROLLED_NODE 0x0014 +#define RCX_COMM_CLASS_PLC 0x0015 +#define RCX_COMM_CLASS_HMI 0x0016 +#define RCX_COMM_CLASS_ITEM_SERVER 0x0017 +#define RCX_COMM_CLASS_SCADA 0x0018 + +/* Protocol Class information */ +#define RCX_PROT_CLASS_UNDEFINED 0x0000 +#define RCX_PROT_CLASS_3964R 0x0001 +#define RCX_PROT_CLASS_ASINTERFACE 0x0002 +#define RCX_PROT_CLASS_ASCII 0x0003 +#define RCX_PROT_CLASS_CANOPEN 0x0004 +#define RCX_PROT_CLASS_CCLINK 0x0005 +#define RCX_PROT_CLASS_COMPONET 0x0006 +#define RCX_PROT_CLASS_CONTROLNET 0x0007 +#define RCX_PROT_CLASS_DEVICENET 0x0008 +#define RCX_PROT_CLASS_ETHERCAT 0x0009 +#define RCX_PROT_CLASS_ETHERNET_IP 0x000A +#define RCX_PROT_CLASS_FOUNDATION_FB 0x000B +#define RCX_PROT_CLASS_FL_NET 0x000C +#define RCX_PROT_CLASS_INTERBUS 0x000D +#define RCX_PROT_CLASS_IO_LINK 0x000E +#define RCX_PROT_CLASS_LON 0x000F +#define RCX_PROT_CLASS_MODBUS_PLUS 0x0010 +#define RCX_PROT_CLASS_MODBUS_RTU 0x0011 +#define RCX_PROT_CLASS_OPEN_MODBUS_TCP 0x0012 +#define RCX_PROT_CLASS_PROFIBUS_DP 0x0013 +#define RCX_PROT_CLASS_PROFIBUS_MPI 0x0014 +#define RCX_PROT_CLASS_PROFINET_IO 0x0015 +#define RCX_PROT_CLASS_RK512 0x0016 +#define RCX_PROT_CLASS_SERCOS_II 0x0017 +#define RCX_PROT_CLASS_SERCOS_III 0x0018 +#define RCX_PROT_CLASS_TCP_IP_UDP_IP 0x0019 +#define RCX_PROT_CLASS_POWERLINK 0x001A +#define RCX_PROT_CLASS_HART 0x001B +#define RCX_PROT_CLASS_COMBI 0x001C +#define RCX_PROT_CLASS_PROG_GATEWAY 0x001D +#define RCX_PROT_CLASS_PROG_SERIAL 0x001E +#define RCX_PROT_CLASS_PLC_CODESYS 0x001F +#define RCX_PROT_CLASS_PLC_PROCONOS 0x0020 +#define RCX_PROT_CLASS_PLC_IBH_S7 0x0021 +#define RCX_PROT_CLASS_PLC_ISAGRAF 0x0022 +#define RCX_PROT_CLASS_VISU_QVIS 0x0023 +#define RCX_PROT_CLASS_ETHERNET 0x0024 +#define RCX_PROT_CLASS_RFC1006 0x0025 +#define RCX_PROT_CLASS_DF1 0x0026 +#define RCX_PROT_CLASS_VARAN 0x0027 +#define PROT_CLASS_3S_PLC_HANDLER 0x0028 +#define RCX_PROT_CLASS_ATVISE 0x0029 +#define RCX_PROT_CLASS_MQTT 0x002A +#define RCX_PROT_CLASS_OPCUA 0x002B +#define RCX_PROT_CLASS_OEM 0xFFF0 + +/*===========================================================================*/ +/* */ +/* COMMUNICATION / APPLICATION CHANNEL Configuration definitions */ +/* */ +/*===========================================================================*/ +/*-----------------------------------*/ +/* CHANNEL CONTROL BLOCK */ +/*-----------------------------------*/ +/* Application Change of State */ +#define RCX_APP_COS_APPLICATION_READY 0x00000001 +#define RCX_APP_COS_BUS_ON 0x00000002 +#define RCX_APP_COS_BUS_ON_ENABLE 0x00000004 +#define RCX_APP_COS_INITIALIZATION 0x00000008 +#define RCX_APP_COS_INITIALIZATION_ENABLE 0x00000010 +#define RCX_APP_COS_LOCK_CONFIGURATION 0x00000020 +#define RCX_APP_COS_LOCK_CONFIGURATION_ENABLE 0x00000040 +#define RCX_APP_COS_DMA 0x00000080 +#define RCX_APP_COS_DMA_ENABLE 0x00000100 + +/* Application Change of State flags as bit number */ +#define RCX_APP_COS_APPLICATION_READY_BIT_NO 0 +#define RCX_APP_COS_BUS_ON_BIT_NO 1 +#define RCX_APP_COS_BUS_ON_ENABLE_BIT_NO 2 +#define RCX_APP_COS_INITIALIZATION_BIT_NO 3 +#define RCX_APP_COS_INITIALIZATION_ENABLE_BIT_NO 4 +#define RCX_APP_COS_LOCK_CONFIGURATION_BIT_NO 5 +#define RCX_APP_COS_LOCK_CONFIGURATION_ENABLE_BIT_NO 6 +#define RCX_APP_COS_DMA_BIT_NO 7 +#define RCX_APP_COS_DMA_ENABLE_BIT_NO 8 + +/*-----------------------------------*/ +/* CHANNEL COMMON STATUS BLOCK */ +/*-----------------------------------*/ +/* Channel Change Of State flags */ +#define RCX_COMM_COS_UNDEFINED 0x00000000 +#define RCX_COMM_COS_READY 0x00000001 +#define RCX_COMM_COS_RUN 0x00000002 +#define RCX_COMM_COS_BUS_ON 0x00000004 +#define RCX_COMM_COS_CONFIG_LOCKED 0x00000008 +#define RCX_COMM_COS_CONFIG_NEW 0x00000010 +#define RCX_COMM_COS_RESTART_REQUIRED 0x00000020 +#define RCX_COMM_COS_RESTART_REQUIRED_ENABLE 0x00000040 +#define RCX_COMM_COS_DMA 0x00000080 + +/* Channel Change Of State flags as bit numbers */ +#define RCX_COMM_COS_READY_BIT_NO 0 +#define RCX_COMM_COS_RUN_BIT_NO 1 +#define RCX_COMM_COS_BUS_ON_BIT_NO 2 +#define RCX_COMM_COS_CONFIG_LOCKED_BIT_NO 3 +#define RCX_COMM_COS_CONFIG_NEW_BIT_NO 4 +#define RCX_COMM_COS_RESTART_REQUIRED_BIT_NO 5 +#define RCX_COMM_COS_RESTART_REQUIRED_ENABLE_BIT_NO 6 +#define RCX_COMM_COS_DMA_BIT_NO 7 + +/*===========================================================================*/ +/* */ +/* Channel block information */ +/* */ +/*===========================================================================*/ + +/*****************************************************************************/ +/*! Block configuration information */ +/*****************************************************************************/ +typedef struct NETX_BLOCK_DEFINITIONtag +{ + uint8_t bChannelNumber; + uint8_t blBlockNumber; + uint8_t bBlockID; + uint8_t bPad; + uint32_t ulOffset; + uint32_t ulSize; + uint16_t usFlags; + uint16_t usHandshakeMode; + uint16_t usHandshakePosition; + uint16_t usReserved; +} NETX_BLOCK_DEFINITION; + +/* Block ID */ +#define RCX_BLOCK_MASK 0x00FFL +#define RCX_BLOCK_UNDEFINED 0x0000L +#define RCX_BLOCK_UNKNOWN 0x0001L +#define RCX_BLOCK_DATA_IMAGE 0x0002L +#define RCX_BLOCK_DATA_IMAGE_HI_PRIO 0x0003L +#define RCX_BLOCK_MAILBOX 0x0004L +#define RCX_BLOCK_CTRL_PARAM 0x0005L +#define RCX_BLOCK_COMMON_STATE 0x0006L +#define RCX_BLOCK_EXTENDED_STATE 0x0007L +#define RCX_BLOCK_USER 0x0008L + +/* Flags definition: Direction */ +#define RCX_DIRECTION_MASK 0x000F +#define RCX_DIRECTION_UNDEFINED 0x0000 +#define RCX_DIRECTION_IN 0x0001 +#define RCX_DIRECTION_OUT 0x0002 +#define RCX_DIRECTION_INOUT 0x0003 + +/* Flags definition: Transmission type */ +#define RCX_TRANSMISSION_TYPE_MASK 0x00F0 +#define RCX_TRANSMISSION_TYPE_UNDEFINED 0x0000 +#define RCX_TRANSMISSION_TYPE_DPM 0x0010 +#define RCX_TRANSMISSION_TYPE_DMA 0x0020 + +/* Block definition: I/O Mode */ +#define RCX_IO_MODE_DEFAULT 0x0000 /*!< I/O mode default, for compability reasons this value is identical to 0x4 (buffered host controlled) */ +#define RCX_IO_MODE_BUFF_DEV_CTRL 0x0002 /*!< I/O mode buffered device controlled */ +#define RCX_IO_MODE_UNCONTROLLED 0x0003 /*!< I/O mode bus synchronous device controlled */ +#define RCX_IO_MODE_BUFF_HST_CTRL 0x0004 /*!< I/O mode buffered host controlled */ + +/* Block definition: Synchronization Mode */ +#define RCX_SYNC_MODE_OFF 0x00 +#define RCX_SYNC_MODE_DEV_CTRL 0x01 +#define RCX_SYNC_MODE_HST_CTRL 0x02 + +/* Block definition: Synchronization Sources */ +#define RCX_SYNC_SOURCE_OFF 0x00 +#define RCX_SYNC_SOURCE_1 0x01 +#define RCX_SYNC_SOURCE_2 0x02 + + + + +/*===========================================================================*/ +/* */ +/* */ +/* */ +/*===========================================================================*/ + +/* Status Information */ +#define RCX_SI_STATE_SUCCESS 0x0000 + +/* Fault State */ +#define RCX_FS_STATE_UNDEFINED 0x0000 +#define RCX_FS_STATE_NO_FAULT 0x0001 +#define RCX_FS_STATE_CONF_ERROR 0x0002 +#define RCX_FS_STATE_RECOVERABLE 0x0003 +#define RCX_FS_STATE_SEVERE 0x0004 +#define RCX_FS_STATE_FATAL 0x0005 +#define RCX_FS_STATE_WATCHDOG 0x0006 + +/* Network State */ +#define RCX_COMM_STATE_UNKNOWN 0x0000 +#define RCX_COMM_STATE_NOT_CONFIGURED 0x0001 +#define RCX_COMM_STATE_STOP 0x0002 +#define RCX_COMM_STATE_IDLE 0x0003 +#define RCX_COMM_STATE_OPERATE 0x0004 + +/* Input / Output data states */ +#define RCX_IODS_FIELDBUS_MASK 0x00F0 +#define RCX_IODS_DATA_STATE_GOOD 0x0080 +#define RCX_IODS_PROVIDER_RUN 0x0040 +#define RCX_IODS_GENERATED_LOCALLY 0x0020 + +/* System Reset cookie */ +#define RCX_SYS_RESET_COOKIE 0x55AA55AA +#define RCX_SYS_BAD_MEMORY_COOKIE 0x0BAD + +/*===========================================================================*/ +/* */ +/* RCX Packet Definition */ +/* */ +/*===========================================================================*/ +/* Structure of the RCX packet header */ +#define RCX_MAX_PACKET_SIZE 1596 /*!< Maximum size of the RCX packet in bytes */ +#define RCX_PACKET_HEADER_SIZE 40 /*!< Maximum size of the RCX packet header in bytes */ +#define RCX_MAX_DATA_SIZE (RCX_MAX_PACKET_SIZE - RCX_PACKET_HEADER_SIZE) /* Maximum RCX packet data size */ + +#define RCX_MSK_PACKET_ANSWER 0x00000001 /*!< Packet answer bit */ + +/* Packet default Destination */ +#define RCX_SYSTEM_CHANNEL 0xFFFFFFFF + +/* Packet destinations */ +#define RCX_PACKET_DEST_SYSTEM 0 +#define RCX_PACKET_DEST_PORT_0 1 +#define RCX_PACKET_DEST_PORT_1 2 +#define RCX_PACKET_DEST_PORT_2 3 +#define RCX_PACKET_DEST_PORT_3 4 +#define RCX_PACKET_DEST_DEFAULT_CHANNEL 0x00000020 +#define RCX_PKT_COMM_CHANNEL_TOKEN 0x00000020 + +/* Flags for the packet extension field */ +/* Sequence numbering */ +#define RCX_PACKET_SEQ_NR_MASK 0x0000003f /*!< Packet sequence number mask */ +#define RCX_PACKET_SEQ_MASK 0x000000c0 /*!< Mask for the sequence bits */ +#define RCX_PACKET_SEQ_NONE 0x00000000 /*!< No packet sequence */ +#define RCX_PACKET_SEQ_FIRST 0x00000080 /*!< First packet of a sequence */ +#define RCX_PACKET_SEQ_MIDDLE 0x000000c0 /*!< Packet in a sequence */ +#define RCX_PACKET_SEQ_LAST 0x00000040 /*!< Last packet of a sequence */ + +/* Flag bits */ +#define RCX_PACKET_RETRY 0x00000200 /*!< Packet will be resent based on retry mechanism defined by e.g. stacks */ + +/* Default NO_ERROR packet state */ +#define RCX_S_OK 0 + +/* Global packet state errors */ +#define RCX_E_FAIL 0xC0000001 +#define RCX_E_UNEXPECTED 0xC0000002 +#define RCX_E_OUTOFMEMORY 0xC0000003 +#define RCX_E_UNKNOWN_COMMAND 0xC0000004 +#define RCX_E_UNKNOWN_DESTINATION 0xC0000005 +#define RCX_E_UNKNOWN_DESTINATION_ID 0xC0000006 +#define RCX_E_INVALID_PACKET_LEN 0xC0000007 +#define RCX_E_INVALID_EXTENSION 0xC0000008 +#define RCX_E_INVALID_PARAMETER 0xC0000009 +#define RCX_E_INVALID_ALIGNMENT 0xC000000A +#define RCX_E_WATCHDOG_TIMEOUT 0xC000000C +#define RCX_E_INVALID_LIST_TYPE 0xC000000D +#define RCX_E_UNKNOWN_HANDLE 0xC000000E +#define RCX_E_PACKET_OUT_OF_SEQ 0xC000000F +#define RCX_E_PACKET_OUT_OF_MEMORY 0xC0000010 +#define RCX_E_QUE_PACKETDONE 0xC0000011 +#define RCX_E_QUE_SENDPACKET 0xC0000012 +#define RCX_E_POOL_PACKET_GET 0xC0000013 +#define RCX_E_POOL_GET_LOAD 0xC0000015 +#define RCX_E_REQUEST_RUNNING 0xC000001A + +/* Global state errors */ +#define RCX_E_INIT_FAULT 0xC0000100 +#define RCX_E_DATABASE_ACCESS_FAILED 0xC0000101 +#define RCX_E_NOT_CONFIGURED 0xC0000119 +#define RCX_E_CONFIGURATION_FAULT 0xC0000120 +#define RCX_E_INCONSISTENT_DATA_SET 0xC0000121 +#define RCX_E_DATA_SET_MISMATCH 0xC0000122 +#define RCX_E_INSUFFICIENT_LICENSE 0xC0000123 +#define RCX_E_PARAMETER_ERROR 0xC0000124 +#define RCX_E_INVALID_NETWORK_ADDRESS 0xC0000125 +#define RCX_E_NO_SECURITY_MEMORY 0xC0000126 +#define RCX_E_NETWORK_FAULT 0xC0000140 +#define RCX_E_CONNECTION_CLOSED 0xC0000141 +#define RCX_E_CONNECTION_TIMEOUT 0xC0000142 +#define RCX_E_LONELY_NETWORK 0xC0000143 +#define RCX_E_DUPLICATE_NODE 0xC0000144 +#define RCX_E_CABLE_DISCONNECT 0xC0000145 +#define RCX_E_BUS_OFF 0xC0000180 +#define RCX_E_CONFIG_LOCKED 0xC0000181 +#define RCX_E_APPLICATION_NOT_READY 0xC0000182 + +#define RCX_E_TIMER_APPL_PACKET_SENT 0xC002000C + +/* MidSys packet state Error Codes */ +#define RCX_E_QUE_UNKNOWN 0xC02B0001 +#define RCX_E_QUE_INDEX_UNKNOWN 0xC02B0002 +#define RCX_E_TASK_UNKNOWN 0xC02B0003 +#define RCX_E_TASK_INDEX_UNKNOWN 0xC02B0004 +#define RCX_E_TASK_HANDLE_INVALID 0xC02B0005 +#define RCX_E_TASK_INFO_IDX_UNKNOWN 0xC02B0006 +#define RCX_E_FILE_XFR_TYPE_INVALID 0xC02B0007 +#define RCX_E_FILE_REQUEST_INCORRECT 0xC02B0008 +#define RCX_E_UNKNOWN_PORT_INDEX 0xC02B0009 +#define RCX_E_ROUTER_TABLE_FULL 0xC02B000A +#define RCX_E_NO_SUCH_ROUTER_IN_TABLE 0xC02B000B +#define RCX_E_INSTANCE_NOT_NULL 0xC02B000C +#define RCX_E_COMMAND_INVALID 0xC02B000D +#define RCX_E_TASK_INVALID 0xC02B000E +#define RCX_E_TASK_NOT_A_USER_TASK 0xC02B000F +#define RCX_E_INVALID_FIRMWARE_SIZE 0xC02B001B +#define RCX_E_SEC_FAILED 0xC02B001D +#define RCX_E_SEC_DISABLED 0xC02B001E +#define RCX_E_BLOCK_SIZE_OUT_OF_RANGE 0xC02B0020 +#define RCX_E_INVALID_CHANNEL 0xC02B0021 +#define RCX_E_INVALID_FILE_LENGTH 0xC02B0022 +#define RCX_E_INVALID_CHARACTER 0xC02B0023 +#define RCX_E_PACKET_OUT_OF_SEQUNCE 0xC02B0024 +#define RCX_E_NOT_POSSIBLE_IN_CURRENT_STATE 0xC02B0025 +#define RCX_E_SECURTY_EEPROM_INVALID_ZONE 0xC02B0026 +#define RCX_E_SECURTY_EEPROM_NOT_ALLOWED 0xC02B0027 +#define RCX_E_SECURTY_EEPROM_NOT_AVAILABLE 0xC02B0028 +#define RCX_E_SECURTY_EEPROM_INVALID_CHECKSUM 0xC02B0029 +#define RCX_E_SECURTY_EEPROM_ZONE_NOT_WRITEABLE 0xC02B002A +#define RCX_E_SECURTY_EEPROM_READ_FAILED 0xC02B002B +#define RCX_E_SECURTY_EEPROM_WRITE_FAILED 0xC02B002C +#define RCX_E_SECURTY_EEPROM_ZONE_ACCESS_DENIDED 0xC02B002D +#define RCX_E_SECURTY_EEPROM_EMULATED 0xC02B002E +#define RCX_E_FILE_NAME_INVALID 0xC02B002F +#define RCX_E_FILE_SEQUENCE_ERROR 0xC02B0030 +#define RCX_E_FILE_SEQUENCE_END_ERROR 0xC02B0031 +#define RCX_E_FILE_SEQUENCE_BEGIN_ERROR 0xC02B0032 +#define RCX_E_FILE_UNEXPECTED_BLOCK_SIZE 0xC02B0033 +#define RCX_E_HIL_FILE_HEADER_CRC_ERROR 0xC02B0034 +#define RCX_E_HIL_FILE_HEADER_MODULE_SIZE_DIFFERS 0xC02B0035 +#define RCX_E_HIL_FILE_HEADER_MD5_CHECKSUM_ERROR 0xC02B0036 +#define RCX_E_PACKET_WOULD_BE_TO_LONG_FOR_MTU 0xC02B0037 +#define RCX_E_INVALID_BLOCK 0xC02B0038 +#define RCX_E_INVALID_STRUCT_NUMBER 0xC02B0039 + +/*****************************************************************************/ +/*! Default RCX packet header structure */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct RCX_PACKET_HEADERtag +{ + uint32_t ulDest; /*!< 00:04, Destination of packet, process queue */ + uint32_t ulSrc; /*!< 04:04, Source of packet, process queue */ + uint32_t ulDestId; /*!< 08:04, Destination reference of packet*/ + uint32_t ulSrcId; /*!< 12:04, Source reference of packet */ + uint32_t ulLen; /*!< 16:04, Length of packet data without header */ + uint32_t ulId; /*!< 20:04, Identification handle of sender */ + uint32_t ulState; /*!< 24:04, Status code of operation */ + uint32_t ulCmd; /*!< 28:04, Packet command */ + uint32_t ulExt; /*!< 32:04, Extension */ + uint32_t ulRout; /*!< 36:04, Router (internal use only) */ +} __RCX_PACKED_POST RCX_PACKET_HEADER; + +/*****************************************************************************/ +/*! Default RCX packet structure, including user data */ +/*****************************************************************************/ +typedef __RCX_PACKED_PRE struct RCX_PACKETtag +{ + RCX_PACKET_HEADER tHeader; /*!< Packet header */ + uint8_t abData[RCX_MAX_DATA_SIZE]; /*!< Packet data */ +} __RCX_PACKED_POST RCX_PACKET; + +/*****************************************************************************/ +/*! Firmware Identification */ +/*****************************************************************************/ + +typedef __RCX_PACKED_PRE struct tagNETX_FW_VERSION +{ + uint16_t usMajor; + uint16_t usMinor; + uint16_t usBuild; + uint16_t usRevision; +} __RCX_PACKED_POST NETX_FW_VERSION; + +typedef __RCX_PACKED_PRE struct tagNETX_FW_NAME +{ + uint8_t bNameLength; + uint8_t abName[ 63 ]; +} __RCX_PACKED_POST NETX_FW_NAME; + +typedef __RCX_PACKED_PRE struct tagNETX_FW_DATE +{ + uint16_t usYear; + uint8_t bMonth; + uint8_t bDay; +} __RCX_PACKED_POST NETX_FW_DATE; + +typedef __RCX_PACKED_PRE struct tagNETX_FW_IDENTIFICATION +{ + NETX_FW_VERSION tFwVersion; /* !< firmware version */ + NETX_FW_NAME tFwName; /* !< firmware name */ + NETX_FW_DATE tFwDate; /* !< firmware date */ +} __RCX_PACKED_POST NETX_FW_IDENTIFICATION; + +/*****************************************************************************/ +/*! Hardware name */ +/*****************************************************************************/ + +typedef __RCX_PACKED_PRE struct tagNETX_HW_NAME +{ + uint8_t bNameLength; + uint8_t abName[ 63 ]; +} __RCX_PACKED_POST NETX_HW_NAME; + + +/*---------------------------------------------------------------------------*/ +/* Compiler settings */ +#ifdef _MSC_VER + #if _MSC_VER >= 1000 + #pragma pack() /* Always allign structures to compiler settings */ + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ +/*---------------------------------------------------------------------------*/ + +#undef __RCX_PACKED_PRE +#undef __RCX_PACKED_POST + +#endif /* __RCX_USER_H */ diff --git a/examples/tcpserver/Marshaller/CifXTransport.c b/examples/tcpserver/Marshaller/CifXTransport.c new file mode 100644 index 0000000..7c2b759 --- /dev/null +++ b/examples/tcpserver/Marshaller/CifXTransport.c @@ -0,0 +1,1852 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Workfile: CifXTransport.c $ + Last Modification: + $Author: AMinor $ + $Modtime: $ + $Revision: 13819 $ + + Targets: + Win32/ANSI : yes + Win32/Unicode: yes (define _UNICODE) + WinCE : yes + + Description: + Implementation of Marshaller function call interpretation + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 13 12.11.2020 RMA Changing general functions to OS_* implementation + 12 12.12.2019 LCO Restructure handling for devices without Communication Channels + in cifXTransportInit() + 11 05.11.2019 ALM Remove TLR references + 10 21.04.2019 ALM Added support for xSysdeviceRebootEx() + 9 21.07.2015 LCO Fixed compiler warnings created by implicit data conversion + on 64Bit systems + 8 16.07.2015 RM Change: + - Adapted to new APIHeader directory and MarshallerFrame.h + 7 30.06.2014 SS Access to closed channel instance may cause system crash + 6 26.09.2013 SS Added support for xDriverRestartDevice call + 5 28.06.2010 SD Change: + - new types for 64-bit support + 4 19.08.2009 MS Corrected destination addresses in confirmation data copy operations for + - xChannelFindFirstFile / xChannelFindNextFile + - xSysdeviceFindFirstFile / xSysdeviceFindNextFile + 3 18.08.2009 MS Initialize data buffer tChannelInfo before calling xDriverEnumChannels(). + 2 08.07.2009 MT Added functions: + - xChannelIOInfo + - xChannelFindFirstFile / xChannelFindNextFile + - xSysdeviceFindFirstFile / xSysdeviceFindNextFile + 1 26.05.2009 PL intitial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file CifXTransport.c +* cifX marshalling via Hilscher Transport Protocol */ +/*****************************************************************************/ + +#include "OS_Dependent.h" +#include "CifXTransport.h" +#include "MarshallerFrame.h" +#include "MarshallerInternal.h" +#include "cifXUser.h" +#include "cifXErrors.h" + +#ifndef min + #define min(a,b) ((a > b) ? b : a) +#endif + + +#define HANDLE_IS_VALID(a) (0 != (a & MSK_MARSHALLER_HANDLE_VALID)) +#define HANDLE_GET_OBJSUBIDX(a) ((a & MSK_MARSHALLER_HANDLE_OBJECTSUBIDX) >> SRT_MARSHALLER_HANDLE_OBJECTSUBIDX) +#define HANDLE_GET_OBJIDX(a) ((a & MSK_MARSHALLER_HANDLE_OBJECTIDX) >> SRT_MARSHALLER_HANDLE_OBJECTIDX) +#define HANDLE_GET_OBJTYPE(a) ((a & MSK_MARSHALLER_HANDLE_OBJECTTYPE) >> SRT_MARSHALLER_HANDLE_OBJECTTYPE) +#define SEQ_GET_REQUEST(a) ((a & MSK_MARSHALLER_SEQUENCE_REQUEST) >> SRT_MARSHALLER_SEQUENCE_REQUEST) +#define SEQ_GET_SUPPORTED(a) ((a & MSK_MARSHALLER_SEQUENCE_SUPPORTED) >> SRT_MARSHALLER_SEQUENCE_SUPPORTED) +#define SEQ_GET_NUMBER(a) ((a & MSK_MARSHALLER_SEQUENCE_NUMBER) >> SRT_MARSHALLER_SEQUENCE_NUMBER) + +#define HANDLE_SET_VALID(a) (a |= ((uint32_t)1 << SRT_MARSHALLER_HANDLE_VALID)) +#define HANDLE_SET_OBJSUBIDX(a,b) (a |= ((uint32_t)b << SRT_MARSHALLER_HANDLE_OBJECTSUBIDX)) +#define HANDLE_SET_OBJIDX(a,b) (a |= ((uint32_t)b << SRT_MARSHALLER_HANDLE_OBJECTIDX)) +#define HANDLE_SET_OBJTYPE(a,b) (a |= ((uint32_t)b << SRT_MARSHALLER_HANDLE_OBJECTTYPE)) +#define SEQ_SET_REQUEST(a) (a |= ((uint32_t)1 << SRT_MARSHALLER_SEQUENCE_REQUEST)) +#define SEQ_SET_SUPPORTED(a) (a |= ((uint32_t)1 << SRT_MARSHALLER_SEQUENCE_SUPPORTED)) +#define SEQ_SET_RESPONSE(a) (a &= ~((uint32_t)1 << SRT_MARSHALLER_SEQUENCE_REQUEST)) + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_CIFX +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Data for a channel object */ +/*****************************************************************************/ +typedef struct MARSH_CIFX_CHANNEL_DATA_Ttag +{ + CIFXHANDLE hChannel; /*!< Handle returned from xChannelOpen */ + unsigned long ulOpenCnt; /*!< Number of times xChannelOpen was called */ + int fValid; + +} MARSH_CIFX_CHANNEL_DATA_T, *PMARSH_CIFX_CHANNEL_DATA_T; + +/*****************************************************************************/ +/*! Data for a board/device object */ +/*****************************************************************************/ +typedef struct MARSH_CIFX_DEVICE_DATA_Ttag +{ + int fValid; /*!< !=0 if the device is valid */ + unsigned long ulBoard; /*!< Board number (Idx in our array) */ + BOARD_INFORMATION tBoardInfo; /*!< cifX Board information */ + MARSH_CIFX_CHANNEL_DATA_T tSysDevice; /*!< System device object */ + PMARSH_CIFX_CHANNEL_DATA_T ptChannels; /*!< Array of channel objects */ + unsigned long ulChannelCount; /*!< Number of entries in channel objects array */ +} MARSH_CIFX_DEVICE_DATA_T, *PMARSH_CIFX_DEVICE_DATA_T; + + +/*****************************************************************************/ +/*! Structure to handle more than one instance of marshaller */ +/*****************************************************************************/ +typedef struct MARSH_HANDLE_INSTANCE_Ttag +{ + unsigned long ulDriverOpenCnt; /*!< Number of times the driver was opened via Marshaller Calls */ + unsigned long ulDeviceCnt; /*!< Number of known devices/board, initialized in MarshallerInit */ + CIFXHANDLE hDriver; /*!< Driver handle */ + DRIVER_FUNCTIONS tDRVFunctions; /*! Function list of CifX API */ + PMARSH_CIFX_DEVICE_DATA_T ptDevices; /*!< List of available devices, initialized in MarshallerInit */ + +} MARSH_HANDLE_INSTANCE_T, *PMARSH_HANDLE_INSTANCE_T; + +static int32_t HandleClassfactoryCommand(HIL_MARSHALLER_BUFFER_T* ptBuffer); +static int32_t HandleDriverCommand (HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); +static int32_t HandleSysdeviceCommand (HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); +static int32_t HandleChannelCommand (HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); + +static PMARSH_CIFX_DEVICE_DATA_T FindDevice(char* szBoard, void* pvUser); + +static void HilMarshallerDeInitModul(void* pvUser); +static void HilMarshallerHandlePacket(void* pvMarshaller, HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); + +/*****************************************************************************/ +/*! Initialize cifX API transport layer +* \param pvMarshaller Marshaller handle +* \param pvConfig cifX API specific configuration data +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t cifXTransportInit(void* pvMarshaller, void* pvConfig) +{ + uint32_t eRet = HIL_MARSHALLER_E_SUCCESS; + PMARSH_HANDLE_INSTANCE_T ptInstance; + + /* Invalid parameter*/ + if( (!pvMarshaller) || (!pvConfig)) + return HIL_MARSHALLER_E_INVALIDPARAMETER; + + if(NULL == (ptInstance = OS_Malloc(sizeof(MARSH_HANDLE_INSTANCE_T)))) + { + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + } else + { + TRANSPORT_LAYER_DATA_T tLayerData = {0}; + CIFX_TRANSPORT_CONFIG* ptConfig = (CIFX_TRANSPORT_CONFIG*)pvConfig; + DRIVER_INFORMATION tDriverInfo; + + OS_Memset(ptInstance, 0, sizeof(*ptInstance)); + + tLayerData.usDataType = HIL_TRANSPORT_TYPE_MARSHALLER; + tLayerData.pfnHandler = HilMarshallerHandlePacket; + tLayerData.pfnDeinit = HilMarshallerDeInitModul; + tLayerData.pvUser = ptInstance; + tLayerData.pfnPoll = NULL; + + ptInstance->tDRVFunctions = ptConfig->tDRVFunctions; + + if( (CIFX_NO_ERROR == ptInstance->tDRVFunctions.pfnxDriverOpen(&ptInstance->hDriver)) && + (CIFX_NO_ERROR == ptInstance->tDRVFunctions.pfnxDriverGetInformation(ptInstance->hDriver, sizeof(tDriverInfo), &tDriverInfo)) ) + { + if(0 != tDriverInfo.ulBoardCnt) + { + if(0 != (ptInstance->ptDevices = OS_Malloc((uint32_t)sizeof(*ptInstance->ptDevices) * tDriverInfo.ulBoardCnt))) + { + uint32_t ulBoard; + PMARSH_CIFX_DEVICE_DATA_T ptDevice = ptInstance->ptDevices; + + OS_Memset(ptInstance->ptDevices, 0, sizeof(*ptInstance->ptDevices) * tDriverInfo.ulBoardCnt); + ptInstance->ulDeviceCnt = tDriverInfo.ulBoardCnt; + + for(ulBoard = 0; ulBoard < tDriverInfo.ulBoardCnt; ulBoard++) + { + if(CIFX_NO_ERROR == ptInstance->tDRVFunctions.pfnxDriverEnumBoards(ptInstance->hDriver, ulBoard, sizeof(ptDevice->tBoardInfo), &ptDevice->tBoardInfo)) + { + ptDevice->ulChannelCount = ptDevice->tBoardInfo.ulChannelCnt; + + if (0 == ptDevice->ulChannelCount) + { + /* Device has only system channel */ + ptDevice->ulBoard = ulBoard; + ptDevice->fValid = 1; + } + else + { + /* Setup internals for device with Communication Channel(s) */ + uint32_t ulChannel = 0; + PMARSH_CIFX_CHANNEL_DATA_T ptChannelData; + + ptDevice->ptChannels = OS_Malloc((uint32_t)(sizeof(*ptDevice->ptChannels) * ptDevice->ulChannelCount)); + + /* Check returned pointer */ + if(NULL == ptDevice->ptChannels) + { + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + break; + } + + /* Memory available, continue with internal device setup */ + OS_Memset(ptDevice->ptChannels, 0, sizeof(*ptDevice->ptChannels) * ptDevice->ulChannelCount); + + ptDevice->ulBoard = ulBoard; + ptDevice->fValid = 1; + + ptChannelData = ptDevice->ptChannels; + + for(ulChannel = 0; ulChannel < ptDevice->ulChannelCount; ulChannel++) + { + CHANNEL_INFORMATION tChannelInfo; + if(CIFX_NO_ERROR == (ptInstance->tDRVFunctions.pfnxDriverEnumChannels(ptInstance->hDriver, ulBoard, ulChannel, sizeof(tChannelInfo), &tChannelInfo))) + { + ptChannelData->fValid = 1; + } + ptChannelData++; + } + } + } + ptDevice++; + } + } + } + + eRet = HilMarshallerRegisterTransport(pvMarshaller, &tLayerData); + + } else + { + eRet = (uint32_t)CIFX_DRV_DRIVER_NOT_LOADED; + } + + if(HIL_MARSHALLER_E_SUCCESS != eRet) + { + HilMarshallerDeInitModul(ptInstance); + } + } + + return eRet; +} + + +/*****************************************************************************/ +/*! De-Initialize Marshaller +* \param pvUser Transport data */ +/*****************************************************************************/ +void HilMarshallerDeInitModul( void* pvUser ) +{ + PMARSH_HANDLE_INSTANCE_T ptInstance = (PMARSH_HANDLE_INSTANCE_T) pvUser; + uint32_t ulDevice; + + if(NULL != ptInstance) + { + /* Check, that all structures are cleaned */ + for(ulDevice = 0; ulDevice < ptInstance->ulDeviceCnt; ++ulDevice) + { + PMARSH_CIFX_DEVICE_DATA_T ptDevice = &ptInstance->ptDevices[ulDevice]; + uint32_t ulChannel; + + for(ulChannel = 0; ulChannel < ptDevice->ulChannelCount; ++ulChannel) + { + PMARSH_CIFX_CHANNEL_DATA_T ptChannel = (PMARSH_CIFX_CHANNEL_DATA_T)&ptDevice->ptChannels[ulChannel]; + + if(ptChannel->hChannel) + ptInstance->tDRVFunctions.pfnxChannelClose(ptChannel->hChannel); + } + + if(NULL != ptDevice->ptChannels) + OS_Free(ptDevice->ptChannels); + } + + if(NULL != ptInstance->ptDevices) + OS_Free(ptInstance->ptDevices); + + if(ptInstance->hDriver) + { + ptInstance->tDRVFunctions.pfnxDriverClose(ptInstance->hDriver); + ptInstance->hDriver = 0; + } + /* Clean structure for the instance */ + OS_Free(ptInstance); + } +} + +/*****************************************************************************/ +/*! Handle incoming packets +* \param pvMarshaller Marshaller instance this packet was received from +* \param ptBuffer Pointer receive buffer (also used for response packet) +* \param pvUser Pointer to cifX Internal instance data +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +void HilMarshallerHandlePacket( void* pvMarshaller, HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser ) +{ + PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader = (PMARSHALLER_DATA_FRAME_HEADER_T) &ptBuffer->abData[0]; + int32_t lRet; + + /* Check ClassFactory */ + if( (ptMarshallerHeader->ulHandle == 0) || + ((HANDLE_GET_OBJTYPE(ptMarshallerHeader->ulHandle) == MARSHALLER_OBJECT_TYPE_CLASSFACTORY) + && (HANDLE_IS_VALID(ptMarshallerHeader->ulHandle)))) + { + /* This is a request for the Classfactory */ + lRet = HandleClassfactoryCommand(ptBuffer); + + }else if(!HANDLE_IS_VALID(ptMarshallerHeader->ulHandle)) + { + /* This is not a valid handle, so reject */ + lRet = CIFX_INVALID_HANDLE; + ptMarshallerHeader->ulDataSize = 0; + + }else + { + /* Check object type */ + switch(HANDLE_GET_OBJTYPE(ptMarshallerHeader->ulHandle)) + { + case MARSHALLER_OBJECT_TYPE_DRIVER: + lRet = HandleDriverCommand(ptBuffer, pvUser); + break; + + case MARSHALLER_OBJECT_TYPE_SYSDEVICE: + lRet = HandleSysdeviceCommand(ptBuffer, pvUser); + break; + + case MARSHALLER_OBJECT_TYPE_CHANNEL: + lRet = HandleChannelCommand(ptBuffer, pvUser); + break; + + default: + /* Unsupported Object Type */ + lRet = CIFX_INVALID_HANDLE; + ptMarshallerHeader->ulDataSize = 0; + break; + } + } + + /* Enter marshaller return code into answer */ + ptBuffer->tMgmt.ulUsedDataBufferLen = ptMarshallerHeader->ulDataSize + (uint32_t)sizeof(*ptMarshallerHeader); + ptMarshallerHeader->ulError = lRet; + SEQ_SET_RESPONSE(ptMarshallerHeader->ulSequence); + ptMarshallerHeader->ulSequence = 0; + + /* Call send function, to send a answer */ + HilMarshallerConnTxData(pvMarshaller, ptBuffer->tMgmt.ulConnectorIdx , ptBuffer); +} + +/*****************************************************************************/ +/*! Handle packets which includes a class factory command +* \param ptBuffer Reference to the give marshaller packet + Note: The given reference is also used to save the confirmation +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t HandleClassfactoryCommand ( HIL_MARSHALLER_BUFFER_T* ptBuffer) +{ + int32_t lRet; + PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader = (PMARSHALLER_DATA_FRAME_HEADER_T) &ptBuffer->abData[0]; + + switch(ptMarshallerHeader->ulMethodID) + { + case MARSHALLER_CF_METHODID_SERVERVERSION: + { + PCF_SERVERVERSION_CNF_T ptServerVersionCnf = (PCF_SERVERVERSION_CNF_T)ptMarshallerHeader; + + /* Check Size of buffer */ + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= sizeof(ptServerVersionCnf->tData)) + { + /* ATTENTION: Version must be set to 0.900 to allow the actual TCP/IP Driver to work. + This version number may change in future*/ + ptServerVersionCnf->tData.ulVersion = 0x00090000; + ptServerVersionCnf->tHeader.ulDataSize = sizeof(CF_SERVERVERSION_CNF_DATA_T); + lRet = CIFX_NO_ERROR; + }else + { + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + } + } + break; + + case MARSHALLER_CF_METHODID_CREATEINSTANCE: + { + PCF_CREATEINSTANCE_REQ_T ptCreateInstReq = (PCF_CREATEINSTANCE_REQ_T)ptMarshallerHeader; + PCF_CREATEINSTANCE_CNF_T ptCreateInstCnf = (PCF_CREATEINSTANCE_CNF_T)ptMarshallerHeader; + + if(ptMarshallerHeader->ulDataSize != sizeof(ptCreateInstReq->tData)) + { + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + } else + { + switch(ptCreateInstReq->tData.ulObjectType) + { + case MARSHALLER_OBJECT_TYPE_CLASSFACTORY: + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= sizeof(ptCreateInstCnf->tData)) + { + ptCreateInstCnf->tData.ulHandle = 0; + HANDLE_SET_OBJTYPE(ptCreateInstCnf->tData.ulHandle, MARSHALLER_OBJECT_TYPE_CLASSFACTORY); + HANDLE_SET_VALID(ptCreateInstCnf->tData.ulHandle); + ptCreateInstCnf->tHeader.ulDataSize = sizeof(ptCreateInstCnf->tData); + lRet = CIFX_NO_ERROR; + }else + { + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + } + break; + + case MARSHALLER_OBJECT_TYPE_DRIVER: + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= sizeof(ptCreateInstCnf->tData)) + { + ptCreateInstCnf->tData.ulHandle = 0; + HANDLE_SET_OBJTYPE(ptCreateInstCnf->tData.ulHandle, MARSHALLER_OBJECT_TYPE_DRIVER); + HANDLE_SET_VALID(ptCreateInstCnf->tData.ulHandle); + ptCreateInstCnf->tHeader.ulDataSize = sizeof(ptCreateInstCnf->tData); + lRet = CIFX_NO_ERROR; + } else + { + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + } + break; + + default: + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + break; + } + } + } + break; + + default: + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Handle packets which includes a driver command +* \param ptBuffer Reference to the received packet +* Note: The given memory of the packet is also +* used to save the confimation +* \param pvUser Pointer to cifX Internal instance data +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t HandleDriverCommand ( HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser) +{ + int32_t lRet; + PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader = (PMARSHALLER_DATA_FRAME_HEADER_T) &ptBuffer->abData[0]; + PMARSH_HANDLE_INSTANCE_T ptInstance = (PMARSH_HANDLE_INSTANCE_T) pvUser; + + switch(ptMarshallerHeader->ulMethodID) + { + /*************************************************************************** + * xDriverOpen + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_OPEN: + { + ptMarshallerHeader->ulDataSize = 0; + if(NULL != ptInstance->hDriver) + { + ++ptInstance->ulDriverOpenCnt; + lRet = CIFX_NO_ERROR; + } else + { + lRet = CIFX_DRV_DRIVER_NOT_LOADED; + } + } + break; + + /*************************************************************************** + * xDriverClose + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_CLOSE: + ptMarshallerHeader->ulDataSize = 0; + + if(0 == ptInstance->ulDriverOpenCnt) + { + lRet = CIFX_DRV_NOT_OPENED; + } else + { + --ptInstance->ulDriverOpenCnt; + lRet = CIFX_NO_ERROR; + } + break; + + /*************************************************************************** + * xDriverGetInformation + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_GETINFO: + { + PDRV_GETINFORMATION_REQ_T ptReq = (PDRV_GETINFORMATION_REQ_T)(ptMarshallerHeader); + DRIVER_INFORMATION tDriverInfo; + + if(!ptInstance->tDRVFunctions.pfnxDriverGetInformation) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + lRet = ptInstance->tDRVFunctions.pfnxDriverGetInformation(ptInstance->hDriver, sizeof(tDriverInfo), &tDriverInfo); + if(CIFX_NO_ERROR == lRet) + { + uint32_t ulCopyLen = min(sizeof(tDriverInfo), ptReq->tData.ulSize); + + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= ulCopyLen ) + { + OS_Memset(&ptReq->tData, 0, sizeof(tDriverInfo)); + OS_Memcpy(&ptReq->tData, &tDriverInfo, ulCopyLen); + ptReq->tHeader.ulDataSize = ulCopyLen; + }else + { + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + } + } + } + } + break; + + /*************************************************************************** + * xDriverGetErrorDescription + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_ERRORDESCR: + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + break; + + /*************************************************************************** + * xDriverEnumBoards + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_ENUMBOARDS: + { + PDRV_ENUMBOARD_REQ_T ptEnumReq = (PDRV_ENUMBOARD_REQ_T)(ptMarshallerHeader); + uint32_t ulDataSize = ptMarshallerHeader->ulDataSize; + + ptMarshallerHeader->ulDataSize = 0; + + if(ulDataSize != sizeof(ptEnumReq->tData)) + { + lRet = CIFX_INVALID_PARAMETER; + + } else if(!ptInstance->tDRVFunctions.pfnxDriverEnumBoards) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else + { + BOARD_INFORMATION tBoardInfo = {0}; + + lRet = ptInstance->tDRVFunctions.pfnxDriverEnumBoards(ptInstance->hDriver, ptEnumReq->tData.ulBoard, sizeof(tBoardInfo), &tBoardInfo); + + if(lRet == CIFX_NO_ERROR) + { + uint32_t ulCopyLen = min(ptEnumReq->tData.ulSize, sizeof(tBoardInfo)); + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= ulCopyLen ) + { + OS_Memset(&ptEnumReq->tData, 0, sizeof(tBoardInfo)); + OS_Memcpy(&ptEnumReq->tData, &tBoardInfo, ulCopyLen); + ptEnumReq->tHeader.ulDataSize = ulCopyLen; + + }else + { + lRet = CIFX_BUFFER_TOO_SHORT; + } + } + } + } + break; + + /*************************************************************************** + * xDriverEnumChannels + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_ENUMCHANNELS: + { + PDRV_ENUMCHANNELS_REQ_T ptEnumReq = (PDRV_ENUMCHANNELS_REQ_T)(ptMarshallerHeader); + uint32_t ulDataSize = ptMarshallerHeader->ulDataSize; + + ptMarshallerHeader->ulDataSize = 0; + + if(ulDataSize != sizeof(ptEnumReq->tData)) + { + lRet = CIFX_INVALID_PARAMETER; + } else if(!ptInstance->tDRVFunctions.pfnxDriverEnumChannels) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + CHANNEL_INFORMATION tChannelInfo; + + OS_Memset(&tChannelInfo, 0, sizeof(tChannelInfo)); + lRet = ptInstance->tDRVFunctions.pfnxDriverEnumChannels(ptInstance->hDriver, + ptEnumReq->tData.ulBoard, + ptEnumReq->tData.ulChannel, + sizeof(tChannelInfo), + &tChannelInfo); + + if(lRet == CIFX_NO_ERROR) + { + uint32_t ulCopyLen = min(ptEnumReq->tData.ulSize, sizeof(tChannelInfo)); + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= ulCopyLen ) + { + OS_Memcpy(&ptEnumReq->tData, &tChannelInfo, ulCopyLen); + ptEnumReq->tHeader.ulDataSize = ulCopyLen; + }else + { + lRet = CIFX_BUFFER_TOO_SHORT; + } + } + } + } + break; + + /*************************************************************************** + * xChannelOpen + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_OPENCHANNEL: + { + uint32_t ulBoardNameLen; + char szBoardName[CIFx_MAX_INFO_NAME_LENTH] ={0}; + uint32_t ulChannelNr; + uint8_t* pbRequestData = (uint8_t*)(ptMarshallerHeader + 1); + PMARSH_CIFX_DEVICE_DATA_T ptDevice; + + /* Open Channel gets + 1. length of the boardname + 2. Boardname + 3. Channel Number */ + OS_Memcpy(&ulBoardNameLen, + pbRequestData, + sizeof(ulBoardNameLen)); + + OS_Memcpy(szBoardName, + &pbRequestData[4], + ulBoardNameLen); + + OS_Memcpy(&ulChannelNr, + &pbRequestData[4 + ulBoardNameLen], + sizeof(ulChannelNr)); + + /* Search a board with this name */ + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelOpen) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else if(0 == (ptDevice = FindDevice(szBoardName, pvUser))) + { + lRet = CIFX_INVALID_BOARD; + } else if(ulChannelNr >= ptDevice->ulChannelCount) + { + lRet = CIFX_INVALID_CHANNEL; + } else + { + PMARSH_CIFX_CHANNEL_DATA_T ptChannel = (PMARSH_CIFX_CHANNEL_DATA_T)&ptDevice->ptChannels[ulChannelNr]; + + if(ptChannel->ulOpenCnt > 0) + { + /* Increment Reference Count */ + ++ptChannel->ulOpenCnt; + lRet = CIFX_NO_ERROR; + } else + { + /* Device not yet open, so open it now */ + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxChannelOpen(ptInstance->hDriver, szBoardName, ulChannelNr, &ptChannel->hChannel))) + { + ++ptChannel->ulOpenCnt; + } + } + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= sizeof(uint32_t)) + { + /* Device was opened successfully, so return valid handle */ + if(CIFX_NO_ERROR == lRet) + { + uint32_t* ptHandle = (uint32_t*)pbRequestData; + + *ptHandle = 0; + HANDLE_SET_OBJTYPE(*ptHandle, MARSHALLER_OBJECT_TYPE_CHANNEL); + HANDLE_SET_OBJIDX(*ptHandle, ptDevice->ulBoard); + HANDLE_SET_OBJSUBIDX(*ptHandle, ulChannelNr); + HANDLE_SET_VALID(*ptHandle); + + ptMarshallerHeader->ulDataSize = sizeof(*ptHandle); + } + }else + { + lRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + } + } + } + break; + + /*************************************************************************** + * xSysdeviceOpen + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_OPENSYSDEV: + /* Open System Device gets + 1. length of the boardname + 2. Boardname */ + { + uint32_t ulBoardNameLen; + char szBoardName[CIFx_MAX_INFO_NAME_LENTH] ={0}; + uint8_t* pbRequestData = (uint8_t*)(ptMarshallerHeader + 1); + PMARSH_CIFX_DEVICE_DATA_T ptDevice; + + /* Open Channel gets + 1. length of the boardname + 2. Boardname + 3. Channel Number */ + OS_Memcpy(&ulBoardNameLen, + pbRequestData, + sizeof(ulBoardNameLen)); + + OS_Memcpy(szBoardName, + &pbRequestData[4], + ulBoardNameLen); + + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceOpen) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + /* Search a board with this name */ + } else if(0 == (ptDevice = FindDevice(szBoardName, pvUser))) + { + lRet = CIFX_INVALID_BOARD; + } else + { + PMARSH_CIFX_CHANNEL_DATA_T ptChannel = &ptDevice->tSysDevice; + + if(ptChannel->ulOpenCnt > 0) + { + /* Increment Reference Count */ + ++ptChannel->ulOpenCnt; + lRet = CIFX_NO_ERROR; + } else + { + /* Device not yet open, so open it now */ + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxSysdeviceOpen(ptInstance->hDriver, szBoardName, &ptChannel->hChannel))) + { + ++ptChannel->ulOpenCnt; + } + } + if( (ptBuffer->tMgmt.ulDataBufferLen - sizeof(MARSHALLER_DATA_FRAME_HEADER_T)) >= sizeof(uint32_t)) + { + /* Device was opened successfully, so return valid handle */ + if(CIFX_NO_ERROR == lRet) + { + uint32_t* ptHandle = (uint32_t*)(ptMarshallerHeader + 1); + + *ptHandle = 0; + HANDLE_SET_OBJTYPE(*ptHandle, MARSHALLER_OBJECT_TYPE_SYSDEVICE); + HANDLE_SET_OBJIDX(*ptHandle, ptDevice->ulBoard); + HANDLE_SET_OBJSUBIDX(*ptHandle, MARSHALLER_SUBIDX_SYSTEMCHANNEL); + HANDLE_SET_VALID(*ptHandle); + + ptMarshallerHeader->ulDataSize = sizeof(*ptHandle); + } + }else + { + lRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + } + } + } + break; + + /*************************************************************************** + * xDriverRestartDevice + ***************************************************************************/ + case MARSHALLER_DRV_METHODID_RESTARTDEVICE: + { + PDRV_RESTARTDEVICE_REQ_T ptEnumReq = (PDRV_RESTARTDEVICE_REQ_T)(ptMarshallerHeader); + uint32_t ulDataSize = ptMarshallerHeader->ulDataSize; + + ptMarshallerHeader->ulDataSize = 0; + + if(ulDataSize != sizeof(ptEnumReq->tData)) + { + lRet = CIFX_INVALID_PARAMETER; + + } else if(!ptInstance->tDRVFunctions.pfnxDriverRestartDevice) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else + { + lRet = ptInstance->tDRVFunctions.pfnxDriverRestartDevice(ptInstance->hDriver, ptEnumReq->tData.abBoardName, NULL); + } + } + break; + + default: + /* Unknown/unsupported method ID */ + lRet = CIFX_INVALID_PARAMETER; + ptMarshallerHeader->ulDataSize = 0; + break; + } + +return lRet; +} + +/*****************************************************************************/ +/*! Handle packets which includes a Sysdevice command +* \param ptBuffer Reference to the received packet +* Note: The given memory of the packet is also used to save the confirmation +* \param pvUser Pointer to cifX Internal instance data +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t HandleSysdeviceCommand (HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser) +{ + int32_t lRet; + PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader = (PMARSHALLER_DATA_FRAME_HEADER_T) &ptBuffer->abData[0]; + PMARSH_HANDLE_INSTANCE_T ptInstance = (PMARSH_HANDLE_INSTANCE_T) pvUser; + PMARSH_CIFX_CHANNEL_DATA_T ptChannel; + + if((!ptBuffer) || (!pvUser)) + return HIL_MARSHALLER_E_INVALIDPARAMETER; + + if( (HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle) > ptInstance->ulDeviceCnt) || + (HANDLE_GET_OBJSUBIDX(ptMarshallerHeader->ulHandle) != MARSHALLER_SUBIDX_SYSTEMCHANNEL) ) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_INVALID_HANDLE; + } + + ptChannel = &ptInstance->ptDevices[HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle)].tSysDevice; + + if (ptChannel->ulOpenCnt == 0) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } + + switch(ptMarshallerHeader->ulMethodID) + { + /*************************************************************************** + * xSysdeviceClose + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_CLOSE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceClose) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + } else if(ptChannel->ulOpenCnt > 1) + { + --ptChannel->ulOpenCnt; + lRet = CIFX_NO_ERROR; + + } else + { + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxSysdeviceClose(ptChannel->hChannel))) + { + --ptChannel->ulOpenCnt; + ptChannel->hChannel = 0; + } + } + } + break; + + /*************************************************************************** + * xSysdeviceInfo + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_INFO: + { + if(!ptInstance->tDRVFunctions.pfnxSysdeviceInfo) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + } else + { + PSYSDEV_INFO_REQ_T ptReq = (PSYSDEV_INFO_REQ_T)ptMarshallerHeader; + uint8_t* pbRequest = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulSize = ptReq->tData.ulSize; + + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceInfo( ptChannel->hChannel, + ptReq->tData.ulCmd, + ulSize, + pbRequest); + if( (CIFX_NO_ERROR != lRet) && + (CIFX_BUFFER_TOO_SHORT != lRet) ) + { + ptMarshallerHeader->ulDataSize = 0; + } else + { + ptMarshallerHeader->ulDataSize = ulSize; + } + } + } + break; + + /*************************************************************************** + * xSysdeviceReset + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_RESET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceReset) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PSYSDEV_RESET_REQ_T ptReq = (PSYSDEV_RESET_REQ_T)ptMarshallerHeader; + + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceReset( ptChannel->hChannel, + ptReq->tData.ulTimeout); + } + } + break; + + /*************************************************************************** + * xSysdeviceResetEx + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_RESETEX: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceResetEx) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PSYSDEV_RESETEX_REQ_T ptReq = (PSYSDEV_RESETEX_REQ_T)ptMarshallerHeader; + + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceResetEx( ptChannel->hChannel, + ptReq->tData.ulTimeout, + ptReq->tData.ulMode); + } + } + break; + + /*************************************************************************** + * xSysdeviceGetMBXState + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_GETMBXSTATE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceGetMBXState) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PCHANNEL_GETMBXSTATE_CNF_T ptGetMbxCnf = (PCHANNEL_GETMBXSTATE_CNF_T)(ptMarshallerHeader); + + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxSysdeviceGetMBXState(ptChannel->hChannel, + &ptGetMbxCnf->tData.ulRecvPktCnt, + &ptGetMbxCnf->tData.ulSendPktCnt))) + { + ptMarshallerHeader->ulDataSize = sizeof(ptGetMbxCnf->tData); + } + } + } + break; + + /*************************************************************************** + * xSysdevicePutPacket + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_PUTPACKET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdevicePutPacket) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + uint8_t* pbRequest = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulSendSize; + uint32_t ulTimeout; + CIFX_PACKET* ptPacket; + + OS_Memcpy(&ulSendSize, pbRequest, sizeof(ulSendSize)); + OS_Memcpy(&ulTimeout, &pbRequest[sizeof(ulSendSize) + ulSendSize], sizeof(ulTimeout)); + ptPacket = (CIFX_PACKET*)&pbRequest[sizeof(ulSendSize)]; + + lRet = ptInstance->tDRVFunctions.pfnxSysdevicePutPacket(ptChannel->hChannel, + ptPacket, + ulTimeout); + } + } + break; + + /*************************************************************************** + * xSysdeviceGetPacket + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_GETPACKET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceGetPacket) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PCHANNEL_GETPACKET_REQ_T ptGetReq = (PCHANNEL_GETPACKET_REQ_T)(ptMarshallerHeader); + uint32_t ulReqSize = ptGetReq->tData.ulSize; + CIFX_PACKET* ptPacket = (CIFX_PACKET*)(&ptGetReq->tData); + + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceGetPacket(ptChannel->hChannel, + ulReqSize, + ptPacket, + ptGetReq->tData.ulTimeout); + + if(CIFX_NO_ERROR == lRet) + { + ptGetReq->tHeader.ulDataSize = ptPacket->tHeader.ulLen + (uint32_t)sizeof(ptPacket->tHeader); + } else if(CIFX_BUFFER_TOO_SHORT == lRet) + { + ptGetReq->tHeader.ulDataSize = ulReqSize; + } + } + } + break; + + /*************************************************************************** + * xSysdeviceFindFirstFile + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_FINDFIRSTFILE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceFindFirstFile) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PSYSDEV_FIND_FIRSTFILE_REQ_T ptFindReq = (PSYSDEV_FIND_FIRSTFILE_REQ_T)(ptMarshallerHeader); + + CIFX_DIRECTORYENTRY tDirEntry = {0}; + + *((uint32_t*)&tDirEntry.hList) = ptFindReq->tData.hList; + tDirEntry.bFiletype = ptFindReq->tData.bFiletype; + tDirEntry.ulFilesize = ptFindReq->tData.ulFilesize; + OS_Memcpy(tDirEntry.szFilename, ptFindReq->tData.szFilename, sizeof(ptFindReq->tData.szFilename)); + + /* Note: Currently we will not route callback. All packet that do not belong to + this transaction will be discarded */ + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceFindFirstFile(ptChannel->hChannel, + ptFindReq->tData.ulChannel, + &tDirEntry, + 0, + 0); + + if(CIFX_NO_ERROR == lRet) + { + PSYSDEV_FIND_FIRSTFILE_CNF_T ptFindCnf = (PSYSDEV_FIND_FIRSTFILE_CNF_T)(ptMarshallerHeader); + + ptFindCnf->tData.hList = *((uint32_t*)&tDirEntry.hList); + ptFindCnf->tData.bFiletype = tDirEntry.bFiletype; + ptFindCnf->tData.ulFilesize = tDirEntry.ulFilesize; + OS_Memcpy(ptFindCnf->tData.szFilename, tDirEntry.szFilename, sizeof(ptFindCnf->tData.szFilename)); + + ptMarshallerHeader->ulDataSize = sizeof(ptFindCnf->tData); + } + } + } + break; + + /*************************************************************************** + * xSysdeviceFindNextFile + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_FINDNEXTFILE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxSysdeviceFindNextFile) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PSYSDEV_FIND_NEXTFILE_REQ_T ptFindReq = (PSYSDEV_FIND_NEXTFILE_REQ_T)(ptMarshallerHeader); + + CIFX_DIRECTORYENTRY tDirEntry = {0}; + + *((uint32_t*)&tDirEntry.hList) = ptFindReq->tData.hList; + tDirEntry.bFiletype = ptFindReq->tData.bFiletype; + tDirEntry.ulFilesize = ptFindReq->tData.ulFilesize; + OS_Memcpy(tDirEntry.szFilename, ptFindReq->tData.szFilename, sizeof(ptFindReq->tData.szFilename)); + + /* Note: Currently we will not route callback. All packet that do not belong to + this transaction will be discarded */ + lRet = ptInstance->tDRVFunctions.pfnxSysdeviceFindNextFile(ptChannel->hChannel, + ptFindReq->tData.ulChannel, + &tDirEntry, + 0, + 0); + + if(CIFX_NO_ERROR == lRet) + { + PSYSDEV_FIND_NEXTFILE_CNF_T ptFindCnf = (PSYSDEV_FIND_NEXTFILE_CNF_T)(ptMarshallerHeader); + + ptFindCnf->tData.hList = *((uint32_t*)&tDirEntry.hList); + ptFindCnf->tData.bFiletype = tDirEntry.bFiletype; + ptFindCnf->tData.ulFilesize = tDirEntry.ulFilesize; + OS_Memcpy(ptFindCnf->tData.szFilename, tDirEntry.szFilename, sizeof(ptFindCnf->tData.szFilename)); + + ptMarshallerHeader->ulDataSize = sizeof(ptFindCnf->tData); + } + } + } + break; + + /*************************************************************************** + * xSysdeviceDownload + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_DOWNLOAD: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + break; + + /*************************************************************************** + * xSysdeviceUpload + ***************************************************************************/ + case MARSHALLER_SYSDEV_METHODID_UPLOAD: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + break; + + default: + /* Unknown/unsupported method ID */ + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_INVALID_PARAMETER; + break; + } + + return lRet; +} + +typedef int32_t(APIENTRY *PFN_CIFX_BLOCK)( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +static int32_t ChannelReadWriteBlock(PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader, CIFXHANDLE hChannel, PFN_CIFX_BLOCK pfnBlock) +{ + PCHANNEL_BLOCK_READ_REQ_T ptReadReq = (PCHANNEL_BLOCK_READ_REQ_T)ptMarshallerHeader; + int32_t lRet; + + if(!pfnBlock) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_FUNCTION_NOT_AVAILABLE; + } + + switch(ptReadReq->tData.ulCmd) + { + case CIFX_CMD_READ_DATA: + { + PCHANNEL_BLOCK_READ_CNF_T ptReadCnf = (PCHANNEL_BLOCK_READ_CNF_T)ptMarshallerHeader; + uint32_t ulDatalen = ptReadReq->tData.ulDatalen; + + lRet = pfnBlock( hChannel, + ptReadReq->tData.ulCmd, + ptReadReq->tData.ulOffset, + ulDatalen, + ptReadCnf->tData.abData); + + if( (CIFX_NO_ERROR == lRet) || (CIFX_BUFFER_TOO_SHORT == lRet) ) + { + ptMarshallerHeader->ulDataSize = ulDatalen; + } else + { + ptMarshallerHeader->ulDataSize = 0; + } + } + break; + + case CIFX_CMD_WRITE_DATA: + { + PCHANNEL_BLOCK_WRITE_REQ_T ptWriteReq = (PCHANNEL_BLOCK_WRITE_REQ_T)ptMarshallerHeader; + + lRet = pfnBlock( hChannel, + ptWriteReq->tData.ulCmd, + ptWriteReq->tData.ulOffset, + ptWriteReq->tData.ulDatalen, + ptWriteReq->tData.abData); + + ptMarshallerHeader->ulDataSize = 0; + } + break; + + default: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_INVALID_PARAMETER; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Handle packets which includes a special channel command +* \param ptBuffer Reference to the give packet +* Note: The given memory of the packet is also +* used to save the confimation +* \param pvUser Pointer to cifX Internal instance data +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t HandleChannelCommand (HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser) +{ + int32_t lRet = CIFX_INVALID_PARAMETER; + PMARSHALLER_DATA_FRAME_HEADER_T ptMarshallerHeader = (PMARSHALLER_DATA_FRAME_HEADER_T) &ptBuffer->abData[0]; + PMARSH_HANDLE_INSTANCE_T ptInstance = (PMARSH_HANDLE_INSTANCE_T) pvUser; + PMARSH_CIFX_CHANNEL_DATA_T ptChannel; + uint8_t bDeviceNumber; + uint8_t bChannelNumber; + + if((!ptBuffer) || (!pvUser)) + return CIFX_INVALID_PARAMETER; + + if(HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle) > ptInstance->ulDeviceCnt) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_INVALID_HANDLE; + } + + if( (HANDLE_GET_OBJSUBIDX(ptMarshallerHeader->ulHandle) > ptInstance->ptDevices[HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle)].ulChannelCount) || + !ptInstance->ptDevices[HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle)].fValid ) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_INVALID_HANDLE; + } + + bDeviceNumber = (uint8_t)HANDLE_GET_OBJIDX(ptMarshallerHeader->ulHandle); + bChannelNumber = (uint8_t)HANDLE_GET_OBJSUBIDX(ptMarshallerHeader->ulHandle); + ptChannel = &ptInstance->ptDevices[bDeviceNumber].ptChannels[bChannelNumber]; + + if (ptChannel->ulOpenCnt == 0) + { + ptMarshallerHeader->ulDataSize = 0; + return CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } + + switch(ptMarshallerHeader->ulMethodID) + { + /*************************************************************************** + * xChannelClose + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_CLOSE: + { + if(!ptInstance->tDRVFunctions.pfnxChannelClose) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + ptMarshallerHeader->ulDataSize = 0; + if(ptChannel->ulOpenCnt > 1) + { + --ptChannel->ulOpenCnt; + lRet = CIFX_NO_ERROR; + } else + { + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxChannelClose(ptChannel->hChannel))) + { + --ptChannel->ulOpenCnt; + ptChannel->hChannel = 0; + } + } + } + } + break; + + /*************************************************************************** + * xChannelGetMBXState + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_GETMBXSTATE: + { + if(!ptInstance->tDRVFunctions.pfnxChannelGetMBXState) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + } else + { + PCHANNEL_GETMBXSTATE_CNF_T ptGetMbxCnf = (PCHANNEL_GETMBXSTATE_CNF_T)(ptMarshallerHeader); + + ptMarshallerHeader->ulDataSize = 0; + + if(CIFX_NO_ERROR == (lRet = ptInstance->tDRVFunctions.pfnxChannelGetMBXState(ptChannel->hChannel, + &ptGetMbxCnf->tData.ulRecvPktCnt, + &ptGetMbxCnf->tData.ulSendPktCnt))) + { + ptGetMbxCnf->tHeader.ulDataSize = sizeof(ptGetMbxCnf->tData); + } + } + } + break; + + /*************************************************************************** + * xChannelPutPacket + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_PUTPACKET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelPutPacket) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else + { + uint8_t* pbRequest = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulSendSize; + uint32_t ulTimeout; + CIFX_PACKET* ptPacket; + + OS_Memcpy(&ulSendSize, pbRequest, sizeof(ulSendSize)); + OS_Memcpy(&ulTimeout, &pbRequest[sizeof(ulSendSize) + ulSendSize], sizeof(ulTimeout)); + ptPacket = (CIFX_PACKET*)&pbRequest[sizeof(ulSendSize)]; + + lRet = ptInstance->tDRVFunctions.pfnxChannelPutPacket(ptChannel->hChannel, + ptPacket, + ulTimeout); + } + } + break; + + /*************************************************************************** + * xChannelGetPacket + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_GETPACKET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelGetPacket) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else + { + PCHANNEL_GETPACKET_REQ_T ptGetReq = (PCHANNEL_GETPACKET_REQ_T)(ptMarshallerHeader); + uint32_t ulReqSize = ptGetReq->tData.ulSize; + CIFX_PACKET* ptPacket = (CIFX_PACKET*)(&ptGetReq->tData); + + + lRet = ptInstance->tDRVFunctions.pfnxChannelGetPacket(ptChannel->hChannel, + ulReqSize, + ptPacket, + ptGetReq->tData.ulTimeout); + + if(CIFX_NO_ERROR == lRet) + { + ptGetReq->tHeader.ulDataSize = ptPacket->tHeader.ulLen + (uint32_t)sizeof(ptPacket->tHeader); + + } else if(CIFX_BUFFER_TOO_SHORT == lRet) + { + ptGetReq->tHeader.ulDataSize = ulReqSize; + } + } + } + break; + + /*************************************************************************** + * xChannelGetSendPacket + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_GETSENDPACKET: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelGetSendPacket) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else + { + uint8_t* pbRequest = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulSize; + CIFX_PACKET* ptPacket; + + OS_Memcpy(&ulSize, pbRequest, sizeof(ulSize)); + ptPacket = (CIFX_PACKET*)pbRequest; + + lRet = ptInstance->tDRVFunctions.pfnxChannelGetSendPacket( ptChannel->hChannel, + ulSize, + ptPacket); + if(CIFX_NO_ERROR == lRet) + { + ptMarshallerHeader->ulDataSize = ptPacket->tHeader.ulLen + (uint32_t)sizeof(ptPacket->tHeader); + } else if(CIFX_BUFFER_TOO_SHORT == lRet) + { + ptMarshallerHeader->ulDataSize = ulSize; + } + } + } + break; + + /*************************************************************************** + * xChannelConfigLock + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_CONFIGLOCK: + { + if(!ptInstance->tDRVFunctions.pfnxChannelConfigLock) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + } else + { + PCHANNEL_CONFIGLOCK_REQ_T ptReq = (PCHANNEL_CONFIGLOCK_REQ_T)ptMarshallerHeader; + PCHANNEL_CONFIGLOCK_CNF_T ptCnf = (PCHANNEL_CONFIGLOCK_CNF_T)ptMarshallerHeader; + uint32_t ulState = ptReq->tData.ulState; + + lRet = ptInstance->tDRVFunctions.pfnxChannelConfigLock( ptChannel->hChannel, + ptReq->tData.ulCmd, + &ulState, + ptReq->tData.ulTimeout); + ptCnf->tData.ulState = ulState; + ptMarshallerHeader->ulDataSize = sizeof(ptCnf->tData); + } + } + break; + + /*************************************************************************** + * xChannelReset + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_RESET: + { + if(!ptInstance->tDRVFunctions.pfnxChannelReset) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + + } else + { + PCHANNEL_RESET_REQ_T ptReq = (PCHANNEL_RESET_REQ_T)ptMarshallerHeader; + + lRet = ptInstance->tDRVFunctions.pfnxChannelReset( ptChannel->hChannel, + ptReq->tData.ulMode, + ptReq->tData.ulTimeout); + ptMarshallerHeader->ulDataSize = 0; + } + } + break; + + /*************************************************************************** + * xChannelInfo + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_INFO: + { + if(!ptInstance->tDRVFunctions.pfnxChannelInfo) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_INFO_REQ_T ptReq = (PCHANNEL_INFO_REQ_T)ptMarshallerHeader; + uint8_t* pbRequest = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulSize = ptReq->tData.ulSize; + + lRet = ptInstance->tDRVFunctions.pfnxChannelInfo( ptChannel->hChannel, + ulSize, + pbRequest); + ptMarshallerHeader->ulDataSize = ulSize; + } + } + break; + + /*************************************************************************** + * xChannelWatchdog + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_WATCHDOG: + { + if(!ptInstance->tDRVFunctions.pfnxChannelWatchdog) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_WATCHDOG_REQ_T ptReq = (PCHANNEL_WATCHDOG_REQ_T)ptMarshallerHeader; + PCHANNEL_WATCHDOG_CNF_T ptCnf = (PCHANNEL_WATCHDOG_CNF_T)ptMarshallerHeader; + uint32_t ulTrigger = ptReq->tData.ulTrigger; + + lRet = ptInstance->tDRVFunctions.pfnxChannelWatchdog( ptChannel->hChannel, + ptReq->tData.ulCmd, + &ulTrigger); + + ptMarshallerHeader->ulDataSize = sizeof(ptCnf->tData); + ptCnf->tData.ulTrigger = ulTrigger; + } + } + break; + + /*************************************************************************** + * xChannelHostState + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_HOSTSTATE: + { + if(!ptInstance->tDRVFunctions.pfnxChannelHostState) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_HOSTSTATE_REQ_T ptReq = (PCHANNEL_HOSTSTATE_REQ_T)ptMarshallerHeader; + PCHANNEL_HOSTSTATE_CNF_T ptCnf = (PCHANNEL_HOSTSTATE_CNF_T)ptMarshallerHeader; + uint32_t ulState = ptReq->tData.ulState; + + lRet = ptInstance->tDRVFunctions.pfnxChannelHostState( ptChannel->hChannel, + ptReq->tData.ulCmd, + &ulState, + ptReq->tData.ulTimeout); + ptCnf->tData.ulState = ulState; + ptMarshallerHeader->ulDataSize = sizeof(ptCnf->tData); + } + } + break; + + /*************************************************************************** + * xChannelIOInfo + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_IOINFO: + { + if(!ptInstance->tDRVFunctions.pfnxChannelIOInfo) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_IOINFO_REQ_T ptReq = (PCHANNEL_IOINFO_REQ_T)ptMarshallerHeader; + uint8_t* pbReturn = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulDataLen = min(ptReq->tData.ulDataLen, ptBuffer->tMgmt.ulDataBufferLen); + + lRet = ptInstance->tDRVFunctions.pfnxChannelIOInfo( ptChannel->hChannel, + ptReq->tData.ulCmd, + ptReq->tData.ulArea, + ulDataLen, + pbReturn); + + if(CIFX_NO_ERROR != lRet) + { + ptMarshallerHeader->ulDataSize = 0; + } else + { + ptMarshallerHeader->ulDataSize = ulDataLen; + } + } + } + break; + + + /*************************************************************************** + * xChannelIORead + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_IOREAD: + { + if(!ptInstance->tDRVFunctions.pfnxChannelIORead) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_IOREAD_REQ_T ptReq = (PCHANNEL_IOREAD_REQ_T)ptMarshallerHeader; + uint8_t* pbReturn = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulDataLen = ptReq->tData.ulDataLen; + + lRet = ptInstance->tDRVFunctions.pfnxChannelIORead( ptChannel->hChannel, + ptReq->tData.ulArea, + ptReq->tData.ulOffset, + ulDataLen, + pbReturn, + ptReq->tData.ulTimeout); + + if((CIFX_NO_ERROR != lRet) && (CIFX_DEV_NO_COM_FLAG != lRet)) + { + ptMarshallerHeader->ulDataSize = 0; + } else + { + ptMarshallerHeader->ulDataSize = ulDataLen; + } + } + } + break; + + /*************************************************************************** + * xChannelIOWrite + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_IOWRITE: + { + if(!ptInstance->tDRVFunctions.pfnxChannelIOWrite) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_IOWRITE_REQ_T ptReq = (PCHANNEL_IOWRITE_REQ_T)ptMarshallerHeader; + + lRet = ptInstance->tDRVFunctions.pfnxChannelIOWrite( ptChannel->hChannel, + ptReq->tData.ulArea, + ptReq->tData.ulOffset, + ptReq->tData.ulDataLen, + ptReq->tData.abData, + ptReq->tData.ulTimeout); + ptMarshallerHeader->ulDataSize = 0; + } + } + break; + + /*************************************************************************** + * xChannelIOReadSendData + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_IOREADSENDDATA: + { + if(!ptInstance->tDRVFunctions.pfnxChannelIOReadSendData) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_IOREADSENDDATA_REQ_T ptReq = (PCHANNEL_IOREADSENDDATA_REQ_T)ptMarshallerHeader; + uint8_t* pbReturn = (uint8_t*)(ptMarshallerHeader + 1); + uint32_t ulDataLen = ptReq->tData.ulDataLen; + + lRet = ptInstance->tDRVFunctions.pfnxChannelIOReadSendData( ptChannel->hChannel, + ptReq->tData.ulArea, + ptReq->tData.ulOffset, + ulDataLen, + pbReturn); + + if((CIFX_NO_ERROR != lRet) && (CIFX_DEV_NO_COM_FLAG != lRet)) + { + ptMarshallerHeader->ulDataSize = 0; + } else + { + ptMarshallerHeader->ulDataSize = ulDataLen; + } + } + } + break; + + /*************************************************************************** + * xChannelBusState + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_BUSSTATE: + { + if(!ptInstance->tDRVFunctions.pfnxChannelBusState) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + ptMarshallerHeader->ulDataSize = 0; + } else + { + PCHANNEL_BUSSTATE_REQ_T ptReq = (PCHANNEL_BUSSTATE_REQ_T)ptMarshallerHeader; + PCHANNEL_BUSSTATE_CNF_T ptCnf = (PCHANNEL_BUSSTATE_CNF_T)ptMarshallerHeader; + uint32_t ulState = ptReq->tData.ulState; + + lRet = ptInstance->tDRVFunctions.pfnxChannelBusState( ptChannel->hChannel, + ptReq->tData.ulCmd, + &ulState, + ptReq->tData.ulTimeout); + ptCnf->tData.ulState = ulState; + ptMarshallerHeader->ulDataSize = sizeof(ptCnf->tData); + } + } + break; + + /*************************************************************************** + * xChannelControlBlock + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_CONTROLBLOCK: + lRet = ChannelReadWriteBlock(ptMarshallerHeader, + ptChannel->hChannel, + ptInstance->tDRVFunctions.pfnxChannelControlBlock); + break; + + /*************************************************************************** + * xChannelStatusBlock + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_STATUSBLOCK: + lRet = ChannelReadWriteBlock(ptMarshallerHeader, + ptChannel->hChannel, + ptInstance->tDRVFunctions.pfnxChannelCommonStatusBlock); + break; + + /*************************************************************************** + * xChannelExtendedStatusBlock + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_EXTSTATUSBLOCK: + lRet = ChannelReadWriteBlock(ptMarshallerHeader, + ptChannel->hChannel, + ptInstance->tDRVFunctions.pfnxChannelExtendedStatusBlock); + break; + + /*************************************************************************** + * xChannelUserBlock + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_USERBLOCK: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + break; + + /*************************************************************************** + * xChannelFindFirstFile + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_FINDFIRSTFILE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelFindFirstFile) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PCHANNEL_FIND_FIRSTFILE_REQ_T ptFindReq = (PCHANNEL_FIND_FIRSTFILE_REQ_T)(ptMarshallerHeader); + + CIFX_DIRECTORYENTRY tDirEntry = {0}; + + *((uint32_t*)&tDirEntry.hList) = ptFindReq->tData.hList; + tDirEntry.bFiletype = ptFindReq->tData.bFiletype; + tDirEntry.ulFilesize = ptFindReq->tData.ulFilesize; + OS_Memcpy(tDirEntry.szFilename, ptFindReq->tData.szFilename, sizeof(ptFindReq->tData.szFilename)); + + /* Note: Currently we will not route callback. All packet that do not belong to + this transaction will be discarded */ + lRet = ptInstance->tDRVFunctions.pfnxChannelFindFirstFile(ptChannel->hChannel, + &tDirEntry, + 0, + 0); + + if(CIFX_NO_ERROR == lRet) + { + PCHANNEL_FIND_FIRSTFILE_CNF_T ptFindCnf = (PCHANNEL_FIND_FIRSTFILE_CNF_T)(ptMarshallerHeader); + + ptFindCnf->tData.hList = *((uint32_t*)&tDirEntry.hList); + ptFindCnf->tData.bFiletype = tDirEntry.bFiletype; + ptFindCnf->tData.ulFilesize = tDirEntry.ulFilesize; + OS_Memcpy(ptFindCnf->tData.szFilename, tDirEntry.szFilename, sizeof(ptFindCnf->tData.szFilename)); + + ptMarshallerHeader->ulDataSize = sizeof(ptFindReq->tData); + } + } + } + break; + + /*************************************************************************** + * xChannelFindNextFile + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_FINDNEXTFILE: + { + ptMarshallerHeader->ulDataSize = 0; + + if(!ptInstance->tDRVFunctions.pfnxChannelFindNextFile) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PCHANNEL_FIND_NEXTFILE_REQ_T ptFindReq = (PCHANNEL_FIND_NEXTFILE_REQ_T)(ptMarshallerHeader); + + CIFX_DIRECTORYENTRY tDirEntry = {0}; + + *((uint32_t*)&tDirEntry.hList) = ptFindReq->tData.hList; + tDirEntry.bFiletype = ptFindReq->tData.bFiletype; + tDirEntry.ulFilesize = ptFindReq->tData.ulFilesize; + OS_Memcpy(tDirEntry.szFilename, ptFindReq->tData.szFilename, sizeof(ptFindReq->tData.szFilename)); + + /* Note: Currently we will not route callback. All packet that do not belong to + this transaction will be discarded */ + lRet = ptInstance->tDRVFunctions.pfnxChannelFindNextFile(ptChannel->hChannel, + &tDirEntry, + 0, + 0); + + if(CIFX_NO_ERROR == lRet) + { + PCHANNEL_FIND_NEXTFILE_CNF_T ptFindCnf = (PCHANNEL_FIND_NEXTFILE_CNF_T)(ptMarshallerHeader); + + ptFindCnf->tData.hList = *((uint32_t*)&tDirEntry.hList); + ptFindCnf->tData.bFiletype = tDirEntry.bFiletype; + ptFindCnf->tData.ulFilesize = tDirEntry.ulFilesize; + OS_Memcpy(ptFindCnf->tData.szFilename, tDirEntry.szFilename, sizeof(ptFindCnf->tData.szFilename)); + + ptMarshallerHeader->ulDataSize = sizeof(ptFindCnf->tData); + } + } + } + break; + + /*************************************************************************** + * xChannelDownload + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_DOWNLOAD: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + break; + + /*************************************************************************** + * xChannelUpload + ***************************************************************************/ + case MARSHALLER_CHANNEL_METHODID_UPLOAD: + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + break; + + default: + /* Unknown/unsupported method ID */ + ptMarshallerHeader->ulDataSize = 0; + lRet = CIFX_INVALID_COMMAND; + break; + } + +return lRet; +} + + + +/*****************************************************************************/ +/*!Find a device by name +* \param szBoard Name of the search device +* \param pvUser Pointer to cifX Internal instance data +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +static PMARSH_CIFX_DEVICE_DATA_T FindDevice(char* szBoard, void* pvUser) +{ + unsigned long ulIdx; + PMARSH_HANDLE_INSTANCE_T ptInstance = (PMARSH_HANDLE_INSTANCE_T) pvUser; + PMARSH_CIFX_DEVICE_DATA_T ptRet = NULL; + + if(!pvUser) + return NULL; + + for(ulIdx = 0; ulIdx < ptInstance->ulDeviceCnt; ulIdx++) + { + if( (OS_Strnicmp(szBoard, ptInstance->ptDevices[ulIdx].tBoardInfo.abBoardName, sizeof(ptInstance->ptDevices[ulIdx].tBoardInfo.abBoardName)) == 0) || + (OS_Strnicmp(szBoard, ptInstance->ptDevices[ulIdx].tBoardInfo.abBoardAlias, sizeof(ptInstance->ptDevices[ulIdx].tBoardInfo.abBoardAlias)) == 0) ) + { + ptRet = &ptInstance->ptDevices[ulIdx]; + break; + } + } + + return ptRet; +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/examples/tcpserver/Marshaller/CifXTransport.h b/examples/tcpserver/Marshaller/CifXTransport.h new file mode 100644 index 0000000..97b8283 --- /dev/null +++ b/examples/tcpserver/Marshaller/CifXTransport.h @@ -0,0 +1,67 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Workfile: CifXTransport.h $ + Last Modification: + $Author: AlexanderMinor $ + $Modtime: $ + $Revision: 13309 $ + + Targets: + Win32/ANSI : yes + Win32/Unicode: yes (define _UNICODE) + WinCE : yes + + Description: + Defines for the "CifX Modul" of the "Marshaller" device side + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 1 25.05.2009 PL intitial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file CifXTransport.h +* cifX marshalling via Hilscher Transport Protocol */ +/*****************************************************************************/ + +#ifndef __CIFXTRANSPORT__H +#define __CIFXTRANSPORT__H + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_CIFX +* \{ */ +/*****************************************************************************/ + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + +#include "MarshallerConfig.h" +#include "cifXAPI_Wrapper.h" + +/* Init information for the cifX Transport */ +typedef struct CIFX_TRANSPORT_CONFIG_Ttag +{ + DRIVER_FUNCTIONS tDRVFunctions; /*! Function list of CifX API */ +} CIFX_TRANSPORT_CONFIG; + +/* Initialize a Transport */ +uint32_t cifXTransportInit(void* pvMarshaller, void* pvConfig); + +#ifdef __cplusplus + } +#endif /* __cplusplus */ + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __CIFXTRANSPORT__H */ diff --git a/examples/tcpserver/Marshaller/HilMarshaller.c b/examples/tcpserver/Marshaller/HilMarshaller.c new file mode 100644 index 0000000..7b723c5 --- /dev/null +++ b/examples/tcpserver/Marshaller/HilMarshaller.c @@ -0,0 +1,1273 @@ +/************************************************************************************** +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** + $Id: HilMarshaller.c 14530 2022-06-27 12:01:46Z AMinor $: + +Description: + Hilscher Transport marshalling main module + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2022-06-27 Fix handling in HilMarshallerSetMode() to change mode of a single connector + 2020-11-12 Moved OS functions to separate implementation module + 2019-01-23 Bugfix: + - Fixed wrong deinitialization order in HilMarshallerStop() + 2018-08-13 Change: + - Removed pclint warnings + - Updated header to new version + 2015-07-16 Change: + - Adapted to new APIHeader directory and MarshallerFrame.h + 2013-05-06 Bugfix: + - ACK's or zero length packets, may be send with a checksum (!=0) + 2010-06-07 Change: + - Re-Added Tx buffers, which were never unused in Packet Transport (on rcX) + - Added ulTxBufferSize / ulTxBufferSize on connector registration to setup + Tx Buffer usage (if needed) + 2009-09-23 Change: + - Removed unused Tx buffers and doubled number of Rx buffers to avoid resource errors without increasing memory footprint. + 2009-09-22 Addon: + - Added HilMarshallerSetMode(), mode evaluation in HilMarshallerConnRxData(). + 2009-09-04 Bugfix: + - Do not discard "superfluous" data on reception of a transport ACK from the host. Instead, start a new receive cycle. + 2009-09-02 Change: + - HilMarshallerMain() returns TLR_E_FAIL if no message can be retrieved from the pending requests list. + 2009-09-01 Bugfix: + - Removed redundant calls to OS_FREE() following call to HilMarshallerStop() after failure in HilMarshallerStart(). + 2009-08-26 Change: + - Use HilMarshallerGetBuffer() and HilMarshallerFreeBuffer() in SendAcknowledge() instead of STAILQ_xxx macros. + 2009-08-25 Bugfix: + - No need to perform buffer handling in case of incoming Tx Ack. + 2009-08-19 Bugfixes: + - Corrected calculation of the used buffer length for a QUERYSERVER response. + - Zero ulActualSendOffset when allocating buffer. + 2009-08-13 Bugfix: + - Set fAnswer flag to trigger response transmission also for regular Keep Alive message. + 2009-08-06 Bugfix: + - Changed creation of the QUERYSERVER response to be in line with the specification. + 2009-08-04 Bugfix: + - Keep Alive response: Prevent buffer from being freed by ResetRxStateMachine() while not transmitted completely. + 2009-07-28 Change: + - Moved Marshaller version constants to MarshallerVersion.h + 2009-07-21 Bugfix: + - Need to initialize Connectors before Transports because + Transport initialization uses Connector data + 2009-06-02 Bugfix: + - Buffer handling for Connectors with Idx > 0 did not work + (Connectors will run out of buffers) + 2009-05-25 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file HilMarshaller.c +* netX Marshaller implementation */ +/*****************************************************************************/ + +#include "OS_Dependent.h" +#include "MarshallerConfig.h" +#include "MarshallerInternal.h" +#include "MarshallerFrame.h" +#include "MarshallerVersion.h" + + +#ifndef min + #define min(a,b) ((a > b)? b : a) +#endif + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_MAIN +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Calculate CCITT/ITU CRC-16 checksum. +* Polynomial : x^16 + x^12 + x^5 + 1 (0x1021) +* Start value : 0xFFFF +* Result : XORed with 0xFFFF +* \param pbData Buffer to calculate CRC for +* \param ulDataLength Length of buffer +* \return CRC-16 checksum */ +/*****************************************************************************/ +static uint16_t CalculateCRC16 (const uint8_t* pbData, uint32_t ulDataLength) +{ + uint16_t usCRC; + uint32_t ulOffset; + + usCRC = 0xFFFF; + if (pbData != NULL && ulDataLength > 0) + { /* Buffer address and data length are valid. */ + for (ulOffset = 0; ulOffset < ulDataLength; ++ulOffset) + { /* Update CRC value for each byte in the buffer. */ + usCRC = (uint16_t)((usCRC >> 8) | (usCRC << 8)); + usCRC = (uint16_t)(usCRC ^ pbData[ulOffset]); + usCRC ^= (uint16_t)((usCRC & 0xFF) >> 4); + usCRC ^= (uint16_t)((usCRC << 8) << 4); + usCRC ^= (uint16_t)(((usCRC & 0xFF) << 4) << 1); + } + usCRC = (uint16_t) (~usCRC); + } + return (usCRC); +} + +/*****************************************************************************/ +/*! Allocates the requested data buffers and inserts them in free list +* of connector +* \param pvMarshaller Marshaller handle +* \param ptConnector Connector to allocate buffers for +* \param ulRxBufferCnt Number of buffers to allocate (equals number of parallel services) +* \param ulRxBufferSize Size of the buffers in bytes +* \param ulTxBufferCnt Number of transmit buffers to allocate (for unsolicited/indication data) +* \param ulTxBufferSize Size of the transmit buffers in bytes +* \return true on success */ +/*****************************************************************************/ +static bool AllocateBuffers(void* pvMarshaller, CONNECTOR_DATA_T* ptConnector, uint32_t ulRxBufferCnt, uint32_t ulRxBufferSize, uint32_t ulTxBufferCnt, uint32_t ulTxBufferSize) +{ + uint32_t ulIdx; + bool fRet = true; + + STAILQ_INIT(&ptConnector->tRxBuffer); + STAILQ_INIT(&ptConnector->tTxBuffer); + STAILQ_INIT(&ptConnector->tAckBuffer); + STAILQ_INIT(&ptConnector->tKeepAliveBuffer); + + /* Use twice the number of requested data buffers for Rx data, + to make sure we have some reserve in case a buffer has not yet been released after the confirmation has been sent */ + for(ulIdx = 0; ulIdx < ulRxBufferCnt; ++ulIdx) + { + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + if(NULL == (ptBuffer = OS_Malloc((uint32_t)sizeof(*ptBuffer) + ulRxBufferSize))) + { + fRet = false; + break; + } else + { + ptBuffer->tMgmt.ulConnectorIdx = ptConnector->ulConnectorIdx; + ptBuffer->tMgmt.pvMarshaller = pvMarshaller; + ptBuffer->tMgmt.ulDataBufferLen = ulRxBufferSize; + ptBuffer->tMgmt.eType = eMARSHALLER_RX_BUFFER; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + + /* Enqueue in linked list */ + STAILQ_INSERT_TAIL(&ptConnector->tRxBuffer, ptBuffer, tList); + } + } + + for(ulIdx = 0; ulIdx < ulTxBufferCnt; ++ulIdx) + { + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + if(NULL == (ptBuffer = OS_Malloc((uint32_t)sizeof(*ptBuffer) + ulTxBufferSize))) + { + fRet = false; + break; + } else + { + ptBuffer->tMgmt.ulConnectorIdx = ptConnector->ulConnectorIdx; + ptBuffer->tMgmt.pvMarshaller = pvMarshaller; + ptBuffer->tMgmt.ulDataBufferLen = ulTxBufferSize; + ptBuffer->tMgmt.eType = eMARSHALLER_TX_BUFFER; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + /* Enqueue in linked list */ + STAILQ_INSERT_TAIL(&ptConnector->tTxBuffer, ptBuffer, tList); + } + } + + /* Use one additional Buffer per direction for acknowledgement, + to make sure we can answer while we don't have databuffers + ready (number of parallel services exceeded) */ + for(ulIdx = 0; ulIdx < ulRxBufferCnt + ulTxBufferCnt + 2; ++ulIdx) + { + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + if(NULL == (ptBuffer = OS_Malloc(sizeof(*ptBuffer)))) + { + fRet = false; + break; + } else + { + ptBuffer->tMgmt.ulConnectorIdx = ptConnector->ulConnectorIdx; + ptBuffer->tMgmt.pvMarshaller = pvMarshaller; + ptBuffer->tMgmt.ulDataBufferLen = 0; + ptBuffer->tMgmt.eType = eMARSHALLER_ACK_BUFFER; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + + /* Enqueue in linked list */ + STAILQ_INSERT_TAIL(&ptConnector->tAckBuffer, ptBuffer, tList); + } + } + + if(fRet) + { + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + if(NULL == (ptBuffer = OS_Malloc(sizeof(*ptBuffer) + sizeof(HIL_TRANSPORT_KEEPALIVE_DATA_T)))) + { + fRet = false; + } else + { + ptBuffer->tMgmt.ulConnectorIdx = ptConnector->ulConnectorIdx; + ptBuffer->tMgmt.pvMarshaller = pvMarshaller; + ptBuffer->tMgmt.ulDataBufferLen = sizeof(HIL_TRANSPORT_KEEPALIVE_DATA_T); + ptBuffer->tMgmt.eType = eMARSHALLER_KEEPALIVE_BUFFER; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + + /* Enqueue in linked list */ + STAILQ_INSERT_TAIL(&ptConnector->tKeepAliveBuffer, ptBuffer, tList); + } + } + + return fRet; +} + +/*****************************************************************************/ +/*! Deallocates all data buffers from a connector +* \param pvMarshaller Marshaller handle +* \param ptConnector Connector to free buffers for */ +/*****************************************************************************/ +static void DeAllocateBuffers(void* pvMarshaller, CONNECTOR_DATA_T* ptConnector) +{ + /* Deallocate all buffers in linked lists */ + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + while(NULL != (ptBuffer = STAILQ_FIRST(&ptConnector->tAckBuffer))) + { + STAILQ_REMOVE(&ptConnector->tAckBuffer, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + + OS_Free(ptBuffer); + } + + while(NULL != (ptBuffer = STAILQ_FIRST(&ptConnector->tRxBuffer))) + { + STAILQ_REMOVE(&ptConnector->tRxBuffer, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + + OS_Free(ptBuffer); + } + + while(NULL != (ptBuffer = STAILQ_FIRST(&ptConnector->tTxBuffer))) + { + STAILQ_REMOVE(&ptConnector->tTxBuffer, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + + OS_Free(ptBuffer); + } + + while(NULL != (ptBuffer = STAILQ_FIRST(&ptConnector->tKeepAliveBuffer))) + { + STAILQ_REMOVE(&ptConnector->tKeepAliveBuffer, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + + OS_Free(ptBuffer); + } +} + +/*****************************************************************************/ +/*! Free a buffer +* \param ptBuffer Buffer to free */ +/*****************************************************************************/ +void HilMarshallerFreeBuffer(HIL_MARSHALLER_BUFFER_T* ptBuffer) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)ptBuffer->tMgmt.pvMarshaller; + CONNECTOR_DATA_T* ptConn = &ptMarshaller->atConnectors[ptBuffer->tMgmt.ulConnectorIdx]; + int iLock; + + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + + iLock = OS_Lock(); + + switch(ptBuffer->tMgmt.eType) + { + case eMARSHALLER_KEEPALIVE_BUFFER: + STAILQ_INSERT_TAIL(&ptConn->tKeepAliveBuffer, ptBuffer, tList); + break; + + case eMARSHALLER_ACK_BUFFER: + STAILQ_INSERT_TAIL(&ptConn->tAckBuffer, ptBuffer, tList); + break; + + case eMARSHALLER_RX_BUFFER: + STAILQ_INSERT_TAIL(&ptConn->tRxBuffer, ptBuffer, tList); + break; + + case eMARSHALLER_TX_BUFFER: + STAILQ_INSERT_TAIL(&ptConn->tTxBuffer, ptBuffer, tList); + break; + + default: + /* NOTE: This should never happen, only if someone free's a wrong buffer, + or destroyed the buffer management area (programming error). */ + ptConn = ptConn; + break; + } + + OS_Unlock(iLock); +} /*lint !e438 : Last value assigned to variable 'ptConn' (defined at line 276) not used */ + +/*****************************************************************************/ +/*! Get a buffer for incoming data from connector +* \param pvMarshaller Marshaller handle +* \param eType Type of buffer to acquire +* \param ulConnector Connector index +* \return NULL if no buffer is available, valid buffer otherwise */ +/*****************************************************************************/ +HIL_MARSHALLER_BUFFER_T* HilMarshallerGetBuffer(void* pvMarshaller, MARSHALLER_BUFFER_TYPE_E eType, uint32_t ulConnector) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + CONNECTOR_DATA_T* ptConn = &ptMarshaller->atConnectors[ulConnector]; + HIL_MARSHALLER_BUFFER_T* ptBuffer = NULL; + struct MARSHALLER_BUFFER_HEAD* ptListHead = NULL; + int iLock; + + switch(eType) + { + case eMARSHALLER_RX_BUFFER: + ptListHead = &ptConn->tRxBuffer; + break; + + case eMARSHALLER_TX_BUFFER: + ptListHead = &ptConn->tTxBuffer; + break; + + case eMARSHALLER_ACK_BUFFER: + ptListHead = &ptConn->tAckBuffer; + break; + + case eMARSHALLER_KEEPALIVE_BUFFER: + ptListHead = &ptConn->tKeepAliveBuffer; + break; + + default: + /* NOTE: This should never happen, only if someone free's a wrong buffer, + or destroyed the buffer management area (programming error). */ + break; + } + + iLock = OS_Lock(); + + if( (NULL != ptListHead) && + (NULL != (ptBuffer = STAILQ_FIRST(ptListHead))) ) + { + STAILQ_REMOVE(ptListHead, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + ptBuffer->tMgmt.ulActualSendOffset = 0; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + } + + OS_Unlock(iLock); + + return ptBuffer; +} + +/*****************************************************************************/ +/*! Find a transport layer which can handle the requested data type +* \param ptMarshaller Marshaller handle +* \param usDataType Datatype the transport layer is requested for +* \return NULL if no transport is available, valid transport otherwise */ +/*****************************************************************************/ +static TRANSPORT_LAYER_DATA_T* FindTransportLayer(const HIL_MARSHALLER_DATA_T* ptMarshaller, const uint16_t usDataType) +{ + TRANSPORT_LAYER_DATA_T* ptRet = NULL; + uint32_t ulIdx; + + for(ulIdx = 0; ulIdx < ptMarshaller->ulTransports; ++ulIdx) + { + if(usDataType == ptMarshaller->ptTransports[ulIdx].usDataType) + { + ptRet = &ptMarshaller->ptTransports[ulIdx]; + break; + } + } + + return ptRet; +} + +/*****************************************************************************/ +/*! Send an HIL Transport acknowledge +* \param ptMarshaller Marshaller handle +* \param ulConnector Connector to send ACK to +* \param ptHeader Header of incoming packet +* \param bState State to set in acknowledge */ +/*****************************************************************************/ +static void SendAcknowledge(HIL_MARSHALLER_DATA_T* ptMarshaller, uint32_t ulConnector, HIL_TRANSPORT_HEADER* ptHeader, unsigned char bState) +{ + HIL_MARSHALLER_BUFFER_T* ptBuffer; + /* If we don't get a buffer, the number of parallel services is exceeded. + This is a host error, as it is sending data too fast and we are not able to do any acknowledge */ + ptBuffer = HilMarshallerGetBuffer(ptMarshaller, eMARSHALLER_ACK_BUFFER, ulConnector); + if(NULL != ptBuffer) + { + ptBuffer->tTransport = *ptHeader; + ptBuffer->tTransport.bState = bState; + ptBuffer->tTransport.usDataType = HIL_TRANSPORT_TYPE_ACKNOWLEDGE; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; + if(HIL_MARSHALLER_E_SUCCESS != HilMarshallerConnTxData(ptMarshaller, ulConnector, ptBuffer)) + { + /* Internal error, this should never happen, but if it happens, we need to free the Ack buffer again */ + HilMarshallerFreeBuffer(ptBuffer); + } + } +} + +/*****************************************************************************/ +/*! Reset internal connector receive state machine +* \param ptConnector Connector to reset */ +/*****************************************************************************/ +static void ResetRxStateMachine(CONNECTOR_DATA_T* ptConnector) +{ + + if((ptConnector->eScanState != HIL_SEARCH_TELEGRAM_COOKIE) && + (ptConnector->eScanState != HIL_SCAN_DONE) ) + { + ptConnector->eScanState = ptConnector->eScanState; + } + + ptConnector->fMonitorTimeout = false; + ptConnector->ulElapsedTime = 0; + ptConnector->tRxHeader.ulCookie = 0; + ptConnector->ulRxOffset = 0; + if(NULL != ptConnector->ptCurrentRxBuffer) + { + HilMarshallerFreeBuffer(ptConnector->ptCurrentRxBuffer); + } + + ptConnector->ptCurrentRxBuffer = NULL; + ptConnector->eScanState = HIL_SEARCH_TELEGRAM_COOKIE; +} + + +/*****************************************************************************/ +/*! Startup marshaller +* \param ptParams Marshaller parameters +* \param ppvMarshHandle Returned Marshaller handle +* \param pfnRequest Function to call, when MarshallerMain should be called +* \param pvUser User parameter to pass on pfnRequest call +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerStart(const HIL_MARSHALLER_PARAMS_T* ptParams, void** ppvMarshHandle, PFN_MARSHALLER_REQUEST pfnRequest, void* pvUser) +{ + uint32_t eRet = HIL_MARSHALLER_E_SUCCESS; + HIL_MARSHALLER_DATA_T* ptMarshaller = NULL; + uint32_t ulIdx = 0; + const TRANSPORT_LAYER_CONFIG_T* ptTransport = NULL; + const HIL_MARSHALLER_CONNECTOR_PARAMS_T* ptConnParams = NULL; + + if(NULL == ppvMarshHandle) + eRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + else + { + *ppvMarshHandle = NULL; + if (NULL == (ptMarshaller = OS_Malloc(sizeof(*ptMarshaller)))) + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + else + { + OS_Memset( ptMarshaller, 0, sizeof(*ptMarshaller)); + STAILQ_INIT(&ptMarshaller->tPendingRequests); + ptMarshaller->pfnRequest = pfnRequest; + ptMarshaller->pvUser = pvUser; + ptMarshaller->ulMaxConnectors = ptParams->ulMaxConnectors; + ptMarshaller->ulTransports = ptParams->ulTransportCnt; + OS_Memcpy(ptMarshaller->szServerName, (void*)ptParams->szServerName, sizeof(ptMarshaller->szServerName)); + if(NULL == (ptMarshaller->atConnectors = OS_Malloc(ptParams->ulMaxConnectors * (uint32_t)sizeof(CONNECTOR_DATA_T)))) + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + else + { + OS_Memset(ptMarshaller->atConnectors, 0, ptParams->ulMaxConnectors * sizeof(CONNECTOR_DATA_T)); + if(NULL == (ptMarshaller->ptTransports = OS_Malloc(ptParams->ulTransportCnt * (uint32_t)sizeof(TRANSPORT_LAYER_DATA_T)))) + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + else + { + OS_Memset(ptMarshaller->ptTransports, 0, ptParams->ulTransportCnt * sizeof(TRANSPORT_LAYER_DATA_T)); + for(ulIdx = 0; eRet == HIL_MARSHALLER_E_SUCCESS && ulIdx < ptParams->ulConnectorCnt; ++ulIdx) + { + ptConnParams = &ptParams->ptConnectors[ulIdx]; + if(ptConnParams->pfnConnectorInit) + eRet = ptConnParams->pfnConnectorInit(ptConnParams, ptMarshaller); + } + for(ulIdx = 0; eRet == HIL_MARSHALLER_E_SUCCESS && ulIdx < ptParams->ulTransportCnt; ++ulIdx) + { + ptTransport = &ptParams->atTransports[ulIdx]; + if(ptTransport->pfnInit) + eRet = ptTransport->pfnInit(ptMarshaller, ptTransport->pvConfig); + } + } + } + } + if(HIL_MARSHALLER_E_SUCCESS == eRet) + *ppvMarshHandle = ptMarshaller; + else + HilMarshallerStop(ptMarshaller); + } + return eRet; /*lint !e593 : 'ptMarshaller' possibly not freed or returned */ +} + +/*****************************************************************************/ +/*! Stop marshaller +* \param pvMarshHandle Marshaller handle */ +/*****************************************************************************/ +void HilMarshallerStop(void* pvMarshHandle) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshHandle; + + if(NULL != ptMarshaller) + { + if(NULL != ptMarshaller->ptTransports) + { + uint32_t ulTrans; + + for(ulTrans = 0; ulTrans < ptMarshaller->ulTransports; ++ulTrans) + { + TRANSPORT_LAYER_DATA_T* ptTransport = &ptMarshaller->ptTransports[ulTrans]; + + if(ptTransport->pfnDeinit) + { + ptTransport->pfnDeinit(ptTransport->pvUser); + } + } + + OS_Free(ptMarshaller->ptTransports); + ptMarshaller->ptTransports = NULL; + } + + if(NULL != ptMarshaller->atConnectors) + { + uint32_t ulConn; + + for(ulConn = 0; ulConn < ptMarshaller->ulMaxConnectors; ++ulConn) + { + CONNECTOR_DATA_T* ptConn = &ptMarshaller->atConnectors[ulConn]; + + if(ptConn->fInUse) + { + ptConn->tConn.pfnDeinit(ptConn->tConn.pvUser); + } + } + + OS_Free(ptMarshaller->atConnectors); + ptMarshaller->atConnectors = NULL; + } + + OS_Free(ptMarshaller); + } +} + +/*****************************************************************************/ +/*! Register a connector at marshaller +* \param pvMarshaller Marshaller handle +* \param pulConnectorIdx Returned connector number +* \param ptConn Connector data +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerRegisterConnector(void* pvMarshaller, uint32_t* pulConnectorIdx, HIL_MARSHALLER_CONNECTOR_T* ptConn) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + uint32_t eRet = HIL_MARSHALLER_E_SUCCESS; + CONNECTOR_DATA_T* ptConnectorData = NULL; + uint32_t ulConnIdx; + + /* Search free connector space */ + for(ulConnIdx = 0; ulConnIdx < ptMarshaller->ulMaxConnectors; ++ulConnIdx) + { + if(!ptMarshaller->atConnectors[ulConnIdx].fInUse) + { + ptConnectorData = &ptMarshaller->atConnectors[ulConnIdx]; + ptConnectorData->ulConnectorIdx = ulConnIdx; + break; + } + } + + if(NULL == ptConnectorData) + { + /* No more connectors allowed */ + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + } else if(!AllocateBuffers(pvMarshaller, + ptConnectorData, + ptConn->ulDataBufferCnt, + ptConn->ulDataBufferSize, + ptConn->ulTxBufferCnt, + ptConn->ulTxBufferSize)) + { + /* Out of memory */ + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + } else + { + /* Initialize RX state machine */ + ResetRxStateMachine(ptConnectorData); + + /* Initialize conector data */ + ptConnectorData->fInUse = true; + ptConnectorData->tConn = *ptConn; + *pulConnectorIdx = ulConnIdx; + } + + return eRet; +} + +/*****************************************************************************/ +/*! Unregister a connector at marshaller +* \param pvMarshaller Marshaller handle +* \param ulConnectorIdx Connector number */ +/*****************************************************************************/ +void HilMarshallerUnregisterConnector(void* pvMarshaller, uint32_t ulConnectorIdx) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + + if(ulConnectorIdx < ptMarshaller->ulMaxConnectors) + { + CONNECTOR_DATA_T* ptConnectorData = &ptMarshaller->atConnectors[ulConnectorIdx]; + + DeAllocateBuffers(pvMarshaller, + ptConnectorData); + + ptConnectorData->fInUse = false; + OS_Memset(&ptConnectorData->tConn, 0, sizeof(ptConnectorData->tConn)); + } +} + +/*****************************************************************************/ +/*! Called by connector when new data has arrived +* \param pvMarshaller Marshaller handle +* \param ulConnector Connector number +* \param pbData Incoming data +* \param ulDataCnt Number of bytes in incoming data buffer +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerConnRxData(void* pvMarshaller, uint32_t ulConnector, uint8_t* pbData, uint32_t ulDataCnt) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + uint32_t eRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + + if (ulConnector < ptMarshaller->ulMaxConnectors + && ptMarshaller->atConnectors[ulConnector].ulMode != HIL_MARSHALLER_MODE_DISABLED) + { + CONNECTOR_DATA_T* ptConnector = &ptMarshaller->atConnectors[ulConnector]; + int fDone = 0; /* Leave handler */ + uint32_t ulRxDataIdx = 0; + + eRet = HIL_MARSHALLER_E_SUCCESS; + ptConnector->ulElapsedTime = 0; /* Reschedule timeout handling */ + + /*-----------------------------------------*/ + /* Start scanning of the input data */ + /*-----------------------------------------*/ + do + { + switch(ptConnector->eScanState) + { + case HIL_SEARCH_TELEGRAM_COOKIE: + { + /* Parse input buffer */ + unsigned char* pabCookie = (unsigned char*)&ptConnector->tRxHeader.ulCookie; + + for ( ulRxDataIdx = 0; ulRxDataIdx < ulDataCnt; ulRxDataIdx++) + { + pabCookie[ptConnector->ulRxOffset] = pbData[ulRxDataIdx]; + if( ++ptConnector->ulRxOffset >= sizeof(ptConnector->tRxHeader.ulCookie)) + { + /* Check if we have a complete cookie */ + if( HIL_TRANSPORT_COOKIE == ptConnector->tRxHeader.ulCookie) + { + /* Yes, store the cookie in the header */ + ulDataCnt = ulDataCnt - (ulRxDataIdx + 1); + pbData = &pbData[ulRxDataIdx + 1]; + + /* Set next state */ + ptConnector->eScanState = HIL_SEARCH_TELEGRAM_HEADER; + ptConnector->fMonitorTimeout = true; + break; + }else + { + /* Still no cookie, move the data and insert next character. */ + /* Set cookie buffer index to next insertable character. */ + memmove(pabCookie, &pabCookie[1], 3); + ptConnector->ulRxOffset = 3; + } + } + } + + if( HIL_SEARCH_TELEGRAM_COOKIE == ptConnector->eScanState) + fDone = 1; + + break; + } + + case HIL_SEARCH_TELEGRAM_HEADER: + { + /* We searching a telegram header, cookie is already available */ + /* Check if we have more date */ + if ( 0 == ulDataCnt) + { + fDone = 1; + } else + { + /* Append at least the header length if available */ + uint32_t ulCopyLength = 0; + unsigned char* pbHeader = (unsigned char*)&ptConnector->tRxHeader; + + ulCopyLength = min(ulDataCnt, + (sizeof(HIL_TRANSPORT_HEADER) - ptConnector->ulRxOffset)); + + OS_Memcpy( &pbHeader[ptConnector->ulRxOffset], + pbData, + ulCopyLength); + + ptConnector->ulRxOffset += ulCopyLength; + + /* Check if we have more data */ + if(ptConnector->ulRxOffset < sizeof(HIL_TRANSPORT_HEADER)) + { + /* We need more data */ + fDone = 1; + + } else if (HIL_TRANSPORT_TYPE_ACKNOWLEDGE == ptConnector->tRxHeader.usDataType) + { + /* Update the Rx data count and Rx data pointer for handling the remaining bytes */ + ulDataCnt -= ulCopyLength; + pbData = &pbData[ulCopyLength]; + ptConnector->ptCurrentRxBuffer = NULL; + ResetRxStateMachine(ptConnector); + /* If there are bytes left, start a new cookie search using these bytes. Otherwise terminate the receive cycle. */ + if (ulDataCnt == 0) + fDone = 1; + break; + } else + { + /* We need a buffer */ + + HIL_MARSHALLER_BUFFER_T* ptBuffer; + + if(HIL_TRANSPORT_TYPE_KEEP_ALIVE == ptConnector->tRxHeader.usDataType) + { + ptBuffer = HilMarshallerGetBuffer(ptMarshaller, eMARSHALLER_KEEPALIVE_BUFFER, ulConnector); + + } else + { + ptBuffer = HilMarshallerGetBuffer(ptMarshaller, eMARSHALLER_RX_BUFFER, ulConnector); + } + + if(NULL == ptBuffer) + { + /* Send negative Ack */ + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TSTATE_RESOURCE_ERROR); + ResetRxStateMachine(ptConnector); + + } else if(ptBuffer->tMgmt.ulDataBufferLen < ptConnector->tRxHeader.ulLength) + { + /* Send negative ACK (telegram too long for buffer) */ + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TSTATE_BUFFEROVERFLOW_ERROR); + + /* Release Buffer */ + HilMarshallerFreeBuffer(ptBuffer); + ResetRxStateMachine(ptConnector); + + } else + { + /* We have a complete Header, wait for packet data complete */ + ulDataCnt -= ulCopyLength; + pbData = &pbData[ulCopyLength]; + + /* Store header */ + ptBuffer->tTransport = ptConnector->tRxHeader; + ptBuffer->tMgmt.ulUsedDataBufferLen = 0; /* Set actual telegram data length */ + + /* Set next scanner state */ + ptConnector->ptCurrentRxBuffer = ptBuffer; + ptConnector->eScanState = HIL_WAIT_TELEGRAM_DATA; + } + } + } + } + break; + + case HIL_WAIT_TELEGRAM_DATA: + { + /* We waiting for telegram data, wait until all data are available */ + uint32_t ulCopyLen = 0; + HIL_TRANSPORT_HEADER* ptHeader = &ptConnector->ptCurrentRxBuffer->tTransport; + uint32_t ulDataOffset = ptConnector->ulRxOffset - (uint32_t)sizeof(HIL_TRANSPORT_HEADER); + + if(0 == ptHeader->ulLength) + { + /* We have all data */ + ptConnector->eScanState = HIL_CHECK_TELEGRAM; + + /* We have packet data, wait until all data are available */ + } else if(0 != ulDataCnt) + { + HIL_MARSHALLER_BUFFER_T* ptBuffer = ptConnector->ptCurrentRxBuffer; + + /* Check if all data must be copied or if we have more data than necessary */ + ulCopyLen = ulDataCnt; + if( (ulDataCnt + ulDataOffset) > ptHeader->ulLength) + { + /* Just copy the necessary data and keep the rest for a new cookie ssearch */ + ulCopyLen = ptHeader->ulLength - ulDataOffset; + } + + OS_Memcpy(&ptBuffer->abData[ulDataOffset], pbData, ulCopyLen); + ptConnector->ulRxOffset += ulCopyLen; + ptBuffer->tMgmt.ulUsedDataBufferLen += ulCopyLen; + } + + if(ptConnector->ulRxOffset < (ptHeader->ulLength + sizeof(*ptHeader))) + { + /* We have to wait for more data */ + fDone = 1; + } else + { + /* We have a complete telegram */ + + /* Check if we have data left */ + ulDataCnt -= ulCopyLen; + pbData = &pbData[ulCopyLen]; + + /* We have all data */ + ptConnector->eScanState = HIL_CHECK_TELEGRAM; + } + } + break; + + case HIL_CHECK_TELEGRAM: + { + HIL_TRANSPORT_HEADER* ptHeader = &ptConnector->ptCurrentRxBuffer->tTransport; + HIL_MARSHALLER_BUFFER_T* ptBuffer = ptConnector->ptCurrentRxBuffer; + + if( (ptHeader->ulLength > 0) && + (ptHeader->usChecksum != 0) && + (ptHeader->usChecksum != CalculateCRC16(ptBuffer->abData, + ptConnector->tRxHeader.ulLength)) ) + { + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TSTATE_CHECKSUM_ERROR); + } else + { + /* We have a complete telegram */ + /* Check for Acknowledge */ + switch(ptHeader->usDataType) + { + case HIL_TRANSPORT_TYPE_ACKNOWLEDGE: + break; + + case HIL_TRANSPORT_TYPE_QUERYSERVER: + { + if(NULL == ptBuffer) + ptBuffer = HilMarshallerGetBuffer(pvMarshaller, eMARSHALLER_TX_BUFFER, ulConnector); + + if(NULL == ptBuffer) + { + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TSTATE_RESOURCE_ERROR); + + } else + { + PHIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_T ptServerData = (PHIL_TRANSPORT_ADMIN_QUERYSERVER_DATA_T)ptBuffer->abData; + uint32_t ulIdx; + + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TRANSPORT_STATE_OK); + + /* Fill in data */ + ptBuffer->tTransport = ptConnector->ptCurrentRxBuffer->tTransport; + + ptServerData->ulStructVersion = 1; + OS_Memcpy(ptServerData->szServerName, ptMarshaller->szServerName, sizeof(ptServerData->szServerName)); + ptServerData->ulVersionMajor = MARSHALLER_VERSION_MAJOR; + ptServerData->ulVersionMinor = MARSHALLER_VERSION_MINOR; + ptServerData->ulVersionBuild = MARSHALLER_VERSION_BUILD; + ptServerData->ulVersionRevision = MARSHALLER_VERSION_REVISION; +#if defined(HIL_MARSHALLER_PERMANENT_CONNECTION) + ptServerData->ulFeatures = HIL_TRANSPORT_FEATURES_KEEPALIVE | + HIL_TRANSPORT_FEATURES_PERMANENT_CONNECTION; +#else + ptServerData->ulFeatures = HIL_TRANSPORT_FEATURES_KEEPALIVE; +#endif + ptServerData->ulParallelServices = ptConnector->tConn.ulDataBufferCnt; + ptServerData->ulBufferSize = ptConnector->tConn.ulDataBufferSize; + ptServerData->ulDatatypeCnt = ptMarshaller->ulTransports; + + for(ulIdx = 0; ulIdx < ptMarshaller->ulTransports; ++ulIdx) + ptServerData->ausDataTypes[ulIdx] = ptMarshaller->ptTransports[ulIdx].usDataType; + + /* Add the Keep Alive transport type to the list. */ + ptServerData->ausDataTypes[ulIdx] = HIL_TRANSPORT_TYPE_KEEP_ALIVE; /*lint !e661 : see declaration of ptServerData */ + ptServerData->ulDatatypeCnt++; + + /* Calculate the actual response data length. */ + ptBuffer->tMgmt.ulUsedDataBufferLen = (uint32_t)((uint8_t*) ptServerData->ausDataTypes - (uint8_t*) ptServerData + + (ptServerData->ulDatatypeCnt) * sizeof (ptServerData->ausDataTypes[0])); + + if(HIL_MARSHALLER_E_SUCCESS != HilMarshallerConnTxData(pvMarshaller, + ulConnector, + ptBuffer)) + { + HilMarshallerFreeBuffer(ptBuffer); + ptConnector->ptCurrentRxBuffer = NULL; + } else + { + /* Prevent buffer from being freed by ResetRxStateMachine() while not transmitted completely. */ + ptConnector->ptCurrentRxBuffer = NULL; + } + } + } + break; + + /*TODO: Implement Administration commands (QUERY_DEVICE) */ + + case HIL_TRANSPORT_TYPE_KEEP_ALIVE: + { + PHIL_TRANSPORT_KEEPALIVE_DATA_T ptKeepAlive = (PHIL_TRANSPORT_KEEPALIVE_DATA_T)ptConnector->ptCurrentRxBuffer->abData; + unsigned char bState = HIL_TRANSPORT_STATE_OK; + bool fSendAnswer = false; + + if(ptHeader->ulLength != sizeof(*ptKeepAlive)) + { + /* Illegal length of keepalive packet */ + bState = HIL_TSTATE_LENGTH_INCOMPLETE; + + } else if(0 == ptKeepAlive->ulComID) + { + /* New Keepalive ID requested */ + uint32_t ulNewId = OS_GetTickCount(); + + if(0 == ulNewId) + ++ptConnector->ulKeepaliveID; + + if(ulNewId == ptConnector->ulKeepaliveID) + { + ptConnector->ulKeepaliveID = ~ulNewId; + } else + { + ptConnector->ulKeepaliveID = ulNewId; + } + + ptKeepAlive->ulComID = ptConnector->ulKeepaliveID; + fSendAnswer = true; + + } else if(ptKeepAlive->ulComID != ptConnector->ulKeepaliveID) + { + /* ComID does not match, so just return a negative Acknowledge */ + bState = HIL_TSTATE_KEEP_ALIVE_ERROR; + } else + { + /* Everything is fine */ + ptKeepAlive->ulComID = ptConnector->ulKeepaliveID; + fSendAnswer = true; + bState = HIL_TRANSPORT_STATE_OK; + } + + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, bState); + + if(!fSendAnswer) + { + HilMarshallerFreeBuffer(ptConnector->ptCurrentRxBuffer); + ptConnector->ptCurrentRxBuffer = NULL; + + } else if(HIL_MARSHALLER_E_SUCCESS != HilMarshallerConnTxData(pvMarshaller, + ulConnector, + ptConnector->ptCurrentRxBuffer)) + { + HilMarshallerFreeBuffer(ptConnector->ptCurrentRxBuffer); + ptConnector->ptCurrentRxBuffer = NULL; + } else + { + /* Prevent buffer from being freed by ResetRxStateMachine() while not transmitted completely. */ + ptConnector->ptCurrentRxBuffer = NULL; + } + } + break; + + default: + { + TRANSPORT_LAYER_DATA_T* ptTransport = FindTransportLayer(ptMarshaller, ptHeader->usDataType); + + if(NULL == ptTransport) + { + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TSTATE_DATA_TYPE_UNKNOWN); + + HilMarshallerFreeBuffer(ptConnector->ptCurrentRxBuffer); + ptConnector->ptCurrentRxBuffer = NULL; + + } else + { + int iLock; + + SendAcknowledge(ptMarshaller, ulConnector, &ptConnector->tRxHeader, HIL_TRANSPORT_STATE_OK); + + /* Enqueue this request into list, and let user handle it in it's own task + We need to set the current Rx Buffer to NULL, so that ResetRxStateMachine won't + free it. */ + ptConnector->ptCurrentRxBuffer = NULL; + + iLock = OS_Lock(); + STAILQ_INSERT_TAIL(&ptMarshaller->tPendingRequests, ptBuffer, tList); + OS_Unlock(iLock); + + ptMarshaller->pfnRequest(ptMarshaller, ptMarshaller->pvUser); + } + } + break; + } + } + + /* Reset state machine */ + ResetRxStateMachine(ptConnector); + + /* Check if we have processed all incoming data */ + if( 0 == ulDataCnt) + { + /* Start with scan for cookie */ + fDone = 1; + } + } + break; + + default: + ; + break; + } /* end switch state */ + + } while (0 == fDone); + } + + return eRet; +} + +/*****************************************************************************/ +/*! Called by transport when new data should be send to line +* \param pvMarshaller Marshaller handle +* \param ulConnector Connector number +* \param ptBuffer Outgoing data +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerConnTxData(void* pvMarshaller, uint32_t ulConnector, HIL_MARSHALLER_BUFFER_T* ptBuffer) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + CONNECTOR_DATA_T* ptConn = &ptMarshaller->atConnectors[ulConnector]; + + ptBuffer->tTransport.ulLength = ptBuffer->tMgmt.ulUsedDataBufferLen; + + if(ptBuffer->tTransport.ulLength > 0) + { + ptBuffer->tTransport.usChecksum = CalculateCRC16(ptBuffer->abData, + ptBuffer->tTransport.ulLength); + } else + { + ptBuffer->tTransport.usChecksum = 0; + } + + return ptConn->tConn.pfnTransmit(ptBuffer, ptConn->tConn.pvUser); +} + +/*****************************************************************************/ +/*! Called by connector data has been sent +* \param pvMarshaller Marshaller handle +* \param ulConnector Connector number +* \param ptBuffer Outgoing data buffer +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerConnTxComplete(void* pvMarshaller, uint32_t ulConnector, HIL_MARSHALLER_BUFFER_T* ptBuffer) +{ + HilMarshallerFreeBuffer(ptBuffer); + + return HIL_MARSHALLER_E_SUCCESS; +} + +/*****************************************************************************/ +/*! Called by transport layer, during initialization. +* \param pvMarshaller Marshaller handle +* \param ptLayerData Layer registration data +* \return HIL_MARSHALLER_E_SUCCESS on success */ +/*****************************************************************************/ +uint32_t HilMarshallerRegisterTransport(void* pvMarshaller, const TRANSPORT_LAYER_DATA_T* ptLayerData) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + uint32_t eRet; + + if(0 == ptLayerData->usDataType) + { + eRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + + } else if(NULL != FindTransportLayer(ptMarshaller, ptLayerData->usDataType)) + { + /* Another Transport layer is already registered for this datatype (configuration error) */ + eRet = HIL_MARSHALLER_E_ALREADYREGISTERED; + } else + { + uint32_t ulIdx; + + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + /* Search first free array element */ + for(ulIdx = 0; ulIdx < ptMarshaller->ulTransports; ++ulIdx) + { + TRANSPORT_LAYER_DATA_T* ptLayer = &ptMarshaller->ptTransports[ulIdx]; + + if(0 == ptLayer->usDataType) + { + *ptLayer = *ptLayerData; + eRet = HIL_MARSHALLER_E_SUCCESS; + break; + } + } + } + + return eRet; +} + +/*****************************************************************************/ +/*! Called by transport layer, during uninitialization. +* \param pvMarshaller Marshaller handle +* \param usDataType Datatype the layer was registered at */ +/*****************************************************************************/ +void HilMarshallerUnregisterTransport(void* pvMarshaller, uint16_t usDataType) +{ + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + TRANSPORT_LAYER_DATA_T* ptLayer = FindTransportLayer(ptMarshaller, usDataType); + + if(ptLayer != NULL) + { + OS_Memset(ptLayer, 0, sizeof(*ptLayer)); + } +} + +/*****************************************************************************/ +/*! Cyclic timer event, which needs to be called by user for timeout management +* \param pvMarshaller Marshaller handle */ +/*****************************************************************************/ +void HilMarshallerTimer(void* pvMarshaller) +{ + uint32_t ulIdx; + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + + /* Check all transports for polling functions */ + for(ulIdx = 0; ulIdx < ptMarshaller->ulTransports; ++ulIdx) + { + TRANSPORT_LAYER_DATA_T* ptLayer = &ptMarshaller->ptTransports[ulIdx]; + + if(ptLayer->pfnPoll) + ptLayer->pfnPoll(ptLayer->pvUser); + } + + /* Check all connectors for polling functions */ + for(ulIdx = 0; ulIdx < ptMarshaller->ulMaxConnectors; ++ulIdx) + { + CONNECTOR_DATA_T* ptConn = &ptMarshaller->atConnectors[ulIdx]; + + /* Timeout management for all connector Rx state machines */ + /* Check if the RX state machine is active */ + if(ptConn->fMonitorTimeout) + { + /* Incremet the elapsed time */ + ptConn->ulElapsedTime += 10; + + if( ptConn->tConn.ulTimeout < ptConn->ulElapsedTime) + { + ResetRxStateMachine( ptConn); + } + } + + if(ptConn->fInUse && ptConn->tConn.pfnPoll) + ptConn->tConn.pfnPoll(ptConn->tConn.pvUser); + } +} + +/*****************************************************************************/ +/*! Main marshaller module. This must be called by user, every time it receives +* the pfnRequest callback. +* \param pvMarshaller Marshaller handle +* \return HIL_MARSHALLER_E_SUCCESS on success +* \and HIL_MARSHALLER_E_FAIL if no message retrieved from the pending requests list */ +/*****************************************************************************/ +uint32_t HilMarshallerMain(void* pvMarshaller) +{ + uint32_t eRet = HIL_MARSHALLER_E_SUCCESS; + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*) pvMarshaller; + int iLock = 0; + HIL_MARSHALLER_BUFFER_T* ptBuffer = NULL; + TRANSPORT_LAYER_DATA_T* ptTransport = NULL; + CONNECTOR_DATA_T* ptConn = NULL; + + if (ptMarshaller == NULL) + eRet = HIL_MARSHALLER_E_FAIL; + else + { + iLock = OS_Lock(); + ptBuffer = STAILQ_FIRST(&ptMarshaller->tPendingRequests); + OS_Unlock(iLock); + if (ptBuffer == NULL) + eRet = HIL_MARSHALLER_E_FAIL; + else + { + ptTransport = FindTransportLayer(ptMarshaller, ptBuffer->tTransport.usDataType); + ptConn = &ptMarshaller->atConnectors[ptBuffer->tMgmt.ulConnectorIdx]; + if (ptTransport == NULL || ptConn == NULL) + eRet = HIL_MARSHALLER_E_FAIL; + else + { + iLock = OS_Lock(); + STAILQ_REMOVE(&ptMarshaller->tPendingRequests, ptBuffer, HIL_MARSHALLER_BUFFER_Ttag, tList); + OS_Unlock(iLock); + + ptTransport->pfnHandler(ptMarshaller, ptBuffer, ptTransport->pvUser); + } + } + } + return eRet; +} + +/*****************************************************************************/ +/*! HilMarshallerSetMode() sets the mode (unrestricted / restricted / disabled) +* either of a single connector or of all connectors. +* \param pvMarshaller Marshaller handle +* \param ulMode see MARSHALLER_MODE_xxx constants above +* \param ulConnectorID connector index or MARSHALLER_CONNECTORS_ALL +* \return HIL_MARSHALLER_E_SUCCESS on success +* \ HIL_MARSHALLER_E_INVALIDPARAMETER if mode invalid +* \ HIL_MARSHALLER_E_OUTOFRESOURCES if connector reference invalid */ +/*****************************************************************************/ + +uint32_t HilMarshallerSetMode(void* pvMarshaller, + uint32_t ulMode, + uint32_t ulConnectorID) +{ + uint32_t eRet = HIL_MARSHALLER_E_SUCCESS; + HIL_MARSHALLER_DATA_T* ptMarshaller = (HIL_MARSHALLER_DATA_T*)pvMarshaller; + uint32_t ulIndex; + uint32_t ulMinConnectorID = ulConnectorID; + uint32_t ulMaxConnectorID = ulConnectorID + 1; + + /* check the scope of the command (single connector / all connectors) */ + if (ulConnectorID == HIL_MARSHALLER_CONNECTORS_ALL) + { /* change mode of all connectors */ + ulMinConnectorID = 0; + ulMaxConnectorID = ptMarshaller->ulMaxConnectors; + } + else + { /* check the given connector index */ + if (ulConnectorID > ptMarshaller->ulMaxConnectors) + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + } + if (eRet == HIL_MARSHALLER_E_SUCCESS) + { + switch (ulMode) + { + case HIL_MARSHALLER_MODE_ENABLED: + { /* set mode for a single connector or for all connectors */ + for (ulIndex = ulMinConnectorID; ulIndex < ulMaxConnectorID; ulIndex++) + ptMarshaller->atConnectors[ulIndex].ulMode = ulMode; + break; + } + case HIL_MARSHALLER_MODE_DISABLED: + { /* set mode for a single connector or for all connectors */ + for (ulIndex = ulMinConnectorID; ulIndex < ulMaxConnectorID; ulIndex++) + ptMarshaller->atConnectors[ulIndex].ulMode = ulMode; + break; + } + default: + { /* invalid mode parameter */ + eRet = HIL_MARSHALLER_E_INVALIDPARAMETER; + } + } + } + return (eRet); +} + + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/examples/tcpserver/Marshaller/MarshallerConfig.h b/examples/tcpserver/Marshaller/MarshallerConfig.h new file mode 100644 index 0000000..fdbcf3a --- /dev/null +++ b/examples/tcpserver/Marshaller/MarshallerConfig.h @@ -0,0 +1,157 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Id: MarshallerConfig.h 13309 2019-11-05 12:03:27Z AlexanderMinor $ + Last Modification: + $Author: AlexanderMinor $ + $Date: 2019-11-05 13:03:27 +0100 (Di, 05 Nov 2019) $ + $Revision: 13309 $ + + Targets: + OS independent : yes + + Description: + Public Hilscher transport marshaller definitions + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 4 06.07.2010 MT Change: + - Added new configuration elements per + connector for configuration of TX Buffers (see HIL_MARSHALLER_CONNECTOR_PARAMS_T) + 3 22.09.2009 MS Addon: + Added HilMarshallerSetMode(), and mode constants + 2 02.09.2009 MS Change: + HilMarshallerMain() returns TLR_E_FAIL if no message can be retrieved from the pending requests list. + 1 25.05.2009 MT initial version + +**************************************************************************************/ + +#ifndef __MARSHALLERCONFIG__H +#define __MARSHALLERCONFIG__H + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_CONFIGURATION +* \{ */ +/*****************************************************************************/ + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + +#include "HilTransport.h" + +/* Use generic Results errors for Marshaller errors */ +#define HIL_MARSHALLER_E_SUCCESS ((uint32_t)0x00000000L) /* TLR_S_OK */ +#define HIL_MARSHALLER_E_FAIL ((uint32_t)0xC0000001L) /* TLR_E_FAIL */ +#define HIL_MARSHALLER_E_OUTOFMEMORY ((uint32_t)0xC0000003L) /* TLR_E_OUTOFMEMORY */ +#define HIL_MARSHALLER_E_INVALIDPARAMETER ((uint32_t)0xC0000009L) /* TLR_E_INVALID_PARAMETER */ +#define HIL_MARSHALLER_E_OUTOFRESOURCES ((uint32_t)0xC0000100L) /* TLR_E_INIT_FAULT */ +#define HIL_MARSHALLER_E_ALREADYREGISTERED ((uint32_t)0xC0000201L) /* TLR_E_APPLICATION_ALREADY_REGISTERED */ + +/* mode constants for Marshaller mode request */ +#define HIL_MARSHALLER_MODE_ENABLED 0 /* no restrictions */ +#define HIL_MARSHALLER_MODE_DISABLED 1 /* no access (connector blocked) */ + +/* special connector ID for Marshaller mode setup */ +#define HIL_MARSHALLER_CONNECTORS_ALL 0xFFFFFFFF /* command applies to all connectors */ + + +struct HIL_MARSHALLER_CONNECTOR_PARAMS_Ttag; + +typedef uint32_t(*PFN_CONN_INIT)(const struct HIL_MARSHALLER_CONNECTOR_PARAMS_Ttag* ptParams, void* pvMarshaller); + +/*****************************************************************************/ +/*! Connector parameter dara (needed for registration at marshaller) */ +/*****************************************************************************/ +struct HIL_MARSHALLER_CONNECTOR_PARAMS_Ttag +{ + PFN_CONN_INIT pfnConnectorInit; /*!< Array of function pointer to initialize Connectors */ + + uint32_t ulDataBufferSize; /*!< Size for the RX buffers in Bytes */ + uint32_t ulDataBufferCnt; /*!< Number of RX buffers to allocate per Connector */ + + uint16_t usFlags; /*! connection management flags, see HIL_MARSHALLER_CONNECTION_FLAG_xxx */ + uint32_t ulTimeout; /*!< timeout in ms, see HIL_MARSHALLER_CONNECTION_TIMEOUT_xxx */ + void* pvConfigData; /*!< Depends on CONNECTION_TYPE */ + + /* NOTE: These information were added to the end of the structure to be old + compatible. When using the previous structure initializations these fields + will automatically be set to 0 */ + uint32_t ulTxBufferSize; /*!< TX Buffer size for unsolicited packets / calls (indication / callbacks) */ + uint32_t ulTxBufferCnt; /*!< TX Buffer count for unsolicited packets / calls (indication / callbacks) */ +}; + +typedef struct HIL_MARSHALLER_CONNECTOR_PARAMS_Ttag HIL_MARSHALLER_CONNECTOR_PARAMS_T; + +typedef uint32_t(*PFN_TRANSPORT_INIT)(void* pvMarshaller, void* pvConfig); + +/*****************************************************************************/ +/*! Transport layer configuration */ +/*****************************************************************************/ +typedef struct TRANSPORT_LAYER_CONFIG_Ttag +{ + PFN_TRANSPORT_INIT pfnInit; /*!< Initialization function */ + void* pvConfig; /*!< Configuration data */ + +} TRANSPORT_LAYER_CONFIG_T; + +typedef void(*PFN_MARSHALLER_REQUEST)(void* pvMarshaller, void* pvUser); + +/*****************************************************************************/ +/*! Marshaller startup parameters */ +/*****************************************************************************/ +typedef struct HIL_MARSHALLER_PARAMS_Ttag +{ + char szServerName[32]; + uint32_t ulMaxConnectors; /*!< Maximum number of connectors */ + + uint32_t ulConnectorCnt; /*!< Number of connectors to automatically load at startup */ + const HIL_MARSHALLER_CONNECTOR_PARAMS_T* ptConnectors; + + /* Add transport layers, currently only cifX and rcX Packet support */ + uint32_t ulTransportCnt; /*!< Number of transports to automatically load at startup */ + const TRANSPORT_LAYER_CONFIG_T* atTransports; /*!< Array of function pointer to initialize Transports */ + +} HIL_MARSHALLER_PARAMS_T; + + +/*****************************************************************************/ +/*! Marshaller function prototypes */ +/*****************************************************************************/ + +uint32_t HilMarshallerStart (const HIL_MARSHALLER_PARAMS_T* ptParams, void** ppvMarshHandle, PFN_MARSHALLER_REQUEST pfnRequest, void* pvUser); +void HilMarshallerStop (void* pvMarshHandle); +void HilMarshallerTimer (void* pvMarshaller); +uint32_t HilMarshallerMain (void* pvMarshaller); + + +/*****************************************************************************/ +/*! HilMarshallerSetMode() sets the mode (unrestricted / restricted / disabled) +* either of a single connector or of all connectors. +* \param pvMarshaller Marshaller handle +* \param ulMode see MARSHALLER_MODE_xxx constants above +* \param ulConnectorID connector index or MARSHALLER_CONNECTORS_ALL +* \return HIL_MARSHALLER_E_SUCCESS on success +* \ HIL_MARSHALLER_E_INVALIDPARAMETER if mode invalid +* \ HIL_MARSHALLER_E_OUTOFRESOURCES if connector reference invalid */ +/*****************************************************************************/ + +uint32_t HilMarshallerSetMode(void* pvMarshaller, + uint32_t ulMode, + uint32_t ulConnectorID); + +#ifdef __cplusplus + } +#endif /* __cplusplus */ + +/*****************************************************************************/ +/* \} */ +/*****************************************************************************/ + +#endif /* __MARSHALLERCONFIG__H */ diff --git a/examples/tcpserver/Marshaller/MarshallerErrors.h b/examples/tcpserver/Marshaller/MarshallerErrors.h new file mode 100644 index 0000000..317dbf2 --- /dev/null +++ b/examples/tcpserver/Marshaller/MarshallerErrors.h @@ -0,0 +1,54 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Workfile: OS_Dependent.h $ + Last Modification: + $Author: MichaelT $ + $Modtime: 4.05.07 15:17 $ + $Revision: 1034 $ + + Targets: + Win32/ANSI : yes + Win32/Unicode: yes (define _UNICODE) + WinCE : yes + + Description: + Marshaller Error code definitions + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 1 07.07.2006 MT intitial version + +**************************************************************************************/ + +#ifndef __MARSHALLERERRORS__H +#define __MARSHALLERERRORS__H + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_MAIN +* \{ */ +/*****************************************************************************/ + +#define MARSHALLER_NO_ERROR 0x00000000 + +#define MARSHALLER_E_NOTINITIALIZED 0x800D0000 +#define MARSHALLER_E_INVALIDHANDLE 0x800D0001 +#define MARSHALLER_E_INVALIDOBJECTTYPE 0x800D0002 +#define MARSHALLER_E_INVALIDMETHODID 0x800D0003 +#define MARSHALLER_E_INVALIDPARAMETER 0x800D0004 + +#define MARSHALLER_E_BUSY 0x800D0010 + +#define MARSHALLER_E_UNSUPPORTED_TYPE 0x800D0020 + +/*****************************************************************************/ +/* \} */ +/*****************************************************************************/ + +#endif /* __MARSHALLERERRORS__H */ diff --git a/examples/tcpserver/Marshaller/MarshallerInternal.h b/examples/tcpserver/Marshaller/MarshallerInternal.h new file mode 100644 index 0000000..e46812d --- /dev/null +++ b/examples/tcpserver/Marshaller/MarshallerInternal.h @@ -0,0 +1,237 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Id: MarshallerInternal.h 13309 2019-11-05 12:03:27Z AlexanderMinor $ + Last Modification: + $Author: AlexanderMinor $ + $Date: 2019-11-05 13:03:27 +0100 (Di, 05 Nov 2019) $ + $Revision: 13309 $ + + Targets: + OS independent : yes + + Description: + Marshaller internal structure definitions + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 5 06.07.2010 MT Change: + - Re-Added Tx Buffers, as they were used by + Packet Transport + - Added new configuration elements per + connector for configuration of TX Buffers (see HIL_MARSHALLER_CONNECTOR_T) + 4 23.09.2009 MS Change: + - Removed unused Tx buffers and doubled number of Rx buffers to avoid resource errors without increasing memory footprint. + 3 22.09.2009 MS Addon: + - Added member ulMode to CONNECTOR_DATA_T. + 2 28.07.2009 MS Change: + - Moved Marshaller version constants to MarshallerVersion.h. + 1 25.05.2009 MT initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file MarshallerInternal.h +* Internal structure and API definitions of the netX Marshaller */ +/*****************************************************************************/ + +#ifndef __MARSHALLERINTERNAL__H +#define __MARSHALLERINTERNAL__H + +#include "cifXAPI_Wrapper.h" +#include "MarshallerConfig.h" +#include "HilTransport.h" +#include +#include + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_INTERNAL +* \{ */ +/*****************************************************************************/ + +#ifdef __cplusplus + extern "C" { +#endif + +typedef enum MARSHALLER_BUFFER_TYPE_Etag +{ + eMARSHALLER_RX_BUFFER, + eMARSHALLER_TX_BUFFER, + eMARSHALLER_ACK_BUFFER, + eMARSHALLER_KEEPALIVE_BUFFER, + +} MARSHALLER_BUFFER_TYPE_E; + +/*****************************************************************************/ +/*! Marshaller Send/Receive buffer structure */ +/*****************************************************************************/ +struct HIL_MARSHALLER_BUFFER_Ttag +{ + /* Single linked list */ + STAILQ_ENTRY(HIL_MARSHALLER_BUFFER_Ttag) tList; + + struct + { + uint32_t ulConnectorIdx; /*!< Connector number of this buffer */ + void* pvMarshaller; /*!< Marshaller object this buffer has been allocated by */ + + MARSHALLER_BUFFER_TYPE_E eType; /*!< Type of buffer */ + + uint32_t ulDataBufferLen; /*!< Total length of buffer (only counting the size of abData[] */ + uint32_t ulUsedDataBufferLen; /*!< Number of used bytes in abData[] */ + + uint32_t ulActualSendOffset; /*!< Can be used by connector for fragmented sending */ + } tMgmt; + + HIL_TRANSPORT_HEADER tTransport; /*!< Transport header */ + uint8_t abData[1]; /*!< User data */ +}; + +typedef struct HIL_MARSHALLER_BUFFER_Ttag HIL_MARSHALLER_BUFFER_T; + +typedef uint32_t(*PFN_CONN_TRANSMIT)(HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); +typedef void(*PFN_CONN_DEINIT)(void* pvUser); +typedef void(*PFN_CONN_POLL)(void* pvUser); + +/*****************************************************************************/ +/*! Connector registration information (filled by Connector) */ +/*****************************************************************************/ +typedef struct HIL_MARSHALLER_CONNECTOR_Ttag +{ + PFN_CONN_TRANSMIT pfnTransmit; /*!< Transmit function */ + PFN_CONN_DEINIT pfnDeinit; /*!< Uninitialization function */ + PFN_CONN_POLL pfnPoll; /*!< Function to call, if the connector needs to be polled */ + + uint32_t ulDataBufferSize; /*!< Size for the RX buffers in Bytes */ + uint32_t ulDataBufferCnt; /*!< Number of RX buffers to allocate per Connector */ + uint32_t ulTimeout; /*!< Timeout for RX state machine */ + + void* pvUser; /*!< User parameter to provide on function calls */ + + /* NOTE: These information were added to the end of the structure to be old + compatible. When using the previous structure initializations these fields + will automatically be set to 0 */ + uint32_t ulTxBufferSize; /*!< TX Buffer size for unsolicited packets / calls (indication / callbacks) */ + uint32_t ulTxBufferCnt; /*!< TX Buffer count for unsolicited packets / calls (indication / callbacks) */ + +} HIL_MARSHALLER_CONNECTOR_T; + +typedef void(*PFN_TRANSPORT_HANDLER)(void* pvMarshaller, HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser); +typedef void(*PFN_TRANSPORT_DEINIT)(void* pvUser); +typedef void(*PFN_TRANSPORT_POLL)(void* pvUser); + +/*****************************************************************************/ +/*! Transport layer registration information */ +/*****************************************************************************/ +typedef struct TRANSPORT_LAYER_DATA_Ttag +{ + uint16_t usDataType; + uint16_t usReserved; + PFN_TRANSPORT_HANDLER pfnHandler; + PFN_TRANSPORT_DEINIT pfnDeinit; + PFN_TRANSPORT_POLL pfnPoll; + void* pvUser; +} TRANSPORT_LAYER_DATA_T; + +/* This function is called by a connector when it receives data from the line */ +uint32_t HilMarshallerConnRxData(void* pvMarshaller, uint32_t ulConnector, uint8_t* pbData, uint32_t ulDataCnt); + +/* This function is called by a transport, to send an answer */ +uint32_t HilMarshallerConnTxData(void* pvMarshaller, uint32_t ulConnector, HIL_MARSHALLER_BUFFER_T* ptBuffer); + +/* This function is called by a connector, to signal transfer complete */ +uint32_t HilMarshallerConnTxComplete(void* pvMarshaller, uint32_t ulConnector, HIL_MARSHALLER_BUFFER_T* ptBuffer); + +/* Connector registration/deregistration */ +uint32_t HilMarshallerRegisterConnector(void* pvMarshaller, uint32_t* pulConnectorIdx, HIL_MARSHALLER_CONNECTOR_T* ptConn); +void HilMarshallerUnregisterConnector(void* pvMarshaller, uint32_t ulConnectorIdx); + +/* Register data transport layers */ +uint32_t HilMarshallerRegisterTransport(void* pvMarshaller, const TRANSPORT_LAYER_DATA_T* ptLayerData); +void HilMarshallerUnregisterTransport(void* pvMarshaller, uint16_t usDataType); + +void HilMarshallerFreeBuffer(HIL_MARSHALLER_BUFFER_T* ptBuffer); +HIL_MARSHALLER_BUFFER_T* HilMarshallerGetBuffer(void* pvMarshaller, MARSHALLER_BUFFER_TYPE_E eType, uint32_t ulConnector); + + +/*****************************************************************************/ +/*! Enum for the receive data state machine */ +/*****************************************************************************/ +typedef enum +{ + HIL_SCAN_DONE = 0, + HIL_SEARCH_TELEGRAM_COOKIE, + HIL_SEARCH_TELEGRAM_HEADER, + HIL_WAIT_TELEGRAM_DATA, + HIL_CHECK_TELEGRAM +} HIL_SCAN_STATE_E; + +STAILQ_HEAD(MARSHALLER_BUFFER_HEAD, HIL_MARSHALLER_BUFFER_Ttag); + +/*****************************************************************************/ +/*! Marshaller internal connector data storage */ +/*****************************************************************************/ +typedef struct CONNECTOR_DATA_Ttag +{ + bool fInUse; /*!< TRUE if connector slot is in use (contains a registered connector) */ + uint32_t ulConnectorIdx; /*!< Number of the connector */ + uint32_t ulMode; /*!< connector mode, see MARSHALLER_MODE_xxx constants */ + + /* Connector Registration data */ + HIL_MARSHALLER_CONNECTOR_T tConn; /*!< Registration data */ + + /* Data for parsing RX telegram data */ + HIL_SCAN_STATE_E eScanState; /*!< Current state of receive state machine */ + HIL_TRANSPORT_HEADER tRxHeader; /*!< Transport header used by parser for start of frame detection */ + uint32_t ulRxOffset; /*!< Current receive offset inside tRxHeader (used by parser) */ + bool fMonitorTimeout; /*!< TRUE if timeout should be monitored */ + uint32_t ulElapsedTime; /*!< Time since last scanner process, used for RX data timeout */ + + uint32_t ulKeepaliveID; /*!< Last valid keep alive ID */ + + HIL_MARSHALLER_BUFFER_T* ptCurrentRxBuffer;/*!< Current used RX buffer to collect data */ + + /* RX / Ack Buffer list */ + struct MARSHALLER_BUFFER_HEAD tRxBuffer; + struct MARSHALLER_BUFFER_HEAD tTxBuffer; + struct MARSHALLER_BUFFER_HEAD tAckBuffer; + struct MARSHALLER_BUFFER_HEAD tKeepAliveBuffer; + +} CONNECTOR_DATA_T; + +/*****************************************************************************/ +/*! Marshaller data storage */ +/*****************************************************************************/ +typedef struct HIL_MARSHALLER_DATA_Ttag +{ + char szServerName[HIL_TRANSPORT_QUERYSERVER_NAMELEN]; + uint32_t ulMaxConnectors; /*!< Maximum number of connectors (size of atConnectors[]) */ + CONNECTOR_DATA_T* atConnectors; /*!< Array of available connectors */ + + /* cifX API Layer configuration */ + uint32_t ulTransports; /*!< Number of available transport handler */ + TRANSPORT_LAYER_DATA_T* ptTransports; /*!< Array of available transport handler */ + + struct MARSHALLER_BUFFER_HEAD tPendingRequests; + + PFN_MARSHALLER_REQUEST pfnRequest; + void* pvUser; + +} HIL_MARSHALLER_DATA_T; + +#ifdef __cplusplus + } +#endif + + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __MARSHALLERINTERNAL__H */ diff --git a/examples/tcpserver/Marshaller/MarshallerVersion.h b/examples/tcpserver/Marshaller/MarshallerVersion.h new file mode 100644 index 0000000..7932bd5 --- /dev/null +++ b/examples/tcpserver/Marshaller/MarshallerVersion.h @@ -0,0 +1,90 @@ +/****************************************************************************** + File : MarshallerTask.h +------------------------------------------------------------------------------- + Author : Hilscher GmbH + + Copyright : (c) 2009 Hilscher GmbH. All rights reserved. + Redistribution or use without without Hilscher's express + written permission is prohibited. + + Project : netX Marshaller +------------------------------------------------------------------------------- + Description : Version information for netX Marshaller +------------------------------------------------------------------------------- + Changes: + + Date Author Modification + ---------- ------------- ------------------------------------------------ + 2009-09-14 M. Streubel Added MARSHALLER_VERSION_TEXT. + 2009-09-01 M. Streubel Version change to 2.0.x.0. + 2009-07-28 M. Streubel File created. +******************************************************************************/ + + +#ifndef __MARSHALLER_VERSION_H +#define __MARSHALLER_VERSION_H + + + +/*****************************************************************************/ +/* Include Files Required */ +/*****************************************************************************/ + + +/* none */ + + + +/*****************************************************************************/ +/* Symbol Definitions */ +/*****************************************************************************/ + + +#define MARSHALLER_VERSION_MAJOR 2 +#define MARSHALLER_VERSION_MINOR 4 +#define MARSHALLER_VERSION_BUILD 0 +#define MARSHALLER_VERSION_REVISION 1 +#define MARSHALLER_VERSION_TEXT "2.4.0.1" + +#define MARSHALLER_DATE_YEAR 2022 +#define MARSHALLER_DATE_MONTH 7 +#define MARSHALLER_DATE_DAY 15 + + + +/*****************************************************************************/ +/* Class, Type, and Structure Definitions */ +/*****************************************************************************/ + + +/* none */ + + +/*****************************************************************************/ +/* Global Variables */ +/*****************************************************************************/ + + +/* none */ + + + +/*****************************************************************************/ +/* Macros */ +/*****************************************************************************/ + + +/* none */ + + + +/*****************************************************************************/ +/* Functions */ +/*****************************************************************************/ + + +/* none */ + + + +#endif /* __MARSHALLER_VERSION_H */ diff --git a/examples/tcpserver/Marshaller/OSAbstraction/OS_Custom.c b/examples/tcpserver/Marshaller/OSAbstraction/OS_Custom.c new file mode 100644 index 0000000..240b22f --- /dev/null +++ b/examples/tcpserver/Marshaller/OSAbstraction/OS_Custom.c @@ -0,0 +1,115 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Custom.c 13819 2020-11-25 09:36:58Z AMinor $: + + Description: + Target system abstraction layer + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2011-12-13 added OS_Time() function body + 2006-08-07 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file OS_Custom.c +* Sample Target system abstraction layer. Implementation must be done +* according to used target system */ +/*****************************************************************************/ + +#include "OS_Dependent.h" + +#error "Implement target system abstraction in this file" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_OS_ABSTRACTION Operating System Abstraction +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Memory allocation function +* NOTE: Malloc with size 0 should be prevented and returns a NULL pointer +* \param ulSize Length of memory to allocate +* \return Pointer to allocated memory */ +/*****************************************************************************/ +void* OS_Malloc(uint32_t ulSize) +{ + if( 0 == ulSize) + return NULL; +} + +/*****************************************************************************/ +/*! Memory freeing function +* \param pvMem Memory block to free */ +/*****************************************************************************/ +void OS_Free(void* pvMem) +{ +} + +/*****************************************************************************/ +/*! Memory setting +* \param pvMem Memory block +* \param bFill Byte to use for memory initialization +* \param ulSize Memory size for initialization) */ +/*****************************************************************************/ +void OS_Memset(void* pvMem, uint8_t bFill, uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Copy memory from one block to another +* \param pvDest Destination memory block +* \param pvSrc Source memory block +* \param ulSize Copy size in bytes */ +/*****************************************************************************/ +void OS_Memcpy(void* pvDest, void* pvSrc, uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Compare characters of two strings without regard to case +* \param pszBuf1 First buffer +* \param pszBuf2 Second buffer +* \param ulLen Number of characters to compare +* \return 0 if strings are equal */ +/*****************************************************************************/ +int OS_Strnicmp(const char* pszBuf1, const char* pszBuf2, uint32_t ulLen) +{ +} + +/*****************************************************************************/ +/*! Enter a critical section/spinlock +* \return Handle to the critical section/spinlock */ +/*****************************************************************************/ +int OS_Lock(void) +{ +} + +/*****************************************************************************/ +/*! Leave a critical section/spinlock +* \param iLock Handle to the locked object */ +/*****************************************************************************/ +void OS_Unlock(int iLock) +{ +} + +/*****************************************************************************/ +/*! Get Millisecond counter value (used for timeout handling) +* Retrieves the number of milliseconds that have elapsed since the system +* was started. +* Note: Depending on the timer resolution this value can wrap around +* \return Counter value with a resolution of 1ms */ +/*****************************************************************************/ +uint32_t OS_GetTickCount(void) +{ +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/examples/tcpserver/Marshaller/OSAbstraction/OS_Includes.h b/examples/tcpserver/Marshaller/OSAbstraction/OS_Includes.h new file mode 100644 index 0000000..244141e --- /dev/null +++ b/examples/tcpserver/Marshaller/OSAbstraction/OS_Includes.h @@ -0,0 +1,34 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Includes.h 13819 2020-11-25 09:36:58Z AMinor $: + + Description: + Headerfile for specific target system includes, data types and definitions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2006-08-08 initial version (special OS dependencies must be added) + +**************************************************************************************/ + +#ifndef __OS_INCLUDES__H +#define __OS_INCLUDES__H + +/* + #error "Insert needed Target system definitions, data types and header files here" + + #define APIENTRY + + #ifndef NULL + #define NULL 0 + #endif + + #define UNREFERENCED_PARAMETER(a) (a=a) +*/ + +#endif /* __OS_INCLUDES__H */ diff --git a/examples/tcpserver/Marshaller/OS_Dependent.h b/examples/tcpserver/Marshaller/OS_Dependent.h new file mode 100644 index 0000000..8a8f9ae --- /dev/null +++ b/examples/tcpserver/Marshaller/OS_Dependent.h @@ -0,0 +1,50 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Dependent.h 13819 2020-11-25 09:36:58Z AMinor $: + + Description: + OS Dependent function declaration. These functions must be implemented for the + toolkit, to allow abstraction from the operating system + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2020-11-12 Created from the cifX Toolkit + +**************************************************************************************/ + +#ifndef __OS_DEPENDENT__H +#define __OS_DEPENDENT__H + +#include +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + +void* OS_Malloc(uint32_t ulSize); +void OS_Free(void* pvMem); + +void OS_Memset(void* pvMem, uint8_t bFill, uint32_t ulSize); +void OS_Memcpy(void* pvDest, void* pvSrc, uint32_t ulSize); + +int OS_Strnicmp(const char* pszBuf1, const char* pszBuf2, uint32_t ulLen); + +int OS_Lock(void); +void OS_Unlock(int iLock); + +uint32_t OS_GetTickCount(void); + + +#ifdef __cplusplus +} +#endif + + +#endif /* __OS_DEPENDENT__H */ diff --git a/examples/tcpserver/Marshaller/Version History.txt b/examples/tcpserver/Marshaller/Version History.txt new file mode 100644 index 0000000..cd560a4 --- /dev/null +++ b/examples/tcpserver/Marshaller/Version History.txt @@ -0,0 +1,245 @@ +############################################################################# +# # +# netX Marshaller (Device Side) # +# # +############################################################################# + + +General Notes +------------- +The versions are given in the form "...". +This is in line with the canonical numbering for all Hilscher firmware. +The dates are given in the international date format (yyyy-mm-dd). + + + +############################################################################# +# # +# Version History # +# # +############################################################################# + +V2.4.0.1 (2022-07-15) +---------------------- +Changes: + - None + +Add-ons: + - None + +Bug fixes: + - HilMarshallerSetMode() fails to change state of a single connector + +V2.4.0.0 (2020-11-26) +---------------------- +Changes: + - Added a separate OS abstraction directory + +Add-ons: + - None + +Bug fixes: + - Devices without Communication Channels may stop Marshaller initialization + +V2.3.0.0 (2019-11-08) +---------------------- +Changes: + - Remove TLR defines/types from project + - Update cifXAPI header to 20191108-00 + - Update APIHeader to V2.3.0.0 + +Add-ons: + - None + +Bug fixes: + - None. + +V2.2.0.0 (2019-08-15) +---------------------- +Changes: + - Update APIHeader to V2.2.0.0 + +Add-ons: + - None + +Bug fixes: + - None. + +V2.1.0.0 (2019-03-28) +---------------------- +Changes: + - Update APIHeader to V2.1.0.0 + +Add-ons: + - Added support for xSysdeviceResetEx call. + +Bug fixes: + - None. + +V2.0.20.0 (2019-01-28) +---------------------- +Changes: + - None. + +Add-ons: + - None. + +Bug fixes: + - Fixed wrong deinitialization order in HilMarshallerStop() + +V2.0.19.0 (2018-08-17) +---------------------- +Changes: + - None. + +Add-ons: + - None. + +Bug fixes: + - Fixed pclint warnings + +V2.0.18.0 (2015-07-22) +---------------------- +Changes: + - Changed platform depending datatypes to fixed data types to be usable on 64Bit systems + +Add-ons: + - None. + +Bug fixes: + - Fixed compiler warnings created by implicit data conversion on 64Bit systems + +V2.0.17.0 (2014-08-19) +---------------------- +Changes: + - Update common netx headers to support structure packing + on armcc and IAR (arm cores only) compiler + +Add-ons: + - None. + +Bug fixes: + - Access to closed channel instance may cause system crash + + +V2.0.16.0 (2013-10-11) +---------------------- +Changes: + - Updated cifXUser header to latest version + +Add-ons: + - Added support for xDriverRestartDevice call + - Added feature to tell if the remote device has a permanent + connection, that does not drop connection on resets + For this feature you need to set define HIL_MARSHALLER_PERMANENT_CONNECTION + +Bug fixes: + - Added CRC checking for usChecksum in the netXTransport header + + +V2.0.15.0 (2013-05-06) +---------------------- +Changes: + - updated cifX error codes + - IO-Timer parameter changed + - updated comments to doxgen style + +Add-ons: + - added transport types (INX, netAnalyzer, netPLC) + +Bug fixes: + - mailbox/IO callbacks + - ACK's or zero length packets, may be send with a checksum (!=0) + +V2.0.14.0 (2010-07-06) +---------------------- +Changes: + - Re-Added Tx Buffers for transports / Connectors that might need them + ATTENTION: This results in a change of the connector configuration structure + by introducing two new parameters (ulTxBufferSize / ulTxBufferCnt) + in the structure HIL_MARSHALLER_CONNECTOR_PARAMS_Ttag / HIL_MARSHALLER_CONNECTOR_T. + Make sure to adjust connectors if they needs this parameter. + +V2.0.13.0 (2010-06-28) +---------------------- +Changes: + - new TLR_Types.h, TLR_Result.h, cifXUser.h + - 64-bit support + - change '//' -> '/* */' + +Add-ons: + - none + +Bug fixes: + - Several cifX API calls don't called via function pointer table + +V2.0.12.0 (2010-04-01) +---------------------- +Changes: + - None. + +Add-ons: + - None. + +Bug fixes: + - Packet transport: corrected the area index in RCX_DPM_GET_COMFLAG_INFO_REQ packet (if areaindex= 0xFFFFFFFF). + + +V2.0.11.0 (2010-03-26) +---------------------- +Changes: + - None. + +Add-ons: + - None. + +Bug fixes: + - Packet transport: Evaluation of RCX_DPM_GET_COMFLAG_INFO_REQ packet now uses channel number from transport header if area index is SYSTEM (0xFFFFFFFF). + + +V2.0.10.0 (2010-01-19) +---------------------- +Changes: + - None. + +Add-ons: + - None. + +Bug fixes: + - TCP connector: Send multiple packets to TCP stack if size of send buffer contents exceeds rcX packet data size. + + +V2.0.9.0 (2009-11-27) +--------------------- +Changes: + - TCP connector: Increased TCP_CONNECTOR_DEFAULT_SEND_TIMEOUT to 1000 ms. (Prevents connection loss after Channel Init.) + +Add-ons: + - None. + +Bug fixes: + - None. + + +B2.0.8.0 (2009-11-13) +--------------------- +Changes: + - TCP connector: Removed requirement for valid subnet mask when retrieving IP parameters to check TCP stack startup status. + +Add-ons: + - None. + +Bug fixes: + - None. + + +V2.0.7.0 (2009-10-09) +--------------------- +Changes: + - Initial version. + +Add-ons: + - None. + +Bug fixes: + - None. diff --git a/examples/tcpserver/Marshaller/cifXAPI/cifXErrors.h b/examples/tcpserver/Marshaller/cifXAPI/cifXErrors.h new file mode 100644 index 0000000..0394e93 --- /dev/null +++ b/examples/tcpserver/Marshaller/cifXAPI/cifXErrors.h @@ -0,0 +1,960 @@ +#ifndef __CIFXERRORS_H__ +#define __CIFXERRORS_H__ + +/******************************************************************************* +* CIFX Device Driver Errors +*******************************************************************************/ +/* */ +/* Values are 32 bit values laid out as follows: */ +/* */ +/* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 */ +/* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* |Sev|C|R| Facility | Code | */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* */ +/* where */ +/* */ +/* Sev - is the severity code */ +/* */ +/* 00 - Success */ +/* 01 - Informational */ +/* 10 - Warning */ +/* 11 - Error */ +/* */ +/* C - is the Customer code flag */ +/* */ +/* R - is a reserved bit */ +/* */ +/* Facility - is the facility code */ +/* */ +/* Code - is the facility's status code */ +/* */ +/* */ +/* Define the facility codes */ +/* */ + + +/* */ +/* Define the severity codes */ +/* */ + + +/* */ +/* MessageId: CIFX_NO_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* No Error */ +/* */ +#define CIFX_NO_ERROR ((int32_t)0x00000000L) + +/******************************************************************************* +* Generic Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_INVALID_POINTER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid pointer (e.g. NULL) passed to driver */ +/* */ +#define CIFX_INVALID_POINTER ((int32_t)0x800A0001L) + +/* */ +/* MessageId: CIFX_INVALID_BOARD */ +/* */ +/* MessageText: */ +/* */ +/* No board with the given name / index available */ +/* */ +#define CIFX_INVALID_BOARD ((int32_t)0x800A0002L) + +/* */ +/* MessageId: CIFX_INVALID_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* No channel with the given index available */ +/* */ +#define CIFX_INVALID_CHANNEL ((int32_t)0x800A0003L) + +/* */ +/* MessageId: CIFX_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid handle passed to driver */ +/* */ +#define CIFX_INVALID_HANDLE ((int32_t)0x800A0004L) + +/* */ +/* MessageId: CIFX_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter */ +/* */ +#define CIFX_INVALID_PARAMETER ((int32_t)0x800A0005L) + +/* */ +/* MessageId: CIFX_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command */ +/* */ +#define CIFX_INVALID_COMMAND ((int32_t)0x800A0006L) + +/* */ +/* MessageId: CIFX_INVALID_BUFFERSIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid buffer size */ +/* */ +#define CIFX_INVALID_BUFFERSIZE ((int32_t)0x800A0007L) + +/* */ +/* MessageId: CIFX_INVALID_ACCESS_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid access size */ +/* */ +#define CIFX_INVALID_ACCESS_SIZE ((int32_t)0x800A0008L) + +/* */ +/* MessageId: CIFX_FUNCTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Function failed */ +/* */ +#define CIFX_FUNCTION_FAILED ((int32_t)0x800A0009L) + +/* */ +/* MessageId: CIFX_FILE_OPEN_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* File could not be opened */ +/* */ +#define CIFX_FILE_OPEN_FAILED ((int32_t)0x800A000AL) + +/* */ +/* MessageId: CIFX_FILE_SIZE_ZERO */ +/* */ +/* MessageText: */ +/* */ +/* File size is zero */ +/* */ +#define CIFX_FILE_SIZE_ZERO ((int32_t)0x800A000BL) + +/* */ +/* MessageId: CIFX_FILE_LOAD_INSUFF_MEM */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to load file */ +/* */ +#define CIFX_FILE_LOAD_INSUFF_MEM ((int32_t)0x800A000CL) + +/* */ +/* MessageId: CIFX_FILE_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File checksum compare failed */ +/* */ +#define CIFX_FILE_CHECKSUM_ERROR ((int32_t)0x800A000DL) + +/* */ +/* MessageId: CIFX_FILE_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error reading from file */ +/* */ +#define CIFX_FILE_READ_ERROR ((int32_t)0x800A000EL) + +/* */ +/* MessageId: CIFX_FILE_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file type */ +/* */ +#define CIFX_FILE_TYPE_INVALID ((int32_t)0x800A000FL) + +/* */ +/* MessageId: CIFX_FILE_NAME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file name */ +/* */ +#define CIFX_FILE_NAME_INVALID ((int32_t)0x800A0010L) + +/* */ +/* MessageId: CIFX_FUNCTION_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Driver function not available */ +/* */ +#define CIFX_FUNCTION_NOT_AVAILABLE ((int32_t)0x800A0011L) + +/* */ +/* MessageId: CIFX_BUFFER_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Given buffer is too short */ +/* */ +#define CIFX_BUFFER_TOO_SHORT ((int32_t)0x800A0012L) + +/* */ +/* MessageId: CIFX_MEMORY_MAPPING_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to map the memory */ +/* */ +#define CIFX_MEMORY_MAPPING_FAILED ((int32_t)0x800A0013L) + +/* */ +/* MessageId: CIFX_NO_MORE_ENTRIES */ +/* */ +/* MessageText: */ +/* */ +/* No more entries available */ +/* */ +#define CIFX_NO_MORE_ENTRIES ((int32_t)0x800A0014L) + +/* */ +/* MessageId: CIFX_CALLBACK_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown callback handling mode */ +/* */ +#define CIFX_CALLBACK_MODE_UNKNOWN ((int32_t)0x800A0015L) + +/* */ +/* MessageId: CIFX_CALLBACK_CREATE_EVENT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create callback events */ +/* */ +#define CIFX_CALLBACK_CREATE_EVENT_FAILED ((int32_t)0x800A0016L) + +/* */ +/* MessageId: CIFX_CALLBACK_CREATE_RECV_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create callback receive buffer */ +/* */ +#define CIFX_CALLBACK_CREATE_RECV_BUFFER ((int32_t)0x800A0017L) + +/* */ +/* MessageId: CIFX_CALLBACK_ALREADY_USED */ +/* */ +/* MessageText: */ +/* */ +/* Callback already used */ +/* */ +#define CIFX_CALLBACK_ALREADY_USED ((int32_t)0x800A0018L) + +/* */ +/* MessageId: CIFX_CALLBACK_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Callback was not registered before */ +/* */ +#define CIFX_CALLBACK_NOT_REGISTERED ((int32_t)0x800A0019L) + +/* */ +/* MessageId: CIFX_INTERRUPT_DISABLED */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt is disabled */ +/* */ +#define CIFX_INTERRUPT_DISABLED ((int32_t)0x800A001AL) + +/******************************************************************************* +* Generic Driver Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_DRV_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* Driver not initialized */ +/* */ +#define CIFX_DRV_NOT_INITIALIZED ((int32_t)0x800B0001L) + +/* */ +/* MessageId: CIFX_DRV_INIT_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Driver init state error */ +/* */ +#define CIFX_DRV_INIT_STATE_ERROR ((int32_t)0x800B0002L) + +/* */ +/* MessageId: CIFX_DRV_READ_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Driver read state error */ +/* */ +#define CIFX_DRV_READ_STATE_ERROR ((int32_t)0x800B0003L) + +/* */ +/* MessageId: CIFX_DRV_CMD_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Command is active on device */ +/* */ +#define CIFX_DRV_CMD_ACTIVE ((int32_t)0x800B0004L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* General error during download */ +/* */ +#define CIFX_DRV_DOWNLOAD_FAILED ((int32_t)0x800B0005L) + +/* */ +/* MessageId: CIFX_DRV_WRONG_DRIVER_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Wrong driver version */ +/* */ +#define CIFX_DRV_WRONG_DRIVER_VERSION ((int32_t)0x800B0006L) + +/* */ +/* MessageId: CIFX_DRV_DRIVER_NOT_LOADED */ +/* */ +/* MessageText: */ +/* */ +/* CIFx driver is not running */ +/* */ +#define CIFX_DRV_DRIVER_NOT_LOADED ((int32_t)0x800B0030L) + +/* */ +/* MessageId: CIFX_DRV_INIT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize the device */ +/* */ +#define CIFX_DRV_INIT_ERROR ((int32_t)0x800B0031L) + +/* */ +/* MessageId: CIFX_DRV_CHANNEL_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* Channel not initialized (xChannelOpen not called) */ +/* */ +#define CIFX_DRV_CHANNEL_NOT_INITIALIZED ((int32_t)0x800B0032L) + +/* */ +/* MessageId: CIFX_DRV_IO_CONTROL_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* IOControl call failed */ +/* */ +#define CIFX_DRV_IO_CONTROL_FAILED ((int32_t)0x800B0033L) + +/* */ +/* MessageId: CIFX_DRV_NOT_OPENED */ +/* */ +/* MessageText: */ +/* */ +/* Driver was not opened */ +/* */ +#define CIFX_DRV_NOT_OPENED ((int32_t)0x800B0034L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_STORAGE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown download storage type (RAM/FLASH based) found */ +/* */ +#define CIFX_DRV_DOWNLOAD_STORAGE_UNKNOWN ((int32_t)0x800B0040L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_FW_WRONG_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Channel number for a firmware download not supported */ +/* */ +#define CIFX_DRV_DOWNLOAD_FW_WRONG_CHANNEL ((int32_t)0x800B0041L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS */ +/* */ +/* MessageText: */ +/* */ +/* Modules are not allowed without a Base OS firmware */ +/* */ +#define CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS ((int32_t)0x800B0042L) + +/******************************************************************************* +* Generic Device Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_DEV_DPM_ACCESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Dual port memory not accessible (board not found) */ +/* */ +#define CIFX_DEV_DPM_ACCESS_ERROR ((int32_t)0x800C0010L) + +/* */ +/* MessageId: CIFX_DEV_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* Device not ready (ready flag failed) */ +/* */ +#define CIFX_DEV_NOT_READY ((int32_t)0x800C0011L) + +/* */ +/* MessageId: CIFX_DEV_NOT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Device not running (running flag failed) */ +/* */ +#define CIFX_DEV_NOT_RUNNING ((int32_t)0x800C0012L) + +/* */ +/* MessageId: CIFX_DEV_WATCHDOG_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog test failed */ +/* */ +#define CIFX_DEV_WATCHDOG_FAILED ((int32_t)0x800C0013L) + +/* */ +/* MessageId: CIFX_DEV_SYSERR */ +/* */ +/* MessageText: */ +/* */ +/* Error in handshake flags */ +/* */ +#define CIFX_DEV_SYSERR ((int32_t)0x800C0015L) + +/* */ +/* MessageId: CIFX_DEV_MAILBOX_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Send mailbox is full */ +/* */ +#define CIFX_DEV_MAILBOX_FULL ((int32_t)0x800C0016L) + +/* */ +/* MessageId: CIFX_DEV_PUT_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Send packet timeout */ +/* */ +#define CIFX_DEV_PUT_TIMEOUT ((int32_t)0x800C0017L) + +/* */ +/* MessageId: CIFX_DEV_GET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Receive packet timeout */ +/* */ +#define CIFX_DEV_GET_TIMEOUT ((int32_t)0x800C0018L) + +/* */ +/* MessageId: CIFX_DEV_GET_NO_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* No packet available */ +/* */ +#define CIFX_DEV_GET_NO_PACKET ((int32_t)0x800C0019L) + +/* */ +/* MessageId: CIFX_DEV_MAILBOX_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Mailbox too short */ +/* */ +#define CIFX_DEV_MAILBOX_TOO_SHORT ((int32_t)0x800C001AL) + +/* */ +/* MessageId: CIFX_DEV_RESET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Reset command timeout */ +/* */ +#define CIFX_DEV_RESET_TIMEOUT ((int32_t)0x800C0020L) + +/* */ +/* MessageId: CIFX_DEV_NO_COM_FLAG */ +/* */ +/* MessageText: */ +/* */ +/* COM-flag not set */ +/* */ +#define CIFX_DEV_NO_COM_FLAG ((int32_t)0x800C0021L) + +/* */ +/* MessageId: CIFX_DEV_EXCHANGE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* I/O data exchange failed */ +/* */ +#define CIFX_DEV_EXCHANGE_FAILED ((int32_t)0x800C0022L) + +/* */ +/* MessageId: CIFX_DEV_EXCHANGE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* I/O data exchange timeout */ +/* */ +#define CIFX_DEV_EXCHANGE_TIMEOUT ((int32_t)0x800C0023L) + +/* */ +/* MessageId: CIFX_DEV_COM_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown I/O exchange mode */ +/* */ +#define CIFX_DEV_COM_MODE_UNKNOWN ((int32_t)0x800C0024L) + +/* */ +/* MessageId: CIFX_DEV_FUNCTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Device function failed */ +/* */ +#define CIFX_DEV_FUNCTION_FAILED ((int32_t)0x800C0025L) + +/* */ +/* MessageId: CIFX_DEV_DPMSIZE_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* DPM size differs from configuration */ +/* */ +#define CIFX_DEV_DPMSIZE_MISMATCH ((int32_t)0x800C0026L) + +/* */ +/* MessageId: CIFX_DEV_STATE_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown state mode */ +/* */ +#define CIFX_DEV_STATE_MODE_UNKNOWN ((int32_t)0x800C0027L) + +/* */ +/* MessageId: CIFX_DEV_HW_PORT_IS_USED */ +/* */ +/* MessageText: */ +/* */ +/* Device is still accessed */ +/* */ +#define CIFX_DEV_HW_PORT_IS_USED ((int32_t)0x800C0028L) + +/* */ +/* MessageId: CIFX_DEV_CONFIG_LOCK_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Configuration locking timeout */ +/* */ +#define CIFX_DEV_CONFIG_LOCK_TIMEOUT ((int32_t)0x800C0029L) + +/* */ +/* MessageId: CIFX_DEV_CONFIG_UNLOCK_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Configuration unlocking timeout */ +/* */ +#define CIFX_DEV_CONFIG_UNLOCK_TIMEOUT ((int32_t)0x800C002AL) + +/* */ +/* MessageId: CIFX_DEV_HOST_STATE_SET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set HOST state timeout */ +/* */ +#define CIFX_DEV_HOST_STATE_SET_TIMEOUT ((int32_t)0x800C002BL) + +/* */ +/* MessageId: CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Clear HOST state timeout */ +/* */ +#define CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT ((int32_t)0x800C002CL) + +/* */ +/* MessageId: CIFX_DEV_INITIALIZATION_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout during channel initialization */ +/* */ +#define CIFX_DEV_INITIALIZATION_TIMEOUT ((int32_t)0x800C002DL) + +/* */ +/* MessageId: CIFX_DEV_BUS_STATE_ON_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set Bus ON Timeout */ +/* */ +#define CIFX_DEV_BUS_STATE_ON_TIMEOUT ((int32_t)0x800C002EL) + +/* */ +/* MessageId: CIFX_DEV_BUS_STATE_OFF_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set Bus OFF Timeout */ +/* */ +#define CIFX_DEV_BUS_STATE_OFF_TIMEOUT ((int32_t)0x800C002FL) + +/* */ +/* MessageId: CIFX_DEV_MODULE_ALREADY_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Module already running */ +/* */ +#define CIFX_DEV_MODULE_ALREADY_RUNNING ((int32_t)0x800C0040L) + +/* */ +/* MessageId: CIFX_DEV_MODULE_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Module already exists */ +/* */ +#define CIFX_DEV_MODULE_ALREADY_EXISTS ((int32_t)0x800C0041L) + +/* */ +/* MessageId: CIFX_DEV_DMA_INSUFF_BUFFER_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Number of configured DMA buffers insufficient */ +/* */ +#define CIFX_DEV_DMA_INSUFF_BUFFER_COUNT ((int32_t)0x800C0050L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_TOO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffers size too small (min size 256Byte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_TOO_SMALL ((int32_t)0x800C0051L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffers size too big (max size 63,75KByte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_TOO_BIG ((int32_t)0x800C0052L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_NOT_ALIGNED */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffer alignment failed (must be 256Byte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_NOT_ALIGNED ((int32_t)0x800C0053L) + +/* */ +/* MessageId: CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* I/O data uncontrolled handshake mode not supported */ +/* */ +#define CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED ((int32_t)0x800C0054L) + +/* */ +/* MessageId: CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* I/O area in DMA mode not supported (only area 0 possible) */ +/* */ +#define CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED ((int32_t)0x800C0055L) + +/* */ +/* MessageId: CIFX_DEV_DMA_STATE_ON_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set DMA ON Timeout */ +/* */ +#define CIFX_DEV_DMA_STATE_ON_TIMEOUT ((int32_t)0x800C0056L) + +/* */ +/* MessageId: CIFX_DEV_DMA_STATE_OFF_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set DMA OFF Timeout */ +/* */ +#define CIFX_DEV_DMA_STATE_OFF_TIMEOUT ((int32_t)0x800C0057L) + +/* */ +/* MessageId: CIFX_DEV_SYNC_STATE_INVALID_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Device is in invalid mode for this operation */ +/* */ +#define CIFX_DEV_SYNC_STATE_INVALID_MODE ((int32_t)0x800C0058L) + +/* */ +/* MessageId: CIFX_DEV_SYNC_STATE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Waiting for synchronization event bits timed out */ +/* */ +#define CIFX_DEV_SYNC_STATE_TIMEOUT ((int32_t)0x800C0059L) + +/******************************************************************************* +* CIFX API Transport Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_TRANSPORT_SEND_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Time out while sending data */ +/* */ +#define CIFX_TRANSPORT_SEND_TIMEOUT ((int32_t)0x800D0001L) + +/* */ +/* MessageId: CIFX_TRANSPORT_RECV_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Time out waiting for incoming data */ +/* */ +#define CIFX_TRANSPORT_RECV_TIMEOUT ((int32_t)0x800D0002L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to communicate to the device / no answer */ +/* */ +#define CIFX_TRANSPORT_CONNECT ((int32_t)0x800D0003L) + +/* */ +/* MessageId: CIFX_TRANSPORT_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Transfer has been aborted due to keep alive timeout or interface detachment */ +/* */ +#define CIFX_TRANSPORT_ABORTED ((int32_t)0x800D0004L) + +/* */ +/* MessageId: CIFX_TRANSPORT_INVALID_RESPONSE */ +/* */ +/* MessageText: */ +/* */ +/* The packet response was rejected due to invalid packet data */ +/* */ +#define CIFX_TRANSPORT_INVALID_RESPONSE ((int32_t)0x800D0005L) + +/* */ +/* MessageId: CIFX_TRANSPORT_UNKNOWN_DATALAYER */ +/* */ +/* MessageText: */ +/* */ +/* The data layer provided by the device is not supported */ +/* */ +#define CIFX_TRANSPORT_UNKNOWN_DATALAYER ((int32_t)0x800D0006L) + +/* */ +/* MessageId: CIFX_CONNECTOR_FUNCTIONS_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error reading the connector functions from the DLL */ +/* */ +#define CIFX_CONNECTOR_FUNCTIONS_READ_ERROR ((int32_t)0x800D0010L) + +/* */ +/* MessageId: CIFX_CONNECTOR_IDENTIFIER_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Connector delivers an identifier longer than 6 characters */ +/* */ +#define CIFX_CONNECTOR_IDENTIFIER_TOO_LONG ((int32_t)0x800D0011L) + +/* */ +/* MessageId: CIFX_CONNECTOR_IDENTIFIER_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* Connector delivers an empty identifier */ +/* */ +#define CIFX_CONNECTOR_IDENTIFIER_EMPTY ((int32_t)0x800D0012L) + +/* */ +/* MessageId: CIFX_CONNECTOR_DUPLICATE_IDENTIFIER */ +/* */ +/* MessageText: */ +/* */ +/* Connector identifier already used */ +/* */ +#define CIFX_CONNECTOR_DUPLICATE_IDENTIFIER ((int32_t)0x800D0013L) + +/******************************************************************************* +* CIFX API Transport Header State Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_TRANSPORT_ERROR_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error code in transport header */ +/* */ +#define CIFX_TRANSPORT_ERROR_UNKNOWN ((int32_t)0x800E0001L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* CRC16 checksum failed */ +/* */ +#define CIFX_TRANSPORT_CHECKSUM_ERROR ((int32_t)0x800E0002L) + +/* */ +/* MessageId: CIFX_TRANSPORT_LENGTH_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* Transaction with incomplete length detected */ +/* */ +#define CIFX_TRANSPORT_LENGTH_INCOMPLETE ((int32_t)0x800E0003L) + +/* */ +/* MessageId: CIFX_TRANSPORT_DATA_TYPE_UNKOWN */ +/* */ +/* MessageText: */ +/* */ +/* Device does not support requested data type */ +/* */ +#define CIFX_TRANSPORT_DATA_TYPE_UNKOWN ((int32_t)0x800E0004L) + +/* */ +/* MessageId: CIFX_TRANSPORT_DEVICE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Device not available/unknown */ +/* */ +#define CIFX_TRANSPORT_DEVICE_UNKNOWN ((int32_t)0x800E0005L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CHANNEL_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Channel not available/unknown */ +/* */ +#define CIFX_TRANSPORT_CHANNEL_UNKNOWN ((int32_t)0x800E0006L) + +/* */ +/* MessageId: CIFX_TRANSPORT_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Sequence error detected */ +/* */ +#define CIFX_TRANSPORT_SEQUENCE ((int32_t)0x800E0007L) + +/* */ +/* MessageId: CIFX_TRANSPORT_BUFFEROVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Buffer overflow detected */ +/* */ +#define CIFX_TRANSPORT_BUFFEROVERFLOW ((int32_t)0x800E0008L) + +/* */ +/* MessageId: CIFX_TRANSPORT_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* Device signals out of resources */ +/* */ +#define CIFX_TRANSPORT_RESOURCE ((int32_t)0x800E0009L) + +/* */ +/* MessageId: CIFX_TRANSPORT_KEEPALIVE */ +/* */ +/* MessageText: */ +/* */ +/* Device connection monitoring error (Keep alive) */ +/* */ +#define CIFX_TRANSPORT_KEEPALIVE ((int32_t)0x800E000AL) + +/* */ +/* MessageId: CIFX_TRANSPORT_DATA_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Received transaction data too short */ +/* */ +#define CIFX_TRANSPORT_DATA_TOO_SHORT ((int32_t)0x800E000BL) + +/*******************************************************************************/ + +#endif /*__CIFXERRORS_H__ */ diff --git a/examples/tcpserver/Marshaller/cifXAPI/cifXUser.h b/examples/tcpserver/Marshaller/cifXAPI/cifXUser.h new file mode 100644 index 0000000..8541a9b --- /dev/null +++ b/examples/tcpserver/Marshaller/cifXAPI/cifXUser.h @@ -0,0 +1,670 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXUser.h 12193 2018-07-18 06:37:19Z Robert $: + + Description: + CIFx driver API definition file + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-03-26 Added timeout definition for firmware update + 2018-11-19 - Update definitions and structures concerning xSysdeviceResetEx() + - SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK structure extended by bResetMode + 2018-11-06 Add new function xSysdeviceResetEx() + 2018-07-18 Extended the CIFX_TO_FIRMWARE_START to 20 seconds + 2016-04-07 Lint warnings removed + 2015-07-23 Added API function pointer definitions usable in a pointer table + 2015-03-31 Added guard for _MSC_VER to allow compilation using -wundef + 2014-07-07 Added support for IAR C/C++ Compiler (ARM Cores only) + 2014-04-28 Added support for armcc compiler + 2012-01-31 Added COM-State notification structure + 2011-12-12 SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK structure extended by ulHWFeatures + 2011-11-29 Added xSysdeviceExtendedMemory() + 2011-09-13 - CIFX_MAX_PACKET_SIZE changed from 1600 to 1596 bytes because of mailbox counter + - xSysdeviceBoostart() function added + 2010-04-22 Added ulBootError to SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK + 2010-04-15 - Added timeout to xChannelSyncState function + - Added CIFX_SYNC_WAIT_CMD to be able to wait for sync signalling by firmware + 2010-04-01 Data types update + 2010-03-23 - Data types changed for 32/64Bit usage + - Event functions include + 2009-10-29 DMA state function and states included + 2009-10-01 CIFX_TO_WAIT_COS_CMD/ACK changed to 20ms + 2009-06-08 SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK structure extended by bDevIdNumber + 2009-04-28 New download mode for modules included + 2009-01-23 netX DPM signature included + 2008-11-25 NETX_SYSTEM_STATUS block structure updated + - removed LEDs + - added CPU load and system start time values + 2008-06-19 xDriverRestartDevice() function parameters changed + 2008-05-27 APIENTRY now set empty, if not defined outside the file + 2008-04-29 DOWNLOAD_MODE_LICENSECODE added + 2008-03-17 xDriverRestartDevice() included + 2008-02-22 Firmware version changed from Major,Minor,Revision,Build to + Major,Minor,Build,Revision, as decided on 19.11.2007 + 2007-07-26 Added DOWNLOAD_MODE_BOOTLOADER + 2007-04-17 Parameters for the following functions changed + - xSysdeviceDownload/Upload + - xSysdeviceFindFirstFile/NextFile + - xChannelDownload/Upload + - xChannelFindFirstFile/NextFile + 2007-04-13 CALLBACK state definition included + 2007-04-10 - PFN_TRANSFER_PACKET moved to toolkit headers + - CIFX_COLDSTART and CIFX_WARMSTART changed to + CIFX_SYSTEMSTART and CIFX_CHANNELINIT + 2007-04-04 xChannelBusState() included + 2007-03-28 typedef for PFN_TRANSFER_PACKET included + 2007-03-21 Added: + - xChannelIOInfo + - xSysdeviceReset + - CIFX_WARMSTART/CIFX_COLDSTART + 2007-03-20 Added: + - xChannelFindFirstFile + - xChannelFindNextFile + - xChannelUpload + - xSysdeviceFindFirstFile + - xSysdeviceFindNextFile + - xSysdeviceUpload + 2007-03-16 Removed CIFX_DRIVER define around API functions, + as it is not needed anymore (since V0.920 of driver) + 2006-12-04 PACKED_POST moved to closing curly brace after type definition + 2006-10-18 Changed HANDLE to CIFXHANDLE which is a void*, to be + usable on VxWorks without compiler warnings + 2006-03-17 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup CIFX_DRIVER_API cifX Driver API implementation */ +/*! \{ */ +/*****************************************************************************/ + +/* prevent multiple inclusion */ +#ifndef __CIFxUSER_H +#define __CIFxUSER_H + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #define __CIFx_PACKED_PRE + #define __CIFx_PACKED_POST + #pragma once + #pragma pack(1) /* Always align structures to 1Byte boundery */ + #ifndef STRICT /* Check Typedefinition */ + #define STRICT + #endif + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __CIFx_PACKED_PRE + #define __CIFx_PACKED_POST __attribute__((packed)) +#endif + +/* support for ARMCC and IAR compiler (ARM cores only) */ +#if defined (__ADS__) || defined (__REALVIEW__) || defined (__CC_ARM) || defined (__ICCARM__) + /* tight packing of structure members */ + #define __CIFx_PACKED_PRE __packed + #define __CIFx_PACKED_POST +#endif /* __ADS__, __REALVIEW__, __CC_ARM */ + +#ifdef __cplusplus + extern "C" { +#endif /* _cplusplus */ + +#include /*lint !e537 !e451 */ + +#ifndef APIENTRY + #define APIENTRY +#endif + +/* ------------------------------------------------------------------------------------ */ +/* global definitions */ +/* ------------------------------------------------------------------------------------ */ +typedef void* CIFXHANDLE; + +/* DPM memory validation */ +#define CIFX_DPM_NO_MEMORY_ASSIGNED 0x0BAD0BADUL +#define CIFX_DPM_INVALID_CONTENT 0xFFFFFFFFUL + +#define CIFX_DPMSIGNATURE_BSL_STR "BOOT" +#define CIFX_DPMSIGNATURE_BSL_VAL 0x544F4F42UL +#define CIFX_DPMSIGNATURE_FW_STR "netX" +#define CIFX_DPMSIGNATURE_FW_VAL 0x5874656EUL + +/* CIFx global timeouts in milliseconds */ +#define CIFX_TO_WAIT_HW_RESET_ACTIVE 2000UL +#define CIFX_TO_WAIT_HW 2000UL +#define CIFX_TO_WAIT_COS_CMD 20UL +#define CIFX_TO_WAIT_COS_ACK 20UL +#define CIFX_TO_SEND_PACKET 5000UL +#define CIFX_TO_1ST_PACKET 1000UL +#define CIFX_TO_CONT_PACKET 1000UL +#define CIFX_TO_LAST_PACKET 1000UL +#define CIFX_TO_FIRMWARE_START 20000UL +#define CIFX_TO_FIRMWARE_UPDATE 30000UL + +/* Maximum channel number */ +#define CIFX_MAX_NUMBER_OF_CHANNEL_DEFINITION 8 +#define CIFX_MAX_NUMBER_OF_CHANNELS 6 +#define CIFX_NO_CHANNEL 0xFFFFFFFF + +/* Maximum file name length */ +#define CIFX_MAX_FILE_NAME_LENGTH 260 +#define CIFX_MIN_FILE_NAME_LENGTH 5 + +/* The system device port number */ +#define CIFX_SYSTEM_DEVICE 0xFFFFFFFF + +/* Information commands */ +#define CIFX_INFO_CMD_SYSTEM_INFORMATION 1 +#define CIFX_INFO_CMD_SYSTEM_INFO_BLOCK 2 +#define CIFX_INFO_CMD_SYSTEM_CHANNEL_BLOCK 3 +#define CIFX_INFO_CMD_SYSTEM_CONTROL_BLOCK 4 +#define CIFX_INFO_CMD_SYSTEM_STATUS_BLOCK 5 + +/* General commands */ +#define CIFX_CMD_READ_DATA 1 +#define CIFX_CMD_WRITE_DATA 2 + +/* HOST mode definition */ +#define CIFX_HOST_STATE_NOT_READY 0 +#define CIFX_HOST_STATE_READY 1 +#define CIFX_HOST_STATE_READ 2 + +/* WATCHDOG commands*/ +#define CIFX_WATCHDOG_STOP 0 +#define CIFX_WATCHDOG_START 1 + +/* Configuration Lock commands*/ +#define CIFX_CONFIGURATION_UNLOCK 0 +#define CIFX_CONFIGURATION_LOCK 1 +#define CIFX_CONFIGURATION_GETLOCKSTATE 2 + +/* BUS state commands*/ +#define CIFX_BUS_STATE_OFF 0 +#define CIFX_BUS_STATE_ON 1 +#define CIFX_BUS_STATE_GETSTATE 2 + +/* DMA state commands*/ +#define CIFX_DMA_STATE_OFF 0 +#define CIFX_DMA_STATE_ON 1 +#define CIFX_DMA_STATE_GETSTATE 2 + +/* Memory pointer commands*/ +#define CIFX_MEM_PTR_OPEN 1 +#define CIFX_MEM_PTR_OPEN_USR 2 +#define CIFX_MEM_PTR_CLOSE 3 + +/* I/O area definition */ +#define CIFX_IO_INPUT_AREA 1 +#define CIFX_IO_OUTPUT_AREA 2 + +/* xChannelReset definitions */ +#define CIFX_SYSTEMSTART 1 +#define CIFX_CHANNELINIT 2 +#define CIFX_BOOTSTART 3 /* This definition is not supported by cifXAPI */ + +/* xSysdeviceResetEx definitions */ +#define CIFX_RESETEX_SYSTEMSTART 0 +#define CIFX_RESETEX_BOOTSTART 2 +#define CIFX_RESETEX_UPDATESTART 3 + +/* Shift value for variant selection of CIFX_RESETEX_UPDATESTART */ +#define CIFX_RESETEX_UPDATESTART_VARIANT_SRT 4 + +/* Sync command definitions */ +#define CIFX_SYNC_SIGNAL_CMD 1 +#define CIFX_SYNC_ACKNOWLEDGE_CMD 2 +#define CIFX_SYNC_WAIT_CMD 3 + +typedef struct CIFX_NOTIFY_RX_MBX_FULL_DATA_Ttag +{ + uint32_t ulRecvCount; +} CIFX_NOTIFY_RX_MBX_FULL_DATA_T; + +typedef struct CIFX_NOTIFY_TX_MBX_EMPTY_DATA_Ttag +{ + uint32_t ulMaxSendCount; +} CIFX_NOTIFY_TX_MBX_EMPTY_DATA_T; + +typedef struct CIFX_NOTIFY_COM_STATE_Ttag +{ + uint32_t ulComState; +} CIFX_NOTIFY_COM_STATE_T; + +/* Notifications */ +#define CIFX_NOTIFY_RX_MBX_FULL 1 +#define CIFX_NOTIFY_TX_MBX_EMPTY 2 +#define CIFX_NOTIFY_PD0_IN 3 +#define CIFX_NOTIFY_PD1_IN 4 +#define CIFX_NOTIFY_PD0_OUT 5 +#define CIFX_NOTIFY_PD1_OUT 6 +#define CIFX_NOTIFY_SYNC 7 +#define CIFX_NOTIFY_COM_STATE 8 + +/* Extended memory commands */ +#define CIFX_GET_EXTENDED_MEMORY_INFO 1 +#define CIFX_GET_EXTENDED_MEMORY_POINTER 2 +#define CIFX_FREE_EXTENDED_MEMORY_POINTER 3 + +/*****************************************************************************/ +/*! Structure definitions */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct DRIVER_INFORMATIONtag +{ + char abDriverVersion[32]; /*!< Driver version */ + uint32_t ulBoardCnt; /*!< Number of available Boards */ +} __CIFx_PACKED_POST DRIVER_INFORMATION; + +#define CIFx_MAX_INFO_NAME_LENTH 16 + +/*****************************************************************************/ +/*! Directory Information structure for enumerating directories */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_DIRECTORYENTRYtag +{ + CIFXHANDLE hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< Returned file name. */ + uint8_t bFiletype; /*!< Returned file type. */ + uint32_t ulFilesize; /*!< Returned file size. */ + +} __CIFx_PACKED_POST CIFX_DIRECTORYENTRY; + +/*****************************************************************************/ +/*! Extended memory information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_EXTENDED_MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void* pvMemoryPtr; /*!< Memory pointer */ + uint32_t ulMemorySize; /*!< Memory size of the Extended memory area */ + uint32_t ulMemoryType; /*!< Memory type information */ + +} __CIFx_PACKED_POST CIFX_EXTENDED_MEMORY_INFORMATION; + +/*****************************************************************************/ +/*! System Channel Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_INFORMATIONtag +{ + uint32_t ulSystemError; /*!< Global system error */ + uint32_t ulDpmTotalSize; /*!< Total size dual-port memory in bytes */ + uint32_t ulMBXSize; /*!< System mailbox data size [Byte]*/ + uint32_t ulDeviceNumber; /*!< Global device number */ + uint32_t ulSerialNumber; /*!< Global serial number */ + uint32_t ulOpenCnt; /*!< Channel open counter */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_INFORMATION; + +/* System Channel: System Information Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_INFO_BLOCKtag +{ + uint8_t abCookie[4]; /*!< 0x00 "netX" cookie */ + uint32_t ulDpmTotalSize; /*!< 0x04 Total Size of the whole dual-port memory in bytes */ + uint32_t ulDeviceNumber; /*!< 0x08 Device number */ + uint32_t ulSerialNumber; /*!< 0x0C Serial number */ + uint16_t ausHwOptions[4]; /*!< 0x10 Hardware options, xC port 0..3 */ + uint16_t usManufacturer; /*!< 0x18 Manufacturer Location */ + uint16_t usProductionDate; /*!< 0x1A Date of production */ + uint32_t ulLicenseFlags1; /*!< 0x1C License code flags 1 */ + uint32_t ulLicenseFlags2; /*!< 0x20 License code flags 2 */ + uint16_t usNetxLicenseID; /*!< 0x24 netX license identification */ + uint16_t usNetxLicenseFlags; /*!< 0x26 netX license flags */ + uint16_t usDeviceClass; /*!< 0x28 netX device class */ + uint8_t bHwRevision; /*!< 0x2A Hardware revision index */ + uint8_t bHwCompatibility; /*!< 0x2B Hardware compatibility index */ + uint8_t bDevIdNumber; /*!< 0x2C Device identification number (rotary switch) */ + uint8_t bReserved; /*!< 0x2D Reserved byte */ + uint16_t usReserved; /*!< 0x2E:0x2F Reserved */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK; + +/* System Channel: Channel Information Block */ +#define CIFX_SYSTEM_CHANNEL_DEFAULT_INFO_BLOCK_SIZE 16 +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_CHANNEL_INFO_BLOCKtag +{ + uint8_t abInfoBlock[CIFX_MAX_NUMBER_OF_CHANNEL_DEFINITION][CIFX_SYSTEM_CHANNEL_DEFAULT_INFO_BLOCK_SIZE]; +} __CIFx_PACKED_POST SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK; + +/* System Channel: System Control Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCKtag +{ + uint32_t ulSystemCommandCOS; /*!< 0x00 System channel change of state command */ + uint32_t ulSystemControl; /*!< 0x04 System channel control */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCK; + +/* System Channel: System Status Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCKtag +{ + uint32_t ulSystemCOS; /*!< 0x00 System channel change of state acknowledge */ + uint32_t ulSystemStatus; /*!< 0x04 Actual system state */ + uint32_t ulSystemError; /*!< 0x08 Actual system error */ + uint32_t ulBootError; /*!< 0x0C Bootup error code (only valid if Cookie="BOOT") */ + uint32_t ulTimeSinceStart; /*!< 0x10 time since start in seconds */ + uint16_t usCpuLoad; /*!< 0x14 cpu load in 0,01% units (10000 => 100%) */ + uint16_t usReserved; /*!< 0x16 Reserved */ + uint32_t ulHWFeatures; /*!< 0x18 Hardware features */ + uint8_t abReserved[36]; /*!< 0x1C:3F Reserved */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK; + +/*****************************************************************************/ +/*! Board Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct BOARD_INFORMATIONtag +{ + int32_t lBoardError; /*!< Global Board error. Set when device specific data must not be used */ + char abBoardName[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board name */ + char abBoardAlias[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board alias name */ + uint32_t ulBoardID; /*!< Unique board ID, driver created*/ + uint32_t ulSystemError; /*!< System error */ + uint32_t ulPhysicalAddress; /*!< Physical memory address */ + uint32_t ulIrqNumber; /*!< Hardware interrupt number */ + uint8_t bIrqEnabled; /*!< Hardware interrupt enable flag */ + uint32_t ulChannelCnt; /*!< Number of available channels */ + uint32_t ulDpmTotalSize; /*!< Dual-Port memory size in bytes */ + SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK tSystemInfo; /*!< System information */ +} __CIFx_PACKED_POST BOARD_INFORMATION; + +/*****************************************************************************/ +/*! Channel Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CHANNEL_INFORMATIONtag +{ + char abBoardName[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board name */ + char abBoardAlias[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board alias name */ + uint32_t ulDeviceNumber; /*!< Global board device number */ + uint32_t ulSerialNumber; /*!< Global board serial number */ + + uint16_t usFWMajor; /*!< Major Version of Channel Firmware */ + uint16_t usFWMinor; /*!< Minor Version of Channel Firmware */ + uint16_t usFWBuild; /*!< Build number of Channel Firmware */ + uint16_t usFWRevision; /*!< Revision of Channel Firmware */ + uint8_t bFWNameLength; /*!< Length of FW Name */ + uint8_t abFWName[63]; /*!< Firmware Name */ + uint16_t usFWYear; /*!< Build Year of Firmware */ + uint8_t bFWMonth; /*!< Build Month of Firmware (1..12) */ + uint8_t bFWDay; /*!< Build Day of Firmware (1..31) */ + + uint32_t ulChannelError; /*!< Channel error */ + uint32_t ulOpenCnt; /*!< Channel open counter */ + uint32_t ulPutPacketCnt; /*!< Number of put packet commands */ + uint32_t ulGetPacketCnt; /*!< Number of get packet commands */ + uint32_t ulMailboxSize; /*!< Mailbox packet size in bytes */ + uint32_t ulIOInAreaCnt; /*!< Number of IO IN areas */ + uint32_t ulIOOutAreaCnt; /*!< Number of IO OUT areas */ + uint32_t ulHskSize; /*!< Size of the handshake cells */ + uint32_t ulNetxFlags; /*!< Actual netX state flags */ + uint32_t ulHostFlags; /*!< Actual Host flags */ + uint32_t ulHostCOSFlags; /*!< Actual Host COS flags */ + uint32_t ulDeviceCOSFlags; /*!< Actual Device COS flags */ + +} __CIFx_PACKED_POST CHANNEL_INFORMATION; + +/*****************************************************************************/ +/*! IO Area Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CHANNEL_IO_INFORMATIONtag +{ + uint32_t ulTotalSize; /*!< Total IO area size in byte */ + uint32_t ulReserved; /*!< reserved for further use */ + uint32_t ulIOMode; /*!< Exchange mode */ +} __CIFx_PACKED_POST CHANNEL_IO_INFORMATION; + +/*****************************************************************************/ +/*! Memory Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void** ppvMemoryPtr; /*!< Memory pointer */ + uint32_t* pulMemorySize; /*!< Complete size of the mapped memory */ + uint32_t ulChannel; /*!< Requested channel number */ + uint32_t* pulChannelStartOffset;/*!< Start offset of the requested channel */ + uint32_t* pulChannelSize; /*!< Memory size of the requested channel */ +} __CIFx_PACKED_POST MEMORY_INFORMATION; + +/*****************************************************************************/ +/*! PLC Memory Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct PLC_MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void** ppvMemoryPtr; /*!< Memory pointer */ + uint32_t ulAreaDefinition; /*!< Input/output area */ + uint32_t ulAreaNumber; /*!< Area number */ + uint32_t* pulIOAreaStartOffset; /*!< Start offset */ + uint32_t* pulIOAreaSize; /*!< Memory size */ +} __CIFx_PACKED_POST PLC_MEMORY_INFORMATION; + + +/***************************************************************************/ +/* Driver dependent information */ + +#define CIFX_MAX_PACKET_SIZE 1596 /*!< Maximum size of the RCX packet in bytes */ +#define CIFX_PACKET_HEADER_SIZE 40 /*!< Maximum size of the RCX packet header in bytes */ +#define CIFX_MAX_DATA_SIZE (CIFX_MAX_PACKET_SIZE - CIFX_PACKET_HEADER_SIZE) /*!< Maximum RCX packet data size */ + +#define CIFX_MSK_PACKET_ANSWER 0x00000001 /*!< Packet answer bit */ + +/*****************************************************************************/ +/*! Packet header */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_PACKET_HEADERtag +{ + uint32_t ulDest; /*!< destination of packet, process queue */ + uint32_t ulSrc; /*!< source of packet, process queue */ + uint32_t ulDestId; /*!< destination reference of packet */ + uint32_t ulSrcId; /*!< source reference of packet */ + uint32_t ulLen; /*!< length of packet data without header */ + uint32_t ulId; /*!< identification handle of sender */ + uint32_t ulState; /*!< status code of operation */ + uint32_t ulCmd; /*!< packet command defined in TLR_Commands.h */ + uint32_t ulExt; /*!< extension */ + uint32_t ulRout; /*!< router */ +} __CIFx_PACKED_POST CIFX_PACKET_HEADER; + +/*****************************************************************************/ +/*! Definition of the rcX Packet */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_PACKETtag +{ + CIFX_PACKET_HEADER tHeader; /**! */ + uint8_t abData[CIFX_MAX_DATA_SIZE]; +} __CIFx_PACKED_POST CIFX_PACKET; + +#define CIFX_CALLBACK_ACTIVE 0 +#define CIFX_CALLBACK_FINISHED 1 +typedef void(APIENTRY *PFN_PROGRESS_CALLBACK)(uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, int8_t bFinished, int32_t lError); +typedef void(APIENTRY *PFN_RECV_PKT_CALLBACK)(CIFX_PACKET* ptRecvPkt, void* pvUser); +typedef void(APIENTRY *PFN_NOTIFY_CALLBACK) (uint32_t ulNotification, uint32_t ulDataLen, void* pvData, void* pvUser); + +#define DOWNLOAD_MODE_FIRMWARE 1 +#define DOWNLOAD_MODE_CONFIG 2 +#define DOWNLOAD_MODE_FILE 3 +#define DOWNLOAD_MODE_BOOTLOADER 4 /*!< Download bootloader update to target. */ +#define DOWNLOAD_MODE_LICENSECODE 5 /*!< License update code. */ +#define DOWNLOAD_MODE_MODULE 6 + + +/*************************************************************************** +* API Functions +***************************************************************************/ + +/* Global driver functions */ +int32_t APIENTRY xDriverOpen ( CIFXHANDLE* phDriver); +int32_t APIENTRY xDriverClose ( CIFXHANDLE hDriver); +int32_t APIENTRY xDriverGetInformation ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +int32_t APIENTRY xDriverGetErrorDescription ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +int32_t APIENTRY xDriverEnumBoards ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +int32_t APIENTRY xDriverEnumChannels ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); +int32_t APIENTRY xDriverMemoryPointer ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd,void* pvMemoryInfo); +int32_t APIENTRY xDriverRestartDevice ( CIFXHANDLE hDriver, char* szBoardName, void* pvData); + +/* System device depending functions */ +int32_t APIENTRY xSysdeviceOpen ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +int32_t APIENTRY xSysdeviceClose ( CIFXHANDLE hSysdevice); +int32_t APIENTRY xSysdeviceGetMBXState ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +int32_t APIENTRY xSysdevicePutPacket ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceGetPacket ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceInfo ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +int32_t APIENTRY xSysdeviceFindFirstFile ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceFindNextFile ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceDownload ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceUpload ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xSysdeviceReset ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceResetEx ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); +int32_t APIENTRY xSysdeviceBootstart ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); + +int32_t APIENTRY xSysdeviceExtendedMemory ( CIFXHANDLE hSysdevice, uint32_t ulCmd, CIFX_EXTENDED_MEMORY_INFORMATION* ptExtMemData); + +/* Channel depending functions */ +int32_t APIENTRY xChannelOpen ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +int32_t APIENTRY xChannelClose ( CIFXHANDLE hChannel); +int32_t APIENTRY xChannelFindFirstFile ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xChannelFindNextFile ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xChannelDownload ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xChannelUpload ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xChannelGetMBXState ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +int32_t APIENTRY xChannelPutPacket ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +int32_t APIENTRY xChannelGetPacket ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +int32_t APIENTRY xChannelGetSendPacket ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt); + +int32_t APIENTRY xChannelConfigLock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelReset ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +int32_t APIENTRY xChannelInfo ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +int32_t APIENTRY xChannelWatchdog ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger); +int32_t APIENTRY xChannelHostState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelBusState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelDMAState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState); + +int32_t APIENTRY xChannelIOInfo ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +int32_t APIENTRY xChannelIORead ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +int32_t APIENTRY xChannelIOWrite ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +int32_t APIENTRY xChannelIOReadSendData ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +int32_t APIENTRY xChannelControlBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelCommonStatusBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelExtendedStatusBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelUserBlock ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +int32_t APIENTRY xChannelPLCMemoryPtr ( CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo); +int32_t APIENTRY xChannelPLCIsReadReady ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulReadState); +int32_t APIENTRY xChannelPLCIsWriteReady ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulWriteState); +int32_t APIENTRY xChannelPLCActivateWrite ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); +int32_t APIENTRY xChannelPLCActivateRead ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); + +int32_t APIENTRY xChannelRegisterNotification ( CIFXHANDLE hChannel, uint32_t ulNotification, PFN_NOTIFY_CALLBACK pfnCallback, void* pvUser); +int32_t APIENTRY xChannelUnregisterNotification( CIFXHANDLE hChannel, uint32_t ulNotification); +int32_t APIENTRY xChannelSyncState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulTimeout, uint32_t* pulErrorCount); +/***************************************************************************/ + +/*************************************************************************** +* API Functionpointer definitions +***************************************************************************/ + +/* Global driver functions */ +typedef int32_t (APIENTRY *PFN_XDRIVEROPEN) ( CIFXHANDLE* phDriver); +typedef int32_t (APIENTRY *PFN_XDRIVERCLOSE) ( CIFXHANDLE hDriver); +typedef int32_t (APIENTRY *PFN_XDRIVERGETINFORMATION) ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERGETERRORDESCRIPTION) ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +typedef int32_t (APIENTRY *PFN_XDRIVERENUMBOARDS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERENUMCHANNELS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERMEMORYPOINTER) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd, void* pvMemoryInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERRESTARTDEVICE) ( CIFXHANDLE hDriver, char* szBoardName, void* pvData); + +/* System device depending functions */ +typedef int32_t (APIENTRY *PFN_XSYSDEVICEOPEN) ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +typedef int32_t (APIENTRY *PFN_XSYSDEVICECLOSE) ( CIFXHANDLE hSysdevice); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEGETMBXSTATE) ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEPUTPACKET) ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEGETPACKET) ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEINFO) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICEFINDFIRSTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEFINDNEXTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEDOWNLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEUPLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICERESET) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICERESETEX) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEBOOTSTART) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICEEXTENDEDMEMORY) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, CIFX_EXTENDED_MEMORY_INFORMATION* ptExtMemData); + +/* Channel depending functions */ +typedef int32_t (APIENTRY *PFN_XCHANNELOPEN) ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +typedef int32_t (APIENTRY *PFN_XCHANNELCLOSE) ( CIFXHANDLE hChannel); +typedef int32_t (APIENTRY *PFN_XCHANNELFINDFIRSTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELFINDNEXTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XCHANNELDOWNLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELUPLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XCHANNELGETMBXSTATE) ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_XCHANNELPUTPACKET) ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELGETPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELGETSENDPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt); + +typedef int32_t (APIENTRY *PFN_XCHANNELCONFIGLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELRESET) ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELINFO) ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_XCHANNELWATCHDOG) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger); +typedef int32_t (APIENTRY *PFN_XCHANNELHOSTSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELBUSSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELDMASTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState); + +typedef int32_t (APIENTRY *PFN_XCHANNELIOINFO) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELIOREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELIOWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELIOREADSENDDATA) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_XCHANNELCONTROLBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELCOMMONSTATUSBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELEXTENDEDSTATUSBLOCK)( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELUSERBLOCK) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_XCHANNELPLCMEMORYPTR) ( CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCISREADREADY) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulReadState); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCISWRITEREADY) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulWriteState); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCACTIVATEWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCACTIVATEREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); + +typedef int32_t (APIENTRY *PFN_XCHANNELREGISTERNOTIFICATION) ( CIFXHANDLE hChannel, uint32_t ulNotification, PFN_NOTIFY_CALLBACK pfnCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELUNREGISTERNOTIFICATION)( CIFXHANDLE hChannel, uint32_t ulNotification); +typedef int32_t (APIENTRY *PFN_XCHANNELSYNCSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulTimeout, uint32_t* pulErrorCount); +/***************************************************************************/ + +#ifdef __cplusplus +} +#endif + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #pragma pack() /* Always align structures to default boundery */ + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +#undef __CIFx_PACKED_PRE +#undef __CIFx_PACKED_POST + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __CIFxUSER_H */ diff --git a/examples/tcpserver/Marshaller/cifXAPI/netXAPI.h b/examples/tcpserver/Marshaller/cifXAPI/netXAPI.h new file mode 100644 index 0000000..3e1b110 --- /dev/null +++ b/examples/tcpserver/Marshaller/cifXAPI/netXAPI.h @@ -0,0 +1,376 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netXAPI.h 14572 2018-10-15 11:24:27Z Robert $: + + Description: + Global netX API definition for netX drivers + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-10-10 - Added type cast to error definitions for 64Bit systems + 2018-11-06 - Added function pointer PFN_SYSDEVICERESETEX for new function xSysdeviceResetEx() + 2018-10-12 - Changed file header to actual version + - Using new Hilscher headers and definitions + 2015-07-24 - Reviewed consolidated from several sources + 2013-06-24 - Added APIENTRY to NXAPI callback prototypes + 2011-01-11 - Updated data types to ISOC99 + - Additional functions for netXTransport added + 2009-05-04 - Declaration for nxDrvGetConfig() added + 2008-07-08 - xSysdevice/xChannel download included + 2008-02-19 - New error number included + 2008-02-01 - NXDRV_DEVICE_INFORMATION structure extended by + complete system information block + - New error number included + 2007-11-09 created + +**************************************************************************************/ + +/* prevent multiple inclusion */ +#ifndef __NETxAPI_H +#define __NETxAPI_H + +#pragma once + +#include "cifXUser.h" + +#ifdef __cplusplus + extern "C" { +#endif /* _cplusplus */ + + +/***************************************************************************** +*! netX API Error Definition +*****************************************************************************/ +#define NXAPI_NO_ERROR ((int32_t)0x00000000L) + +#define NXAPI_NOT_INITIALIZED ((int32_t)0x00000010L) +#define NXAPI_NO_WORKING_DIRECTORY ((int32_t)0x00000011L) +#define NXAPI_NO_ENTRIES ((int32_t)0x00000012L) +#define NXAPI_NO_ENTRY_FOUND ((int32_t)0x00000013L) +#define NXAPI_UNKOWN_COMMAND ((int32_t)0x00000014L) +#define NXAPI_INVALID_POINTER ((int32_t)0x00000015L) +#define NXAPI_INVALID_PARAMETER ((int32_t)0x00000016L) +#define NXAPI_BUFFER_TOO_SHORT ((int32_t)0x00000017L) + +#define NXAPI_DRIVER_NOT_INITIALIZED ((int32_t)0x00000020L) +#define NXAPI_DRIVER_DLL_NOT_LOADED ((int32_t)0x00000021L) +#define NXAPI_DRIVER_INTERFACE_MISSING ((int32_t)0x00000022L) +#define NXAPI_DRIVER_FUNCTION_MISSING ((int32_t)0x00000023L) +#define NXAPI_DRIVER_NO_DEVICE_FOUND ((int32_t)0x00000024L) +#define NXAPI_DRIVER_DOWNLOAD_FAILED ((int32_t)0x00000025L) +#define NXAPI_DRIVER_INVALID_COMMAND ((int32_t)0x00000026L) + +#define NXAPI_DRIVER_DIRECTORY_CREATE ((int32_t)0x00000030L) +#define NXAPI_DRIVER_FILE_CREATE ((int32_t)0x00000031L) +#define NXAPI_DRIVER_FILE_READ ((int32_t)0x00000032L) +#define NXAPI_DRIVER_FILE_WRITE ((int32_t)0x00000032L) +#define NXAPI_DRIVER_FILE_DELETE ((int32_t)0x00000032L) + +/* Registry errors */ +#define NXAPI_DRIVER_REG_OPEN ((int32_t)0x00000040L) +#define NXAPI_DRIVER_REG_CLOSE ((int32_t)0x00000041L) + +#define NXAPI_DRIVER_REG_ENUM_KEY ((int32_t)0x00000043L) +#define NXAPI_DRIVER_REG_CREATE_KEY ((int32_t)0x00000044L) +#define NXAPI_DRIVER_REG_DELETE_KEY ((int32_t)0x00000045L) +#define NXAPI_DRIVER_REG_READ_KEY ((int32_t)0x00000046L) + +#define NXAPI_DRIVER_REG_ENUM_VALUE ((int32_t)0x00000047L) +#define NXAPI_DRIVER_REG_CREATE_VALUE ((int32_t)0x00000048L) +#define NXAPI_DRIVER_REG_DELETE_VALUE ((int32_t)0x00000049L) +#define NXAPI_DRIVER_REG_READ_VALUE ((int32_t)0x0000004AL) +#define NXAPI_DRIVER_REG_WRITE_VALUE ((int32_t)0x0000004BL) + + + +/***************************************************************************** +**** nxAPI Download Command definitions **** +*****************************************************************************/ +#define NXAPI_CMD_FIRMWARE 0x00000001L +#define NXAPI_CMD_CONFIGURATION 0x00000002L +#define NXAPI_CMD_WARMSTART 0x00000003L +#define NXAPI_CMD_BOOTLOADER 0x00000004L + +/***************************************************************************** +**** nxAPI Configuration Command definitions **** +*****************************************************************************/ +#define NXAPI_CMD_READ_DRIVER_CFG 0x00000001L +#define NXAPI_CMD_WRITE_DRIVER_CFG 0x00000002L +#define NXAPI_CMD_READ_CHANNEL_CFG 0x00000003L +#define NXAPI_CMD_WRITE_CHANNEL_CFG 0x00000004L + +#define NXAPI_CMD_READ_FILE_CFG 0x00000005L +#define NXAPI_CMD_DELETE_FW_FILE 0x00000006L +#define NXAPI_CMD_DELETE_CFG_FILE 0x00000007L +#define NXAPI_CMD_DELETE_ALL_FILES 0x00000008L + +#define NXAPI_CFG_DATATYPE_STRING 0x00000001L /* Null terminated string */ +#define NXAPI_CFG_DATATYPE_BINARY 0x00000003L +#define NXAPI_CFG_DATATYPE_DWORD 0x00000004L + + +/***************************************************************************** +**** INCLUDE FILES AND CONSTANT DEFINITIONS **** +*****************************************************************************/ +#define NXDRV_NAME_LENGTH 64 +#define NXDRV_VERSION_LENGTH 64 + +/* Global hardware driver type */ +#define NXDRV_TYPE_DPM 0x00000001 +#define NXDRV_TYPE_USB 0x00000002 +#define NXDRV_TYPE_SERIAL 0x00000004 +#define NXDRV_TYPE_ETH 0x00000008 + +/* Global driver Requirements */ +#define NXDRV_REQ_STARTUP_SW 0x00000001 + +/* Command Definitions */ +#define NXDRV_FIND_FIRST 1 +#define NXDRV_FIND_NEXT 2 + +/* Command definitions of Extended Name */ +#define NXCON_GET_FULL_NAME 1 +#define NXCON_GET_SHORT_NAME 2 + +/* defines of the nxCon functions */ +#define NXCON_MAX_LENGTH_CONNECTOR_IDENTIFIER 6 +#define NXCON_UUID_STRING_SIZE 37 +#define NXCON_FILE_NAME_LENGTH 256 +#define NXCON_DESCRIPTION_LENGTH 64 + +/*****************************************************************************/ +/*! typedef struct NXDRV_HW_INFORMATION +** Structure contains information about available drivers */ +/*****************************************************************************/ +typedef struct tagNXDRV_HW_INFORMATION +{ + char szDriverName[NXDRV_NAME_LENGTH]; /*!< Name of the driver */ + char szVersion[NXDRV_NAME_LENGTH]; /*!< Driver version */ + uint32_t ulDriverType; /*!< Driver type */ + uint32_t ulDriverRequirements; /*!< Driver requirements */ + uint32_t ulDeviceClass; /*!< Supported device class */ +} NXDRV_HW_INFORMATION, *PNXDRV_HW_INFORMATION; + +/*****************************************************************************/ +/*! typedef struct NXDRV_DEVICE_INFORMATION +** Structure contains the drivers device information. */ +/*****************************************************************************/ +typedef struct tagNXDRV_DEVICE_INFORMATION +{ + CIFXHANDLE hDevice; /*!< Device handle */ + char szDeviceName[NXDRV_NAME_LENGTH];/*!< Device name */ + SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK tSystemInfoBlock; /*!< Device System Info Block */ +} NXDRV_DEVICE_INFORMATION, *PNXDRV_DEVICE_INFORMATION; + +/*****************************************************************************/ +/*! typedef struct NXDRV_CONFIG_INFORMATION +** Structure contains the driver configuration information. */ +/*****************************************************************************/ +typedef struct tagNXDRV_DRIVER_CFG_DATA_INFO +{ + char szValueName[NXDRV_NAME_LENGTH]; /*!< Value name */ + uint32_t ulValueIndex; /*!< Value index */ + uint32_t ulValueType; /*!< Value type */ + uint32_t ulValueSize; /*!< Value size */ +} NXDRV_DRIVER_CFG_DATA_INFO, *PNXDRV_DRIVER_CFG_DATA_INFO; + + +typedef int32_t(APIENTRY *PFN_NXDRV_INFO) (uint32_t ulSize, void* pvInfo); +typedef void(APIENTRY *PFN_NXAPI_PROGRESS_CALLBACK)(uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, char bFinished, int32_t lError); +typedef void(APIENTRY *PFN_NXAPI_BROWSE_CALLBACK) (uint32_t ulBoard,BOARD_INFORMATION* ptBoardInfo, uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, char bFinished, int32_t lError); + +/*****************************************************************************/ +/*! netX API driver functions */ +/*****************************************************************************/ +int32_t APIENTRY nxDrvInit ( void); +int32_t APIENTRY nxDrvExit ( void); +int32_t APIENTRY nxDrvGetInformation ( uint32_t ulSize, + PNXDRV_HW_INFORMATION ptDrvInfo); + +int32_t APIENTRY nxDrvFindDevice ( uint32_t ulCmd, uint32_t ulInfoSize, + NXDRV_DEVICE_INFORMATION* ptDeviceInfo, uint32_t* pulSearchIdx); + +int32_t APIENTRY nxDrvBrowseDevices ( PFN_NXAPI_BROWSE_CALLBACK pfnCallback, void* pvUser); + +int32_t APIENTRY nxDrvDownload ( CIFXHANDLE hDevice, uint32_t ulChannel, uint32_t ulCmd, + uint32_t ulFileSize, char* pszFileName, unsigned char* pabFileData, + void* pvUser, PFN_NXAPI_PROGRESS_CALLBACK pfnCallback); + +int32_t APIENTRY nxDrvStart ( CIFXHANDLE hDevice, uint32_t ulChannel); +int32_t APIENTRY nxDrvStartEx ( CIFXHANDLE hDevice, uint32_t ulChannel, uint32_t ulResetTimeout, uint32_t ulMode); + +int32_t APIENTRY nxDrvGetConfigInfo ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, uint32_t ulSearchIndex, uint32_t ulBufferSize, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData); +int32_t APIENTRY nxDrvGetConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData, uint32_t ulBufferSize, void* pvData); +int32_t APIENTRY nxDrvSetConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData, uint32_t ulBufferSize, void* pvData); +int32_t APIENTRY nxDrvDeleteConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData); + +/*************************************************************************** +* Extension of nxAPI ( Connector extension ) +***************************************************************************/ +int32_t APIENTRY nxConGetConfig ( char* szUUID, uint32_t* pulConfigSize, char* pcConfig); +int32_t APIENTRY nxConSetConfig ( char* szUUID, char* pcConfig); +int32_t APIENTRY nxConCreateConfigDialog ( char* szUUID, void* pvParentWnd, void** pvDialogWnd); +int32_t APIENTRY nxConCloseConfigDialog ( char* szUUID, int32_t fSaveChanges); +int32_t APIENTRY nxConEnumerate ( uint32_t ulConnectorIdx, uint32_t ulSize, void* pvConnectorInfo); +int32_t APIENTRY nxConGetCorrespondName ( char* szSourceName, uint32_t ulCmd, uint32_t ulCorrespondSize, char* szCorrespondName); + +/*************************************************************************** +* CIFX Device Driver API Functions +***************************************************************************/ +/* Global driver functions */ +typedef int32_t (APIENTRY *PFN_DRVOPEN) ( CIFXHANDLE* phDriver); +typedef int32_t (APIENTRY *PFN_DRVCLOSE) ( CIFXHANDLE hDriver); +typedef int32_t (APIENTRY *PFN_DRVGETINFORMATION) ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +typedef int32_t (APIENTRY *PFN_DRVGETERRORDESCRIPTION) ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +typedef int32_t (APIENTRY *PFN_DRVENUMBOARDS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +typedef int32_t (APIENTRY *PFN_DRVENUMCHANNELS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); + +/* System device depending functions */ +typedef int32_t (APIENTRY *PFN_SYSDEVICEOPEN) ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +typedef int32_t (APIENTRY *PFN_SYSDEVICECLOSE) ( CIFXHANDLE hSysdevice); +typedef int32_t (APIENTRY *PFN_SYSDEVICEGETMBXSTATE) ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_SYSDEVICEPUTPACKET) ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICEGETPACKET) ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICEINFO) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +typedef int32_t (APIENTRY *PFN_SYSDEVICEFINDFIRSTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_SYSDEVICEFINDNEXTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_SYSDEVICEDOWNLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_SYSDEVICEUPLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_SYSDEVICERESET) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICERESETEX) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); + +typedef int32_t (APIENTRY *PFN_CHANNELOPEN) ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +typedef int32_t (APIENTRY *PFN_CHANNELCLOSE) ( CIFXHANDLE hChannel); + +typedef int32_t (APIENTRY *PFN_CHANNELFINDFIRSTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_CHANNELFINDNEXTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_CHANNELDOWNLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_CHANNELUPLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_CHANNELGETMBXSTATE) ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_CHANNELPUTPACKET) ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELGETPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); + +typedef int32_t (APIENTRY *PFN_CHANNELCONTROLBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELCOMMONSTATUSBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELEXTENDEDSTATUSBLOCK)( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELUSERBLOCK) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_CHANNELCONFIGLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELRESET) ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELINFO) ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_CHANNELHOSTSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELBUSSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELIOINFO) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELIOREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELIOWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); + + +typedef struct NXDRV_FUNCTION_TABLEtag +{ + /* The cifX API interface */ + PFN_DRVOPEN pfnDriverOpen; /*!< xDriverOpen */ + PFN_DRVCLOSE pfnDriverClose; + PFN_DRVGETINFORMATION pfnDriverGetInformation; + PFN_DRVGETERRORDESCRIPTION pfnDriverGetErrorDescription; + PFN_DRVENUMBOARDS pfnDriverEnumBoards; + PFN_DRVENUMCHANNELS pfnDriverEnumChannels; + + /* System channel functions */ + PFN_SYSDEVICEOPEN pfnSysdeviceOpen; + PFN_SYSDEVICECLOSE pfnSysdeviceClose; + PFN_SYSDEVICEGETMBXSTATE pfnSysdeviceGetMBXState; + PFN_SYSDEVICEPUTPACKET pfnSysdevicePutPacket; + PFN_SYSDEVICEGETPACKET pfnSysdeviceGetPacket; + PFN_SYSDEVICEINFO pfnSysdeviceInfo; + PFN_SYSDEVICEFINDFIRSTFILE pfnSysdeviceFindFirstFile; + PFN_SYSDEVICEFINDNEXTFILE pfnSysdeviceFindNextFile; + + PFN_SYSDEVICEDOWNLOAD pfnSysdeviceDownload; + PFN_SYSDEVICEUPLOAD pfnSysdeviceUpload; + + PFN_SYSDEVICERESET pfnSysdeviceReset; + PFN_SYSDEVICERESETEX pfnSysdeviceResetEx; + + /* Communication channel functions */ + PFN_CHANNELOPEN pfnChannelOpen; + PFN_CHANNELCLOSE pfnChannelClose; + PFN_CHANNELFINDFIRSTFILE pfnChannelFindFirstFile; + PFN_CHANNELFINDNEXTFILE pfnChannelFindNextFile; + + PFN_CHANNELDOWNLOAD pfnChannelDownload; + PFN_CHANNELUPLOAD pfnChannelUpload; + + PFN_CHANNELGETMBXSTATE pfnChannelGetMBXState; + PFN_CHANNELPUTPACKET pfnChannelPutPacket; + PFN_CHANNELGETPACKET pfnChannelGetPacket; + + PFN_CHANNELCONTROLBLOCK pfnChannelControlBlock; + PFN_CHANNELCOMMONSTATUSBLOCK pfnChannelCommonStatusBlock; + PFN_CHANNELEXTENDEDSTATUSBLOCK pfnChannelExtendedStatusBlock; +/* PFN_CHANNELUSERBLOCK pfnChannelUserBlock; */ + + PFN_CHANNELCONFIGLOCK pfnChannelConfigLock; + PFN_CHANNELRESET pfnChannelReset; + PFN_CHANNELINFO pfnChannelInfo; + PFN_CHANNELHOSTSTATE pfnChannelHostState; + PFN_CHANNELBUSSTATE pfnChannelBusState; + PFN_CHANNELIOINFO pfnChannelIOInfo; + PFN_CHANNELIOREAD pfnChannelIORead; + PFN_CHANNELIOWRITE pfnChannelIOWrite; + +} NXDRV_FUNCTION_TABLE, *PNXDRV_FUNCTION_TABLE; + +/*****************************************************************************/ +/*! typedef struct NXDRV_INFORMATION +** Structure contains the cifX driver information about available driver DLLs*/ +/*****************************************************************************/ +typedef struct tagNXDRV_INFORMATION +{ + CIFXHANDLE hDriver; + int32_t lError; + NXDRV_FUNCTION_TABLE* ptFnc; +} NXDRV_INFORMATION, *PNXDRV_INFORMATION; + +/*************************************************************************** +* Extension of nxAPI ( Connector extension ) +***************************************************************************/ + +/*****************************************************************************/ +/*! typedef struct NXCON_CONNECTOR_INFO_T +** Structure contains the connector information of a available connector */ +/*****************************************************************************/ +typedef struct NXCON_CONNECTOR_INFO_Ttag +{ + char szConnectorUUID [NXCON_UUID_STRING_SIZE]; /*!< UUID of the selected connector */ + char szIdentifier [NXCON_MAX_LENGTH_CONNECTOR_IDENTIFIER]; /*!< Identifier of the connector */ + char szFileName [NXCON_FILE_NAME_LENGTH]; /*!< File name of the connector */ + char szFullFileName [NXCON_FILE_NAME_LENGTH]; /*!< Full file name of the connector */ + char szDescription [NXCON_DESCRIPTION_LENGTH]; /*!< Description of the connector */ + uint32_t ulConnectorType; /*!< Supported types of the selected connector */ +} NXCON_CONNECTOR_INFO_T, *PNXCON_CONNECTOR_INFO_T; + +/***************************************************************************/ + +#ifdef __cplusplus +} +#endif + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __NETxAPI_H */ diff --git a/examples/tcpserver/Marshaller/cifXAPI_Wrapper.h b/examples/tcpserver/Marshaller/cifXAPI_Wrapper.h new file mode 100644 index 0000000..551d155 --- /dev/null +++ b/examples/tcpserver/Marshaller/cifXAPI_Wrapper.h @@ -0,0 +1,173 @@ +/************************************************************************************** + + Copyright (c) Hilscher GmbH. All Rights Reserved. + + ************************************************************************************** + + Filename: + $Workfile: OS_CifXModul.h $ + Last Modification: + $Author: AlexanderMinor $ + $Modtime: $ + $Revision: 12813 $ + + Targets: + Win32/ANSI : yes + Win32/Unicode: yes (define _UNICODE) + WinCE : yes + + Description: + cifX function pointers for cifX marshalling module + + Changes: + + Version Date Author Description + ---------------------------------------------------------------------------------- + 3 26.09.2013 SS Added support for xDriverRestartDevice call + 2 25.06.2010 SD Change: + - changed types of driver functions (for 64-bit support) + 1 25.05.2009 PL intitial version + +**************************************************************************************/ + +#ifndef __CIFXAPI_WRAPPPER__H +#define __CIFXAPI_WRAPPPER__H + +/*****************************************************************************/ +/*! \file cifXAPI_Wrapper.h +* cifX function pointers for cifX marshalling module */ +/*****************************************************************************/ + +#ifdef __cplusplus + extern "C" { +#endif + +#include "cifXUser.h" + +/*****************************************************************************/ +/*! \addtogroup NETX_MARSHALLER_CIFX +* \{ */ +/*****************************************************************************/ +/* Global driver functions */ +typedef int32_t(APIENTRY *PFN_xDriverOpen )( CIFXHANDLE* phDriver); +typedef int32_t(APIENTRY *PFN_xDriverClose )( CIFXHANDLE hDriver); +typedef int32_t(APIENTRY *PFN_xDriverGetInformation )( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +typedef int32_t(APIENTRY *PFN_xDriverGetErrorDescription )( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +typedef int32_t(APIENTRY *PFN_xDriverEnumBoards )( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +typedef int32_t(APIENTRY *PFN_xDriverEnumChannels )( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t(APIENTRY *PFN_xDriverMemoryPointer )( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd,void* pvMemoryInfo); +typedef int32_t(APIENTRY *PFN_xDriverRestartDevice )( CIFXHANDLE hDriver, char* szBoardName, void* pvData); + +/* System device depending functions */ +typedef int32_t(APIENTRY *PFN_xSysdeviceOpen )( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +typedef int32_t(APIENTRY *PFN_xSysdeviceClose )( CIFXHANDLE hSysdevice); +typedef int32_t(APIENTRY *PFN_xSysdeviceGetMBXState )( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t(APIENTRY *PFN_xSysdevicePutPacket )( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xSysdeviceGetPacket )( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xSysdeviceInfo )( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +typedef int32_t(APIENTRY *PFN_xSysdeviceFindFirstFile )( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t(APIENTRY *PFN_xSysdeviceFindNextFile )( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t(APIENTRY *PFN_xSysdeviceDownload )( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* szFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t(APIENTRY *PFN_xSysdeviceReset )( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xSysdeviceResetEx )( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); + +/* Channel depending functions */ +typedef int32_t(APIENTRY *PFN_xChannelOpen )( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +typedef int32_t(APIENTRY *PFN_xChannelClose )( CIFXHANDLE hChannel); +typedef int32_t(APIENTRY *PFN_xChannelFindFirstFile )( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t(APIENTRY *PFN_xChannelFindNextFile )( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t(APIENTRY *PFN_xChannelDownload )( CIFXHANDLE hChannel, uint32_t ulMode, char* szFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t(APIENTRY *PFN_xChannelGetMBXState )( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t(APIENTRY *PFN_xChannelPutPacket )( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelGetPacket )( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelGetSendPacket )( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt); + +typedef int32_t(APIENTRY *PFN_xChannelConfigLock )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelReset )( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelInfo )( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t(APIENTRY *PFN_xChannelWatchdog )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger); +typedef int32_t(APIENTRY *PFN_xChannelHostState )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelBusState )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); + +typedef int32_t(APIENTRY *PFN_xChannelIOInfo )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +typedef int32_t(APIENTRY *PFN_xChannelIORead )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelIOWrite )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t(APIENTRY *PFN_xChannelIOReadSendData )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t(APIENTRY *PFN_xChannelControlBlock )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t(APIENTRY *PFN_xChannelCommonStatusBlock )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t(APIENTRY *PFN_xChannelExtendedStatusBlock )( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t(APIENTRY *PFN_xChannelUserBlock )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t(APIENTRY *PFN_xChannelPLCMemoryPtr )( CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo); +typedef int32_t(APIENTRY *PFN_xChannelPLCIsReadReady )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t * pulReadState); +typedef int32_t(APIENTRY *PFN_xChannelPLCIsWriteReady )( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t * pulWriteState); +typedef int32_t(APIENTRY *PFN_xChannelPLCActivateWrite )( CIFXHANDLE hChannel, uint32_t ulAreaNumber); +typedef int32_t(APIENTRY *PFN_xChannelPLCActivateRead )( CIFXHANDLE hChannel, uint32_t ulAreaNumber); + +typedef struct DRIVER_FUNCTIONStag +{ + PFN_xDriverOpen pfnxDriverOpen; + PFN_xDriverClose pfnxDriverClose; + PFN_xDriverGetInformation pfnxDriverGetInformation; + PFN_xDriverGetErrorDescription pfnxDriverGetErrorDescription; + PFN_xDriverEnumBoards pfnxDriverEnumBoards; + PFN_xDriverEnumChannels pfnxDriverEnumChannels; + PFN_xDriverMemoryPointer pfnxDriverMemoryPointer; + PFN_xDriverRestartDevice pfnxDriverRestartDevice; + PFN_xSysdeviceOpen pfnxSysdeviceOpen; + PFN_xSysdeviceClose pfnxSysdeviceClose; + PFN_xSysdeviceReset pfnxSysdeviceReset; + PFN_xSysdeviceResetEx pfnxSysdeviceResetEx; + PFN_xSysdeviceGetMBXState pfnxSysdeviceGetMBXState; + PFN_xSysdevicePutPacket pfnxSysdevicePutPacket; + PFN_xSysdeviceGetPacket pfnxSysdeviceGetPacket; + PFN_xSysdeviceDownload pfnxSysdeviceDownload; + PFN_xSysdeviceInfo pfnxSysdeviceInfo; + PFN_xSysdeviceFindFirstFile pfnxSysdeviceFindFirstFile; + PFN_xSysdeviceFindNextFile pfnxSysdeviceFindNextFile; + PFN_xChannelOpen pfnxChannelOpen; + PFN_xChannelClose pfnxChannelClose; + PFN_xChannelDownload pfnxChannelDownload; + PFN_xChannelGetMBXState pfnxChannelGetMBXState; + PFN_xChannelPutPacket pfnxChannelPutPacket; + PFN_xChannelGetPacket pfnxChannelGetPacket; + PFN_xChannelGetSendPacket pfnxChannelGetSendPacket; + PFN_xChannelConfigLock pfnxChannelConfigLock; + PFN_xChannelReset pfnxChannelReset; + PFN_xChannelInfo pfnxChannelInfo; + PFN_xChannelFindFirstFile pfnxChannelFindFirstFile; + PFN_xChannelFindNextFile pfnxChannelFindNextFile; + PFN_xChannelWatchdog pfnxChannelWatchdog; + PFN_xChannelHostState pfnxChannelHostState; + PFN_xChannelBusState pfnxChannelBusState; + PFN_xChannelIOInfo pfnxChannelIOInfo; + PFN_xChannelIORead pfnxChannelIORead; + PFN_xChannelIOWrite pfnxChannelIOWrite; + PFN_xChannelIOReadSendData pfnxChannelIOReadSendData; + PFN_xChannelControlBlock pfnxChannelControlBlock; + PFN_xChannelCommonStatusBlock pfnxChannelCommonStatusBlock; + PFN_xChannelExtendedStatusBlock pfnxChannelExtendedStatusBlock; + PFN_xChannelUserBlock pfnxChannelUserBlock; + PFN_xChannelPLCMemoryPtr pfnxChannelPLCMemoryPtr; + PFN_xChannelPLCIsReadReady pfnxChannelPLCIsReadReady; + PFN_xChannelPLCIsWriteReady pfnxChannelPLCIsWriteReady; + PFN_xChannelPLCActivateWrite pfnxChannelPLCActivateWrite; + PFN_xChannelPLCActivateRead pfnxChannelPLCActivateRead; +} DRIVER_FUNCTIONS, *PDRIVER_FUNCTIONS; + +#ifdef __cplusplus + } +#endif + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __CIFXAPI_WRAPPPER__H */ diff --git a/examples/tcpserver/Marshaller/doc/html/images/hilscher_logo.jpg b/examples/tcpserver/Marshaller/doc/html/images/hilscher_logo.jpg new file mode 100644 index 0000000..3572a33 Binary files /dev/null and b/examples/tcpserver/Marshaller/doc/html/images/hilscher_logo.jpg differ diff --git a/examples/tcpserver/Marshaller/doxygen.h b/examples/tcpserver/Marshaller/doxygen.h new file mode 100644 index 0000000..056828b --- /dev/null +++ b/examples/tcpserver/Marshaller/doxygen.h @@ -0,0 +1,32 @@ +/*****************************************************************************/ +/*! \defgroup NETX_MARSHALLER netX Marshaller +* +* Communication interface for remote DPM access and diagnostics +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup NETX_MARSHALLER_MAIN netX Marshaller main module +* \ingroup NETX_MARSHALLER +* Marshaller core module */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup NETX_MARSHALLER_CONFIGURATION netX Marshaller configuration +* \ingroup NETX_MARSHALLER +* Marshaller configuration structures */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup NETX_MARSHALLER_INTERNAL netX Marshaller internals +* \ingroup NETX_MARSHALLER +* +* Internally used modules. These are needed by connector / transport +* developers. +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup NETX_MARSHALLER_CIFX cifX API marshalling module +* \ingroup NETX_MARSHALLER */ +/*****************************************************************************/ diff --git a/examples/tcpserver/Marshaller/doxygen/Doxyfile.cfg b/examples/tcpserver/Marshaller/doxygen/Doxyfile.cfg new file mode 100644 index 0000000..cdb62e2 --- /dev/null +++ b/examples/tcpserver/Marshaller/doxygen/Doxyfile.cfg @@ -0,0 +1,286 @@ +# Doxyfile 1.4.3 + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- +PROJECT_NAME = "netX Marshaller" +PROJECT_NUMBER = +OUTPUT_DIRECTORY = ../doc +CREATE_SUBDIRS = NO +OUTPUT_LANGUAGE = English +USE_WINDOWS_ENCODING = YES +BRIEF_MEMBER_DESC = YES +REPEAT_BRIEF = YES +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the +ALWAYS_DETAILED_SEC = YES +INLINE_INHERITED_MEMB = NO +FULL_PATH_NAMES = YES +STRIP_FROM_PATH = +STRIP_FROM_INC_PATH = +SHORT_NAMES = NO +JAVADOC_AUTOBRIEF = NO +MULTILINE_CPP_IS_BRIEF = NO +DETAILS_AT_TOP = NO +INHERIT_DOCS = YES +DISTRIBUTE_GROUP_DOC = NO +SEPARATE_MEMBER_PAGES = NO +TAB_SIZE = 8 +ALIASES = +OPTIMIZE_OUTPUT_FOR_C = NO +OPTIMIZE_OUTPUT_JAVA = NO +SUBGROUPING = YES +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- +EXTRACT_ALL = YES +EXTRACT_PRIVATE = YES +EXTRACT_STATIC = YES +EXTRACT_LOCAL_CLASSES = YES +EXTRACT_LOCAL_METHODS = YES +HIDE_UNDOC_MEMBERS = YES +HIDE_UNDOC_CLASSES = YES +HIDE_FRIEND_COMPOUNDS = NO +HIDE_IN_BODY_DOCS = NO +INTERNAL_DOCS = NO +CASE_SENSE_NAMES = YES +HIDE_SCOPE_NAMES = NO +SHOW_INCLUDE_FILES = YES +INLINE_INFO = YES +SORT_MEMBER_DOCS = YES +SORT_BRIEF_DOCS = NO +SORT_BY_SCOPE_NAME = NO +GENERATE_TODOLIST = YES +GENERATE_TESTLIST = NO +GENERATE_BUGLIST = YES +GENERATE_DEPRECATEDLIST= YES +ENABLED_SECTIONS = +MAX_INITIALIZER_LINES = 10 +SHOW_USED_FILES = NO +SHOW_DIRECTORIES = NO +FILE_VERSION_FILTER = +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- +QUIET = NO +WARNINGS = YES +WARN_IF_UNDOCUMENTED = YES +WARN_IF_DOC_ERROR = YES +WARN_NO_PARAMDOC = YES +WARN_FORMAT = "$file($line) $text" +WARN_LOGFILE = doxygen.log +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- +INPUT = ../ +FILE_PATTERNS = *.c \ + *.h +RECURSIVE = YES +EXCLUDE = ../TLR_Types.H \ + ../TLR_Results.h +EXCLUDE_SYMLINKS = NO +EXCLUDE_PATTERNS = +EXAMPLE_PATH = . +EXAMPLE_PATTERNS = +EXAMPLE_RECURSIVE = YES +IMAGE_PATH = +INPUT_FILTER = +FILTER_PATTERNS = +FILTER_SOURCE_FILES = NO +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- +SOURCE_BROWSER = NO +INLINE_SOURCES = NO +STRIP_CODE_COMMENTS = YES +REFERENCED_BY_RELATION = YES +REFERENCES_RELATION = YES +USE_HTAGS = NO +VERBATIM_HEADERS = YES +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- +ALPHABETICAL_INDEX = YES +COLS_IN_ALPHA_INDEX = 5 +IGNORE_PREFIX = +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- +GENERATE_HTML = YES +HTML_OUTPUT = +HTML_FILE_EXTENSION = +HTML_HEADER = ./header.html +HTML_FOOTER = ./footer.html +HTML_STYLESHEET = ./hilscher.css +HTML_ALIGN_MEMBERS = YES +GENERATE_HTMLHELP = YES +CHM_FILE = netX_Marshaller.chm +HHC_LOCATION = "D:/Programme/HTML Help Workshop/hhc.exe" +GENERATE_CHI = NO +BINARY_TOC = NO +TOC_EXPAND = NO +DISABLE_INDEX = YES +ENUM_VALUES_PER_LINE = 4 +GENERATE_TREEVIEW = YES +TREEVIEW_WIDTH = 250 +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- +GENERATE_LATEX = YES +LATEX_OUTPUT = +LATEX_CMD_NAME = latex +MAKEINDEX_CMD_NAME = +COMPACT_LATEX = NO +PAPER_TYPE = a4 +EXTRA_PACKAGES = +LATEX_HEADER = ./header.tex +PDF_HYPERLINKS = YES +USE_PDFLATEX = YES +LATEX_BATCHMODE = YES +LATEX_HIDE_INDICES = NO +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- +GENERATE_RTF = NO +RTF_OUTPUT = +COMPACT_RTF = NO +RTF_HYPERLINKS = YES +RTF_STYLESHEET_FILE = +RTF_EXTENSIONS_FILE = +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- +GENERATE_MAN = NO +MAN_OUTPUT = +MAN_EXTENSION = .3 +MAN_LINKS = YES +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- +GENERATE_XML = NO +XML_OUTPUT = xml +XML_SCHEMA = +XML_DTD = +XML_PROGRAMLISTING = YES +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- +GENERATE_AUTOGEN_DEF = NO +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- +GENERATE_PERLMOD = NO +PERLMOD_LATEX = NO +PERLMOD_PRETTY = YES +PERLMOD_MAKEVAR_PREFIX = +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- +ENABLE_PREPROCESSING = YES +MACRO_EXPANSION = NO +EXPAND_ONLY_PREDEF = NO +SEARCH_INCLUDES = YES +INCLUDE_PATH = +INCLUDE_FILE_PATTERNS = +PREDEFINED = "DECLARE_INTERFACE(name)=class name" \ + "STDMETHOD(result,name)=virtual result name" \ + "PURE= = 0" \ + THIS_= \ + THIS= \ + DECLARE_REGISTRY_RESOURCEID=// \ + DECLARE_PROTECT_FINAL_CONSTRUCT=// \ + "DECLARE_AGGREGATABLE(Class)= " \ + "DECLARE_REGISTRY_RESOURCEID(Id)= " \ + DECLARE_MESSAGE_MAP \ + = \ + BEGIN_MESSAGE_MAP=/* \ + END_MESSAGE_MAP=*/// \ + BEGIN_COM_MAP=/* \ + END_COM_MAP=*/// \ + BEGIN_PROP_MAP=/* \ + END_PROP_MAP=*/// \ + BEGIN_MSG_MAP=/* \ + END_MSG_MAP=*/// \ + BEGIN_PROPERTY_MAP=/* \ + END_PROPERTY_MAP=*/// \ + BEGIN_OBJECT_MAP=/* \ + END_OBJECT_MAP()=*/// \ + DECLARE_VIEW_STATUS=// \ + "STDMETHOD(a)=HRESULT a" \ + "ATL_NO_VTABLE= " \ + "__declspec(a)= " \ + BEGIN_CONNECTION_POINT_MAP=/* \ + END_CONNECTION_POINT_MAP=*/// \ + "DECLARE_DYNAMIC(class)= " \ + "IMPLEMENT_DYNAMIC(class1, class2)= " \ + "DECLARE_DYNCREATE(class)= " \ + "IMPLEMENT_DYNCREATE(class1, class2)= " \ + "IMPLEMENT_SERIAL(class1, class2, class3)= " \ + "DECLARE_MESSAGE_MAP()= " \ + TRY=try \ + "CATCH_ALL(e)= catch(...)" \ + END_CATCH_ALL= \ + "THROW_LAST()= throwRUNTIME_CLASS(class)=class" \ + MAKEINTRESOURCE(nId)=nId \ + "IMPLEMENT_REGISTER(v, w, x, y, z)= " \ + ASSERT(x)=assert(x) \ + ASSERT_VALID(x)=assert(x) \ + TRACE0(x)=printf(x) \ + "OS_ERR(A,B)={ #A, B }" \ + __cplusplus \ + "DECLARE_OLECREATE(class)= " \ + "BEGIN_DISPATCH_MAP(class1, class2)= " \ + "INTERFACE_PART(class, id, name)= " \ + END_INTERFACE_MAP()= \ + "DISP_FUNCTION(class, name, function, result, id)=" \ + END_DISPATCH_MAP()= \ + "IMPLEMENT_OLECREATE2(class, name, id1, id2, id3, id4, id5, id6, id7, id8, id9, id10, id11)=" +EXPAND_AS_DEFINED = +SKIP_FUNCTION_MACROS = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- +TAGFILES = +GENERATE_TAGFILE = +ALLEXTERNALS = NO +EXTERNAL_GROUPS = NO +PERL_PATH = +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- +CLASS_DIAGRAMS = YES +HIDE_UNDOC_RELATIONS = NO +HAVE_DOT = YES +CLASS_GRAPH = YES +COLLABORATION_GRAPH = YES +GROUP_GRAPHS = YES +UML_LOOK = NO +TEMPLATE_RELATIONS = YES +INCLUDE_GRAPH = YES +INCLUDED_BY_GRAPH = YES +CALL_GRAPH = YES +GRAPHICAL_HIERARCHY = YES +DIRECTORY_GRAPH = YES +DOT_IMAGE_FORMAT = png +DOT_PATH = +DOTFILE_DIRS = +MAX_DOT_GRAPH_WIDTH = 1024 +MAX_DOT_GRAPH_HEIGHT = 1024 +MAX_DOT_GRAPH_DEPTH = 1000 +DOT_TRANSPARENT = NO +DOT_MULTI_TARGETS = NO +GENERATE_LEGEND = YES +DOT_CLEANUP = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- +SEARCHENGINE = NO diff --git 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+HR { height: 1px; + border: none; + border-top: 1px solid black; + width: auto; +} diff --git a/examples/tcpserver/Marshaller/doxygen/footer.html b/examples/tcpserver/Marshaller/doxygen/footer.html new file mode 100644 index 0000000..f74cd90 --- /dev/null +++ b/examples/tcpserver/Marshaller/doxygen/footer.html @@ -0,0 +1,25 @@ + + + + + + + + +
+ + + + + +
+
Hilscher Homepage + +
+ 		+ Generated on $datetime +
+
+
Copyright Hilscher Gesellschaft fr Systemautomation mbH.
+
+ diff --git a/examples/tcpserver/Marshaller/doxygen/header.html b/examples/tcpserver/Marshaller/doxygen/header.html new file mode 100644 index 0000000..4aaffe4 --- /dev/null +++ b/examples/tcpserver/Marshaller/doxygen/header.html @@ -0,0 +1,26 @@ + + + netX Marshaller Source Code: Documentation (Hilscher GmbH) + + + +
+
+
+ + + + + + + +
+ Back to index + + +

netX Marshaller Source Code Documentation

+
+
+
+
+
diff --git a/examples/tcpserver/Marshaller/doxygen/header.tex b/examples/tcpserver/Marshaller/doxygen/header.tex new file mode 100644 index 0000000..69c6865 --- /dev/null +++ b/examples/tcpserver/Marshaller/doxygen/header.tex @@ -0,0 +1,71 @@ +\documentclass[a4paper]{article} +\usepackage{a4wide} +\usepackage{makeidx} +\usepackage{fancyhdr} +\usepackage{graphicx} +\usepackage{multicol} +\usepackage{float} +\usepackage{textcomp} +\usepackage{alltt} +\usepackage[latin1]{inputenc} +\usepackage{hyperref} +\usepackage{bookman} +\usepackage{helvet} +\usepackage{doxygen} +\makeindex +\setcounter{tocdepth}{3} +\renewcommand{\footrulewidth}{0.4pt} + +\makeatletter + +\renewcommand\section{\newpage\@startsection {section}{1}{\z@}% + {-3.5ex \@plus -1ex \@minus -.2ex}% + {2.3ex \@plus.2ex}% + {\normalfont\Large\bfseries}} + +\renewcommand*\l@section{\@dottedtocline{1}{0em}{2.0em}} +\renewcommand*\l@subsection{\@dottedtocline{2}{2.5em}{3.5em}} +\renewcommand*\l@subsubsection{\@dottedtocline{3}{5.0em}{4.0em}} +\renewcommand*\l@paragraph{\@dottedtocline{4}{7.5em}{3.5em}} +\renewcommand*\l@subparagraph{\@dottedtocline{5}{10.0em}{3.5em}} +\makeatother + +\setlength{\headheight}{1.75cm} +\setlength{\topmargin}{0.0cm} +\setcounter{tocdepth}{3} + +\lhead{\includegraphics*[height=1.5cm]{images/hilscher_logo}} +\chead{\fancyplain{}{$projectname}} +\rhead{\fancyplain{}{Page \bfseries\thepage}} + +\lfoot{Hilscher Gesellschaft fr Systemautomation mbH} +\cfoot{} +\rfoot{Internal project documentation} + +\begin{document} + +\begin{titlepage} + +\begin{flushright} +\includegraphics[width=8cm]{images/Hilscher_logo} \\ +\vspace*{7.5cm} +\large Project source code documentation \\ +$projectname \\ +\Large FOR INTERNAL USE ONLY \\ +\normalsize +\vspace*{5.5cm} +Hilscher Gesellschaft fr Systemautomation mbH \\ +65795 Hattersheim \\ +Rheinstra{\ss}e 15 \\ +Tel. 06190/9907-0 \\ +Fax. 06190/9907-50 \\ +\end{flushright} + +\end{titlepage} + +\pagenumbering{roman} +\tableofcontents + +\newpage +\setcounter{page}{1} +\pagenumbering{arabic} diff --git a/examples/tcpserver/Marshaller/doxygen/hilscher_logo.jpg b/examples/tcpserver/Marshaller/doxygen/hilscher_logo.jpg new file mode 100644 index 0000000..3572a33 Binary files /dev/null and b/examples/tcpserver/Marshaller/doxygen/hilscher_logo.jpg differ diff --git a/examples/tcpserver/Marshaller/doxygen/hilscher_logo.png b/examples/tcpserver/Marshaller/doxygen/hilscher_logo.png new file mode 100644 index 0000000..51ee307 Binary files /dev/null and b/examples/tcpserver/Marshaller/doxygen/hilscher_logo.png differ diff --git a/examples/tcpserver/Marshaller/machine/ansi.h b/examples/tcpserver/Marshaller/machine/ansi.h new file mode 100644 index 0000000..737b6d0 --- /dev/null +++ b/examples/tcpserver/Marshaller/machine/ansi.h @@ -0,0 +1 @@ +/* dummy header file to support BSD compiler */ diff --git a/examples/tcpserver/Marshaller/sys/queue.h b/examples/tcpserver/Marshaller/sys/queue.h new file mode 100644 index 0000000..af637ca --- /dev/null +++ b/examples/tcpserver/Marshaller/sys/queue.h @@ -0,0 +1,471 @@ +/* + * Copyright (c) 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)queue.h 8.5 (Berkeley) 8/20/94 + * $FreeBSD: src/sys/sys/queue.h,v 1.48 2002/04/17 14:00:37 tmm Exp $ + */ + +#ifndef _SYS_QUEUE_H_ +#define _SYS_QUEUE_H_ + +#include /* for __offsetof */ + +/* + * This file defines four types of data structures: singly-linked lists, + * singly-linked tail queues, lists and tail queues. + * + * A singly-linked list is headed by a single forward pointer. The elements + * are singly linked for minimum space and pointer manipulation overhead at + * the expense of O(n) removal for arbitrary elements. New elements can be + * added to the list after an existing element or at the head of the list. + * Elements being removed from the head of the list should use the explicit + * macro for this purpose for optimum efficiency. A singly-linked list may + * only be traversed in the forward direction. Singly-linked lists are ideal + * for applications with large datasets and few or no removals or for + * implementing a LIFO queue. + * + * A singly-linked tail queue is headed by a pair of pointers, one to the + * head of the list and the other to the tail of the list. The elements are + * singly linked for minimum space and pointer manipulation overhead at the + * expense of O(n) removal for arbitrary elements. New elements can be added + * to the list after an existing element, at the head of the list, or at the + * end of the list. Elements being removed from the head of the tail queue + * should use the explicit macro for this purpose for optimum efficiency. + * A singly-linked tail queue may only be traversed in the forward direction. + * Singly-linked tail queues are ideal for applications with large datasets + * and few or no removals or for implementing a FIFO queue. + * + * A list is headed by a single forward pointer (or an array of forward + * pointers for a hash table header). The elements are doubly linked + * so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before + * or after an existing element or at the head of the list. A list + * may only be traversed in the forward direction. + * + * A tail queue is headed by a pair of pointers, one to the head of the + * list and the other to the tail of the list. The elements are doubly + * linked so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before or + * after an existing element, at the head of the list, or at the end of + * the list. A tail queue may be traversed in either direction. + * + * For details on the use of these macros, see the queue(3) manual page. + * + * + * SLIST LIST STAILQ TAILQ + * _HEAD + + + + + * _HEAD_INITIALIZER + + + + + * _ENTRY + + + + + * _INIT + + + + + * _EMPTY + + + + + * _FIRST + + + + + * _NEXT + + + + + * _PREV - - - + + * _LAST - - + + + * _FOREACH + + + + + * _FOREACH_REVERSE - - - + + * _INSERT_HEAD + + + + + * _INSERT_BEFORE - + - + + * _INSERT_AFTER + + + + + * _INSERT_TAIL - - + + + * _CONCAT - - + + + * _REMOVE_HEAD + - + - + * _REMOVE + + + + + * + */ + +/* + * Singly-linked List declarations. + */ +#define SLIST_HEAD(name, type) \ +struct name { \ + struct type *slh_first; /* first element */ \ +} + +#define SLIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define SLIST_ENTRY(type) \ +struct { \ + struct type *sle_next; /* next element */ \ +} + +/* + * Singly-linked List functions. + */ +#define SLIST_EMPTY(head) ((head)->slh_first == NULL) + +#define SLIST_FIRST(head) ((head)->slh_first) + +#define SLIST_FOREACH(var, head, field) \ + for ((var) = SLIST_FIRST((head)); \ + (var); \ + (var) = SLIST_NEXT((var), field)) + +#define SLIST_INIT(head) do { \ + SLIST_FIRST((head)) = NULL; \ +} while (0) + +#define SLIST_INSERT_AFTER(slistelm, elm, field) do { \ + SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field); \ + SLIST_NEXT((slistelm), field) = (elm); \ +} while (0) + +#define SLIST_INSERT_HEAD(head, elm, field) do { \ + SLIST_NEXT((elm), field) = SLIST_FIRST((head)); \ + SLIST_FIRST((head)) = (elm); \ +} while (0) + +#define SLIST_NEXT(elm, field) ((elm)->field.sle_next) + +#define SLIST_REMOVE(head, elm, type, field) do { \ + if (SLIST_FIRST((head)) == (elm)) { \ + SLIST_REMOVE_HEAD((head), field); \ + } \ + else { \ + struct type *curelm = SLIST_FIRST((head)); \ + while (SLIST_NEXT(curelm, field) != (elm)) \ + curelm = SLIST_NEXT(curelm, field); \ + SLIST_NEXT(curelm, field) = \ + SLIST_NEXT(SLIST_NEXT(curelm, field), field); \ + } \ +} while (0) + +#define SLIST_REMOVE_HEAD(head, field) do { \ + SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field); \ +} while (0) + +/* + * Singly-linked Tail queue declarations. + */ +#define STAILQ_HEAD(name, type) \ +struct name { \ + struct type *stqh_first;/* first element */ \ + struct type **stqh_last;/* addr of last next element */ \ +} + +#define STAILQ_HEAD_INITIALIZER(head) \ + { NULL, &(head).stqh_first } + +#define STAILQ_ENTRY(type) \ +struct { \ + struct type *stqe_next; /* next element */ \ +} + +/* + * Singly-linked Tail queue functions. + */ +#define STAILQ_CONCAT(head1, head2) do { \ + if (!STAILQ_EMPTY((head2))) { \ + *(head1)->stqh_last = (head2)->stqh_first; \ + (head1)->stqh_last = (head2)->stqh_last; \ + STAILQ_INIT((head2)); \ + } \ +} while (0) + +#define STAILQ_EMPTY(head) ((head)->stqh_first == NULL) + +#define STAILQ_FIRST(head) ((head)->stqh_first) + +#define STAILQ_FOREACH(var, head, field) \ + for((var) = STAILQ_FIRST((head)); \ + (var); \ + (var) = STAILQ_NEXT((var), field)) + +#define STAILQ_INIT(head) do { \ + STAILQ_FIRST((head)) = NULL; \ + (head)->stqh_last = &STAILQ_FIRST((head)); \ +} while (0) + +#define STAILQ_INSERT_AFTER(head, tqelm, elm, field) do { \ + if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + STAILQ_NEXT((tqelm), field) = (elm); \ +} while (0) + +#define STAILQ_INSERT_HEAD(head, elm, field) do { \ + if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL) \ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ + STAILQ_FIRST((head)) = (elm); \ +} while (0) + +#define STAILQ_INSERT_TAIL(head, elm, field) do { \ + STAILQ_NEXT((elm), field) = NULL; \ + *(head)->stqh_last = (elm); \ + (head)->stqh_last = &STAILQ_NEXT((elm), field); \ +} while (0) + +#define STAILQ_LAST(head, type, field) \ + (STAILQ_EMPTY((head)) ? \ + NULL : \ + ((struct type *) \ + ((char *)((head)->stqh_last) - __offsetof(struct type, field)))) + +#define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next) + +#define STAILQ_REMOVE(head, elm, type, field) do { \ + if (STAILQ_FIRST((head)) == (elm)) { \ + STAILQ_REMOVE_HEAD((head), field); \ + } \ + else { \ + struct type *curelm = STAILQ_FIRST((head)); \ + while (STAILQ_NEXT(curelm, field) != (elm)) \ + curelm = STAILQ_NEXT(curelm, field); \ + if ((STAILQ_NEXT(curelm, field) = \ + STAILQ_NEXT(STAILQ_NEXT(curelm, field), field)) == NULL)\ + (head)->stqh_last = &STAILQ_NEXT((curelm), field);\ + } \ +} while (0) + +#define STAILQ_REMOVE_HEAD(head, field) do { \ + if ((STAILQ_FIRST((head)) = \ + STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL) \ + (head)->stqh_last = &STAILQ_FIRST((head)); \ +} while (0) + +#define STAILQ_REMOVE_HEAD_UNTIL(head, elm, field) do { \ + if ((STAILQ_FIRST((head)) = STAILQ_NEXT((elm), field)) == NULL) \ + (head)->stqh_last = &STAILQ_FIRST((head)); \ +} while (0) + +/* + * List declarations. + */ +#define LIST_HEAD(name, type) \ +struct name { \ + struct type *lh_first; /* first element */ \ +} + +#define LIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define LIST_ENTRY(type) \ +struct { \ + struct type *le_next; /* next element */ \ + struct type **le_prev; /* address of previous next element */ \ +} + +/* + * List functions. + */ + +#define LIST_EMPTY(head) ((head)->lh_first == NULL) + +#define LIST_FIRST(head) ((head)->lh_first) + +#define LIST_FOREACH(var, head, field) \ + for ((var) = LIST_FIRST((head)); \ + (var); \ + (var) = LIST_NEXT((var), field)) + +#define LIST_INIT(head) do { \ + LIST_FIRST((head)) = NULL; \ +} while (0) + +#define LIST_INSERT_AFTER(listelm, elm, field) do { \ + if ((LIST_NEXT((elm), field) = LIST_NEXT((listelm), field)) != NULL)\ + LIST_NEXT((listelm), field)->field.le_prev = \ + &LIST_NEXT((elm), field); \ + LIST_NEXT((listelm), field) = (elm); \ + (elm)->field.le_prev = &LIST_NEXT((listelm), field); \ +} while (0) + +#define LIST_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.le_prev = (listelm)->field.le_prev; \ + LIST_NEXT((elm), field) = (listelm); \ + *(listelm)->field.le_prev = (elm); \ + (listelm)->field.le_prev = &LIST_NEXT((elm), field); \ +} while (0) + +#define LIST_INSERT_HEAD(head, elm, field) do { \ + if ((LIST_NEXT((elm), field) = LIST_FIRST((head))) != NULL) \ + LIST_FIRST((head))->field.le_prev = &LIST_NEXT((elm), field);\ + LIST_FIRST((head)) = (elm); \ + (elm)->field.le_prev = &LIST_FIRST((head)); \ +} while (0) + +#define LIST_NEXT(elm, field) ((elm)->field.le_next) + +#define LIST_REMOVE(elm, field) do { \ + if (LIST_NEXT((elm), field) != NULL) \ + LIST_NEXT((elm), field)->field.le_prev = \ + (elm)->field.le_prev; \ + *(elm)->field.le_prev = LIST_NEXT((elm), field); \ +} while (0) + +/* + * Tail queue declarations. + */ +#define TAILQ_HEAD(name, type) \ +struct name { \ + struct type *tqh_first; /* first element */ \ + struct type **tqh_last; /* addr of last next element */ \ +} + +#define TAILQ_HEAD_INITIALIZER(head) \ + { NULL, &(head).tqh_first } + +#define TAILQ_ENTRY(type) \ +struct { \ + struct type *tqe_next; /* next element */ \ + struct type **tqe_prev; /* address of previous next element */ \ +} + +/* + * Tail queue functions. + */ +#define TAILQ_CONCAT(head1, head2, field) do { \ + if (!TAILQ_EMPTY(head2)) { \ + *(head1)->tqh_last = (head2)->tqh_first; \ + (head2)->tqh_first->field.tqe_prev = (head1)->tqh_last; \ + (head1)->tqh_last = (head2)->tqh_last; \ + TAILQ_INIT((head2)); \ + } \ +} while (0) + +#define TAILQ_EMPTY(head) ((head)->tqh_first == NULL) + +#define TAILQ_FIRST(head) ((head)->tqh_first) + +#define TAILQ_FOREACH(var, head, field) \ + for ((var) = TAILQ_FIRST((head)); \ + (var); \ + (var) = TAILQ_NEXT((var), field)) + +#define TAILQ_FOREACH_REVERSE(var, head, headname, field) \ + for ((var) = TAILQ_LAST((head), headname); \ + (var); \ + (var) = TAILQ_PREV((var), headname, field)) + +#define TAILQ_INIT(head) do { \ + TAILQ_FIRST((head)) = NULL; \ + (head)->tqh_last = &TAILQ_FIRST((head)); \ +} while (0) + +#define TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ + if ((TAILQ_NEXT((elm), field) = TAILQ_NEXT((listelm), field)) != NULL)\ + TAILQ_NEXT((elm), field)->field.tqe_prev = \ + &TAILQ_NEXT((elm), field); \ + else \ + (head)->tqh_last = &TAILQ_NEXT((elm), field); \ + TAILQ_NEXT((listelm), field) = (elm); \ + (elm)->field.tqe_prev = &TAILQ_NEXT((listelm), field); \ +} while (0) + +#define TAILQ_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.tqe_prev = (listelm)->field.tqe_prev; \ + TAILQ_NEXT((elm), field) = (listelm); \ + *(listelm)->field.tqe_prev = (elm); \ + (listelm)->field.tqe_prev = &TAILQ_NEXT((elm), field); \ +} while (0) + +#define TAILQ_INSERT_HEAD(head, elm, field) do { \ + if ((TAILQ_NEXT((elm), field) = TAILQ_FIRST((head))) != NULL) \ + TAILQ_FIRST((head))->field.tqe_prev = \ + &TAILQ_NEXT((elm), field); \ + else \ + (head)->tqh_last = &TAILQ_NEXT((elm), field); \ + TAILQ_FIRST((head)) = (elm); \ + (elm)->field.tqe_prev = &TAILQ_FIRST((head)); \ +} while (0) + +#define TAILQ_INSERT_TAIL(head, elm, field) do { \ + TAILQ_NEXT((elm), field) = NULL; \ + (elm)->field.tqe_prev = (head)->tqh_last; \ + *(head)->tqh_last = (elm); \ + (head)->tqh_last = &TAILQ_NEXT((elm), field); \ +} while (0) + +#define TAILQ_LAST(head, headname) \ + (*(((struct headname *)((head)->tqh_last))->tqh_last)) + +#define TAILQ_NEXT(elm, field) ((elm)->field.tqe_next) + +#define TAILQ_PREV(elm, headname, field) \ + (*(((struct headname *)((elm)->field.tqe_prev))->tqh_last)) + +#define TAILQ_REMOVE(head, elm, field) do { \ + if ((TAILQ_NEXT((elm), field)) != NULL) \ + TAILQ_NEXT((elm), field)->field.tqe_prev = \ + (elm)->field.tqe_prev; \ + else \ + (head)->tqh_last = (elm)->field.tqe_prev; \ + *(elm)->field.tqe_prev = TAILQ_NEXT((elm), field); \ +} while (0) + + +#ifdef _KERNEL + +/* + * XXX insque() and remque() are an old way of handling certain queues. + * They bogusly assumes that all queue heads look alike. + */ + +struct quehead { + struct quehead *qh_link; + struct quehead *qh_rlink; +}; + +#ifdef __GNUC__ + +static __inline void +insque(void *a, void *b) +{ + struct quehead *element = (struct quehead *)a, + *head = (struct quehead *)b; + + element->qh_link = head->qh_link; + element->qh_rlink = head; + head->qh_link = element; + element->qh_link->qh_rlink = element; +} + +static __inline void +remque(void *a) +{ + struct quehead *element = (struct quehead *)a; + + element->qh_link->qh_rlink = element->qh_rlink; + element->qh_rlink->qh_link = element->qh_link; + element->qh_rlink = 0; +} + +#else /* !__GNUC__ */ + +void insque(void *a, void *b); +void remque(void *a); + +#endif /* __GNUC__ */ + +#endif /* _KERNEL */ + +#endif /* !_SYS_QUEUE_H_ */ diff --git a/examples/tcpserver/OS_Includes.h b/examples/tcpserver/OS_Includes.h new file mode 100644 index 0000000..031ddc4 --- /dev/null +++ b/examples/tcpserver/OS_Includes.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __OS_INCLUDES__H +#define __OS_INCLUDES__H + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "OS_Dependent.h" + + +#ifndef NULL + #define NULL ((void*)0) +#endif + +#ifndef UNREFERENCED_PARAMETER + #define UNREFERENCED_PARAMETER(a) (a=a) +#endif + +#define SOCKET int +#define INVALID_SOCKET -1 +#define SOCKET_ERROR -1 + +#define TYPE_FD_SET fd_set +#define BOOL bool +#define TRUE true + +#define OS_MEMCPY memcpy +#define OS_STRNCPY strncpy + +#define OS_Free(x) OS_Memfree(x) +#define OS_Malloc(x) OS_Memalloc(x) + +/* these function are part of the libcifx library */ +void* OS_Memalloc(uint32_t ulSize); +void OS_Memfree(void* pvMem); +void OS_Sleep (uint32_t ulSleepTimeMs); +/* impl. in OS_Specific.c */ +uint32_t OS_GetTickCount(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* __OS_INCLUDES__H */ diff --git a/examples/tcpserver/cifx_download_hook.c b/examples/tcpserver/cifx_download_hook.c new file mode 100644 index 0000000..8c91f67 --- /dev/null +++ b/examples/tcpserver/cifx_download_hook.c @@ -0,0 +1,845 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Extension module for file download and storage support + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include +#include "HilFileHeaderV3.h" +#include "cifXUser.h" +#include "cifXErrors.h" +#include "rcX_Public.h" +#include "cifx_download_hook.h" + +/*****************************************************************************/ +/*! Structure holding resources for download transaction */ +/*****************************************************************************/ +typedef struct TXN_RSRC_Ttag +{ + void* hDevice; /*!< Device linked to this transaction resource */ + BOARD_INFORMATION tBoardInfo; /*!< Structure holding board information */ + uint32_t ulState; /*!< Current transaction state */ + uint32_t ulChannel; /*!< Channel download destination */ + uint32_t ulMaxBlockSize; /*!< Maximum block size for packet transfer */ + int32_t lError; /*!< Transaction error */ + uint8_t bTxnMode; /*!< Capture or monitor mode */ + + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< File name. */ + uint32_t ulDownloadMode; /*!< Download mode (firmware, config, module or file download) */ + uint32_t ulFilesize; /*!< File size. */ + uint8_t* pbFileBuf; /*!< Buffer to store file data */ + uint8_t* pabActData; /*!< Pointer storing current buffer location */ + + CIFX_PACKET* ptConfPkt; /*!< Confirmation packet for capture mode */ + + struct TXN_RSRC_Ttag* pNext; /*!< Next transaction resource */ + +} TXN_RSRC_T, *PTXN_RSRC_T; + +/*****************************************************************************/ +/*! Structure holding channel specific packet handling functions */ +/*****************************************************************************/ +typedef struct DRVFNC_Ttag +{ + PFN_xChannelGetMBXState pfnGetMBXState; + PFN_xChannelPutPacket pfnPutPacket; + PFN_xChannelGetPacket pfnGetPacket; + +} DRVFNC_T, *PDRVFNC_T; + +/*!< Driver function for board enumeration */ +static PFN_xDriverEnumBoards s_pfnDriverEnumBoards = NULL; + +/*!< Sysdevice and channel specific function tables */ +static DRVFNC_T s_tDRVFncSysdevice = {0}; +static DRVFNC_T s_tDRVFncChannel = {0}; + +/*!< List pointer for download transaction */ +static PTXN_RSRC_T s_ptTxnList = NULL; + +/*!< Files storage callback function */ +static PFN_FILESTORAGE_CBK s_pfnFileStorageCbk = NULL; +static void* s_pvUser = NULL; + +/* Download transaction modes */ +#define TXN_MODE_PACKET_MONITOR 0x00 +#define TXN_MODE_PACKET_CAPTURE 0x01 + +/* Download transaction states */ +#define TXN_STATE_DOWNLOAD_REQUEST 0x00 +#define TXN_STATE_DATA_TRANSFER 0x01 +#define TXN_STATE_FINISHED 0x02 +#define TXN_STATE_ERROR 0x03 + + +/*****************************************************************************/ +/*! Transfer packet function from the DLL +* \param hDevice Handle to the device +* \param ptDrvFnc Driver function table +* \param ptSendPkt Send packet pointer +* \param ptRecvPkt Receive packet pointer +* \param ulRecvBufferSize Size of the receive packet buffer +* \param ulTimeout Wait timeout +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t TransferPacket(CIFXHANDLE hDevice, PDRVFNC_T ptDrvFnc, + CIFX_PACKET* ptSendPkt, CIFX_PACKET* ptRecvPkt, + uint32_t ulRecvBufferSize, uint32_t ulTimeout) +{ + long lCount = 0; + int32_t lRet = CIFX_NO_ERROR; + + if( (lRet = ptDrvFnc->pfnPutPacket(hDevice, ptSendPkt, ulTimeout)) == CIFX_NO_ERROR) + { + do + { + if( (lRet = ptDrvFnc->pfnGetPacket(hDevice, ulRecvBufferSize, ptRecvPkt, ulTimeout)) == CIFX_NO_ERROR) + { + /* Check if we got the answer */ + if((ptRecvPkt->tHeader.ulCmd & ~RCX_MSK_PACKET_ANSWER) == ptSendPkt->tHeader.ulCmd ) + { + /* Check rest of packet data */ + if ( (ptRecvPkt->tHeader.ulSrc == ptSendPkt->tHeader.ulSrc) && + (ptRecvPkt->tHeader.ulId == ptSendPkt->tHeader.ulId) && + (ptRecvPkt->tHeader.ulSrcId == ptSendPkt->tHeader.ulSrcId) ) + { + /* We got the answer message */ + break; + } + } + /* Reset error, in case we might drop out of the loop, with no proper answer, + returning a "good" state */ + lRet = CIFX_DEV_GET_TIMEOUT; + lCount++; + + }else + { + /* Error during packet receive */ + break; + } + } while ( lCount < 10); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Get the download mode by the file name +* \param usFileNameLength Length of file name +* \param pszFileName Input file name +* \return Download mode (firmware, config, module or file download) */ +/*****************************************************************************/ +static uint32_t GetDownloadModeFromFileName( uint32_t usFileNameLength, char* pszFileName) +{ + uint32_t ulRet = DOWNLOAD_MODE_FILE; + + /* File name should be at least x.abc */ + if( usFileNameLength >= CIFX_MIN_FILE_NAME_LENGTH) + { + /* It's a firmware if the extension matches NXF */ + if (0 == OS_Strnicmp( HIL_FILE_EXTENSION_FIRMWARE, &pszFileName[usFileNameLength - 4], 4)) + { + ulRet = DOWNLOAD_MODE_FIRMWARE; + + /* It's a module if the extension matches NXO */ + } else if (0 == OS_Strnicmp( HIL_FILE_EXTENSION_MODULE, &pszFileName[usFileNameLength - 4], 4)) + { + ulRet = DOWNLOAD_MODE_MODULE; + + /* It's a configuration if the extension matches NXD */ + } else if (0 == OS_Strnicmp( HIL_FILE_EXTENSION_DATABASE, &pszFileName[usFileNameLength - 4], 4)) + { + ulRet = DOWNLOAD_MODE_CONFIG; + + } else if (0 == OS_Strnicmp( ".XML", &pszFileName[usFileNameLength - 4], 4)) + { + ulRet = DOWNLOAD_MODE_CONFIG; + + } + } + + return ulRet; +} + +/*****************************************************************************/ +/*! Get the transaction mode (capture or monitor) by device type (ram or flash based) +* \param hDevice Device handle +* \param pbTxnMode Buffer to return mode +* \param ptDrvFnc Driver function table +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t GetTxnMode(CIFXHANDLE hDevice, uint8_t* pbTxnMode, PDRVFNC_T ptDrvFnc) +{ + int32_t lRet = CIFX_NO_ERROR; + RCX_READ_SYS_STATUS_BLOCK_REQ_T tSystemStatusReq = {{0}}; + RCX_READ_SYS_STATUS_BLOCK_CNF_T tSystemStatusCnf = {{0}}; + + tSystemStatusReq.tHead.ulSrc = 0; + tSystemStatusReq.tHead.ulDest = RCX_PACKET_DEST_SYSTEM; + tSystemStatusReq.tHead.ulCmd = RCX_SYSTEM_STATUS_BLOCK_REQ; + + if (CIFX_NO_ERROR == (lRet = TransferPacket(hDevice, ptDrvFnc, (CIFX_PACKET*)&tSystemStatusReq, + (CIFX_PACKET*)&tSystemStatusCnf, sizeof(tSystemStatusCnf), CIFX_TO_SEND_PACKET))) + { + if(CIFX_NO_ERROR == (lRet = tSystemStatusCnf.tHead.ulSta)) + { + if (0 != (tSystemStatusCnf.tData.tSystemState.ulSystemStatus&RCX_SYS_STATUS_SYSVOLUME_FFS)) + *pbTxnMode = TXN_MODE_PACKET_MONITOR; + else + *pbTxnMode = TXN_MODE_PACKET_CAPTURE; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Get device information (board information struct) +* \param hDevice Device handle +* \param ptBoardInfo Buffer to device information +* \param ptDrvFnc Driver function table +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t GetDeviceInfo(CIFXHANDLE hDevice, BOARD_INFORMATION* ptBoardInfo, PDRVFNC_T ptDrvFnc) +{ + RCX_READ_SYS_INFO_BLOCK_REQ_T tSysInfoReq = {{0}}; + RCX_READ_SYS_INFO_BLOCK_CNF_T tSysInfoCnf = {{0}}; + int32_t lRet = CIFX_NO_ERROR; + + tSysInfoReq.tHead.ulSrc = 0; + tSysInfoReq.tHead.ulDest = RCX_PACKET_DEST_SYSTEM; + tSysInfoReq.tHead.ulCmd = RCX_SYSTEM_INFORMATION_BLOCK_REQ; + + /* Request serial and device number of our device */ + if (CIFX_NO_ERROR == (lRet = TransferPacket(hDevice, ptDrvFnc, (CIFX_PACKET*)&tSysInfoReq, + (CIFX_PACKET*)&tSysInfoCnf, sizeof(tSysInfoCnf), CIFX_TO_SEND_PACKET))) + { + if(CIFX_NO_ERROR == (lRet = tSysInfoCnf.tHead.ulSta)) + { + uint32_t ulBoardNr = 0; + + /* Iterate of local devices and find the corresponding board information structure + via device and serial number */ + do + { + BOARD_INFORMATION tBoardInfo = {0}; + if (CIFX_NO_ERROR == (lRet = s_pfnDriverEnumBoards(NULL, ulBoardNr, sizeof(tBoardInfo), &tBoardInfo))) + { + if ( (tBoardInfo.tSystemInfo.ulDeviceNumber == tSysInfoCnf.tData.tSystemInfo.ulDeviceNumber) && + (tBoardInfo.tSystemInfo.ulSerialNumber == tSysInfoCnf.tData.tSystemInfo.ulSerialNumber) ) + { + /* We found our device info */ + *ptBoardInfo = tBoardInfo; + break; + } + } + /* Enum next device */ + ulBoardNr++; + + } while (CIFX_NO_ERROR == lRet); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Create Download confirmation packet for current transaction +* \param hTxnRsrc Transaction resource +* \param ptReqPkt Request packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t CreateTxnCnf(void* hTxnRsrc, CIFX_PACKET* ptReqPkt) +{ + PTXN_RSRC_T ptTxnRsrc = (PTXN_RSRC_T)hTxnRsrc; + + if ( (NULL == hTxnRsrc) || + (NULL == ptReqPkt) ) + return CIFX_INVALID_POINTER; + + switch (ptReqPkt->tHeader.ulCmd) + { + /* Create confirmation packet for a download request */ + case RCX_FILE_DOWNLOAD_REQ: + { + RCX_FILE_DOWNLOAD_REQ_T* ptDownloadReq = (RCX_FILE_DOWNLOAD_REQ_T*)ptReqPkt; + RCX_FILE_DOWNLOAD_CNF_T* ptDownloadConf = (RCX_FILE_DOWNLOAD_CNF_T*)OS_Malloc(sizeof(RCX_FILE_DOWNLOAD_CNF_T)); + + ptDownloadConf->tHead = ptDownloadReq->tHead; + ptDownloadConf->tHead.ulCmd = ptDownloadReq->tHead.ulCmd|RCX_MSK_PACKET_ANSWER; + ptDownloadConf->tHead.ulExt = 0; + ptDownloadConf->tHead.ulLen = (ptTxnRsrc->lError != 0)?0:sizeof(ptDownloadConf->tData); + ptDownloadConf->tHead.ulSta = ptTxnRsrc->lError; + ptDownloadConf->tData.ulMaxBlockSize = ptDownloadReq->tData.ulMaxBlockSize; + + /* Store confirmation packet in transaction resource */ + ptTxnRsrc->ptConfPkt = (CIFX_PACKET*)ptDownloadConf; + break; + } + + /* Create confirmation packet for a download data request */ + case RCX_FILE_DOWNLOAD_DATA_REQ: + { + RCX_FILE_DOWNLOAD_DATA_REQ_T* ptDownloadDataReq = (RCX_FILE_DOWNLOAD_DATA_REQ_T*)ptReqPkt; + RCX_FILE_DOWNLOAD_DATA_CNF_T* ptDownloadDataConf = (RCX_FILE_DOWNLOAD_DATA_CNF_T*)OS_Malloc(sizeof(RCX_FILE_DOWNLOAD_DATA_CNF_T)); + + ptDownloadDataConf->tHead = ptDownloadDataReq->tHead; + ptDownloadDataConf->tHead.ulCmd = ptDownloadDataReq->tHead.ulCmd|RCX_MSK_PACKET_ANSWER; + ptDownloadDataConf->tHead.ulExt = 0; + ptDownloadDataConf->tHead.ulLen = (ptTxnRsrc->lError != 0)?0:sizeof(ptDownloadDataConf->tData); + ptDownloadDataConf->tHead.ulSta = ptTxnRsrc->lError; + ptDownloadDataConf->tData.ulExpectedCrc32 = ptDownloadDataReq->tData.ulChksum; + + /* Store confirmation packet in transaction resource */ + ptTxnRsrc->ptConfPkt = (CIFX_PACKET*)ptDownloadDataConf; + break; + } + + /* Create confirmation packet for a download abort request */ + case RCX_FILE_DOWNLOAD_ABORT_REQ: + { + RCX_FILE_DOWNLOAD_ABORT_REQ_T* ptDownloadAbortReq = (RCX_FILE_DOWNLOAD_ABORT_REQ_T*)ptReqPkt; + RCX_FILE_DOWNLOAD_ABORT_CNF_T* ptDownloadAbortConf = (RCX_FILE_DOWNLOAD_ABORT_CNF_T*)OS_Malloc(sizeof(RCX_FILE_DOWNLOAD_ABORT_CNF_T)); + + ptDownloadAbortConf->tHead = ptDownloadAbortReq->tHead; + ptDownloadAbortConf->tHead.ulCmd = ptDownloadAbortReq->tHead.ulCmd|RCX_MSK_PACKET_ANSWER; + ptDownloadAbortConf->tHead.ulExt = 0; + ptDownloadAbortConf->tHead.ulLen = 0; + ptDownloadAbortConf->tHead.ulSta = ptTxnRsrc->lError; + + /* Store confirmation packet in transaction resource */ + ptTxnRsrc->ptConfPkt = (CIFX_PACKET*)ptDownloadAbortConf; + break; + } + } + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Remove Transaction resource +* \param hDevice Device handle */ +/*****************************************************************************/ +static void RemoveTxnRsrc(CIFXHANDLE hDevice) +{ + PTXN_RSRC_T ptTxnRsrcCur = s_ptTxnList; + PTXN_RSRC_T ptTxnRsrcOld = NULL; + + /* Iterate the transaction resource list */ + while (ptTxnRsrcCur) + { + + if (ptTxnRsrcCur->hDevice == hDevice) + { + /* We found the transaction resource which + belongs to our device */ + break; + } + + ptTxnRsrcOld = ptTxnRsrcCur; + ptTxnRsrcCur = ptTxnRsrcCur->pNext; + } + + if (NULL != ptTxnRsrcCur) + { + if (NULL == ptTxnRsrcOld) + s_ptTxnList = ptTxnRsrcCur->pNext; + else + ptTxnRsrcOld->pNext = ptTxnRsrcCur->pNext; + + if (ptTxnRsrcCur->pbFileBuf) + OS_Free(ptTxnRsrcCur->pbFileBuf); + + if (ptTxnRsrcCur->ptConfPkt) + OS_Free(ptTxnRsrcCur->ptConfPkt); + + OS_Free(ptTxnRsrcCur); + } +} + +/*****************************************************************************/ +/*! Create transaction resource +* \param hDevice Device handle +* \param ptBoardInfo Board information +* \param bTxnMode Download transaction mode (monitor or capture) +* \param pszFileName File name +* \param ulFileLength File size +* \param ulDownloadMode Download mode (firmware, config, module or file download) +* \param ulChannel Download destination channel +* \param ulMaxBlockSize Maximal block size per packet +* \return Pointer to download transaction resource, NULL if failed */ +/*****************************************************************************/ +static void* CreateTxnRsrc(CIFXHANDLE hDevice, BOARD_INFORMATION* ptBoardInfo, + uint8_t bTxnMode, char* pszFileName, uint32_t ulFileLength, + uint32_t ulDownloadMode, uint32_t ulChannel, uint32_t ulMaxBlockSize) +{ + PTXN_RSRC_T ptTxnRsrc = NULL; + + if (NULL == (ptTxnRsrc = (PTXN_RSRC_T)OS_Malloc(sizeof(TXN_RSRC_T)))) + { + ptTxnRsrc = NULL; + + } else if (NULL == (ptTxnRsrc->pbFileBuf = (uint8_t*)OS_Malloc(ulFileLength))) + { + OS_Free(ptTxnRsrc); + ptTxnRsrc = NULL; + + } else + { + ptTxnRsrc->ulState = TXN_STATE_DOWNLOAD_REQUEST; /* Initial transaction state */ + ptTxnRsrc->pabActData = ptTxnRsrc->pbFileBuf; + ptTxnRsrc->ulFilesize = ulFileLength; + ptTxnRsrc->ulDownloadMode = ulDownloadMode; + ptTxnRsrc->ulMaxBlockSize = ulMaxBlockSize; /* Maximum block size the host can handle. This could be + replaced by smaller value from the devices capability. */ + ptTxnRsrc->lError = 0; + ptTxnRsrc->bTxnMode = bTxnMode; + ptTxnRsrc->ulChannel = ulChannel; + ptTxnRsrc->hDevice = hDevice; + ptTxnRsrc->ptConfPkt = NULL; + ptTxnRsrc->tBoardInfo = *ptBoardInfo; + + OS_STRNCPY(ptTxnRsrc->szFilename, pszFileName, sizeof(ptTxnRsrc->szFilename)/sizeof(ptTxnRsrc->szFilename[0])); + + /* Join the transaction resource list */ + ptTxnRsrc->pNext = s_ptTxnList; + s_ptTxnList = ptTxnRsrc; + } + return (void*)ptTxnRsrc; +} + +/*****************************************************************************/ +/*! Get transaction resource by device handle +* \param hDevice Device handle +* \return Pointer to transaction resource */ +/*****************************************************************************/ +static void* GetTxnRsrc(CIFXHANDLE hDevice) +{ + PTXN_RSRC_T ptTxnRsrc = s_ptTxnList; + + /* Iterate the transaction resource list */ + while (ptTxnRsrc) + { + if (ptTxnRsrc->hDevice == hDevice) + { + /* We found the transaction resource which + belongs to our device */ + break; + } + + ptTxnRsrc = ptTxnRsrc->pNext; + } + + return ptTxnRsrc; +} + +/*****************************************************************************/ +/*! Get mailbox state function with file download extension +* \param hDevice Device handle +* \param pulRecvPktCount Number of Messages waiting in receive mailbox +* \param pulSendPktCount State of the Send Mailbox +* \param ptDrvFnc Driver function table +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t xDownloadHook_GetMBXState(CIFXHANDLE hDevice, uint32_t* pulRecvPktCount, + uint32_t* pulSendPktCount, PDRVFNC_T ptDrvFnc) +{ + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = ptDrvFnc->pfnGetMBXState(hDevice, pulRecvPktCount, pulSendPktCount))) + { + PTXN_RSRC_T ptTxnRsrc = NULL; + + /* Check if the device has a active download transaction */ + if (NULL != (ptTxnRsrc = GetTxnRsrc(hDevice))) + { + /* We have a active download transaction. If we are dealing with + the capture mode, there might be a confirmation packet. We add + this packet to our receive packet counter. */ + if ( (ptTxnRsrc->bTxnMode == TXN_MODE_PACKET_CAPTURE) && + (ptTxnRsrc->ptConfPkt) ) + { + (void)*pulRecvPktCount++; + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Get packet function with file download extension +* \param hDevice Device handle +* \param ulRecvBufferSize Size of receive buffer +* \param ptRecvPkt Buffer to store received packet +* \param ulTimeout Timeout value +* \param ptDrvFnc Driver function table +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t xDownloadHook_GetPacket(CIFXHANDLE hDevice, uint32_t ulRecvBufferSize, + CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout, + PDRVFNC_T ptDrvFnc) +{ + int32_t lRet = CIFX_NO_ERROR; + PTXN_RSRC_T ptTxnRsrc = NULL; + + /* Check if the device has a active download transaction */ + if (NULL == (ptTxnRsrc = GetTxnRsrc(hDevice))) + { + /* No active download transaction. Receive packet from device */ + lRet = ptDrvFnc->pfnGetPacket(hDevice, ulRecvBufferSize, ptRecvPkt, ulTimeout); + + } else + { + /* We have a active download transaction. If we are dealing with + the capture mode, there might be a confirmation packet, which + has to be transmitted to the host */ + if ( (ptTxnRsrc->bTxnMode == TXN_MODE_PACKET_CAPTURE) && + (ptTxnRsrc->ptConfPkt) ) + { + uint32_t ulCopySize = ptTxnRsrc->ptConfPkt->tHeader.ulLen + RCX_PACKET_HEADER_SIZE; + if(ulCopySize > ulRecvBufferSize) + { + /* We have to free the mailbox, read as much as possible */ + ulCopySize = ulRecvBufferSize; + lRet = CIFX_BUFFER_TOO_SHORT; + } + + OS_MEMCPY(ptRecvPkt, ptTxnRsrc->ptConfPkt, ulCopySize); + + /* The packet is copied to the receive buffer. So free the packet from + the transaction resource */ + OS_Free(ptTxnRsrc->ptConfPkt); + ptTxnRsrc->ptConfPkt = NULL; + } else + { + /* We have a active download transaction, but no confirmation packet waiting. + Call get packet routine to receive packet from device */ + lRet = ptDrvFnc->pfnGetPacket(hDevice, ulRecvBufferSize, ptRecvPkt, ulTimeout); + } + + switch (ptTxnRsrc->ulState) + { + case TXN_STATE_DOWNLOAD_REQUEST: + if ( (RCX_FILE_DOWNLOAD_CNF == ptRecvPkt->tHeader.ulCmd) && + (CIFX_NO_ERROR == ptRecvPkt->tHeader.ulState) ) + { + RCX_FILE_DOWNLOAD_CNF_T* ptDownloadConf = (RCX_FILE_DOWNLOAD_CNF_T*)ptRecvPkt; + /* Get download packet size from the device confirmation. + If the devices packet size is smaller than our size, use the length from the device. + Otherwise use our length. */ + if (ptDownloadConf->tData.ulMaxBlockSize < ptTxnRsrc->ulMaxBlockSize) + ptTxnRsrc->ulMaxBlockSize = ptDownloadConf->tData.ulMaxBlockSize; + + /* We are now expecting file data packets, so set new state */ + ptTxnRsrc->ulState = TXN_STATE_DATA_TRANSFER; + } + break; + + case TXN_STATE_DATA_TRANSFER: + break; + + case TXN_STATE_FINISHED: + /* We captured the whole file now. Execute callback to handle the file storage */ + lRet = s_pfnFileStorageCbk(&ptTxnRsrc->tBoardInfo, ptTxnRsrc->szFilename, ptTxnRsrc->ulFilesize, + ptTxnRsrc->pbFileBuf, ptTxnRsrc->ulChannel, ptTxnRsrc->ulDownloadMode, s_pvUser); + /* No break here. Download transaction ressource can be removed now */ + + case TXN_STATE_ERROR: + /* Remove the transaction resource if the download has finished or failed */ + RemoveTxnRsrc(hDevice); + break; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Put packet function with file download extension +* \param hDevice Device handle +* \param ptSendPkt Packet to send +* \param ulTimeout Timeout value +* \param ptDrvFnc Driver function table +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t xDownloadHook_PutPacket(CIFXHANDLE hDevice, CIFX_PACKET* ptSendPkt, + uint32_t ulTimeout, PDRVFNC_T ptDrvFnc) +{ + PTXN_RSRC_T ptTxnRsrc = NULL; + uint32_t ulState = TXN_STATE_DOWNLOAD_REQUEST; + int32_t lRet = CIFX_NO_ERROR; + + /* Check if we are dealing with a download packet. If not, just route + the packet to the device */ + if ( (RCX_FILE_DOWNLOAD_REQ != ptSendPkt->tHeader.ulCmd) && + (RCX_FILE_DOWNLOAD_DATA_REQ != ptSendPkt->tHeader.ulCmd) && + (RCX_FILE_DOWNLOAD_ABORT_REQ != ptSendPkt->tHeader.ulCmd) ) + { + return ptDrvFnc->pfnPutPacket(hDevice, ptSendPkt, ulTimeout); + } + + /* Check if there is a active download transaction and resume with + the current transaction state */ + if (NULL != (ptTxnRsrc = GetTxnRsrc(hDevice))) + { + ulState = ptTxnRsrc->ulState; + } + + switch (ulState) + { + case TXN_STATE_FINISHED: + case TXN_STATE_ERROR: + /* A previous download transaction was not completed. + We are now removing old transaction ressource as we + dont need it anymore */ + RemoveTxnRsrc(hDevice); + /* No break here as we are now handle the new download request */ + + case TXN_STATE_DOWNLOAD_REQUEST: + if (RCX_FILE_DOWNLOAD_REQ == ptSendPkt->tHeader.ulCmd) + { + RCX_FILE_DOWNLOAD_REQ_T* ptDownloadReq = (RCX_FILE_DOWNLOAD_REQ_T*)ptSendPkt; + char* pszFileName = (char*)(&ptDownloadReq->tData + 1); + uint32_t ulDownloadMode = DOWNLOAD_MODE_FILE; + + /* Get Download mode from file name */ + ulDownloadMode = GetDownloadModeFromFileName( ptDownloadReq->tData.usFileNameLength-1, + pszFileName); + + /* We are only capturing the file if we are dealing with a firmware, module or configuration */ + if ( (ulDownloadMode == DOWNLOAD_MODE_FIRMWARE) || + (ulDownloadMode == DOWNLOAD_MODE_CONFIG) || + (ulDownloadMode == DOWNLOAD_MODE_MODULE) ) + { + uint8_t bTxnMode = TXN_MODE_PACKET_CAPTURE; + BOARD_INFORMATION tBoardInfo = {0}; + + /* Set mode on the basis of device type: + ram based device = capture mode + flash based device = monitore mode */ + if (CIFX_NO_ERROR != GetTxnMode(hDevice, &bTxnMode, ptDrvFnc)) + { + /* Determine device type failed. */ + + } else if (CIFX_NO_ERROR != GetDeviceInfo(hDevice, &tBoardInfo, ptDrvFnc)) + { + /* Failed to get device information */ + + } else if (NULL == (ptTxnRsrc = CreateTxnRsrc( hDevice, &tBoardInfo, bTxnMode, + pszFileName, ptDownloadReq->tData.ulFileLength, + ulDownloadMode, ptDownloadReq->tData.ulChannelNo, + ptDownloadReq->tData.ulMaxBlockSize))) + { + /* Failed to create download transaction resource */ + + } else + { + /* We are now expecting file data packets. The transaction state will be change + to TXN_STATE_DATA_TRANSFER if download confirmation packet was received sucessfully */ + } + } + } + break; + + case TXN_STATE_DATA_TRANSFER: + if (RCX_FILE_DOWNLOAD_DATA_REQ == ptSendPkt->tHeader.ulCmd) + { + RCX_FILE_DOWNLOAD_DATA_REQ_T* ptDownloadDataReq = (RCX_FILE_DOWNLOAD_DATA_REQ_T*)ptSendPkt; + + if( (RCX_PACKET_SEQ_FIRST == ptDownloadDataReq->tHead.ulExt) || + (RCX_PACKET_SEQ_MIDDLE == ptDownloadDataReq->tHead.ulExt) ) + { + /* This is a first or middle data packet of a transaction sequence. + So the maximum block size will be copied to the file buffer */ + OS_MEMCPY( ptTxnRsrc->pabActData, &ptDownloadDataReq->tData + 1, ptTxnRsrc->ulMaxBlockSize); + ptTxnRsrc->pabActData += ptTxnRsrc->ulMaxBlockSize; + + } else if( (RCX_PACKET_SEQ_LAST == ptDownloadDataReq->tHead.ulExt) || + (RCX_PACKET_SEQ_NONE == ptDownloadDataReq->tHead.ulExt) ) + { + /* This is the last data packet of a transaction sequence or a + non sequenced packet. We have to calculate the data block size + as it might be smaller than the maximum block size */ + uint32_t ulBlockSize = ptDownloadDataReq->tHead.ulLen - sizeof(RCX_FILE_DOWNLOAD_DATA_REQ_DATA_T); + OS_MEMCPY( ptTxnRsrc->pabActData, &ptDownloadDataReq->tData + 1, ulBlockSize); + + /* Download finished, so set state respectively */ + ptTxnRsrc->ulState = TXN_STATE_FINISHED; + } + + } else if (RCX_FILE_DOWNLOAD_ABORT_REQ == ptSendPkt->tHeader.ulCmd) + { + ptTxnRsrc->ulState = TXN_STATE_ERROR; + } else + { + ptTxnRsrc->lError = RCX_E_PACKET_OUT_OF_SEQ; + ptTxnRsrc->ulState = TXN_STATE_ERROR; + } + break; + } + + if ( (NULL != ptTxnRsrc) && + (TXN_MODE_PACKET_CAPTURE == ptTxnRsrc->bTxnMode ) && + (DOWNLOAD_MODE_FIRMWARE == ptTxnRsrc->ulDownloadMode ) ) + { + /* On ram based devices (packet capture mode) firmware downloads + are not possible. Hence we need to capture the download request + and create the confirmation packets by ourselves. In this case + the request packets must not be routed to the device */ + lRet = CreateTxnCnf(ptTxnRsrc, ptSendPkt); + + } else + { + /* Every download request on flash based devices (packet monitor mode) + can be handled by the device. So the download packets are just monitored + and afterwards routed to the device */ + lRet = ptDrvFnc->pfnPutPacket(hDevice, ptSendPkt, ulTimeout); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Gets the Mailbox state of an open system device +* \param hSysdevice Handle to the System device +* \param pulRecvPktCount Number of packets in receive mailbox +* \param pulSendPktCount Number of packets the application is able to send at once +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xSysdeviceGetMBXStateWrapper(CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount) +{ + return xDownloadHook_GetMBXState(hSysdevice, pulRecvPktCount, pulSendPktCount, &s_tDRVFncSysdevice); +} + +/*****************************************************************************/ +/*! Wrapper for xSysdevicePutPacket to handle download requests +* \param hSysdevice Handle to the System device +* \param ptSendPkt Packet to send to device +* \param ulTimeout maximum time to wait for packet to be accepted by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xSysdevicePutPacketWrapper(CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout) +{ + return xDownloadHook_PutPacket(hSysdevice, ptSendPkt, ulTimeout, &s_tDRVFncSysdevice); +} + +/*****************************************************************************/ +/*! Wrapper for xSysdeviceGetPacket to handle download requests +* \param hSysdevice Handle to the System device +* \param ulSize Size of the buffer to retrieve the packet +* \param ptRecvPkt Pointer to buffer for received packet +* \param ulTimeout maximum time to wait for packet to be delivered by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xSysdeviceGetPacketWrapper(CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout) +{ + return xDownloadHook_GetPacket(hSysdevice, ulSize, ptRecvPkt, ulTimeout, &s_tDRVFncSysdevice); +} + +/*****************************************************************************/ +/*! Returns the Mailbox state from a specific channel +* \param hChannel Channel handle acquired by xChannelOpen +* \param pulRecvPktCount Number of Messages waiting in receive mailbox +* \param pulSendMbxState State of the Send Mailbox +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xChannelGetMBXStateWrapper(CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendMbxState) +{ + return xDownloadHook_GetMBXState(hChannel, pulRecvPktCount,pulSendMbxState, &s_tDRVFncChannel); +} + +/*****************************************************************************/ +/*! Wrapper for xChannelPutPacket to handle download requests +* \param hChannel Handle to the System device +* \param ptSendPkt Packet to send to device +* \param ulTimeout maximum time to wait for packet to be accepted by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xChannelPutPacketWrapper( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout) +{ + return xDownloadHook_PutPacket(hChannel, ptSendPkt, ulTimeout, &s_tDRVFncChannel); +} + +/*****************************************************************************/ +/*! Wrapper for xChannelGetPacket to handle download requests +* \param hChannel Handle to the System device +* \param ulSize Size of the buffer to retrieve the packet +* \param ptRecvPkt Pointer to buffer for received packet +* \param ulTimeout maximum time to wait for packet to be delivered by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t APIENTRY xChannelGetPacketWrapper( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout) +{ + return xDownloadHook_GetPacket(hChannel, ulSize, ptRecvPkt, ulTimeout, &s_tDRVFncChannel); +} + +/*****************************************************************************/ +/*! Initialize download hook +* \param ptDRVFunctions Driver function table +* \param pfnFileStorageCbk File storage callback +* \param pvUser User pointer for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t xDownloadHook_Install( PDRIVER_FUNCTIONS ptDRVFunctions, PFN_FILESTORAGE_CBK pfnFileStorageCbk, void* pvUser) +{ + /* There must be an file storage callback */ + if (NULL == pfnFileStorageCbk) + return CIFX_INVALID_POINTER; + + /* To hook the file download we need at least the following driver functions */ + if ( (NULL == ptDRVFunctions->pfnxSysdevicePutPacket) || + (NULL == ptDRVFunctions->pfnxSysdeviceGetPacket) || + (NULL == ptDRVFunctions->pfnxSysdeviceGetMBXState) || + (NULL == ptDRVFunctions->pfnxChannelPutPacket) || + (NULL == ptDRVFunctions->pfnxChannelGetPacket) || + (NULL == ptDRVFunctions->pfnxChannelGetMBXState) || + (NULL == ptDRVFunctions->pfnxDriverEnumBoards) ) + return CIFX_INVALID_POINTER; + + /* Assign sysdevice functions */ + s_tDRVFncSysdevice.pfnPutPacket = ptDRVFunctions->pfnxSysdevicePutPacket; + s_tDRVFncSysdevice.pfnGetPacket = ptDRVFunctions->pfnxSysdeviceGetPacket; + s_tDRVFncSysdevice.pfnGetMBXState = ptDRVFunctions->pfnxSysdeviceGetMBXState; + + /* Assign channel functions */ + s_tDRVFncChannel.pfnPutPacket = ptDRVFunctions->pfnxChannelPutPacket; + s_tDRVFncChannel.pfnGetPacket = ptDRVFunctions->pfnxChannelGetPacket; + s_tDRVFncChannel.pfnGetMBXState = ptDRVFunctions->pfnxChannelGetMBXState; + + s_pfnDriverEnumBoards = ptDRVFunctions->pfnxDriverEnumBoards; + + /* Install wrapper functions in driver table */ + ptDRVFunctions->pfnxSysdevicePutPacket = xSysdevicePutPacketWrapper; + ptDRVFunctions->pfnxSysdeviceGetPacket = xSysdeviceGetPacketWrapper; + ptDRVFunctions->pfnxSysdeviceGetMBXState = xSysdeviceGetMBXStateWrapper; + + ptDRVFunctions->pfnxChannelPutPacket = xChannelPutPacketWrapper; + ptDRVFunctions->pfnxChannelGetPacket = xChannelGetPacketWrapper; + ptDRVFunctions->pfnxChannelGetMBXState = xChannelGetMBXStateWrapper; + + /* Set file storage callback */ + s_pfnFileStorageCbk = pfnFileStorageCbk; + s_pvUser = pvUser; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Deinit download hook +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t xDownloadHook_Remove( void) +{ + /* TODO: implement remove hook function */ + return CIFX_FUNCTION_NOT_AVAILABLE; +} diff --git a/examples/tcpserver/cifx_download_hook.h b/examples/tcpserver/cifx_download_hook.h new file mode 100644 index 0000000..7cb0611 --- /dev/null +++ b/examples/tcpserver/cifx_download_hook.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __CIFXDOWNLOAD__H +#define __CIFXDOWNLOAD__H + +/*****************************************************************************/ +/*! \addtogroup CIFXDOWNLOADHOOK +* \{ */ +/*****************************************************************************/ + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + +#include "cifXAPI_Wrapper.h" + +/*****************************************************************************/ +/*! Definition of the file storage callback +* \param ptBoardInfo Board information +* \param pszFileName Name of file to download +* \param ulFileSize Size of file buffer (pabFileData) +* \param pabFileData File buffer +* \param ulChannel Destination channel +* \param ulDownloadMode Download mode (DOWNLOAD_MODE_FIRMWARE, + DOWNLOAD_MODE_MODULE, DOWNLOAD_MODE_CONFIG) +* \param pvUser User pointer +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +typedef int32_t(*PFN_FILESTORAGE_CBK) ( BOARD_INFORMATION* ptBoardInfo, + char* pszFileName, uint32_t ulFileSize, uint8_t* pabFileData, + uint32_t ulChannel, uint32_t ulDownloadMode, void* pvUser); + +/*************************************************************************** +* Functions to install and remove download hook +***************************************************************************/ +int32_t xDownloadHook_Install ( PDRIVER_FUNCTIONS ptDRVFunctions, + PFN_FILESTORAGE_CBK pfnFileStorageCbk, void* pvUser); + +int32_t xDownloadHook_Remove ( void); + +#ifdef __cplusplus + } +#endif /* __cplusplus */ + +/*****************************************************************************/ +/* \} */ +/*****************************************************************************/ + +#endif /* __CIFXDOWNLOAD__H */ diff --git a/examples/tcpserver/os_specific.c b/examples/tcpserver/os_specific.c new file mode 100644 index 0000000..1729f96 --- /dev/null +++ b/examples/tcpserver/os_specific.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Linux OS Abstraction Layer implementation + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include "OS_Includes.h" +#include + +/* NOTE: The current marshaller implementation does not use lock create/delete functions. */ +/* The mutex we are using here will be created by TCPServer.c. */ +extern pthread_mutex_t* g_ptMutex; + +void OS_EnterLock(void* pvLock); +void OS_LeaveLock(void* pvLock); + +/*****************************************************************************/ +/*! Get Millisecond counter value (used for timeout handling) +* \return Counter value with a resolution of 1ms */ +/*****************************************************************************/ +uint32_t OS_GetTickCount(void) { + struct timespec ts_get_milli; + unsigned int msec_count; + +#ifdef VERBOSE_2 + printf("%s() called\n", __FUNCTION__); +#endif + if( clock_gettime( CLOCK_MONOTONIC, &ts_get_milli ) != 0 ) + { + perror("gettime failed"); + return 0; + } + msec_count = ts_get_milli.tv_sec * 1000; + msec_count += ts_get_milli.tv_nsec / 1000 / 1000; + + return msec_count; +} + +/*****************************************************************************/ +/*! Acquire a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +int OS_Lock(void) { +#ifdef VERBOSE_2 + printf("%s() called\n", __FUNCTION__); +#endif + OS_EnterLock( g_ptMutex); + return 0; +} + +/*****************************************************************************/ +/*! Release a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +void OS_Unlock(int iLock) { +#ifdef VERBOSE_2 + printf("%s() called\n", __FUNCTION__); +#endif + (void)iLock;/* we can ignore this parameter since the lock is one static reference */ + OS_LeaveLock( g_ptMutex); +} diff --git a/examples/tcpserver/readme.md b/examples/tcpserver/readme.md new file mode 100644 index 0000000..c67e0b2 --- /dev/null +++ b/examples/tcpserver/readme.md @@ -0,0 +1,25 @@ + +### cifX tcp-server + +A demo server application which allows remote access (e.g. with Communication Studio). + + +1. create a build folder and enter it +``` +mkdir demo_build; cd demo_build +``` +2. Prepare the build environment via cmake call and pass the path to the examples lists (CMakelists.txt within examples folder) file. +Run the preparation with your required options e.g.: +``` +cmake ../ -DDEBUG=ON +``` +3. Build the example and run the demo application. Note that you may need root rights. This depends on your system setup. For more information see [System and hardware setup]() +``` +make +./cifx_tcpserver +``` + +To list all available options run: +``` +./cifx_tcpserver -h +``` diff --git a/examples/tcpserver/tcp_connector.c b/examples/tcpserver/tcp_connector.c new file mode 100644 index 0000000..adcf977 --- /dev/null +++ b/examples/tcpserver/tcp_connector.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: TCP/IP connector for Hilscher marshaller + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include +#include +#include +#include +#include + +#include "tcp_connector.h" +#include "MarshallerErrors.h" + +extern void* g_pvMarshaller; + /* flag to display once the network traffic */ +extern int g_fTrafficOnce; + +extern unsigned short g_usPortNumber; + +/*****************************************************************************/ +/*! Function called from marshaller when data is to be sent to interface +* \param ptBuffer Buffer to send +* \param pvUser TCP connector internal data */ +/*****************************************************************************/ +static uint32_t TCPConnectorSend(HIL_MARSHALLER_BUFFER_T* ptBuffer, void* pvUser) +{ + TCP_CONN_INTERNAL_T* ptTcpData = (TCP_CONN_INTERNAL_T*)pvUser; + unsigned long ulDataLen = sizeof(ptBuffer->tTransport) + + ptBuffer->tMgmt.ulUsedDataBufferLen; + + ptTcpData->ulTxCount += ulDataLen; + + /* If EINTR is returned try sending the packets again. */ + while(-1 == send(ptTcpData->hClient, (char*)&ptBuffer->tTransport, ulDataLen, 0) && EINTR == errno); + + HilMarshallerConnTxComplete(ptBuffer->tMgmt.pvMarshaller, + ptTcpData->ulConnectorIdx, + ptBuffer); + + return MARSHALLER_NO_ERROR; +} + +/*****************************************************************************/ +/*! TCP connector uninitialization +* \param pvUser Pointer to internal connector data */ +/*****************************************************************************/ +static void TCPConnectorDeinit(void* pvUser) +{ + TCP_CONN_INTERNAL_T* ptTcpData = (TCP_CONN_INTERNAL_T*)pvUser; + + /* Check if data is valid */ + if(NULL != ptTcpData) + { + pthread_t hClientThread = ptTcpData->hClientThread; + ptTcpData->fRunning = 0; + + if(0 != hClientThread) + { + pthread_join(ptTcpData->hClientThread,NULL); + } + + if(INVALID_SOCKET != ptTcpData->hClient) + close(ptTcpData->hClient); + + if(0 != ptTcpData->hServerThread) + { + pthread_join(ptTcpData->hServerThread,NULL); + } + + if(INVALID_SOCKET != ptTcpData->hListen) + close(ptTcpData->hListen); + + /* Unregister from Marshaller */ + if(ptTcpData->ulConnectorIdx != (unsigned long int)~0) + { + HilMarshallerUnregisterConnector(ptTcpData->pvMarshaller, ptTcpData->ulConnectorIdx); + } + + free(ptTcpData); + } + +} + +/*****************************************************************************/ +/*! Thread handling connection with client +* \param pvParam Pointer reference to TCP connection structure +* \return Always 0 */ +/*****************************************************************************/ +void* ClientThread(void* pvParam) +{ + TCP_CONN_INTERNAL_T* ptTcpData = (TCP_CONN_INTERNAL_T*)pvParam; + + /* add here code to create timer event to display network traffic + callback function -> TrafficTimer */ + + while(ptTcpData->fRunning) + { + TYPE_FD_SET tRead, tExcept; + struct timeval tTimeout = {0}; + int iErr = 0; + + tTimeout.tv_sec = 5; + + FD_ZERO(&tRead); + FD_ZERO(&tExcept); + + FD_SET(ptTcpData->hClient, &tRead); + FD_SET(ptTcpData->hClient, &tExcept); + + iErr = select(ptTcpData->hClient + 1, &tRead, NULL, &tExcept, &tTimeout); + if(0 < iErr) + { + if(FD_ISSET(ptTcpData->hClient, &tRead)) + { + /* We have data to read */ + unsigned long ulDataLen; + unsigned char* pbData; + int iRecv; + + ioctl(ptTcpData->hClient,FIONREAD,&ulDataLen); + + pbData = (unsigned char*)malloc(ulDataLen); + + /* If EINTR is returned try receiving the packets again. */ + while(-1 == (iRecv = recv(ptTcpData->hClient, (char*)pbData, ulDataLen, 0)) && EINTR == errno); + + if( (SOCKET_ERROR == iRecv) || + (0 == iRecv) ) + { + /* Gracefully closed socket */ + close(ptTcpData->hClient); + ptTcpData->hClient = INVALID_SOCKET; + free(pbData); + break; + + } else + { + unsigned long ulDataLen = (unsigned long)iRecv; + + ptTcpData->ulRxCount += ulDataLen; + + HilMarshallerConnRxData(ptTcpData->pvMarshaller, + ptTcpData->ulConnectorIdx, + pbData, + ulDataLen); + } + + /* Exmaple: show traffic (but only call it once) */ + /* its better to call it in a cyclic timer function, like noted above*/ + //if (!g_fTrafficOnce) TrafficTimer((void*)ptTcpData); + + free(pbData); + } + + if(FD_ISSET(ptTcpData->hClient, &tExcept)) + { + /* Socket has been closed */ + close(ptTcpData->hClient); + ptTcpData->hClient = INVALID_SOCKET; + break; + } + } else if (iErr == 0) + { + /* Timeout -> close socket */ + close(ptTcpData->hClient); + ptTcpData->hClient = INVALID_SOCKET; + break; + } + } + + ptTcpData->hClientThread = 0; + + /* add code here to Kill network traffic timer event */ + printf("Connection closed!\n"); + + return 0; +} + +/*****************************************************************************/ +/*! Thread serving incoming TCP connections +* \param pvParam Pointer reference to TCP connection structure +* \return Always 0 */ +/*****************************************************************************/ +void* ServerThread(void* pvParam) +{ + TCP_CONN_INTERNAL_T* ptTcpData = (TCP_CONN_INTERNAL_T*)pvParam; + + while(ptTcpData->fRunning) + { + TYPE_FD_SET tRead; + struct timeval tTimeout = {0}; + + tTimeout.tv_sec = 1; + + FD_ZERO(&tRead); + FD_SET(ptTcpData->hListen, &tRead); + + + if(0 < select(ptTcpData->hListen + 1, &tRead, NULL, NULL, &tTimeout)) + { + if(FD_ISSET(ptTcpData->hListen, &tRead)) + { + /* We have a client to accept */ + struct sockaddr_in tSockAddr = {0}; + socklen_t iSockAddrLen = sizeof(tSockAddr); + SOCKET hClient = accept(ptTcpData->hListen, + (struct sockaddr*)&tSockAddr, + &iSockAddrLen); + + if(ptTcpData->hClient != INVALID_SOCKET) + { + /* We already have a client, so reject this one */ + close(hClient); + } else + { + char szHostname[NI_MAXHOST]; + int iNoDelay = 1; + + ptTcpData->ulRxCount = 0; + ptTcpData->ulTxCount = 0; + + /* print host-ip */ + printf("Connected with client : %s\n", inet_ntoa(tSockAddr.sin_addr)); + + /* Query remote name */ + if (0 == getnameinfo( (struct sockaddr *) &tSockAddr, sizeof (struct sockaddr), + szHostname,NI_MAXHOST, NULL, 0, 0)) + { + printf("Host Name : %s\n", szHostname); + + } else + { + printf("Host name unknown!\n"); + } + + if ( setsockopt(hClient, IPPROTO_TCP, TCP_NODELAY, (void*)&iNoDelay, sizeof(iNoDelay)) != 0 ) + { + printf("The server is not able to send small packets.\n"); + printf("So the communication could be very slow!\n"); + } + + ptTcpData->hClient = hClient; + pthread_create(&ptTcpData->hClientThread, NULL,ClientThread, (void*)ptTcpData); + + } + } + } + } + + return 0; +} + +/*****************************************************************************/ +/*! TCP connector initialization +* \param ptParams Marshaller specific parameters (e.g. timeout) +* \param ptConfigData UART configuration data +* \param pvMarshaller Handle to the marshaller, this connector should be added +* \return MARSHALLER_NO_ERROR on success */ +/*****************************************************************************/ +uint32_t TCPConnectorInit(const HIL_MARSHALLER_CONNECTOR_PARAMS_T* ptParams, void* pvMarshaller) +{ + HIL_MARSHALLER_CONNECTOR_T tMarshConn; + TCP_CONN_INTERNAL_T* ptTcpData = NULL; + uint32_t eRet; + + if(NULL == (ptTcpData = (TCP_CONN_INTERNAL_T*)malloc(sizeof(*ptTcpData)))) + { + eRet = HIL_MARSHALLER_E_OUTOFMEMORY; + } else + { + struct sockaddr_in tSockAddr = {0}; + + memset(&tMarshConn, 0, sizeof(tMarshConn)); + memset(ptTcpData, 0, sizeof(*ptTcpData)); + + ptTcpData->ulConnectorIdx = (uint32_t)~0; + ptTcpData->pvMarshaller = pvMarshaller; + ptTcpData->hClient = INVALID_SOCKET; + ptTcpData->fRunning = 1; + + tSockAddr.sin_addr.s_addr = INADDR_ANY; + tSockAddr.sin_port = htons(g_usPortNumber); + tSockAddr.sin_family = AF_INET; + + if(INVALID_SOCKET == (ptTcpData->hListen = socket(AF_INET, SOCK_STREAM, 0))) + { + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + } else if(SOCKET_ERROR == bind(ptTcpData->hListen, (struct sockaddr*)&tSockAddr, sizeof(tSockAddr))) + { + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + } else if(SOCKET_ERROR == listen(ptTcpData->hListen, 0)) + { + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + } else if (0 != (pthread_create(&ptTcpData->hServerThread, NULL,ServerThread, (void*)ptTcpData))) + { + eRet = HIL_MARSHALLER_E_OUTOFRESOURCES; + + } else + { + tMarshConn.pfnTransmit = TCPConnectorSend; + tMarshConn.pfnDeinit = TCPConnectorDeinit; + tMarshConn.pvUser = ptTcpData; + tMarshConn.ulDataBufferSize = ptParams->ulDataBufferSize; + tMarshConn.ulDataBufferCnt = ptParams->ulDataBufferCnt; + tMarshConn.ulTimeout = ptParams->ulTimeout; + + eRet = HilMarshallerRegisterConnector(pvMarshaller, + &ptTcpData->ulConnectorIdx, + &tMarshConn); + + } + + /* Something has failed, so uninitialize this connector instance */ + if(eRet != MARSHALLER_NO_ERROR) + { + TCPConnectorDeinit(ptTcpData); + } + } + + return eRet; +} diff --git a/examples/tcpserver/tcp_connector.h b/examples/tcpserver/tcp_connector.h new file mode 100644 index 0000000..2257e51 --- /dev/null +++ b/examples/tcpserver/tcp_connector.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __TCPCONNECTOR__H +#define __TCPCONNECTOR__H + +#include "OS_Includes.h" +#include "MarshallerInternal.h" +#include "CifXTransport.h" +#include "tcp_server.h" + + +#ifdef __cplusplus + extern "C" { +#endif + + + +uint32_t InitMarshaller ( void); +void DeinitMarshaller ( void); +uint32_t TCPConnectorInit (const HIL_MARSHALLER_CONNECTOR_PARAMS_T* ptParams, void* pvMarshaller); + + +#ifdef __cplusplus + } +#endif + +#endif /* __TCPCONNECTOR__H */ diff --git a/examples/tcpserver/tcp_server.c b/examples/tcpserver/tcp_server.c new file mode 100644 index 0000000..55cebda --- /dev/null +++ b/examples/tcpserver/tcp_server.c @@ -0,0 +1,739 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: marshaller server handling + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#define _XOPEN_SOURCE 700 + +#include +#include +#include +#include +#include +#include + +#include "tcp_connector.h" +#include "tcp_server.h" +#include "cifxlinux.h" +#include "cifx_download_hook.h" +#include "MarshallerErrors.h" + +/* Driver/Config base directory */ +extern char* g_szDriverBaseDir; + +/* marshaller handle */ +void* g_pvMarshaller = NULL; +/* flag for main loop */ +int g_fRunning = 0; +/* flag to display once the network traffic */ +int g_fTrafficOnce = 0; + +unsigned short g_usPortNumber = HIL_TRANSPORT_IP_PORT; + +struct CIFX_LINUX_INIT g_tInit = {0}; + +pthread_mutex_t* g_ptMutex = NULL; + +typedef struct INIT_PARAM_Ttag +{ + int fUseSingleCard; + int iCardNumber; + int iPortNumber; + +} INIT_PARAM_T; + +INIT_PARAM_T g_tInitParam = {0}; + +/* use the functions of the linked library libcifx */ +void OS_DeleteLock(void* pvLock); +void* OS_CreateLock(void); + +/*****************************************************************************/ +/*! Function to demonstrate the board/channel enumeration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t EnumBoardDemo(void) +{ + CIFXHANDLE hDriver = NULL; + long lRet = xDriverOpen(&hDriver); + + printf("---------- Available Cards ----------\r\n"); + + if(CIFX_NO_ERROR == lRet) + { + /* Driver/Toolkit successfully opened */ + unsigned long ulBoard = 0; + BOARD_INFORMATION tBoardInfo = {0}; + + /* Iterate over all boards */ + while(CIFX_NO_ERROR == xDriverEnumBoards(hDriver, ulBoard, sizeof(tBoardInfo), &tBoardInfo)) + { + printf("%d.: %s\r\n", tBoardInfo.ulBoardID +1, tBoardInfo.abBoardName); + if(strlen( (char*)tBoardInfo.abBoardAlias) != 0) + printf(" Alias : %s\r\n", tBoardInfo.abBoardAlias); + + printf(" DeviceNumber : %lu\r\n",(long unsigned int)tBoardInfo.tSystemInfo.ulDeviceNumber); + printf(" SerialNumber : %lu\r\n",(long unsigned int)tBoardInfo.tSystemInfo.ulSerialNumber); + + unsigned long ulChannel = 0; + CHANNEL_INFORMATION tChannelInfo = {{0}}; + + /* iterate over all channels on the current board */ + while(CIFX_NO_ERROR == xDriverEnumChannels(hDriver, ulBoard, ulChannel, sizeof(tChannelInfo), &tChannelInfo)) + { + printf(" - Channel %lu:\r\n", ulChannel); + printf(" Firmware : %s\r\n", tChannelInfo.abFWName); + printf(" Version : %u.%u.%u build %u\r\n", + tChannelInfo.usFWMajor, + tChannelInfo.usFWMinor, + tChannelInfo.usFWRevision, + tChannelInfo.usFWBuild); + + ++ulChannel; + } + + ++ulBoard; + printf("----------------------------------------------------\r\n"); + } + + /* close previously opened driver */ + xDriverClose(hDriver); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Function display IP of the available network adapter */ +/*****************************************************************************/ +void DisplayIP(void) +{ + struct ifaddrs * ifAddrStruct=NULL; + struct ifaddrs * ifa=NULL; + void * tmpAddrPtr=NULL; + + getifaddrs(&ifAddrStruct); + + if (ifAddrStruct != NULL) { + printf("Interface Name\t: IP\n"); + printf("-------------------------------\n"); + } + + for (ifa = ifAddrStruct; ifa != NULL; ifa = ifa->ifa_next) + { + /* if IP4 */ + if ( (ifa->ifa_addr != NULL) && (ifa->ifa_addr->sa_family == AF_INET) ) + { + if (OS_Strnicmp("lo", ifa->ifa_name, strlen(ifa->ifa_name))) + { + tmpAddrPtr=&((struct sockaddr_in *)ifa->ifa_addr)->sin_addr; + char addressBuffer[INET_ADDRSTRLEN]; + inet_ntop(AF_INET, tmpAddrPtr, addressBuffer, INET_ADDRSTRLEN); + + printf("%-16s: %s\n", ifa->ifa_name, addressBuffer); + } + } + } + + printf("\n"); + + if (ifAddrStruct!=NULL) freeifaddrs(ifAddrStruct); +} + + +/*****************************************************************************/ +/*! Function display optional arguments */ +/*****************************************************************************/ +void DisplayHelp(void) +{ + printf("The cifx_tcpserver application is a demo application for remote access of a cifX device under Linux!"); + printf("The application provides a file transfer mechanism, to be able to remotely configure a device (e.g. via Communication Studio/SYCON.net)\n"); + printf("For custom purposes the application needs to be adapted!\n"); + printf("Available options:\n"); + printf("[-n ] initialize only a specific card specified by 'n'.\n"); + printf("[-p ] use port number specified by 'n'.\n"); + printf("[-d] display IP adress of the active adapter and return.\n"); + printf("[-a] display available cards and return.\n"); + printf("[-h] display this help.\n"); + + printf("Example:\n"); + printf("cifXTCPServer -n 0 -p 51234\n"); +} + + +/*****************************************************************************/ +/*! Function evaluates input arguments */ +/*****************************************************************************/ +int ValidateArgs(int argc, char* argv[]) +{ + int fRet = 1; + int iArgCnt = 0; + + if (argc > 1) + { + /* ignore if help is not first param */ + if (0 == strcasecmp("-h", argv[1])) + { + DisplayHelp(); + return 0; + } + + /* iterate over options check only -d & -a */ + for (iArgCnt = 1; iArgCntulRxCount, ptTcpData->ulTxCount); +} + +/*****************************************************************************/ +/*! This function is called after each interval specified in the setitimer + * function (see InitMarshaller) used to install a timer. + * \param iSignal Signal which caused the call */ +/*****************************************************************************/ +void MarshallerTimer(int iSignal) +{ + HilMarshallerTimer(g_pvMarshaller); +} + +/*****************************************************************************/ +/*! Wrapper for xSysdeviceOpen to track sysdevice access +* \param hDriver Driver handle +* \param szBoard Name of the board to open +* \param phSysdevice Returned handle to the System device area +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceOpenWrap ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice) +{ + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = xSysdeviceOpen( hDriver, szBoard, phSysdevice))) + { + /* add here additional code for print out or display handling */ + + printf("Open system device \"%s\" (handle %p)\n", szBoard, *phSysdevice); + + } + + return lRet; +} + +/*****************************************************************************/ +/*! Wrapper for xSysdeviceClose to track sysdevice access +* \param hSysdevice Handle to the System device to close +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceCloseWrap ( CIFXHANDLE hSysdevice) +{ + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = xSysdeviceClose( hSysdevice))) + { + /* add here additional code for print out or display handling */ + printf("Close system device (handle %p)\n", hSysdevice); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Wrapper for xChannelOpen to track channel access +* \param hDriver Driver handle +* \param szBoard DOS Device Name of the Board to open +* \param ulChannel Channel number to open (0..n) +* \param phChannel Returned handle to the channel (Needed for all channel +* specific operations) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelOpenWrap ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel) +{ + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = xChannelOpen( hDriver, szBoard, ulChannel, phChannel))) + { + /* add here additional code for print out or display handling */ + printf("Open channel %d of device \"%s\" (handle %p)\n", ulChannel, szBoard, *phChannel); + + } + + return lRet; +} + +/*****************************************************************************/ +/*! Wrapper for xChannelClose to track channel access +* \param hChannel Handle to the channel device to close +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelCloseWrap ( CIFXHANDLE hChannel) +{ + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = xChannelClose(hChannel))) + { + /* add here additional code for print out or display handling */ + + printf("Close channel (handle %p)\n", hChannel); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Function for Marshaller Request */ +/*****************************************************************************/ +void MarshallerRequest(void* pvMarshaller, void* pvUser) +{ + UNREFERENCED_PARAMETER(pvUser); + HilMarshallerMain(pvMarshaller); +} + +/*****************************************************************************/ +/* Destroy marshallar and deinit driver + * if SIGINT (ctrl +c) */ +/*****************************************************************************/ +void DeInitServer(int iSignal) +{ + DeinitMarshaller(); + cifXDriverDeinit(); + + OS_DeleteLock(g_ptMutex); + g_fRunning = 0; +} + +/*****************************************************************************/ +/*! Checks if the given path exists in the file system. +* \param szPath Pointer to path */ +/*****************************************************************************/ +static int path_exists(char* szPath) +{ + struct stat s; + return stat(szPath, &s); +} + +/*****************************************************************************/ +/*! Helper function returning the path to a channel directory +* on the given device (e.g. /opt/cifx/deviceconfig/1250100/20004/channel0/). +* This function exists in the USER_Linux.c almost exactly like this one. +* \param szPath Pointer to returned path +* \param iPathLen Length of the buffer passed in szPath +* \param ulChannel Channel number +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr)*/ +/*****************************************************************************/ +static void GetChannelDir(char* szPath, size_t iPathLen, uint32_t ulChannel, BOARD_INFORMATION* ptDevInfo) +{ + uint32_t ulSlotNr = ptDevInfo->tSystemInfo.bDevIdNumber; + + /* If the rotary switch is set != 0 */ + if (ulSlotNr) + { + snprintf(szPath, iPathLen, + "%s/deviceconfig/Slot_%d/channel%d/", + g_szDriverBaseDir, + (unsigned int)ulSlotNr, + (unsigned int)ulChannel); + if (path_exists(szPath)==0) + return; + } + + /* Check if a path with / exists */ + snprintf(szPath, iPathLen, + "%s/deviceconfig/%d/%d/channel%d/", + g_szDriverBaseDir, + (unsigned int)ptDevInfo->tSystemInfo.ulDeviceNumber, + (unsigned int)ptDevInfo->tSystemInfo.ulSerialNumber, + (unsigned int)ulChannel); + + if (path_exists(szPath)==0) + return; + + /* Check if a path with the exists */ + snprintf(szPath, iPathLen, + "%s/deviceconfig/%s/channel%d/", + g_szDriverBaseDir, + ptDevInfo->abBoardName, + (unsigned int)ulChannel); + + if (path_exists(szPath)==0) + return; + + /* Check if a single-directory path exists */ + snprintf(szPath, iPathLen, + "%s/deviceconfig/FW/channel%d/", + g_szDriverBaseDir, + (unsigned int)ulChannel); + + return; +} + +/*****************************************************************************/ +/*! File storage callback (uses NX-API) */ +/*****************************************************************************/ +static int32_t HandleFileStorage(BOARD_INFORMATION* ptBoardInfo, + char* pszFileName, uint32_t ulFileSize, + uint8_t* pabFileData, uint32_t ulChannel, + uint32_t ulDownloadMode, void* pvUser) +{ + int32_t lRet = CIFX_FUNCTION_FAILED; + char abFileName[FILENAME_MAX]; + FILE* iFd; + + GetChannelDir(abFileName, FILENAME_MAX, ulChannel, ptBoardInfo); + strcat(abFileName, pszFileName); + + printf("Store file: %s\n", abFileName); + if ( NULL != (iFd = fopen( abFileName, "w+"))) + { + int iFileSize; + if ( 0 < (iFileSize = fwrite( pabFileData, 1, ulFileSize, iFd))) + { + if ((((unsigned int)iFileSize) == ulFileSize)) + lRet = CIFX_NO_ERROR; + } else + { + printf("File storing failed %d\n", iFileSize); + } + fclose( iFd); + } else + { + printf("File open failed (error=%d)!\n",errno); + printf("Please create directory in case path does not exist!\n"); + lRet = CIFX_FILE_OPEN_FAILED; + } + if (( DOWNLOAD_MODE_FIRMWARE == ulDownloadMode) && (lRet == CIFX_NO_ERROR)) + { + /* if download succeeded restart device */ + xDriverRestartDevice ( NULL, ptBoardInfo->abBoardName, NULL); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Initialization the Marshallar */ +/*****************************************************************************/ +uint32_t InitMarshaller(void) +{ + HIL_MARSHALLER_PARAMS_T tParams = {{0}}; + HIL_MARSHALLER_CONNECTOR_PARAMS_T tTCPConnector = {0}; + + tTCPConnector.pfnConnectorInit = TCPConnectorInit; + tTCPConnector.pvConfigData = NULL; + tTCPConnector.ulDataBufferCnt = 1; + tTCPConnector.ulDataBufferSize = 6000; + tTCPConnector.ulTimeout = 1000; + + TRANSPORT_LAYER_CONFIG_T tCifXTransport = {0}; + CIFX_TRANSPORT_CONFIG tCifXConfig = {{0}}; + + tCifXConfig.tDRVFunctions.pfnxDriverOpen = xDriverOpen; + tCifXConfig.tDRVFunctions.pfnxDriverClose = xDriverClose; + tCifXConfig.tDRVFunctions.pfnxDriverGetInformation = xDriverGetInformation; + tCifXConfig.tDRVFunctions.pfnxDriverGetErrorDescription = xDriverGetErrorDescription; + tCifXConfig.tDRVFunctions.pfnxDriverEnumBoards = xDriverEnumBoards; + tCifXConfig.tDRVFunctions.pfnxDriverEnumChannels = xDriverEnumChannels; + tCifXConfig.tDRVFunctions.pfnxDriverMemoryPointer = xDriverMemoryPointer; + tCifXConfig.tDRVFunctions.pfnxSysdeviceOpen = xSysdeviceOpenWrap; + tCifXConfig.tDRVFunctions.pfnxSysdeviceClose = xSysdeviceCloseWrap; + tCifXConfig.tDRVFunctions.pfnxSysdeviceReset = xSysdeviceReset; + tCifXConfig.tDRVFunctions.pfnxSysdeviceResetEx = xSysdeviceResetEx; + tCifXConfig.tDRVFunctions.pfnxSysdeviceGetMBXState = xSysdeviceGetMBXState; + tCifXConfig.tDRVFunctions.pfnxSysdevicePutPacket = xSysdevicePutPacket; + tCifXConfig.tDRVFunctions.pfnxSysdeviceGetPacket = xSysdeviceGetPacket; + tCifXConfig.tDRVFunctions.pfnxSysdeviceDownload = xSysdeviceDownload; + tCifXConfig.tDRVFunctions.pfnxSysdeviceInfo = xSysdeviceInfo; + tCifXConfig.tDRVFunctions.pfnxSysdeviceFindFirstFile = xSysdeviceFindFirstFile; + tCifXConfig.tDRVFunctions.pfnxSysdeviceFindNextFile = xSysdeviceFindNextFile; + tCifXConfig.tDRVFunctions.pfnxChannelOpen = xChannelOpenWrap; + tCifXConfig.tDRVFunctions.pfnxChannelClose = xChannelCloseWrap; + tCifXConfig.tDRVFunctions.pfnxChannelDownload = xChannelDownload; + tCifXConfig.tDRVFunctions.pfnxChannelGetMBXState = xChannelGetMBXState; + tCifXConfig.tDRVFunctions.pfnxChannelPutPacket = xChannelPutPacket; + tCifXConfig.tDRVFunctions.pfnxChannelGetPacket = xChannelGetPacket; + tCifXConfig.tDRVFunctions.pfnxChannelGetSendPacket = xChannelGetSendPacket; + tCifXConfig.tDRVFunctions.pfnxChannelConfigLock = xChannelConfigLock; + tCifXConfig.tDRVFunctions.pfnxChannelReset = xChannelReset; + tCifXConfig.tDRVFunctions.pfnxChannelInfo = xChannelInfo; + tCifXConfig.tDRVFunctions.pfnxChannelWatchdog = xChannelWatchdog; + tCifXConfig.tDRVFunctions.pfnxChannelHostState = xChannelHostState; + tCifXConfig.tDRVFunctions.pfnxChannelBusState = xChannelBusState; + tCifXConfig.tDRVFunctions.pfnxChannelIORead = xChannelIORead; + tCifXConfig.tDRVFunctions.pfnxChannelIOWrite = xChannelIOWrite; + tCifXConfig.tDRVFunctions.pfnxChannelIOReadSendData = xChannelIOReadSendData; + tCifXConfig.tDRVFunctions.pfnxChannelControlBlock = xChannelControlBlock; + tCifXConfig.tDRVFunctions.pfnxChannelCommonStatusBlock = xChannelCommonStatusBlock; + tCifXConfig.tDRVFunctions.pfnxChannelExtendedStatusBlock = xChannelExtendedStatusBlock; + tCifXConfig.tDRVFunctions.pfnxChannelPLCMemoryPtr = xChannelPLCMemoryPtr; + tCifXConfig.tDRVFunctions.pfnxChannelPLCIsReadReady = xChannelPLCIsReadReady; + tCifXConfig.tDRVFunctions.pfnxChannelPLCIsWriteReady = xChannelPLCIsWriteReady; + tCifXConfig.tDRVFunctions.pfnxChannelPLCActivateWrite = xChannelPLCActivateWrite; + tCifXConfig.tDRVFunctions.pfnxChannelPLCActivateRead = xChannelPLCActivateRead; + tCifXConfig.tDRVFunctions.pfnxChannelFindFirstFile = xChannelFindFirstFile; + tCifXConfig.tDRVFunctions.pfnxChannelFindNextFile = xChannelFindNextFile; + + /* Install download hook */ + xDownloadHook_Install(&tCifXConfig.tDRVFunctions, HandleFileStorage, &g_tInit); + + tCifXTransport.pfnInit = cifXTransportInit; + tCifXTransport.pvConfig = &tCifXConfig; + + tParams.ulMaxConnectors = 1; + tParams.atTransports = &tCifXTransport; + tParams.ulTransportCnt = 1; + + tParams.ptConnectors = &tTCPConnector; + tParams.ulConnectorCnt = 1; + + uint32_t eRet = HilMarshallerStart(&tParams, &g_pvMarshaller, MarshallerRequest, 0); + + if ( MARSHALLER_NO_ERROR == eRet) + { + /* interval = 10ms */ + struct itimerval pITimerVal; + pITimerVal.it_value.tv_sec = 0; + pITimerVal.it_value.tv_usec = 10000; + pITimerVal.it_interval.tv_sec = 0; + pITimerVal.it_interval.tv_usec = 10000; + + setitimer(ITIMER_REAL, &pITimerVal,NULL); + + struct sigaction tSigTimer = {.sa_handler = MarshallerTimer}; + + sigemptyset( &tSigTimer.sa_mask); + + /* timer event for timeout */ + tSigTimer.sa_flags = 0; + + sigaction(SIGALRM, &tSigTimer, NULL); + } + + return eRet; +} + +/*****************************************************************************/ +/* Destroy the Marshallar */ +/*****************************************************************************/ +void DeinitMarshaller() +{ + setitimer(ITIMER_REAL,NULL,NULL); + + if(NULL != g_pvMarshaller) + { + printf("\nWaiting for all process to end...\n"); + HilMarshallerStop(g_pvMarshaller); + } +} + +/*****************************************************************************/ +/* Displays information of the server (cards under control and IP) */ +/*****************************************************************************/ +void PrintServerInformation(void) +{ + CIFXHANDLE hDriver = NULL; + int32_t lRet = xDriverOpen(&hDriver); + + printf("\n******************************************************************************\n"); + + if(CIFX_NO_ERROR != lRet) + { + printf("\nFAILED to open CIFX driver, error: 0x%.8X\n", lRet); + }else + { + /* Driver/Toolkit successfully opened */ + unsigned long ulBoard = 0; + unsigned long fFound = 0; + BOARD_INFORMATION tBoardInfo = {0}; + + printf("The following card(s) are now accessible via TCP/IP remote connection:\n"); + + /* Iterate over all boards */ + while(CIFX_NO_ERROR == xDriverEnumBoards(hDriver, ulBoard, sizeof(tBoardInfo), &tBoardInfo)) + { + printf("-> %d.: %s\r\n", tBoardInfo.ulBoardID +1, tBoardInfo.abBoardName); + ++ulBoard; + fFound = 1; + } + xDriverClose(hDriver); + + if( 0 == fFound) + { + printf("\n!!! NO CIFX boards found !!!! \n"); + } + } + printf("\nThe server is reachable under:\n"); + DisplayIP(); + printf("******************************************************************************\n"); +} + + +int main( int argc, char* argv[]) +{ + long lRet = CIFX_NO_ERROR; + struct sigaction tSigTerm; + + if (0 == ValidateArgs(argc, argv)) + return 0; + + if ( (g_ptMutex = OS_CreateLock()) == NULL ) { + printf("Error creating required resources - quiting server!\n"); + return -1; + } + + sigemptyset(&tSigTerm.sa_mask); + tSigTerm.sa_handler = DeInitServer; + tSigTerm.sa_flags = 0; + + /* catch "ctrl + c" signal */ + sigaction(SIGINT,&tSigTerm,NULL); + + /* set to default values */ + g_tInit.init_options = CIFX_DRIVER_INIT_AUTOSCAN; + g_tInit.iCardNumber = 0; + g_tInit.fEnableCardLocking = 0; + g_tInit.base_dir = NULL; + g_tInit.poll_interval = 0; + g_tInit.poll_StackSize = 0; + g_tInit.trace_level = 255; + g_tInit.user_card_cnt = 0; + + if (g_tInitParam.fUseSingleCard) + { + /* initialize toolkit to scan only for the specified card */ + g_tInit.init_options = CIFX_DRIVER_INIT_CARDNUMBER; + g_tInit.iCardNumber = g_tInitParam.iCardNumber; + } + + printf("cifXDriverInit...\n"); + /* First of all initialize toolkit */ + lRet = cifXDriverInit(&g_tInit); + + if(CIFX_NO_ERROR == lRet) + { + if (MARSHALLER_NO_ERROR == (lRet = InitMarshaller())) + { + printf("Press ctrl+'c' to quit!\n"); + g_fRunning = 1; + + /* display the current server settings */ + PrintServerInformation(); + } else + { + printf("Marshaller initialization failed!\n"); + } + } else + { + printf("CifXDriver initialization failed!\n"); + } + + if (MARSHALLER_NO_ERROR != lRet) + { + if( NULL != g_pvMarshaller) + kill(0,SIGINT); + } + + /* main loop */ + while( g_fRunning) + { + OS_Sleep( 250); + }; + + return 0; +} diff --git a/examples/tcpserver/tcp_server.h b/examples/tcpserver/tcp_server.h new file mode 100644 index 0000000..a460798 --- /dev/null +++ b/examples/tcpserver/tcp_server.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __TCPSERVER__H +#define __TCPSERVER__H + +#ifdef __cplusplus + extern "C" { +#endif + + +/*****************************************************************************/ +/*! Internal UART connector data */ +/*****************************************************************************/ +typedef struct TCP_CONN_INTERNAL_Ttag +{ +uint32_t ulConnectorIdx; +void* pvMarshaller; + +int fRunning; + +SOCKET hListen; +pthread_t hServerThread; + +SOCKET hClient; +pthread_t hClientThread; +unsigned long ulRxCount; +unsigned long ulTxCount; + +} TCP_CONN_INTERNAL_T; + + + +void TrafficTimer (void* dwUser); +void MarshallerTimer (int iSignal); +int32_t APIENTRY xSysdeviceOpenWrap (CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +int32_t APIENTRY xSysdeviceOpenWrap (CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +int32_t APIENTRY xChannelOpenWrap (CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +int32_t APIENTRY xChannelCloseWrap (CIFXHANDLE hChannel); +void MarshallerRequest (void* pvMarshaller, void* pvUser); +uint32_t InitMarshaller (void); +void DeinitMarshaller (void); + +#ifdef __cplusplus + } +#endif + +#endif /* __TCPSERVER__H */ + + + + + + + + + diff --git a/libcifx/CMakeLists.txt b/libcifx/CMakeLists.txt new file mode 100644 index 0000000..46c6f5e --- /dev/null +++ b/libcifx/CMakeLists.txt @@ -0,0 +1,135 @@ + +cmake_minimum_required(VERSION 2.8.12) +# required to set project version +cmake_policy(SET CMP0048 NEW) + +FIND_PACKAGE(PkgConfig REQUIRED) + +set(DRV_MAJOR 3) +set(DRV_MINOR 0) +set(DRV_PATCH 0) + +set(DRV_VERSION ${DRV_MAJOR}.${DRV_MINOR}.${DRV_PATCH}) +set(DRVVERSION "\"V${DRV_VERSION}\"") + +project("libcifx user space library" VERSION ${DRV_VERSION}) + +option(DEBUG "Build Library debug messages" OFF) +option(DISABLE_PCI "Disable use of PCI" OFF) +option(TIME "Enable device time setting during start-up" OFF) +option(DMA "Compile driver with dma support" OFF) +option(NO_MINSLEEP "Disable minimum sleep time" OFF) +option(VIRTETH "Enables virtual ethernet interface support" OFF) +option(HWIF "Enables the toolkit's Hardware Function Interface (e.g. for SPI)" OFF) +option(PLUGIN "Enables support of device plugins and enables hardware function interface (see HWIF)" OFF) +option(SPM_PLUGIN "Build spm-plugin and enables support of device plugins (see PLUGIN)" OFF) +option(SHARED "Build shared libary (default: ON)" ON) + +if(SHARED) + add_library( cifx SHARED) + set_target_properties(cifx PROPERTIES VERSION ${DRV_VERSION} SOVERSION ${DRV_MAJOR}) +else(SHARED) + add_library( cifx STATIC) +endif(SHARED) + +set(src_dir ${CMAKE_CURRENT_LIST_DIR}) +set(tk_dir ${src_dir}/Toolkit) + +# check endianess +include (TestBigEndian) +TEST_BIG_ENDIAN(IS_BIG_ENDIAN) + +target_compile_definitions( cifx + PRIVATE + VERSION_INFO="\"${DRVVERSION}\"" + $<$:CIFX_TOOLKIT_BIGENDIAN> + + $<$:DEBUG> + $<$:CIFX_TOOLKIT_DISABLEPCI> + $<$:CIFX_TOOLKIT_DMA> + $<$:NO_MIN_SLEEP> + $<$:CIFX_TOOLKIT_TIME> + $<$:CIFXETHERNET> + $<$:CIFX_DRV_HWIF> + $<$,$>:CIFX_DRV_HWIF CIFX_PLUGIN_SUPPORT> +) + +file(GLOB SOURCES "${src_dir}/*.c" "${tk_dir}/Source/*.c") +if(VIRTETH) + file(GLOB NETXTAP_SOURCES ${src_dir}/netx_tap/*.c) + set_source_files_properties(${tk_dir}/Source/cifXFunctions.c PROPERTIES COMPILE_FLAGS -DAPIRENAME) + + if(NOT LIBDNL_INCLUDE_DIRS OR NOT LIBDNL_LIBRARY_DIRS OR NOT LIBDNL_LIBRARIES) + pkg_check_modules(LIBDNL libnl-3.0) + set(REQUIRED_PACKAGES "${REQUIRED_PACKAGES} libnl-3.0") + endif(NOT LIBDNL_INCLUDE_DIRS OR NOT LIBDNL_LIBRARY_DIRS OR NOT LIBDNL_LIBRARIES) + + if(NOT LIBDNL_CLI_INCLUDE_DIRS OR NOT LIBDNL_CLI_LIBRARY_DIRS OR NOT LIBDNL_CLI_LIBRARIES) + pkg_check_modules(LIBDNL-CLI libnl-cli-3.0) + set(REQUIRED_PACKAGES "${REQUIRED_PACKAGES} libnl-cli-3.0") + endif(NOT LIBDNL_CLI_INCLUDE_DIRS OR NOT LIBDNL_CLI_LIBRARY_DIRS OR NOT LIBDNL_CLI_LIBRARIES) +endif(VIRTETH) + +target_link_directories( cifx + PRIVATE + $<$>:${LIBPCIACCESS_LIBRARY_DIRS}> + $<$:${LIBDNL_LIBRARY_DIRS}> + $<$:${LIBDNL_CLI_LIBRARY_DIRS}> +) + +target_include_directories( cifx + PRIVATE + ${src_dir}/ + ${tk_dir}/Source/ + ${tk_dir}/Common/cifXAPI/ + ${tk_dir}/Common/HilscherDefinitions/ + $<$>:${LIBPCIACCESS_INCLUDE_DIRS}> + $<$:${src_dir}/netx_tap/ ${LIBDNL_CLI_INCLUDE_DIRS} ${LIBDNL_INCLUDE_DIRS}> +) + +target_link_libraries( cifx + PRIVATE + pthread + rt + $<$>:pciaccess> + $<$,$>:dl> + $<$:${LIBDNL_LIBRARIES}> + $<$:${LIBDNL_CLI_LIBRARIES}> +) + +# link and create shared & static library +target_sources( cifx + PRIVATE + ${SOURCES} + ${NETXTAP_SOURCES} +) + +# removes warning about snprintf buffer truncation +set_target_properties(cifx PROPERTIES COMPILE_FLAGS -Wformat-truncation=0) + +# configure pkgconfig file +set(prefix ${CMAKE_INSTALL_PREFIX}) +set(exec_prefix ${prefix}) +set(libdir ${exec_prefix}/lib) +set(includedir ${prefix}/include) +configure_file( ${src_dir}/cifx.pc.in ${CMAKE_CURRENT_BINARY_DIR}/cifx.pc @ONLY) + +# install header files +file(GLOB INSTALL_HEADERS + ${src_dir}/cifxlinux.h + ${tk_dir}/Source/cifXEndianess.h + ${tk_dir}/Common/cifXAPI/*.h + ${tk_dir}/Common/HilscherDefinitions/*.h + $<$:${src_dir}/netx_tap/netx_tap.h> +) + +# install resources +install(TARGETS cifx DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/) +install(FILES ${INSTALL_HEADERS} DESTINATION ${CMAKE_INSTALL_PREFIX}/include/cifx) +install(FILES ${CMAKE_CURRENT_BINARY_DIR}/cifx.pc DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/pkgconfig) + +# can't add it as subdir as long it's one above +if (SPM_PLUGIN) + set(CIFX_HEADER ${tk_dir}/Common/cifXAPI/ ${src_dir}/) + include(${src_dir}/../plugins/netx-spm/CMakeLists.txt) +endif(SPM_PLUGIN) diff --git a/libcifx/LICENSE b/libcifx/LICENSE new file mode 100644 index 0000000..7ad402a --- /dev/null +++ b/libcifx/LICENSE @@ -0,0 +1,19 @@ + +Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the “Software”), to deal in +the Software without restriction, including without limitation the rights to use, +copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the +Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. diff --git a/libcifx/OS_Includes.h b/libcifx/OS_Includes.h new file mode 100644 index 0000000..617a24b --- /dev/null +++ b/libcifx/OS_Includes.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Header file for Linux specific operating system includes. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __OS_INCLUDES__H +#define __OS_INCLUDES__H + +#ifdef CIFXETHERNET +#ifdef APIRENAME /* NOTE: allow api renaming only when ethernet support is enabled */ +#define xSysdeviceReset xSysdeviceResetTK +#define xSysdeviceResetEx xSysdeviceResetExTK +#define xSysdeviceBootstart xSysdeviceBootstartTK +#define xChannelReset xChannelResetTK +#endif +#endif + +#define APIENTRY + +#ifndef NULL + #define NULL 0 +#endif + +#ifndef UNREFERENCED_PARAMETER + #define UNREFERENCED_PARAMETER(a) (void)(a) +#endif + +#ifdef CIFX_DRV_HWIF + #define CIFX_TOOLKIT_HWIF +#endif + +#endif /* __OS_INCLUDES__H */ diff --git a/libcifx/Toolkit/BSL/NETX10-BSL.bin b/libcifx/Toolkit/BSL/NETX10-BSL.bin new file mode 100644 index 0000000..141d3e4 Binary files /dev/null and b/libcifx/Toolkit/BSL/NETX10-BSL.bin differ diff --git a/libcifx/Toolkit/BSL/NETX100-BSL.bin b/libcifx/Toolkit/BSL/NETX100-BSL.bin new file mode 100644 index 0000000..bbc5237 Binary files /dev/null and b/libcifx/Toolkit/BSL/NETX100-BSL.bin differ diff --git a/libcifx/Toolkit/BSL/NETX50-BSL.bin b/libcifx/Toolkit/BSL/NETX50-BSL.bin new file mode 100644 index 0000000..259aff3 Binary files /dev/null and b/libcifx/Toolkit/BSL/NETX50-BSL.bin differ diff --git a/libcifx/Toolkit/BSL/NETX51-BSL.bin b/libcifx/Toolkit/BSL/NETX51-BSL.bin new file mode 100644 index 0000000..65678e4 Binary files /dev/null and b/libcifx/Toolkit/BSL/NETX51-BSL.bin differ diff --git a/libcifx/Toolkit/BSL/NETX52-BSL.bin b/libcifx/Toolkit/BSL/NETX52-BSL.bin new file mode 100644 index 0000000..81cb3b1 Binary files /dev/null and b/libcifx/Toolkit/BSL/NETX52-BSL.bin differ diff --git a/libcifx/Toolkit/BSL/bsl_history.txt b/libcifx/Toolkit/BSL/bsl_history.txt new file mode 100644 index 0000000..de1dc51 --- /dev/null +++ b/libcifx/Toolkit/BSL/bsl_history.txt @@ -0,0 +1,459 @@ +Version History + +ATTENTION: Since V1.3.0.0 of the 2nd Stage Loader, parameters can only be + configured through the tag list using Hilscher Tag List Editor. + Patching parameters using Bootwizard has been removed and is not + supported anymore. + +V1.8.0.0 (07.03.2022) +----------------- +Change: + - Cypress S25FL064 FLASH now only for netX52 and detection via internal list and not SFDP + +Bugfix: + - Fixed SFDP detection for netX100/netX500 + +V1.7.0.0 (20.10.2020) +----------------- +Added: + - Added FSU support for SQI FLASH devices found via SFDP + +Change: + - Set default SQI frequency of FLASH devices found via SFDP to 80MHz + - Set default SPI frequency of FLASH devices in internal list to 25MHz + +Bugfix: + - Fixed FLASH file read error when file size is a multiple of the sector size + - Skip firmware validation for Evaluation Boards + +V1.6.0.1 (25.03.2019) +----------------- +Bugfix: + - Disable I2C SCL on startup of BSL (for netX51/netX52) + +V1.6.0.0 (16.07.2018) +----------------- +Changed: + - Change order of FLASH detection to: Custom flash, interal list, SFDP detection + - Removed obsolete flash types from internal list + Flash types still available in internal list: W25Q32, W25Q64, W25Q128, AT45DB321C/D/E, AT45DB642D + +V1.5.2.0 (11.07.2018) +----------------- +Added: + - Detection of slot number for CIFX-CCLIES PC Cards + +V1.5.1.0 (11.04.2018) +----------------- +Bugfix: + - Missing SPI initialization when using custom serial flash parameters from tag list + +V1.5.0.0 (20.03.2018) +----------------- +Added: + - Support for automatic serial flash detection via SFDP (50 MHz max speed) + ATTENTION: SFDP Version 1.5 must be supported by flash. + Some SQI Flashes (e.g. Microchip SST) don't work as they need + special command for writing which are not available in SFDP, + or they don't comply to SFDP specification (8dummy cycles in query) + after reprogramming number of dummy cycles in 4-Bit mode (e.g. Cypress) + - New tag list entry TAG_BSL_SQIFLASH_PARAMS for custom SQI flash parameter + - New tag list entry TAG_BSL_FLASH_LAYOUT_PARAMS which replaces TAG_BSL_DISK_POS_PARAMS + and TAG_BSL_BACKUP_POS_PARAMS + +V1.4.18.0 (26.10.2016) +----------------- +Added: + - Support for Winbond W25Q64 serial flash + +Bugfix: + - RCX_FILE_XFER_SERIAL_FLASH does not work if file-system cannot be mounted, but flash was detected + - Serial flash detection does not work, if flash is in wrong state at startup + - Use netX52 as RAM Based device not working + +V1.4.17.1 (07.04.2015) +----------------- +Bugfix: + - Firmware validation does not work on netX10/51/52 running in XiP/SQIROM mode, + if no security memory is present and taglist entries for HW data are used + (A wrong firmware may be downloaded and will illegally be started) + +V1.4.17.0 (30.09.2014) +----------------- +Changed: + - netX51/52: Introduce separate 2nd Stage Loader binary for each chip type + - netX52: 2nd Stage Loader binary uses SQIROM by default + +Added: + - netX51/52: Added flag to hardware parameters to tell the firmware, that a valid flash device label has been found + - Pass MAC-Address via hardware parameters to firmware + +Bugfix: + - netX51/52: MMIO configuration gets corrupted if break signal is initiated on the UART during startup phase + - SD cards which do not respond to mandatory command CMD1 (SEND_OP_COND) are rejected + - netX52: UART boot mode broken due to invalid default MMIO configuration + - netX100/500: Error during license check may stall bootloader in startup phase + - SD/MMC restore operation creates invalid short filename if extension of long filename has fewer than 3 characters + - netX50/51/52: System channel signals system error although security memory is disabled via tag list + - Restore operation creates corrupt files on target media if backup size exceeds target capacity + +V1.4.16.0 (19.02.2014) +---------------------- +Bugfix: + - netX51/52: DPM settings for DPM_IF_CFG and address comparator in DPM_ADDR_CFG are not setup correctly + +V1.4.15.0 (28.01.2014) +---------------------- +Added: + - netX51/52: Support for device label stored in last flash sector + +V1.4.14.0 (06.01.2014) +---------------------- +Bugfix: + - Self-Flashing Option does not work for flashes not supporting single page erase, but only sector erase + - netX10/50/51: After software reset security memory access may be 10times slower depending on used firmware + +V1.4.13.0 (02.10.2013) +---------------------- +Changed: + - netX51/52: 8/16 Bit DPM mode detection pin updated + netX50 compatibility mode WIF=HIF PIO35 / D17 + netX51/52 native mode WIF=SIRQ + - netX51/52: DPM configuration registers (IRQ enable, reset, etc.) are now shown at end of 64kB DPM (default configuration) + - Parallel flash from Manufacturer other than Intel/Spansion are not detected + +Added: + - netX51/52: Allow booting firmware to internal RAM with following limitations: + * Firmware must be loaded beyond the 2nd Stage loader (current limit is 96kB Offset from start of INTRAM0) + * Firmware must be located between 96kB of INTRAM start and start of INTRAM7 + * Maximum used RAM size during load must not exceed 416kB + - Passing of bHwAssemblyFeatures in boottokens + - Support for AT45DB312E (only test first 2 bytes of JEDEC identifier) + +Bugfix: + - Some MMC4.x cards might not be recognized correctly + +V1.4.12.0 (12.06.2013) +---------------------- +Bugfix: + - MMIO Pins for UART may not be set to UART function if a spurious BREAK is detected + (RXD low on HW during startup) + - Some / Older MMC cards may not work, if they need longer for CMD8 (SEND_OPCOND). + Observed with old 64MB cards delivered with some evaluation boards + +V1.4.11.0 (29.04.2013) +---------------------- + - Reduced maximum serial flash clock speeds for Winbond W25QXXX from 80 to 33 MHz in standard read mode + - netX52: Disable netX50 compatibility mode to ensure external SDRAM and SPI DPM + works at the same time + ATTENTION: Wrong wiring may cause permanent hardware damage + - netX52: Default USB ProductID is automatically adjusted to 0x200 if netX52 is being detected + - SDHC/SDXC support added (may not work for all available cards, if they don't support SPI interface) + - Boottoken list contains a broken token on hardwares without security memory, + which results in a unparsable tokenlist + +V1.4.10.0 (21.12.2012) +---------------------- +Bugfix: + - netX51 MMIO settings passed via taglist are not evaluated + - netX51 HIF parameters passed via taglist are not evaluated + - netX10/51 Automatic serial DPM detection changes memory + interface configuration unintentionally + - Firmware validation does not work on netX10/51 running in XiP/SQIROM mode + (A wrong firmware may be downloaded and will illegally be started) + - RCX_HW_IDENTIFY_REQ now also detects netX52 + +Added: + - 2nd Stage Loader version information is now passed to firmware via boottoken + - netX52 support + +V1.4.9.0 (11.07.2012) +--------------------- +Added: + - netX51 support + - Allow customer specific serial flash via taglist (ATTENTION: This flash must + support page erase to work) + - Pass serial flash parameters to firmware via tokenlist + - Support for Winbond W25Q128 serial flash + +Bugfix: + - netX100/500 MRAM may not be accessible to due a netX bug + +V1.4.8.0 (06.02.2012) +--------------------- +Changed: + - netX10 DPM auto-detection changed to support serial DPM via DIRQ pin. See the + following truth table: + DIRQ SIRQ Mode + 0 X Serial DPM (Mode 3) + 1 0 Parallel DPM (16 Bit) + 1 1 Parallel DPM (8 Bit) + +V1.4.7.0 (16.01.2012) +--------------------- +Bugfix: + - Firmwares ending on a cluster boundary (filesize is a multiple of cluster size) + are not started. + +V1.4.6.0 (16.12.2011) +--------------------- +Changed: + - Disable USB at start to allow host to detect disconnection during restart + - MRAM data is now inserted into System Status Block of DPM + +Bugfix: + - MRAM may not be mapped correctly + +V1.4.5.0 (06.12.2011) +--------------------- +Added: + - Mapping of PCI target 2 (MRAM on 2nd memory bar) + - netX10: USB communication changed to prevent FIFO problems (now using special protocol over USB). + ATTENTION: This needs a special USB Driver (netx10ser.sys V6.0.2.0 or later) + +V1.4.4.0 (16.09.2011) +--------------------- +Bugfix: + - netX10: Host interrupt was not correctly enabled for DPM Targets. + - netX10: Host handshake cells were not zeroed correctly on system start (NSF_RESET) + - netX10: Backup Partition did not work in SQIROM Mode + - netX10: SDRAM Parameters from Taglist may not be used, depending on tag list element order + (HIF and SDRAM depend on each other) + - Bootloader update on SQI Flashes that don't support Page Erase does not work + +Changed: + - netX10: Generic 2nd Stage Loader binary now always uses SQIROM mode + (pre-activated in taglist) + +V1.4.3.0 (14.09.2011) +--------------------- +Added: + - BOOTTOKEN_HARDWARE_FLAGS_CUSTOM_MMIO_MAPPING is now passed to firmware in + Boottoken BOOTTOKEN_HARDWARE_FLAGS, to tell the firmware a custom MMIO + mapping has already been setup by 2nd Stage Loader and Firmware does not + need to change it again + +Bugfix: + - netX50 may erroneously detect a break signal on fiber-optics hardware + and enters serial boot mode instead of starting the firmware or correctly + returning from a system reset via DPM + + - netX50 UART does not work if Fast-Startup mode is not enabled due to wrong + MMIO configuration + +Changed + - UART is now checked for incoming transport packets in main loop. This allows + to talk via UART with the 2nd Stage Loader even without asserting a break signal + at coldstart + ATTENTION: If a connection established via UART/USB/DPM all other connections + will be disabled. This means if a connection via UART is established + no access via DPM or USB will be possible until device being reset + +V1.4.2.0 (11.08.2011) +--------------------- +Changed: + - All DPM Windows are now disable before firmware is started. This makes sure that the firmware + can use the internal RAM for code/data completely, without the host destroying program code, + before new DPM mapping is set up + - USB core is now always disabled before firmware is started + - AIFX now read with 4kHz + - netX10 DPM timings updated for comX compatibility + +Added: + - RCX_FORMAT_REQ added to format flash disk + - Restore from SD/MMC card will restore files to serial flash disk, + even when default medium is set to par. flash. + - new MMIO pinning for fast startup added (selectable via Tag List Editor) + - Support for SPI flash Numonyx M45PE16 + - Support for Backup Partition (netX50/100, or netX10 with SDRAM). Currently not supported for netX10 SQIROM Mode + +Bugfix: + - 2nd Stage Loader may write to flash when booting a firmware + - Creating default filesystem may fail after first reset (yellow LED permanent on) + +V1.4.1.0 (22.11.2010) +--------------------- +Bugfix: + - SDRAM Parameters from TAG List may be ignored + - Parallel Flash mode was always expecting a XiP Firmware + - AIFX Modules may not work correctly + +Changed: + - Reset SYSTIME unit to power on defaults for netX10 + - Reducing MAX Frequency of AT45DB642D to 25/33MHz as 50MHz does not work on every HW design + +V1.4.0.0 (26.10.2010) +--------------------- + Added: + - netX10 support + - MMIO configuration added to Taglist + - USB descriptor added to Taglist + - Disk position and offset added to Taglist + +V1.3.1.0 (03.08.2010) +--------------------- + Added: + - Packets to read/write physical addresses + +V1.3.0.0 (11.11.2009) +--------------------- + Added: + - Filesystem type can now be configured through security memory zone 1, + starting with structure revision 3 + - Rotary Switches are always read if Security Memory contains DEV_CLASS_CIFX (for every manufacturer) + + Bugfix: + - Slow SDMMC cards were sometimes not correctly detected + +V1.0.0.0 (05.11.2009) +-------------------------- + Added: + - Firmwarevalidation according to Hilscher Firmware startup concept + +V0.915 (31.07.2009) +-------------------------- + Added: + - Additional packets added: + * RCX_HW_HARDWARE_INFO_REQ + * RCX_HW_LICENSE_INFO_REQ + * RCX_SYSTEM_INFORMATION_BLOCK_REQ + * RCX_CHANNEL_INFORMATION_BLOCK_REQ + * RCX_SYSTEM_CONTROL_BLOCK_REQ + * RCX_SYSTEM_STATUS_BLOCK_REQ + - Tag list included for configuration + - Parallel Flash support, without filesystem added + - Support for USB Enable pin added (via Tag list) + - Support for PCI Enable pin added (via Tag list) + - ISA Mode added + - Rotary switch support for cifX 50 added + - New filed added in system status block (ulBootError) to show why a firmware has not been booted + +Known Bugs: + - Taglist is not yet working correctly. Bugfix needed. + +V0.914 (FSU Release) +------------------- + Added: + - HilFileHeader V3 included + - PCI support (cifX, .NFX files only) + - RAM Based device support (when no flash is available) + This feature needs the cifX Toolkit which downloads all neccessary files at runtime + - Additional Bootheaders parameter (ulUserParams) + * Bitmask + BOOTLOADER_FORCE_RAMDISK 0x10 + BOOTLOADER_FORCE_SERFLASH 0x20 + BOOTLOADER_FORCE_PARFLASH 0x40 + * BOOTLOADER_FORCE_NXF_SDRAM_PARAMS (0x200), to force usage of SDRAM parameters from .NXF file + * BOOTLOADER_FORCE_FLASHING (0x80) to force flashing when loaded via DPM/PCI + - SD/MMC update support added (can be used to restore the flash file system) + + Changed: + - When UART is enabled and a break is being detected, the bootloader will only enter + the serial console if the break signal goes away within 100ms after sending a zero character + - SDRAM Parameter usage order changed + 1. Crypto flash (always used if available) + 2. Bootloader header (only used when no cryptoflash is available) + 3. .NXF file header (only used when neither crypto nor bootheader contains SDRAM information) + +V0.913 (04.12.2008) +------------------- + Changed: + - Bootheaders user parameter is now evaluated and used to disable bootloader interfaces + It contains a mask of disabled interfaces + * 0x01 = UART + * 0x02 = USB + * 0x04 = HIF + Bugfix: + - Cryptoflash read/write does expect inverted data anymore, so the user can just pass + the raw data structure (as described in manual) + - Cryptoflash write did not work (wrong buffer was written) + - Download in extended Mailbox did only use the first 80 byte chunks for data transfer + Added: + - Restore Flash File System from SD/MMC + - Enable Flash File System Restore from SD/MMC in User Flags + - Configure SD/MMC Insertion pin in User Flags + - License Download + +V0.912 (25.04.2008) +------------------- + Bugfix: + * netX100/500 + - Cryptoflash license code readout could result in total netX crash (due to internal XC problems) + +V0.911 (18.04.2008) +------------------- + Bugfix: + - Buffer overflow in Serial/USB communication fixed + - Bootloader did not enter HIF mode, if first host action was a Reset via DPM + - USB connection was only checked once, and entered HIF Boot mode afterwards. + - Reading crypto flash always returned invalid CRC, causing SDRAM Parameters can only be used from NXF file + and not from crypto. + - DPMAS_IFCONF1 was not written correctly for standard configuration + - Removed incompatible serial Flash types (which do not support "page erase" or "page erase and program" opcode + - USB did abort packet transfer due to internal core problems + + Changed: + - Per Default only GPIO0 (netx100/500) or MMIO34 (netX50) is placed in Uart RXD state. + TXD/(GPIO1 or MMIO35) is only enabled, if a break signal is detected on the serial line. + GPIO2/3 or MMIO36/37) (CTS/RTS) are never used + - Only try to read crypto flash license codes, if it was detected before + - Changed Name to "Second Stage Loader (netX100/500)" and "Second Stage Loader (netX50)" + + * netX50 + - Only try to detect crypto flash if we are in PCI Bootmode (external SYSSTA value) + + Added: + - netX50 support (MMIO's will be kept in default configuration) + - Hilscher file header added + +TODO: + - License code readout for netX50 (currently not possible) + +V0.910 (18.02.2008) +------------------- +Changed: + - The default DPM Timings have changed, to meet the comX requirements. + The following settings have changed (if no special parameters are patched): + +Bugfix: + - RCX_FILE_XFER_SERIAL_FLASH did not work if the pagesize if the serial flash + is larger than mailbox/block size + - Extended Mailbox did not work, as it internally expected 16 Bit Handshake cells + +WAIT_DRV 1 : Push/pull output +WAIT_MODE 0 : WAIT / BUSY mode function. A active signal shows the the host system that the current access is not ready. +WAIT_POLARITY 0 : low active polarity output +IRQ_MODE 2 : Push / pull output +IRQ_POLARITY 0 : low active polarity output + +V0.905 (13.09.2007) +------------------- +Bugfix: + - Error when trying to mount a filesystem on serial flashes with page size < 512 bytes + - Enable IRQ mask adjusted to channel specific interrupts (loader did enable all IRQs before) + +V0.904 (27.07.2007) +------------------- +Added: + - Download via DPM will flash the boot loader to serial flash + - Update via DPM (rcX Packet Download to serial flash) + - Enter boot loader mode from FW/ROM Loader (via bit in host handshake flags) + +V0.903 (04.06.2007) +------------------- +Bugfix: + - Download errors were overwritten by TLR_E_FAIL and did not reflect the real error reason + +V0.902 (internal Development version) +------------------- +Bugfix: + - Flashes with page size < 512 bytes did not work (e.g. DB500SYS) + +V0.901 (02.05.2007) +------------------- +Bugfix: + - Sequence error in up-/download if the filelength is multiple of transfer block size + +V0.900 (25.04.2007) +------------------- + - initial version \ No newline at end of file diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ApplicationCmd.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ApplicationCmd.h new file mode 100644 index 0000000..c321bad --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ApplicationCmd.h @@ -0,0 +1,1363 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_ApplicationCmd.h $: *//*! + + \file Hil_ApplicationCmd.h + + Hilscher Packet Command Codes Handled by the Application Task. + +**************************************************************************************/ +#ifndef HIL_APPLICATIONCMD_H_ +#define HIL_APPLICATIONCMD_H_ + +#include "Hil_Packet.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_APPLICATIONCMD) +#endif + +/***************************************************************************************/ +/* Common global stack commands */ + + +#define HIL_GET_DIAG_INFO_COMMON_STATE_REQ 0x00002F00 +#define HIL_GET_DIAG_INFO_COMMON_STATE_CNF 0x00002F01 + +#define HIL_GET_WATCHDOG_TIME_REQ 0x00002F02 +#define HIL_GET_WATCHDOG_TIME_CNF 0x00002F03 + +#define HIL_SET_WATCHDOG_TIME_REQ 0x00002F04 +#define HIL_SET_WATCHDOG_TIME_CNF 0x00002F05 + +#define HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ 0x00002F06 +#define HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF 0x00002F07 + +#define HIL_GET_SLAVE_HANDLE_REQ 0x00002F08 +#define HIL_GET_SLAVE_HANDLE_CNF 0x00002F09 + +#define HIL_GET_SLAVE_CONN_INFO_REQ 0x00002F0A +#define HIL_GET_SLAVE_CONN_INFO_CNF 0x00002F0B + +/*! \defgroup HIL_GET_DPM_IO_INFO_doc Get DPM I/O information + * \{ */ +#define HIL_GET_DPM_IO_INFO_REQ 0x00002F0C /*!< Get DPM I/O information request */ +#define HIL_GET_DPM_IO_INFO_CNF 0x00002F0D /*!< Get DPM I/O information confirmation */ +/*! \} */ + +/*! \defgroup HIL_REGISTER_APP_doc Register application + * \{ */ +#define HIL_REGISTER_APP_REQ 0x00002F10 /*!< Register application request */ +#define HIL_REGISTER_APP_CNF 0x00002F11 /*!< Register application confirmation */ +/*! \} */ + +/*! \defgroup HIL_UNREGISTER_APP_doc Unregister application + * \{ */ +#define HIL_UNREGISTER_APP_REQ 0x00002F12 /*!< Unregister application request */ +#define HIL_UNREGISTER_APP_CNF 0x00002F13 /*!< Unregister application confirmation */ +/*! \} */ + +#define HIL_DELETE_CONFIG_REQ 0x00002F14 +#define HIL_DELETE_CONFIG_CNF 0x00002F15 + +#define HIL_READ_IO_DATA_IMAGE_REQ 0x00002F20 +#define HIL_READ_IO_DATA_IMAGE_CNF 0x00002F21 + +#define HIL_BUSSCAN_REQ 0x00002f22 +#define HIL_BUSSCAN_CNF 0x00002f23 + +#define HIL_GET_DEVICE_INFO_REQ 0x00002f24 +#define HIL_GET_DEVICE_INFO_CNF 0x00002f25 + +/*! \defgroup HIL_START_STOP_COMM_doc Start or stop bus communication + * \{ */ +#define HIL_START_STOP_COMM_REQ 0x00002F30 /*!< Start or stop bus communication request */ +#define HIL_START_STOP_COMM_CNF 0x00002F31 /*!< Start or stop bus communication confirmation */ +/*! \} */ + +/*! \defgroup HIL_LOCK_UNLOCK_CONFIG_doc Lock or unlock configuration + * \{ */ +#define HIL_LOCK_UNLOCK_CONFIG_REQ 0x00002F32 /*!< Lock or unlock configuration request */ +#define HIL_LOCK_UNLOCK_CONFIG_CNF 0x00002F33 /*!< Lock or unlock configuration confirmation */ +/*! \} */ + +#define HIL_SET_HANDSHAKE_CONFIG_REQ 0x00002F34 +#define HIL_SET_HANDSHAKE_CONFIG_CNF 0x00002F35 + +/*! \defgroup HIL_CHANNEL_INIT_doc Channel initialization + * \{ */ +#define HIL_CHANNEL_INIT_REQ 0x00002F80 /*!< Channel initialization request */ +#define HIL_CHANNEL_INIT_CNF 0x00002F81 /*!< Channel initialization confirmation */ +/*! \} */ + +#define HIL_VERIFY_DATABASE_REQ 0x00002F82 +#define HIL_VERIFY_DATABASE_CNF 0x00002F83 + +#define HIL_ACTIVATE_DATABASE_REQ 0x00002F84 +#define HIL_ACTIVATE_DATABASE_CNF 0x00002F85 + +/*! \defgroup HIL_SET_FW_PARAMETER_doc Set firmware parameter + * \{ */ +#define HIL_SET_FW_PARAMETER_REQ 0x00002F86 /*!< Set firmware parameter request */ +#define HIL_SET_FW_PARAMETER_CNF 0x00002F87 /*!< Set firmware parameter confirmation */ +/*! \} */ + +/*! \defgroup HIL_GET_FW_PARAMETER_doc Get firmware parameter + * \{ */ +#define HIL_GET_FW_PARAMETER_REQ 0x00002F88 /*!< Get firmware parameter request */ +#define HIL_GET_FW_PARAMETER_CNF 0x00002F89 /*!< Get firmware parameter confirmation */ +/*! \} */ + +/*! \defgroup HIL_LINK_STATUS_CHANGE_doc Link status change + * \{ */ +#define HIL_LINK_STATUS_CHANGE_IND 0x00002F8A /*!< Link status change indication */ +#define HIL_LINK_STATUS_CHANGE_RES 0x00002F8B /*!< Link status change response */ +/*! \} */ + +/*! \defgroup HIL_SET_REMANENT_DATA_doc Set remanent data service + * \{ */ +#define HIL_SET_REMANENT_DATA_REQ 0x00002F8C /*!< Set remanent data service request */ +#define HIL_SET_REMANENT_DATA_CNF 0x00002F8D /*!< Set remanent data service confirmation */ +/*! \} */ + +/*! \defgroup HIL_STORE_REMANENT_DATA_doc Store remanent data + * \{ */ +#define HIL_STORE_REMANENT_DATA_IND 0x00002F8E /*!< Store remanent data indication */ +#define HIL_STORE_REMANENT_DATA_RES 0x00002F8F /*!< Store remanent data response */ +/*! \} */ + +/*! \defgroup HIL_SET_TRIGGER_TYPE_doc Set data exchange trigger mode + * \{ */ +#define HIL_SET_TRIGGER_TYPE_REQ 0x00002F90 /*!< Set data exchange trigger mode request */ +#define HIL_SET_TRIGGER_TYPE_CNF 0x00002F91 /*!< Set data exchange trigger mode confirmation */ +/*! \} */ + +/*! \defgroup HIL_GET_TRIGGER_TYPE_doc Get data exchange trigger mode + * \{ */ +#define HIL_GET_TRIGGER_TYPE_REQ 0x00002F92 /*!< Get data exchange trigger mode request */ +#define HIL_GET_TRIGGER_TYPE_CNF 0x00002F93 /*!< Get data exchange trigger mode confirmation */ +/*! \} */ + + +/*! \defgroup HIL_READ_LOG_BOOK_ENTRIES_doc Read out the logbook + * \{ */ +#define HIL_READ_LOG_BOOK_ENTRIES_REQ 0x00002F94 /*!< Read out the logbook request */ +#define HIL_READ_LOG_BOOK_ENTRIES_CNF 0x00002F95 /*!< Read out the logbook confirmation */ +/*! \} */ + +/*! \defgroup HIL_GET_LOG_BOOK_LAYOUT_doc Get logbook layout + * \{ */ +#define HIL_GET_LOG_BOOK_LAYOUT_REQ 0x00002F96 /*!< Get logbook layout request */ +#define HIL_GET_LOG_BOOK_LAYOUT_CNF 0x00002F97 /*!< Get logbook layout confirmation */ +/*! \} */ + +/*! \defgroup HIL_CLEAR_LOG_BOOK_doc Clear the logbook + * \{ */ +#define HIL_CLEAR_LOG_BOOK_REQ 0x00002F98 /*!< Clear the logbook request */ +#define HIL_CLEAR_LOG_BOOK_CNF 0x00002F99 /*!< Clear the logbook confirmation */ +/*! \} */ + +/*! \defgroup HIL_SET_LOG_BOOK_SEVERITY_LEVEL_doc Set severity level of logbook + * \{ */ +#define HIL_SET_LOG_BOOK_SEVERITY_LEVEL_REQ 0x00002F9A /*!< Set severity level of logbook request */ +#define HIL_SET_LOG_BOOK_SEVERITY_LEVEL_CNF 0x00002F9B /*!< Set severity level of logbook confirmation */ +/*! \} */ + + +/****************************************************************************** + * Packet Definition + ******************************************************************************/ + + + +/****************************************************************************** + * Packet: HIL_GET_DIAG_INFO_COMMON_STATE_REQ/HIL_GET_DIAG_INFO_COMMON_STATE_CNF + * + * This packet allows to read out the common state block of the + * channel over the mailbox. + */ + +/***** request packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_GET_DIAG_INFO_COMMON_STATE_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_COMMON_STATE_CNF_DATA_Ttag +{ + uint8_t abCommonState[64]; +} HIL_GET_DIAG_INFO_COMMON_STATE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_COMMON_STATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_DIAG_INFO_COMMON_STATE_CNF_DATA_T tData; +} HIL_GET_DIAG_INFO_COMMON_STATE_CNF_T; + +/****************************************************************************** + * Packet: HIL_GET_WATCHDOG_TIME_REQ/HIL_GET_WATCHDOG_TIME_CNF + * + * This packet allows retrieving the actual watchdog time + */ + +/***** request packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_GET_WATCHDOG_TIME_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_WATCHDOG_TIME_CNF_DATA_Ttag +{ + /** watchdog time in ms */ + uint32_t ulWdgTime; +} HIL_GET_WATCHDOG_TIME_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_WATCHDOG_TIME_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_WATCHDOG_TIME_CNF_DATA_T tData; +} HIL_GET_WATCHDOG_TIME_CNF_T; + +/****************************************************************************** + * Packet: HIL_SET_WATCHDOG_TIME_REQ/HIL_SET_WATCHDOG_TIME_CNF + * + * This packet allows setting the actual watchdog time + */ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_WATCHDOG_TIME_REQ_DATA_Ttag +{ + /** watchdog time in ms */ + uint32_t ulWdgTime; +} HIL_SET_WATCHDOG_TIME_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_WATCHDOG_TIME_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_SET_WATCHDOG_TIME_REQ_DATA_T tData; +} HIL_SET_WATCHDOG_TIME_REQ_T; + +/***** confirmation packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_SET_WATCHDOG_TIME_CNF_T; + +/****************************************************************************** + * Packet: HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ/HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF + * + * This packet allows to read out the extended state block of the + * channel over the mailbox. + */ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ_DATA_Ttag +{ + uint32_t ulOffset; + uint32_t ulDataLen; +} HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ_DATA_T tData; +} HIL_GET_DIAG_INFO_EXTENDED_STATE_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF_DATA_Ttag +{ + uint32_t ulOffset; + uint32_t ulDataLen; + uint8_t abExtendedState[432]; +} HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF_DATA_T tData; +} HIL_GET_DIAG_INFO_EXTENDED_STATE_CNF_T; + +/****************************************************************************** + * Packet: HIL_PACKET_GET_SLAVE_HANDLE_REQ/HIL_PACKET_GET_SLAVE_HANDLE_CNF + * + * This packet allows retrieving diagnostic information of the + * connected devices + */ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_HANDLE_REQ_DATA_Tag +{ + uint32_t ulParam; +} HIL_PACKET_GET_SLAVE_HANDLE_REQ_DATA_T; + +#define HIL_LIST_CONF_SLAVES 0x00000001 +#define HIL_LIST_ACTV_SLAVES 0x00000002 +#define HIL_LIST_FAULTED_SLAVES 0x00000003 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_HANDLE_REQ_Tag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PACKET_GET_SLAVE_HANDLE_REQ_DATA_T tData; +} HIL_PACKET_GET_SLAVE_HANDLE_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_HANDLE_CNF_DATA_Tag +{ + uint32_t ulParam; + uint32_t aulHandle[1]; +} HIL_PACKET_GET_SLAVE_HANDLE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_HANDLE_CNF_Tag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PACKET_GET_SLAVE_HANDLE_CNF_DATA_T tData; +} HIL_PACKET_GET_SLAVE_HANDLE_CNF_T; + +/****************************************************************************** + * Packet: HIL_PACKET_GET_SLAVE_CONN_INFO_REQ/HIL_PACKET_GET_SLAVE_CONN_INFO_CNF + * + * This packet allows retrieving detail information of a slave + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_Tag +{ + uint32_t ulHandle; +} HIL_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_CONN_INFO_REQ_Tag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PACKET_GET_SLAVE_CONN_INFO_REQ_DATA_T tData; +} HIL_PACKET_GET_SLAVE_CONN_INFO_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_Tag +{ + uint32_t ulHandle; + uint32_t ulStructID; + /* + Feldbus specific structure + */ +} HIL_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_GET_SLAVE_CONN_INFO_CNF_Tag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PACKET_GET_SLAVE_CONN_INFO_CNF_DATA_T tData; +} HIL_PACKET_GET_SLAVE_CONN_INFO_CNF_T; + + + + +/******************************************************************************/ +/*! \addtogroup HIL_GET_DPM_IO_INFO_doc + * Read the configured size of the I/O process data image. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/*! Get DPM IO information request packet. */ +typedef HIL_EMPTY_PACKET_T HIL_GET_DPM_IO_INFO_REQ_T; + + +/*! DPM IO block information. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_IO_BLOCK_INFO_Ttag +{ + /*! Index of sub block. + * The value identifies the index of the sub block. This field is only informative + * and shall not be used by an application. + * The values shall be set (for default DPM layouts) to + * - 6 for standard input image + * - and to 5 for standard output */ + uint32_t ulSubblockIndex; + + /*! Type of sub block. + * The type definitions (HIL_BLOCK_*) can be found in Hil_DualPortMemory.h. */ + uint32_t ulType; + + /*! Flags of the sub block. + * The flag definitions (HIL_DIRECTION_* and HIL_TRANSMISSION_TYPE_*) + * can be found in Hil_DualPortMemory.h. */ + uint16_t usFlags; + + /*! Reserved */ + uint16_t usReserved; + + /*! Start offset of the IO data */ + uint32_t ulOffset; + + /*! Length of used IO data */ + uint32_t ulLength; +} HIL_DPM_IO_BLOCK_INFO_T; + +/*! Get DPM IO information confirmation data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DPM_IO_INFO_CNF_DATA_Ttag +{ + uint32_t ulNumIOBlockInfo; /*!< Number of IO Block Info */ + HIL_DPM_IO_BLOCK_INFO_T atIOBlockInfo[2]; /*!< Array of I/O Block information */ +} HIL_GET_DPM_IO_INFO_CNF_DATA_T; + +/*! Get DPM IO information confirmation packet. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DPM_IO_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GET_DPM_IO_INFO_CNF_DATA_T tData; /*!< Packet data. */ +} HIL_GET_DPM_IO_INFO_CNF_T; + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_REGISTER_APP_doc + * Registering the application at the protocol (application task). + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/*! Register application request packet. */ +typedef HIL_EMPTY_PACKET_T HIL_REGISTER_APP_REQ_T; + + +/*! Register application confirmation packet. */ +typedef HIL_EMPTY_PACKET_T HIL_REGISTER_APP_CNF_T; + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_UNREGISTER_APP_doc + * Unregister the application at the protocol (application task). + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/*! Unregister application request packet. */ +typedef HIL_EMPTY_PACKET_T HIL_UNREGISTER_APP_REQ_T; + + +/*! Unregister application confirmation packet. */ +typedef HIL_EMPTY_PACKET_T HIL_UNREGISTER_APP_CNF_T; + +/*! \} ************************************************************************/ + + + + +/****************************************************************************** + * Packet: HIL_DELETE_CONFIG_REQ/HIL_DELETE_CONFIG_CNF + * + * This packet allows to delete the actual configuration + */ + +/***** request packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_DELETE_CONFIG_REQ_T; + +/***** confirmation packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_DELETE_CONFIG_CNF_T; + +/****************************************************************************** + * HIL_BUSSCAN_REQ + ******************************************************************************/ +#define HIL_BUSSCAN_CMD_START 0x01 +#define HIL_BUSSCAN_CMD_STATUS 0x02 +#define HIL_BUSSCAN_CMD_ABORT 0x03 + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BUSSCAN_REQ_DATA_Ttag +{ + uint32_t ulAction; +} HIL_BUSSCAN_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BUSSCAN_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_BUSSCAN_REQ_DATA_T tData; +} HIL_BUSSCAN_REQ_T; + +#define HIL_BUSSCAN_REQ_SIZE (sizeof(HIL_BUSSCAN_REQ_DATA_T)) + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BUSSCAN_CNF_DATA_Ttag +{ + uint32_t ulMaxProgress; + uint32_t ulActProgress; + uint8_t abDeviceList[4]; +} HIL_BUSSCAN_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BUSSCAN_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_BUSSCAN_CNF_DATA_T tData; +} HIL_BUSSCAN_CNF_T; + +#define HIL_BUSSCAN_CNF_SIZE (sizeof(HIL_BUSSCAN_CNF_DATA_T) - 4) + + +/****************************************************************************** + * HIL_GET_DEVICE_INFO_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DEVICE_INFO_REQ_DATA_Ttag +{ + uint32_t ulDeviceIdx; +} HIL_GET_DEVICE_INFO_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DEVICE_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_DEVICE_INFO_REQ_DATA_T tData; +} HIL_GET_DEVICE_INFO_REQ_T; + +#define HIL_GET_DEVICE_INFO_REQ_SIZE (sizeof(HIL_GET_DEVICE_INFO_REQ_DATA_T)) + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_DEVICE_INFO_CNF_DATA_Ttag +{ + uint32_t ulDeviceIdx; + uint32_t ulStructId; + /* uint8_t tStruct; Fieldbus specific structure */ +} HIL_GET_DEVICE_INFO_CNF_DATA_T; + +typedef struct HIL_GET_DEVICE_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_DEVICE_INFO_CNF_DATA_T tData; +} HIL_GET_DEVICE_INFO_CNF_T; + +#define HIL_GET_DEVICE_INFO_CNF_SIZE (sizeof(HIL_GET_DEVICE_INFO_CNF_DATA_T)) + + + +/******************************************************************************/ +/*! \addtogroup HIL_START_STOP_COMM_doc + * Start or stop bus communication. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +#define HIL_START_STOP_COMM_PARAM_START 0x00000001 /*!< Start the bus communication. */ +#define HIL_START_STOP_COMM_PARAM_STOP 0x00000002 /*!< Stop the bus communication. */ + + +/*! Start or stop bus communication request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_START_STOP_COMM_REQ_DATA_Ttag +{ + /*! Parameter (HIL_START_STOP_COMM_PARAM_*) to control the bus communication state. */ + uint32_t ulParam; +} HIL_START_STOP_COMM_REQ_DATA_T; + + +/*! Start or stop bus communication request packet. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_START_STOP_COMM_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_START_STOP_COMM_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_START_STOP_COMM_REQ_T; + + +/*! Start or stop bus communication confirmation packet. */ +typedef HIL_EMPTY_PACKET_T HIL_START_STOP_COMM_CNF_T; + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_LOCK_UNLOCK_CONFIG_doc + * Lock or unlock the configuration settings. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +#define HIL_LOCK_UNLOCK_CONFIG_PARAM_LOCK 0x00000001 +#define HIL_LOCK_UNLOCK_CONFIG_PARAM_UNLOCK 0x00000002 + + +/*! Lock or unlock the configuration settings request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LOCK_UNLOCK_CONFIG_REQ_DATA_Ttag +{ + /*! Parameter (HIL_LOCK_UNLOCK_CONFIG_PARAM_*) to control the configuration lock state. */ + uint32_t ulParam; +} HIL_LOCK_UNLOCK_CONFIG_REQ_DATA_T; + +/*! Lock or unlock the configuration settings request packet. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LOCK_UNLOCK_CONFIG_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_LOCK_UNLOCK_CONFIG_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_LOCK_UNLOCK_CONFIG_REQ_T; + + +/*! Lock or unlock the configuration settings confirmation packet. */ +typedef HIL_EMPTY_PACKET_T HIL_LOCK_UNLOCK_CONFIG_CNF_T; + +/*! \} ************************************************************************/ + + + + +/****************************************************************************** + * HIL_SET_HANDSHAKE_CONFIG_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_HANDSHAKE_CONFIG_REQ_DATA_Ttag +{ + /*! Input process data handshake mode */ + uint8_t bPDInHskMode; + /*! Input process data trigger source. Currently unused, set to zero. */ + uint8_t bPDInSource; + /*! Threshold for input process data handshake handling errors */ + uint16_t usPDInErrorTh; + + /*! Output process data handshake mode */ + uint8_t bPDOutHskMode; + /*! Output process data trigger source. Currently unused, set to zero. */ + uint8_t bPDOutSource; + /*! Threshold for output process data handshake handling errors */ + uint16_t usPDOutErrorTh; + + /*! Synchronization handshake mode */ + uint8_t bSyncHskMode; + /*! Synchronization source */ + uint8_t bSyncSource; + /*! Threshold for synchronization handshake handling errors */ + uint16_t usSyncErrorTh; + + /*! Reserved for future use. Set to zero. */ + uint32_t aulReserved[2]; +} HIL_SET_HANDSHAKE_CONFIG_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_HANDSHAKE_CONFIG_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_SET_HANDSHAKE_CONFIG_REQ_DATA_T tData; +} HIL_SET_HANDSHAKE_CONFIG_REQ_T; + +#define HIL_SET_HANDSHAKE_CONFIG_REQ_SIZE (sizeof(HIL_SET_HANDSHAKE_CONFIG_REQ_DATA_T)) + +/***** confirmation packet *****/ +typedef HIL_EMPTY_PACKET_T HIL_SET_HANDSHAKE_CONFIG_CNF_T; + +#define HIL_SET_HANDSHAKE_CONFIG_CNF_SIZE (0) + + + + +/******************************************************************************/ +/*! \addtogroup HIL_CHANNEL_INIT_doc + * Initialization or re-initialization of the channel. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/*! Initialization of channel request packet. */ +typedef HIL_EMPTY_PACKET_T HIL_CHANNEL_INIT_REQ_T; + + +/*! Initialization of channel confirmation packet. */ +typedef HIL_EMPTY_PACKET_T HIL_CHANNEL_INIT_CNF_T; + +/*! \} ************************************************************************/ + + + + +/****************************************************************************** + * Packet: HIL_VERIFY_DATABASE_REQ /HIL_VERIFY_DATABASE_CNF + * + * This packet adds new slaves to the database + */ + /***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VERIFY_DATABASE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ +} HIL_VERIFY_DATABASE_REQ_T; + +#define HIL_VERIFY_DATABASE_REQ_SIZE 0 + + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VERIFY_SLAVE_DATABASE_LIST_Ttag +{ + uint32_t ulLen; + uint8_t abData[16]; +} HIL_VERIFY_SLAVE_DATABASE_LIST_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VERIFY_MASTER_DATABASE_Ttag +{ + uint32_t ulMasterSettings; /*!< field bus independent changes */ + uint32_t ulMasterStatus; /*!< field bus specific status */ + uint32_t ulReserved[2]; +} HIL_VERIFY_MASTER_DATABASE_T; + + +#define HIL_VERIFY_SLAVE_DATABASE_LIST_SIZE sizeof(HIL_VERIFY_SLAVE_DATABASE_LIST_T) +#define HIL_CIR_MST_SET_STARTUP 0x00000001 +#define HIL_CIR_MST_SET_WATCHDOG 0x00000002 +#define HIL_CIR_MST_SET_STATUSOFFSET 0x00000004 +#define HIL_CIR_MST_SET_BUSPARAMETER 0x00000008 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VERIFY_DATABASE_CNF_DATA_Ttag +{ + HIL_VERIFY_SLAVE_DATABASE_LIST_T tNewSlaves; + HIL_VERIFY_SLAVE_DATABASE_LIST_T tDeactivatedSlaves; + HIL_VERIFY_SLAVE_DATABASE_LIST_T tChangedSlaves; + HIL_VERIFY_SLAVE_DATABASE_LIST_T tUnchangedSlaves; + HIL_VERIFY_SLAVE_DATABASE_LIST_T tImpossibleSlaveChanges; + HIL_VERIFY_MASTER_DATABASE_T tMasterChanges; +} HIL_VERIFY_DATABASE_CNF_DATA_T; + +#define HIL_VERIFY_DATABASE_CNF_DATA_SIZE sizeof(HIL_VERIFY_DATABASE_CNF_DATA_T) + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VERIFY_DATABASE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_VERIFY_DATABASE_CNF_DATA_T tData; /*!< packet data */ +} HIL_VERIFY_DATABASE_CNF_T; + +#define HIL_VERFIY_DATABASE_CNF_PACKET_SIZE sizeof(HIL_VERIFY_DATABASE_CNF_T) + + + +/****************************************************************************** + * Packet: HIL_CHANNEL_ACTIVATE_REQ/HIL_CHANNEL_NEW_DATABASE_CNF + * + * This packet activates the new configured slaves + */ + /***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ACTIVATE_DATABASE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ +} HIL_ACTIVATE_DATABASE_REQ_T; + + + + /***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ACTIVATE_DATABASE_CNF_DATA_Ttag +{ + uint8_t abSlvSt[16]; /*!< State of the slaves after configuration */ +} HIL_ACTIVATE_DATABASE_CNF_DATA_T; + +#define HIL_ACTIVATE_DATABASE_CNF_DATA_SIZE sizeof(HIL_ACTIVATE_DATABASE_CNF_DATA_T) + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ACTIVATE_DATABASE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_ACTIVATE_DATABASE_CNF_DATA_T tData; +} HIL_ACTIVATE_DATABASE_CNF_T; + +#define HIL_ACTIVATE_DATABASE_CNF_PACKET_SIZE sizeof(HIL_ACTIVATE_DATABASE_CNF_T) + +/******************************************************************************/ +/*! \addtogroup HIL_SET_FW_PARAMETER_doc + * + * This service allows a host application to modify certain protocol stack + * parameters from the current configuration. This requires that Controlled + * Start of Communication is set in the configuration database file and the + * protocol stack is waiting for the BUS ON / APPLICATION READY command. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/***** Parameter IDs defines *****/ +#define HIL_FW_PID_STATION_ADDRESS 0x30000001 /*!< Station address of device */ +#define HIL_FW_PID_BAUDRATE 0x30000002 /*!< Baudrate of device */ +#define HIL_FW_PID_PN_NAME_OF_STATION 0x30015001 /*!< PROFINET: Name of Station String */ +#define HIL_FW_PID_ECS_DEVICE_IDENTIFICATION 0x30009001 /*!< EtherCAT: Value for Explicit Device Identification */ +#define HIL_FW_PID_ECS_SCND_STATION_ADDRESS 0x30009002 /*!< EtherCAT: Second Station Address */ + + +/*! Set firmware parameter request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_FW_PARAMETER_REQ_DATA_Ttag +{ + /*! Parameter ID which shall be modified, see HIL_FW_PID_* */ + uint32_t ulParameterID; + /*! Length of following abParameter member in bytes */ + uint32_t ulParameterLen; + /*! Parameter data, structure depend on ulParameterID. + * Please refer the related API Manual of Protocol stack for more information. */ + uint8_t abParameter[__HIL_VARIABLE_LENGTH_ARRAY]; +} HIL_SET_FW_PARAMETER_REQ_DATA_T; + +/*! Set firmware parameter request. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_FW_PARAMETER_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_SET_FW_PARAMETER_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_SET_FW_PARAMETER_REQ_T; + +#define HIL_SET_FW_PARAMETER_REQ_SIZE(parameterLen) (2 * sizeof(uint32_t) + (parameterLen) * sizeof(uint8_t)) + + +/*! Set firmware parameter confirmation. */ +typedef HIL_EMPTY_PACKET_T HIL_SET_FW_PARAMETER_CNF_T; + +#define HIL_SET_FW_PARAMETER_CNF_SIZE (0) + +/*! \} ************************************************************************/ + +/******************************************************************************/ +/*! \addtogroup HIL_GET_FW_PARAMETER_doc + * + * \note This service is usually not supported by any application layer. + * + * \{ */ + +/*! Get firmware parameter request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_FW_PARAMETER_REQ_DATA_Ttag +{ + /*! Parameter ID which shall be read, see HIL_FW_PID_* */ + uint32_t ulParameterID; +} HIL_GET_FW_PARAMETER_REQ_DATA_T; + +/*! Get firmware parameter request. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_FW_PARAMETER_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GET_FW_PARAMETER_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_GET_FW_PARAMETER_REQ_T; + +#define HIL_GET_FW_PARAMETER_REQ_SIZE (sizeof(HIL_GET_FW_PARAMETER_REQ_DATA_T)) + + + +/*! Get firmware parameter confirmation. */ +typedef HIL_SET_FW_PARAMETER_REQ_T HIL_GET_FW_PARAMETER_CNF_T; + +#define HIL_GET_FW_PARAMETER_CNF_SIZE HIL_SET_FW_PARAMETER_REQ_SIZE + +/*! \} ************************************************************************/ + + +/******************************************************************************/ +/*! \addtogroup HIL_LINK_STATUS_CHANGE_doc + * + * The link status change indication is generated by the device to inform the + * host application about a change of PHY link. + * The indication is only send when the host has registered his application + * by sending "HIL_REGISTER_APP_REQ" to the channel. After registration the + * actual status is will be notified with this indication. + * + * There is only one indication at any time send to the host application. + * This indication gives no guarantee that all changes of the PHYs can be + * observed with this indication (e.g. fast link changes and slow host + * application). However the host application gets always the last + * (actual) status reported. + * + * \note For more information please refer netX Dual-Port Memory + * packet-based services manual (DOC161001APIxxxx). + * + * \{ */ + +/*! Link status change indication data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LINK_STATUS_Ttag +{ + uint32_t ulPort; /*!< Port ID, starting with 0. + This is also the index of atLinkData field in the + HIL_LINK_STATUS_CHANGE_IND_DATA_T structure. */ + uint32_t fIsFullDuplex; /*!< If a full duplex link is available on this port. */ + uint32_t fIsLinkUp; /*!< If a link is available on this port. */ + uint32_t ulSpeed; /*!< Speed of the link in MBit. */ + +} HIL_LINK_STATUS_T; + +/*! Link status change indication data array. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LINK_STATUS_CHANGE_IND_DATA_Ttag +{ + /** Link data for PHYs on netX. + * \note For netX51/52/100/500/90 the array always contain 2 entries, regardless of + * actual number of used PHYs (e.g. single port devices). + * Other chips may use different amount of entries. */ + HIL_LINK_STATUS_T atLinkData[2]; +} HIL_LINK_STATUS_CHANGE_IND_DATA_T; + +/*! Link status change indication. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LINK_STATUS_CHANGE_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_LINK_STATUS_CHANGE_IND_DATA_T tData; /*!< Packet data. */ +} HIL_LINK_STATUS_CHANGE_IND_T; + +/*! Link status change response. */ +typedef HIL_EMPTY_PACKET_T HIL_LINK_STATUS_CHANGE_RES_T; + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_SET_REMANENT_DATA_doc + * + * This service shall be used by the application once after the system is started + * to hand over (set) the last stored remanent data to the component. + * In case the application has no currently stored remanent data for the component, + * the service shall be initiated with the correct Component ID but a remanent data + * size of zero. Otherwise, it is not ensured that the component can start properly. + * In case of a protocol stack the network communication will not start. + * + * \note The application shall send the last stored remanent data without matching the size + * that the component has reported. + * \note The service is only usable in case the component is in bus off state. + * \note In case the component detects an invalid Component ID, the service + * shall be confirmed with the error code ERR_HIL_INVALID_COMPONENT_ID. + * \note In case the component detects an invalid remanent data length, + * the service shall be confirmed with the error code ERR_HIL_INVALID_DATA_LENGTH. + * \note In case the component detects invalid remanent data (inconsistent, wrong data), + * the service shall be confirmed with the error code ERR_HIL_INCONSISTENT_DATA_SET. + * \note In case the component detected an invalid HIL_SET_REMANENT_DATA_REQ service the + * component shall act as if it has received HIL_SET_REMANENT_DATA_REQ with + * remanent data size of zero. Additionally, a permanent logbook entry shall be generated. + * + * \{ */ + +/*! Set remanent data request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_REMANENT_DATA_REQ_DATA_Ttag +{ + /*! Unique component identifier HIL_COMPONENT_ID_*. */ + uint32_t ulComponentId; + /*! Remanent data buffer. */ + uint8_t abData[__HIL_VARIABLE_LENGTH_ARRAY]; +} HIL_SET_REMANENT_DATA_REQ_DATA_T; + +/*! Set remanent data request. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_REMANENT_DATA_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_SET_REMANENT_DATA_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_SET_REMANENT_DATA_REQ_T; + +#define HIL_SET_REMANENT_DATA_REQ_SIZE(remanentDataBytes) (sizeof(uint32_t) + (remanentDataBytes) * sizeof(uint8_t)) + + + +/*! Set remanent data confirmation data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_REMANENT_DATA_CNF_DATA_Ttag +{ + /*! Unique component identifier HIL_COMPONENT_ID_*. */ + uint32_t ulComponentId; +} HIL_SET_REMANENT_DATA_CNF_DATA_T; + +/*! Set remanent data confirmation. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_REMANENT_DATA_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_SET_REMANENT_DATA_CNF_DATA_T tData; /*!< Packet data. */ +} HIL_SET_REMANENT_DATA_CNF_T; + +#define HIL_SET_REMANENT_DATA_CNF_SIZE (sizeof(HIL_SET_REMANENT_DATA_CNF_DATA_T)) + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_STORE_REMANENT_DATA_doc + * + * This component generates this indication each time when the remanent data + * needs to be stored. + * + * The remanent indication always contains the complete data block which must be + * stored remanently. The application shall compare the remanent data with the last + * stored remanent data in order to avoid writing the same data again and again. + * It is up to the application to consider the wear of the storage device. + * + * \note The application shall be able to store remanent data even if the reported + * remanent data size changes (e.g. due to update of component). + * \note The response should be generated synchronously to remanent data storage, + * i.e. after all data has been written to the storage device. + * \note The response message must always contain at least the Component ID, + * even if the service is replied to with an error code. + * \note Depending on the component a response to the network may + * be generated even if the application has not answered yet. + * + * \{ */ + +/*! Store remanent indication data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_STORE_REMANENT_DATA_IND_DATA_Ttag +{ + /*! Unique component identifier HIL_COMPONENT_ID_*. */ + uint32_t ulComponentId; + /*! Remanent data buffer. */ + uint8_t abData[__HIL_VARIABLE_LENGTH_ARRAY]; +} HIL_STORE_REMANENT_DATA_IND_DATA_T; + +/*! Store remanent indication. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_STORE_REMANENT_DATA_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_STORE_REMANENT_DATA_IND_DATA_T tData; /*!< Packet data. */ +} HIL_STORE_REMANENT_DATA_IND_T; + +#define HIL_STORE_REMANENT_DATA_IND_SIZE(remanentDataBytes) (sizeof(uint32_t) + (remanentDataBytes) * sizeof(uint8_t)) + + +/*! Store remanent response data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_STORE_REMANENT_DATA_RES_DATA_Ttag +{ + /*! Unique component identifier HIL_COMPONENT_ID_*. */ + uint32_t ulComponentId; +} HIL_STORE_REMANENT_DATA_RES_DATA_T; + +/*! Store remanent response. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_STORE_REMANENT_DATA_RES_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_STORE_REMANENT_DATA_RES_DATA_T tData; /*!< Packet data. */ +} HIL_STORE_REMANENT_DATA_RES_T; + +#define HIL_STORE_REMANENT_DATA_RES_SIZE (sizeof(HIL_STORE_REMANENT_DATA_RES_DATA_T)) + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_SET_TRIGGER_TYPE_doc + * + * This service offers the application to configure the data exchange trigger mode. + * The trigger mode defines on which network-specific event the synchronization or + * provider/consumer data update will be finished by the protocol stack. + * + * The synchronization or consumer data update is finished by the protocol stack: + * - immediately in free-run mode HIL_TRIGGER_TYPE_*_NONE + * - in case a new network connection is opened and new data is received + * HIL_TRIGGER_TYPE_*_RX_DATA_RECEIVED (bus cycle synchronous) + * - in case a defined time point is reached HIL_TRIGGER_TYPE_*_TIMED_ACTIVATION + * (time isochronous). The time point is protocol stack specific. + * + * The synchronization or provider data update is finished by the protocol stack: + * - immediately in free-run mode HIL_TRIGGER_TYPE_*_NONE + * - in case new data on the bus is required. E.g. the protocol stack will delay + * the update process until a new network connection is established + * HIL_TRIGGER_TYPE_*_READY_FOR_TX_DATA (bus cycle synchronous) + * - in case a defined time point is reached HIL_TRIGGER_TYPE_*_TIMED_LATCH + * (time isochronous). The time point is protocol stack specific. + * + * The configuration of the consumer and provider data update trigger mode are + * independent from each other and can be used individually or combined. + * However, the synchronization trigger mode can only be configured unequal to + * HIL_TRIGGER_TYPE_SYNC_NONE in case both the consumer and provider trigger modes + * are configured in free-run mode (HIL_TRIGGER_TYPE_*_NONE). In case the trigger mode + * is not supported by the protocol stack, an error code in the response will be set + * to signal an invalid configuration. + * + * \note In case the protocol stack is configured with a trigger mode unequal to free-run, + * it is protocol stack specific at which point of time the synchronization or + * provider/consumer data update is finished. E.g. the protocol stack will wait for + * a network connection to be established. + * \note The protocol stack accepts the service in bus off mode. It is protocol stack specific + * if the service is accepted in bus on mode. + * \note In case the application does not use the service, the protocol stack will start in + * default trigger mode. The default trigger mode is free-run (HIL_TRIGGER_TYPE_*_NONE). + * \note On channel initialization the protocol stack keeps the previously configured + * trigger mode until active change or device reset. + * \note The exchange trigger mode is restored to default on delete config. + * \note The protocol stack which is configured for defined data exchange mode monitors if + * the host application handles the handshake as expected. Every time an error symptom + * occurs the respective handshake error counter is incremented. + * The error counter counts up to the maximal possible value and saturates. + * \note In case the trigger mode is configured in default mode, the handshake error counters + * are set to 0 and do not count. + * \note The protocol stack resets the handshake error counter to initial value (zero) after + * each channel init. + * + * \{ */ + +#define HIL_TRIGGER_TYPE_PDIN_NONE 0x0010 /*!< No input data synchronization (free-run). */ +#define HIL_TRIGGER_TYPE_PDIN_RX_DATA_RECEIVED 0x0011 /*!< Input data will be updated when new data was received. (bus cycle synchronous). */ +#define HIL_TRIGGER_TYPE_PDIN_TIMED_ACTIVATION 0x0012 /*!< Input data will be updated on time event (time isochronous). */ + +#define HIL_TRIGGER_TYPE_PDOUT_NONE 0x0010 /*!< No output data synchronization (free-run). */ +#define HIL_TRIGGER_TYPE_PDOUT_READY_FOR_TX_DATA 0x0011 /*!< Output data will be send in next bus cycle. (bus cycle synchronous). */ +#define HIL_TRIGGER_TYPE_PDOUT_TIMED_LATCH 0x0012 /*!< Output data will be delayed until next time event (time isochronous). */ + +#define HIL_TRIGGER_TYPE_SYNC_NONE 0x0010 /*!< No sync signal generation */ +#define HIL_TRIGGER_TYPE_SYNC_RX_DATA_RECEIVED 0x0011 /*!< Generate Sync event when new data was received. */ +#define HIL_TRIGGER_TYPE_SYNC_READY_FOR_TX_DATA 0x0012 /*!< Generate Sync event when new data will be send. */ +#define HIL_TRIGGER_TYPE_SYNC_TIMED_LATCH 0x0013 /*!< Generate Sync event when data shall be latched. */ +#define HIL_TRIGGER_TYPE_SYNC_TIMED_ACTIVATION 0x0014 /*!< Generate Sync event when data shall be applied. */ + + +/*! Set data exchange trigger data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_TRIGGER_TYPE_REQ_DATA_Ttag +{ + /*! Consumer data trigger type HIL_TRIGGER_TYPE_PDIN_*. */ + uint16_t usPdInHskTriggerType; + /*! Provider data trigger type HIL_TRIGGER_TYPE_PDOUT_*. */ + uint16_t usPdOutHskTriggerType; + /*! Synchronization trigger type HIL_TRIGGER_TYPE_SYNC_*. */ + uint16_t usSyncHskTriggerType; +} HIL_SET_TRIGGER_TYPE_REQ_DATA_T; + +/*! Set data exchange trigger request. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_TRIGGER_TYPE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_SET_TRIGGER_TYPE_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_SET_TRIGGER_TYPE_REQ_T; + +#define HIL_SET_TRIGGER_TYPE_REQ_SIZE (sizeof(HIL_SET_TRIGGER_TYPE_REQ_DATA_T)) + + +/*! Set data exchange trigger confirmation structure. */ +typedef HIL_EMPTY_PACKET_T HIL_SET_TRIGGER_TYPE_CNF_T; + +#define HIL_SET_TRIGGER_TYPE_CNF_SIZE (0) + +/*! \} ************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_GET_TRIGGER_TYPE_doc + * + * This service is used by the application to read the current + * handshake trigger type configured in the protocol stack. + * + * \{ */ + +/*! Get data exchange trigger request. */ +typedef HIL_EMPTY_PACKET_T HIL_GET_TRIGGER_TYPE_REQ_T; + + +#define HIL_GET_TRIGGER_TYPE_REQ_SIZE (0) + + +/*! Get data exchange trigger data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_TRIGGER_TYPE_CNF_DATA_Ttag +{ + /*! Input process data trigger type. + * Value is a type of HIL_TRIGGER_TYPE_PDIN_*. */ + uint16_t usPdInHskTriggerType; + /*! Output process data trigger type. + * Value is a type of HIL_TRIGGER_TYPE_PDOUT_*. */ + uint16_t usPdOutHskTriggerType; + /*! Synchronization trigger type. + * Value is a type of HIL_TRIGGER_TYPE_SYNC_*. */ + uint16_t usSyncHskTriggerType; + /*! Minimal provide/consumer data update interval in free-run mode. + * The application shall ensure in free-run mode to not request faster + * provider/consumer data update than this interval. + * Unit of microseconds, default value is 1000us, value 0-31 is not valid. */ + uint16_t usMinFreeRunUpdateInterval; +} HIL_GET_TRIGGER_TYPE_CNF_DATA_T; + +/*! Get data exchange trigger confirmation structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_TRIGGER_TYPE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GET_TRIGGER_TYPE_CNF_DATA_T tData; /*!< Packet data. */ +} HIL_GET_TRIGGER_TYPE_CNF_T; + +#define HIL_GET_TRIGGER_TYPE_CNF_SIZE (sizeof(HIL_GET_TRIGGER_TYPE_CNF_DATA_T)) + +/*! \} ************************************************************************/ + + + + + +/******************************************************************************/ +/*! \addtogroup HIL_READ_LOG_BOOK_ENTRIES_doc + * + * This service is used by the application to read out the log book + * of an communication channel. + * + * \{ */ + +/*! Get log book entries request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + /*! How many of the recent made entries shall be skipped */ + uint32_t ulSkipRecentEntries; + /*! Number of entries to read. + * \note Big numbers may lead to fragmentation of the packet. For normal + * communication channel mailbox 64 entries can be read without fragmentation. */ + uint32_t ulNumberOfEntriesToRead; +} HIL_READ_LOG_BOOK_ENTRIES_REQ_DATA_T; + +/*! Get log book entries request. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_READ_LOG_BOOK_ENTRIES_REQ_DATA_T tData; /*!< Packet data. */ +} HIL_READ_LOG_BOOK_ENTRIES_REQ_T; + +#define HIL_READ_LOG_BOOK_ENTRIES_REQ_SIZE (sizeof(HIL_READ_LOG_BOOK_ENTRIES_REQ_DATA_T)) + + +/*! Get log book entry data. + * \note This structure is compatible with HIL_LOGBOOK_ENTRY_T structure, which + * is internally used in the firmware. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + /*! Time stamp of the OS in Millisecond when the entry was made */ + uint32_t ulSystemTicks; + + /*! Severity level of this entry. Levels are defined in the Hil_Logbook.h */ + uint8_t bLevel; + + /*! This field is reserved for later use, will be set to 0. */ + uint8_t bReserved; + + /*! The type is used to determine how the following abData filed must be + * interpreted. Types and related structures are defined in the Hil_Logbook.h */ + uint16_t usType; + + /*! Data length and format depends on usType */ + uint8_t abData[16]; + +} HIL_READ_LOG_BOOK_ENTRY_DATA_T; + +/*! Get log book entries confirmation data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + /*! Requested amount of skipped entries */ + uint32_t ulSkipRecentEntries; + + /*! Successfully read entries. Valid in atEntries[] array */ + uint32_t ulNumberOfReadEntries; + + /*! Array of read entries, size is defined by ulNumberOfReadEntries */ + HIL_READ_LOG_BOOK_ENTRY_DATA_T atEntries[__HIL_VARIABLE_LENGTH_ARRAY]; + +} HIL_READ_LOG_BOOK_ENTRIES_CNF_DATA_T; + +/*! Get log book entries confirmation. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_READ_LOG_BOOK_ENTRIES_CNF_DATA_T tData; /*!< Packet data. */ +} HIL_READ_LOG_BOOK_ENTRIES_CNF_T; + +#define HIL_READ_LOG_BOOK_ENTRIES_CNF_SIZE(numberOfEntries) (2 * sizeof(uint32_t) + (numberOfEntries) * sizeof(HIL_LOGBOOK_ENTRY_T)) + +/*! \} ************************************************************************/ + + + + + +/******************************************************************************/ +/*! \addtogroup HIL_GET_LOG_BOOK_LAYOUT_doc + * + * Get the amount of entries that the logbook can hold. Permanent entries + * will not be overwritten with new entries. + * + * \{ */ + +/*! Get log book layout request. */ +typedef HIL_EMPTY_PACKET_T HIL_GET_LOG_BOOK_LAYOUT_REQ_T; + +#define HIL_GET_LOG_BOOK_LAYOUT_REQ_SIZE (0) + + +/*! Get log book layout confirmation data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + /*! Total number of entries the logbook can hold */ + uint32_t ulNumberOfEntries; + /*! Number of entries which will no be overwritten by new ones */ + uint32_t ulPermanentEntries; + +} HIL_GET_LOG_BOOK_LAYOUT_CNF_DATA_T; + +/*! Get log book layout confirmation. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GET_LOG_BOOK_LAYOUT_CNF_DATA_T tData; /*!< Packet data. */ +} HIL_GET_LOG_BOOK_LAYOUT_CNF_T; + +#define HIL_GET_LOG_BOOK_LAYOUT_CNF_SIZE (sizeof(HIL_GET_LOG_BOOK_LAYOUT_CNF_DATA_T)) + +/*! \} ************************************************************************/ + + + + + +/******************************************************************************/ +/*! \addtogroup HIL_CLEAR_LOG_BOOK_doc + * + * Clears all logbook entries. This also effects the Permanent entries. + * + * \{ */ + + +/*! Clear log book entries request. */ +typedef HIL_EMPTY_PACKET_T HIL_CLEAR_LOG_BOOK_REQ_T; + +#define HIL_CLEAR_LOG_BOOK_REQ_SIZE (0) + + +/*! Clear log book entries confirmation. */ +typedef HIL_EMPTY_PACKET_T HIL_CLEAR_LOG_BOOK_CNF_T; + +#define HIL_CLEAR_LOG_BOOK_CNF_SIZE (0) + +/*! \} ************************************************************************/ + + + + + +/******************************************************************************/ +/*! \addtogroup HIL_SET_LOG_BOOK_SEVERITY_LEVEL_doc + * + * Set the severity levels which shall be logged. + * + * \{ */ + +/*! Set the severity levels request data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST +{ + /*! Bit list of severity levels which shall be logged. + * Set related bit position to 1 to enable logging of level, or set to 0 + * to disable related level. + * e.g. ulLevelsToBeLogged = (1< +#include "Hil_Compiler.h" + +/*------------------------------------------------------------*/ +/*! Boot Parameter Data Header and Footer */ +/*------------------------------------------------------------*/ +#define HIL_BOOT_PARAM_HEADER_TOKEN 0xAA5511EE +#define HIL_BOOT_PARAM_FOOTER_TOKEN 0xEE1155AA +#define HIL_BOOT_PARAM_VERSION 2 + +/*------------------------------------------------------------*/ +/*! Boot Parameter Data Header */ +/*------------------------------------------------------------*/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_HEADER_Ttag +{ + /*! Start token of the HIL_BOOT_PARAM_T. */ + uint32_t ulStart; + + /*! Size of the boot parameter structure HIL_BOOT_PARAM_T. + * \note This includes the Header and Footer */ + uint32_t ulSize; + + /*! Version of the HIL_BOOT_PARAM_T structure. */ + uint16_t usVersion; + +} HIL_BOOT_PARAM_HEADER_T; + +/*------------------------------------------------------------*/ +/*! Boot Parameter Data Footer */ +/*------------------------------------------------------------*/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_FOOTER_Ttag +{ + /*! End token of the HIL_BOOT_PARAM_T. */ + uint32_t ulEnd; + +} HIL_BOOT_PARAM_FOOTER_T; + +/*------------------------------------------------------------*/ +/*! Hardware information */ +/*------------------------------------------------------------*/ +#define HIL_BOOT_PARAM_HW_DEV_ID_MAX 0x09 /*!< Max. device ID/slot number */ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_HARDWARE_INFORMATION_Ttag +{ + /*! Hardware assembly options for XC units. + * Hardware which is equipped for the related XC units (0-3). Possible values are defined + * in the dual port memory definitions (see HIL_HW_ASSEMBLY_*). */ + uint16_t ausHwOptionXc[4]; + + /*! Hardware assembly options for xPIC units. + * Hardware which is equipped for the related communication side xPIC units (0-3). On + * netX90 the "Com xPIC" is located in option 0 all other options are not used. Possible + * values are defined in the dual port memory definitions (see HIL_HW_ASSEMBLY_*). */ + uint16_t ausHwOptionsXpic[4]; + + /*! Rotary switch number. */ + uint8_t bDevIdNumber; + + /*! COM UART available. */ + uint8_t bComUartAvailable; + + /*! Hardware config (HWC) version. */ + uint8_t bHwcVersion; + + /*! Information about PIO pins (for netANALYZER). */ + uint8_t bHwcPio; + + /*! Information about GPIO pins (for netANALYZER). */ + uint16_t usHwcGpio; + + /*! Reserved field. + * \note Currently not used set to 0 */ + uint8_t abReserved1[10]; + +} HIL_BOOT_PARAM_HARDWARE_INFORMATION_T; + +/*------------------------------------------------------------*/ +/*! DPM information */ +/*------------------------------------------------------------*/ +#define HIL_BOOT_PARAM_DPM_MODE_NONE 0x00 /*!< No DPM configuration */ +#define HIL_BOOT_PARAM_DPM_MODE_SPM0 0x01 /*!< SPM0 is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_SPM1 0x02 /*!< SPM1 is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_SPM2 0x03 /*!< SPM0 and SPM1 are configured */ +#define HIL_BOOT_PARAM_DPM_MODE_DPM 0x04 /*!< DPM is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_IDPM0 0x05 /*!< iDPM0 is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_IDPM1 0x06 /*!< iDPM1 is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_PCIE 0x07 /*!< iDPM via PCIe is configured */ +#define HIL_BOOT_PARAM_DPM_MODE_IDPM0SPM0 0x08 /*!< iDPM0 and SPM0 */ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_DPM_INFORMATION_Ttag +{ + /*! DPM boot mode. + * DPM interface configuration. */ + uint8_t bDpmMode; + uint8_t bReserved; + +} HIL_BOOT_PARAM_DPM_INFORMATION_T; + +/*------------------------------------------------------------*/ +/*! SDRAM information */ +/*------------------------------------------------------------*/ +#define HIL_BOOT_PARAM_SDRAM_TYPE_NONE 0 +#define HIL_BOOT_PARAM_SDRAM_TYPE_HIFMEM 1 +#define HIL_BOOT_PARAM_SDRAM_TYPE_EXTMEM 2 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_SDRAM_INFORMATION_Ttag +{ + /*! SDRAM Type: HIFMEM or EXTMEM. */ + uint8_t bType; + + /*! SDRAM size in MB. */ + uint8_t bSize; + +} HIL_BOOT_PARAM_SDRAM_INFORMATION_T; + +/*------------------------------------------------------------*/ +/*! SQI information */ +/*------------------------------------------------------------*/ +#define HIL_BOOT_PARAM_SQI_BASE_NONE 0x00 +#define HIL_BOOT_PARAM_SQI_BASE_0 0x01 +#define HIL_BOOT_PARAM_SQI_BASE_1 0x02 + +#define HIL_BOOT_PARAM_SQI_XIP_NONE 0x00 +#define HIL_BOOT_PARAM_SQI_XIP 0x01 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_SQI_Ttag +{ + uint8_t bSqiBase; /*!< SQI base register */ + uint8_t bSqiXip; /*!< XIP supported */ +} HIL_BOOT_PARAM_SQI_T; + +/*------------------------------------------------------------*/ +/*! FLASH information */ +/*------------------------------------------------------------*/ + +/* Quad enable requirements (JEDEC Table 15) */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_1 0x01 /* 001b */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_2 0x02 /* 010b */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_3 0x03 /* 011b */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_4 0x04 /* 100b */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_5 0x05 /* 101b */ +#define HIL_BOOT_PARAM_FLASH_QER_TYPE_6 0x06 /* 110b */ + +/* 0-4-4 Mode Entry Method (JEDEC Table 15) */ +#define HIL_BOOT_PARAM_FLASH_ENTRY_TYPE_1 0x01 /* xxx1b */ +#define HIL_BOOT_PARAM_FLASH_ENTRY_TYPE_2 0x02 /* xx1xb */ + +/* 0-4-4 Mode Exit Method (JEDEC Table 15) */ +#define HIL_BOOT_PARAM_FLASH_EXIT_TYPE_1 0x01 /* xx_xxx1b */ +#define HIL_BOOT_PARAM_FLASH_EXIT_TYPE_2 0x02 /* xx_1xxxb */ + +/* Status Register Polling Device Busy (JEDEC Table 14) */ +#define HIL_BOOT_PARAM_FLASH_POLL_TYPE_1 0x01 /* xx_xx1xb */ +#define HIL_BOOT_PARAM_FLASH_POLL_TYPE_2 0x02 /* xx_xxx1b */ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_FLASH_INFORMATION_Ttag +{ + uint8_t bWriteEnable; /*!< Write enable instruction */ + uint8_t bPageProgram; /*!< Page program instruction */ + uint8_t bSectorErase; /*!< Sector erase instruction */ + uint8_t bRead; /*!< Read data instruction */ + uint8_t bQuadRead; /*!< Fast read quad I/O instruction */ + uint8_t bReadStatus1; /*!< Read status register 1 instruction */ + uint8_t bWriteStatus1; /*!< Write status register 1 instruction */ + uint8_t bReadStatus2; /*!< Read status register 2 instruction */ + uint8_t bWriteStatus2; /*!< Write status register 2 instruction */ + + uint8_t bFreqMHz; /*!< SPI FIFO Frequency */ + uint8_t bAddrBytes; /*!< Number of address bytes */ + uint8_t bQERType; /*!< Quad enable requirements type */ + uint8_t bEntryType; /*!< Sequence to enter 0-4-4 mode */ + uint8_t bExitType; /*!< Sequence to exit 0-4-4 mode */ + uint8_t bPollingMethod; /*!< Polling mode */ + uint8_t bSpiFifoMode; /*!< 0 = Mode 0, ..., 3 = Mode 3, others reserved */ + uint32_t ulPageSize; /*!< Page size in bytes */ + uint32_t ulSectorSize; /*!< Sector size in bytes */ + uint32_t ulSectorCount; /*!< Number of sectors */ + uint32_t ulSqiRomCfg; /*!< netX SqiRomCfg configuration */ + +} HIL_BOOT_PARAM_FLASH_INFORMATION_T; + +/*------------------------------------------------------------*/ +/*! Boot Parameter Data Structure */ +/*------------------------------------------------------------*/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_DATA_Ttag +{ + HIL_BOOT_PARAM_HARDWARE_INFORMATION_T tHardwareInfo; + HIL_BOOT_PARAM_DPM_INFORMATION_T tDpmInfo; + HIL_BOOT_PARAM_SDRAM_INFORMATION_T tSdramInfo; + HIL_BOOT_PARAM_SQI_T tSqiInfo; + HIL_BOOT_PARAM_FLASH_INFORMATION_T tFlashInfo; + +} HIL_BOOT_PARAM_DATA_T; + +/*------------------------------------------------------------*/ +/*! Boot Parameter Structure */ +/*------------------------------------------------------------*/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BOOT_PARAM_Ttag +{ + HIL_BOOT_PARAM_HEADER_T tHeader; + HIL_BOOT_PARAM_DATA_T tData; + HIL_BOOT_PARAM_FOOTER_T tFooter; + +} HIL_BOOT_PARAM_T; + +#endif /* HIL_BOOTPARAMETER_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_CommandRange.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_CommandRange.h new file mode 100644 index 0000000..eac330f --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_CommandRange.h @@ -0,0 +1,731 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_CommandRange.h $: *//*! + + \file Hil_CommandRange.h + + The file is the central point where Hilscher packet commands numbers, or ranges, + will be maintained. + + A range normally contains of 256 (0x100) entries. To reserve a range add a start + command entry with a gap of 0x100 hex to the previous one start boundary e.g.: + FOO_BAR_COMMAND_START = 0x00AFFE00 + +**************************************************************************************/ +#ifndef HIL_COMMANDRANGE_H_ +#define HIL_COMMANDRANGE_H_ + +enum HIL_COMMAND_Etag +{ + /** Illegal command number */ + HIL_COMMAND_INVALID = 0x00000000, + + /* Command numbers 0x00000000 to 0x0000007F reserved, don't use it */ + + /** Hilscher global commands used in some TLR tasks */ + HIL_PACKET_COMMAND_START = 0x00000080, + HIL_CMD_END_PROCESS_REQ = 0x00000080, + HIL_CMD_END_PROCESS_CNF = 0x00000081, + HIL_CMD_START_PROCESS_REQ = 0x00000082, + HIL_CMD_START_PROCESS_CNF = 0x00000083, + HIL_CMD_STOP_PROCESS_REQ = 0x00000084, + HIL_CMD_STOP_PROCESS_CNF = 0x00000085, + HIL_CMD_CYCLE_EVENT_REQ = 0x00000086, + HIL_CMD_CYCLE_EVENT_CNF = 0x00000087, + + /** Profibus DL (Datalink Layer Protocol) service commands */ + PROFIBUS_DL_PACKET_COMMAND_START = 0x00000100, + + /** TCP/IP Stack - IP service commands */ + TCPIP_IP_PACKET_COMMAND_START = 0x00000200, + + /** TCP/IP Stack - TCP and UDP service commands */ + TCPIP_TCP_UDP_PACKET_COMMAND_START = 0x00000300, + + /** Profibus FSPMS (Fieldbus Service Protocol Machine - Slave) service commands */ + PROFIBUS_FSPMS_PACKET_COMMAND_START = 0x00000400, + + /** RPC (Remote procedure calls) service commands */ + RPC_PACKET_COMMAND_START = 0x00000500, + + /** PROFINET IO common service commands */ + PNIO_COMMON_PACKET_COMMAND_START = 0x00000600, + + /** PROFINET ACP service commands */ + PNIO_ACP_PACKET_COMMAND_START = 0x00000800, + + /** PROFINET DCP service commands */ + PNIO_DCP_PACKET_COMMAND_START = 0x00000900, + + /** PROFINET EDD service commands */ + PNIO_EDD_PACKET_COMMAND_START = 0x00000A00, + + /** Lenze PROFINET IO-Device service commands */ + PNIOD_LENZE_PACKET_COMMAND_START = 0x00000B00, + PNIOD_LENZE_CMD_END_PROCESS_REQ = 0x0000B00, + PNIOD_LENZE_CMD_END_PROCESS_CNF = 0x0000B01, + + /** Lenze PROFINET IO-Device service commands */ + PNIOD_LENZE_INIT_PACKET_COMMAND_START = 0x00000B80, + + /** PROFINET IO-Controller application service commands */ + PNIO_APCTL_PACKET_COMMAND_START = 0x00000C00, + + /** PROFINET IO-Device application service commands */ + PNIO_APDEV_PACKET_COMMAND_START = 0x00000D00, + + /** PROFINET CMCTL service commands */ + PNIO_CMCTL_PACKET_COMMAND_START = 0x00000E00, + + /** PROFINET CMDEV service commands */ + PNIO_CMDEV_PACKET_COMMAND_START = 0x00000F00, + + /** POWERLINK EPL PDO service commands */ + EPL_PDO_PACKET_COMMAND_START = 0x00001000, + + /** POWERLINK EPL SDO service commands */ + EPL_SDO_PACKET_COMMAND_START = 0x00001100, + + /** POWERLINK EPL MN service commands */ + EPL_MN_PACKET_COMMAND_START = 0x00001200, + + /** POWERLINK EPL NMT service commands */ + EPL_NMT_PACKET_COMMAND_START = 0x00001300, + + /** POWERLINK MN Packet Timer service commands */ + EPL_MN_TIMER_PACKET_COMMAND_START = 0x00001400, + + /** PROFINET IO-Device DPM Interface service commands */ + PNIOD_DPMIF_PACKET_COMMAND_START = 0x00001500, + PNIOD_DPMIF_CMD_END_PROCESS_REQ = 0x00001500, + PNIOD_DPMIF_CMD_END_PROCESS_CNF = 0x00001501, + PNIOD_DPMIF_PROCESS_ALARM_REQ = 0x00001502, + PNIOD_DPMIF_PROCESS_ALARM_CNF = 0x00001503, + PNIOD_DPMIF_ADD_CHANNEL_DIAG_REQ = 0x00001504, + PNIOD_DPMIF_ADD_CHANNEL_DIAG_CNF = 0x00001505, + PNIOD_DPMIF_ADD_GENERIC_DIAG_REQ = 0x00001506, + PNIOD_DPMIF_ADD_GENERIC_DIAG_CNF = 0x00001507, + PNIOD_DPMIF_REMOVE_DIAG_REQ = 0x00001508, + PNIOD_DPMIF_REMOVE_DIAG_CNF = 0x00001509, + PNIOD_DPMIF_SET_CONFIG_REQ = 0x0000150a, + PNIOD_DPMIF_SET_CONFIG_CNF = 0x0000150b, + PNIOD_DPMIF_CBF_READ_RECORD_REQ = 0x00001580, + PNIOD_DPMIF_CBF_READ_RECORD_CNF = 0x00001581, + PNIOD_DPMIF_CBF_WRITE_RECORD_REQ = 0x00001582, + PNIOD_DPMIF_CBF_WRITE_RECORD_CNF = 0x00001583, + PNIOD_DPMIF_ALARM_IND = 0x00001584, + PNIOD_DPMIF_ALARM_RES = 0x00001585, + PNIOD_DPMIF_CBF_STATION_NAME_IND = 0x00001586, + PNIOD_DPMIF_CBF_STATION_NAME_RES = 0x00001587, + PNIOD_DPMIF_CBF_STATION_TYPE_IND = 0x00001588, + PNIOD_DPMIF_CBF_STATION_TYPE_RES = 0x00001589, + + /** UDP Debug Client service commands */ + DEBUG_CLIENT_PACKET_COMMAND_START = 0x00001600, + DEBUG_CLIENT_CMD_END_PROCESS_REQ = 0x00001600, + DEBUG_CLIENT_CMD_END_PROCESSS_CNF = 0x00001601, + DEBUG_CLIENT_CMD_SEND_DEBUG_STRING_REQ = 0x00001602, + DEBUG_CLIENT_CMD_SEND_DEBUG_STRING_CNF = 0x00001603, + + /** Example task 1 service commands */ + EXAMPLETASK1_PACKET_COMMAND_START = 0x00001700, + EXAMPLETASK1_CMD_END_PROCESS_REQ = 0x00001700, + EXAMPLETASK1_CMD_END_PROCESS_CNF = 0x00001701, + EXAMPLETASK1_CMD_TEST_REQ = 0x00001702, + EXAMPLETASK1_CMD_TEST_CNF = 0x00001703, + + /** Example task 2 service commands */ + EXAMPLETASK2_PACKET_COMMAND_START = 0x00001720, + EXAMPLETASK2_CMD_END_PROCESS_REQ = 0x00001720, + EXAMPLETASK2_CMD_END_PROCESS_CNF = 0x00001721, + EXAMPLETASK2_CMD_TEST_REQ = 0x00001722, + EXAMPLETASK2_CMD_TEST_CNF = 0x00001723, + + /** Example task 3 service commands */ + EXAMPLETASK3_PACKET_COMMAND_START = 0x00001740, + EXAMPLETASK3_CMD_END_PROCESS_REQ = 0x00001740, + EXAMPLETASK3_CMD_END_PROCESS_CNF = 0x00001741, + EXAMPLETASK3_CMD_TEST_REQ = 0x00001742, + EXAMPLETASK3_CMD_TEST_CNF = 0x00001743, + + /** Ethernet/IP Encapsulation task service commands */ + EIP_ENCAP_PACKET_COMMAND_START = 0x00001800, + + /** EtherCAT service commands (Part 1) */ + ECAT_PACKET_COMMAND_START = 0x00001900, + + /** Ethernet/IP Object task service commands */ + EIP_OBJECT_PACKET_COMMAND_START = 0x00001A00, + + /** EtherCAT service commands (Part 2) */ + ECAT_2_PACKET_COMMAND_START = 0x00001B00, + + /** iCon-L main task commands */ + ICONL_RUN_PACKET_COMMAND_START = 0x00001C00, + ICONL_RUN_DSPSRUN_REQ = 0x00001C00, + ICONL_RUN_DSPSRUN_CNF = 0x00001C01, + + /** iCon-L Timer task commands */ + ICONL_TIMER_PACKET_COMMAND_START = 0x00001D00, + ICONL_TIMER_DSPSTIMER_REQ = 0x00001D00, + ICONL_TIMER_DSPSTIMER_CNF = 0x00001D01, + + /** Middle ware system task commands. + * The commands are described in the Hil_SystemCmd.h file. */ + MID_SYS_PACKET_COMMAND_START = 0x00001E00, + + /* PROFINET IO-Device Interface task service commands */ + PNS_IF_PACKET_COMMAND_START = 0x00001F00, + + /* Middle ware task (back end task) */ + MID_DBG_PACKET_COMMAND_START = 0x00002000, + MID_DBG_READ_MEMORY_REQ = 0x00002000, + MID_DBG_READ_MEMORY_CNF = 0x00002001, + MID_DBG_WRITE_MEMORY_REQ = 0x00002002, + MID_DBG_WRITE_MEMORY_CNF = 0x00002003, + + MID_DBG_CALL_FUNC_REQ = 0x00002020, + MID_DBG_CALL_FUNC_CNF = 0x00002021, + + MID_DBG_SET_SW_BREAKPOINT_REQ = 0x00002040, + MID_DBG_SET_SW_BREAKPOINT_CNF = 0x00002041, + MID_DBG_CLR_SW_BREAKPOINT_REQ = 0x00002042, + MID_DBG_CLR_SW_BREAKPOINT_CNF = 0x00002043, + MID_DBG_SET_HW_BREAKPOINT_REQ = 0x00002044, + MID_DBG_SET_HW_BREAKPOINT_CNF = 0x00002045, + MID_DBG_CLR_HW_BREAKPOINT_REQ = 0x00002046, + MID_DBG_CLR_HW_BREAKPOINT_CNF = 0x00002047, + MID_DBG_GET_SW_BREAKPOINT_IDX_REQ = 0x00002048, + MID_DBG_GET_SW_BREAKPOINT_IDX_CNF = 0x00002049, + MID_DBG_GET_HW_BREAKPOINT_IDX_REQ = 0x0000204A, + MID_DBG_GET_HW_BREAKPOINT_IDX_CNF = 0x0000204B, + MID_DBG_REACHED_HW_BREAKPOINT_IND = 0x0000204C, + MID_DBG_REACHED_HW_BREAKPOINT_RES = 0x0000204D, + MID_DBG_REACHED_SW_BREAKPOINT_IND = 0x0000204E, + MID_DBG_REACHED_SW_BREAKPOINT_RES = 0x0000204F, + + MID_DBG_READ_REGS_REQ = 0x00002060, + MID_DBG_READ_REGS_CNF = 0x00002061, + MID_DBG_WRITE_REG_REQ = 0x00002062, + MID_DBG_WRITE_REG_CNF = 0x00002063, + + MID_DBG_SUSPEND_TASK_REQ = 0x00002080, + MID_DBG_SUSPEND_TASK_CNF = 0x00002081, + MID_DBG_CONTINUE_TASK_REQ = 0x00002082, + MID_DBG_CONTINUE_TASK_CNF = 0x00002083, + + MID_DBG_CONNECT_REQ = 0x000020A0, + MID_DBG_CONNECT_CNF = 0x000020A1, + MID_DBG_DISCONNECT_REQ = 0x000020A2, + MID_DBG_DISCONNECT_CNF = 0x000020A3, + + /** AS-Interface ECTRL task */ + ASI_ECTRL_PACKET_COMMAND_START = 0x00002100, + ASI_ECTRL_CMD_SET_OFF_PHASE_REQ = 0x00002100, + ASI_ECTRL_CMD_SET_OFF_PHASE_CNF = 0x00002101, + ASI_ECTRL_CMD_SET_OP_MODE_REQ = 0x00002102, + ASI_ECTRL_CMD_SET_OP_MODE_CNF = 0x00002103, + ASI_ECTRL_CMD_SET_DATA_EXCH_REQ = 0x00002104, + ASI_ECTRL_CMD_SET_DATA_EXCH_CNF = 0x00002105, + ASI_ECTRL_CMD_SET_AUTO_ADDR_REQ = 0x00002106, + ASI_ECTRL_CMD_SET_AUTO_ADDR_CNF = 0x00002107, + ASI_ECTRL_CMD_WRITE_PARAM_REQ = 0x00002108, + ASI_ECTRL_CMD_WRITE_PARAM_CNF = 0x00002109, + ASI_ECTRL_CMD_WRITE_ID1_CODE_REQ = 0x0000210A, + ASI_ECTRL_CMD_WRITE_ID1_CODE_CNF = 0x0000210B, + ASI_ECTRL_CMD_CHANGE_ADDR_REQ = 0x0000210C, + ASI_ECTRL_CMD_CHANGE_ADDR_CNF = 0x0000210D, + ASI_ECTRL_CMD_EXECUTE_CMD_REQ = 0x0000210E, + ASI_ECTRL_CMD_EXECUTE_CMD_CNF = 0x0000210F, + ASI_ECTRL_CMD_GET_STATE_REQ = 0x00002110, + ASI_ECTRL_CMD_GET_STATE_CNF = 0x00002111, + ASI_ECTRL_CMD_GET_ACT_CONFIG_REQ = 0x00002112, + ASI_ECTRL_CMD_GET_ACT_CONFIG_CNF = 0x00002113, + ASI_ECTRL_CMD_GET_PERM_CONFIG_REQ = 0x00002114, + ASI_ECTRL_CMD_GET_PERM_CONFIG_CNF = 0x00002115, + ASI_ECTRL_CMD_SET_PERM_PARAM_REQ = 0x00002116, + ASI_ECTRL_CMD_SET_PERM_PARAM_CNF = 0x00002117, + ASI_ECTRL_CMD_STORE_ACT_PARAM_REQ = 0x00002118, + ASI_ECTRL_CMD_STORE_ACT_PARAM_CNF = 0x00002119, + ASI_ECTRL_CMD_SET_PERM_CONFIG_REQ = 0x0000211A, + ASI_ECTRL_CMD_SET_PERM_CONFIG_CNF = 0x0000211B, + ASI_ECTRL_CMD_STORE_ACT_CONFIG_REQ = 0x0000211C, + ASI_ECTRL_CMD_STORE_ACT_CONFIG_CNF = 0x0000211D, + ASI_ECTRL_CMD_READ_ID_STR_REQ = 0x0000211E, + ASI_ECTRL_CMD_READ_ID_STR_CNF = 0x0000211F, + ASI_ECTRL_CMD_READ_PARAM_STR_REQ = 0x00002120, + ASI_ECTRL_CMD_READ_PARAM_STR_CNF = 0x00002121, + ASI_ECTRL_CMD_READ_DIAG_STR_REQ = 0x00002122, + ASI_ECTRL_CMD_READ_DIAG_STR_CNF = 0x00002123, + ASI_ECTRL_CMD_WRITE_PARAM_STR_REQ = 0x00002124, + ASI_ECTRL_CMD_WRITE_PARAM_STR_CNF = 0x00002125, + ASI_ECTRL_CMD_READ_IN_DATA_REQ = 0x00002126, + ASI_ECTRL_CMD_READ_IN_DATA_CNF = 0x00002127, + ASI_ECTRL_CMD_WRITE_OUT_DATA_REQ = 0x00002128, + ASI_ECTRL_CMD_WRITE_OUT_DATA_CNF = 0x00002129, + ASI_ECTRL_CMD_READ_ANLG_IN_DATA_REQ = 0x0000212A, + ASI_ECTRL_CMD_READ_ANLG_IN_DATA_CNF = 0x0000212B, + ASI_ECTRL_CMD_WRITE_ANLG_OUT_DATA_REQ = 0x0000212C, + ASI_ECTRL_CMD_WRITE_ANLG_OUT_DATA_CNF = 0x0000212D, + ASI_ECTRL_CMD_READ_SERIAL_STRING_REQ = 0x0000212E, + ASI_ECTRL_CMD_READ_SERIAL_STRING_CNF = 0x0000212F, + ASI_ECTRL_CMD_WRITE_SERIAL_STRING_REQ = 0x00002130, + ASI_ECTRL_CMD_WRITE_SERIAL_STRING_CNF = 0x00002131, + + ASI_ECTRL_CMD_CYCLE_EVENT_REQ = 0x000021F0, + ASI_ECTRL_CMD_CYCLE_EVENT_CNF = 0x000021F1, + + /** Profibus FSPMM (Fieldbus Service Protocol Machine - Master) service commands */ + PROFIBUS_FSPMM_PACKET_COMMAND_START = 0x00002200, + + /** LLDP service commands */ + LLDP_PACKET_COMMAND_START = 0x00002300, + + /** MibDatabase task (part of the SNMP-Implementation) service commands */ + MIB_DATABASE_COMMAND_START = 0x00002400, + + /** SnmpServer task (part of the SNMP-Implementation) service commands */ + SNMP_SERVER_COMMAND_START = 0x00002500, + + /** Ecat Cyclic service commands */ + ECAT_CYCLIC_COMMAND_START = 0x00002600, + + /** DDL ENPDDL task service commands. OEM Project: J060219 */ + DDL_ENPDDL_PACKET_COMMAND_START = 0x00002700, + DDL_ENPDDL_CMD_CYCLE_EVENT_REQ = 0x00002700, + DDL_ENPDDL_CMD_CYCLE_EVENT_CNF = 0x00002701, + DDL_ENPDDL_CMD_TIMEOUT_AUTO_ADR_REQ = 0x00002702, + DDL_ENPDDL_CMD_TIMEOUT_AUTO_ADR_CNF = 0x00002703, + DDL_ENPDDL_CMD_TIMEOUT_MANUAL_ADR_REQ = 0x00002704, + DDL_ENPDDL_CMD_TIMEOUT_MANUAL_ADR_CNF = 0x00002705, + DDL_ENPDDL_CMD_TIMEOUT_PARAMETER_REQ = 0x00002706, + DDL_ENPDDL_CMD_TIMEOUT_PARAMETER_CNF = 0x00002707, + DDL_ENPDDL_CMD_TIMEOUT_DATA_REQ = 0x00002708, + DDL_ENPDDL_CMD_TIMEOUT_DATA_CNF = 0x00002709, + DDL_ENPDDL_CMD_TIMEOUT_WAIT_SEND_REQ = 0x0000270A, + DDL_ENPDDL_CMD_TIMEOUT_WAIT_SEND_CNF = 0x0000270B, + DDL_ENPDDL_CMD_TIMEOUT_ERROR_REQ = 0x0000270C, + DDL_ENPDDL_CMD_TIMEOUT_ERROR_CNF = 0x0000270D, + DDL_ENPDDL_CMD_CAN_DL_BUS_OFF_DELAY_REQ = 0x0000270E, + DDL_ENPDDL_CMD_CAN_DL_BUS_OFF_DELAY_CNF = 0x0000270F, + + + /** CANopen Master task service commands */ + CANOPEN_MASTER_PACKET_COMMAND_START = 0x00002800, + + /** CANopen Slave task service commands */ + CANOPEN_SLAVE_PACKET_COMMAND_START = 0x00002900, + CANOPEN_SLAVE_CMD_CYCLE_EVENT_REQ = 0x000029F0, + CANOPEN_SLAVE_CMD_CYCLE_EVENT_CNF = 0x000029F1, + + /** CAN DL task service commands */ + CAN_DL_PACKET_COMMAND_START = 0x00002A00, + + /** Commands used by Mid_Sys and routers to specify message routing for applications not knowing the instance */ + MID_SYS_LOG_PACKET_COMMAND_START = 0x00002B00, + + /** Commands used by the Object Dictionary DPM adapter to initialize the link between stack and DPM (used by EcatDPM task as well) */ + DPM_OD2_PACKET_COMMAND_START = 0x00002C00, + + /** DeviceNet Slave Filedbus application layer task */ + DNS_FAL_PACKET_COMMAND_START = 0x00002D00, + + /** CANopen Slave application task */ + CANOPEN_APS_PACKET_COMMAND_START = 0x00002E00, + CANOPEN_APS_CMD_CYCLE_EVENT_REQ = 0x00002E00, + CANOPEN_APS_CMD_CYCLE_EVENT_CNF = 0x00002E01, + + /** Common application packets + * The commands are described in the Hil_ApplicationCmd.h file. */ + DIAG_INFO_PACKET_COMMAND_START = 0x00002F00, + + /** Profibus APM task commands */ + PROFIBUS_APM_PACKET_COMMAND_START = 0x00003000, + + /** Profibus APS task commands */ + PROFIBUS_APS_PACKET_COMMAND_START = 0x00003100, + + /** TBD */ + SERCOSIII_SL_COM_PACKET_COMMAND_START = 0x00003200, + + /** TBD */ + SERCOSIII_SL_RTD_PACKET_COMMAND_START = 0x00003300, + + /** TBD */ + SERCOSIII_SL_SVC_PACKET_COMMAND_START = 0x00003400, + + /** TBD */ + SERCOSIII_SL_AP_PACKET_COMMAND_START = 0x00003500, + + /** Ethernet/IP APS (Slave/Adapter) task service commands */ + EIP_APS_PACKET_COMMAND_START = 0x00003600, + + /** Ethernet/IP APM (Master/Scanner) task service commands */ + EIP_APM_PACKET_COMMAND_START = 0x00003700, + + /** DeviceNet FAL task service commands */ + DEVNET_FAL_PACKET_COMMAND_START = 0x00003800, + + /** DeviceNet APM task service commands */ + DEVNET_AP_PACKET_COMMAND_START = 0x00003900, + + /** CANopen Master application task service commands */ + CANOPEN_APM_PACKET_COMMAND_START = 0x00003A00, + + /** Ethernet Interface task service commands */ + ETH_INTF_PACKET_COMMAND_START = 0x00003B00, + + /** PNS_32BITIO AP task service commands */ + PNS_32BITIO_PACKET_COMMAND_START = 0x00003C00, + + /** PNS_4BITIO AP task service commands */ + PNS_4BITIO_PACKET_COMMAND_START = 0x00003D00, + + /** Mid Startup task service commands */ + MID_STARTUP_PACKET_COMMAND_START = 0x00003E00, + + /** Open modbus task service commands */ + OMB_OMBTASK_PACKET_COMMAND_START = 0x00003F00, + + /** Start value of OMB OMBAPTASK service commands */ + OMB_OMBAPTASK_PACKET_COMMAND_START = 0x00004000, + + /** DeviceNet Slave application layer task service commands */ + DNS_APS_PACKET_COMMAND_START = 0x00004100, + + /** Profibus MPI application layer task service commands */ + PROFIBUS_MPI_AP_PACKET_COMMAND_START = 0x00004200, + + /** Profibus MPI layer task service commands */ + PROFIBUS_MPI_PACKET_COMMAND_START = 0x00004300, + + /** Profibus FSPMM2 layer task service commands */ + PROFIBUS_FSPMM2_PACKET_COMMAND_START = 0x00004400, + + /** CC-Link Slave task service commands */ + CCLINK_SLAVE_PACKET_COMMAND_START = 0x00004500, + + /** CC-Link Slave application task service commands */ + CCLINK_APS_PACKET_COMMAND_START = 0x00004600, + + /** Modbus RTU task */ + MODBUS_RTU_PACKET_COMMAND_START = 0x00004700, + + /** Sercos III Master CP task */ + SIII_MA_CP_PACKET_COMMAND_START = 0x00004800, + + /** Sercos III Master Svc task */ + SIII_MA_SVC_PACKET_COMMAND_START = 0x00004900, + + /** Sercos III Master AP task */ + SIII_MA_AP_PACKET_COMMAND_START = 0x00004A00, + + /** Summary of module load packets */ + RCX_MODLOAD_PACKET_COMMAND_START = 0x00004B00, + + /** Summary of SSIO packets */ + SSIO_COMMAND_START = 0x00004C00, + + /** Summary of SSIO packets */ + SSIO_AP_COMMAND_START = 0x00004D00, + + /** Summary of Memory Mapping packets */ + MEMORY_MAP_COMMAND_START = 0x00004E00, + + /** Summary of TCPIP SOCKIF packets */ + TCPIP_SOCKIF_PACKET_COMMAND_START = 0x00004F00, + + /** Sercos III Master NRT task */ + SIII_MA_NRT_PACKET_COMMAND_START = 0x00005000, + + /** NetScript task */ + NETSCRIPT_COMMAND_START = 0x00005100, + + /** AS-Interface Master task */ + ASI_MASTER_PACKET_COMMAND_START = 0x00005200, + + /** AS-Interface Master application task */ + ASI_APM_PACKET_COMMAND_START = 0x00005300, + + /** CompoNet Slave task */ + COMPONET_SLAVE_COMMAND_START = 0x00005400, + + /** CompoNet Slave application task */ + COMPONET_SLAVE_AP_COMMAND_START = 0x00005500, + + /** ASCII Protocol task */ + ASCII_COMMAND_START = 0x00005600, + + /** ASCII application task */ + ASCII_AP_COMMAND_START = 0x00005700, + + /** Summary of Ecs SoE commands */ + ECAT_SOE_COMMAND_START = 0x00005800, + + /** Summary of netPLC (Codesys Variant) commands */ + NPLC_CODESYS_AP_COMMAND_START = 0x00005900, + + /** Summary of SercosIII Slave Stack IDN commands */ + SERCOSIII_SL_IDN_PACKET_COMMAND_START = 0x00005A00, + + /** Summary of Item Server task commands */ + ITEM_SERVER_PACKET_COMMAND_START = 0x00005B00, + + /** Summary of DF1 stack task commands */ + DF1_PACKET_COMMAND_START = 0x00005C00, + + /** Summary of DF1 AP task commands */ + DF1_AP_PACKET_COMMAND_START = 0x00005D00, + + /** Summary of 3964R stack task commands */ + P3964R_PACKET_COMMAND_START = 0x00005E00, + + /** Summary of 3964R AP task commands */ + P3964R_AP_PACKET_COMMAND_START = 0x00005F00, + + /** Summary of ISAGraf AP task commands */ + ISAGRAF_AP_PACKET_COMMAND_START = 0x00006000, + + /** Summary of IO Signals task commands */ + IO_SIGNALS_PACKET_COMMAND_START = 0x00006100, + + /** RTR UART task commands */ + RTR_UART_PACKET_COMMAND_START = 0x00006200, + + /** RFC1006 task commands */ + RFC1006_AP_PACKET_COMMAND_START = 0x00006300, + + /** RFC1006 task commands */ + RFC1006_STACK_PACKET_COMMAND_START = 0x00006400, + + /** Ethernet/IP DLR task commands */ + EIP_DLR_PACKET_COMMAND_START = 0x00006500, + + /** SERCOS III Slave NRT task commands */ + SERCOSIII_SL_NRT_PACKET_COMMAND_START = 0x00006600, + + /** OEM Device - can be used for all customer specific tasks */ + OEM_DEVICE_PACKET_COMMAND_START = 0x00006700, + + /** TCPIP AP task */ + TCPIP_AP_PACKET_COMMAND_START = 0x00006800, + + /** FODMI task */ + FODMI_PACKET_COMMAND_START = 0x00006900, + + /** ODv3 task */ + ODV3_PACKET_COMMAND_START = 0x00006A00, + + /** PROFIDRIVE - GSM task */ + PROFIDRIVE_PACKET_COMMAND_START = 0x00006B00, + + /** PROFIDRIVE - PA task */ + PROFIDRIVE_PA_PACKET_COMMAND_START = 0x00006C00, + + /** PROFIDRIVE - OD task */ + PROFIDRIVE_OD_PACKET_COMMAND_START = 0x00006D00, + + /** PROFIDRIVE - AP task */ + PROFIDRIVE_AP_PACKET_COMMAND_START = 0x00006E00, + + /** VARAN Client - task */ + VARAN_CLIENT_PACKET_COMMAND_START = 0x00006F00, + + /** VARAN Client - AP task */ + VARAN_CLIENT_AP_PACKET_COMMAND_START = 0x00007000, + + /** PROFINET RTA task */ + PROFINET_RTA_PACKET_COMMAND_START = 0x00007100, + + /** Modbus RTU Peripheral task */ + MBR_PERIPH_PACKET_COMMAND_START = 0x00007200, + + /** CODE SYS PLC Handler AP task */ + CODESYS_AP_PLCHANDLER_PACKET_COMMAND_START = 0x00007300, + + /** CODE SYS PLC Handler task */ + CODESYS_PLCHANDLER_PACKET_COMMAND_START = 0x00007400, + + /** PNS INX AP task */ + PNSINX_AP_PACKET_COMMAND_START = 0x00007F00, + + /** SercosIII SIP task */ + SIII_SIP_PACKET_COMMAND_START = 0x00008000, + + /** Packets for sercos test master firmware */ + SIII_MA_TEST_PACKET_COMMAND_START = 0x00008100, + + /** Packets for Powerlink MN Packet task */ + EPLMN_PCK_PACKET_COMMAND_START = 0x00008200, + + /** Packets for Powerlink MN AP task */ + EPLMN_AP_PACKET_COMMAND_START = 0x00008300, + + /** Packets for SmartWire Master task */ + SMARTWIRE_MASTER_PACKET_COMMAND_START = 0x00008400, + + /** Packets for POWERLINK TestMaster */ + POWERLINK_TEST_MASTER_PACKET_START = 0x00008500, + + /** Packets for PROFINET IO common */ + PNIO_COMMON_PACKET_START = 0x00008600, + + /** Packets for Trivial File Server API */ + TRIVIAL_FILE_SERVER_API_PACKET_START = 0x00008700, + + /** Packets for netProxy API */ + NPX_API_PACKET_START = 0x00008800, + + /** Second set of packets for sercos master CP task */ + SIII_MA_CP_PACKET_2ND_SET_COMMAND_START = 0x00008900, + + /** Commands for sercos master Auto configure task */ + SIII_MA_ACFG_PACKET_START = 0x00008A00, + + /** Commands for TFTP Stack task */ + TFTP_STACK_PACKET_START = 0x00008B00, + + /** Commands for TFTP application task */ + TFTP_APP_PACKET_START = 0x00008C00, + + /** Commands for ECS AOE task */ + ECS_AOE_PACKET_START = 0x00008D00, + + /** Commands for the PTP stack of EtherNet/IP */ + EIP_PTP_PACKET_COMMAND_START = 0x00008E00, + + /** Commands for sercos master S/IP client task */ + SIII_MA_SIP_PACKET_START = 0x00008F00, + + /** Commands for sercos master SMP task */ + SIII_MA_SMP_PACKET_START = 0x00009000, + + /** Commands for IO-Link master DL task */ + IOLM_DL_PACKET_START = 0x00009100, + + /** Commands for IO-Link master AL task */ + IOLM_AL_PACKET_START = 0x00009200, + + /** Commands for SIF */ + SIF_PACKET_START = 0x00009300, + + /** Commands for Profinet IO-Controller AP task */ + PNM_AP_CFG_PACKET_COMMAND_START = 0x00009400, + + /** Commands for ECS FoE */ + ECS_FOE_PACKET_COMMAND_START = 0x00009500, + + /** Socket Api Commands */ + SOCK_PACKET_COMMAND_START = 0x00009600, + + /** ECMv4 API */ + ECM_COMMAND_START = 0x00009700, + + /** ECMv4 API - MBX */ + ECM_MBX_COMMAND_START = 0x00009800, + + /** ECMv4 API - FoE */ + ECM_FOE_COMMAND_START = 0x00009900, + + /** ECMv4 API - CoE */ + ECM_COE_COMMAND_START = 0x00009A00, + + /** ECMv4 API - SoE */ + ECM_SOE_COMMAND_START = 0x00009B00, + + /** ECMv4 API - EoE */ + ECM_EOE_COMMAND_START = 0x00009C00, + + /** ECMv4 API - AoE */ + ECM_AOE_COMMAND_START = 0x00009D00, + + /** ECMv4 API - Interface */ + ECM_IF_COMMAND_START = 0x00009E00, + + /** ECMv4 API - AP */ + ECM_AP_COMMAND_START = 0x00009F00, + + /** Ethernet/IP Class1 task service commands */ + EIP_CL1_PACKET_COMMAND_START = 0x0000A000, + + /** PLS AP task service commands */ + PLS_AP_PACKET_COMMAND_START = 0x0000A100, + + /** PLS IF task service commands */ + PLS_IF_PACKET_COMMAND_START = 0x0000A200, + + /** Command Table task service commands */ + CMDTBL_COMMAND_START = 0x0000A300, + + /** DPM Bridge task service commands */ + DPM_BRIDGE_PACKET_COMMAND_START = 0x0000A400, + + /** Base Firmware application task service commands */ + BASEFW_AP_PACKET_COMMAND_START = 0x0000A500, + + /** CCLink IE service commands */ + CCLIES_COMMAND_START = 0x0000A600, + + /** CCLink IE interface service commands */ + CCLIES_IF_COMMAND_START = 0x0000A700, + + /** CCLink IE application task service commands */ + CCLIES_AP_COMMAND_START = 0x0000A800, + + /** IO-Link Test Protocol task service commands */ + IOLT_COMMAND_START = 0x0000A900, + + /** CCLink IE Field Basic service commands */ + CCLIEFB_COMMAND_START = 0x0000AA00, + + /** CCLink IE Field Basic application task service commands */ + CCLIEFB_AP_COMMAND_START = 0x0000AB00, + + /** CC-Link IE Field Basic master service commands */ + CCLIEFBM_COMMAND_START = 0x0000AC00, + + /** Generic application task service commands */ + GENERIC_AP_TASK_COMMAND_START = 0x0000AD00, + + /** Generic communication interface service commands + * The commands are described in the Hil_GenericCommunicationInterface.h file. */ + GENERIC_COMMUNICATION_INTERFACE_COMMAND_START = 0x0000AE00, + + /** Web interface service commands */ + WEB_INTERFACE_COMMAND_START = 0x0000AF00, + + /** Authentication manager service commands */ + AUTH_INTERFACE_COMMAND_START = 0x0000B000, + + /** DeviceNet Slave V4/V5 service commands */ + DNS_COMMAND_START = 0x0000B100, + + /** Protocol Detect commands */ + PDETECT_COMMAND_START = 0x0000B200, + + /** IEEE 802.1AS component commands */ + IEEE_802_1_AS_COMMAND_START = 0x0000B300, + + /** TSN Core component commands */ + TSN_CORE_COMMAND_START = 0x0000B400, + + + + /* ^^^^ Add new error codes above this line ^^^^ */ + + /** Commands for EtherCAT master service commands */ + ETHERCAT_MASTER_V2_X_V3_X_AP_PACKET_START = 0x00640000, + ETHERCAT_MASTER_V2_X_V3_X_PACKET_START = 0x00650000, + + /** Start value where a USER may define its own service commands */ + USER_PACKET_COMMAND_START = 0x01000000, + USER_PACKET_COMMAND_END = 0x01FFFFFF, + + /* Command numbers from 0x02000000 are reserved, don't use it */ + +}; + +typedef enum HIL_COMMAND_Etag HIL_COMMAND_E; + +#endif /* HIL_COMMANDRANGE_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Compiler.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Compiler.h new file mode 100644 index 0000000..fdcbfdd --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Compiler.h @@ -0,0 +1,104 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Compiler.h $: *//*! + + \file Hil_Compiler.h + + Definitions of compiler settings. + +**************************************************************************************/ +#ifndef HIL_COMPILER_H_ +#define HIL_COMPILER_H_ + +#if !defined(USER_COMPILER) + +/*****************************************************************************/ +/* Set byte alignment for structure members. */ +/*****************************************************************************/ +#if defined(__GNUC__) || defined(__clang__) +/* support for GNU and clang compiler. Note the clang compiler may also set + * _MSC_VER, so __clang__ must be checked before _MSC_VER. */ + + #define __HIL_PACKED_PRE + #define __HIL_PACKED_POST __attribute__((__packed__)) + + /* macro for setting DWORD alignment of a tag's beginning */ + #define __HIL_ALIGNED_DWORD__ __attribute__ ((aligned (4))) + +#elif defined(_MSC_VER) +/* support for MS Visual C++ compiler */ + + #if _MSC_VER >= 1000 + #define __HIL_PACKED_PRE + #define __HIL_PACKED_POST + #define __HIL_PRAGMA_PACK_ENABLE + #define __HIL_PRAGMA_PACK_1(label) pack(push, label, 1) + #define __HIL_PRAGMA_UNPACK_1(label) pack(pop, label) + #ifndef STRICT + #define STRICT + #endif + #endif + +#elif defined (__ADS__) || defined (__REALVIEW__) +/* support for REALVIEW ARM compiler */ + + #define __HIL_PACKED_PRE __packed + #define __HIL_PACKED_POST + +#endif + +/*****************************************************************************/ +/* Define for variable length arrays at end of structures */ +/*****************************************************************************/ +#if defined(__GNUC__) || defined(__clang__) || defined (__ADS__) || defined (__REALVIEW__) +/* support for GNU, clang, ADS and REALVIEW ARM compiler. */ + #define __HIL_VARIABLE_LENGTH_ARRAY + +#elif defined(_MSC_VER) +/* support for MS Visual C++ compiler */ + + #if _MSC_VER >= 1000 + #define __HIL_VARIABLE_LENGTH_ARRAY 1 + #endif + +#endif + +/*****************************************************************************/ +/* Common used macros */ +/*****************************************************************************/ +/*! For counting the number of array elements */ +#define HIL_CNT_ELEMENT(array) (sizeof(array) / sizeof((array)[0])) + +/*! Compute the element count of an array to hold a given number of bytes. */ +#define HIL_CALC_ELEMENT_CNT(type, size) (((size) + sizeof(type) - 1)/ sizeof(type)) + +/*! Returns the smaller number of two values */ +#define HIL_MIN(a, b) (((a)<(b))?(a):(b)) + +/*! Returns the bigger number of two values */ +#define HIL_MAX(a, b) (((a)>(b))?(a):(b)) + +/*! Calculates the offset of the given member in a structure, in bytes */ +#define HIL_OFFSETOF(type, member) (((unsigned long)&(((type*)(1))->member)) - 1) + +/*! Returns the size of the given member of a structure */ +#define HIL_MEMBERSIZE(type, member) (sizeof(((type *)1)->member)) + +/*! Returns the address of the object containing the given member */ +#if defined(__GNUC__) && !defined(_lint) + /* GNU has the facility to make type check */ + #define HIL_CONTAINEROF(ptr, type, member) \ + ({const typeof( ((type *)0)->member ) *__mptr = (ptr);\ + (type *)( (char *)__mptr - HIL_OFFSETOF(type,member));}) +#else + #define HIL_CONTAINEROF(ptr, type, member) \ + ((type *)((char*)(ptr) - HIL_OFFSETOF(type,member))) +#endif + +/*****************************************************************************/ +#else + #include "User_Compiler.h" +#endif + +#endif /* HIL_COMPILER_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ComponentID.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ComponentID.h new file mode 100644 index 0000000..b7ab914 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ComponentID.h @@ -0,0 +1,1938 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_ComponentID.h $: *//*! + + \file Hil_ComponentID.h + + This file contains all Hilscher components (task) identifiers. + + \note New component IDs will be administered by the software protocol (SPC) + department. + +**************************************************************************************/ +#ifndef HIL_COMPONENT_ID_H_ +#define HIL_COMPONENT_ID_H_ + +#include + +/* MessageId: HIL_COMPONENT_ID_UNKNOWN_IDENTIFIER */ +/* MessageText: The task identifier is unknown. */ +#define HIL_COMPONENT_ID_UNKNOWN_IDENTIFIER ((uint32_t)0x00000000L) + +/***********************************************************************************/ +/* TLR Timer identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TIMER */ +/* MessageText: TLR Timer Task. */ +#define HIL_COMPONENT_ID_TIMER ((uint32_t)0x00020001L) + +/***********************************************************************************/ +/* System task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_LIBSTORAGE */ +/* MessageText: LibStorage. */ +#define HIL_COMPONENT_ID_LIBSTORAGE ((uint32_t)0x00010000L) + +/* MessageId: HIL_COMPONENT_ID_MID_SYS */ +/* MessageText: Middleware System Task. */ +#define HIL_COMPONENT_ID_MID_SYS ((uint32_t)0x00010001L) + +/* MessageId: HIL_COMPONENT_ID_MID_DBG */ +/* MessageText: Middleware System Debug Backend Task. */ +#define HIL_COMPONENT_ID_MID_DBG ((uint32_t)0x00010002L) + +/* MessageId: HIL_COMPONENT_ID_RX_IDLE */ +/* MessageText: RX IDLE Task. */ +#define HIL_COMPONENT_ID_RX_IDLE ((uint32_t)0x00010003L) + +/* MessageId: HIL_COMPONENT_ID_IRQ_HANDLER */ +/* MessageText: IRQ Handler Task. */ +#define HIL_COMPONENT_ID_IRQ_HANDLER ((uint32_t)0x00010004L) + +/* MessageId: HIL_COMPONENT_ID_IDLE */ +/* MessageText: Idle Task. */ +#define HIL_COMPONENT_ID_IDLE ((uint32_t)0x00010005L) + +/* MessageId: HIL_COMPONENT_ID_BOOTUP */ +/* MessageText: Bootup Task. */ +#define HIL_COMPONENT_ID_BOOTUP ((uint32_t)0x00010006L) + +/* MessageId: HIL_COMPONENT_ID_RX_TIMER */ +/* MessageText: rcX Timer. */ +#define HIL_COMPONENT_ID_RX_TIMER ((uint32_t)0x00010007L) + +/* MessageId: HIL_COMPONENT_ID_MAINTENANCE */ +/* MessageText: Maintenance Task. */ +#define HIL_COMPONENT_ID_MAINTENANCE ((uint32_t)0x00010008L) + +/***********************************************************************************/ +/* EtherCAT Base stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT */ +/* MessageText: EtherCAT Stack. */ +#define HIL_COMPONENT_ID_ECAT ((uint32_t)0x00200000L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_ESM */ +/* MessageText: EtherCAT ESM Task. */ +#define HIL_COMPONENT_ID_ECAT_ESM ((uint32_t)0x00200001L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_MBX */ +/* MessageText: EtherCAT Mailbox Task. */ +#define HIL_COMPONENT_ID_ECAT_MBX ((uint32_t)0x00200002L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_CYCLIC_IN */ +/* MessageText: EtherCAT Cyclic Input Task. */ +#define HIL_COMPONENT_ID_ECAT_CYCLIC_IN ((uint32_t)0x00200003L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_CYCLIC_OUT */ +/* MessageText: EtherCAT Cyclic Output Task. */ +#define HIL_COMPONENT_ID_ECAT_CYCLIC_OUT ((uint32_t)0x00200004L) + +/***********************************************************************************/ +/* EtherCAT CoE stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_COE */ +/* MessageText: EtherCAT CoE Task. */ +#define HIL_COMPONENT_ID_ECAT_COE ((uint32_t)0x00210001L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_COE_PDO */ +/* MessageText: EtherCAT CoE PDO Task. */ +#define HIL_COMPONENT_ID_ECAT_COE_PDO ((uint32_t)0x00210002L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_COE_SDO */ +/* MessageText: EtherCAT CoE SDO Task. */ +#define HIL_COMPONENT_ID_ECAT_COE_SDO ((uint32_t)0x00210003L) + +/***********************************************************************************/ +/* EtherCAT VoE stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_VOE */ +/* MessageText: EtherCAT VoE Task. */ +#define HIL_COMPONENT_ID_ECAT_VOE ((uint32_t)0x00260001L) + +/***********************************************************************************/ +/* EtherCAT FoE stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_FOE */ +/* MessageText: EtherCAT FoE Task. */ +#define HIL_COMPONENT_ID_ECAT_FOE ((uint32_t)0x00240001L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_FOE_FH */ +/* MessageText: EtherCAT FoE File Handler Task. */ +#define HIL_COMPONENT_ID_ECAT_FOE_FH ((uint32_t)0x00240002L) + +/***********************************************************************************/ +/* EtherCAT EoE stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_EOE */ +/* MessageText: EtherCAT EoE Task. */ +#define HIL_COMPONENT_ID_ECAT_EOE ((uint32_t)0x00230001L) + +/***********************************************************************************/ +/* EtherCAT SoE stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_SOE_SSC */ +/* MessageText: EtherCAT SoE SSC-Task. */ +#define HIL_COMPONENT_ID_ECAT_SOE_SSC ((uint32_t)0x00220001L) + +/* MessageId: HIL_COMPONENT_ID_ECAT_SOE_IDN */ +/* MessageText: EtherCAT SoE IDN-Task. */ +#define HIL_COMPONENT_ID_ECAT_SOE_IDN ((uint32_t)0x00220002L) + +/***********************************************************************************/ +/* Example Tasks */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EXAMPLE_TASK1 */ +/* MessageText: Example Task 1. */ +#define HIL_COMPONENT_ID_EXAMPLE_TASK1 ((uint32_t)0x00030001L) + +/* MessageId: HIL_COMPONENT_ID_EXAMPLE_TASK2 */ +/* MessageText: Example Task 2. */ +#define HIL_COMPONENT_ID_EXAMPLE_TASK2 ((uint32_t)0x00040001L) + +/* MessageId: HIL_COMPONENT_ID_EXAMPLE_TASK3 */ +/* MessageText: Example Task 3. */ +#define HIL_COMPONENT_ID_EXAMPLE_TASK3 ((uint32_t)0x00050001L) + +/***********************************************************************************/ +/* EtherNet/IP Encapsulation */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_ENCAP */ +/* MessageText: EthernetIP Encapsulation Task. */ +#define HIL_COMPONENT_ID_EIP_ENCAP ((uint32_t)0x001E0001L) + +/* MessageId: HIL_COMPONENT_ID_EIP_CL1 */ +/* MessageText: EthernetIP Encapsulation Task Class 1 services. */ +#define HIL_COMPONENT_ID_EIP_CL1 ((uint32_t)0x001E0002L) + +/***********************************************************************************/ +/* EtherNet/IP Object */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_OBJECT */ +/* MessageText: EthernetIP Object Task. */ +#define HIL_COMPONENT_ID_EIP_OBJECT ((uint32_t)0x001F0001L) + +/***********************************************************************************/ +/* EtherNet/Ip HAL EDD 2PS task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_EDD_LOW */ +/* MessageText: EtherNet/Ip Low Priority EDD Task. */ +#define HIL_COMPONENT_ID_EIP_EDD_LOW ((uint32_t)0x00EF0001L) + +/* MessageId: HIL_COMPONENT_ID_EIP_EDD_HIGH */ +/* MessageText: EtherNet/Ip High Priority EDD Task. */ +#define HIL_COMPONENT_ID_EIP_EDD_HIGH ((uint32_t)0x00EE0001L) + +/***********************************************************************************/ +/* PROFINET IO task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PNIO_CMCTL */ +/* MessageText: PROFINET IO-Controller Context Management Task. */ +#define HIL_COMPONENT_ID_PNIO_CMCTL ((uint32_t)0x000A0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_CMDEV */ +/* MessageText: PROFINET IO-Device Context Management Task. */ +#define HIL_COMPONENT_ID_PNIO_CMDEV ((uint32_t)0x000B0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_ACP */ +/* MessageText: PROFINET IO ACP Task. */ +#define HIL_COMPONENT_ID_PNIO_ACP ((uint32_t)0x00110001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_DCP */ +/* MessageText: PROFINET IO DCP Task. */ +#define HIL_COMPONENT_ID_PNIO_DCP ((uint32_t)0x00120001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_EDD */ +/* MessageText: PROFINET IO EDD Task. */ +#define HIL_COMPONENT_ID_PNIO_EDD ((uint32_t)0x000E0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_MGT */ +/* MessageText: PROFINET IO Management Task. */ +#define HIL_COMPONENT_ID_PNIO_MGT ((uint32_t)0x00130001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_APCTL */ +/* MessageText: PROFINET IO-Controller Application Task. */ +#define HIL_COMPONENT_ID_PNIO_APCTL ((uint32_t)0x000C0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_APDEV */ +/* MessageText: PROFINET IO-Device Application Task. */ +#define HIL_COMPONENT_ID_PNIO_APDEV ((uint32_t)0x000D0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_APCFG */ +/* MessageText: PROFINET IO-Controller Configuration Task. */ +#define HIL_COMPONENT_ID_PNIO_APCFG ((uint32_t)0x00140001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_IF */ +/* MessageText: PROFINET IO-Device Interface Task. */ +#define HIL_COMPONENT_ID_PNS_IF ((uint32_t)0x00300001L) + +/* MessageId: HIL_COMPONENT_ID_PNIOD_16BITIO */ +/* MessageText: PROFINET IO-Device 16Bit IO Application Task. */ +#define HIL_COMPONENT_ID_PNIOD_16BITIO ((uint32_t)0x003A0001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_32BITIO */ +/* MessageText: PROFINET IO-Device 32Bit IO Application Task. */ +#define HIL_COMPONENT_ID_PNS_32BITIO ((uint32_t)0x005E0001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_4BITIO */ +/* MessageText: PROFINET IO-Device 4Bit IO Application Task. */ +#define HIL_COMPONENT_ID_PNS_4BITIO ((uint32_t)0x00450001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_SOCKET_SRV */ +/* MessageText: PROFINET IO-Device Socket Server Task. */ +#define HIL_COMPONENT_ID_PNS_SOCKET_SRV ((uint32_t)0x00520001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_EDD_HIGH */ +/* MessageText: PROFINET IO-Device High Priority EDD Task. */ +#define HIL_COMPONENT_ID_PNS_EDD_HIGH ((uint32_t)0x00530001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_EDD_LOW */ +/* MessageText: PROFINET IO-Device Low Priority EDD Task. */ +#define HIL_COMPONENT_ID_PNS_EDD_LOW ((uint32_t)0x00540001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_SOCKET */ +/* MessageText: PROFINET IO-Device Socket Task. */ +#define HIL_COMPONENT_ID_PNS_SOCKET ((uint32_t)0x00550001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_DCP */ +/* MessageText: PROFINET IO-Device DCP Task. */ +#define HIL_COMPONENT_ID_PNS_DCP ((uint32_t)0x00560001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_CLRPC */ +/* MessageText: PROFINET IO-Device Connectionless RPC Task. */ +#define HIL_COMPONENT_ID_PNS_CLRPC ((uint32_t)0x00570001L) + +/* MessageId: HIL_COMPONENT_ID_PNS_IF_INTERN */ +/* MessageText: PROFINET IO-Device Stack internal Interface Task. */ +#define HIL_COMPONENT_ID_PNS_IF_INTERN ((uint32_t)0x00580001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_IRT_SCHEDULER */ +/* MessageText: PROFINET IO IRT Scheduler Task. */ +#define HIL_COMPONENT_ID_PNIO_IRT_SCHEDULER ((uint32_t)0x00810001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_RTA */ +/* MessageText: PROFINET IO RTA Task. */ +#define HIL_COMPONENT_ID_PNIO_RTA ((uint32_t)0x00A70001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_RTC */ +/* MessageText: PROFINET IO RTC Task. */ +#define HIL_COMPONENT_ID_PNIO_RTC ((uint32_t)0x00A80001L) + +/* MessageId: HIL_COMPONENT_ID_FODMI_TASK */ +/* MessageText: PROFINET IO FODMI (FiberOptic Diagnosis) Task. */ +#define HIL_COMPONENT_ID_FODMI_TASK ((uint32_t)0x00A90001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_HAL_COMPUTE */ +/* MessageText: PROFINET IO HAL protocol Task. */ +#define HIL_COMPONENT_ID_PNIO_HAL_COMPUTE ((uint32_t)0x00AA0001L) + +/* MessageId: HIL_COMPONENT_ID_PNIO_HAL_IRQ */ +/* MessageText: PROFINET IO HAL interrupt Task. */ +#define HIL_COMPONENT_ID_PNIO_HAL_IRQ ((uint32_t)0x00AB0001L) + +/***********************************************************************************/ +/* RPC task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_RPC_TASK */ +/* MessageText: RPC Task. */ +#define HIL_COMPONENT_ID_RPC_TASK ((uint32_t)0x002E0001L) + +/***********************************************************************************/ +/* Router tasks */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ROUTER_OS_CONSOLE32 */ +/* MessageText: TLR-Router OS_Console32. */ +#define HIL_COMPONENT_ID_ROUTER_OS_CONSOLE32 ((uint32_t)0x002F0000L) + +/* MessageId: HIL_COMPONENT_ID_ROUTER_ECAT_VOE */ +/* MessageText: TLR-Router EtherCAT VoE. */ +#define HIL_COMPONENT_ID_ROUTER_ECAT_VOE ((uint32_t)0x002F0001L) + +/* MessageId: HIL_COMPONENT_ID_ROUTER_HIF_PACKET */ +/* MessageText: TLR-Router DPM. */ +#define HIL_COMPONENT_ID_ROUTER_HIF_PACKET ((uint32_t)0x002F0002L) + +/***********************************************************************************/ +/* PowerLink tasks */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EPL_NMT */ +/* MessageText: Ethernet PowerLink NMT Task. */ +#define HIL_COMPONENT_ID_EPL_NMT ((uint32_t)0x00170000L) + +/* MessageId: HIL_COMPONENT_ID_EPL_PCK */ +/* MessageText: Ethernet PowerLink Packet Task. */ +#define HIL_COMPONENT_ID_EPL_PCK ((uint32_t)0x00170001L) + +/* MessageId: HIL_COMPONENT_ID_EPL_DPM */ +/* MessageText: Ethernet PowerLink DPM Task. */ +#define HIL_COMPONENT_ID_EPL_DPM ((uint32_t)0x00170002L) + +/* MessageId: HIL_COMPONENT_ID_PLSV3_AP */ +/* MessageText: Ethernet PowerLink AP Task. */ +#define HIL_COMPONENT_ID_PLSV3_AP ((uint32_t)0x00E10000L) + +/* MessageId: HIL_COMPONENT_ID_PLSV3_IF */ +/* MessageText: Ethernet PowerLink CN IF Task. */ +#define HIL_COMPONENT_ID_PLSV3_IF ((uint32_t)0x00E30000L) + +/* MessageId: HIL_COMPONENT_ID_PLSV3_NMT */ +/* MessageText: Ethernet PowerLink CN NMT Task. */ +#define HIL_COMPONENT_ID_PLSV3_NMT ((uint32_t)0x00E60000L) + +/* MessageId: HIL_COMPONENT_ID_PLV3_COMMON */ +/* MessageText: Ethernet PowerLink Common Task. */ +#define HIL_COMPONENT_ID_PLV3_COMMON ((uint32_t)0x00E70000L) + +/* MessageId: HIL_COMPONENT_ID_PLSV3_DRVETH */ +/* MessageText: Ethernet Powerlink DrvEth Adapter Task. */ +#define HIL_COMPONENT_ID_PLSV3_DRVETH ((uint32_t)0x00E80000L) + +/***********************************************************************************/ +/* PowerLink PDO task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EPL_PDO */ +/* MessageText: Ethernet PowerLink PDO Task. */ +#define HIL_COMPONENT_ID_EPL_PDO ((uint32_t)0x00150000L) + +/***********************************************************************************/ +/* PowerLink SDO task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EPL_SDO */ +/* MessageText: Ethernet PowerLink SDO Task. */ +#define HIL_COMPONENT_ID_EPL_SDO ((uint32_t)0x00160000L) + +/***********************************************************************************/ +/* PowerLink MN task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EPL_MN */ +/* MessageText: Ethernet PowerLink MN Task. */ +#define HIL_COMPONENT_ID_EPL_MN ((uint32_t)0x003D0000L) + +/***********************************************************************************/ +/* AS-Interface task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ASI_ECTRL */ +/* MessageText: AS-Interface ECTRL task (ASi stack). */ +#define HIL_COMPONENT_ID_ASI_ECTRL ((uint32_t)0x00320000L) + +/* MessageId: HIL_COMPONENT_ID_ASI_AP */ +/* MessageText: AS-Interface Application task (example). */ +#define HIL_COMPONENT_ID_ASI_AP ((uint32_t)0x00000002L) + +/***********************************************************************************/ +/* TCPUDP task identifiers (TCP/IP stack) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TCPUDP */ +/* MessageText: TCPUDP task (TCP/IP stack). */ +#define HIL_COMPONENT_ID_TCPUDP ((uint32_t)0x00080000L) + +/* MessageId: HIL_COMPONENT_ID_TCPIP_AP */ +/* MessageText: TCP/IP stack Application task. */ +#define HIL_COMPONENT_ID_TCPIP_AP ((uint32_t)0x00000001L) + +/* MessageId: HIL_COMPONENT_ID_TCPIP_SOCKIF */ +/* MessageText: TCP/IP Socket Interface. */ +#define HIL_COMPONENT_ID_TCPIP_SOCKIF ((uint32_t)0x00740002L) + +/***********************************************************************************/ +/* Sercos task identifiers (Slave) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_API */ +/* MessageText: Sercos API task. */ +#define HIL_COMPONENT_ID_SERCOSIII_API ((uint32_t)0x00340000L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_DL */ +/* MessageText: SERCOSIII DL task. */ +#define HIL_COMPONENT_ID_SERCOSIII_DL ((uint32_t)0x00350000L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SVC */ +/* MessageText: SERCOSIII SVC task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SVC ((uint32_t)0x00330000L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_ETH */ +/* MessageText: SERCOSIII ETH task. */ +#define HIL_COMPONENT_ID_SERCOSIII_ETH ((uint32_t)0x00360000L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_NRT */ +/* MessageText: SERCOSIII NRT task. */ +#define HIL_COMPONENT_ID_SERCOSIII_NRT ((uint32_t)0x00360001L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_CYCLIC */ +/* MessageText: SERCOSIII cyclic task. */ +#define HIL_COMPONENT_ID_SERCOSIII_CYCLIC ((uint32_t)0x00370000L) + +/***********************************************************************************/ +/* PROFIBUS task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_DL */ +/* MessageText: PROFIBUS Data Link Layer Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_DL ((uint32_t)0x00060000L) + +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_FSPMS */ +/* MessageText: PROFIBUS Slave Fieldbus Service Protocol Machine Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_FSPMS ((uint32_t)0x00090000L) + +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_APS */ +/* MessageText: PROFIBUS Slave Application Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_APS ((uint32_t)0x001D0000L) + +/***********************************************************************************/ +/* PROFIBUS Master task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_FSPMM */ +/* MessageText: PROFIBUS Master Fieldbus Service Protocol Machine Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_FSPMM ((uint32_t)0x00380000L) + +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_APM */ +/* MessageText: PROFIBUS Master Application Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_APM ((uint32_t)0x00390000L) + +/***********************************************************************************/ +/* PROFIBUS Master task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SNMP_SERVER */ +/* MessageText: SNMP Server Task. */ +#define HIL_COMPONENT_ID_SNMP_SERVER ((uint32_t)0x003B0000L) + +/* MessageId: HIL_COMPONENT_ID_MIB_DATABASE */ +/* MessageText: MIB Database for SNMP and LLDP. */ +#define HIL_COMPONENT_ID_MIB_DATABASE ((uint32_t)0x003C0000L) + +/* MessageId: HIL_COMPONENT_ID_ICONL_TIMER */ +/* MessageText: Icon-L Timer Task for iCon-L@netX. */ +#define HIL_COMPONENT_ID_ICONL_TIMER ((uint32_t)0x002A0000L) + +/* MessageId: HIL_COMPONENT_ID_ICONL_RUN */ +/* MessageText: Icon-L Run Task for iCon-L@netX. */ +#define HIL_COMPONENT_ID_ICONL_RUN ((uint32_t)0x00290000L) + +/* MessageId: HIL_COMPONENT_ID_LLDP */ +/* MessageText: LLDP protocol task */ +#define HIL_COMPONENT_ID_LLDP ((uint32_t)0x003E0000L) + +/***********************************************************************************/ +/* CAN task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CAN_DL */ +/* MessageText: CAN DL Task (Data Link Layer). */ +#define HIL_COMPONENT_ID_CAN_DL ((uint32_t)0x003F0000L) + +/* MessageId: HIL_COMPONENT_ID_CAN_DL_GCI_ADAPTER */ +/* MessageText: CAN DL GCI-Adapter. */ +#define HIL_COMPONENT_ID_CAN_DL_GCI_ADAPTER ((uint32_t)0x003F0001L) + +/***********************************************************************************/ +/* DDL task identifiers (J060219 Bosch Rexroth DDL mit netX) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DDL_ENPDDL */ +/* MessageText: ENPDDL gateway task. */ +#define HIL_COMPONENT_ID_DDL_ENPDDL ((uint32_t)0x00400000L) + +/* MessageId: HIL_COMPONENT_ID_DDL_DDL */ +/* MessageText: DDL protocol task. */ +#define HIL_COMPONENT_ID_DDL_DDL ((uint32_t)0x00410000L) + +/***********************************************************************************/ +/* CANopen Master task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CANOPEN_MASTER */ +/* MessageText: CANopen Master task (CANopen Master stack). */ +#define HIL_COMPONENT_ID_CANOPEN_MASTER ((uint32_t)0x00420000L) + +/***********************************************************************************/ +/* CANopen Slave task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CANOPEN_SLAVE */ +/* MessageText: CANopen Slave task (CANopen Slave stack). */ +#define HIL_COMPONENT_ID_CANOPEN_SLAVE ((uint32_t)0x00430000L) + +/***********************************************************************************/ +/* UsbTLRRouter identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_USB_TLRROUTER */ +/* MessageText: Usb-TLR-Router Task (Usb-TLRRouter). */ +#define HIL_COMPONENT_ID_USB_TLRROUTER ((uint32_t)0x00440000L) + +/***********************************************************************************/ +/* CAN DL AP sample identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CANDL_APSAMPLE */ +/* MessageText: CAN DL application sample Task. */ +#define HIL_COMPONENT_ID_CANDL_APSAMPLE ((uint32_t)0x00460000L) + +/***********************************************************************************/ +/* DeviceNet FAL (Fieldbus Application Layer) task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DEVNET_FAL */ +/* MessageText: DeviceNet FAL Task (Fieldbus Application Layer). */ +#define HIL_COMPONENT_ID_DEVNET_FAL ((uint32_t)0x00470000L) + +/***********************************************************************************/ +/* DeviceNet AP task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DEVNET_AP */ +/* MessageText: DeviceNet AP Task (Application). */ +#define HIL_COMPONENT_ID_DEVNET_AP ((uint32_t)0x005B0000L) + +/***********************************************************************************/ +/* ObjectDictionary V2 DPM Adapter */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DPM_OD2 */ +/* MessageText: Object Dictionary DPM-Adapter Task. */ +#define HIL_COMPONENT_ID_DPM_OD2 ((uint32_t)0x00480000L) + +/***********************************************************************************/ +/* CANopen Master application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CANOPEN_APM */ +/* MessageText: CANopen Master Application Task. */ +#define HIL_COMPONENT_ID_CANOPEN_APM ((uint32_t)0x00490000L) + +/***********************************************************************************/ +/* CANopen Slave application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CANOPEN_APS */ +/* MessageText: CANopen Slave Application Task. */ +#define HIL_COMPONENT_ID_CANOPEN_APS ((uint32_t)0x004A0000L) + +/***********************************************************************************/ +/* Sercos3 Slave application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOS_SL */ +/* MessageText: Sercos3 Slave Task. */ +#define HIL_COMPONENT_ID_SERCOS_SL ((uint32_t)0x004B0000L) + +/***********************************************************************************/ +/* ECAT Slave DPM application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_DPM */ +/* MessageText: EtherCAT Slave DPM Task. */ +#define HIL_COMPONENT_ID_ECAT_DPM ((uint32_t)0x004C0000L) + +/***********************************************************************************/ +/* ECAT Slave InxAp application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECAT_INXAP */ +/* MessageText: EtherCAT Slave InxAp Task. */ +#define HIL_COMPONENT_ID_ECAT_INXAP ((uint32_t)0x004C0001L) + +/***********************************************************************************/ +/* Sercos Slave Communication task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SL_COM */ +/* MessageText: Sercos Slave Communication Task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SL_COM ((uint32_t)0x004E0000L) + +/***********************************************************************************/ +/* Sercos Slave Sercice Channel task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SL_SVC */ +/* MessageText: Sercos Slave Service Channel Task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SL_SVC ((uint32_t)0x004F0000L) + +/***********************************************************************************/ +/* Sercos Slave Real Time Data task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SL_RTD */ +/* MessageText: Sercos Slave Real Time Data Task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SL_RTD ((uint32_t)0x00500000L) + +/***********************************************************************************/ +/* Sercos Slave Application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SL_AP */ +/* MessageText: Sercos Slave Application Task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SL_AP ((uint32_t)0x00510000L) + +/***********************************************************************************/ +/* Sercos Slave IDN task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIII_SL_IDN */ +/* MessageText: Sercos Slave IDN Task. */ +#define HIL_COMPONENT_ID_SERCOSIII_SL_IDN ((uint32_t)0x00850000L) + +/***********************************************************************************/ +/* Ethernet/Ip Adapter Application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_APS */ +/* MessageText: EtherNet/Ip Adapter Application-Task. */ +#define HIL_COMPONENT_ID_EIP_APS ((uint32_t)0x00590000L) + +/***********************************************************************************/ +/* Ethernet/Ip Scanner Application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_APM */ +/* MessageText: EtherNet/Ip Scanner Application-Task. */ +#define HIL_COMPONENT_ID_EIP_APM ((uint32_t)0x005A0000L) + +/***********************************************************************************/ +/* Ethernet Interface Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ETH_INTF */ +/* MessageText: Ethernet Interface Task. */ +#define HIL_COMPONENT_ID_ETH_INTF ((uint32_t)0x005D0000L) + +/***********************************************************************************/ +/* MID Startup Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MID_STARTUP */ +/* MessageText: MID Startup Task. */ +#define HIL_COMPONENT_ID_MID_STARTUP ((uint32_t)0x005F0000L) + +/***********************************************************************************/ +/* OMB task identifiers (Open Modbus TCP) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_OMB_OMBTASK */ +/* MessageText: OMB task (Open Modbus TCP). */ +#define HIL_COMPONENT_ID_OMB_OMBTASK ((uint32_t)0x00600000L) + +/* MessageId: HIL_COMPONENT_ID_OMB_OMBAPTASK */ +/* MessageText: OMB task (Open Modbus TCP) Application task. */ +#define HIL_COMPONENT_ID_OMB_OMBAPTASK ((uint32_t)0x00610001L) + +/***********************************************************************************/ +/* DNS task identifiers (DeviceNet Slave) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DNS_FAL */ +/* MessageText: DeviceNet Slave FAL Task (Fieldbus Application Layer). */ +#define HIL_COMPONENT_ID_DNS_FAL ((uint32_t)0x00620000L) + +/* MessageId: HIL_COMPONENT_ID_DNS_AP */ +/* MessageText: DeviceNet Slave AP Task (Dualport Application). */ +#define HIL_COMPONENT_ID_DNS_AP ((uint32_t)0x00630000L) + +/***********************************************************************************/ +/* EtherCAT Master AP Task identifiers (EtherCAT Master AP Task) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ETHERCAT_MASTER_AP */ +/* MessageText: EtherCAT Master AP Task. */ +#define HIL_COMPONENT_ID_ETHERCAT_MASTER_AP ((uint32_t)0x00640000L) + +/* MessageId: HIL_COMPONENT_ID_ETHERCAT_MASTER */ +/* MessageText: EtherCAT Master Stack Task. */ +#define HIL_COMPONENT_ID_ETHERCAT_MASTER ((uint32_t)0x00650000L) + +/***********************************************************************************/ +/* Ethernet Analyzer Transfer Task identifiers (Ethernet Analyzer Transfer Task) */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_AN_TRANS */ +/* MessageText: Ethernet Analyzer Transfer Task. */ +#define HIL_COMPONENT_ID_AN_TRANS ((uint32_t)0x00660000L) + +/***********************************************************************************/ +/* PROFIBUS MPI */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_MPI */ +/* MessageText: PROFIBUS MPI Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_MPI ((uint32_t)0x00670000L) + +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_MPI_AP */ +/* MessageText: PROFIBUS MPI Application Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_MPI_AP ((uint32_t)0x00680000L) + +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_MPI_RFC */ +/* MessageText: PROFIBUS MPI Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_MPI_RFC ((uint32_t)0x00730000L) + +/***********************************************************************************/ +/* PROFIBUS FSPMM2 */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIBUS_FSPMM2 */ +/* MessageText: PROFIBUS FSPMM2 Task. */ +#define HIL_COMPONENT_ID_PROFIBUS_FSPMM2 ((uint32_t)0x00690000L) + +/***********************************************************************************/ +/* CC-Link Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CCLINK_SLAVE */ +/* MessageText: CC-Link Slave Task. */ +#define HIL_COMPONENT_ID_CCLINK_SLAVE ((uint32_t)0x006A0000L) + +/* MessageId: HIL_COMPONENT_ID_CCLINK_APS */ +/* MessageText: CC-Link Slave Application Task. */ +#define HIL_COMPONENT_ID_CCLINK_APS ((uint32_t)0x006B0000L) + +/***********************************************************************************/ +/* Lenze EtherCAT Slave Anbindung */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECS_LENZE_MAIN */ +/* MessageText: Lenze EtherCAT slave interface for 9400, main task. */ +#define HIL_COMPONENT_ID_ECS_LENZE_MAIN ((uint32_t)0x006C0000L) + +/* MessageId: HIL_COMPONENT_ID_ECS_LENZE_BRIDGE */ +/* MessageText: Lenze EtherCAT slave interface for 9400, bus bridge. */ +#define HIL_COMPONENT_ID_ECS_LENZE_BRIDGE ((uint32_t)0x006C0001L) + +/***********************************************************************************/ +/* IO-Link Master Task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_IOLINK_MASTER */ +/* MessageText: IO-Link Master Task. */ +#define HIL_COMPONENT_ID_IOLINK_MASTER ((uint32_t)0x006D0000L) + +/* MessageId: HIL_COMPONENT_ID_IOLINK_APPLICATION */ +/* MessageText: IO-Link Application and Application Layer Task. */ +#define HIL_COMPONENT_ID_IOLINK_APPLICATION ((uint32_t)0x00A50000L) + +/* MessageId: HIL_COMPONENT_ID_IOLINK_TMG_IO */ +/* MessageText: Task to communicate with the IO-Link Master with TMG IO protocol. */ +#define HIL_COMPONENT_ID_IOLINK_TMG_IO ((uint32_t)0x00A50001L) + +/* MessageId: HIL_COMPONENT_ID_IOLINK_TEST_PROTOCOL */ +/* MessageText: Task to access the IO-Link master with test protocol. */ +#define HIL_COMPONENT_ID_IOLINK_TEST_PROTOCOL ((uint32_t)0x00A50002L) + +/***********************************************************************************/ +/* MODBUS RTU */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MODBUS_RTU */ +/* MessageText: MODBUS RTU Task. */ +#define HIL_COMPONENT_ID_MODBUS_RTU ((uint32_t)0x006E0000L) + +/***********************************************************************************/ +/* MODBUS RTU AP */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MODBUS_RTU_AP */ +/* MessageText: MODBUS RTU Application Task. */ +#define HIL_COMPONENT_ID_MODBUS_RTU_AP ((uint32_t)0x006F0000L) + +/***********************************************************************************/ +/* Sercos Master stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SIII_MA_CP */ +/* MessageText: Sercos Communication Phase Task */ +#define HIL_COMPONENT_ID_SIII_MA_CP ((uint32_t)0x00700000L) + +/***********************************************************************************/ +/* Sercos Master stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SIII_MA_AP */ +/* MessageText: Sercos DPM AP Task */ +#define HIL_COMPONENT_ID_SIII_MA_AP ((uint32_t)0x00720000L) + +/***********************************************************************************/ +/* Sercos Master stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIIIMASTER_SVC */ +/* MessageText: Sercos Service Channel Task */ +#define HIL_COMPONENT_ID_SERCOSIIIMASTER_SVC ((uint32_t)0x00710000L) + +/***********************************************************************************/ +/* Sercos Master stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIIIMASTER_ACFG */ +/* MessageText: Sercos Auto-Configure Task */ +#define HIL_COMPONENT_ID_SERCOSIIIMASTER_ACFG ((uint32_t)0x00B70000L) + +/***********************************************************************************/ +/* Sercos Master stack task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_CLIENT */ +/* MessageText: Sercos S/IP Client Task */ +#define HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_CLIENT ((uint32_t)0x00BA0000L) + +/* MessageId: HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_SERVER */ +/* MessageText: Sercos S/IP Server Task */ +#define HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_SERVER ((uint32_t)0x00BA0001L) + +/***********************************************************************************/ +/* SSIO task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SSIO */ +/* MessageText: Serial Shift IO Task */ +#define HIL_COMPONENT_ID_SSIO ((uint32_t)0x00750000L) + +/***********************************************************************************/ +/* SSIO AP task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SSIO_AP */ +/* MessageText: Serial Shift IO Application Task */ +#define HIL_COMPONENT_ID_SSIO_AP ((uint32_t)0x00760000L) + +/***********************************************************************************/ +/* MAP NIC task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MEMORY_MAP */ +/* MessageText: netIC Mapping Task */ +#define HIL_COMPONENT_ID_MEMORY_MAP ((uint32_t)0x00770000L) + +/***********************************************************************************/ +/* MPI Gateway task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MPI_GATEWAY */ +/* MessageText: MPI Gateway Task */ +#define HIL_COMPONENT_ID_MPI_GATEWAY ((uint32_t)0x00780000L) + +/***********************************************************************************/ +/* Sercos Master stack NRT task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERCOSIIIMASTER_NRT */ +/* MessageText: Sercos NRT Channel Task */ +#define HIL_COMPONENT_ID_SERCOSIIIMASTER_NRT ((uint32_t)0x00790000L) + +/***********************************************************************************/ +/* AS-Interface Master task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ASI_MASTER */ +/* MessageText: AS-Interface Master Task (AS-Interface Master stack). */ +#define HIL_COMPONENT_ID_ASI_MASTER ((uint32_t)0x007A0000L) + +/***********************************************************************************/ +/* AS-Interface Master application task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ASI_APM */ +/* MessageText: AS-Interface Master Application Task. */ +#define HIL_COMPONENT_ID_ASI_APM ((uint32_t)0x007B0000L) + +/***********************************************************************************/ +/* CompoNet Slave task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_COMPONET_SLAVE */ +/* MessageText: CompoNet Slave Task. */ +#define HIL_COMPONENT_ID_COMPONET_SLAVE ((uint32_t)0x007C0000L) + +/* MessageId: HIL_COMPONENT_ID_COMPONET_SLAVE_AP */ +/* MessageText: CompoNet Slave Application Task. */ +#define HIL_COMPONENT_ID_COMPONET_SLAVE_AP ((uint32_t)0x007D0000L) + +/***********************************************************************************/ +/* ASCII task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ASCII */ +/* MessageText: ASCII Protocol Task. */ +#define HIL_COMPONENT_ID_ASCII ((uint32_t)0x007E0000L) + +/* MessageId: HIL_COMPONENT_ID_ASCII_AP */ +/* MessageText: ASCII Application Task. */ +#define HIL_COMPONENT_ID_ASCII_AP ((uint32_t)0x007F0000L) + +/***********************************************************************************/ +/* netscript task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NETSCRIPT */ +/* MessageText: netScript Task. */ +#define HIL_COMPONENT_ID_NETSCRIPT ((uint32_t)0x00800000L) + +/***********************************************************************************/ +/* Marshaller task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MARSHALLER */ +/* MessageText: Marshaller: Main Task. */ +#define HIL_COMPONENT_ID_MARSHALLER ((uint32_t)0x00820000L) + +/* MessageId: HIL_COMPONENT_ID_PACKET_ROUTER */ +/* MessageText: Marshaller: Packet Router Task. */ +#define HIL_COMPONENT_ID_PACKET_ROUTER ((uint32_t)0x00830000L) + +/* MessageId: HIL_COMPONENT_ID_TCP_CONNECTOR */ +/* MessageText: Marshaller: TCP Connection Task. */ +#define HIL_COMPONENT_ID_TCP_CONNECTOR ((uint32_t)0x00860000L) + +/***********************************************************************************/ +/* netTAP 100 Gateway task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NT100_GATEWAY */ +/* MessageText: netTAP Gateway Task. */ +#define HIL_COMPONENT_ID_NT100_GATEWAY ((uint32_t)0x00840000L) + +/***********************************************************************************/ +/* Item Server task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ITEM_SERVER */ +/* MessageText: Item Server Task. */ +#define HIL_COMPONENT_ID_ITEM_SERVER ((uint32_t)0x00870000L) + +/***********************************************************************************/ +/* ISaGRAF task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_LOG */ +/* MessageText: telnet task for ISaGRAF log. */ +#define HIL_COMPONENT_ID_ISAGRAF_LOG ((uint32_t)0x008C0000L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_VM */ +/* MessageText: Virtual Machine ISaGRAF task. */ +#define HIL_COMPONENT_ID_ISAGRAF_VM ((uint32_t)0x008B0000L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF */ +/* MessageText: ISaGRAF command task. */ +#define HIL_COMPONENT_ID_ISAGRAF ((uint32_t)0x008A0000L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_ETCP */ +/* MessageText: Ethernet ISaGRAF interface. */ +#define HIL_COMPONENT_ID_ISAGRAF_ETCP ((uint32_t)0x00890000L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_ISARSI */ +/* MessageText: RS232 ISaGRAF interface. */ +#define HIL_COMPONENT_ID_ISAGRAF_ISARSI ((uint32_t)0x00880000L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_MAINTENANCE */ +/* MessageText: ISaGRAF maintenance task. */ +#define HIL_COMPONENT_ID_ISAGRAF_MAINTENANCE ((uint32_t)0x008A0001L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_NTP */ +/* MessageText: ISaGRAF NTP task. */ +#define HIL_COMPONENT_ID_ISAGRAF_NTP ((uint32_t)0x008A0002L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_AP */ +/* MessageText: ISaGRAF AP task. */ +#define HIL_COMPONENT_ID_ISAGRAF_AP ((uint32_t)0x008A0003L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_FTP */ +/* MessageText: ISaGRAF FTP task. */ +#define HIL_COMPONENT_ID_ISAGRAF_FTP ((uint32_t)0x008A0004L) + +/* MessageId: HIL_COMPONENT_ID_ISAGRAF_DS */ +/* MessageText: ISaGRAF DS task. */ +#define HIL_COMPONENT_ID_ISAGRAF_DS ((uint32_t)0x008A0005L) + +/***********************************************************************************/ +/* DF1 task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DF1 */ +/* MessageText: DF1 Protocol Task. */ +#define HIL_COMPONENT_ID_DF1 ((uint32_t)0x008D0000L) + +/* MessageId: HIL_COMPONENT_ID_DF1_AP */ +/* MessageText: DF1 Application Task. */ +#define HIL_COMPONENT_ID_DF1_AP ((uint32_t)0x008E0000L) + +/***********************************************************************************/ +/* 3964R task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_3964R */ +/* MessageText: 3964R Protocol Task. */ +#define HIL_COMPONENT_ID_3964R ((uint32_t)0x008F0000L) + +/* MessageId: HIL_COMPONENT_ID_3964R_AP */ +/* MessageText: 3964R Application Task. */ +#define HIL_COMPONENT_ID_3964R_AP ((uint32_t)0x00900000L) + +/***********************************************************************************/ +/* IO Signals task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_IO_SIGNAL */ +/* MessageText: IO Signal Task. */ +#define HIL_COMPONENT_ID_IO_SIGNAL ((uint32_t)0x00910000L) + +/***********************************************************************************/ +/* ServX task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SERVX */ +/* MessageText: servX HTTP Server. */ +#define HIL_COMPONENT_ID_SERVX ((uint32_t)0x00920000L) + +/***********************************************************************************/ +/* TCPIP Application task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TCPIP_TCP_AP */ +/* MessageText: TCPUDP application task (TCP/IP stack). */ +#define HIL_COMPONENT_ID_TCPIP_TCP_AP ((uint32_t)0x00940000L) + +/***********************************************************************************/ +/* DLR task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_DLR */ +/* MessageText: EthernetIP DLR task. */ +#define HIL_COMPONENT_ID_EIP_DLR ((uint32_t)0x00950000L) + +/***********************************************************************************/ +/* FODMI task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_FODMI */ +/* MessageText: Fibre optic diagnostic monitoring interface task. */ +#define HIL_COMPONENT_ID_FODMI ((uint32_t)0x00960000L) + +/***********************************************************************************/ +/* PROFIDRIVE task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIDRIVE */ +/* MessageText: PROFIDRIVE task. */ +#define HIL_COMPONENT_ID_PROFIDRIVE ((uint32_t)0x00970000L) + +/***********************************************************************************/ +/*****/ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIDRIVE_PA */ +/* MessageText: PROFIDRIVE parameter Access interface task. */ +#define HIL_COMPONENT_ID_PROFIDRIVE_PA ((uint32_t)0x00980000L) + +/***********************************************************************************/ +/*****/ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIDRIVE_AP */ +/* MessageText: PROFIDRIVE user application task. */ +#define HIL_COMPONENT_ID_PROFIDRIVE_AP ((uint32_t)0x009A0000L) + +/***********************************************************************************/ +/*****/ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFIDRIVE_OD */ +/* MessageText: PROFIDRIVE Object Dictionary task. */ +#define HIL_COMPONENT_ID_PROFIDRIVE_OD ((uint32_t)0x00990000L) + +/***********************************************************************************/ +/* CANopen Object Dictionary */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ODV3 */ +/* MessageText: CANopen Object Dictionary task. */ +#define HIL_COMPONENT_ID_ODV3 ((uint32_t)0x009B0000L) + +/***********************************************************************************/ +/* VARAN Client Application */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_VARAN_CLIENT_AP */ +/* MessageText: VARAN Client application task. */ +#define HIL_COMPONENT_ID_VARAN_CLIENT_AP ((uint32_t)0x009D0000L) + +/***********************************************************************************/ +/* VARAN Client */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_VARAN_CLIENT */ +/* MessageText: VARAN Client task. */ +#define HIL_COMPONENT_ID_VARAN_CLIENT ((uint32_t)0x009C0000L) + +/***********************************************************************************/ +/* Modbus RTU Peripheral Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MODBUS_RTU_PERIPH */ +/* MessageText: Modbus RTU Peripheral Task. */ +#define HIL_COMPONENT_ID_MODBUS_RTU_PERIPH ((uint32_t)0x009E0000L) + +/***********************************************************************************/ +/* PROFINET RTA Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PROFINET_RTA */ +/* MessageText: PROFINET RTA (RealTime Acyclic) Task. */ +#define HIL_COMPONENT_ID_PROFINET_RTA ((uint32_t)0x009F0000L) + +/***********************************************************************************/ +/* Sercos Internet Protocol Service(SIP) task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SIII_SIP */ +/* MessageText: Sercos Internet Protocol Service Task. */ +#define HIL_COMPONENT_ID_SIII_SIP ((uint32_t)0x00A00000L) + +/***********************************************************************************/ +/* 3S CodeSys PLC Handler task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_3S_PLC_HANDLER */ +/* MessageText: 3S CodeSys PLC Handler Task. */ +#define HIL_COMPONENT_ID_3S_PLC_HANDLER ((uint32_t)0x00A10000L) + +/***********************************************************************************/ +/* 3S CodeSys PLC Handler AP task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_3S_PLC_HANDLER_AP */ +/* MessageText: 3S CodeSys PLC Handler AP Task. */ +#define HIL_COMPONENT_ID_3S_PLC_HANDLER_AP ((uint32_t)0x00A20000L) + +/***********************************************************************************/ +/* netPLC I/O Handler task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NETPLC_IO_HANDLER */ +/* MessageText: netPLC I/O Handler. */ +#define HIL_COMPONENT_ID_NETPLC_IO_HANDLER ((uint32_t)0x00A30000L) + +/***********************************************************************************/ +/* PowerLink MN task identifiers */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_TASK */ +/* MessageText: PowerLink MN Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_TASK ((uint32_t)0x00A40000L) + +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_AP_TASK */ +/* MessageText: PowerLink MN AP Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_AP_TASK ((uint32_t)0x00A40001L) + +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_NEW_DATA_TASK */ +/* MessageText: PowerLink MN NewData Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_NEW_DATA_TASK ((uint32_t)0x00A40002L) + +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_SDO_UDP_SOCK_TASK */ +/* MessageText: PowerLink MN SDO UDP Socket Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_SDO_UDP_SOCK_TASK ((uint32_t)0x00A40003L) + +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_VETH_TASK */ +/* MessageText: PowerLink MN VirtualEthernet Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_VETH_TASK ((uint32_t)0x00A40004L) + +/* MessageId: HIL_COMPONENT_ID_POWERLINK_MN_JOB_TOKEN_TASK */ +/* MessageText: PowerLink MN JobToken Task */ +#define HIL_COMPONENT_ID_POWERLINK_MN_JOB_TOKEN_TASK ((uint32_t)0x00A40005L) + +/***********************************************************************************/ +/* Recording task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_RECORDING */ +/* MessageText: Recording and logging Task. */ +#define HIL_COMPONENT_ID_RECORDING ((uint32_t)0x00A60000L) + +/***********************************************************************************/ +/* Insight Debug task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_INSIGHT */ +/* MessageText: Insight task. */ +#define HIL_COMPONENT_ID_INSIGHT ((uint32_t)0x00AC0000L) + +/***********************************************************************************/ +/* SmartWire Master Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_SMARTWIRE_MASTER */ +/* MessageText: SmartWire master task. */ +#define HIL_COMPONENT_ID_SMARTWIRE_MASTER ((uint32_t)0x00AD0000L) + +/***********************************************************************************/ +/* EtherCAT Slave V4 Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECSV4_ESM */ +/* MessageText: EtherCAT Slave V4 ESM Task. */ +#define HIL_COMPONENT_ID_ECSV4_ESM ((uint32_t)0x00AF0000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_MBX */ +/* MessageText: EtherCAT Slave V4 MBX Task. */ +#define HIL_COMPONENT_ID_ECSV4_MBX ((uint32_t)0x00B00000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_COE */ +/* MessageText: EtherCAT Slave V4 COE Task. */ +#define HIL_COMPONENT_ID_ECSV4_COE ((uint32_t)0x00B10000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_SDO */ +/* MessageText: EtherCAT Slave V4 SDO Task. */ +#define HIL_COMPONENT_ID_ECSV4_SDO ((uint32_t)0x00B10001L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_EOE */ +/* MessageText: EtherCAT Slave V4 EOE Task. */ +#define HIL_COMPONENT_ID_ECSV4_EOE ((uint32_t)0x00B20000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_FOE */ +/* MessageText: EtherCAT Slave V4 FOE Task. */ +#define HIL_COMPONENT_ID_ECSV4_FOE ((uint32_t)0x00B30000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_FOE_FH */ +/* MessageText: EtherCAT Slave V4 FOE FH Task. */ +#define HIL_COMPONENT_ID_ECSV4_FOE_FH ((uint32_t)0x00C40000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_SOE_SSC */ +/* MessageText: EtherCAT Slave V4 SOE_SSC Task. */ +#define HIL_COMPONENT_ID_ECSV4_SOE_SSC ((uint32_t)0x00B40000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_SOE_IDN */ +/* MessageText: EtherCAT Slave V4 SOE_IDN Task. */ +#define HIL_COMPONENT_ID_ECSV4_SOE_IDN ((uint32_t)0x00B40001L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_DPM */ +/* MessageText: EtherCAT Slave V4 DPM Task. */ +#define HIL_COMPONENT_ID_ECSV4_DPM ((uint32_t)0x00AE0000L) + +/* MessageId: HIL_COMPONENT_ID_NET_PROXY */ +/* MessageText: netPROXY. */ +#define HIL_COMPONENT_ID_NET_PROXY ((uint32_t)0x00B50000L) + +/* MessageId: HIL_COMPONENT_ID_ECSV4_AOE */ +/* MessageText: EtherCAT Slave V4 AoE Task. */ +#define HIL_COMPONENT_ID_ECSV4_AOE ((uint32_t)0x00BB0000L) + +/***********************************************************************************/ +/* netSMART Gateway Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NET_SMART_GATEWAY */ +/* MessageText: netSMART Gateway. */ +#define HIL_COMPONENT_ID_NET_SMART_GATEWAY ((uint32_t)0x00B60000L) + +/***********************************************************************************/ +/* TFTP Stack Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TFTP */ +/* MessageText: TFTP Stack Task. */ +#define HIL_COMPONENT_ID_TFTP ((uint32_t)0x00B80000L) + +/***********************************************************************************/ +/* TFTP App Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TFTP_AP */ +/* MessageText: TFTP Application Task. */ +#define HIL_COMPONENT_ID_TFTP_AP ((uint32_t)0x00B90000L) + +/***********************************************************************************/ +/* PTP Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PTP */ +/* MessageText: PTP Task. */ +#define HIL_COMPONENT_ID_PTP ((uint32_t)0x00BD0000L) + +/***********************************************************************************/ +/* User Area */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_USER_AREA */ +/* MessageText: User Area. */ +#define HIL_COMPONENT_ID_USER_AREA ((uint32_t)0x0FF00000L) + +/***********************************************************************************/ +/* User Area */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NETPROXY_S3S */ +/* MessageText: S3S netProxy adaptation task */ +#define HIL_COMPONENT_ID_NETPROXY_S3S ((uint32_t)0x00BC0000L) + +/***********************************************************************************/ +/* EtherNet/IP DLR IRQ Task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_EIP_DLR_IRQ */ +/* MessageText: PTP Task. */ +#define HIL_COMPONENT_ID_EIP_DLR_IRQ ((uint32_t)0x00BE0000L) + +/***********************************************************************************/ +/* FTP Server Stack Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_FTP_SERVER */ +/* MessageText: FTP Stack Task */ +#define HIL_COMPONENT_ID_FTP_SERVER ((uint32_t)0x00BF0000L) + +/***********************************************************************************/ +/* FTP Server Application Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_FTP_SERVER_AP */ +/* MessageText: FTP Application Task. */ +#define HIL_COMPONENT_ID_FTP_SERVER_AP ((uint32_t)0x00C00000L) + +/***********************************************************************************/ +/* netPROXY HIF Adapter Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXHIFADAPTER */ +/* MessageText: netPROXY HIF Adapter Task. */ +#define HIL_COMPONENT_ID_NPXHIFADAPTER ((uint32_t)0x00C20000L) + +/***********************************************************************************/ +/* netPROXY package EtherNetIP Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_EIS */ +/* MessageText: netPROXY package EtherNetIP Slave. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_EIS ((uint32_t)0x00C30000L) + +/***********************************************************************************/ +/* netHost task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NETHOST */ +/* MessageText: netHost Task. */ +#define HIL_COMPONENT_ID_NETHOST ((uint32_t)0x00C50000L) + +/***********************************************************************************/ +/* CIP Handler task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CIP_HANDLER */ +/* MessageText: CIP Handler Task. */ +#define HIL_COMPONENT_ID_CIP_HANDLER ((uint32_t)0x00C60000L) + +/***********************************************************************************/ +/* CPX Driver task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CPX_DRIVER */ +/* MessageText: CPX Driver Task. */ +#define HIL_COMPONENT_ID_CPX_DRIVER ((uint32_t)0x00C70000L) + +/***********************************************************************************/ +/* CPX Exchange task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CPX_EXCHANGE */ +/* MessageText: CPX Exchange Task. */ +#define HIL_COMPONENT_ID_CPX_EXCHANGE ((uint32_t)0x00C80000L) + +/***********************************************************************************/ +/* OSAL */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CPX_OSAL */ +/* MessageText: CPX Exchange Task. */ +#define HIL_COMPONENT_ID_CPX_OSAL ((uint32_t)0x00CA0000L) + +/***********************************************************************************/ +/* PROFINET IO CONTROLLER V3 */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PNM_AP */ +/* MessageText: PROFINET IO Controller V3 AP Task. */ +#define HIL_COMPONENT_ID_PNM_AP ((uint32_t)0x00CB0000L) + +/***********************************************************************************/ +/* ECMv4 */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECMV4_AP */ +/* MessageText: EtherCAT Master AP Task. */ +#define HIL_COMPONENT_ID_ECMV4_AP ((uint32_t)0x00D70000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_IF */ +/* MessageText: EtherCAT Master Interface Task. */ +#define HIL_COMPONENT_ID_ECMV4_IF ((uint32_t)0x00D60000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_LLD_SCHED */ +/* MessageText: LLD Scheduler. */ +#define HIL_COMPONENT_ID_ECMV4_LLD_SCHED ((uint32_t)0x00CC0000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_LLD_IF */ +/* MessageText: LLD IF. */ +#define HIL_COMPONENT_ID_ECMV4_LLD_IF ((uint32_t)0x00CC0001L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_EMC */ +/* MessageText: EtherCAT Master Control Task. */ +#define HIL_COMPONENT_ID_ECMV4_EMC ((uint32_t)0x00CD0000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_EMC_LLD_IF */ +/* MessageText: EtherCAT Master Control Task LLD IF. */ +#define HIL_COMPONENT_ID_ECMV4_EMC_LLD_IF ((uint32_t)0x00CD0001L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_COE_SDOCLIENT */ +/* MessageText: SDO Client Task. */ +#define HIL_COMPONENT_ID_ECMV4_COE_SDOCLIENT ((uint32_t)0x00CF0000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_COE_SDOINFOCLIENT */ +/* MessageText: SDOINFO Client Task. */ +#define HIL_COMPONENT_ID_ECMV4_COE_SDOINFOCLIENT ((uint32_t)0x00CF0001L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_COE_SDOSERVER */ +/* MessageText: SDO Server Task. */ +#define HIL_COMPONENT_ID_ECMV4_COE_SDOSERVER ((uint32_t)0x00CF0002L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_COE_SDOINFOSERVER */ +/* MessageText: SDOINFO Server Task. */ +#define HIL_COMPONENT_ID_ECMV4_COE_SDOINFOSERVER ((uint32_t)0x00CF0003L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_EOE */ +/* MessageText: EoE Task. */ +#define HIL_COMPONENT_ID_ECMV4_EOE ((uint32_t)0x00D00000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_EOE_IF */ +/* MessageText: EoE Interface Task. */ +#define HIL_COMPONENT_ID_ECMV4_EOE_IF ((uint32_t)0x00D00001L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_SOE_CLIENT */ +/* MessageText: SoE Client Task. */ +#define HIL_COMPONENT_ID_ECMV4_SOE_CLIENT ((uint32_t)0x00D20000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_FOE_CLIENT */ +/* MessageText: FoE Client Task. */ +#define HIL_COMPONENT_ID_ECMV4_FOE_CLIENT ((uint32_t)0x00D10000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_AOE_ROUTER */ +/* MessageText: AoE Router Task. */ +#define HIL_COMPONENT_ID_ECMV4_AOE_ROUTER ((uint32_t)0x00CE0000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_AOE_CLIENT */ +/* MessageText: AoE Client Task. */ +#define HIL_COMPONENT_ID_ECMV4_AOE_CLIENT ((uint32_t)0x00CE0001L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_MBXROUTER */ +/* MessageText: MbxRouter Task. */ +#define HIL_COMPONENT_ID_ECMV4_MBXROUTER ((uint32_t)0x00DD0000L) + +/* MessageId: HIL_COMPONENT_ID_ECMV4_ACFG */ +/* MessageText: ACfg Task. */ +#define HIL_COMPONENT_ID_ECMV4_ACFG ((uint32_t)0x00DE0000L) + +/***********************************************************************************/ +/* netPROXY package ODV3 */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_ODV3 */ +/* MessageText: netPROXY package ODV3. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_ODV3 ((uint32_t)0x00D80000L) + +/***********************************************************************************/ +/* netPROXY package EtherCAT Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_ECS */ +/* MessageText: netPROXY package EtherCAT Slave. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_ECS ((uint32_t)0x00D90000L) + +/***********************************************************************************/ +/* netPROXY package IO-Link Master */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_IOLM */ +/* MessageText: netPROXY package IO-Link Master. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_IOLM ((uint32_t)0x00DA0000L) + +/***********************************************************************************/ +/* netPROXY Management task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXMGMT */ +/* MessageText: netPROXY management task. */ +#define HIL_COMPONENT_ID_NPXMGMT ((uint32_t)0x00E00000L) + +/***********************************************************************************/ +/* Command Table task identifier */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CMD_TABLE */ +/* MessageText: Command Table Task. */ +#define HIL_COMPONENT_ID_CMD_TABLE ((uint32_t)0x00E20000L) + +/***********************************************************************************/ +/* netTap DPM Bridge Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NT_DPM_BRIDGE */ +/* MessageText: netTap DPM Bridge Task. */ +#define HIL_COMPONENT_ID_NT_DPM_BRIDGE ((uint32_t)0x00E40000L) + +/***********************************************************************************/ +/* netPROXY LED Handler Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXLEDHNDLR */ +/* MessageText: netPROXY LED Handler Task. */ +#define HIL_COMPONENT_ID_NPXLEDHNDLR ((uint32_t)0x00E50000L) + +/***********************************************************************************/ +/* LWIP Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_LWIP */ +/* MessageText: LWIP Task. */ +#define HIL_COMPONENT_ID_LWIP ((uint32_t)0x00E90000L) + +/* MessageId: HIL_COMPONENT_ID_LWIP_GCI_SOCKIF */ +/* MessageText: LWIP packet socket API for GCI. */ +#define HIL_COMPONENT_ID_LWIP_GCI_SOCKIF ((uint32_t)0x00E90001L) + +/***********************************************************************************/ +/* OSAL Worker Thread */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_WORKER_THREAD */ +/* MessageText: OSAL Worker Thread. */ +#define HIL_COMPONENT_ID_WORKER_THREAD ((uint32_t)0x00EA0000L) + +/***********************************************************************************/ +/* netPROXY package PROFINET IO-Device V4 */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_PNS */ +/* MessageText: netPROXY package PROFINET IO-Device. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_PNS ((uint32_t)0x00EB0000L) + +/***********************************************************************************/ +/* Base Firmware Application Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_BASEFW_AP */ +/* MessageText: Base Firmware Application Task. */ +#define HIL_COMPONENT_ID_BASEFW_AP ((uint32_t)0x00EC0000L) + +/***********************************************************************************/ +/* Config Manager Task */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CONFIG_MANAGER */ +/* MessageText: Config Manager Task. */ +#define HIL_COMPONENT_ID_CONFIG_MANAGER ((uint32_t)0x00ED0000L) + +/***********************************************************************************/ +/* netPROXY package Remanent */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_REMANENT */ +/* MessageText: netPROXY package Remanent. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_REMANENT ((uint32_t)0x00F20000L) + +/***********************************************************************************/ +/* CC-Link IE Field Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CCLIES */ +/* MessageText: CC-Link IE Slave Task. */ +#define HIL_COMPONENT_ID_CCLIES ((uint32_t)0x00F30000L) + +/* MessageId: HIL_COMPONENT_ID_CCLIES_IF */ +/* MessageText: CC-Link IE Slave IF Task. */ +#define HIL_COMPONENT_ID_CCLIES_IF ((uint32_t)0x00F40000L) + +/* MessageId: HIL_COMPONENT_ID_CCLIES_AP */ +/* MessageText: CC-Link IE Slave AP Task. */ +#define HIL_COMPONENT_ID_CCLIES_AP ((uint32_t)0x00F50000L) + +/***********************************************************************************/ +/* Authentication manager */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_AUTH_MANAGER */ +/* MessageText: Authentication manager component for user authentication. */ +#define HIL_COMPONENT_ID_AUTH_MANAGER ((uint32_t)0x00FB0000L) + +/* MessageId: HIL_COMPONENT_ID_AUTH_MANAGER_X_509 */ +/* MessageText: Authentication manager component for digital (X.509) certificates handling. */ +#define HIL_COMPONENT_ID_AUTH_MANAGER_X_509 ((uint32_t)0x00FB0001L) + +/***********************************************************************************/ +/* CC-Link IE Field Basic */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_CCLIEFB */ +/* MessageText: CC-Link IE Field Basic Slave Task. */ +#define HIL_COMPONENT_ID_CCLIEFB ((uint32_t)0x00FE0000L) + +/* MessageId: HIL_COMPONENT_ID_CCLIEFBM */ +/* MessageText: CC-Link IE Field Basic Master/Slave Task. */ +#define HIL_COMPONENT_ID_CCLIEFBM ((uint32_t)0x00FE0001L) + +/* MessageId: HIL_COMPONENT_ID_CCLIEFB_IF */ +/* MessageText: CC-Link IE Field Basic IF Task. */ +#define HIL_COMPONENT_ID_CCLIEFB_IF ((uint32_t)0x00FF0000L) + +/* MessageId: HIL_COMPONENT_ID_CCLIEFB_AP */ +/* MessageText: CC-Link IE Field Basic AP Task. */ +#define HIL_COMPONENT_ID_CCLIEFB_AP ((uint32_t)0x01000000L) + +/***********************************************************************************/ +/* netPROXY package MQTT Client */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_MQTT_CLIENT */ +/* MessageText: netPROXY package MQTT Client. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_MQTT_CLIENT ((uint32_t)0x00F90000L) + +/***********************************************************************************/ +/* Generic AP */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_GENERIC_AP */ +/* MessageText: Generic AP Task. */ +#define HIL_COMPONENT_ID_GENERIC_AP ((uint32_t)0x01090000L) + +/***********************************************************************************/ +/* netPROXY package OPCUA */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_OPCUA */ +/* MessageText: netPROXY package OPC UA. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_OPCUA ((uint32_t)0x010A0000L) + +/***********************************************************************************/ +/* netPROXY package Profibus DP Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_DPS */ +/* MessageText: netPROXY package Profibus DP Slave. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_DPS ((uint32_t)0x010C0000L) + +/***********************************************************************************/ +/* ECS V5 GCI */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_ECSV5_GCI */ +/* MessageText: EtherCAT Slave V5 GCI. */ +#define HIL_COMPONENT_ID_ECSV5_GCI ((uint32_t)0x010D0000L) + +/***********************************************************************************/ +/* netPROXY package OPCUA to IO-Link Master */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_IOL */ +/* MessageText: netPROXY package OPC UA to IO-Link Master. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_IOL ((uint32_t)0x010F0000L) + +/***********************************************************************************/ +/* netPROXY package OPCUA to netIOL */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_NETIOL */ +/* MessageText: netPROXY package OPC UA to netIOL. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_NETIOL ((uint32_t)0x01100000L) + +/***********************************************************************************/ +/* netPROXY package netIOL */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_NETIOL */ +/* MessageText: netPROXY package netIOL. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_NETIOL ((uint32_t)0x01130000L) + +/***********************************************************************************/ +/* MQTT Client Stack */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_MQTT_CLIENT */ +/* MessageText: MQTT Client Stack. */ +#define HIL_COMPONENT_ID_MQTT_CLIENT ((uint32_t)0x01150000L) + +/***********************************************************************************/ +/* netPROXY package OPCUA TLV Parser */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_OPCUATLVPARSER */ +/* MessageText: netPROXY package OPC UA TLV Parser. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_OPCUATLVPARSER ((uint32_t)0x01160000L) + +/***********************************************************************************/ +/* netPROXY package OPCUA AddOn */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_ADDON */ +/* MessageText: netPROXY package OPC AddOn. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_OPCUA_ADDON ((uint32_t)0x01170000L) + +/***********************************************************************************/ +/* Driver Phy */ +/***********************************************************************************/ +/* MessageId: _HIL_UNQ_COMPONENT_ID_DRV_PHY */ +/* MessageText: Driver Phy. */ +#define _HIL_UNQ_COMPONENT_ID_DRV_PHY ((uint32_t)0x01180000L) + +/***********************************************************************************/ +/* DeviceNet Core */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DEVNET_CORE */ +/* MessageText: DeviceNet Core. */ +#define HIL_COMPONENT_ID_DEVNET_CORE ((uint32_t)0x01190000L) + +/***********************************************************************************/ +/* DeviceNet Object Library */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DEVNET_OBJECT */ +/* MessageText: DeviceNet Object Library. */ +#define HIL_COMPONENT_ID_DEVNET_OBJECT ((uint32_t)0x011A0000L) + +/***********************************************************************************/ +/* DeviceNet GCI Adapter Slave */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_DEVNET_GCI_SLAVE */ +/* MessageText: DeviceNet GCI Adapter Slave. */ +#define HIL_COMPONENT_ID_DEVNET_GCI_SLAVE ((uint32_t)0x011B0000L) + +/***********************************************************************************/ +/* HTTP Web Server */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_HTTP_SERVER */ +/* MessageText: HTTP and HTTPS Web Server. */ +#define HIL_COMPONENT_ID_HTTP_SERVER ((uint32_t)0x011C0000L) + +/***********************************************************************************/ +/* netPROXY package GCI */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_NPXPACKAGE_GCI */ +/* MessageText: netPROXY package GCI. */ +#define HIL_COMPONENT_ID_NPXPACKAGE_GCI ((uint32_t)0x011D0000L) + +/***********************************************************************************/ +/* Protocol Detect */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_PDETECT */ +/* MessageText: Protocol Detect. */ +#define HIL_COMPONENT_ID_PDETECT ((uint32_t)0x011F0000L) + +/***********************************************************************************/ +/* OpenModbus GCI Adapter */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_OPEN_MODBUS_GCI */ +/* MessageText: OpenModbus GCI Adapter. */ +#define HIL_COMPONENT_ID_OPEN_MODBUS_GCI ((uint32_t)0x01200000L) + +/***********************************************************************************/ +/* IEEE 802.1AS */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_IEEE802_1AS */ +/* MessageText: IEEE 802.1AS. */ +#define HIL_COMPONENT_ID_IEEE802_1AS ((uint32_t)0x01210000L) + +/***********************************************************************************/ +/* TSN Core */ +/***********************************************************************************/ +/* MessageId: HIL_COMPONENT_ID_TSN_CORE */ +/* MessageText: TSN Core. */ +#define HIL_COMPONENT_ID_TSN_CORE ((uint32_t)0x01220000L) + +/************************************************************************************ + Deprecated task identifiers defines. Do not use them for new development +************************************************************************************/ + +#define HIL_TASK_ID_UNKNOWN_IDENTIFIER HIL_COMPONENT_ID_UNKNOWN_IDENTIFIER +#define HIL_TASK_ID_TIMER HIL_COMPONENT_ID_TIMER +#define HIL_TASK_ID_ADMIN HIL_COMPONENT_ID_LIBSTORAGE +#define HIL_TASK_ID_MID_SYS HIL_COMPONENT_ID_MID_SYS +#define HIL_TASK_ID_MID_DBG HIL_COMPONENT_ID_MID_DBG +#define HIL_TASK_ID_RX_IDLE HIL_COMPONENT_ID_RX_IDLE +#define HIL_TASK_ID_IRQ_HANDLER HIL_COMPONENT_ID_IRQ_HANDLER +#define HIL_TASK_ID_IDLE HIL_COMPONENT_ID_IDLE +#define HIL_TASK_ID_BOOTUP HIL_COMPONENT_ID_BOOTUP +#define HIL_TASK_ID_RX_TIMER HIL_COMPONENT_ID_RX_TIMER +#define HIL_TASK_ID_ECAT HIL_COMPONENT_ID_ECAT +#define HIL_TASK_ID_ECAT_ESM HIL_COMPONENT_ID_ECAT_ESM +#define HIL_TASK_ID_ECAT_MBX HIL_COMPONENT_ID_ECAT_MBX +#define HIL_TASK_ID_ECAT_CYCLIC_IN HIL_COMPONENT_ID_ECAT_CYCLIC_IN +#define HIL_TASK_ID_ECAT_CYCLIC_OUT HIL_COMPONENT_ID_ECAT_CYCLIC_OUT +#define HIL_TASK_ID_ECAT_COE HIL_COMPONENT_ID_ECAT_COE +#define HIL_TASK_ID_ECAT_COE_PDO HIL_COMPONENT_ID_ECAT_COE_PDO +#define HIL_TASK_ID_ECAT_COE_SDO HIL_COMPONENT_ID_ECAT_COE_SDO +#define HIL_TASK_ID_ECAT_VOE HIL_COMPONENT_ID_ECAT_VOE +#define HIL_TASK_ID_ECAT_FOE HIL_COMPONENT_ID_ECAT_FOE +#define HIL_TASK_ID_ECAT_FOE_FH HIL_COMPONENT_ID_ECAT_FOE_FH +#define HIL_TASK_ID_ECAT_EOE HIL_COMPONENT_ID_ECAT_EOE +#define HIL_TASK_ID_ECAT_SOE_SSC HIL_COMPONENT_ID_ECAT_SOE_SSC +#define HIL_TASK_ID_ECAT_SOE_IDN HIL_COMPONENT_ID_ECAT_SOE_IDN +#define HIL_TASK_ID_EXAMPLE_TASK1 HIL_COMPONENT_ID_EXAMPLE_TASK1 +#define HIL_TASK_ID_EXAMPLE_TASK2 HIL_COMPONENT_ID_EXAMPLE_TASK2 +#define HIL_TASK_ID_EXAMPLE_TASK3 HIL_COMPONENT_ID_EXAMPLE_TASK3 +#define HIL_TASK_ID_EIP_ENCAP HIL_COMPONENT_ID_EIP_ENCAP +#define HIL_TASK_ID_EIP_CL1 HIL_COMPONENT_ID_EIP_CL1 +#define HIL_TASK_ID_EIP_OBJECT HIL_COMPONENT_ID_EIP_OBJECT +#define HIL_TASK_ID_EIP_EDD_LOW HIL_COMPONENT_ID_EIP_EDD_LOW +#define HIL_TASK_ID_EIP_EDD_HIGH HIL_COMPONENT_ID_EIP_EDD_HIGH +#define HIL_TASK_ID_PNIO_CMCTL HIL_COMPONENT_ID_PNIO_CMCTL +#define HIL_TASK_ID_PNIO_CMDEV HIL_COMPONENT_ID_PNIO_CMDEV +#define HIL_TASK_ID_PNIO_ACP HIL_COMPONENT_ID_PNIO_ACP +#define HIL_TASK_ID_PNIO_DCP HIL_COMPONENT_ID_PNIO_DCP +#define HIL_TASK_ID_PNIO_EDD HIL_COMPONENT_ID_PNIO_EDD +#define HIL_TASK_ID_PNIO_MGT HIL_COMPONENT_ID_PNIO_MGT +#define HIL_TASK_ID_PNIO_APCTL HIL_COMPONENT_ID_PNIO_APCTL +#define HIL_TASK_ID_PNIO_APDEV HIL_COMPONENT_ID_PNIO_APDEV +#define HIL_TASK_ID_PNIO_APCFG HIL_COMPONENT_ID_PNIO_APCFG +#define HIL_TASK_ID_PNS_IF HIL_COMPONENT_ID_PNS_IF +#define HIL_TASK_ID_PNIOD_16BITIO HIL_COMPONENT_ID_PNIOD_16BITIO +#define HIL_TASK_ID_PNS_32BITIO HIL_COMPONENT_ID_PNS_32BITIO +#define HIL_TASK_ID_PNS_4BITIO HIL_COMPONENT_ID_PNS_4BITIO +#define HIL_TASK_ID_PNS_SOCKET_SRV HIL_COMPONENT_ID_PNS_SOCKET_SRV +#define HIL_TASK_ID_PNS_EDD_HIGH HIL_COMPONENT_ID_PNS_EDD_HIGH +#define HIL_TASK_ID_PNS_EDD_LOW HIL_COMPONENT_ID_PNS_EDD_LOW +#define HIL_TASK_ID_PNS_SOCKET HIL_COMPONENT_ID_PNS_SOCKET +#define HIL_TASK_ID_PNS_DCP HIL_COMPONENT_ID_PNS_DCP +#define HIL_TASK_ID_PNS_CLRPC HIL_COMPONENT_ID_PNS_CLRPC +#define HIL_TASK_ID_PNS_IF_INTERN HIL_COMPONENT_ID_PNS_IF_INTERN +#define HIL_TASK_ID_PNIO_IRT_SCHEDULER HIL_COMPONENT_ID_PNIO_IRT_SCHEDULER +#define HIL_TASK_ID_PNIO_RTA HIL_COMPONENT_ID_PNIO_RTA +#define HIL_TASK_ID_PNIO_RTC HIL_COMPONENT_ID_PNIO_RTC +#define HIL_TASK_ID_FODMI_TASK HIL_COMPONENT_ID_FODMI_TASK +#define HIL_TASK_ID_PNIO_HAL_COMPUTE HIL_COMPONENT_ID_PNIO_HAL_COMPUTE +#define HIL_TASK_ID_PNIO_HAL_IRQ HIL_COMPONENT_ID_PNIO_HAL_IRQ +#define HIL_TASK_ID_RPC_TASK HIL_COMPONENT_ID_RPC_TASK +#define HIL_TASK_ID_ROUTER_OS_CONSOLE32 HIL_COMPONENT_ID_ROUTER_OS_CONSOLE32 +#define HIL_TASK_ID_ROUTER_ECAT_VOE HIL_COMPONENT_ID_ROUTER_ECAT_VOE +#define HIL_TASK_ID_ROUTER_HIF_PACKET HIL_COMPONENT_ID_ROUTER_HIF_PACKET +#define HIL_TASK_ID_EPL_NMT HIL_COMPONENT_ID_EPL_NMT +#define HIL_TASK_ID_EPL_PCK HIL_COMPONENT_ID_EPL_PCK +#define HIL_TASK_ID_EPL_DPM HIL_COMPONENT_ID_EPL_DPM +#define HIL_TASK_ID_PLSV3_AP HIL_COMPONENT_ID_PLSV3_AP +#define HIL_TASK_ID_PLSV3_IF HIL_COMPONENT_ID_PLSV3_IF +#define HIL_TASK_ID_PLSV3_NMT HIL_COMPONENT_ID_PLSV3_NMT +#define HIL_TASK_ID_PLV3_COMMON HIL_COMPONENT_ID_PLV3_COMMON +#define HIL_TASK_ID_PLSV3_DRVETH HIL_COMPONENT_ID_PLSV3_DRVETH +#define HIL_TASK_ID_EPL_PDO HIL_COMPONENT_ID_EPL_PDO +#define HIL_TASK_ID_EPL_SDO HIL_COMPONENT_ID_EPL_SDO +#define HIL_TASK_ID_EPL_MN HIL_COMPONENT_ID_EPL_MN +#define HIL_TASK_ID_ASI_ECTRL HIL_COMPONENT_ID_ASI_ECTRL +#define HIL_TASK_ID_ASI_AP HIL_COMPONENT_ID_ASI_AP +#define HIL_TASK_ID_TCPUDP HIL_COMPONENT_ID_TCPUDP +#define HIL_TASK_ID_TCPIP_AP HIL_COMPONENT_ID_TCPIP_AP +#define HIL_TASK_ID_TCPIP_SOCKIF HIL_COMPONENT_ID_TCPIP_SOCKIF +#define HIL_TASK_ID_SERCOSIII_API HIL_COMPONENT_ID_SERCOSIII_API +#define HIL_TASK_ID_SERCOSIII_DL HIL_COMPONENT_ID_SERCOSIII_DL +#define HIL_TASK_ID_SERCOSIII_SVC HIL_COMPONENT_ID_SERCOSIII_SVC +#define HIL_TASK_ID_SERCOSIII_ETH HIL_COMPONENT_ID_SERCOSIII_ETH +#define HIL_TASK_ID_SERCOSIII_NRT HIL_COMPONENT_ID_SERCOSIII_NRT +#define HIL_TASK_ID_SERCOSIII_CYCLIC HIL_COMPONENT_ID_SERCOSIII_CYCLIC +#define HIL_TASK_ID_PROFIBUS_DL HIL_COMPONENT_ID_PROFIBUS_DL +#define HIL_TASK_ID_PROFIBUS_FSPMS HIL_COMPONENT_ID_PROFIBUS_FSPMS +#define HIL_TASK_ID_PROFIBUS_APS HIL_COMPONENT_ID_PROFIBUS_APS +#define HIL_TASK_ID_PROFIBUS_FSPMM HIL_COMPONENT_ID_PROFIBUS_FSPMM +#define HIL_TASK_ID_PROFIBUS_APM HIL_COMPONENT_ID_PROFIBUS_APM +#define HIL_TASK_ID_SNMP_SERVER HIL_COMPONENT_ID_SNMP_SERVER +#define HIL_TASK_ID_MIB_DATABASE HIL_COMPONENT_ID_MIB_DATABASE +#define HIL_TASK_ID_ICONL_TIMER HIL_COMPONENT_ID_ICONL_TIMER +#define HIL_TASK_ID_ICONL_RUN HIL_COMPONENT_ID_ICONL_RUN +#define HIL_TASK_ID_LLDP HIL_COMPONENT_ID_LLDP +#define HIL_TASK_ID_CAN_DL HIL_COMPONENT_ID_CAN_DL +#define HIL_TASK_ID_DDL_ENPDDL HIL_COMPONENT_ID_DDL_ENPDDL +#define HIL_TASK_ID_DDL_DDL HIL_COMPONENT_ID_DDL_DDL +#define HIL_TASK_ID_CANOPEN_MASTER HIL_COMPONENT_ID_CANOPEN_MASTER +#define HIL_TASK_ID_CANOPEN_SLAVE HIL_COMPONENT_ID_CANOPEN_SLAVE +#define HIL_TASK_ID_USB_TLRROUTER HIL_COMPONENT_ID_USB_TLRROUTER +#define HIL_TASK_ID_CANDL_APSAMPLE HIL_COMPONENT_ID_CANDL_APSAMPLE +#define HIL_TASK_ID_DEVNET_FAL HIL_COMPONENT_ID_DEVNET_FAL +#define HIL_TASK_ID_DEVNET_AP HIL_COMPONENT_ID_DEVNET_AP +#define HIL_TASK_ID_DPM_OD2 HIL_COMPONENT_ID_DPM_OD2 +#define HIL_TASK_ID_CANOPEN_APM HIL_COMPONENT_ID_CANOPEN_APM +#define HIL_TASK_ID_CANOPEN_APS HIL_COMPONENT_ID_CANOPEN_APS +#define HIL_TASK_ID_SERCOS_SL HIL_COMPONENT_ID_SERCOS_SL +#define HIL_TASK_ID_ECAT_DPM HIL_COMPONENT_ID_ECAT_DPM +#define HIL_TASK_ID_ECAT_INXAP HIL_COMPONENT_ID_ECAT_INXAP +#define HIL_TASK_ID_SERCOSIII_SL_COM HIL_COMPONENT_ID_SERCOSIII_SL_COM +#define HIL_TASK_ID_SERCOSIII_SL_SVC HIL_COMPONENT_ID_SERCOSIII_SL_SVC +#define HIL_TASK_ID_SERCOSIII_SL_RTD HIL_COMPONENT_ID_SERCOSIII_SL_RTD +#define HIL_TASK_ID_SERCOSIII_SL_AP HIL_COMPONENT_ID_SERCOSIII_SL_AP +#define HIL_TASK_ID_SERCOSIII_SL_IDN HIL_COMPONENT_ID_SERCOSIII_SL_IDN +#define HIL_TASK_ID_EIP_APS HIL_COMPONENT_ID_EIP_APS +#define HIL_TASK_ID_EIP_APM HIL_COMPONENT_ID_EIP_APM +#define HIL_TASK_ID_ETH_INTF HIL_COMPONENT_ID_ETH_INTF +#define HIL_TASK_ID_MID_STARTUP HIL_COMPONENT_ID_MID_STARTUP +#define HIL_TASK_ID_OMB_OMBTASK HIL_COMPONENT_ID_OMB_OMBTASK +#define HIL_TASK_ID_OMB_OMBAPTASK HIL_COMPONENT_ID_OMB_OMBAPTASK +#define HIL_TASK_ID_DNS_FAL HIL_COMPONENT_ID_DNS_FAL +#define HIL_TASK_ID_DNS_AP HIL_COMPONENT_ID_DNS_AP +#define HIL_TASK_ID_ETHERCAT_MASTER_AP HIL_COMPONENT_ID_ETHERCAT_MASTER_AP +#define HIL_TASK_ID_ETHERCAT_MASTER HIL_COMPONENT_ID_ETHERCAT_MASTER +#define HIL_TASK_ID_AN_TRANS HIL_COMPONENT_ID_AN_TRANS +#define HIL_TASK_ID_PROFIBUS_MPI HIL_COMPONENT_ID_PROFIBUS_MPI +#define HIL_TASK_ID_PROFIBUS_MPI_AP HIL_COMPONENT_ID_PROFIBUS_MPI_AP +#define HIL_TASK_ID_PROFIBUS_MPI_RFC HIL_COMPONENT_ID_PROFIBUS_MPI_RFC +#define HIL_TASK_ID_PROFIBUS_FSPMM2 HIL_COMPONENT_ID_PROFIBUS_FSPMM2 +#define HIL_TASK_ID_CCLINK_SLAVE HIL_COMPONENT_ID_CCLINK_SLAVE +#define HIL_TASK_ID_CCLINK_APS HIL_COMPONENT_ID_CCLINK_APS +#define HIL_TASK_ID_ECS_LENZE_MAIN HIL_COMPONENT_ID_ECS_LENZE_MAIN +#define HIL_TASK_ID_ECS_LENZE_BRIDGE HIL_COMPONENT_ID_ECS_LENZE_BRIDGE +#define HIL_TASK_ID_IOLINK_MASTER HIL_COMPONENT_ID_IOLINK_MASTER +#define HIL_TASK_ID_IOLINK_APPLICATION HIL_COMPONENT_ID_IOLINK_APPLICATION +#define HIL_TASK_ID_MODBUS_RTU HIL_COMPONENT_ID_MODBUS_RTU +#define HIL_TASK_ID_MODBUS_RTU_AP HIL_COMPONENT_ID_MODBUS_RTU_AP +#define HIL_TASK_ID_SIII_MA_CP HIL_COMPONENT_ID_SIII_MA_CP +#define HIL_TASK_ID_SIII_MA_AP HIL_COMPONENT_ID_SIII_MA_AP +#define HIL_TASK_ID_SERCOSIIIMASTER_SVC HIL_COMPONENT_ID_SERCOSIIIMASTER_SVC +#define HIL_TASK_ID_SERCOSIIIMASTER_ACFG HIL_COMPONENT_ID_SERCOSIIIMASTER_ACFG +#define HIL_TASK_ID_SERCOSIIIMASTER_SIP_CLIENT HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_CLIENT +#define HIL_TASK_ID_SERCOSIIIMASTER_SIP_SERVER HIL_COMPONENT_ID_SERCOSIIIMASTER_SIP_SERVER +#define HIL_TASK_ID_SSIO HIL_COMPONENT_ID_SSIO +#define HIL_TASK_ID_SSIO_AP HIL_COMPONENT_ID_SSIO_AP +#define HIL_TASK_ID_MEMORY_MAP HIL_COMPONENT_ID_MEMORY_MAP +#define HIL_TASK_ID_MPI_GATEWAY HIL_COMPONENT_ID_MPI_GATEWAY +#define HIL_TASK_ID_SERCOSIIIMASTER_NRT HIL_COMPONENT_ID_SERCOSIIIMASTER_NRT +#define HIL_TASK_ID_ASI_MASTER HIL_COMPONENT_ID_ASI_MASTER +#define HIL_TASK_ID_ASI_APM HIL_COMPONENT_ID_ASI_APM +#define HIL_TASK_ID_COMPONET_SLAVE HIL_COMPONENT_ID_COMPONET_SLAVE +#define HIL_TASK_ID_COMPONET_SLAVE_AP HIL_COMPONENT_ID_COMPONET_SLAVE_AP +#define HIL_TASK_ID_ASCII HIL_COMPONENT_ID_ASCII +#define HIL_TASK_ID_ASCII_AP HIL_COMPONENT_ID_ASCII_AP +#define HIL_TASK_ID_NETSCRIPT HIL_COMPONENT_ID_NETSCRIPT +#define HIL_TASK_ID_MARSHALLER HIL_COMPONENT_ID_MARSHALLER +#define HIL_TASK_ID_PACKET_ROUTER HIL_COMPONENT_ID_PACKET_ROUTER +#define HIL_TASK_ID_TCP_CONNECTOR HIL_COMPONENT_ID_TCP_CONNECTOR +#define HIL_TASK_ID_NT100_GATEWAY HIL_COMPONENT_ID_NT100_GATEWAY +#define HIL_TASK_ID_ITEM_SERVER HIL_COMPONENT_ID_ITEM_SERVER +#define HIL_TASK_ID_ISAGRAF_LOG HIL_COMPONENT_ID_ISAGRAF_LOG +#define HIL_TASK_ID_ISAGRAF_VM HIL_COMPONENT_ID_ISAGRAF_VM +#define HIL_TASK_ID_ISAGRAF HIL_COMPONENT_ID_ISAGRAF +#define HIL_TASK_ID_ISAGRAF_ETCP HIL_COMPONENT_ID_ISAGRAF_ETCP +#define HIL_TASK_ID_ISAGRAF_ISARSI HIL_COMPONENT_ID_ISAGRAF_ISARSI +#define HIL_TASK_ID_ISAGRAF_MAINTENANCE HIL_COMPONENT_ID_ISAGRAF_MAINTENANCE +#define HIL_TASK_ID_ISAGRAF_NTP HIL_COMPONENT_ID_ISAGRAF_NTP +#define HIL_TASK_ID_ISAGRAF_AP HIL_COMPONENT_ID_ISAGRAF_AP +#define HIL_TASK_ID_ISAGRAF_FTP HIL_COMPONENT_ID_ISAGRAF_FTP +#define HIL_TASK_ID_ISAGRAF_DS HIL_COMPONENT_ID_ISAGRAF_DS +#define HIL_TASK_ID_DF1 HIL_COMPONENT_ID_DF1 +#define HIL_TASK_ID_DF1_AP HIL_COMPONENT_ID_DF1_AP +#define HIL_TASK_ID_3964R HIL_COMPONENT_ID_3964R +#define HIL_TASK_ID_3964R_AP HIL_COMPONENT_ID_3964R_AP +#define HIL_TASK_ID_IO_SIGNAL HIL_COMPONENT_ID_IO_SIGNAL +#define HIL_TASK_ID_SERVX HIL_COMPONENT_ID_SERVX +#define HIL_TASK_ID_TCPIP_TCP_AP HIL_COMPONENT_ID_TCPIP_TCP_AP +#define HIL_TASK_ID_EIP_DLR HIL_COMPONENT_ID_EIP_DLR +#define HIL_TASK_ID_FODMI HIL_COMPONENT_ID_FODMI +#define HIL_TASK_ID_PROFIDRIVE HIL_COMPONENT_ID_PROFIDRIVE +#define HIL_TASK_ID_PROFIDRIVE_PA HIL_COMPONENT_ID_PROFIDRIVE_PA +#define HIL_TASK_ID_PROFIDRIVE_AP HIL_COMPONENT_ID_PROFIDRIVE_AP +#define HIL_TASK_ID_PROFIDRIVE_OD HIL_COMPONENT_ID_PROFIDRIVE_OD +#define HIL_TASK_ID_ODV3 HIL_COMPONENT_ID_ODV3 +#define HIL_TASK_ID_VARAN_CLIENT_AP HIL_COMPONENT_ID_VARAN_CLIENT_AP +#define HIL_TASK_ID_VARAN_CLIENT HIL_COMPONENT_ID_VARAN_CLIENT +#define HIL_TASK_ID_MODBUS_RTU_PERIPH HIL_COMPONENT_ID_MODBUS_RTU_PERIPH +#define HIL_TASK_ID_PROFINET_RTA HIL_COMPONENT_ID_PROFINET_RTA +#define HIL_TASK_ID_SIII_SIP HIL_COMPONENT_ID_SIII_SIP +#define HIL_TASK_ID_3S_PLC_HANDLER HIL_COMPONENT_ID_3S_PLC_HANDLER +#define HIL_TASK_ID_3S_PLC_HANDLER_AP HIL_COMPONENT_ID_3S_PLC_HANDLER_AP +#define HIL_TASK_ID_NETPLC_IO_HANDLER HIL_COMPONENT_ID_NETPLC_IO_HANDLER +#define HIL_TASK_ID_POWERLINK_MN_TASK HIL_COMPONENT_ID_POWERLINK_MN_TASK +#define HIL_TASK_ID_POWERLINK_MN_AP_TASK HIL_COMPONENT_ID_POWERLINK_MN_AP_TASK +#define HIL_TASK_ID_POWERLINK_MN_NEW_DATA_TASK HIL_COMPONENT_ID_POWERLINK_MN_NEW_DATA_TASK +#define HIL_TASK_ID_POWERLINK_MN_SDO_UDP_SOCK_TASK HIL_COMPONENT_ID_POWERLINK_MN_SDO_UDP_SOCK_TASK +#define HIL_TASK_ID_POWERLINK_MN_VETH_TASK HIL_COMPONENT_ID_POWERLINK_MN_VETH_TASK +#define HIL_TASK_ID_POWERLINK_MN_JOB_TOKEN_TASK HIL_COMPONENT_ID_POWERLINK_MN_JOB_TOKEN_TASK +#define HIL_TASK_ID_RECORDING HIL_COMPONENT_ID_RECORDING +#define HIL_TASK_ID_INSIGHT HIL_COMPONENT_ID_INSIGHT +#define HIL_TASK_ID_SMARTWIRE_MASTER HIL_COMPONENT_ID_SMARTWIRE_MASTER +#define HIL_TASK_ID_ECSV4_ESM HIL_COMPONENT_ID_ECSV4_ESM +#define HIL_TASK_ID_ECSV4_MBX HIL_COMPONENT_ID_ECSV4_MBX +#define HIL_TASK_ID_ECSV4_COE HIL_COMPONENT_ID_ECSV4_COE +#define HIL_TASK_ID_ECSV4_SDO HIL_COMPONENT_ID_ECSV4_SDO +#define HIL_TASK_ID_ECSV4_EOE HIL_COMPONENT_ID_ECSV4_EOE +#define HIL_TASK_ID_ECSV4_FOE HIL_COMPONENT_ID_ECSV4_FOE +#define HIL_TASK_ID_ECSV4_FOE_FH HIL_COMPONENT_ID_ECSV4_FOE_FH +#define HIL_TASK_ID_ECSV4_SOE_SSC HIL_COMPONENT_ID_ECSV4_SOE_SSC +#define HIL_TASK_ID_ECSV4_SOE_IDN HIL_COMPONENT_ID_ECSV4_SOE_IDN +#define HIL_TASK_ID_ECSV4_DPM HIL_COMPONENT_ID_ECSV4_DPM +#define HIL_TASK_ID_NET_PROXY HIL_COMPONENT_ID_NET_PROXY +#define HIL_TASK_ID_ECSV4_AOE HIL_COMPONENT_ID_ECSV4_AOE +#define HIL_TASK_ID_NET_SMART_GATEWAY HIL_COMPONENT_ID_NET_SMART_GATEWAY +#define HIL_TASK_ID_TFTP HIL_COMPONENT_ID_TFTP +#define HIL_TASK_ID_TFTP_AP HIL_COMPONENT_ID_TFTP_AP +#define HIL_TASK_ID_PTP HIL_COMPONENT_ID_PTP +#define HIL_TASK_ID_USER_AREA HIL_COMPONENT_ID_USER_AREA +#define HIL_TASK_ID_NETPROXY_S3S HIL_COMPONENT_ID_NETPROXY_S3S +#define HIL_TASK_ID_EIP_DLR_IRQ HIL_COMPONENT_ID_EIP_DLR_IRQ +#define HIL_TASK_ID_FTP_SERVER HIL_COMPONENT_ID_FTP_SERVER +#define HIL_TASK_ID_FTP_SERVER_AP HIL_COMPONENT_ID_FTP_SERVER_AP +#define HIL_TASK_ID_NPXHIFADAPTER HIL_COMPONENT_ID_NPXHIFADAPTER +#define HIL_TASK_ID_NPXPACKAGE_EIS HIL_COMPONENT_ID_NPXPACKAGE_EIS +#define HIL_TASK_ID_NETHOST HIL_COMPONENT_ID_NETHOST +#define HIL_TASK_ID_CIP_HANDLER HIL_COMPONENT_ID_CIP_HANDLER +#define HIL_TASK_ID_CPX_DRIVER HIL_COMPONENT_ID_CPX_DRIVER +#define HIL_TASK_ID_CPX_EXCHANGE HIL_COMPONENT_ID_CPX_EXCHANGE +#define HIL_TASK_ID_CPX_OSAL HIL_COMPONENT_ID_CPX_OSAL +#define HIL_TASK_ID_PNM_AP HIL_COMPONENT_ID_PNM_AP +#define HIL_TASK_ID_ECMV4_AP HIL_COMPONENT_ID_ECMV4_AP +#define HIL_TASK_ID_ECMV4_IF HIL_COMPONENT_ID_ECMV4_IF +#define HIL_TASK_ID_ECMV4_LLD_SCHED HIL_COMPONENT_ID_ECMV4_LLD_SCHED +#define HIL_TASK_ID_ECMV4_EMC HIL_COMPONENT_ID_ECMV4_EMC +#define HIL_TASK_ID_ECMV4_EMC_LLD_IF HIL_COMPONENT_ID_ECMV4_EMC_LLD_IF +#define HIL_TASK_ID_ECMV4_COE_SDOCLIENT HIL_COMPONENT_ID_ECMV4_COE_SDOCLIENT +#define HIL_TASK_ID_ECMV4_COE_SDOINFOCLIENT HIL_COMPONENT_ID_ECMV4_COE_SDOINFOCLIENT +#define HIL_TASK_ID_ECMV4_EOE HIL_COMPONENT_ID_ECMV4_EOE +#define HIL_TASK_ID_ECMV4_EOE_IF HIL_COMPONENT_ID_ECMV4_EOE_IF +#define HIL_TASK_ID_ECMV4_SOE_CLIENT HIL_COMPONENT_ID_ECMV4_SOE_CLIENT +#define HIL_TASK_ID_ECMV4_FOE_CLIENT HIL_COMPONENT_ID_ECMV4_FOE_CLIENT +#define HIL_TASK_ID_ECMV4_AOE_ROUTER HIL_COMPONENT_ID_ECMV4_AOE_ROUTER +#define HIL_TASK_ID_NPXPACKAGE_ODV3 HIL_COMPONENT_ID_NPXPACKAGE_ODV3 +#define HIL_TASK_ID_NPXPACKAGE_ECS HIL_COMPONENT_ID_NPXPACKAGE_ECS +#define HIL_TASK_ID_NPXPACKAGE_IOLM HIL_COMPONENT_ID_NPXPACKAGE_IOLM +#define HIL_TASK_ID_NPXMGMT HIL_COMPONENT_ID_NPXMGMT +#define HIL_TASK_ID_CMD_TABLE HIL_COMPONENT_ID_CMD_TABLE +#define HIL_TASK_ID_NT_DPM_BRIDGE HIL_COMPONENT_ID_NT_DPM_BRIDGE +#define HIL_TASK_ID_NPXLEDHNDLR HIL_COMPONENT_ID_NPXLEDHNDLR +#define HIL_TASK_ID_LWIP HIL_COMPONENT_ID_LWIP +#define HIL_TASK_ID_WORKER_THREAD HIL_COMPONENT_ID_WORKER_THREAD +#define HIL_TASK_ID_NPXPACKAGE_PNS HIL_COMPONENT_ID_NPXPACKAGE_PNS +#define HIL_TASK_ID_BASEFW_AP HIL_COMPONENT_ID_BASEFW_AP +#define HIL_TASK_ID_CONFIG_MANAGER HIL_COMPONENT_ID_CONFIG_MANAGER +#define HIL_TASK_ID_NPXPACKAGE_REMANENT HIL_COMPONENT_ID_NPXPACKAGE_REMANENT + +#endif /* HIL_COMPONENT_ID_H_ */ + diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_DeviceProductionData.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_DeviceProductionData.h new file mode 100644 index 0000000..1204bed --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_DeviceProductionData.h @@ -0,0 +1,435 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_DeviceProductionData.h $: *//*! + + \file Hil_DeviceProductionData.h + + Device Production Data for the netX90 and netX400. + + Structure definition for the Device Production Data for the netX90 and netX400. + The structure HIL_PRODUCT_DATA_LABEL_T is placed within the internal flash of the + netX90 or in the serial flash of the netX4x00. + +**************************************************************************************/ +#ifndef HIL_DEVICEPRODUCTIONDATA_H_ +#define HIL_DEVICEPRODUCTIONDATA_H_ + +#include +#include "Hil_Compiler.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_DEVICEPRODUCTIONDATA) +#endif + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_LLICENSE_FLAGS_Ttag +{ + uint32_t ulLicenseId; /*!< netX license ID/Flags */ + uint32_t ulLicenseFlags1; /*!< netX license flags 1 */ + uint32_t ulLicenseFlags2; /*!< netX license flags 2 */ +} HIL_PRODUCT_DATA_LICENSE_FLAGS_T; + +/*! Basic device data. + * Basic production information about the device. + */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_BASIC_DEVICE_DATA_Ttag +{ + /*! Manufacturer ID. + * 0 = Undefined; 1 - 255 = Hilscher GmbH; 256 - x = OEM + * \note All numbers are managed and assigned by Hilscher GmbH. */ + uint16_t usManufacturer; + + /*! Device classification number. + * Possible values are defined in the dual port memory definitions (see HIL_HW_DEV_CLASS_*). */ + uint16_t usDeviceClass; + + /*! Device number. + * For usManufacturer 1-255 the numbers are managed by Hilscher GmbH. */ + uint32_t ulDeviceNumber; + + /*! Serial number. + * Serial number of the device. */ + uint32_t ulSerialNumber; + + /*! Hardware compatibility number. + * This number indicates an incompatible hardware change */ + uint8_t bHwCompatibility; + + /*! Hardware revision number. + * Production related hardware revision number */ + uint8_t bHwRevision; + + /*! Production date + * Format is 0xYYWW: + * Year = ((usProductionDate >> 8) & 0x00ff) + 2000 + * Week = ((usProductionDate >> 0) & 0x00ff) + * e.g. 0C2Bh, where 0Ch is year 2012 and 2Bh is week 43. */ + uint16_t usProductionDate; + + uint8_t bReserved1; /*!< Reserved. bHostInterfaceType is deprecated. */ + uint8_t bReserved2; /*!< Reserved. bHwAssemblyFeatures is deprecated. */ + + /*! Reserved area. + * Currently not used set to 0 to avoid conflicts with future definitions. */ + uint8_t abReserved[14]; + +} HIL_PRODUCT_DATA_BASIC_DEVICE_DATA_T; + + +/*------------------------------------------------------------*/ +/* MAC Address information. */ +/*------------------------------------------------------------*/ +#define HIL_PRODUCT_NUMBER_OF_MAC_ADDRESSES_COM 8 /*!< Number of MAC Addresses used by Communication firmware. */ +#define HIL_PRODUCT_NUMBER_OF_MAC_ADDRESSES_APP 4 /*!< Number of MAC Addresses used by Application firmware. */ + +/*! Structure to hold MAC one address. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_MAC_ADDRESS_Ttag +{ + /*! MAC address. */ + uint8_t abMacAddress[6]; + + /*! Reserved area. + * Currently not used set to 0 to avoid conflicts with future definitions. */ + uint8_t abReserved[2]; + +} HIL_PRODUCT_DATA_MAC_ADDRESS_T; + +/*! Structure holding MAC addresses for communication firmware. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_MAC_ADDRESSES_COM_Ttag +{ + /*! Array of MAC address for communication side. */ + HIL_PRODUCT_DATA_MAC_ADDRESS_T atMAC[HIL_PRODUCT_NUMBER_OF_MAC_ADDRESSES_COM]; + +} HIL_PRODUCT_DATA_MAC_ADDRESSES_COM_T; + +/*! Structure holding MAC addresses for application firmware. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_MAC_ADDRESSES_APP_Ttag +{ + /*! Array of MAC address for application side. */ + HIL_PRODUCT_DATA_MAC_ADDRESS_T atMAC[HIL_PRODUCT_NUMBER_OF_MAC_ADDRESSES_APP]; + +} HIL_PRODUCT_DATA_MAC_ADDRESSES_APP_T; + + +/*------------------------------------------------------------*/ +/*! Product Identification information. */ +/*------------------------------------------------------------*/ +#define HIL_PRODUCT_USB_VENDOR_NAME_SIZE 16 /*!< Size of the USB vendor name. */ +#define HIL_PRODUCT_USB_PRODUCT_NAME_SIZE 16 /*!< Size of the USB product name. */ + +/*! Structure holding USB related vendor information. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_USB_Ttag +{ + /*! USB Device vendor ID (VID). */ + uint16_t usUSBVendorID; + + /*! USB Device product ID (PID). */ + uint16_t usUSBProductID; + + /*! USB Vendor name. + * The Vendor name shown over USB, please refer the USB documentation + * which data format shall be used. */ + uint8_t abUSBVendorName[HIL_PRODUCT_USB_VENDOR_NAME_SIZE]; + + /*! USB Product name. + * The Product name shown over USB, please refer the USB documentation + * which data format shall be used. */ + uint8_t abUSBProductName[HIL_PRODUCT_USB_PRODUCT_NAME_SIZE]; + +} HIL_PRODUCT_DATA_USB_T; + + +/*! Structure holding Product identification data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_PRODUCT_IDENTIFICATION_Ttag +{ + /*! USB product data. */ + HIL_PRODUCT_DATA_USB_T tUSBInfo; + + /*! Reserved area. + * Currently not used set to 0 to avoid conflicts with future definitions. */ + uint8_t abReserved[76]; + +} HIL_PRODUCT_DATA_PRODUCT_IDENTIFICATION_T; + + +/*------------------------------------------------------------*/ +/*! OEM product specific device data. */ +/*------------------------------------------------------------*/ +#define HIL_PRODUCT_DATA_OEM_IDENTIFICATION_FLAG_SERIALNUMBER_VALID 0x00000001 /*!< OEM serial number stored in szSerialNumber field is valid */ +#define HIL_PRODUCT_DATA_OEM_IDENTIFICATION_FLAG_ORDERNUMBER_VALID 0x00000002 /*!< OEM order number stored in szOrderNumber is valid */ +#define HIL_PRODUCT_DATA_OEM_IDENTIFICATION_FLAG_HARDWAREREVISION_VALID 0x00000004 /*!< OEM hardware revision stored in szHardwareRevision field is valid */ +#define HIL_PRODUCT_DATA_OEM_IDENTIFICATION_FLAG_PRODUCTIONDATA_VALID 0x00000008 /*!< OEM production date stored in szProductionDate field is valid */ + +/*! Structure holding OEM identification data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_OEM_IDENTIFICATION_Ttag +{ + /*! OEM Data Option Flags. + * This flag field indicate which of the following members contains valid information. If a member + * if flagged as 'valid' the related value will be evaluated by the stack. + * (see HIL_PRODUCT_DATA_OEM_IDENTIFICATION_FLAG_* definitions) + * + * \note Not all firmware will support this feature at all, please refer the + * firmware documentation if this setting will be supported and how. + * + * \note If the field is 0, all parameters in this structure will be ignored by communication + * stacks with respect to configurations parameters + */ + uint32_t ulOemDataOptionFlags; + + /*! Serial number. + * Serial number of the device as string (e.g. "20053" or "SC-D5SF5005") + * + * \note Null terminated c string. + * \note Some communication stack only support numbers, or a subset of chars. + * Please refer the related specification. + */ + char szSerialNumber[28]; + + /*! Order number. + * Order number of the device as string (e.g. "1544.100" or "6ES7 511-1AK00-0AB0"). + * + * \note Null terminated c string. + * \note Some communication stack only support numbers, or a subset of chars. + * Please refer the related specification. + */ + char szOrderNumber[32]; + + /*! Hardware revision. + * Hardware revision as string (e.g. "3" or "V1.5"). + * + * \note Null terminated c string. + * \note Some communication stack only support numbers, or a subset of chars. + * Please refer the related specification. + */ + char szHardwareRevision[16]; + + /*! Production date/time. + * UTC (Universal Time Coordinated) without TZD (time zone designator, always 'Z') and no + * fraction of a second E.g "2012-10-24T07:36:17Z". + * + * \note Null terminated c string. + */ + char szProductionDate[32]; + + /*! Reserved area. + * Currently not used set to 0 to avoid conflicts with future definitions. + */ + uint8_t abReserved[12]; + + /*! Vendor specific data. + * This field can be used to store any kind of information to this device label. + */ + uint8_t abVendorData[112]; + +} HIL_PRODUCT_DATA_OEM_IDENTIFICATION_T; + + +/*------------------------------------------------------------*/ +/*! Flash layout information */ +/*------------------------------------------------------------*/ + +/*! Definition of content types of a flash memory. + * Some of the content types are currently not of interest for the communication firmware, e.g. HWCONFIG. + * Regardless of usage, we recommend to describe all areas which are used anyway for consistency. + */ +typedef enum HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_Etag +{ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_EMPTY = 0, /*!< Entry is not used. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_HWCONFIG = 1, /*!< Hardware configuration data. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_FDL = 2, /*!< Device product data label (HIL_PRODUCT_DATA_LABEL_T). */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_FW = 3, /*!< Communication firmware. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_FW_CONT = 4, /*!< Communication firmware continued. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_CONFIG = 5, /*!< Firmware configuration data. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_REMANENT = 6, /*!< Remanent data of firmware (libstorage). */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_MANAGEMENT = 7, /*!< Management of remanent area (libstorage). */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_APP_CONT = 8, /*!< Application firmware continued. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_MFW = 9, /*!< Maintenance firmware. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_FILESYSTEM = 10, /*!< File system. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_FWUPDATE = 11, /*!< Storage space for firmware updates. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_MFW_HWCONFIG = 12, /*!< Hardware configuration when maintenance firmware is executed. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_APP = 13, /*!< Application firmware. */ + +} HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_E; + +/*! Structure holding information about one flash area. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_FLASH_LAYOUT_AREAS_Ttag +{ + /*! Area content type. + * Content type stored in this area. Possible values are defined as + * HIL_PRODUCT_DATA_FLASH_LAYOUT_CONTENT_TYPE_*. */ + uint32_t ulContentType; + + /*! Area start address. + * Absolut physical start address within the netX address space. */ + uint32_t ulAreaStart; + + /*! Area size. + * Size of the content area in bytes. */ + uint32_t ulAreaSize; + + /*! Chip number. + * Chip number, where the area is located. + * See HIL_PRODUCT_DATA_FLASH_LAYOUT_CHIPS_T */ + uint32_t ulChipNumber; + + /*! Area name. + * Name string of the area. May be used to identify an area. + * \note Null terminated c string. */ + char szName[16]; + + + /*! Area access type. + * Access control. Standard defines from libC fcntl.h will be used. + * \note Currently only O_RDONLY = 0 and O_RDWR = 2 shall be used. */ + uint8_t bAccessTyp; + + /*! Reserved area. + * Currently not used set to 0 to avoid conflicts with future definitions. */ + uint8_t abReserved[3]; + +} HIL_PRODUCT_DATA_FLASH_LAYOUT_AREAS_T; + +/*! Structure holding information about used flash memories chips. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_FLASH_LAYOUT_CHIPS_Ttag +{ + + /*! Chip number. + * Chip number, where the area is located: + * + * | Chip | netX90 | netX4000 | + * | ---- | ---------------------------- | ----------------------------- | + * | 0 | INTFLASH0 | Serial Flash @ SQI interface | + * | 1 | INTFLASH1 | | + * | 2 | Serial Flash @ SQI interface | | + * + * \note The INTFLASH2 within netX90 has currently no number assigned. */ + uint32_t ulChipNumber; + + /*! Flash name. + * Name string of the flash. May be used to identify an flash. + * \note Null terminated c string. */ + char szFlashName[16]; + + /*! Block size. + * Size of a Block in bytes in the Flash memory, usually this is the smallest + * area which can be erased independently. */ + uint32_t ulBlockSize; + + /*! Flash size. + * Size of the flash block in bytes. */ + uint32_t ulFlashSize; + + /*! Endurance cycles. + * Maximum erase/write cycles which the manufacturer allows for the flash. + * \note Flashes are complex devices which may have additional requirements + * how to write and delete them. Please refers the related data sheet. + * This information is only to get an overview what can be expected. */ + uint32_t ulMaxEnduranceCycles; + +} HIL_PRODUCT_DATA_FLASH_LAYOUT_CHIPS_T; + +/*! Structure holding information about the flash layout of the product. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PRODUCT_DATA_FLASH_LAYOUT_Ttag +{ + /*! List of flash areas. + * Flash areas which have been defined for this product. + * \note Set the complete entry to 0, to indicate an not used entry. */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_AREAS_T atArea[10]; + + /*! List of flash chips. + * List of all flashes which can be accessed from the netX controller. + * \note Set the complete entry to 0, to indicate an not used entry. + */ + HIL_PRODUCT_DATA_FLASH_LAYOUT_CHIPS_T atChip[4]; + +} HIL_PRODUCT_DATA_FLASH_LAYOUT_T; + + +/* Defines for deprecated structure names, do not use them for newer implementations. */ +#define HIL_PRODUCT_DATA_LIBSTORAGE_AREAS_T HIL_PRODUCT_DATA_FLASH_LAYOUT_AREAS_T +#define HIL_PRODUCT_DATA_LIBSTORAGE_CHIPS_T HIL_PRODUCT_DATA_FLASH_LAYOUT_CHIPS_T +#define HIL_PRODUCT_DATA_LIBSTORAGE_T HIL_PRODUCT_DATA_FLASH_LAYOUT_T + + +/*------------------------------------------------------------*/ +/*! PRODUCTION Data Header and Footer */ +/*------------------------------------------------------------*/ +#define HIL_PRODUCT_DATA_START_TOKEN "ProductData>" +#define HIL_PRODUCT_DATA_END_TOKEN "" (not null terminated!) + * 2. The size values have an expected values. + * 3. The label ends with the token " +#include "Hil_Compiler.h" +#include "Hil_SharedDefines.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_DUALPORTMEMORY) +#endif + + +/*===========================================================================*/ +/* */ +/* DEFAULT DPM structure */ +/* */ +/*===========================================================================*/ +/* */ +/* ------------------------- DPM Offset 0 */ +/* | System Channel | */ +/* ------------------------- */ +/* | Handshake channel | */ +/* ------------------------- */ +/* | Communication channel 0 | */ +/* ------------------------- */ +/* | Communication channel 1 | */ +/* ------------------------- */ +/* | Communication channel 2 | */ +/* ------------------------- */ +/* | Communication channel 3 | */ +/* ------------------------- */ +/* | Application channel 0 | */ +/* ------------------------- */ +/* | Application channel 1 | */ +/* ------------------------- DPM Offset xxxx */ +/*===========================================================================*/ +/*\/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ */ + +/* Global definitions */ +#define HIL_DPM_MAX_SUPPORTED_CHANNELS 8 /*!< Maximum number of possible channels */ + +/* Global system channel definitions */ +#define HIL_DPM_SYSTEM_HSK_CELL_OFFSET 0 /*!< Offset of the system handshake cells */ +#define HIL_DPM_SYSTEM_BLOCK_VERSION 0 /*!< Version of the system block structure */ +#define HIL_DPM_SYSTEM_CHANNEL_SIZE 512 /*!< Size of the system channel in bytes */ +#define HIL_DPM_SYSTEM_MAILBOX_MIN_SIZE 124 /*!< Size of a system packet mailbox in bytes */ + +#define HIL_DPM_SYSTEM_CHANNEL_INDEX 0 /*!< Index of the system channel, always 0 */ +#define HIL_DPM_HANDSHAKE_CHANNEL_INDEX 1 /*!< Index of the handshake channel, always 1 if available */ +#define HIL_DPM_COM_CHANNEL_START_INDEX 2 /*!< Start index of communication channel 0 */ + +/* Global handshake channel size */ +#define HIL_DPM_HANDSHAKE_CHANNEL_SIZE 256 /*!< Length of the handshake channel in bytes */ +#define HIL_DPM_HANDSHAKE_PAIRS 16 /*!< Number of possible handshake pairs */ + +/* Global communication channel definitions */ +#define HIL_DPM_STATUS_BLOCK_VERSION 2 /*!< version of the common status block structure */ +#define HIL_DPM_EXT_STATE_SIZE 432 /*!< Default size of the extended state block */ + +#define HIL_DPM_CHANNEL_MAILBOX_SIZE 1596 /*!< Default size of a channel packet mailbox in bytes */ +#define HIL_DPM_HP_IO_DATA_SIZE 64 /*!< Default size of the high prio I/O data */ +#define HIL_DPM_IO_DATA_SIZE 5760 /*!< Default I/O data size in bytes */ +#define HIL_DPM_IO_DATA_SIZE_8K_DPM 1536 /*!< I/O data size in bytes for hardware with 8KByte DPM */ + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX SYSTEM CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! System channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_CHANNEL_INFO_Ttag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bReserved; /*!< 0x01 reserved */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint16_t usSizeOfMailbox; /*!< 0x08 Size of the send and receive mailbox */ + uint16_t usMailboxStartOffset; /*!< 0x0A Start offset of the mailbox structure (see NETX_MAILBOX) */ + uint8_t abReserved[4]; /*!< 0x0C:0x0F Reserved area */ +} HIL_DPM_SYSTEM_CHANNEL_INFO_T; + +/*****************************************************************************/ +/*! Handshake channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_HANDSHAKE_CHANNEL_INFO_Ttag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bReserved[3]; /*!< 0x01 reserved */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint8_t abReserved[8]; /*!< 0x08:0x0F Reserved area */ +} HIL_DPM_HANDSHAKE_CHANNEL_INFO_T; + +/*****************************************************************************/ +/*! Communication channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_COMMUNICATION_CHANNEL_INFO_Ttag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bChannelId; /*!< 0x01 Channel / Port ID */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint16_t usCommunicationClass; /*!< 0x08 Communication Class (Master, Slave...) */ + uint16_t usProtocolClass; /*!< 0x0A Protocol Class (PROFIBUS, PROFINET....) */ + uint16_t usProtocolConformanceClass; /*!< 0x0C Protocol Conformance Class (DPV1, DPV2...) */ + uint8_t abReserved[2]; /*!< 0x0E:0x0F Reserved area */ +} HIL_DPM_COMMUNICATION_CHANNEL_INFO_T; + +/*****************************************************************************/ +/*! Application channel information structure (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_APPLICATION_CHANNEL_INFO_Ttag +{ + uint8_t bChannelType; /*!< 0x00 Type of this channel */ + uint8_t bChannelId; /*!< 0x01 Channel / Port ID */ + uint8_t bSizePositionOfHandshake; /*!< 0x02 Size and position of the handshake cells */ + uint8_t bNumberOfBlocks; /*!< 0x03 Number of blocks in this channel */ + uint32_t ulSizeOfChannel; /*!< 0x04 Size of channel in bytes */ + uint8_t abReserved[8]; /*!< 0x0C:0x0F Reserved area */ +} HIL_DPM_APPLICATION_CHANNEL_INFO_T; + +/*****************************************************************************/ +/*! System information block (Size = 48 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_INFO_BLOCK_Ttag +{ + uint8_t abCookie[4]; /*!< 0x00 "netX" cookie */ + uint32_t ulDpmTotalSize; /*!< 0x04 Total Size of the whole dual-port memory in bytes */ + uint32_t ulDeviceNumber; /*!< 0x08 Device number */ + uint32_t ulSerialNumber; /*!< 0x0C Serial number */ + uint16_t ausHwOptions[4]; /*!< 0x10 Hardware options, xC port 0..3 */ + uint16_t usManufacturer; /*!< 0x18 Manufacturer Location */ + uint16_t usProductionDate; /*!< 0x1A Date of production */ + uint32_t ulLicenseFlags1; /*!< 0x1C License code flags 1 */ + uint32_t ulLicenseFlags2; /*!< 0x20 License code flags 2 */ + uint16_t usNetxLicenseID; /*!< 0x24 netX license identification */ + uint16_t usNetxLicenseFlags; /*!< 0x26 netX license flags */ + uint16_t usDeviceClass; /*!< 0x28 netX device class */ + uint8_t bHwRevision; /*!< 0x2A Hardware revision index */ + uint8_t bHwCompatibility; /*!< 0x2B Hardware compatibility index */ + uint8_t bDevIdNumber; /*!< 0x2C Device identification number (rotary switch) */ + uint8_t bReserved; /*!< 0x2D Reserved byte */ + uint16_t usReserved; /*!< 0x2E:0x2F Reserved */ +} HIL_DPM_SYSTEM_INFO_BLOCK_T; + +/*****************************************************************************/ +/*! Channel information block (Size always 16 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE union __HIL_PACKED_POST HIL_DPM_CHANNEL_INFO_BLOCK_Ttag +{ + HIL_DPM_SYSTEM_CHANNEL_INFO_T tSystem; + HIL_DPM_HANDSHAKE_CHANNEL_INFO_T tHandshake; + HIL_DPM_COMMUNICATION_CHANNEL_INFO_T tCom; + HIL_DPM_APPLICATION_CHANNEL_INFO_T tApp; +} HIL_DPM_CHANNEL_INFO_BLOCK_T; + +/*****************************************************************************/ +/*! System information block (Size = 8 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_CONTROL_BLOCK_Ttag +{ + uint32_t ulSystemCommandCOS; /*!< 0x00 System channel change of state command */ + uint32_t ulSystemControl; /*!< 0x04 System channel control (only for eCos on netX90/netX4000) */ +} HIL_DPM_SYSTEM_CONTROL_BLOCK_T; + +/*****************************************************************************/ +/*! System status block (Size = 64 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_STATUS_BLOCK_Ttag +{ + uint32_t ulSystemCOS; /*!< 0x00 System channel change of state acknowledge */ + uint32_t ulSystemStatus; /*!< 0x04 Actual system state */ + uint32_t ulSystemError; /*!< 0x08 Actual system error */ + uint32_t ulBootError; /*!< 0x0C Bootup error (only set by 2nd Stage Bootloader) */ + uint32_t ulTimeSinceStart; /*!< 0x10 time since start in seconds */ + uint16_t usCpuLoad; /*!< 0x14 cpu load in 0,01% units (10000 => 100%) */ + uint16_t usReserved; /*!< 0x16 Reserved */ + uint32_t ulHWFeatures; /*!< 0x18 Hardware features */ + uint8_t abReserved[36]; /*!< 0x1C:3F Reserved */ +} HIL_DPM_SYSTEM_STATUS_BLOCK_T; + +/*****************************************************************************/ +/*! System send packet mailbox (Size 128 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_SEND_MAILBOX_Ttag +{ + uint16_t usPackagesAccepted; /*!< Number of packages that can be accepted */ + uint16_t usReserved; /*!< Reserved */ + uint8_t abSendMbx[HIL_DPM_SYSTEM_MAILBOX_MIN_SIZE]; /*!< Send mailbox packet buffer */ +} HIL_DPM_SYSTEM_SEND_MAILBOX_T; + +/*****************************************************************************/ +/*! System receive packet mailbox (Size 128 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_RECV_MAILBOX_Ttag +{ + uint16_t usWaitingPackages; /*!< Number of packages waiting to be processed */ + uint16_t usReserved; /*!< Reserved */ + uint8_t abRecvMbx[HIL_DPM_SYSTEM_MAILBOX_MIN_SIZE]; /*!< Receive mailbox packet buffer */ +} HIL_DPM_SYSTEM_RECV_MAILBOX_T; + +/*****************************************************************************/ +/*! Handshake cell definition */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE union __HIL_PACKED_POST HIL_DPM_HANDSHAKE_CELL_Ttag +{ + __HIL_PACKED_PRE struct __HIL_PACKED_POST + { + volatile uint8_t abData[2]; /*!< Data value, not belonging to handshake */ + volatile uint8_t bNetxFlags; /*!< Device status flags (8Bit Mode) */ + volatile uint8_t bHostFlags; /*!< Device command flags (8Bit Mode) */ + } t8Bit; + + __HIL_PACKED_PRE struct __HIL_PACKED_POST + { + volatile uint16_t usNetxFlags; /*!< Device status flags (16Bit Mode) */ + volatile uint16_t usHostFlags; /*!< Device command flags (16Bit Mode)*/ + } t16Bit; + volatile uint32_t ulValue; /*!< Handshake cell value */ +} HIL_DPM_HANDSHAKE_CELL_T; + +/*****************************************************************************/ +/*! Structure of the whole system channel (DPM) (Size 512 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SYSTEM_CHANNEL_Ttag +{ + HIL_DPM_SYSTEM_INFO_BLOCK_T tSystemInfo; /*!< 0x000:0x02F System information block */ + HIL_DPM_CHANNEL_INFO_BLOCK_T atChannelInfo[HIL_DPM_MAX_SUPPORTED_CHANNELS]; /*!< 0x030:0x0AF Channel information block */ + HIL_DPM_HANDSHAKE_CELL_T tSysHandshake; /*!< 0x0B0:0x0B3 Handshake cells used, if not in Handshake block */ + uint8_t abReserved[4]; /*!< 0x0B4:0x0B7 unused/reserved */ + HIL_DPM_SYSTEM_CONTROL_BLOCK_T tSystemControl; /*!< 0x0B8:0x0BF System control block */ + HIL_DPM_SYSTEM_STATUS_BLOCK_T tSystemState; /*!< 0x0C0:0x0FF System state block */ + HIL_DPM_SYSTEM_SEND_MAILBOX_T tSystemSendMailbox; /*!< 0x100:0x17F Send mailbox */ + HIL_DPM_SYSTEM_RECV_MAILBOX_T tSystemRecvMailbox; /*!< 0x180:0x1FF Receive mailbox */ +} HIL_DPM_SYSTEM_CHANNEL_T; + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX HANDSHAKE CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! Handshake array definition */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_HANDSHAKE_ARRAY_Ttag +{ + HIL_DPM_HANDSHAKE_CELL_T atHsk[HIL_DPM_HANDSHAKE_PAIRS]; /*!< Handshake cell block definition */ +} HIL_DPM_HANDSHAKE_ARRAY_T; + +/*****************************************************************************/ +/*! Handshake channel definition */ +/*****************************************************************************/ +typedef struct HIL_DPM_HANDSHAKE_CHANNEL_Ttag +{ + HIL_DPM_HANDSHAKE_CELL_T tSysFlags; /*!< 0x00 System handshake flags */ + HIL_DPM_HANDSHAKE_CELL_T tHskFlags; /*!< 0x04 not used */ + HIL_DPM_HANDSHAKE_CELL_T tCommFlags0; /*!< 0x08 channel 0 handshake flags */ + HIL_DPM_HANDSHAKE_CELL_T tCommFlags1; /*!< 0x0C channel 1 handshake flags */ + HIL_DPM_HANDSHAKE_CELL_T tCommFlags2; /*!< 0x10 channel 2 handshake flags */ + HIL_DPM_HANDSHAKE_CELL_T tCommFlags3; /*!< 0x14 channel 3 handshake flags */ + HIL_DPM_HANDSHAKE_CELL_T tAppFlags0; /*!< 0x18 not supported yet */ + HIL_DPM_HANDSHAKE_CELL_T tAppFlags1; /*!< 0x1C not supported yet */ + uint32_t aulReserved[ 56 ]; /*!< 0x20 - 0xFF */ +} HIL_DPM_HANDSHAKE_CHANNEL_T; + +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XX COMMUNICATION CHANNEL LAYOUT XXXXXXXXXXXXXX*/ +/*XX XXXXXXXXXXXXXX*/ +/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX*/ + +/*****************************************************************************/ +/*! Default master status structure */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_MASTER_STATUS_Ttag +{ + uint32_t ulSlaveState; /*!< Slave status */ + uint32_t ulSlaveErrLogInd; /*!< Slave error indication */ + uint32_t ulNumOfConfigSlaves; /*!< Number of configured slaves */ + uint32_t ulNumOfActiveSlaves; /*!< Number of active slaves */ + uint32_t ulNumOfDiagSlaves; /*!< Number of slaves in diag mode */ + uint32_t ulReserved; /*!< unused/reserved */ +} HIL_DPM_MASTER_STATUS_T; + +/* Master Status definitions */ +#define HIL_SLAVE_STATE_UNDEFINED 0x00000000 +#define HIL_SLAVE_STATE_OK 0x00000001 +#define HIL_SLAVE_STATE_FAILED 0x00000002 + +/*****************************************************************************/ +/*! Channel handshake block (Size always 8 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_HANDSHAKE_BLOCK_Ttag +{ + uint8_t abReserved[8]; /*!< unused/reserved */ +} HIL_DPM_HANDSHAKE_BLOCK_T; + +/*****************************************************************************/ +/*! Channel control block (Size 8 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_CONTROL_BLOCK_Ttag +{ + uint32_t ulApplicationCOS; /*!< 0x00 Application "Change Of State" flags */ + uint32_t ulDeviceWatchdog; /*!< 0x04 Watchdog cell written by the Host */ +} HIL_DPM_CONTROL_BLOCK_T; + +/*****************************************************************************/ +/*! Channel common status block (Size 64 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_COMMON_STATUS_BLOCK_Ttag +{ + uint32_t ulCommunicationCOS; /*!< 0x00 Communication channel "Change Of State" */ + uint32_t ulCommunicationState; /*!< 0x04 Actual communication state */ + uint32_t ulCommunicationError; /*!< 0x08 Actual communication error */ + uint16_t usVersion; /*!< 0x0C Version of the diagnostic structure */ + uint16_t usWatchdogTime; /*!< 0x0E Configured watchdog time */ + uint8_t bPDInHskMode; /*!< 0x10 Input area handshake mode. */ + uint8_t bPDInSource; /*!< 0x11 Reserved. Set to zero.*/ + uint8_t bPDOutHskMode; /*!< 0x12 Output area handshake mode. */ + uint8_t bPDOutSource; /*!< 0x13 Reserved. Set to zero.*/ + uint32_t ulHostWatchdog; /*!< 0x14 Host watchdog */ + uint32_t ulErrorCount; /*!< 0x18 Number of erros since power-up */ + uint8_t bErrorLogInd; /*!< 0x1C Counter of available Log Entries (not supported yet) */ + uint8_t bErrorPDInCnt; /*!< 0x1D Counter of input process data handshake handling errors */ + uint8_t bErrorPDOutCnt; /*!< 0x1E Counter of output process data handshake handling errors */ + uint8_t bErrorSyncCnt; /*!< 0x1F Counter of synchronization handshake handling errors */ + uint8_t bSyncHskMode; /*!< 0x20 Synchronization Handshake mode. */ + uint8_t bSyncSource; /*!< 0x21 Synchronization source. */ + uint16_t ausReserved[3]; /*!< 0x22 Reserved */ + __HIL_PACKED_PRE union __HIL_PACKED_POST + { + HIL_DPM_MASTER_STATUS_T tMasterStatusBlock; /*!< For master implementations */ + uint32_t aulReserved[6]; /*!< reserved */ + } uStackDepended; /*!< 0x28 Stack depend status block */ +} HIL_DPM_COMMON_STATUS_BLOCK_T; + +/*****************************************************************************/ +/*! Channel extended status block (Size 432 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_EXTENDED_STATUS_BLOCK_Ttag +{ + uint8_t abExtendedStatus[HIL_DPM_EXT_STATE_SIZE]; /*!< 0x00 Extended status buffer */ +} HIL_DPM_EXTENDED_STATUS_BLOCK_T; + +/* Description of the extended status block structure */ +#define HIL_EXT_STS_MAX_STRUCTURES 24 +/* Location definiton of the ext. state information (bStateArea) */ +#define HIL_EXT_STS_STD_OUTPUT_BLK_ID 8 /*!< State field located in standard output area */ +#define HIL_EXT_STS_HI_OUTPUT_BLK_ID 9 /*!< State field located in high prio. output area */ +#define HIL_EXT_STS_STD_INPUT_BLK_ID 0 /*!< State field located in standard input area */ +#define HIL_EXT_STS_HI_INPUT_BLK_ID 1 /*!< State field located in high prio. input area */ +/* Definition of state information (bStateTypeID) */ +#define HIL_EXT_STS_SLAVE_CONFIGURED (1) /*!< Configured slave bit field */ +#define HIL_EXT_STS_SLAVE_ACTIV (2) /*!< Activ slave bit field */ +#define HIL_EXT_STS_SLAVE_DIAGNOSTIC (3) /*!< Slave diagnostic bit field */ +#define HIL_EXT_STS_COMMANDS (4) /*!< Command table bit field */ +#define HIL_EXT_STS_IO_CHANGED (5) /*!< CoS bit field */ +#define HIL_EXT_STS_IOPS_BYTEWISE (6) /*!< IO provider state */ +#define HIL_EXT_STS_IOPS_BITWISE (7) /*!< IO provider state */ +#define HIL_EXT_STS_IOCS_BYTEWISE (8) /*!< IO consumer state */ +#define HIL_EXT_STS_IOCS_BITWISE (9) /*!< IO consumer state */ +#define HIL_EXT_STS_EIP_ASSEMBLY_STATE (10) /*!< Assembly bitfield */ +#define HIL_EXT_STS_COM_PDO_COUNTER (11) /*!< CANopen PDO counter */ + +#define HIL_EXT_STS_NAME_OUTPUT "STD_OUTPUT" +#define HIL_EXT_STS_NAME_INPUT "STD_INPUT" + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_EXTENDED_STATE_STRUCT_Ttag +{ + uint8_t bStateArea; /*!< Location of the ext. state information */ + uint8_t bStateTypeID; /*!< Type of the state information */ + uint16_t usNumOfStateEntries; /*!< Number of state entries of the type bStateTypeID */ + uint32_t ulStateOffset; /*!< Byte start offset in the defined I/O area*/ +} HIL_DPM_EXTENDED_STATE_STRUCT_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_EXTENDED_STATE_FIELD_Ttag +{ + uint8_t bReserved[3]; /*!< 3 Bytes preserved. Not used. */ + uint8_t bNumStateStructs; /*!< Number of following state structures */ + HIL_DPM_EXTENDED_STATE_STRUCT_T atStateStruct[HIL_EXT_STS_MAX_STRUCTURES]; +} HIL_DPM_EXTENDED_STATE_FIELD_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_EXTENDED_STATE_FIELD_DEFINITION_Ttag +{ + uint8_t abReserved[172]; /*!< Default, protocol specific information area */ + HIL_DPM_EXTENDED_STATE_FIELD_T tExtStateField; /*!< Extended status structures */ +} HIL_DPM_EXTENDED_STATE_FIELD_DEFINITION_T; +/*****************************************************************************/ +/*! Channel send packet mailbox block (Size 1600 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_SEND_MAILBOX_BLOCK_Ttag +{ + uint16_t usPackagesAccepted; /*!< 0x00 Number of packages that can be accepted */ + uint16_t usReserved; /*!< 0x02 Reserved */ + uint8_t abSendMailbox[HIL_DPM_CHANNEL_MAILBOX_SIZE]; /*!< 0x04 Send mailbox packet buffer */ +} HIL_DPM_SEND_MAILBOX_BLOCK_T; + +/*****************************************************************************/ +/*! Channel receive packet mailbox block (Size 1600 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_RECV_MAILBOX_BLOCK_Ttag +{ + uint16_t usWaitingPackages; /*!< 0x00 Number of packages waiting to be processed */ + uint16_t usReserved; /*!< 0x02 Reserved */ + uint8_t abRecvMailbox[HIL_DPM_CHANNEL_MAILBOX_SIZE]; /*!< 0x04 Receive mailbox packet buffer */ +} HIL_DPM_RECV_MAILBOX_BLOCK_T; + +/*****************************************************************************/ +/*! Structure of the DEFAULT communication channel (Size 15616 Byte) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_DEFAULT_COMM_CHANNEL_Ttag +{ + HIL_DPM_HANDSHAKE_BLOCK_T tReserved; /*!< 0x000:0x007 Reserved for later use */ + HIL_DPM_CONTROL_BLOCK_T tControl; /*!< 0x008:0x00F Control block */ + HIL_DPM_COMMON_STATUS_BLOCK_T tCommonStatus; /*!< 0x010:0x04F Common status block */ + HIL_DPM_EXTENDED_STATUS_BLOCK_T tExtendedStatus; /*!< 0x050:0x1FF Extended status block */ + HIL_DPM_SEND_MAILBOX_BLOCK_T tSendMbx; /*!< 0x200:0x83F Send mailbox block */ + HIL_DPM_RECV_MAILBOX_BLOCK_T tRecvMbx; /*!< 0x840:0xE7F Recveice mailbox block */ + uint8_t abPd1Output[HIL_DPM_HP_IO_DATA_SIZE]; /*!< 0xE80:0xEBF Process data 1 output area */ + uint8_t abPd1Input[HIL_DPM_HP_IO_DATA_SIZE]; /*!< 0xEC0:0xEFF Process data 1 input area */ + uint8_t abReserved1[256]; /*!< 0xF00:0xFFF Reserved */ + uint8_t abPd0Output[HIL_DPM_IO_DATA_SIZE]; /*!< 0x1000:0x267F Process data 0 output area */ + uint8_t abPd0Input[HIL_DPM_IO_DATA_SIZE]; /*!< 0x2680:0x3CFF Process data 0 input area */ +} HIL_DPM_DEFAULT_COMM_CHANNEL_T; + + +/*****************************************************************************/ +/*! Structure of the communication channel for 8K DPM hardware (e.g. COMX10) */ +/*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_8K_DPM_COMM_CHANNEL_Ttag +{ + HIL_DPM_HANDSHAKE_BLOCK_T tReserved; /*!< 0x000:0x007 Reserved for later use */ + HIL_DPM_CONTROL_BLOCK_T tControl; /*!< 0x008:0x00F Control block */ + HIL_DPM_COMMON_STATUS_BLOCK_T tCommonStatus; /*!< 0x010:0x04F Common status block */ + HIL_DPM_EXTENDED_STATUS_BLOCK_T tExtendedStatus; /*!< 0x050:0x1FF Extended status block */ + HIL_DPM_SEND_MAILBOX_BLOCK_T tSendMbx; /*!< 0x200:0x83F Send mailbox block */ + HIL_DPM_RECV_MAILBOX_BLOCK_T tRecvMbx; /*!< 0x840:0xE7F Recveice mailbox block */ + uint8_t abPd1Output[HIL_DPM_HP_IO_DATA_SIZE]; /*!< 0xE80:0xEBF Process data 1 output area */ + uint8_t abPd1Input[HIL_DPM_HP_IO_DATA_SIZE]; /*!< 0xEC0:0xEFF Process data 1 input area */ + uint8_t abReserved1[256]; /*!< 0xF00:0xFFF Reserved */ + uint8_t abPd0Output[HIL_DPM_IO_DATA_SIZE_8K_DPM]; /*!< 0x1000:0x15FF Process data 0 output area */ + uint8_t abPd0Input[HIL_DPM_IO_DATA_SIZE_8K_DPM]; /*!< 0x1600:0x1BFF Process data 0 input area */ + uint8_t abReserved2[256]; /*!< 0x1C00:0x1CFF Reserved */ +} HIL_DPM_8K_DPM_COMM_CHANNEL_T; + + +/* /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ /\ */ +/* End of DPM Layout definition */ + +/*===========================================================================*/ +/* */ +/* Standardized Handshake Flags */ +/* */ +/*===========================================================================*/ + +/* --------------------------------------------*/ +/* System Channel Handshake Flags */ +/* --------------------------------------------*/ +/* HOST Flags */ +#define HSF_RESET 0x0001 /*!< Reset command bitmask */ +#define HSF_BOOTSTART 0x0002 /*!< Set when device has a second stage loader, to enter bootloader mode after a system start */ +#define HSF_HOST_COS_CMD 0x0004 /*!< Host "Change Of State" command bitmask */ +#define HSF_NETX_COS_ACK 0x0008 /*!< NetX "Change Of State" acknowlegde bitmask */ +#define HSF_SEND_MBX_CMD 0x0010 /*!< Send mailbox command bitmask */ +#define HSF_RECV_MBX_ACK 0x0020 /*!< Receive mailbox acknowledge bitmask */ +#define HSF_EXT_SEND_MBX_CMD 0x0040 /*!< Second stage loader extended mailbox command bitmask */ +#define HSF_EXT_RECV_MBX_ACK 0x0080 /*!< Second stage loader extended mailbox ack bitmask */ + +/* HOST Flags as Bit number */ +#define HSF_RESET_BIT_NO 0 /*!< Reset command bitnumber */ +#define HSF_BOOTLOADER_BIT_NO 1 /*!< Bitnumber to be set when device has a second stage loader, to enter bootloader mode after a system start */ +#define HSF_HOST_COS_CMD_BIT_NO 2 /*!< Host "Change Of State" command bitnumber */ +#define HSF_NETX_COS_ACK_BIT_NO 3 /*!< NetX "Change Of State" acknowlegde bitnumber */ +#define HSF_SEND_MBX_CMD_BIT_NO 4 /*!< Send mailbox command bitnumber */ +#define HSF_RECV_MBX_ACK_BIT_NO 5 /*!< Receive mailbox acknowledge bitnumber */ +#define HSF_EXT_SEND_MBX_CMD_BIT_NO 6 /*!< Second stage loader extended mailbox command bitnumber */ +#define HSF_EXT_RECV_MBX_ACK_BIT_NO 7 /*!< Second stage loader extended mailbox ack bitnumber */ + + +/* netX Flags */ +#define NSF_READY 0x0001 /*!< netX System READY bitmask */ +#define NSF_ERROR 0x0002 /*!< General system error bitmask */ +#define NSF_HOST_COS_ACK 0x0004 /*!< Host "Change Of State" acknowledge bitmask */ +#define NSF_NETX_COS_CMD 0x0008 /*!< NetX "Change of State command bitmask */ +#define NSF_SEND_MBX_ACK 0x0010 /*!< Send mailbox acknowledge bitmask */ +#define NSF_RECV_MBX_CMD 0x0020 /*!< Receive mailbox command bitmask */ +#define NSF_EXT_SEND_MBX_ACK 0x0040 /*!< Second stage loader extended mailbox ack bitmask */ +#define NSF_EXT_RECV_MBX_CMD 0x0080 /*!< Second stage loader extended mailbox command bitmask */ +/* netX Flags as Bit number */ +#define NSF_READY_BIT_NO 0 /*!< netX System READY bitnumber */ +#define NSF_ERROR_BIT_NO 1 /*!< General system error bitnumber */ +#define NSF_HOST_COS_ACK_BIT_NO 2 /*!< Host "Change Of State" acknowledge bitnumber */ +#define NSF_NETX_COS_CMD_BIT_NO 3 /*!< NetX "Change of State command bitnumber */ +#define NSF_SEND_MBX_ACK_BIT_NO 4 /*!< Send mailbox acknowledge bitnumber */ +#define NSF_RECV_MBX_CMD_BIT_NO 5 /*!< Receive mailbox command bitnumber */ +#define NSF_EXT_SEND_MBX_ACK_BIT_NO 6 /*!< Second stage loader extended mailbox ack bitnumber */ +#define NSF_EXT_RECV_MBX_CMD_BIT_NO 7 /*!< Second stage loader extended mailbox command bitnumber */ + +/*--------------------------------------------*/ +/* Communication Channel Handshake Flags */ +/*--------------------------------------------*/ +/* HOST Communication Channel Flags */ +#define HCF_HOST_READY 0x0001 /*!< Host application is Ready bitmask */ +#define HCF_unused 0x0002 /*!< unused */ +#define HCF_HOST_COS_CMD 0x0004 /*!< Host "Change Of State" command bitmask */ +#define HCF_NETX_COS_ACK 0x0008 /*!< NetX "Change Of State" acknowledge bitmask */ +#define HCF_SEND_MBX_CMD 0x0010 /*!< Send mailbox command bitmask */ +#define HCF_RECV_MBX_ACK 0x0020 /*!< Receive mailbox ackowledge bitmask */ +#define HCF_PD0_OUT_CMD 0x0040 /*!< Process data, block 0, output command bitmask */ +#define HCF_PD0_IN_ACK 0x0080 /*!< Process data, block 0, input acknowlegde bitmask */ +#define HCF_PD1_OUT_CMD 0x0100 /*!< Process data, block 1, output command bitmask */ +#define HCF_PD1_IN_ACK 0x0200 /*!< Process data, block 1, input acknowlegde bitmask */ +/* HOST Communication Channel Flags as Bit number */ +#define HCF_HOST_READY_BIT_NO 0 /*!< Host application is Ready bitnumber */ +#define HCF_unused_BIT_NO 1 /*!< unused */ +#define HCF_HOST_COS_CMD_BIT_NO 2 /*!< Host "Change Of State" command bitnumber */ +#define HCF_NETX_COS_ACK_BIT_NO 3 /*!< NetX "Change Of State" acknowledge bitnumber */ +#define HCF_SEND_MBX_CMD_BIT_NO 4 /*!< Send mailbox command bitnumber */ +#define HCF_RECV_MBX_ACK_BIT_NO 5 /*!< Receive mailbox ackowledge bitnumber */ +#define HCF_PD0_OUT_CMD_BIT_NO 6 /*!< Process data, block 0, output command bitnumber */ +#define HCF_PD0_IN_ACK_BIT_NO 7 /*!< Process data, block 0, input acknowlegde bitnumber */ +#define HCF_PD1_OUT_CMD_BIT_NO 8 /*!< Process data, block 1, output command bitnumber */ +#define HCF_PD1_IN_ACK_BIT_NO 9 /*!< Process data, block 1, input acknowlegde bitnumber */ + +/* netX Communication Channel Flags */ +#define NCF_COMMUNICATING 0x0001 /*!< Channel has an active conection bitmask */ +#define NCF_ERROR 0x0002 /*!< Communication channel error bitmask */ +#define NCF_HOST_COS_ACK 0x0004 /*!< Host "Change Of State" acknowledge bitmask */ +#define NCF_NETX_COS_CMD 0x0008 /*!< NetX "Change Of State" command bitmask */ +#define NCF_SEND_MBX_ACK 0x0010 /*!< Send mailbox acknowldege bitmask */ +#define NCF_RECV_MBX_CMD 0x0020 /*!< Receive mailbox command bitmask */ +#define NCF_PD0_OUT_ACK 0x0040 /*!< Process data, block 0, output acknowledge bitmask */ +#define NCF_PD0_IN_CMD 0x0080 /*!< Process data, block 0, input command bitmask */ +#define NCF_PD1_OUT_ACK 0x0100 /*!< Process data, block 1, output acknowlegde bitmask */ +#define NCF_PD1_IN_CMD 0x0200 /*!< Process data, block 1, input command bitmask */ +/* netX Communication Channel Flags as Bit number */ +#define NCF_COMMUNICATING_BIT_NO 0 /*!< Channel has an active conection bitnumber */ +#define NCF_ERROR_BIT_NO 1 /*!< Communication channel error bitnumber */ +#define NCF_HOST_COS_ACK_BIT_NO 2 /*!< Host "Change Of State" acknowledge bitnumber */ +#define NCF_NETX_COS_CMD_BIT_NO 3 /*!< NetX "Change Of State" command bitnumber */ +#define NCF_SEND_MBX_ACK_BIT_NO 4 /*!< Send mailbox acknowldege bitnumber */ +#define NCF_RECV_MBX_CMD_BIT_NO 5 /*!< Receive mailbox command bitnumber */ +#define NCF_PD0_OUT_ACK_BIT_NO 6 /*!< Process data, block 0, output acknowledge bitnumber */ +#define NCF_PD0_IN_CMD_BIT_NO 7 /*!< Process data, block 0, input command bitnumber */ +#define NCF_PD1_OUT_ACK_BIT_NO 8 /*!< Process data, block 1, output acknowlegde bitnumber */ +#define NCF_PD1_IN_CMD_BIT_NO 9 /*!< Process data, block 1, input command bitnumber */ + +/*--------------------------------------------*/ +/* Handshake Flags State Definitions */ +/*--------------------------------------------*/ +/* Flag state definition */ +#define HIL_FLAGS_EQUAL 0 +#define HIL_FLAGS_NOT_EQUAL 1 +#define HIL_FLAGS_CLEAR 2 +#define HIL_FLAGS_SET 3 +#define HIL_FLAGS_NONE 0xFF + +#define HIL_FLAG_CLEAR 0 +#define HIL_FLAG_SET 1 + +/*===========================================================================*/ +/* */ +/* SYSTEM CHANNEL Configuration definitions */ +/* */ +/*===========================================================================*/ + +/*--------------------------------------------*/ +/* SYSTEM CONTROL BLOCK */ +/*--------------------------------------------*/ +/* ulSystemCommandCOS flags */ +#define HIL_SYS_RESET_COOKIE 0x55AA55AA /*!< System Reset cookie */ + +/* ulSystemControl flags and its functionality only exist for netX90/netX4000 */ +/* ATTENTION: */ +/* The layout must correspond to ulResetMode defined in the hilscher packet */ +/* command HIL_FIRMWARE_RESET_REQ, because of the evaluation function */ +/* called by the DPM and Packet based functions. */ + +/* Hilscher reset mode definitions */ +#define HIL_SYS_CONTROL_RESET_MODE_MASK 0x0000000F +#define HIL_SYS_CONTROL_RESET_MODE_SRT 0 + +#define HIL_SYS_CONTROL_RESET_MODE_COLDSTART 0 +#define HIL_SYS_CONTROL_RESET_MODE_WARMSTART 1 +#define HIL_SYS_CONTROL_RESET_MODE_BOOTSTART 2 +#define HIL_SYS_CONTROL_RESET_MODE_UPDATESTART 3 +#define HIL_SYS_CONTROL_RESET_MODE_CONSOLESTART 4 /* not useable via DPM */ + +/* Hilscher reset parameter definitions */ +#define HIL_SYS_CONTROL_RESET_PARAM_MASK 0x000000F0 +#define HIL_SYS_CONTROL_RESET_PARAM_SRT 4 + +/* Hilscher additional reset flag definitions */ +#define HIL_SYS_CONTROL_RESET_FLAG_MASK 0xFFFFFF00 +#define HIL_SYS_CONTROL_RESET_FLAG_SRT 8 + +/* Clear REMANENT flag */ +#define HIL_SYS_CONTROL_RESET_FLAG_CLEAR_REMANENT_MASK 0x00000100 +#define HIL_SYS_CONTROL_RESET_FLAG_CLEAR_REMANENT_SRT 8 + +/* Install VERIFICATION flag */ +#define HIL_SYS_CONTROL_RESET_FLAG_VERIFY_INSTALL_MASK 0x00000200 +#define HIL_SYS_CONTROL_RESET_FLAG_VERIFY_INSTALL_SRT 9 + +/* Hilscher reset parameter and flag definiton mask */ +#define HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK (HIL_SYS_CONTROL_RESET_FLAG_MASK | HIL_SYS_CONTROL_RESET_PARAM_MASK) + +/*--------------------------------------------*/ +/* SYSTEM STATUS BLOCK */ +/*--------------------------------------------*/ +/* System Change of State flags */ +#define HIL_SYS_COS_UNDEFINED 0 +#define HIL_SYS_COS_DEFAULT_MEMORY 0x80000000 +/* System Change of State flags as bit number */ +#define HIL_SYS_COS_DEFAULT_MEMORY_BIT_NO 31 + +/* System Status */ +#define HIL_SYS_STATUS_UNDEFINED 0x00000000 +#define HIL_SYS_STATUS_OK 0x00000001 +#define HIL_SYS_STATUS_IDPM 0x00400000 +#define HIL_SYS_STATUS_APP 0x00800000 +#define HIL_SYS_STATUS_BOOTMEDIUM_MASK 0x0F000000 +#define HIL_SYS_STATUS_BOOTMEDIUM_RAM 0x00000000 +#define HIL_SYS_STATUS_BOOTMEDIUM_SERFLASH 0x01000000 +#define HIL_SYS_STATUS_BOOTMEDIUM_PARFLASH 0x02000000 +#define HIL_SYS_STATUS_NO_SYSVOLUME 0x20000000 +#define HIL_SYS_STATUS_SYSVOLUME_FFS 0x40000000 /*!< _FFS = Flash File System */ +#define HIL_SYS_STATUS_NXO_SUPPORTED 0x80000000 + +/* System Status definition */ +#define HIL_SYS_STATE_UNDEFINED 0 +#define HIL_SYS_STATE_OK 1 + +/* System Error definitions */ +#define HIL_SYS_ERROR_SUCCESS 0 + +/* System Status */ +#define HIL_SYS_STATE_RESET 0x000000F0 +#define HIL_SYS_STATE_SELF_TEST 0x000000EF +#define HIL_SYS_STATE_RAM_TEST 0x000000EE +#define HIL_SYS_STATE_FAULT_INIT 0x000000ED +#define HIL_SYS_STATE_DEVICE_INIT 0x000000EC +#define HIL_SYS_STATE_MAILBOX_INIT 0x000000EB +#define HIL_SYS_STATE_SERIAL_INIT 0x000000EA +#define HIL_SYS_STATE_SEMAPHORE_INIT 0x000000E9 +#define HIL_SYS_STATE_QUEUE_INIT 0x000000E8 +#define HIL_SYS_STATE_MUTEX_INIT 0x000000E7 +#define HIL_SYS_STATE_EVENT_INIT 0x000000E6 +#define HIL_SYS_STATE_SIGNAL_INIT 0x000000E5 +#define HIL_SYS_STATE_TIMER_INIT 0x000000E4 +#define HIL_SYS_STATE_BARRIER_INIT 0x000000E3 +#define HIL_SYS_STATE_DIAGNOSTIC_INIT 0x000000E2 +#define HIL_SYS_STATE_FINITE_STATE_INIT 0x000000E1 +#define HIL_SYS_STATE_INTERRUPT_INIT 0x000000E0 +#define HIL_SYS_STATE_LED_INIT 0x000000DF +/*#define HIL_SYS_STATE_TIMER_INIT 0x000000DE*/ +#define HIL_SYS_STATE_PAR_FLASH_INIT 0x000000DD +#define HIL_SYS_STATE_XC_INIT 0x000000DC +#define HIL_SYS_STATE_PHY_INIT 0x000000DB +#define HIL_SYS_STATE_UART_INIT 0x000000DA +#define HIL_SYS_STATE_VOL_INIT 0x000000D9 +#define HIL_SYS_STATE_EDD_INIT 0x000000D8 +#define HIL_SYS_STATE_ICM_INIT 0x000000D7 +#define HIL_SYS_STATE_USB_INIT 0x000000D6 +#define HIL_SYS_STATE_FIFO_INIT 0x000000D5 +#define HIL_SYS_STATE_EBUS_INIT 0x000000D4 +#define HIL_SYS_STATE_MMU_INIT 0x000000D3 +#define HIL_SYS_STATE_TCM_INIT 0x000000D2 +#define HIL_SYS_STATE_CCH_INIT 0x000000D1 +#define HIL_SYS_STATE_MID_SYS_INIT 0x000000D0 +#define HIL_SYS_STATE_MID_DBM_INIT 0x000000CF +#define HIL_SYS_STATE_HIF_INIT 0x000000CE +#define HIL_SYS_STATE_HIFPIO_INIT 0x000000CD +#define HIL_SYS_STATE_SPI_INIT 0x000000CC +#define HIL_SYS_STATE_FIQ_INIT 0x000000CB +#define HIL_SYS_STATE_SEC_INIT 0x000000CA +#define HIL_SYS_STATE_CRC_INIT 0x000000C9 +#define HIL_SYS_STATE_MEMORY_INIT 0x000000C8 +#define HIL_SYS_STATE_SER_FLASH_INIT 0x000000C7 +#define HIL_SYS_STATE_TASKS_INIT 0x000000C6 +#define HIL_SYS_STATE_MID_STA_INIT 0x000000C5 +#define HIL_SYS_STATE_MULTITASK_INIT 0x000000C4 +#define HIL_SYS_STATE_IDLE_TASK_INIT 0x000000C3 +#define HIL_SYS_STATE_GPIO_INIT 0x000000C2 +#define HIL_SYS_STATE_PIO_INIT 0x000000C1 +#define HIL_SYS_STATE_SUCCESS 0x00000000 + +/* System Error */ +#define HIL_SYS_SUCCESS 0x00000000 +#define HIL_SYS_RAM_NOT_FOUND 0x00000001 +#define HIL_SYS_RAM_TYPE 0x00000002 +#define HIL_SYS_RAM_SIZE 0x00000003 +#define HIL_SYS_RAM_TEST 0x00000004 +#define HIL_SYS_FLASH_NOT_FOUND 0x00000005 +#define HIL_SYS_FLASH_TYPE 0x00000006 +#define HIL_SYS_FLASH_SIZE 0x00000007 +#define HIL_SYS_FLASH_TEST 0x00000008 +#define HIL_SYS_EEPROM_NOT_FOUND 0x00000009 +#define HIL_SYS_EEPROM_TYPE 0x0000000A +#define HIL_SYS_EEPROM_SIZE 0x0000000B +#define HIL_SYS_EEPROM_TEST 0x0000000C +#define HIL_SYS_SECURE_EEPROM 0x0000000D +#define HIL_SYS_SECURE_EEPROM_NOT_INIT 0x0000000E +#define HIL_SYS_FILE_SYSTEM_FAULT 0x0000000F +#define HIL_SYS_VERSION_CONFLICT 0x00000010 +#define HIL_SYS_NOT_INITIALIZED 0x00000011 +#define HIL_SYS_MEM_ALLOC 0x00000012 + +/* System Hardware Features */ +/* Extended Memory */ +#define HIL_SYSTEM_EXTMEM_TYPE_MSK 0x0000000F +#define HIL_SYSTEM_EXTMEM_TYPE_NONE 0x00000000 +#define HIL_SYSTEM_EXTMEM_TYPE_MRAM_128K 0x00000001 + +#define HIL_SYSTEM_EXTMEM_ACCESS_MSK 0x000000C0 +#define HIL_SYSTEM_EXTMEM_ACCESS_NONE 0x00000000 +#define HIL_SYSTEM_EXTMEM_ACCESS_EXTERNAL 0x00000040 +#define HIL_SYSTEM_EXTMEM_ACCESS_INTERNAL 0x00000080 +#define HIL_SYSTEM_EXTMEM_ACCESS_BOTH 0x000000C0 + +/* RTC */ +#define HIL_SYSTEM_HW_RTC_MSK 0x00000700 +#define HIL_SYSTEM_HW_RTC_TYPE_MSK 0x00000300 +#define HIL_SYSTEM_HW_RTC_TYPE_NONE 0x00000000 +#define HIL_SYSTEM_HW_RTC_TYPE_INTERNAL 0x00000100 +#define HIL_SYSTEM_HW_RTC_TYPE_EXTERNAL 0x00000200 +#define HIL_SYSTEM_HW_RTC_TYPE_EMULATED 0x00000300 +#define HIL_SYSTEM_HW_RTC_STATE 0x00000400 + +/*--------------------------------------------*/ +/* SYSTEM INFORMATION BLOCK */ +/*--------------------------------------------*/ + +/* Production date definition */ +#define HIL_PRODUCTION_DATE_YEAR_MASK 0xFF00 /*!< Year offset (0..255) starting at 2000 */ +#define HIL_PRODUCTION_DATE_WEEK_MASK 0x00FF /*!< Week of year ( 1..52) */ + +/*--------------------------------------------*/ +/* CHANNEL INFORMATION BLOCK */ +/*--------------------------------------------*/ +/* Channel type definitions */ +#define HIL_CHANNEL_TYPE_UNDEFINED 0 /*!< Type of the channel is undefined */ +#define HIL_CHANNEL_TYPE_NOT_AVAILABLE 1 /*!< Type of the channel not available */ +#define HIL_CHANNEL_TYPE_RESERVED 2 /*!< Reserved */ +#define HIL_CHANNEL_TYPE_SYSTEM 3 /*!< System channel */ +#define HIL_CHANNEL_TYPE_HANDSHAKE 4 /*!< Handshake channel */ +#define HIL_CHANNEL_TYPE_COMMUNICATION 5 /*!< Communication channel */ +#define HIL_CHANNEL_TYPE_APPLICATION 6 /*!< Application channnel */ +#define HIL_CHANNEL_TYPE_MAX 127 /*!< Maximum used channel number */ +#define HIL_CHANNEL_TYPE_USER_DEFINED_START 128 /*!< User defined channel */ + +/* Handshake cell, size and position */ +#define HIL_HANDSHAKE_SIZE_MASK 0x0F /*!< Handshake size mask */ +#define HIL_HANDSHAKE_SIZE_NOT_AVAILABLE 0x00 /*!< No handshake cells */ +#define HIL_HANDSHAKE_SIZE_8BIT 0x01 /*!< Handshake cell size 8bit */ +#define HIL_HANDSHAKE_SIZE_16BIT 0x02 /*!< Handshake cell size 16bit */ + +#define HIL_HANDSHAKE_POSITION_MASK 0xF0 /*!< Handshake position mask */ +#define HIL_HANDSHAKE_POSITION_BEGINNING 0x00 /*!< Handshake cells located at the start of each channel */ +#define HIL_HANDSHAKE_POSITION_CHANNEL 0x10 /*!< Handshake cells located in an own channel */ + +/*===========================================================================*/ +/* */ +/* COMMUNICATION / APPLICATION CHANNEL Configuration definitions */ +/* */ +/*===========================================================================*/ +/*-----------------------------------*/ +/* CHANNEL CONTROL BLOCK */ +/*-----------------------------------*/ +/* Application Change of State */ +#define HIL_APP_COS_APPLICATION_READY 0x00000001 +#define HIL_APP_COS_BUS_ON 0x00000002 +#define HIL_APP_COS_BUS_ON_ENABLE 0x00000004 +#define HIL_APP_COS_INITIALIZATION 0x00000008 +#define HIL_APP_COS_INITIALIZATION_ENABLE 0x00000010 +#define HIL_APP_COS_LOCK_CONFIGURATION 0x00000020 +#define HIL_APP_COS_LOCK_CONFIGURATION_ENABLE 0x00000040 +#define HIL_APP_COS_DMA 0x00000080 +#define HIL_APP_COS_DMA_ENABLE 0x00000100 + +/* Application Change of State flags as bit number */ +#define HIL_APP_COS_APPLICATION_READY_BIT_NO 0 +#define HIL_APP_COS_BUS_ON_BIT_NO 1 +#define HIL_APP_COS_BUS_ON_ENABLE_BIT_NO 2 +#define HIL_APP_COS_INITIALIZATION_BIT_NO 3 +#define HIL_APP_COS_INITIALIZATION_ENABLE_BIT_NO 4 +#define HIL_APP_COS_LOCK_CONFIGURATION_BIT_NO 5 +#define HIL_APP_COS_LOCK_CONFIGURATION_ENABLE_BIT_NO 6 +#define HIL_APP_COS_DMA_BIT_NO 7 +#define HIL_APP_COS_DMA_ENABLE_BIT_NO 8 + +/*-----------------------------------*/ +/* CHANNEL COMMON STATUS BLOCK */ +/*-----------------------------------*/ +/* Channel Change Of State flags */ +#define HIL_COMM_COS_UNDEFINED 0x00000000 +#define HIL_COMM_COS_READY 0x00000001 +#define HIL_COMM_COS_RUN 0x00000002 +#define HIL_COMM_COS_BUS_ON 0x00000004 +#define HIL_COMM_COS_CONFIG_LOCKED 0x00000008 +#define HIL_COMM_COS_CONFIG_NEW 0x00000010 +#define HIL_COMM_COS_RESTART_REQUIRED 0x00000020 +#define HIL_COMM_COS_RESTART_REQUIRED_ENABLE 0x00000040 +#define HIL_COMM_COS_DMA 0x00000080 + +/* Channel Change Of State flags as bit numbers */ +#define HIL_COMM_COS_READY_BIT_NO 0 +#define HIL_COMM_COS_RUN_BIT_NO 1 +#define HIL_COMM_COS_BUS_ON_BIT_NO 2 +#define HIL_COMM_COS_CONFIG_LOCKED_BIT_NO 3 +#define HIL_COMM_COS_CONFIG_NEW_BIT_NO 4 +#define HIL_COMM_COS_RESTART_REQUIRED_BIT_NO 5 +#define HIL_COMM_COS_RESTART_REQUIRED_ENABLE_BIT_NO 6 +#define HIL_COMM_COS_DMA_BIT_NO 7 + +/*===========================================================================*/ +/* */ +/* Channel block information */ +/* */ +/*===========================================================================*/ + +/*****************************************************************************/ +/*! Block configuration information */ +/*****************************************************************************/ +typedef struct HIL_DPM_BLOCK_DEFINITION_Ttag +{ + uint8_t bChannelNumber; + uint8_t bBlockNumber; + uint8_t bBlockID; + uint8_t bPad; + uint32_t ulOffset; + uint32_t ulSize; + uint16_t usFlags; + uint16_t usHandshakeMode; + uint16_t usHandshakePosition; + uint16_t usReserved; +} HIL_DPM_BLOCK_DEFINITION_T; + +/* Block ID */ +#define HIL_BLOCK_MASK 0x00FFL +#define HIL_BLOCK_UNDEFINED 0x0000L +#define HIL_BLOCK_UNKNOWN 0x0001L +#define HIL_BLOCK_DATA_IMAGE 0x0002L +#define HIL_BLOCK_DATA_IMAGE_HI_PRIO 0x0003L +#define HIL_BLOCK_MAILBOX 0x0004L +#define HIL_BLOCK_CTRL_PARAM 0x0005L +#define HIL_BLOCK_COMMON_STATE 0x0006L +#define HIL_BLOCK_EXTENDED_STATE 0x0007L +#define HIL_BLOCK_USER 0x0008L +#define HIL_BLOCK_INFO 0x0009L + +/* Flags definition: Direction */ +#define HIL_DIRECTION_MASK 0x000F +#define HIL_DIRECTION_UNDEFINED 0x0000 +#define HIL_DIRECTION_IN 0x0001 +#define HIL_DIRECTION_OUT 0x0002 +#define HIL_DIRECTION_INOUT 0x0003 + +/* Flags definition: Transmission type */ +#define HIL_TRANSMISSION_TYPE_MASK 0x00F0 +#define HIL_TRANSMISSION_TYPE_UNDEFINED 0x0000 +#define HIL_TRANSMISSION_TYPE_DPM 0x0010 +#define HIL_TRANSMISSION_TYPE_DMA 0x0020 + +/* Block definition: I/O Mode */ +#define HIL_IO_MODE_DEFAULT 0x0000 /*!< I/O mode default, for compatibility reasons this value is identical to 0x4 (buffered host controlled) */ +#define HIL_IO_MODE_BUFF_DEV_CTRL 0x0002 /*!< I/O mode buffered device controlled */ +#define HIL_IO_MODE_UNCONTROLLED 0x0003 /*!< I/O uncontrolled */ +#define HIL_IO_MODE_BUFF_HST_CTRL 0x0004 /*!< I/O mode buffered host controlled */ + +/* Block definition: Synchronization Mode */ +#define HIL_SYNC_MODE_OFF 0x00 +#define HIL_SYNC_MODE_DEV_CTRL 0x01 +#define HIL_SYNC_MODE_HST_CTRL 0x02 + +/* Block definition: Synchronization Sources */ +#define HIL_SYNC_SOURCE_OFF 0x00 +#define HIL_SYNC_SOURCE_1 0x01 +#define HIL_SYNC_SOURCE_2 0x02 + + +/*===========================================================================*/ +/* */ +/* */ +/* */ +/*===========================================================================*/ + +/* Status Information */ +#define HIL_SI_STATE_SUCCESS 0x0000 + +/* Fault State */ +#define HIL_FS_STATE_UNDEFINED 0x0000 +#define HIL_FS_STATE_NO_FAULT 0x0001 +#define HIL_FS_STATE_CONF_ERROR 0x0002 +#define HIL_FS_STATE_RECOVERABLE 0x0003 +#define HIL_FS_STATE_SEVERE 0x0004 +#define HIL_FS_STATE_FATAL 0x0005 +#define HIL_FS_STATE_WATCHDOG 0x0006 + +/* Network State */ +#define HIL_COMM_STATE_UNKNOWN 0x0000 +#define HIL_COMM_STATE_NOT_CONFIGURED 0x0001 +#define HIL_COMM_STATE_STOP 0x0002 +#define HIL_COMM_STATE_IDLE 0x0003 +#define HIL_COMM_STATE_OPERATE 0x0004 + +/* Input / Output data states */ +#define HIL_IODS_FIELDBUS_MASK 0x00F0 +#define HIL_IODS_DATA_STATE_GOOD 0x0080 +#define HIL_IODS_PROVIDER_RUN 0x0040 +#define HIL_IODS_GENERATED_LOCALLY 0x0020 + +#define HIL_SYS_BAD_MEMORY_COOKIE 0x0BAD + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_DUALPORTMEMORY) +#endif + +#endif /* HIL_DUALPORTMEMORY_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderNXS.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderNXS.h new file mode 100644 index 0000000..647f8ee --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderNXS.h @@ -0,0 +1,45 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_FileHeaderNXS.h $: *//*! + + \file Hil_FileHeaderNXS.h + + File Header for NXS files. + +**************************************************************************************/ +#ifndef HIL_FILEHEADERNXS_H_ +#define HIL_FILEHEADERNXS_H_ + +#include +#include "Hil_Compiler.h" + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST BINDING_Ttag +{ + uint32_t ulUniqueId[3]; + uint32_t ulAnchors[4]; + uint32_t ulUniqueIdMask[3]; + uint32_t ulAnchorsMask[4]; +} BINDING_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST SEC_INFO_Ttag +{ + uint16_t usOptions; + uint16_t usUsedKeys; + BINDING_T tBindingCom; + BINDING_T tBindingApp; + uint8_t abSignature[512]; +} SEC_INFO_T; + +/** NXS file header (644 bytes) + This structure contains the complete NXS file header as it can be found as binary file. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST FILE_NXS_HEADER_V1_0_Ttag +{ + uint32_t ulMagicCookie; /**< HIL_FILE_HEADER_NXS_COOKIE */ + uint32_t ulHeaderVersion; /**< structure version (major, minor), 0x00010000 */ + uint32_t ulFileLength; /**< file length (header + data) */ + SEC_INFO_T tSigInfo; /**< signature parameter */ + uint32_t ulHeaderCrc32; /**< CRC32 of NXS header */ +} FILE_NXS_HEADER_V1_0_T; + +#endif /* HIL_FILEHEADERNXS_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderV3.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderV3.h new file mode 100644 index 0000000..a8ce8dc --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FileHeaderV3.h @@ -0,0 +1,369 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_FileHeaderV3.h $: *//*! + + \file Hil_FileHeaderV3.h + + Hilscher File Header V3.0. + +**************************************************************************************/ +#ifndef HIL_FILEHEADERV3_H_ +#define HIL_FILEHEADERV3_H_ + +#include +#include "Hil_Compiler.h" +#include "Hil_SharedDefines.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_FILEHEADERV3) +#endif + +/*****************************************************************************/ +/* Constant Definitions for Hilscher File Headers */ +/*****************************************************************************/ + +/* File header cookies (low order byte is first byte in memory) */ +#define HIL_FILE_HEADER_FIRMWARE_COOKIE 0xF8BEAF00 /**< used in NXF firmware or custom loadables */ +#define HIL_FILE_HEADER_FIRMWARE_8_COOKIE 0xF8BEAF08 /**< used in NXF firmware 8bit parallel flash */ +#define HIL_FILE_HEADER_FIRMWARE_16_COOKIE 0xF8BEAF16 /**< used in NXF firmware 16bit parallel flash */ +#define HIL_FILE_HEADER_FIRMWARE_32_COOKIE 0xF8BEAF32 /**< used in NXF firmware 32bit parallel flash */ +#define HIL_FILE_HEADER_FIRMWARE_NXI_COOKIE 0x49584E2E /**< used in NXI communication firmware files ".NXI" */ +#define HIL_FILE_HEADER_FIRMWARE_NXE_COOKIE 0x45584E2E /**< used in NXE communication firmware files ".NXE" */ +#define HIL_FILE_HEADER_FIRMWARE_MXF_COOKIE 0x46584D2E /**< used in MXF maintenance firmware files ".MXF" */ +#define HIL_FILE_HEADER_FIRMWARE_NAI_COOKIE 0x49414E2E /**< used in NAI application firmware files ".NAI" */ +#define HIL_FILE_HEADER_FIRMWARE_NAE_COOKIE 0x45414E2E /**< used in NAE application firmware files ".NAE" */ + +#define HIL_FILE_HEADER_MODULE_COOKIE 0x4D584E2E /**< ".NXM" */ +#define HIL_FILE_HEADER_OPTION_COOKIE 0x4F584E2E /**< ".NXO" */ +#define HIL_FILE_HEADER_DATABASE_COOKIE 0x44584E2E /**< ".NXD" */ +#define HIL_FILE_HEADER_LICENSE_COOKIE 0x4C584E2E /**< ".NXL" */ +#define HIL_FILE_HEADER_BINARY_COOKIE 0x42584E2E /**< ".NXB" */ +#define HIL_FILE_HEADER_NXS_COOKIE 0x53584E2E /**< ".NXS" */ + +/* Valid Hilscher file extensions */ +#define HIL_FILE_EXTENSION_NXF_FIRMWARE ".NXF" /**< Firmware File (netX5x/100/500) */ +#define HIL_FILE_EXTENSION_NXI_FIRMWARE ".NXI" /**< Firmware File (netX90/4x00) Com CPU */ +#define HIL_FILE_EXTENSION_NXE_FIRMWARE ".NXE" /**< Firmware File (netX90/4x00) Com CPU */ +#define HIL_FILE_EXTENSION_MXF_FIRMWARE ".MXF" /**< Maintenance Firmware File (netX90/4x00) Com CPU */ +#define HIL_FILE_EXTENSION_NAI_FIRMWARE ".NAI" /**< Firmware File (netX90) App CPU */ +#define HIL_FILE_EXTENSION_NAE_FIRMWARE ".NAE" /**< Firmware File (netX90) App CPU */ +#define HIL_FILE_EXTENSION_OPTION ".NXO" /**< Firmware Module File */ +#define HIL_FILE_EXTENSION_LICENSE ".NXL" /**< License File */ +#define HIL_FILE_EXTENSION_DATABASE ".NXD" /**< Database File */ +#define HIL_FILE_EXTENSION_BINARY ".NXB" /**< Binary File */ +#define HIL_FILE_EXTENSION_NXS ".NXS" /**< Signed Firmware Update File */ + + +/* Obsolete Hilscher file extensions */ +#define HIL_FILE_EXTENSION_FIRMWARE ".NXF" +#define HIL_FILE_EXTENSION_NXM_FIRMWARE ".NXM" /**< Firmware File (obsolete) */ + +/* Structure/Header version constants */ +#define HIL_VERSION_MAJOR_MSK 0xFFFF0000 /**< Mask for version/structure fields (major) */ +#define HIL_VERSION_MINOR_MSK 0x0000FFFF /**< Mask for version/structure fields (minor) */ + +/* Common Header version constants */ +#define HIL_VERSION_COMMON_HEADER_0_0 0x00000000 /**< V0.0, default initialization value */ +#define HIL_VERSION_COMMON_HEADER_1_0 0x00010000 /**< V1.0, initial version */ +#define HIL_VERSION_COMMON_HEADER_2_0 0x00020000 /**< V2.0, usManufacturer included in Common Header */ +#define HIL_VERSION_COMMON_HEADER_3_0 0x00030000 /**< V3.0, usManufacturer moved to Device Info, additional sizes and offsets */ + +/* Device Info structure version constants */ +#define HIL_VERSION_DEVICE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* Module Info structure version constants */ +#define HIL_VERSION_MODULE_INFO_V1_0 0x00010000 /**< V1.0, initial version used with Common Header V3.0 */ + +/* NXS structure version constants */ +#define HIL_VERSION_NXS_HEADER_V1_0 0x00010000 /**< V1.0, initial version */ + +/* source device type constants used in Default Header */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_SRAM 1 /**< parallel flash on SRAM bus */ +#define HIL_SRC_DEVICE_TYPE_SER_FLASH 2 /**< serial flash on SPI bus */ +#define HIL_SRC_DEVICE_TYPE_EEPROM 3 /**< serial EEPROM on I2C bus */ +#define HIL_SRC_DEVICE_TYPE_SD_MMC 4 /**< boot image on MMC/SD card */ +#define HIL_SRC_DEVICE_TYPE_DPM 5 /**< DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_DPM_EXT 6 /**< extended DPM boot mode */ +#define HIL_SRC_DEVICE_TYPE_PAR_FLASH_EXT 7 /**< parallel flash on extension bus */ + +/* Constants for NAI/NAE file signatures. */ +#define HIL_ASIG_CHUNK_AVAILABLE 0x100 /**< NAI or NAE file is signed */ +#define HIL_ASIG_CHUNK_SIZE 0x400 /**< size of signature (always 1024 byte) */ + +/*****************************************************************************/ +/* File Header Substructures for Hilscher Downloadable Files */ +/*****************************************************************************/ +#define HIL_FILE_BOOT_HEADER_SIGNATURE 0x5854454E /**< Boot header signature "NETX" */ + +/** BOOT header (64 bytes, used for NXF) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_BOOT_HEADER_V1_0_Ttag +{ + /* boot block identification and bus width (8/16/32 bits) in case of a parallel flash source device */ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_FIRMWARE_xxx_COOKIE */ + + /** boot image source device configuration value (either parallel or serial flash) */ + union + { uint32_t ulSramBusTiming; /**< parallel flash on SRAM bus: bus timing value */ + uint32_t ulSpiClockSpeed; /**< serial flash on SPI: clock speed value */ + } unSrcMemCtrl; + + /** application data description values */ + uint32_t ulAppEntryPoint; /**< app. entry point, netX code execution starts here */ + uint32_t ulAppChecksum; /**< app. checksum starting from byte offset 64 */ + uint32_t ulAppFileSize; /**< app. size in DWORDs starting from byte offset 64 */ + uint32_t ulAppStartAddress; /**< app. relocation start address for binary image */ + uint32_t ulSignature; /**< app. signature, always HIL_FILE_BOOT_HEADER_SIGNATURE */ + + /** destination device control values */ + union + { /** SDRAM */ + struct + { uint32_t ulSdramGeneralCtrl; /**< value for SDRAM General Control register */ + uint32_t ulSdramTimingCtrl; /**< value for SDRAM Timing register */ + uint32_t aulReserved[3]; + } tSDRAMCtrl; + /** Extension Bus */ + struct + { uint32_t ulExtConfigCS0; /**< value for EXT_CONFIG_CS0 register */ + uint32_t ulIoRegMode0; /**< value for DPMAS_IO_MODE0 register */ + uint32_t ulIoRegMode1; /**< value for DPMAS_IO_MODE1 register */ + uint32_t ulIfConf0; /**< value for DPMAS_IF_CONF0 register */ + uint32_t ulIfConf1; /**< value for DPMAS_IF_CONF1 register */ + } tExtBusCtrl; + /** SRAM */ + struct + { uint32_t ulExtConfigSRAMn; /**< value for EXT_SRAMn_CTRL register */ + uint32_t aulReserved[4]; + } tSRAMCtrl; + } unDstMemCtrl; + + uint32_t ulMiscAsicCtrl; /**< internal ASIC control register value (set to 1) */ + uint32_t ulSerialNumber; /**< serial no. or user param. (ignored by ROM loader) */ + uint32_t ulSrcDeviceType; /**< HIL_SRC_DEVICE_TYPE_xxx */ + uint32_t ulBootHeaderChecksum; /**< sums up all 16 DWORDs and multiplies result by -1 */ +} HIL_FILE_BOOT_HEADER_V1_0_T, *PHIL_FILE_BOOT_HEADER_V1_0_T; + + +/** DEFAULT header (64 bytes, used for NXM, NXO, NXD, NXL, NXB) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DEFAULT_HEADER_V1_0_Ttag +{ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_xxx_COOKIE definitions */ + uint32_t aulReserved[15]; /**< reserved, set to zero */ +} HIL_FILE_DEFAULT_HEADER_V1_0_T, *PHIL_FILE_DEFAULT_HEADER_V1_0_T; + + +/** COMMON header (64 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_COMMON_HEADER_V3_0_Ttag +{ + uint32_t ulHeaderVersion; /**< structure version (major, minor), 0x00030000 */ + uint32_t ulHeaderLength; /**< Default+Common Header+Device Info+Module Info(s) */ + uint32_t ulDataSize; /**< from ulDataStartOffset to ulTagListStartOffset */ + uint32_t ulDataStartOffset; /**< offset of binary data (from beginning of file) */ + uint8_t bNumModuleInfos; /**< number of Module Info structures in file header */ + uint8_t bReserved; /**< reserved, set to zero */ + uint16_t usReserved; /**< reserved, set to zero */ + uint32_t aulMD5[4]; /**< MD5 checksum for the whole firmware file */ + uint32_t ulTagListSize; /**< tag list length in bytes (0 = no tag list), not used for netX90/4x00 */ + uint32_t ulTagListOffset; /**< offset of tag list (from beginning of file), not used for netX90/4x00 */ + uint32_t ulTagListSizeMax; /**< maximum tag list length in bytes (reserved space), not used for netX90/4x00 */ + uint32_t ulCommonCRC32; /**< netX90 only: common CRC32 for nxi/nxe nai/nae, not used for other chips */ + uint32_t aulReserved[2]; /**< reserved, set to zero */ + uint32_t ulHeaderCRC32; /**< CRC32 of Boot Header and Common Header */ +} HIL_FILE_COMMON_HEADER_V3_0_T, *PHIL_FILE_COMMON_HEADER_V3_0_T; + + +/** DEVICE-specific information (64 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DEVICE_INFO_V1_0_Ttag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usManufacturer; /**< manufacturer ID (see DPM Manual) */ + uint16_t usDeviceClass; /**< netX device class */ + uint8_t bHwCompatibility; /**< hardware compatibility ID */ + uint8_t bChipType; /**< see HIL_DEV_CHIP_TYPE_xxx definitions */ + uint16_t usReserved; /**< reserved, set to zero */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint32_t ulLicenseFlags1; /**< netX license flags 1 */ + uint32_t ulLicenseFlags2; /**< netX license flags 2 */ + uint16_t usNetXLicenseID; /**< netX license id */ + uint16_t usNetXLicenseFlags; /**< netX license flags */ + uint16_t ausFwVersion[4]; /**< FW version (major, minor, build, revision) */ + uint32_t ulFwNumber; /**< FW product code (order number) or project code */ + uint32_t ulDeviceNumber; /**< target device product code (order number) */ + uint32_t ulSerialNumber; /**< target device serial number */ + uint32_t aulReserved[3]; /**< reserved, set to zero */ +} HIL_FILE_DEVICE_INFO_V1_0_T, *PHIL_FILE_DEVICE_INFO_V1_0_T; + + +/** MODULE-specific information (32 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_MODULE_INFO_V1_0_Ttag +{ + uint32_t ulStructVersion; /**< structure version (major, minor), 0x00010000 */ + uint16_t usCommunicationClass; /**< communication class */ + uint16_t usProtocolClass; /**< protocol class */ + uint32_t ulDBVersion; /**< database version (major, minor) */ + uint16_t ausChannelSizes[4]; /**< required DPM channel sizes, 0=end of list */ + uint16_t ausHwOptions[4]; /**< required hardware assembly options (0=not used) */ + uint8_t abHwAssignments[4]; /**< xC numbers for HW options (0xFF=free choice) */ +} HIL_FILE_MODULE_INFO_V1_0_T, *PHIL_FILE_MODULE_INFO_V1_0_T; + + + +/*****************************************************************************/ +/* File Header Subtructures Instantiated as Global Variables in the Firmware */ +/*****************************************************************************/ + +/* !!!! The structure version of the Common Header determines the version of the whole structure !!!! */ + +/** basic file header (without Default Header as included in ELF files used to create NXFs, 320 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_BASIC_HEADER_V3_0_Ttag +{ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0_T tModuleInfo[6]; /**< module-specific info for up to 6 modules */ +} HIL_FILE_BASIC_HEADER_V3_0_T, *PHIL_FILE_BASIC_HEADER_V3_0_T; + + +/** basic file header (without Default Header as included in ELF files used to create NXOs, 160 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_MODULE_HEADER_V3_0_Ttag +{ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0_T tModuleInfo; /**< module-specific info for 1 module */ +} HIL_FILE_MODULE_HEADER_V3_0_T, *PHIL_FILE_MODULE_HEADER_V3_0_T; + + + +/*****************************************************************************/ +/* Minimal File Header Subset for all NX* Files (Usable with Older Versions) */ +/*****************************************************************************/ + +/** MIN file header (common subset for all complete NX* files, 128 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_MIN_HEADER_V3_0_Ttag +{ + HIL_FILE_BOOT_HEADER_V1_0_T tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ +} HIL_FILE_MIN_HEADER_V3_0_T, *PHIL_FILE_MIN_HEADER_V3_0_T; + + + +/*****************************************************************************/ +/* File Header Structures for Hilscher Downloadable Files (V3.0, netX) */ +/*****************************************************************************/ + +/** NXF file header (for relocated base firmware or complete firmware with linked stacks, 384 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NXF_HEADER_V3_0_Ttag +{ + HIL_FILE_BOOT_HEADER_V1_0_T tBootHeader; /**< boot header with chip settings */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0_T tModuleInfo[6]; /**< module-specific info for 6 comm. channels */ +} HIL_FILE_NXF_HEADER_V3_0_T, *PHIL_FILE_NXF_HEADER_V3_0_T; + + +/** NXO file header (for unrelocated optional firmware modules, 224 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NXO_HEADER_V3_0_Ttag +{ + HIL_FILE_DEFAULT_HEADER_V1_0_T tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0_T tModuleInfo; /**< module-specific info for 1 comm. channel */ +} HIL_FILE_NXO_HEADER_V3_0_T, *PHIL_FILE_NXO_HEADER_V3_0_T; + + +/** NXD file header (for database file download, 224 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NXD_HEADER_V3_0_Ttag +{ + HIL_FILE_DEFAULT_HEADER_V1_0_T tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ + HIL_FILE_MODULE_INFO_V1_0_T tModuleInfo; /**< module-specific info for 1 comm. channel */ +} HIL_FILE_NXD_HEADER_V3_0_T, *PHIL_FILE_NXD_HEADER_V3_0_T; + + +/** NXL file header (for license file download, 192 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NXL_HEADER_V3_0_Ttag +{ + HIL_FILE_DEFAULT_HEADER_V1_0_T tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ +} HIL_FILE_NXL_HEADER_V3_0_T, *PHIL_FILE_NXL_HEADER_V3_0_T; + + +/** NXB file header (for binary file download, 192 bytes) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NXB_HEADER_V3_0_Ttag +{ + HIL_FILE_DEFAULT_HEADER_V1_0_T tDefaultHeader; /**< default header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ +} HIL_FILE_NXB_HEADER_V3_0_T, *PHIL_FILE_NXB_HEADER_V3_0_T; + +/*=================================================================================================*/ +/* netX90 APP CPU firmware (NAI/NAE) header definition */ +/*=================================================================================================*/ +/** ROMLoader Hboot header for netX90(64 bytes, used for NAI and NAE) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HBOOT_HEADER_NX90_Ttag +{ + uint32_t aulReserverd[16]; /**< NetX90 APP CPU system specific */ +} HIL_HBOOT_HEADER_NX90_T, *PHIL_HBOOT_HEADER_NX90_T; + +/** BOOT header netX90 (64 bytes, used for NAI and NAE) */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_Ttag +{ + /** boot block identification */ + uint32_t ulMagicCookie; /**< see HIL_FILE_HEADER_FIRMWARE_xxx_COOKIE */ + + uint32_t aulReserved1[2]; + + /** application data description values */ + uint32_t ulAppChecksum; /**< app. checksum starting from byte offset 64 */ + uint32_t ulAppFileSize; /**< app. size in DWORDs starting from byte offset 64 */ + uint32_t ulReserved1; + uint32_t ulSignature; /**< app. signature, always HIL_FILE_BOOT_HEADER_SIGNATURE */ + + uint32_t aulReserved2[8]; + + uint32_t ulBootHeaderChecksum; /**< sums up all previous 15 DWORDs and multiplies result by -1 */ +} HIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_T, *PHIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_T; + +/** NAI header + This structure is used in the application core to generated new NAI or NAE header. + The Cortex M4 Vector table and the Hboot header (M4 reset vector) are generated + in a later build step, to obtain the complete file header (HIL_FILE_NAI_HEADER_V3_0_T) + can't be used. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NAI_NAE_APP_HEADER_V3_0_Ttag +{ + HIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_T tBootHeader; /**< NAI Boot header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ +} HIL_FILE_NAI_NAE_APP_HEADER_V3_0_T, *PHIL_FILE_NAI_NAE_APP_HEADER_V3_0_T; + +/** NAI file header + This structure contains the complete NAI file header as it can be found as binary file. + It can be directly flashed into the application processes flash (INTFLASH2). */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NAI_HEADER_V3_0_Ttag +{ + uint32_t aulVectorTable[112]; /**< Reserved for Cortex M4 Vector table */ + HIL_HBOOT_HEADER_NX90_T tHbootHeader; /**< netX90 APP CPU Hboot header */ + HIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_T tBootHeader; /**< NAI Boot header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ +} HIL_FILE_NAI_HEADER_V3_0_T, *PHIL_FILE_NAI_HEADER_V3_0_T; + +/** NAE file header + This structure contains the complete NAE file header as it can be found as binary file. + The content will be stored in the SQI flash and will be copied by the rom loader to the SDRAM, + before the application processor is started */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_NAE_HEADER_V3_0_Ttag +{ + HIL_HBOOT_HEADER_NX90_T tHbootHeader; /**< netX90 APP CPU Hboot header */ + HIL_FILE_BOOT_HEADER_NAI_NAE_V1_0_T tBootHeader; /**< NAE Boot header */ + HIL_FILE_COMMON_HEADER_V3_0_T tCommonHeader; /**< common header */ + HIL_FILE_DEVICE_INFO_V1_0_T tDeviceInfo; /**< device-specific information */ +} HIL_FILE_NAE_HEADER_V3_0_T, *PHIL_FILE_NAE_HEADER_V3_0_T; + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_FILEHEADERV3) +#endif + +#endif /* HIL_FILEHEADERV3_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FirmwareIdent.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FirmwareIdent.h new file mode 100644 index 0000000..94c1109 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_FirmwareIdent.h @@ -0,0 +1,58 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_FirmwareIdent.h $: *//*! + + \file Hil_FirmwareIdent.h + + Definitions of Firmware Identification + +**************************************************************************************/ +#ifndef HIL_FIRMWAREIDENT_H_ +#define HIL_FIRMWAREIDENT_H_ + +#include +#include "Hil_Compiler.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_FIRMWAREIDENT) +#endif + +/*****************************************************************************/ +/* Set byte alignment for structure members. */ +/*****************************************************************************/ + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FW_VERSION_Ttag +{ + uint16_t usMajor; + uint16_t usMinor; + uint16_t usBuild; + uint16_t usRevision; +} HIL_FW_VERSION_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FW_NAME_Ttag +{ + uint8_t bNameLength; + uint8_t abName[ 63 ]; +} HIL_FW_NAME_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FW_DATE_Ttag +{ + uint16_t usYear; + uint8_t bMonth; + uint8_t bDay; +} HIL_FW_DATE_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FW_IDENTIFICATION_Ttag +{ + HIL_FW_VERSION_T tFwVersion; /*!< firmware version */ + HIL_FW_NAME_T tFwName; /*!< firmware name */ + HIL_FW_DATE_T tFwDate; /*!< firmware date */ +} HIL_FW_IDENTIFICATION_T; + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_FIRMWAREIDENT) +#endif + +#endif /* HIL_FIRMWAREIDENT_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_GenericCommunicationInterface.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_GenericCommunicationInterface.h new file mode 100644 index 0000000..cbe559b --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_GenericCommunicationInterface.h @@ -0,0 +1,1312 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_GenericCommunicationInterface.h $: *//*! + + \file Hil_GenericCommunicationInterface.h + + Hilscher's Generic Communication Interface (GCI) Definition. + +**************************************************************************************/ +#ifndef HIL_GENERICCOMMUNICATIONINTERFACE_H_ +#define HIL_GENERICCOMMUNICATIONINTERFACE_H_ + +/*! Version of the Generic Communication Interface. */ +#define HIL_GCI_VERSION_21 (21) + +#include +#include "Hil_Compiler.h" +#include "Hil_Packet.h" + + +/*! Handle of the GCI-Component. + * This is the GCI-Component handle which must be passed as first parameter into the GCI-Component's functions. + * + * \note The actual structure definition is GCI-Component specific. It has to be defined in a private header, + * and is not public to the GCI-Application or other GCI-Components. + */ +typedef struct HIL_GCI_COMP_Ttag* HIL_GCI_COMP_H; + +/*! Handle of the GCI-Application. + * The handle is instantiated by the GCI-Application and must be passed as first parameter into the GCI-Application's functions. + * + * \note The actual structure definition is GCI-Application specific. It has to be defined in a private header, + * and is not public to the GCI-Components or other GCI-Components. + */ +typedef struct HIL_GCI_APP_Ttag* HIL_GCI_APP_H; + + + +/*! \defgroup HIL_GCI_AcyclicServices Acyclic Services + * The Generic Communication Interface (GCI) defines a acyclic bidirectional communication interface + * between a GCI-Application and a GCI-Component. + * + * The GCI-Component and GCI-Application interact by means of services. Each of this services has a defined data structure + * which is passed along with the service. + * + * Services are symmetrically defined by the GCI-Application and the GCI-Component: + * - The GCI-Component implements services which are called "requests" (*_REQ) to be used by the GCI-Application and for + * each of them, the GCI-Application correspondingly implements a service which is called "confirmation" (*_CNF). + * The confirmation is the acknowledgment of the request. + * + * - In opposite direction, the GCI-Application implements services which are called "indications" (*_IND) to be used + * by the GCI-Component and for each of them, the GCI-Component corresponding implements a service which is called + * "response" (*_RES). The response is the acknowledgment of the indication. + * + * Each service is assigned an unique number called the command code. + * + * Per definition, all service initiated by the GCI-Application are named requests and all services initiated by the + * GCI-Component are named indications. + * + * Based on this interface, the GCI allows to define such pairs of services to implement interaction in a call and + * reply fashion for, e.g., the following purposes: + * - Configuration + * - Exchange of acyclic data + * - Diagnostics + * + *\{*/ + +/*! Handle of an acyclic service. + * The handle is instantiated by the GCI-Component for each service request towards the GCI-Application and uniquely + * identifies the transaction between the GCI-Application and the GCI-Component related to this service. + * + * \note The actual structure definition is GCI-Component specific. It has to be defined in a private header, + * and is not public to the GCI-Application or other GCI-Components. + */ +typedef struct HIL_GCI_COMP_SERVICE_Ttag* HIL_GCI_COMP_SERVICE_H; + +/*! Announce a service from the GCI-Application towards the GCI-Component. + * This function passes a new request (*_REQ), or confirms an indication (*_RES), at the GCI-Component. + * On successful return, the packet header as well as the data have been consumed by the GCI-Component and + * can be released by the GCI-Application. + * + * \note The function shall be called from one context only (IRQ context not allowed). + * \note The function shall NOT wait for other events (e.g. on network), + * but may call task synchronization functions (e.g. Mutex, Triple buffer exchange) + * \note The \ref HIL_GCI_APP_SERVICE_AVAILABLE_FN from the GCI-Application may be called before the function returns. + * \note The number of supported parallel services which can be processed by the GCI-Component is implementation specific. + * If the number of parallel data handling is exceeded, the function returns with an error code. + * At least 8 parallel service requests are recommended. + * \note This interface does not support fragmentation of the individual service. + * The GCI-Application has to ensure to collect all data before this function is called. + * + * \param hComponent [in] Handle of the GCI-Component. + * \param ptPacketHeader [in] Packet header information for the passed data in pabPacketData. + * \note This pointer shall point to a DWORD aligned address. + * \param pabPacketData [in] Pointer to acyclic data buffer with length ptPacketHeader->ulLen. + * \note The content is only valid until the function returns. + * \note This pointer shall point to a DWORD aligned address. + * + * \return SUCCESS_HIL_OK in case the GCI-Component has accepted the service and consumed all data, + * otherwise an error code is returned. + * The error returned at this point is an interface issue, the service has not be accepted + * by GCI-Component. In case the GCI-Component is busy (e.g. ERR_HIL_COMPONENT_BUSY was returned) + * the GCI-Application shall retry the service later in time (recommend retry time is 5ms). + * + * \note The error code shall only be used by the GCI-Component in case the GCI-Component is not able to accept the service, + * e.g. no more resources left to accept service or invalid function arguments. + * + * \note GCI-Component implementation note. The error code shall not be a result from the processing of the service. + * The content of the packet header (ptPacketHeader) and packet data (pabPacketData) shall not be considered + * as error code, e.g. invalid packet length, invalid parameter or unknown command. In this case, the service + * shall be accepted anyway. In case of a request (*_REQ) the error code shall be passed by the confirmation + * (*_CNF) packet status. + */ +typedef uint32_t (*HIL_GCI_COMP_SERVICE_AVAILABLE_FN) +( + HIL_GCI_COMP_H hComponent, + const HIL_PACKET_HEADER_T* ptPacketHeader, + const uint8_t* pabPacketData +); + +/*! Announce a service from the GCI-Component towards the GCI-Application. + * The service announces a new indication (*_IND) or confirmation (*_CNF) to a previous request, at the GCI-Application. + * On successful return (or during function execution), the GCI-Application will call the \ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN + * function to consume the announced service data. + * + * \note This callback can be called from any context (except IRQ). + * \note The service data read function callback (\ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN) may be called before this function returns. + * \note The GCI-Component has to ensure to collect all announced data before calling this function. + * \note The GCI-Component has to hold the acyclic data until the GCI-Application has consumed all data by means of one or multiple calls + * to \ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN. + * + * \param hApplication [in] Handle of the GCI-Application. + * \param hService [in] Service handle to uniquely identify the transaction of service data from the GCI-Component to the GCI-Application + * in subsequent calls to the \ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN function. + * \param ptPacketHeader [in] Packet header information for the announced data. + * + * \return SUCCESS_HIL_OK in case GCI-Application accepts the service, otherwise an error code is returned. + * \note The error code shall only be used by the GCI-Application in case the GCI-Application is not able to accept the service, + * e.g. no more resources left to accept service, or ptPacketHeader is NULL. The error code shall not be a result from + * the processing of the service. + * \note The content of the packet header (ptPacketHeader) shall not be considered as error code, e.g. invalid packet length + * or unknown command. In this case, the service shall be accepted anyway. In case of an indication (*_IND) the error code + * shall be passed by the response (*_RES) packet status. + * \note In error case the GCI-Application will not read out the data. The GCI-Component may retry to announce the service, where + * the retry interval and the number of retries is implementation-specific. If the GCI-Component forfeits the retry, it will + * call GCI-Application's error callback and enter faulty state. + */ +typedef uint32_t (*HIL_GCI_APP_SERVICE_AVAILABLE_FN) +( + HIL_GCI_APP_H hApplication, + HIL_GCI_COMP_SERVICE_H hService, + const HIL_PACKET_HEADER_T* ptPacketHeader +); + +/*! The minimum read buffer size in bytes that shall be used during read of the service data from the GCI-Component. */ +#define HIL_GCI_SERVICE_READ_PACKET_DATA_BUFFER_SIZE_MIN (64) + +/*! Read a portion of announced service data from the GCI-Component. + * The function will read from the GCI-Component a subset or all of the data previously announced by the GCI-Component via + * \ref HIL_GCI_APP_SERVICE_AVAILABLE_FN. Typically, The transaction of service data is completed when all announced data has been + * read from the GCI-Component. + * + * If the GCI-Application is not interested in the announced service data, or there is no data available, the transaction has to be + * completed by calling this function once with a NULL Pointer for the pvBuffer parameter. + * + * Announced data can be read from the GCI-Component in a arbitrary amount of calls. The read buffer size of each call has to be at + * least 64 bytes, unless the remaining size to read is lower on the very last call. The function will never return with less data + * than requested, unless all data has been read. + * + * Pending transactions of announced but not yet read data may occupy resources in the GCI-Component. + * When the transaction is completed because all data has been read or the GCI-Application has called with a NULL buffer, the service + * data handle is invalid, and must not be used any further. + * + * Three conditions are defined to indicate completion of a transaction of announced service data: + * - The function returns with 0 + * - The sum of the returned sizes of all consecutive call for a transaction reaches the announced data size ptPacketHeader.ulLen. + * - The function is called with NULL pointer for the parameter pvBuffer, regardless if nothing or only a part was read before + * (e.g. first 64bytes have been read, then the service shall be quit). This allows the GCI-Application to abort a transaction. + * + * \note The function shall NOT wait for other events (e.g. on network), but may call task synchronization functions (e.g. Mutex, Triple buffer exchange) + * \note The GCI-Application has to provide a proper data buffer to store the announced data at once + * \note The GCI-Component will copy the raw packet data to the provided buffer (without the packet header) and keeps track of the current offset + * \note The function has an iterative property. Thus, the GCI-Component has to hold the data until completely read by the GCI-Application. + * + * \param hComponent [in] Handle of the GCI-Component. + * \param hService [in] Service data handle as previously announced to uniquely identify the service data transaction. + * \param pvPacketDataBuffer [out] Destination buffer (4 byte aligned) for the GCI-Component to write the requested data portion into + * \note Pointer can also be NULL, in this case the GCI-Component can release the data/abort the transaction + * \param ulReadSize [in] Size of the given destination buffer, number of bytes to read. At least 64 bytes have to be requested with + * each call except on the very last call, the remaining data size can be lower. + * + * \return Size in bytes that have been read. The size will always be equal to ulReadSize, unless all data has been read. + * Example: 150 Bytes have to be read and the read buffer size is ulReadSize = 128 bytes. + * 1. iteration: \ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN call with ulReadSize = 128 bytes + * -> function returns with 128 bytes + * 2. iteration: \ref HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN call with ulReadSize = 128 bytes + * -> function returns with 22 bytes + */ +typedef uint32_t (*HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN) +( + HIL_GCI_COMP_H hComponent, + HIL_GCI_COMP_SERVICE_H hService, + void* pvPacketDataBuffer, + uint32_t ulReadSize +); + +/*! This structure defines a command range for acyclic services. + * \note This structure is used by the GCI-Component during initialization phase to provide + * which command codes it will accept (see \ref HIL_GCI_COMP_INTERFACE_INITIALIZE_FN). + */ +typedef struct HIL_GCI_COMP_SERVICE_COMMAND_RANGE_Ttag +{ + /*! Starting command number within the command range. */ + uint32_t ulCommandDomain; + + /*! The mask represents the command number filter to determine the membership within a domain. + * Example: The command range shall be [0x2F30, 0x2F33] + * The range is determined by the two lower bits. Neglecting the two lower bits is done by Mask = 0xFFFC. + * After applying the filter (command number & mask), the domain is determined to be Domain = 0x2F30. + * */ + uint32_t ulCommandMask; + + /*! This flag indicates to the GCI-Application if the services within the command range can be announced + * in fragments to the GCI-Component by means of one or multiple calls to \ref HIL_GCI_COMP_SERVICE_AVAILABLE_FN. + * This is enabled by the GCI-Component if it can not be ensured that the packet data can be provided in + * one buffer, especially in environments with limited memory space. + * values: true in case service can be forwarded in fragments to the GCI-Component, otherwise false. + * + * \note The mechanism to provide a service in fragments is GCI-Component specific. + * \note This flag is set to true in rare cases. */ + uint8_t bDisableFragmentation; + +} HIL_GCI_COMP_SERVICE_COMMAND_RANGE_T; + +/*! The acyclic service interface provided by the GCI-Component for the GCI-Application. + * This is part of the GCI-Component Interface structure. + */ +typedef struct HIL_GCI_COMP_SERVICE_INTERFACE_Ttag +{ + /*! Service available callback. */ + HIL_GCI_COMP_SERVICE_AVAILABLE_FN fnAvailable; + + /*! Service read packet data callback. */ + HIL_GCI_COMP_SERVICE_READ_PACKET_DATA_FN fnRead; + + /*! GCI service command ranges that the GCI-Component is interested on. + * If (ulCommand & ulCommandMask) == ulCommandDomain is valid, the acyclic service shall be handled by this interface. */ + const HIL_GCI_COMP_SERVICE_COMMAND_RANGE_T* patCommandRanges; + /*! The total amount of different command ranges stored in patCommandRanges. */ + uint32_t ulNumOfCommandRanges; + + /*! The maximum unfragmented service data length in bytes that the GCI-Component can receive from GCI-Application. */ + uint32_t ulMaxUnfragDataSize; + +} HIL_GCI_COMP_SERVICE_INTERFACE_T; + +/*! The acyclic service interface provided by the GCI-Application for the GCI-Component. + * This is part of the GCI-Application interface structure. + */ +typedef struct HIL_GCI_APP_SERVICE_INTERFACE_Ttag +{ + /*! Acyclic service available callback. */ + HIL_GCI_APP_SERVICE_AVAILABLE_FN fnAvailable; + +} HIL_GCI_APP_SERVICE_INTERFACE_T; + +/*! \} */ + + + + + + + +/*! \defgroup HIL_GCI_CyclicData Cyclic Data + * The GCI provides an interface to exchange cyclic data. + * \{ */ + +/*! Update cyclic provider data. + * The GCI-Application calls this function when provider data was updated by GCI-Application. + * + * After calling this function the provider data (pabProviderData given in HIL_GCI_APPLICATION_INTERFACE_T) + * is eligible to be accessed and processed by the GCI-Component. When the GCI-Component has finished access, it will call + * \ref HIL_GCI_APP_CYCLIC_PROVIDER_DATA_UPDATE_DONE_FN to give control over the provider data area back to the GCI-Application. + * Accessing the provider data from each side when not in control leads to undefined behavior. + * + * \note The function needs to be implemented by the GCI-Component and is called by the GCI-Application. + * + * \note This callback can be called from any context (including IRQ). Thus, the GCI-Component takes the responsibility + * to enforce a context switch if necessary. It is not allowed to call blocking functions within this callback. + * + * \param hComponent [in] Handle of the GCI-Component. + * + * \return SUCCESS_HIL_OK in case GCI-Component accepts the update request, otherwise an error code is returned. + * \note If accepted, the GCI-Component calls \ref HIL_GCI_APP_CYCLIC_PROVIDER_DATA_UPDATE_DONE_FN as soon as provider + * data has been consumed. The GCI-Application will not access provider data in the meantime. +*/ +typedef uint32_t (*HIL_GCI_COMP_CYCLIC_PROVIDER_DATA_UPDATE_REQUEST_FN) +( + HIL_GCI_COMP_H hComponent +); + +/*! Update cyclic provider data done. + * The GCI-Component calls this function after provider data was processed by the GCI-Component to pass back + * control over the provider data area back to the GCI-Application. Subsequently, the GCI-Application is allowed to + * access the provider data again, i.e. to do another update and, in turn, pass it to the GCI-Component by means of + * \ref HIL_GCI_COMP_CYCLIC_PROVIDER_DATA_UPDATE_REQUEST_FN. + * + * \note This function has to be implemented by the GCI-Application and is called by the GCI-Component. + * + * \param hApplication [in] Handle of the GCI-Application. + * + * \return This function has no return code +*/ +typedef void (*HIL_GCI_APP_CYCLIC_PROVIDER_DATA_UPDATE_DONE_FN) +( + HIL_GCI_APP_H hApplication +); + +/*! Update cyclic consumer data. + * The GCI-Application calls this function when the consumer data shall be updated by the GCI-Component. + * + * After calling this function the consumer data (pabConsumerData given in HIL_GCI_APPLICATION_INTERFACE_T) + * is eligible to be accessed and processed by the GCI-Component. When the GCI-Component has finished access, it will call + * \ref HIL_GCI_APP_CYCLIC_CONSUMER_DATA_UPDATE_DONE_FN to give control over the consumer data area back to the GCI-Application. + * Accessing the consumer data from each side when not in control leads to undefined behavior. + * + * \note The function needs to be implemented by the GCI-Component and is called by the GCI-Application. + * + * \note This callback can be called from any context (including IRQ). + * Thus, the GCI-Component takes the responsibility to enforce a context switch in case necessary. + * + * \param hComponent [in] Handle of the GCI-Component. + * + * \return SUCCESS_HIL_OK in case GCI-Component accepts the update request, otherwise an error code is returned. + * \note If accepted, the GCI-Component calls \ref HIL_GCI_APP_CYCLIC_CONSUMER_DATA_UPDATE_DONE_FN as soon as consumer + * data has been updated. The GCI-Application will not access consumer data in the meantime. +*/ +typedef uint32_t (*HIL_GCI_COMP_CYCLIC_CONSUMER_DATA_UPDATE_REQUEST_FN) +( + HIL_GCI_COMP_H hComponent +); + +/*! Update cyclic consumer data done. + * The GCI-Component calls this function after consumer data was updated by the GCI-Component to pass back + * control over the consumer data area back to the GCI-Application. Subsequently, the GCI-Application is allowed to + * access the consumer data again, i.e. to read it and pass control back to the GCI-Component by means of + * \ref HIL_GCI_COMP_CYCLIC_CONSUMER_DATA_UPDATE_REQUEST_FN. + * + * \note This function has to be implemented by the GCI-Application and is called by the GCI-Component. + * + * \param hApplication [in] Handle of the GCI-Application. + * + * \return This function has no return code +*/ +typedef void (*HIL_GCI_APP_CYCLIC_CONSUMER_DATA_UPDATE_DONE_FN) +( + HIL_GCI_APP_H hApplication +); + +/*! Update provider and consumer data size. + * The GCI-Component calls this function when data size of provider and/or consumer has changed. + * + * \param hComponent [in] Handle of the GCI-Application. + * \param ulProviderSize [in] Provider size in bytes. + * \param ulConsumerSize [in] Consumer size in bytes. + * + * \return SUCCESS_HIL_OK in case the GCI-Application accepts data sizes, otherwise at least one data size is not accepted. +*/ +typedef uint32_t (*HIL_GCI_APP_CONSUMER_PROVIDER_DATA_SIZE_UPDATE_FN) +( + HIL_GCI_APP_H hApplication, + uint32_t ulProviderSize, + uint32_t ulConsumerSize +); + +/*! The cyclic service interface provided by the GCI-Application for the GCI-Component. + * This is part of the GCI-Application interface structure. + */ +typedef struct HIL_GCI_APP_CYCLIC_INTERFACE_Ttag +{ + /*! Cyclic consumer data update done callback. + \note The GCI-Application will be informed about finished consumer data update. */ + HIL_GCI_APP_CYCLIC_CONSUMER_DATA_UPDATE_DONE_FN fnConsumerDataUpdateDone; + + /*! Pointer to consumer data buffer. + * \note The GCI-Application has to ensure to not change the consumer buffer. + * Otherwise inconsistent/invalid data might be observed. + * \note This pointer shall point to a DWORD aligned address. */ + uint8_t* pabConsumerData; + /*! Consumer data maximum size in bytes. */ + uint32_t ulConsumerDataMaxSize; + /*! Pointer to consumer data handshake error counter. + In case not NULL, the GCI-Component has to update the value synchronous to IO exchange. + The value is incremented by one for each I/O cycle in which update of consumer data + by the GCI-Component took place but the GCI-Application failed to consume the data. + Saturates at value 255. */ + uint8_t* pbConsumerDataErrorCnt; + + /*! Cyclic provider data update done callback. + \note The GCI-Application will be informed about finished provider data update. */ + HIL_GCI_APP_CYCLIC_PROVIDER_DATA_UPDATE_DONE_FN fnProviderDataUpdateDone; + + /*! Pointer to provider data buffer. + * \note This pointer shall point to a DWORD aligned address.*/ + uint8_t* pabProviderData; + /*! Provider data maximum size in bytes. */ + uint32_t ulProviderDataMaxSize; + /*! Pointer to provider data handshake error counter. + In case not NULL, the GCI-Component updates the value synchronous to IO exchange. + The value is incremented by one for each I/O cycle in which no update of provider data + by the GCI-Application took place but the GCI-Component processed the data. + Saturates at value 255. */ + uint8_t* pbProviderDataErrorCnt; + + /*! Update provider and consumer data size callback. + \note The GCI-Application will be informed about changed consumer/provider data size. */ + HIL_GCI_APP_CONSUMER_PROVIDER_DATA_SIZE_UPDATE_FN fnConsumerProviderUpdateDataSize; + +} HIL_GCI_APP_CYCLIC_INTERFACE_T; + +/*! The cyclic service interface provided by the GCI-Component for the GCI-Application. + * This is part of the GCI-Component interface structure. + */ +typedef struct HIL_GCI_COMP_CYCLIC_INTERFACE_Ttag +{ + /*! Update cyclic consumer data callback. */ + HIL_GCI_COMP_CYCLIC_CONSUMER_DATA_UPDATE_REQUEST_FN fnConsumerDataUpdateRequest; + + /*! Update cyclic provider data callback. */ + HIL_GCI_COMP_CYCLIC_PROVIDER_DATA_UPDATE_REQUEST_FN fnProviderDataUpdateRequest; + +} HIL_GCI_COMP_CYCLIC_INTERFACE_T; + +/*! \} */ + + + + + + + +/*! \defgroup HIL_GCI_Sync Synchronization + * The GCI provides a unique interface to synchronize both the GCI-Application and GCI-Component with each other. + * \{ */ + +/*! Request synchronization between GCI-Component and GCI-Application. + * Request synchronization with the GCI-Component. The GCI-Component will call \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN + * to synchronize the GCI-Application. + * + * The specific semantics of the synchronization function is specific to the GCI-Component and is configurable + * with the dedicated services HIL_GCI_SET_TRIGGER_TYPE_REQ/CNF. + * + * Based on this functions, two basic mechanisms are implemented: + * 1. To synchronize the GCI-Application to an event to occur in the GCI-Component (e.g. a new I/O frame is received) + * In this case the GCI-Application has to call this function to enter the wait phase for the expected event. + * The GCI-Component calls back into \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN synchronous to the event. The GCI-Application then may + * call this function again to wait for the next event. In overload scenarios, where the GCI-Application or GCI-Component + * fail to call in time, synchronization events may be missed. + * + * 2. To synchronize the GCI-Component to an event to occur in the GCI-Application (e.g. Send I/O frame at an + * application-controlled point in time. + * In this case the GCI-Application has to call this function synchronous to the event. + * The GCI-Component will process the event in a best-effort manner and call back into \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN + * after completion. On the next event, the GCI-Application will call this function again. + * + * \note \ref HIL_GCI_COMP_SYNC_EVENT_REQUEST_FN and \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN must always be called in a well-formed + * successive fashion. + * \note The function is implemented by the GCI-Component and is called by the GCI-Application. + * + * \param hComponent [in] Handle of the GCI-Component. + * + * \return SUCCESS_HIL_OK in case GCI-Component accepts the request, otherwise an error code is returned. + * \note If accepted, the GCI-Component calls \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN after event has been processed. +*/ +typedef uint32_t (*HIL_GCI_COMP_SYNC_EVENT_REQUEST_FN) +( + HIL_GCI_COMP_H hComponent +); + +/*! Synchronization between GCI-Component and GCI-Application completed. + * + * This function is called by the GCI-Component to complete the GCI-Application-requested synchronization. + * + * Depending on the particular GCI-Component and its configuration, this function is called to synchronize the GCI-Application + * to an event which occurred in the GCI-Component or, alternatively, to just to report completion of an synchronous event + * which was triggered by the GCI-Application by means of \ref HIL_GCI_COMP_SYNC_EVENT_REQUEST_FN. + * + * \note This function is implemented by the GCI-Application and is called by the GCI-Component. + * + * \param hApplication [in] Handle of the GCI-Application. +*/ +typedef void (*HIL_GCI_APP_SYNC_EVENT_DONE_FN) +( + HIL_GCI_APP_H hApplication +); + +/*! The synchronization service interface provided by the GCI-Component for the GCI-Application. + * This is part of the GCI-Component interface structure. + */ +typedef struct HIL_GCI_COMP_SYNC_INTERFACE_Ttag +{ + /*! Process SYNC event callback. */ + HIL_GCI_COMP_SYNC_EVENT_REQUEST_FN fnSyncRequest; + +} HIL_GCI_COMP_SYNC_INTERFACE_T; + +/*! The synchronization service interface provided by the GCI-Application for the GCI-Component. + * This is part of the GCI-Application interface structure. + */ +typedef struct HIL_GCI_APP_SYNC_INTERFACE_Ttag +{ + /*! SYNC event process done callback. */ + HIL_GCI_APP_SYNC_EVENT_DONE_FN fnSyncDone; + + /*! Pointer to synchronization handshake error counter. + In case not NULL, the GCI-Component updates the value synchronous to the Synchronization exchange + via \ref HIL_GCI_APP_SYNC_EVENT_DONE_FN. The value is incremented by one for each Synchronization cycle in + which no handshaking with the GCI-Application took place. Saturates at value 255. */ + uint8_t* pbSyncEventErrorCnt; + +} HIL_GCI_APP_SYNC_INTERFACE_T; + +/*! \} */ + + + + + + + +/*! \defgroup HIL_GCI_Error Error + * GCI provides a bidirectional interface for error report. + * \{ */ + +/*! Report an faulty GCI-Component. + * The GCI-Component calls this function in case it is no longer possible to continue normal operation + * process, e.g. a critical problem is detected, specifically, critical runtime failures and + * invalid use of the GCI interface. The GCI-Application can no longer expect proper functionality + * of the GCI-Component, i.e. the GCI-Application shall switch to a safe state. + * + * \note The function needs to be implemented by the GCI-Application and is called by the GCI-Component. + * + * \param hApplication [in] Handle of the GCI-Application. + * \param ulErrorCode [in] The error code indicating the problem occurred. +*/ +typedef void (*HIL_GCI_APP_COMPONENT_ERROR_OCCURED_FN) +( + HIL_GCI_APP_H hApplication, + uint32_t ulErrorCode +); + +/*! The error service interface provided by the GCI-Application for the GCI-Component. + * This is part of the GCI-Application interface structure. + */ +typedef struct HIL_GCI_APP_ERROR_INTERFACE_Ttag +{ + /*! Error occurred callback. */ + HIL_GCI_APP_COMPONENT_ERROR_OCCURED_FN fnErrorOccured; + +} HIL_GCI_APP_ERROR_INTERFACE_T; + +/*! Report a GCI-Application error to the GCI-Component. + * + * Using this callback, the GCI-Application requests the GCI-Component to transit into failure state + * and stop communication. In this state any start of network commands shall be rejected until + * the GCI-Component is reinitialized (HIL_CHANNEL_INIT_REQ). + * + * The GCI-Component will send a HIL_GCI_SET_COMMUNICATION_STATUS_IND to acknowledge the new state: + * ulCommunicationState = HIL_COMM_STATE_STOP + * ulError = ulErrorCode + * ulErrorCounter = Total number of errors detected since last reset. + * bCommunicating = 0 (false) + * + * + * \param hComponent [in] Handle of the GCI-Component. + * \param ulErrorCode [in] The error code indicating the problem occurred, e.g. ERR_HIL_WATCHDOG_TIMEOUT + */ +typedef void (*HIL_GCI_COMP_APPLICATION_ERROR_OCCURED_FN) +( + HIL_GCI_COMP_H hComponent, + uint32_t ulErrorCode +); + +/*! The error service interface provided by the GCI-Component for the GCI-Application. + * This is part of the GCI-Component interface structure. + */ +typedef struct HIL_GCI_COMP_ERROR_INTERFACE_Ttag +{ + /*! Error occurred callback. */ + HIL_GCI_COMP_APPLICATION_ERROR_OCCURED_FN fnErrorOccured; + +} HIL_GCI_COMP_ERROR_INTERFACE_T; + +/*! \} */ + + + + + + + +/*! \defgroup HIL_GCI_Startup Startup + * The GCI provides a unique interface to initialize and start the GCI-Component. + * \{ */ + +/*! The GCI-Component information interface provided by the GCI-Component for the GCI-Application. + * This is part of the GCI-Component interface structure. + */ +typedef struct HIL_GCI_COMP_INFO_Ttag +{ + /*! Unique GCI-Component identifier HIL_COMPONENT_ID_*. */ + uint32_t ulComponentId; + /*! Total amount of required remanent data in bytes. In case the remanent data size is zero, + * the GCI-Component does not need remanent data at all. + * \note The remanent data size shall be exact the size used during HIL_STORE_REMANENT_DATA_IND. */ + uint32_t ulRemanentDataSize; + /*! Major version */ + uint16_t usVersionMajor; + /*! Minor version */ + uint16_t usVersionMinor; + /*! Build version */ + uint16_t usVersionBuild; + /*! Revision version */ + uint16_t usVersionRevision; +} HIL_GCI_COMP_INFO_T; + +/*! Start the GCI Interface of a specific GCI-Component. + * + * This function is called by the GCI-Application to signal the GCI-Component that the interface shall be started. + * At that point in time both the GCI-Application and the GCI-Component are allowed to communicate with each other + * using the previously exchanged interfaces (see \ref HIL_GCI_COMP_INTERFACE_INITIALIZE_FN). + + * \param hComponent [in] Handle of the GCI-Component. Obtained with GCI-Component's interface, + * see \ref HIL_GCI_COMP_INTERFACE_INITIALIZE_FN. + */ +typedef void (*HIL_GCI_COMP_INTERFACE_START_FN) +( + HIL_GCI_COMP_H hComponent +); + +/*! + * GCI-Application interface + * This interface structure is filled by the GCI-Application and provided to the GCI-Component. + */ +typedef struct HIL_GCI_APP_INTERFACE_Ttag +{ + /*! GCI version number that is used by GCI-Application. The version is of type HIL_GCI_VERSION_*. */ + uint32_t ulVersionNumber; + + /*! GCI-Application handle. */ + HIL_GCI_APP_H hApplication; + + /*! The acyclic service interface. */ + HIL_GCI_APP_SERVICE_INTERFACE_T tService; + + /*! The cyclic service interface. */ + HIL_GCI_APP_CYCLIC_INTERFACE_T tCyclic; + + /*! The synchronization service interface. */ + HIL_GCI_APP_SYNC_INTERFACE_T tSync; + + /*! The error service interface. */ + HIL_GCI_APP_ERROR_INTERFACE_T tError; + + /*! Handle of Log book. + * The GCI-Application is responsible for maintaining the Logbook. The handle is provided to the + * GCI-Component for recording events, which may help during commissioning or debugging of the device. + * If the GCI-Component does not support the PS Toolbox logging, this handle can be ignored. + * If no Logbook is available, this member is set to NULL. + */ + struct PS_LOGBOOK_Ttag* hLogbook; + + /*! Pointer to the Extended Status data buffer. If provided by the GCI-Application, the GCI-Component + * will write additional status information into this buffer. + * \note The communication data flow is unidirectional (GCI-Component -> GCI-Application). + * \note The structure, semantics, size and times of access are specific to the GCI-Component + * and have to be obtained from the corresponding manual. + * */ + uint8_t* pabExtendedStatusArea; + + /*! Extended Status Area total size in bytes. Typically, 172 bytes are provided. + * In case the size is not supported by the GCI-Component, the \ref HIL_GCI_COMP_INTERFACE_INITIALIZE_FN + * has to return an appropriate error code. */ + uint32_t ulExtendedStatusAreaSize; + +} HIL_GCI_APP_INTERFACE_T; + +/*! + * GCI-Component interface + * This interface structure is filled by the GCI-Component. + */ +typedef struct HIL_GCI_COMP_INTERFACE_Ttag +{ + /*! GCI version number that is used by the GCI-Component. The version is of type HIL_GCI_VERSION_*. */ + uint32_t ulVersionNumber; + + /*! Handle of the GCI-Component. */ + HIL_GCI_COMP_H hComponent; + + /*! Start the GCI-Interface for both GCI-Application and GCI-Component side. */ + HIL_GCI_COMP_INTERFACE_START_FN fnStart; + + /*! The acyclic service interface */ + HIL_GCI_COMP_SERVICE_INTERFACE_T tService; + + /*! The cyclic service interface */ + HIL_GCI_COMP_CYCLIC_INTERFACE_T tCyclic; + + /*! The synchronization service interface */ + HIL_GCI_COMP_SYNC_INTERFACE_T tSync; + + /*! The error service interface. */ + HIL_GCI_COMP_ERROR_INTERFACE_T tError; + + /*! The GCI-Component information interface. */ + HIL_GCI_COMP_INFO_T tInfo; + +} HIL_GCI_COMP_INTERFACE_T; + +/*! Initialize the GCI Interface of a specific GCI-Component. + * + * The GCI-Application provides its interface to the GCI-Component together with GCI-Component specific initialization parameters. + * On function return the GCI-Component has set up its interface for the GCI-Application. + * + * After the interfaces have been exchanged and the start function of the GCI-Component has been called, the interfaces are ready + * to be used by each side. Using them before the start function has been called leads to undefined behavior. + * + * \note The function needs to be implemented by GCI-Component and is called by GCI-Application. + * + * \param ptApplicationInterface [in] GCI-Application interface that will be used by the GCI-Component. + * The GCI-Component has to copy-out the provided interface data, + * as the pointer might not be valid anymore as soon as the function returns. + * \param ptComponentInterface [out] GCI-Component interface set up after the function successfully has returned. + * \param pvComponentParameter [in] GCI-Component specific initialization parameter. + * The GCI-Component has to copy-out the provided parameter, + * as the pointer might not be valid anymore as soon as the function returns. + * + * \return SUCCESS_HIL_OK in case the GCI-Component successfully initialized. + * Otherwise an error code is returned. In the error case also the content of + * ptComponentInterface must be considered invalid. + */ +typedef uint32_t (*HIL_GCI_COMP_INTERFACE_INITIALIZE_FN) +( + const HIL_GCI_APP_INTERFACE_T* ptApplicationInterface, + HIL_GCI_COMP_INTERFACE_T* ptComponentInterface, + void* pvComponentParameter +); + +/*! \} */ + + +/******************************************************************************/ +/*! \defgroup group_HIL_GCI_Packets Generic Services + * \{*/ + + + +/*! \defgroup HIL_GCI_SET_COMMUNICATION_STATUS_doc Set Communication Status + * \{ */ +#define HIL_GCI_SET_COMMUNICATION_STATUS_IND 0x0000AE00 /*!< Set Communication Status indication */ +#define HIL_GCI_SET_COMMUNICATION_STATUS_RES 0x0000AE01 /*!< Set Communication Status response */ +/*! \} */ + +/*! \defgroup HIL_GCI_SET_MASTER_STATUS_doc Set Master Status + * \{ */ +#define HIL_GCI_SET_MASTER_STATUS_IND 0x0000AE02 /*!< Set Master status indication */ +#define HIL_GCI_SET_MASTER_STATUS_RES 0x0000AE03 /*!< Set Master status response */ +/*! \} */ + +/*! \defgroup HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_doc Set minimum process data update interval + * \{ */ +#define HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND 0x0000AE04 /*!< Set minimum process data update interval indication */ +#define HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_RES 0x0000AE05 /*!< Set minimum process data update interval response */ +/*! \} */ + +/*! \defgroup HIL_GCI_SET_COM_LEDS_doc Set Communication LEDs + * \{ */ +#define HIL_GCI_SET_COM_LEDS_IND 0x0000AE06 /*!< Set Communication LEDs indication */ +#define HIL_GCI_SET_COM_LEDS_RES 0x0000AE07 /*!< Set Communication LEDs response */ +/*! \} */ + +/*! \defgroup HIL_GCI_SET_STATE_FIELD_doc Set state information field + * \{ */ +#define HIL_GCI_SET_STATE_FIELD_IND 0x0000AE08 /*!< Set state information field indication */ +#define HIL_GCI_SET_STATE_FIELD_RES 0x0000AE09 /*!< Set state information field response */ +/*! \} */ + +/*! \defgroup HIL_GCI_RESET_STATE_FIELDS_doc Reset state information fields + * \{ */ +#define HIL_GCI_RESET_STATE_FIELDS_IND 0x0000AE0A /*!< Reset state information fields indication */ +#define HIL_GCI_RESET_STATE_FIELDS_RES 0x0000AE0B /*!< Reset state information fields response */ +/*! \} */ + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_SET_COMMUNICATION_STATUS_doc + * + * This service provides a basic but general status of the GCI-ProtocolStack. Note that + * the meaning of the fields is still GCI-ProtocolStack specific. + * + * \{*/ + +/*! Communication status indication data structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_COMMUNICATION_STATUS_IND_DATA_Ttag +{ + /*! Communication state. + * Information about the current network state. + * - HIL_COMM_STATE_NOT_CONFIGURED = No valid configuration / no network communication + * - HIL_COMM_STATE_STOP = Communication stopped by the user GCI-Application or + * an error during network communication + * - HIL_COMM_STATE_IDLE = GCI-ProtocolStack is configured but not yet operational. + * No cyclic data exchange on the bus system + * - HIL_COMM_STATE_OPERATE = Network communication is active, data exchange on the network + * is activated + * \note Depending on the GCI-ProtocolStack, not all of the above states are available or may deviate + * in meaning. + */ + uint32_t ulCommunicationState; + + /*! GCI-ProtocolStack specific error code or SUCCESS_HIL_OK on status changes in the "good case" */ + uint32_t ulError; + + /*! Error Counter. + * Total number of errors detected by the GCI-ProtocolStack since start or reset, respectively. + * A GCI-ProtocolStack counts all sorts of errors in this field no matter if they were network + * related or caused internally. */ + uint32_t ulErrorCounter; + + /*! Communicating Status. + * This flag is set if the GCI-ProtocolStack has successfully opened a connection + * to at least ONE of the configured network slaves (for GCI-MasterStack), + * respectively has an open connection to the network master (for GCI-SlaveStack). + * If cleared, the cyclic input data should not be evaluated, because it may be invalid, + * old or both. + * - 0 = No communication (No connection). + * - 1 = Communicating (At least one connection). + * \note Even if the GCI-ProtocolStack reports "Communicating" the process data may not be valid. E.g. + * Open Modbus reports "Communicating" when a TCP connection is established, because + * this system works message based, no data must be transmitted. In addition, most GCI-ProtocolStacks + * provide a dedicated validation information together with the process data. + * \note On slave systems it is highly recommended that the process data which is generated by the + * GCI-Application is updated even if the connection is not active. */ + uint8_t bCommunicating; + + /*! Bus state. + * Actual bus state of the GCI-ProtocolStack stack. The BUS on/off only represent + * the cyclic I/O bus status of the protocol. If the bus is off the communication + * stack will not accept application related connections (I/O connections) e.g. from + * a PLC. + * The Bus state follows the requested state from the application. A wrong + * configuration may prevent the GCI-ProtocolStack that this will happen. + * - 0 = No cyclic connections will be accepted. + * - 1 = cyclic connections will be accepted. + * + * \note Depending on protocol the communication on the network is still active, + * particular stack with possible daisy chain topology may enable the bus + * PHYs regardless of the requested bus signal from application. + */ + uint8_t bBusState; + +} HIL_GCI_SET_COMMUNICATION_STATUS_IND_DATA_T; + +/*! Communication status indication structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_COMMUNICATION_STATUS_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GCI_SET_COMMUNICATION_STATUS_IND_DATA_T tData; /*!< Packet data. */ +} HIL_GCI_SET_COMMUNICATION_STATUS_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_COMMUNICATION_STATUS_IND_SIZE (sizeof(HIL_GCI_SET_COMMUNICATION_STATUS_IND_DATA_T)) + + +/*! Communication status response structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_SET_COMMUNICATION_STATUS_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_COMMUNICATION_STATUS_RES_SIZE (0) + +/*! \}*************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_SET_MASTER_STATUS_doc + * + * The master status indication service offers common information over all + * configured slaves for all GCI-MasterStacks. This indication will be + * generated by the GCI-MasterStack if the status of one or more devices has changed. + * + * \note This service is only available for the GCI-MasterStack. + * + * \{*/ + +/*! Master status indication data structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_MASTER_STATUS_IND_DATA_Ttag +{ + /*! Number of configured slave devices in the master configuration. */ + uint32_t ulNumOfConfigSlaves; + /*! Number of activated slave devices, the master has an open connection to. */ + uint32_t ulNumOfActiveSlaves; + /*! Number of slaves reporting diagnostic issues. */ + uint32_t ulNumOfDiagSlaves; +} HIL_GCI_SET_MASTER_STATUS_IND_DATA_T; + +/*! Master status indication structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_MASTER_STATUS_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GCI_SET_MASTER_STATUS_IND_DATA_T tData; /*!< Packet data. */ +} HIL_GCI_SET_MASTER_STATUS_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_MASTER_STATUS_IND_SIZE (sizeof(HIL_GCI_SET_MASTER_STATUS_IND_DATA_T)) + + +/*! Master status response structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_SET_MASTER_STATUS_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_MASTER_STATUS_RES_SIZE (0) +/*! \}*************************************************************************/ + + + + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_doc + * + * This service is used by the GCI-ProtocolStack to configure the minimum process data + * update interval in free-run mode. The GCI-Application shall consider to not update + * process data faster than this interval. In case the service is not used, the + * GCI-Application shall assume a default value of 1000us. + * + * \note The service can be used at runtime (dynamic PDO mapping). + * \note The update interval is restored to default value on delete config. + * \note This service is intended to be used firmware internal only. + * + * \{*/ + +#define HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_MIN_FREERUN_UPDATE_TIME 32 /*!< Minimum allowed update time in us. */ + +/*! Set process data update interval structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_DATA_Ttag +{ + /*! Minimal Update interval used for overload protection in free-run mode. + * Value in microseconds, default value is 1000us, value 0-31 is not valid. */ + uint16_t usMinFreeRunUpdateInterval; +} HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_DATA_T; + +/*! Set process data update interval indication structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_DATA_T tData; /*!< Packet data. */ +} HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_SIZE (sizeof(HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_IND_DATA_T)) + + +/*! Set process data update interval response structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_IO_MIN_UPDATE_INTERVAL_RES_SIZE (0) +/*! \}*************************************************************************/ + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_SET_COM_LEDS_doc + * This service coming from the GCI-ProtocolStack indicates protocol specific + * COM Led states. + * + * For some GCI-ProtocolStack this service has to be handled by the GCI-Application + * to be able to fulfill certification requirements. + * + * \note This service shall not be used to control GCI-Application behavior. + * It's purpose is to transport status information to be displayed on LEDs + * or an alternative status indicator. + * \{*/ + +/*! This status indicates that there is no active LED status */ +#define HIL_GCI_COM_LED_STATUS_NO_STATUS_INFORMATION 0x0000 + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_PNS Profinet device status indications + * \{*/ +#define HIL_GCI_COM_LED_STATUS_PNS_DCP_SIGNAL 0x0101 /*!< DCP signal service is initiated via the bus. */ +#define HIL_GCI_COM_LED_STATUS_PNS_WATCHDOG_TIMEOUT 0x0102 /*!< Watchdog timeout; channel, generic or extended diagnosis present; system error. */ +#define HIL_GCI_COM_LED_STATUS_PNS_NO_DATA_EXCHANGE 0x0103 /*!< No data exchange */ +#define HIL_GCI_COM_LED_STATUS_PNS_NO_CONFIG 0x0104 /*!< No configuration; or low speed physical link; or no physical link. */ +/*! \} */ + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_EIS Ethernet/IP adapter status indications + * \{*/ +#define HIL_GCI_COM_LED_STATUS_EIS_OPERATIONAL 0x0201 /*!< The device is operating correctly. */ +#define HIL_GCI_COM_LED_STATUS_EIS_STANDBY 0x0202 /*!< The device is not configured. */ +#define HIL_GCI_COM_LED_STATUS_EIS_SELF_TEST 0x0203 /*!< The device is performing its power up testing. */ +#define HIL_GCI_COM_LED_STATUS_EIS_MINOR_FAULT 0x0204 /*!< The device detected a recoverable minor fault, e.g. incorrect or inconsistent configuration. */ +#define HIL_GCI_COM_LED_STATUS_EIS_MAJOR_FAULT 0x0205 /*!< The device detected a non-recoverable major fault. */ +#define HIL_GCI_COM_LED_STATUS_EIS_CONNECTED 0x0206 /*!< The device has at least one established connection. */ +#define HIL_GCI_COM_LED_STATUS_EIS_NO_CONNECTIONS 0x0207 /*!< The device has no established connections, but has obtained an IP address. */ +#define HIL_GCI_COM_LED_STATUS_EIS_CONNECTION_TIMEOUT 0x0208 /*!< One or more connections have timed out. */ +#define HIL_GCI_COM_LED_STATUS_EIS_DUPLICATE_IP 0x0209 /*!< The device detected that its IP address is already in use. */ +/*! \} */ + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_ECS EtherCAT slave status indications + * \{*/ +#define HIL_GCI_COM_LED_STATUS_ECS_INIT 0x0301 /*!< The device is in initialization state. */ +#define HIL_GCI_COM_LED_STATUS_ECS_PRE_OPERATIONAL 0x0302 /*!< The device is in pre-operational state. */ +#define HIL_GCI_COM_LED_STATUS_ECS_SAFE_OPERATIONAL 0x0303 /*!< The device is in safe-operational state. */ +#define HIL_GCI_COM_LED_STATUS_ECS_OPERATIONAL 0x0304 /*!< The device is in operational state. */ +#define HIL_GCI_COM_LED_STATUS_ECS_NO_ERROR 0x0305 /*!< The communication of the device is in working condition. */ +#define HIL_GCI_COM_LED_STATUS_ECS_INVALID_CONFIGURATION 0x0306 /*!< General configuration error. */ +#define HIL_GCI_COM_LED_STATUS_ECS_LOCAL_ERROR 0x0307 /*!< Slave device application has changed the EtherCAT state autonomously. */ +#define HIL_GCI_COM_LED_STATUS_ECS_APPLICATION_WATCHDOG_TIMEOUT 0x0308 /*!< An application watchdog timeout has occurred. */ +/*! \} */ + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_SCS Sercos slave status indications + * \{*/ +#define HIL_GCI_COM_LED_STATUS_SCS_NRT_MODE 0x0401 /*!< No Sercos communication (Non RealTime Mode). */ +#define HIL_GCI_COM_LED_STATUS_SCS_LOOPBACK 0x0402 /*!< The network state has changed from "fastforward" to "loopback". */ +#define HIL_GCI_COM_LED_STATUS_SCS_CP0 0x0403 /*!< Communication phase 0. */ +#define HIL_GCI_COM_LED_STATUS_SCS_CP1 0x0404 /*!< Communication phase 1. */ +#define HIL_GCI_COM_LED_STATUS_SCS_CP2 0x0405 /*!< Communication phase 2. */ +#define HIL_GCI_COM_LED_STATUS_SCS_CP3 0x0406 /*!< Communication phase 3. */ +#define HIL_GCI_COM_LED_STATUS_SCS_CP4 0x0407 /*!< Communication phase 4: Normal operation, no error. */ + +#define HIL_GCI_COM_LED_STATUS_SCS_HP0 0x0408 /*!< Hot-plug mode 0. */ +#define HIL_GCI_COM_LED_STATUS_SCS_HP1 0x0409 /*!< Hot-plug mode 1. */ +#define HIL_GCI_COM_LED_STATUS_SCS_HP2 0x040A /*!< Hot-plug mode 2. */ + +#define HIL_GCI_COM_LED_STATUS_SCS_IDENTIFICATION 0x040D /*!< Remote address allocation or configuration errors between Master and Slaves. */ +#define HIL_GCI_COM_LED_STATUS_SCS_MST_LOSSES 0x040E /*!< Communication warning (Master SYNC telegrams not received). */ +#define HIL_GCI_COM_LED_STATUS_SCS_APPLICATION_ERROR 0x040F /*!< See GDP & FSP Status codes class error (API manual). */ +#define HIL_GCI_COM_LED_STATUS_SCS_COMMUNICATION_ERROR 0x0410 /*!< See SCP Status codes class error (API manual). */ +#define HIL_GCI_COM_LED_STATUS_SCS_WATCHDOG_ERROR 0x0411 /*!< A watch dog error has been detected */ +/*! \} */ + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_PLS POWERLINK Controlled Node status indications + * \{*/ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_OFF 0x0501 /*!< The device is not initialized yet */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_INITIALISATION 0x0502 /*!< The device is in initialization state */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_NOT_ACTIVE 0x0503 /*!< The device is in initialized and waiting for EPL communication */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_BASIC_ETHERNET 0x0504 /*!< The device is running in Basic Ethernet mode */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_PRE_OPERATIONAL_1 0x0505 /*!< The device is in pre-operational 1 state. EPL communication with SoA cycle is established */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_PRE_OPERATIONAL_2 0x0506 /*!< The device is in pre-operational 2 state. EPL communication with SoC cycle is established */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_READY_TO_OPERATE 0x0507 /*!< The device is in ready to operate state. EPL communication is established, the configuration was done and the device is ready for cyclic data exchange */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_OPERATIONAL 0x0508 /*!< The device is in operational state. EPL communication is established and cyclic data exchange is running */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_STOPPED 0x0509 /*!< The device is in stopped state. EPL communication is established and cyclic data exchange is stopped */ +#define HIL_GCI_COM_LED_STATUS_PLS_NMT_ERROR 0x050A /*!< The device has an error */ +/*! \} */ + +/*! \defgroup HIL_GCI_COM_LED_STATUS_IND_COS CANopen Slave status indications +* \{*/ + +/* Definitions if RUN and ERROR LEDs are visually separated from each other */ +#define HIL_GCI_COM_LED_STATUS_COS_RUN_NMT_RESET 0x0601 /*!< NMT is in reset state. */ +#define HIL_GCI_COM_LED_STATUS_COS_RUN_NMT_OPERATIONAL 0x0602 /*!< NMT is in operational state. */ +#define HIL_GCI_COM_LED_STATUS_COS_RUN_NMT_PREOPERATIONAL 0x0603 /*!< NMT is in pre-operational state. */ +#define HIL_GCI_COM_LED_STATUS_COS_RUN_NMT_STOP 0x0604 /*!< NMT is in stop state. */ +#define HIL_GCI_COM_LED_STATUS_COS_RUN_NMT_BAUD_DETECTION 0x060F /*!< CAN auto baud detection is in progress. */ + +#define HIL_GCI_COM_LED_STATUS_COS_ERROR_NOERROR 0x0610 /*!< No CAN error detected. */ +#define HIL_GCI_COM_LED_STATUS_COS_ERROR_CAN_WARNING_LEVEL_REACHED 0x0620 /*!< CAN warning level reached. */ +#define HIL_GCI_COM_LED_STATUS_COS_ERROR_CO_ERROR_CONTROL_EVENT 0x0630 /*!< CANopen error event occurred. */ +#define HIL_GCI_COM_LED_STATUS_COS_ERROR_CAN_BUSOFF 0x0640 /*!< CAN is in bus-off state. */ +#define HIL_GCI_COM_LED_STATUS_COS_ERROR_BAUD_DETECTION 0x06F0 /*!< CAN auto baud detection is in progress. */ + +/* Definitions if only one STATUS LED exist */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_RESET_CAN_NO_ERROR 0x0611 /*!< NMT is in reset state, no CAN error detected. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_RESET_CAN_WARNING_LEVEL_REACHED 0x0621 /*!< NMT is in reset state, CAN warning level reached. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_RESET_CO_ERROR_CONTROL_EVENT 0x0631 /*!< NMT is in reset state, CANopen error event occurred. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_RESET_CAN_BUSOFF 0x0641 /*!< NMT is in reset state, CAN is in bus-off state. */ + +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_OPERATIONAL_CAN_NO_ERROR 0x0612 /*!< NMT is in operational state, no CAN error detected. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_OPERATIONAL_CAN_WARNING_LEVEL_REACHED 0x0622 /*!< NMT is in operational state, CAN warning level reached. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_OPERATIONAL_CO_ERROR_CONTROL_EVENT 0x0632 /*!< NMT is in operational state, CANopen error event occurred. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_OPERATIONAL_CAN_BUSOFF 0x0642 /*!< NMT is in operational state, CAN is in bus-off state. */ + +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_PREOPERATIONAL_CAN_NO_ERROR 0x0613 /*!< NMT is in pre-operational state, no CAN error detected. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_PREOPERATIONAL_CAN_WARNING_LEVEL_REACHED 0x0623 /*!< NMT is in pre-operational state, CAN warning level reached. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_PREOPERATIONAL_CO_ERROR_CONTROL_EVENT 0x0633 /*!< NMT is in pre-operational state, CANopen error event occurred. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_PREOPERATIONAL_CAN_BUSOFF 0x0643 /*!< NMT is in pre-operational state, CAN is in bus-off state. */ + +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_STOP_CAN_NO_ERROR 0x0614 /*!< NMT is in stop state, no CAN error detected. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_STOP_CAN_WARNING_LEVEL_REACHED 0x0624 /*!< NMT is in stop state, CAN warning level reached. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_STOP_CO_ERROR_CONTROL_EVENT 0x0634 /*!< NMT is in stop state, CANopen error event occurred. */ +#define HIL_GCI_COM_LED_STATUS_COS_STATUS_NMT_STOP_CAN_BUSOFF 0x0644 /*!< NMT is in stop state, CAN is in bus-off state. */ + +#define HIL_GCI_COM_LED_STATUS_CAN_STATUS_AUTO_BAUD_DETECTION 0x06FF /*!< CAN auto baud detection is in progress. */ +/*! \} */ + + +#define HIL_GCI_COM_LED_COLOR_OFF 0x00 /*!< Disable all LEDs, off. */ +#define HIL_GCI_COM_LED_COLOR_RED 0x01 /*!< Red LED on. */ +#define HIL_GCI_COM_LED_COLOR_GREEN 0x02 /*!< Green LED on. */ +#define HIL_GCI_COM_LED_COLOR_YELLOW 0x03 /*!< Yellow LED on (or green and red if duo LED). */ + +#define HIL_GCI_COM_LED_CYCLE_TIME_1HZ 40 /*!< Speed 1 Hz, 1/(40*0.025s) */ +#define HIL_GCI_COM_LED_CYCLE_TIME_2HZ 20 /*!< Speed 2 Hz, 1/(20*0.025s) */ +#define HIL_GCI_COM_LED_CYCLE_TIME_2_5HZ 16 /*!< Speed 2.5 Hz, 1/(16*0.025s) */ +#define HIL_GCI_COM_LED_CYCLE_TIME_5HZ 8 /*!< Speed 5 Hz, 1/( 8*0.025s) */ +#define HIL_GCI_COM_LED_CYCLE_TIME_10HZ 4 /*!< Speed 10 Hz, 1/( 4*0.025s) */ +#define HIL_GCI_COM_LED_CYCLE_TIME_STATIC 0x00 /*!< No blinking solid on */ + +#define HIL_GCI_COM_LED_DUTY_CYCLE_0 0x00 /*!< 0% Duty cycle (solid background color) */ +#define HIL_GCI_COM_LED_DUTY_CYCLE_25 0x01 /*!< 25% Duty cycle */ +#define HIL_GCI_COM_LED_DUTY_CYCLE_50 0x02 /*!< 50% Duty cycle */ +#define HIL_GCI_COM_LED_DUTY_CYCLE_75 0x03 /*!< 75% Duty cycle */ +#define HIL_GCI_COM_LED_DUTY_CYCLE_100 0x04 /*!< 100% Duty cycle (solid foreground color) */ + +#define HIL_GCI_COM_LED_REPETITION_RUN_TO_END_MSK 0x80 /*!< Disable interruption of COM LED sequence. */ + +/*! COM LED data structure. + * + * Here are some examples: + * - PROFINET DCP Signaling + * bForeColor = HIL_GCI_COM_LED_COLOR_RED; bBackColor = HIL_GCI_COM_LED_COLOR_OFF; + * bCycleTime = HIL_GCI_COM_LED_CYCLE_TIME_1HZ; bDutyCycle = HIL_GCI_COM_LED_DUTY_CYCLE_50; + * bRepetitions = 3; bDelay = 255; + * usCOMStatusCode = HIL_GCI_COM_LED_STATUS_PNS_DCP_SIGNAL; + * + * - Sercos CP2 + * bForeColor = HIL_GCI_COM_LED_COLOR_GREEN; bBackColor = HIL_GCI_COM_LED_COLOR_YELLOW; + * bCycleTime = HIL_GCI_COM_LED_CYCLE_TIME_2HZ; bDutyCycle = HIL_GCI_COM_LED_DUTY_CYCLE_50; + * bRepetitions = 2; bDelay = 80; (repeat after 2s pause) + * usCOMStatusCode = HIL_GCI_COM_LED_STATUS_SCS_CP2; + * + * - EtherCAT in Operational state + * bForeColor = HIL_GCI_COM_LED_COLOR_GREEN; bBackColor = HIL_GCI_COM_LED_COLOR_OFF; (don't care) + * bCycleTime = HIL_GCI_COM_LED_CYCLE_TIME_STATIC; bDutyCycle = HIL_GCI_COM_LED_DUTY_CYCLE_100; (don't care) + * bRepetitions = 0; (don't care) bDelay = 0; (don't care) + * usCOMStatusCode = HIL_GCI_COM_LED_STATUS_ECS_OPERATIONAL; + * + * \note bDutyCycle == 0 && bDelay == 255 stop all previous codes including HIL_GCI_COM_LED_REPETITION_RUN_TO_END_MSK + */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_COM_LED_DATA_Ttag +{ + uint8_t bForeColor; /*!< LED foreground color (see HIL_GCI_COM_LED_COLOR_*) */ + uint8_t bBackColor; /*!< LED background color (see HIL_GCI_COM_LED_COLOR_*) */ + uint8_t bCycleTime; /*!< Time of one full cycle in 25ms steps (see HIL_GCI_COM_LED_CYCLE_TIME_*) */ + uint8_t bDutyCycle; /*!< Duty cycle between foreground color and background color (see HIL_GCI_COM_LED_DUTY_CYCLE_*) */ + + uint8_t bRepetitions; /*!< Repetition (cycles) times. 0 == no repeat, foreground color solid on. */ + uint8_t bDelay; /*!< Delay after blink sequence in 25ms steps. 0 == no delay. 255 == stops and background color stays on. */ + + uint16_t usCOMStatusCode; /*!< See definition list HIL_GCI_COM_LED_STATUS_* */ +} HIL_GCI_COM_LED_DATA_T; + + +/*! COM LED control indication packet data. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_COM_LEDS_IND_DATA_Ttag +{ + /*! LED data for COM-LED 0 and COM-LED 1. */ + HIL_GCI_COM_LED_DATA_T atCOM[2]; + +} HIL_GCI_SET_COM_LEDS_IND_DATA_T; + +/*! COM LED control indication packet. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_COM_LEDS_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GCI_SET_COM_LEDS_IND_DATA_T tData; /*!< Packet data. */ +} HIL_GCI_SET_COM_LEDS_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_COM_LEDS_IND_SIZE (sizeof(HIL_GCI_SET_COM_LEDS_IND_DATA_T)) + + +/*! COM LED control response packet. */ +typedef struct HIL_EMPTY_PACKET_Ttag HIL_GCI_SET_COM_LEDS_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_COM_LEDS_RES_SIZE (0) + +/*! \}*************************************************************************/ + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_SET_STATE_FIELD_doc + * + * This service offers notification of the GCI-Application about one or more new state + * information fields in the Consumer/Provider Data Area. The GCI-Component can also + * notify an updated state information field in case the number of state entries change. + * In case the GCI-Application cannot recognize the state information field, the + * response shall contain an appropriate error code. + * + * \note The GCI-Component can notify multiple state fields to the GCI-Application. + * \note The packet data length is either one or multiple of the size HIL_GCI_STATE_FIELD_T. + * \note In order to update the number of state entries of an already existing state + * information field, bStateArea, bStateTypeID and ulStateOffset have to match. + * + * \{*/ + +/*! State field located in Consumer Data Area. */ +#define HIL_GCI_STATE_FIELD_LOCATION_CONSUMER 0 +/*! State field located in Provider Data Area. */ +#define HIL_GCI_STATE_FIELD_LOCATION_PROVIDER 8 + +/*! State field data structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_STATE_FIELD_Ttag +{ + /*! Location of the state information field HIL_GCI_STATE_FIELD_LOCATION_*. */ + uint8_t bStateArea; + /*! Type of status information. The supported types are GCI-Component specific and has to + * be obtained from the corresponding API manual. */ + uint8_t bStateTypeID; + /*! Number of state entries of type bStateTypeID. */ + uint16_t usNumOfStateEntries; + /*! Start offset of the status information field in the location bStateArea (Provider/Consumer data). */ + uint32_t ulStateOffset; +} HIL_GCI_STATE_FIELD_T; + + +/*! State information field data structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_STATE_FIELD_IND_DATA_Ttag +{ + /*! The number of state information fields in atData. + * \note The value shall always be greater than zero. */ + uint32_t ulNumDataElements; + /*! List of one or multiple state entries. */ + HIL_GCI_STATE_FIELD_T atData[__HIL_VARIABLE_LENGTH_ARRAY]; +} HIL_GCI_SET_STATE_FIELD_IND_DATA_T; + +/*! State information field indication structure. */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GCI_SET_STATE_FIELD_IND_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< Packet header. */ + HIL_GCI_SET_STATE_FIELD_IND_DATA_T tData; /*!< Packet data. */ +} HIL_GCI_SET_STATE_FIELD_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_STATE_FIELD_IND_SIZE(numOfDataElements) (sizeof(uint32_t) + (numOfDataElements) * sizeof(HIL_GCI_STATE_FIELD_T)) + + +/*! State information field response structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_SET_STATE_FIELD_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_SET_STATE_FIELD_RES_SIZE (0) + +/*! \}*************************************************************************/ + + +/******************************************************************************/ +/*! \addtogroup HIL_GCI_RESET_STATE_FIELDS_doc + * + * This service notifies the GCI-Application that all state information fields + * in the Consumer and Provider Data Area have been reset by the GCI-Component. + * It can be assumed that no state information fields exist anymore. + * + * \{*/ + +/*! Reset state information field indication structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_RESET_STATE_FIELDS_IND_T; + +/*! Packet data size. */ +#define HIL_GCI_RESET_STATE_FIELDS_IND_SIZE (0) + + +/*! Reset state information field response structure. */ +typedef HIL_EMPTY_PACKET_T HIL_GCI_RESET_STATE_FIELDS_RES_T; + +/*! Packet data size. */ +#define HIL_GCI_RESET_STATE_FIELDS_RES_SIZE (0) + +/*! \}*************************************************************************/ + +/*! \}*************************************************************************/ + +/* Backward compatible definitions, those defines will be removed in the + * next version of GCI. Currently we have HIL_GCI_VERSION_20 */ +#ifndef DOXYGEN_SKIP_SECTION + #define HIL_COMMUNICATION_STATE_IND HIL_GCI_SET_COMMUNICATION_STATUS_IND + #define HIL_COMMUNICATION_STATE_RES HIL_GCI_SET_COMMUNICATION_STATUS_RES + #define HIL_COMMUNICATION_STATE_IND_DATA_T HIL_GCI_SET_COMMUNICATION_STATUS_IND_DATA_T + #define HIL_COMMUNICATION_STATE_IND_T HIL_GCI_SET_COMMUNICATION_STATUS_IND_T + #define HIL_COMMUNICATION_STATE_RES_T HIL_GCI_SET_COMMUNICATION_STATUS_RES_T + #define HIL_COMMUNICATION_STATE_IND_SIZE HIL_GCI_SET_COMMUNICATION_STATUS_IND_SIZE + #define HIL_COMMUNICATION_STATE_RES_SIZE HIL_GCI_SET_COMMUNICATION_STATUS_RES_SIZE + + #define HIL_COM_LED_CONTROL_IND HIL_GCI_SET_COM_LEDS_IND + #define HIL_COM_LED_CONTROL_RES HIL_GCI_SET_COM_LEDS_RES + #define HIL_COM_LED_CONTROL_IND_COM_DATA_T HIL_GCI_COM_LED_DATA_T + #define HIL_COM_LED_CONTROL_IND_DATA_T HIL_GCI_SET_COM_LEDS_IND_DATA_T + #define HIL_COM_LED_CONTROL_IND_T HIL_GCI_SET_COM_LEDS_IND_T + #define HIL_COM_LED_STATUS_RES_T HIL_GCI_SET_COM_LEDS_RES_T + #define HIL_COM_LED_CONTROL_IND_SIZE HIL_GCI_SET_COM_LEDS_IND_SIZE + #define HIL_COM_LED_CONTROL_RES_SIZE HIL_GCI_SET_COM_LEDS_RES_SIZE + + #define HIL_STATE_FIELD_IND HIL_GCI_SET_STATE_FIELD_IND + #define HIL_STATE_FIELD_RES HIL_GCI_SET_STATE_FIELD_RES + #define HIL_STATE_FIELD_IND_DATA_T HIL_GCI_SET_STATE_FIELD_IND_DATA_T + #define HIL_STATE_FIELD_IND_T HIL_GCI_SET_STATE_FIELD_IND_T + #define HIL_STATE_FIELD_RES_T HIL_GCI_SET_STATE_FIELD_RES_T + #define HIL_STATE_FIELD_IND_SIZE HIL_GCI_SET_STATE_FIELD_IND_SIZE + #define HIL_STATE_FIELD_RES_SIZE HIL_GCI_SET_STATE_FIELD_RES_SIZE + + #define HIL_STATE_FIELD_RESET_IND HIL_GCI_RESET_STATE_FIELDS_IND + #define HIL_STATE_FIELD_RESET_RES HIL_GCI_RESET_STATE_FIELDS_RES + #define HIL_STATE_FIELD_RESET_IND_T HIL_GCI_RESET_STATE_FIELDS_IND_T + #define HIL_STATE_FIELD_RESET_RES_T HIL_GCI_RESET_STATE_FIELDS_RES_T + #define HIL_STATE_FIELD_RESET_IND_SIZE HIL_GCI_RESET_STATE_FIELDS_IND_SIZE + #define HIL_STATE_FIELD_RESET_RES_SIZE HIL_GCI_RESET_STATE_FIELDS_RES_SIZE +#endif /* DOXYGEN_SKIP_SECTION */ + + + +#endif /* HIL_GENERICCOMMUNICATIONINTERFACE_H_ */ + + diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Logbook.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Logbook.h new file mode 100644 index 0000000..5e7bc29 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Logbook.h @@ -0,0 +1,198 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Logbook.h $: *//*! + + \file Hil_Logbook.h + + Definitions for the Hilscher firmware Logbook. + + \note In this file the Type IDs will be managed (HIL_LOGBOOK_ENTRY_TYPE_*) definitions + are only made here. There is no structure to the type values, the next value is + acquired directly after the last one. It is not desired to reserve numbers, this + shall avoid dead number ranges and gaps between the types. + + \note This list is maintained by the protocol stack department (SPC). + + In the description the python like format strings will be used to give information over + a possible presentation. (https://docs.python.org/3.4/library/string.html#formatspec) + the parameter will by "selected" by position e.g. + "{0} {1}" -> first and second member of structure. + +**************************************************************************************/ +#ifndef HIL_LOGBOOK_H_ +#define HIL_LOGBOOK_H_ + +#include +#include "Hil_Compiler.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_LOGBOOK) +#endif + +typedef enum { + /*! The entry is not valid and shall not be evaluated */ + HIL_LOGBOOK_ENTRY_TYPE_INVALID = 0x0000, + + /*! The first 15 codes are reserved for internal use. */ + HIL_LOGBOOK_ENTRY_TYPE_RESERVED_BLOCK_END = 0x000F, + + + HIL_LOGBOOK_ENTRY_TYPE_LABEL = 0x0010, /*!< ASCII label */ + HIL_LOGBOOK_ENTRY_TYPE_DPM_COMMON_STATUS = 0x0011, /*!< The common status block have been changed */ + /* HIL_LOGBOOK_ENTRY_TYPE_DPM_MASTER_STATUS = 0x0012, */ + HIL_LOGBOOK_ENTRY_TYPE_PACKET_ISSUE = 0x0013, /*!< Information to a received packet/service */ + HIL_LOGBOOK_ENTRY_TYPE_SDO_FAILURE = 0x0014, /*!< SDO Configuration issue occurred */ + HIL_LOGBOOK_ENTRY_TYPE_CFGMGR_TLV = 0x0015, /*!< Config Manager TLV */ + + + /*! The entry is not valid and shall not be evaluated */ + HIL_LOGBOOK_ENTRY_TYPE_UNKNOWN = 0xFFFF +} HIL_LOGBOOK_ENTRY_TYPE_E; + +/* Type definition for public APIs of the HIL_LOGBOOK_ENTRY_TYPE_E enumeration. */ +typedef uint16_t HIL_LOGBOOK_ENTRY_TYPE_T; + + +/* Severity levels */ +typedef enum { + /*! Critical conditions. + * This entry severity indicates a situation which very likely leads to undefined + * system behavior. Entries of this type should not be present in a system. Such entry + * type should definitely be evaluated and analyzed. + * e.g. System Out of resources, component could not be started. */ + HIL_LOGBOOK_SEVERITY_LEVEL_CRITICAL = 2, + + /*! Warning conditions. + * Warning conditions are shown if something happens which is unexpected or suspicious + * for a normal operations but is not a serious error, because the device can handle + * the situation. + * Under normal operation such entry's are not likely to appear, but they can indicate + * faulty configuration or illegal request which are made by other components. + * e.g. Illegal request was issued, wrong configuration, + * No remanent data available (may be fist start of the device?). */ + HIL_LOGBOOK_SEVERITY_LEVEL_WARNING = 4, + + /*! Informational conditions. + * Informational entries can be helpful to verify the behavior of the device. They + * do not indicate an issue at all. + * e.g. some state was reached, Request was handled (e.g. request was received form + * the network). */ + HIL_LOGBOOK_SEVERITY_LEVEL_INFOMATIONAL = 6, + +} HIL_LOGBOOK_SEVERITY_LEVEL_E; + +/*! Type definition for public APIs of the HIL_LOGBOOK_SEVERITY_LEVEL_E enumeration. */ +typedef uint8_t HIL_LOGBOOK_SEVERITY_LEVEL_T; + + +/*! General definition of a Logbook entry */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + /*! Time stamp of the OS in Millisecond when the entry was made */ + uint32_t ulSystemTicks; + + /*! Severity level of this entry */ + HIL_LOGBOOK_SEVERITY_LEVEL_T bLevel; + + /*! This field is reserved for later use, will be set to 0. */ + uint8_t bReserved; + + /*! The type is used to determine how the following abData filed must be + * interpreted. Types and related structures are defined in the Hil_Logbook.h */ + HIL_LOGBOOK_ENTRY_TYPE_T usType; + + /*! Data length and format depends on usType */ + uint8_t abData[16]; + +} HIL_LOGBOOK_ENTRY_T; + + +/*! Structure definition for HIL_LOGBOOK_ENTRY_TYPE_LABEL entries. + * The label can be used to mark important events, which not contain any additional information. + * The created label should contain a information who was the creator of the Label (e.g. + * "PN:Signaling", "DLR:Ring open", "S3:CableBrake", ...). + * Used Labels and there meaning will be described in the Manual of the related Firmware. + * + * Only Printable characters Codes 20hex to 7Ehex shall be used. Not used characters, at the end + * of the Label, can be set to zero (00hex) or filled with spaces (20hex). + * + * \note The entries shall be at least kind of human readable. In addition only English + * words and acronym shall be used. + * + * Notification string: + * "Label {0:<14}" + **/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + char abLabel[14]; /*!< An ASCII label with fix length, not zero terminated. */ + +} HIL_LOGBOOK_ENTRY_TYPE_LABEL_T; + + +/*! Structure definition for HIL_LOGBOOK_ENTRY_TYPE_DPM_COMMON_STATUS entries. + * A more detailed description of the values can be found in the DPM manual. + * + * Notification string: + * "The common status block was updated. COS {0:#010x}, COM State {1:#010x}, COM Error {2:#010x}" + **/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + uint32_t ulCommunicationCOS; /*!< Communication channel "Change Of State" */ + uint32_t ulCommunicationState; /*!< Actual communication state */ + uint32_t ulCommunicationError; /*!< Actual communication error */ + +} HIL_LOGBOOK_ENTRY_TYPE_DPM_COMMON_STATUS_T; + + +/*! Structure definition for HIL_LOGBOOK_ENTRY_TYPE_PACKET_ISSUE entries. + * A packet have raise a issue within a component. + * + * \note: Do not generate an entry if you receive a packet with a already set + * status code. The component how had trouble with this packet shall + * made the entry. + * + * Notification string: + * "The command {0:#010x} from {1:#010x} raised an issue with the code {3:#010x}" + **/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + uint32_t ulCmd; /*!< Operation command code of the packet. */ + uint32_t ulSrc; /*!< Source of the packet which cause an issue. */ + uint32_t ulSta; /*!< Status code */ + +} HIL_LOGBOOK_ENTRY_TYPE_DPM_PACKET_ISSUE_T; + + +/*! Structure definition for HIL_LOGBOOK_ENTRY_TYPE_SDO_FAILURE entries. + * An SDO transfer to a node failed. + * + * Notification string: + * "The SDO transfer to node {0:#06x} object {1:#06x}/{2:#04x} (Info flags:{3:08b}) failed with error code {5:#010x}" + **/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + uint16_t usNodeId; /*!< Node id which issued the failure */ + uint16_t usIndex; /*!< Index of object */ + uint8_t bSubIndex; /*!< Sub-index of object */ + uint8_t bInfoFlags; /*!< Info flags: Bit 0 - Complete access */ + uint8_t abReserved[2]; /*!< Reserved for future or internal use */ + uint32_t ulSdoAbortCode; /*!< SDO abort code */ + +} HIL_LOGBOOK_ENTRY_TYPE_SDO_FAILURE_T; + +/*! Structure definition for HIL_LOGBOOK_ENTRY_TYPE_CFGMGR_TLV entries. + * A TLV entry have raise an event within the Config Manager. + * + * Notification string: + * "The TLV type {0:#06x} with length {1:d} at index {2:#010x} raised an issue with the code {3:#010x}" + **/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST { + uint16_t usType; /*!< TLV type */ + uint16_t usLength; /*!< Length of TLV entry */ + uint32_t ulIndex; /*!< Index of TLV within a config data stream */ + uint32_t ulSta; /*!< Status code */ + uint8_t abReserved[4]; /*!< Reserved for future or internal use */ + +} HIL_LOGBOOK_ENTRY_TYPE_CFGMGR_TLV_T; + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_LOGBOOK) +#endif + +#endif /* HIL_LOGBOOK_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ModuleLoader.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ModuleLoader.h new file mode 100644 index 0000000..b865d03 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_ModuleLoader.h @@ -0,0 +1,256 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_ModuleLoader.h $: *//*! + + \file Hil_ModuleLoader.h + + Module Loader API (will be part of HIL_SYSTEM task). + +**************************************************************************************/ +#ifndef HIL_MODULELOADER_H_ +#define HIL_MODULELOADER_H_ + +#include "Hil_Types.h" +#include "Hil_Packet.h" + + +/** queue name (RX_SYSTEM queue) */ + +/** Module Loader handles this many modules at most (TODO: tbd) */ +#define HIL_MODLOAD_MAX_MODULES 10 + +/** Maximum file name length (TODO: tbd) */ +#define HIL_MODLOAD_MAX_FILENAME 32 + +/* pragma pack */ +#ifdef PRAGMA_PACK_ENABLE + #pragma PRAGMA_PACK_1(HIL_MODULELOADER_PUBLIC) +#endif + +/**************************************************************************************** +* Module Loader command codes */ + +/** Start of the reserved area from 0x4B00 - 0x4BFF for MODLOAD commands */ +#define HIL_MODLOAD_PACKET_COMMAND_START 0x00004B00 + +/** Get a module list */ +#define HIL_MODLOAD_CMD_QUERY_MODULES_REQ (HIL_MODLOAD_PACKET_COMMAND_START + 0) +#define HIL_MODLOAD_CMD_QUERY_MODULES_CNF (HIL_MODLOAD_PACKET_COMMAND_START + 1) + +/** Run a module */ +#define HIL_MODLOAD_CMD_RUN_MODULE_REQ (HIL_MODLOAD_PACKET_COMMAND_START + 2) +#define HIL_MODLOAD_CMD_RUN_MODULE_CNF (HIL_MODLOAD_PACKET_COMMAND_START + 3) + +/** Load module from filesystem */ +#define HIL_MODLOAD_CMD_LOAD_MODULE_REQ (HIL_MODLOAD_PACKET_COMMAND_START + 4) +#define HIL_MODLOAD_CMD_LOAD_MODULE_CNF (HIL_MODLOAD_PACKET_COMMAND_START + 5) + +/** Load and run module from filesystem */ +#define HIL_MODLOAD_CMD_LOAD_AND_RUN_MODULE_REQ (HIL_MODLOAD_PACKET_COMMAND_START + 6) +#define HIL_MODLOAD_CMD_LOAD_AND_RUN_MODULE_CNF (HIL_MODLOAD_PACKET_COMMAND_START + 7) + +/* download module (will be done via HIL_SYSTEM Download mechanism (Download type FILE_TYPE_MODULE)) */ +/* download and run module (will be done via HIL_SYSTEM Download mechanism (Download type FILE_TYPE_RUN_MODULE)) */ + + +/**************************************************************************************** +* Module Loader structs */ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_VERSION_Ttag +{ + uint32_t usMajor; + uint32_t usMinor; + uint32_t usRevision; + uint32_t usBuild; +} HIL_MODULE_VERSION_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_NAME_Ttag +{ + uint8_t bNameLength; + uint8_t abName[15]; +} HIL_MODULE_NAME_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_DATE_Ttag +{ + uint32_t usYear; + uint8_t bMonth; + uint8_t bDay; +} HIL_MODULE_DATE_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_ENTRY_Ttag +{ + HIL_MODULE_NAME_T tFileName; /*!< file name of module */ +} HIL_MODULE_ENTRY_T; + + +#define HIL_MODLOAD_MAX_ENTRIES_PER_PACKET (1024 / sizeof(HIL_MODULE_ENTRY_T)) + +/**************************************************************************************** + * Packet: HIL_MODLOAD_CMD_QUERY_MODULES_REQ/HIL_MODLOAD_CMD_QUERY_MODULES_CNF + * + * Query modules list + * + */ + +/**** Request Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_QUERY_MODULES_REQ_DATA_Ttag +{ + uint32_t ulListType; +} HIL_MODLOAD_QUERY_MODULES_REQ_DATA_T; + +/* List Types */ +#define HIL_MODLOAD_QUERY_MODULES_REQ_LIST_TYPE_STORAGE 0x00000000 /*!< static storage, like CF file system */ +#define HIL_MODLOAD_QUERY_MODULES_REQ_LIST_TYPE_LOADED 0x00000001 /*!< currently loaded modules */ +#define HIL_MODLOAD_QUERY_MODULES_REQ_LIST_TYPE_RUNNING 0x00000002 /*!< currently running modules */ + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_QUERY_MODULES_REQ_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; + + /** packet data */ + HIL_MODLOAD_QUERY_MODULES_REQ_DATA_T tData; +} HIL_MODLOAD_QUERY_MODULES_REQ_T; + + + +/**** Confirmation Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_QUERY_MODULES_CNF_DATA_Ttag +{ + HIL_MODULE_ENTRY_T atModules[HIL_MODLOAD_MAX_ENTRIES_PER_PACKET]; +} HIL_MODLOAD_QUERY_MODULES_CNF_DATA_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_QUERY_MODULES_CNF_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; + /** packet data */ + HIL_MODLOAD_QUERY_MODULES_CNF_DATA_T tData; +} HIL_MODLOAD_QUERY_MODULES_CNF_T; + + +/**************************************************************************************** + * Packet: HIL_MODLOAD_CMD_RUN_MODULE_REQ/HIL_MODLOAD_CMD_RUN_MODULE_CNF + * + * Run a module which has been loaded + */ + + +/**** Request Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_RUN_MODULE_REQ_DATA_Ttag +{ + /** channel parameter for modules supporting multi-instantiation */ + uint32_t ulChannel; + /* module name follows with NUL termination */ +} HIL_MODLOAD_RUN_MODULE_REQ_DATA_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_RUN_MODULE_REQ_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; + /** packet data */ + HIL_MODLOAD_RUN_MODULE_REQ_DATA_T tData; +} HIL_MODLOAD_RUN_MODULE_REQ_T; + + + +/**** Confirmation Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_RUN_MODULE_CNF_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; +} HIL_MODLOAD_RUN_MODULE_CNF_T; + +/**************************************************************************************** + * Packet: HIL_MODLOAD_CMD_LOAD_MODULE_REQ/HIL_MODLOAD_CMD_LOAD_MODULE_CNF + * + * Load a module from file system + */ + + +/**** Request Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_MODULE_REQ_DATA_Ttag +{ + /** channel parameter for modules supporting multi-instantiation */ + uint32_t ulChannel; + /* file name (including path) follows with NUL termination */ + /* XXX mgr: dynamic lenght structs are evil - why not use HIL_MODULE_NAME_T? */ +} HIL_MODLOAD_LOAD_MODULE_REQ_DATA_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_MODULE_REQ_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; + /** packet data */ + HIL_MODLOAD_LOAD_MODULE_REQ_DATA_T tData; +} HIL_MODLOAD_LOAD_MODULE_REQ_T; + + + +/**** Confirmation Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_MODULE_CNF_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; +} HIL_MODLOAD_LOAD_MODULE_CNF_T; + + +/**************************************************************************************** + * Packet: HIL_MODLOAD_CMD_LOAD_AND_RUN_MODULE_REQ/HIL_MODLOAD_CMD_LOAD_AND_RUN_MODULE_CNF + * + * Run a loaded module + */ + + +/**** Request Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_DATA_Ttag +{ + /** channel parameter for modules supporting multi-instantiation. + * if it doen't, this value has to match the actual channel supported + * by the module + */ + uint32_t ulChannel; + /* file name (including path) follows with NUL termination */ + /* XXX mgr: dynamic lenght structs are evil - why not use HIL_MODULE_NAME_T? */ +} HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_DATA_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; + /** packet data */ + HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_DATA_T tData; +} HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_T; + + + +/**** Confirmation Packet ****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODLOAD_LOAD_AND_RUN_MODULE_CNF_Ttag +{ + /** packet header */ + HIL_PACKET_HEADER_T tHead; +} HIL_MODLOAD_LOAD_AND_RUN_MODULE_CNF_T; + + +/*************************************************************************************/ + +/* pragma unpack */ +#ifdef PRAGMA_PACK_ENABLE +#pragma PRAGMA_UNPACK_1(HIL_MODULELOADER_PUBLIC) +#endif + +#endif /* HIL_MODULELOADER_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Packet.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Packet.h new file mode 100644 index 0000000..81b2972 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Packet.h @@ -0,0 +1,92 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Packet.h $: *//*! + + \file Hil_Packet.h + + Hilscher Packet Definition. + +**************************************************************************************/ +#ifndef HIL_PACKET_H_ +#define HIL_PACKET_H_ + + +#include +#include "Hil_Compiler.h" + + /************************ General Packet Definitions *************************/ + + /** total packet size definition */ + #define HIL_MAX_PACKET_SIZE (1596) + #define HIL_PACKET_HEADER_SIZE 40 /*!< Maximum size of the HIL packet header in bytes */ + #define HIL_MAX_DATA_SIZE (HIL_MAX_PACKET_SIZE - HIL_PACKET_HEADER_SIZE) /*!< Maximum RCX packet data size */ + + + /* Logical Queue defines */ + #define HIL_PACKET_DEST_SYSTEM (0) + #define HIL_PACKET_DEST_CHANNEL_0 (1) + #define HIL_PACKET_DEST_CHANNEL_1 (2) + #define HIL_PACKET_DEST_CHANNEL_2 (3) + #define HIL_PACKET_DEST_CHANNEL_3 (4) + + #define HIL_PACKET_DEST_DEFAULT_CHANNEL 0x00000020 + #define HIL_PACKET_COMM_CHANNEL_TOKEN 0x00000020 + + #define HIL_MSK_PACKET_ANSWER 0x00000001 /*!< Packet answer bit */ + + + + /*** Definitions for the Packet Extension Field ***/ + + /* mask for sequence number and sequence control portions */ + #define HIL_PACKET_SEQ_NR_MASK (0x0000003F) /*!< used for filtering the sequence number */ + #define HIL_PACKET_SEQ_MASK (0x000000C0) /*!< used for filtering the sequence control code */ + + /* sequence control codes */ + #define HIL_PACKET_SEQ_NONE (0x00000000) /*!< packet is not part of a packet sequence */ + #define HIL_PACKET_SEQ_LAST (0x00000040) /*!< last packet of a packet sequence */ + #define HIL_PACKET_SEQ_FIRST (0x00000080) /*!< first packet of a packet sequence */ + #define HIL_PACKET_SEQ_MIDDLE (0x000000C0) /*!< packet in the middle of a packet sequence */ + + /* packet handling flags */ + #define HIL_PACKET_NOT_DELETE (0x00000100) /*!< packet must not be returned to a packet pool */ + #define HIL_PACKET_RETRY (0x00000200) /*!< packet will be resent based on a predefined retry mechanism */ + + /* router flags */ + #define HIL_PACKET_NO_CNF_THRU_ROUTER (0x00000400) /*!< router must not send response/confirmation packet back */ + + /*********************** Packet Structure Definitions ************************/ + + /** packet header definition */ + typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_HEADER_Ttag + { + uint32_t ulDest; /*!< destination of the packet (task message queue reference) */ + uint32_t ulSrc; /*!< source of the packet (task message queue reference) */ + uint32_t ulDestId; /*!< destination reference (internal use for message routing) */ + uint32_t ulSrcId; /*!< source reference (internal use for message routing) */ + uint32_t ulLen; /*!< length of packet data (starting from the end of the header) */ + uint32_t ulId; /*!< identification reference (internal use by the sender) */ + uint32_t ulSta; /*!< operation status code (error code, initialize with 0) */ + uint32_t ulCmd; /*!< operation command code */ + uint32_t ulExt; /*!< extension count (nonzero in multi-packet transfers) */ + uint32_t ulRout; /*!< router reference (internal use for message routing) */ + } HIL_PACKET_HEADER_T; + + + /** definition of a packet with maximum size */ + typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PACKET_Ttag + { + HIL_PACKET_HEADER_T tHead; + uint8_t abData[HIL_MAX_PACKET_SIZE - sizeof (HIL_PACKET_HEADER_T)]; + } HIL_PACKET_T; + + + /** definition of a packet with minimum size */ + typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_EMPTY_PACKET_Ttag + { + HIL_PACKET_HEADER_T tHead; + } HIL_EMPTY_PACKET_T; + + +#endif /* HIL_PACKET_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Results.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Results.h new file mode 100644 index 0000000..afa8783 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Results.h @@ -0,0 +1,638 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Results.h $: *//*! + + \file Hil_Results.h + + Common error code definitions. + +**************************************************************************************/ +#ifndef HIL_RESULTS_H_ +#define HIL_RESULTS_H_ + +#include + +/*********************************************************************************** + Common status codes +************************************************************************************/ + +/* MessageId: SUCCESS_HIL_OK */ +/* MessageText: Operation succeeded. */ +#define SUCCESS_HIL_OK ((uint32_t)0x00000000L) + +/* MessageId: ERR_HIL_FAIL */ +/* MessageText: Common error, detailed error information optionally present in the data area of packet. */ +#define ERR_HIL_FAIL ((uint32_t)0xC0000001L) + +/* MessageId: ERR_HIL_UNEXPECTED */ +/* MessageText: Unexpected failure. */ +#define ERR_HIL_UNEXPECTED ((uint32_t)0xC0000002L) + +/* MessageId: ERR_HIL_OUTOFMEMORY */ +/* MessageText: Ran out of memory. */ +#define ERR_HIL_OUTOFMEMORY ((uint32_t)0xC0000003L) + +/*********************************************************************************** + Packet Related Results +************************************************************************************/ + +/* MessageId: ERR_HIL_UNKNOWN_COMMAND */ +/* MessageText: Unknown Command in Packet received. */ +#define ERR_HIL_UNKNOWN_COMMAND ((uint32_t)0xC0000004L) + +/* MessageId: ERR_HIL_UNKNOWN_DESTINATION */ +/* MessageText: Unknown Destination in Packet received. */ +#define ERR_HIL_UNKNOWN_DESTINATION ((uint32_t)0xC0000005L) + +/* MessageId: ERR_HIL_UNKNOWN_DESTINATION_ID */ +/* MessageText: Unknown Destination Id in Packet received. */ +#define ERR_HIL_UNKNOWN_DESTINATION_ID ((uint32_t)0xC0000006L) + +/* MessageId: ERR_HIL_INVALID_PACKET_LEN */ +/* MessageText: Packet length is invalid. */ +#define ERR_HIL_INVALID_PACKET_LEN ((uint32_t)0xC0000007L) + +/* MessageId: ERR_HIL_INVALID_EXTENSION */ +/* MessageText: Invalid Extension in Packet received. */ +#define ERR_HIL_INVALID_EXTENSION ((uint32_t)0xC0000008L) + +/* MessageId: ERR_HIL_INVALID_PARAMETER */ +/* MessageText: Invalid Parameter in Packet found. */ +#define ERR_HIL_INVALID_PARAMETER ((uint32_t)0xC0000009L) + +/* MessageId: ERR_HIL_INVALID_ALIGNMENT */ +/* MessageText: Invalid alignment. */ +#define ERR_HIL_INVALID_ALIGNMENT ((uint32_t)0xC000000AL) + +/* MessageId: 0xC000000BL (No symbolic name defined) */ +/* MessageText: Missing description. */ + + +/* MessageId: ERR_HIL_WATCHDOG_TIMEOUT */ +/* MessageText: Watchdog error occurred. */ +#define ERR_HIL_WATCHDOG_TIMEOUT ((uint32_t)0xC000000CL) + +/* MessageId: ERR_HIL_INVALID_LIST_TYPE */ +/* MessageText: List type is invalid. */ +#define ERR_HIL_INVALID_LIST_TYPE ((uint32_t)0xC000000DL) + +/* MessageId: ERR_HIL_UNKNOWN_HANDLE */ +/* MessageText: Handle is unknown. */ +#define ERR_HIL_UNKNOWN_HANDLE ((uint32_t)0xC000000EL) + +/* MessageId: ERR_HIL_PACKET_OUT_OF_SEQ */ +/* MessageText: A packet index has been not in the expected sequence. */ +#define ERR_HIL_PACKET_OUT_OF_SEQ ((uint32_t)0xC000000FL) + +/* MessageId: ERR_HIL_PACKET_OUT_OF_MEMORY */ +/* MessageText: The amount of fragmented data contained the packet sequence has been too large. */ +#define ERR_HIL_PACKET_OUT_OF_MEMORY ((uint32_t)0xC0000010L) + +/* MessageId: ERR_HIL_QUE_PACKETDONE */ +/* MessageText: The packet done function has failed. */ +#define ERR_HIL_QUE_PACKETDONE ((uint32_t)0xC0000011L) + +/* MessageId: ERR_HIL_QUE_SENDPACKET */ +/* MessageText: The sending of a packet has failed. */ +#define ERR_HIL_QUE_SENDPACKET ((uint32_t)0xC0000012L) + +/* MessageId: ERR_HIL_POOL_PACKET_GET */ +/* MessageText: The request of a packet from packet pool has failed. */ +#define ERR_HIL_POOL_PACKET_GET ((uint32_t)0xC0000013L) + +/* MessageId: ERR_HIL_POOL_PACKET_RELEASE */ +/* MessageText: The release of a packet to packet pool has failed. */ +#define ERR_HIL_POOL_PACKET_RELEASE ((uint32_t)0xC0000014L) + +/* MessageId: ERR_HIL_POOL_GET_LOAD */ +/* MessageText: The get packet pool load function has failed. */ +#define ERR_HIL_POOL_GET_LOAD ((uint32_t)0xC0000015L) + +/* MessageId: ERR_HIL_QUE_GET_LOAD */ +/* MessageText: The get queue load function has failed. */ +#define ERR_HIL_QUE_GET_LOAD ((uint32_t)0xC0000016L) + +/* MessageId: ERR_HIL_QUE_WAITFORPACKET */ +/* MessageText: The waiting for a packet from queue has failed. */ +#define ERR_HIL_QUE_WAITFORPACKET ((uint32_t)0xC0000017L) + +/* MessageId: ERR_HIL_QUE_POSTPACKET */ +/* MessageText: The posting of a packet has failed. */ +#define ERR_HIL_QUE_POSTPACKET ((uint32_t)0xC0000018L) + +/* MessageId: ERR_HIL_QUE_PEEKPACKET */ +/* MessageText: The peek of a packet from queue has failed. */ +#define ERR_HIL_QUE_PEEKPACKET ((uint32_t)0xC0000019L) + +/* MessageId: ERR_HIL_REQUEST_RUNNING */ +/* MessageText: Request is already running. */ +#define ERR_HIL_REQUEST_RUNNING ((uint32_t)0xC000001AL) + +/* MessageId: ERR_HIL_CREATE_TIMER */ +/* MessageText: Creating a timer failed. */ +#define ERR_HIL_CREATE_TIMER ((uint32_t)0xC000001BL) + +/* MessageId: ERR_HIL_BUFFER_TOO_SHORT */ +/* MessageText: Supplied buffer too short for the data. */ +#define ERR_HIL_BUFFER_TOO_SHORT ((uint32_t)0xC000001CL) + +/* MessageId: ERR_HIL_NAME_ALREADY_EXIST */ +/* MessageText: Supplied name alreday exists. */ +#define ERR_HIL_NAME_ALREADY_EXIST ((uint32_t)0xC000001DL) + +/* MessageId: ERR_HIL_PACKET_FRAGMENTATION_TIMEOUT */ +/* MessageText: The packet fragmentation has timed out. */ +#define ERR_HIL_PACKET_FRAGMENTATION_TIMEOUT ((uint32_t)0xC000001EL) + +/*********************************************************************************** + General Protocol Stack Results +************************************************************************************/ + +/* MessageId: ERR_HIL_INIT_FAULT */ +/* MessageText: General initialization fault. */ +#define ERR_HIL_INIT_FAULT ((uint32_t)0xC0000100L) + +/* MessageId: ERR_HIL_DATABASE_ACCESS_FAILED */ +/* MessageText: Database access failure. */ +#define ERR_HIL_DATABASE_ACCESS_FAILED ((uint32_t)0xC0000101L) + +/* MessageId: ERR_HIL_CIR_MASTER_PARAMETER_FAILED */ +/* MessageText: Master parameter can not activated at state operate. */ +#define ERR_HIL_CIR_MASTER_PARAMETER_FAILED ((uint32_t)0xC0000102L) + +/* MessageId: ERR_HIL_CIR_SLAVE_PARAMTER_FAILED */ +/* MessageText: Slave parameter can not activated at state operate. */ +#define ERR_HIL_CIR_SLAVE_PARAMTER_FAILED ((uint32_t)0xC0000103L) + +/* MessageId: ERR_HIL_NOT_CONFIGURED */ +/* MessageText: Configuration not available */ +#define ERR_HIL_NOT_CONFIGURED ((uint32_t)0xC0000119L) + +/* MessageId: ERR_HIL_CONFIGURATION_FAULT */ +/* MessageText: General configuration fault. */ +#define ERR_HIL_CONFIGURATION_FAULT ((uint32_t)0xC0000120L) + +/* MessageId: ERR_HIL_INCONSISTENT_DATA_SET */ +/* MessageText: Inconsistent configuration data. */ +#define ERR_HIL_INCONSISTENT_DATA_SET ((uint32_t)0xC0000121L) + +/* MessageId: ERR_HIL_DATA_SET_MISMATCH */ +/* MessageText: Configuration data set mismatch. */ +#define ERR_HIL_DATA_SET_MISMATCH ((uint32_t)0xC0000122L) + +/* MessageId: ERR_HIL_INSUFFICIENT_LICENSE */ +/* MessageText: Insufficient license. */ +#define ERR_HIL_INSUFFICIENT_LICENSE ((uint32_t)0xC0000123L) + +/* MessageId: ERR_HIL_PARAMETER_ERROR */ +/* MessageText: Parameter error. */ +#define ERR_HIL_PARAMETER_ERROR ((uint32_t)0xC0000124L) + +/* MessageId: ERR_HIL_INVALID_NETWORK_ADDRESS */ +/* MessageText: Network address invalid. */ +#define ERR_HIL_INVALID_NETWORK_ADDRESS ((uint32_t)0xC0000125L) + +/* MessageId: ERR_HIL_NO_SECURITY_MEMORY */ +/* MessageText: Security memory chip missing or broken. */ +#define ERR_HIL_NO_SECURITY_MEMORY ((uint32_t)0xC0000126L) + +/* MessageId: ERR_HIL_NO_MAC_ADDRESS_AVAILABLE */ +/* MessageText: no MAC address available. */ +#define ERR_HIL_NO_MAC_ADDRESS_AVAILABLE ((uint32_t)0xC0000127L) + +/* MessageId: ERR_HIL_INVALID_DDP_CONTENT */ +/* MessageText: DeviceDataProvider contains invalid data. */ +#define ERR_HIL_INVALID_DDP_CONTENT ((uint32_t)0xC0000128L) + +/* MessageId: ERR_HIL_FIRMWARE_STARTUP_ERROR */ +/* MessageText: Firmware startup failed. Check System logbook for details. */ +#define ERR_HIL_FIRMWARE_STARTUP_ERROR ((uint32_t)0xC0000129L) + +/* MessageId: ERR_HIL_COMM_CHANNEL_STARTUP_ERROR */ +/* MessageText: Communication Channel startup failed. Check Communication Channel logbook for details. */ +#define ERR_HIL_COMM_CHANNEL_STARTUP_ERROR ((uint32_t)0xC000012AL) + +/* MessageId: ERR_HIL_FIRMWARE_SPECIFIC_STARTUP_FAILED */ +/* MessageText: An error occurred while starting firmware or protocol specific functionality. */ +#define ERR_HIL_FIRMWARE_SPECIFIC_STARTUP_FAILED ((uint32_t)0xC000012BL) + +/* MessageId: ERR_HIL_INVALID_TAGLIST_CONTENT */ +/* MessageText: While evaluating the firmware taglist an invalid taglist parameter was detected. */ +#define ERR_HIL_INVALID_TAGLIST_CONTENT ((uint32_t)0xC000012CL) + +/* MessageId: ERR_HIL_OPERATION_NOT_POSSIBLE_IN_CURRENT_STATE */ +/* MessageText: The requested operation can not be executed in current state. */ +#define ERR_HIL_OPERATION_NOT_POSSIBLE_IN_CURRENT_STATE ((uint32_t)0xC000012DL) + +/* MessageId: ERR_HIL_REMANENT_DATA_MISSING */ +/* MessageText: The requested operation can not be executed because remanent data was not set correctly. */ +#define ERR_HIL_REMANENT_DATA_MISSING ((uint32_t)0xC000012EL) + +/* MessageId: ERR_HIL_INVALID_DDP_OEM_SERIALNUMBER_CODING */ +/* MessageText: The content of DDPs OEM field SerialNumber can not be converted for usage with current protocol stack. */ +#define ERR_HIL_INVALID_DDP_OEM_SERIALNUMBER_CODING ((uint32_t)0xC000012FL) + +/* MessageId: ERR_HIL_INVALID_DDP_OEM_ORDERNUMBER_CODING */ +/* MessageText: The content of DDPs OEM field OrderNumber can not be converted for usage with current protocol stack. */ +#define ERR_HIL_INVALID_DDP_OEM_ORDERNUMBER_CODING ((uint32_t)0xC0000130L) + +/* MessageId: ERR_HIL_INVALID_DDP_OEM_HARDWAREREVISION_CODING */ +/* MessageText: The content of DDPs OEM field HardwareRevision can not be converted for usage with current protocol stack. */ +#define ERR_HIL_INVALID_DDP_OEM_HARDWAREREVISION_CODING ((uint32_t)0xC0000131L) + +/* MessageId: ERR_HIL_INVALID_DDP_OEM_PRODUCTIONDATE_CODING */ +/* MessageText: The content of DDPs OEM field ProductionDate can not be converted for usage with current protocol stack. */ +#define ERR_HIL_INVALID_DDP_OEM_PRODUCTIONDATE_CODING ((uint32_t)0xC0000132L) + +/* MessageId: ERR_HIL_NETWORK_FAULT */ +/* MessageText: General communication fault. */ +#define ERR_HIL_NETWORK_FAULT ((uint32_t)0xC0000140L) + +/* MessageId: ERR_HIL_CONNECTION_CLOSED */ +/* MessageText: Connection closed. */ +#define ERR_HIL_CONNECTION_CLOSED ((uint32_t)0xC0000141L) + +/* MessageId: ERR_HIL_CONNECTION_TIMEOUT */ +/* MessageText: Connection timeout. */ +#define ERR_HIL_CONNECTION_TIMEOUT ((uint32_t)0xC0000142L) + +/* MessageId: ERR_HIL_LONELY_NETWORK */ +/* MessageText: Lonely network. */ +#define ERR_HIL_LONELY_NETWORK ((uint32_t)0xC0000143L) + +/* MessageId: ERR_HIL_DUPLICATE_NODE */ +/* MessageText: Duplicate network address. */ +#define ERR_HIL_DUPLICATE_NODE ((uint32_t)0xC0000144L) + +/* MessageId: ERR_HIL_CABLE_DISCONNECT */ +/* MessageText: Cable disconnected. */ +#define ERR_HIL_CABLE_DISCONNECT ((uint32_t)0xC0000145L) + +/* MessageId: ERR_HIL_BUS_OFF */ +/* MessageText: Bus Off flag is set. */ +#define ERR_HIL_BUS_OFF ((uint32_t)0xC0000180L) + +/* MessageId: ERR_HIL_CONFIG_LOCK */ +/* MessageText: Changing configuration is not allowed. */ +#define ERR_HIL_CONFIG_LOCK ((uint32_t)0xC0000181L) + +/* MessageId: ERR_HIL_APPLICATION_NOT_READY */ +/* MessageText: Application is not at ready state. */ +#define ERR_HIL_APPLICATION_NOT_READY ((uint32_t)0xC0000182L) + +/* MessageId: ERR_HIL_RESET_IN_PROCESS */ +/* MessageText: Application is performing a reset. */ +#define ERR_HIL_RESET_IN_PROCESS ((uint32_t)0xC0000183L) + +/* MessageId: ERR_HIL_UNSUPPORTED_PHY_REVISION */ +/* MessageText: The Revision of integrated netX PHYs is not supported by firmware. */ +#define ERR_HIL_UNSUPPORTED_PHY_REVISION ((uint32_t)0xC0000184L) + +/* MessageId: ERR_HIL_WATCHDOG_TIME_INVALID */ +/* MessageText: Watchdog time is out of range. */ +#define ERR_HIL_WATCHDOG_TIME_INVALID ((uint32_t)0xC0000200L) + +/* MessageId: ERR_HIL_APPLICATION_ALREADY_REGISTERED */ +/* MessageText: Application is already registered. */ +#define ERR_HIL_APPLICATION_ALREADY_REGISTERED ((uint32_t)0xC0000201L) + +/* MessageId: ERR_HIL_NO_APPLICATION_REGISTERED */ +/* MessageText: No application registered. */ +#define ERR_HIL_NO_APPLICATION_REGISTERED ((uint32_t)0xC0000202L) + +/* MessageId: ERR_HIL_INVALID_COMPONENT_ID */ +/* MessageText: Invalid component identifier. */ +#define ERR_HIL_INVALID_COMPONENT_ID ((uint32_t)0xC0000203L) + +/* MessageId: ERR_HIL_INVALID_DATA_LENGTH */ +/* MessageText: Invalid data length. */ +#define ERR_HIL_INVALID_DATA_LENGTH ((uint32_t)0xC0000204L) + +/* MessageId: ERR_HIL_DATA_ALREADY_SET */ +/* MessageText: The data was already set. */ +#define ERR_HIL_DATA_ALREADY_SET ((uint32_t)0xC0000205L) + +/* MessageId: ERR_HIL_NO_LOGBOOK_AVAILABLE */ +/* MessageText: Logbook not available. */ +#define ERR_HIL_NO_LOGBOOK_AVAILABLE ((uint32_t)0xC0000206L) + +/*********************************************************************************** + General Driver Related Results +************************************************************************************/ + +/* MessageId: ERR_HIL_INVALID_HANDLE */ +/* MessageText: No description available - ERR_HIL_INVALID_HANDLE. */ +#define ERR_HIL_INVALID_HANDLE ((uint32_t)0xC0001000L) + +/* MessageId: ERR_HIL_UNKNOWN_DEVICE */ +/* MessageText: No description available - ERR_HIL_UNKNOWN_DEVICE. */ +#define ERR_HIL_UNKNOWN_DEVICE ((uint32_t)0xC0001001L) + +/* MessageId: ERR_HIL_RESOURCE_IN_USE */ +/* MessageText: No description available - ERR_HIL_RESOURCE_IN_USE. */ +#define ERR_HIL_RESOURCE_IN_USE ((uint32_t)0xC0001002L) + +/* MessageId: ERR_HIL_NO_MORE_RESOURCES */ +/* MessageText: No description available - ERR_HIL_NO_MORE_RESOURCES. */ +#define ERR_HIL_NO_MORE_RESOURCES ((uint32_t)0xC0001003L) + +/* MessageId: ERR_HIL_DRV_OPEN_FAILED */ +/* MessageText: No description available - ERR_HIL_DRV_OPEN_FAILED. */ +#define ERR_HIL_DRV_OPEN_FAILED ((uint32_t)0xC0001004L) + +/* MessageId: ERR_HIL_DRV_INITIALIZATION_FAILED */ +/* MessageText: No description available - ERR_HIL_DRV_INITIALIZATION_FAILED. */ +#define ERR_HIL_DRV_INITIALIZATION_FAILED ((uint32_t)0xC0001005L) + +/* MessageId: ERR_HIL_DRV_NOT_INITIALIZED */ +/* MessageText: No description available - ERR_HIL_DRV_NOT_INITIALIZED. */ +#define ERR_HIL_DRV_NOT_INITIALIZED ((uint32_t)0xC0001006L) + +/* MessageId: ERR_HIL_DRV_ALREADY_INITIALIZED */ +/* MessageText: No description available - ERR_HIL_DRV_ALREADY_INITIALIZED. */ +#define ERR_HIL_DRV_ALREADY_INITIALIZED ((uint32_t)0xC0001007L) + +/* MessageId: ERR_HIL_CRC */ +/* MessageText: No description available - ERR_HIL_CRC. */ +#define ERR_HIL_CRC ((uint32_t)0xC0001008L) + +/* Driver resources */ + +/* MessageId: ERR_HIL_DRV_INVALID_RESOURCE */ +/* MessageText: No description available - ERR_HIL_DRV_INVALID_RESOURCE. */ +#define ERR_HIL_DRV_INVALID_RESOURCE ((uint32_t)0xC0001010L) + +/* MessageId: ERR_HIL_DRV_INVALID_MEM_RESOURCE */ +/* MessageText: No description available - ERR_HIL_DRV_INVALID_MEM_RESOURCE. */ +#define ERR_HIL_DRV_INVALID_MEM_RESOURCE ((uint32_t)0xC0001011L) + +/* MessageId: ERR_HIL_DRV_INVALID_MEM_SIZE */ +/* MessageText: No description available - ERR_HIL_DRV_INVALID_MEM_SIZE. */ +#define ERR_HIL_DRV_INVALID_MEM_SIZE ((uint32_t)0xC0001012L) + +/* MessageId: ERR_HIL_DRV_INVALID_PHYS_MEM_BASE */ +/* MessageText: No description available - ERR_HIL_DRV_INVALID_PHYS_MEM_BASE. */ +#define ERR_HIL_DRV_INVALID_PHYS_MEM_BASE ((uint32_t)0xC0001013L) + +/* MessageId: ERR_HIL_DRV_INVALID_PHYS_MEM_SIZE */ +/* MessageText: No description available - ERR_HIL_DRV_INVALID_PHYS_MEM_SIZE. */ +#define ERR_HIL_DRV_INVALID_PHYS_MEM_SIZE ((uint32_t)0xC0001014L) + +/* MessageId: ERR_HIL_DRV_UNDEFINED_HANDLER */ +/* MessageText: No description available - ERR_HIL_DRV_UNDEFINED_HANDLER. */ +#define ERR_HIL_DRV_UNDEFINED_HANDLER ((uint32_t)0xC0001015L) + +/* Driver interrupt handling */ + +/* MessageId: ERR_HIL_DRV_ILLEGAL_VECTOR_ID */ +/* MessageText: No description available - ERR_HIL_DRV_ILLEGAL_VECTOR_ID. */ +#define ERR_HIL_DRV_ILLEGAL_VECTOR_ID ((uint32_t)0xC0001020L) + +/* MessageId: ERR_HIL_DRV_ILLEGAL_IRQ_MASK */ +/* MessageText: No description available - ERR_HIL_DRV_ILLEGAL_IRQ_MASK. */ +#define ERR_HIL_DRV_ILLEGAL_IRQ_MASK ((uint32_t)0xC0001021L) + +/* MessageId: ERR_HIL_DRV_ILLEGAL_SUBIRQ_MASK */ +/* MessageText: No description available - ERR_HIL_DRV_ILLEGAL_SUBIRQ_MASK. */ +#define ERR_HIL_DRV_ILLEGAL_SUBIRQ_MASK ((uint32_t)0xC0001022L) + +/* MessageId: ERR_HIL_DRV_STATE_INVALID */ +/* MessageText: Driver is in invalid state. */ +#define ERR_HIL_DRV_STATE_INVALID ((uint32_t)0xC0001023L) + +/* DPM-Driver specific errors */ + +/* MessageId: ERR_HIL_DPM_CHANNEL_UNKNOWN */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_UNKNOWN. */ +#define ERR_HIL_DPM_CHANNEL_UNKNOWN ((uint32_t)0xC0001100L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_INVALID */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_INVALID. */ +#define ERR_HIL_DPM_CHANNEL_INVALID ((uint32_t)0xC0001101L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_NOT_INITIALIZED */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_NOT_INITIALIZED. */ +#define ERR_HIL_DPM_CHANNEL_NOT_INITIALIZED ((uint32_t)0xC0001102L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_ALREADY_INITIALIZED */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_ALREADY_INITIALIZED. */ +#define ERR_HIL_DPM_CHANNEL_ALREADY_INITIALIZED ((uint32_t)0xC0001103L) + +/* MessageId: 0xC0001104L (No symbolic name defined) */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_IN_USE. */ + + +/* MessageId: ERR_HIL_DPM_CHANNEL_LAYOUT_UNKNOWN */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_LAYOUT_UNKNOWN. */ +#define ERR_HIL_DPM_CHANNEL_LAYOUT_UNKNOWN ((uint32_t)0xC0001120L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_SIZE_INVALID */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_SIZE_INVALID. */ +#define ERR_HIL_DPM_CHANNEL_SIZE_INVALID ((uint32_t)0xC0001121L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_SIZE_EXCEEDED */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_SIZE_EXCEEDED. */ +#define ERR_HIL_DPM_CHANNEL_SIZE_EXCEEDED ((uint32_t)0xC0001122L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_TOO_MANY_BLOCKS */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_TOO_MANY_BLOCKS. */ +#define ERR_HIL_DPM_CHANNEL_TOO_MANY_BLOCKS ((uint32_t)0xC0001123L) + +/* MessageId: ERR_HIL_DPM_BLOCK_UNKNOWN */ +/* MessageText: No description available - ERR_HIL_DPM_BLOCK_UNKNOWN. */ +#define ERR_HIL_DPM_BLOCK_UNKNOWN ((uint32_t)0xC0001130L) + +/* MessageId: ERR_HIL_DPM_BLOCK_SIZE_EXCEEDED */ +/* MessageText: No description available - ERR_HIL_DPM_BLOCK_SIZE_EXCEEDED. */ +#define ERR_HIL_DPM_BLOCK_SIZE_EXCEEDED ((uint32_t)0xC0001131L) + +/* MessageId: ERR_HIL_DPM_BLOCK_CREATION_FAILED */ +/* MessageText: No description available - ERR_HIL_DPM_BLOCK_CREATION_FAILED. */ +#define ERR_HIL_DPM_BLOCK_CREATION_FAILED ((uint32_t)0xC0001132L) + +/* MessageId: ERR_HIL_DPM_BLOCK_OFFSET_INVALID */ +/* MessageText: No description available - ERR_HIL_DPM_BLOCK_OFFSET_INVALID. */ +#define ERR_HIL_DPM_BLOCK_OFFSET_INVALID ((uint32_t)0xC0001133L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_HOST_MBX_FULL */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_HOST_MBX_FULL. */ +#define ERR_HIL_DPM_CHANNEL_HOST_MBX_FULL ((uint32_t)0xC0001140L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_SEGMENT_LIMIT */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_SEGMENT_LIMIT. */ +#define ERR_HIL_DPM_CHANNEL_SEGMENT_LIMIT ((uint32_t)0xC0001141L) + +/* MessageId: ERR_HIL_DPM_CHANNEL_SEGMENT_UNUSED */ +/* MessageText: No description available - ERR_HIL_DPM_CHANNEL_SEGMENT_UNUSED. */ +#define ERR_HIL_DPM_CHANNEL_SEGMENT_UNUSED ((uint32_t)0xC0001142L) + +/* MessageId: ERR_HIL_NAME_INVALID */ +/* MessageText: No description available - ERR_HIL_NAME_INVALID. */ +#define ERR_HIL_NAME_INVALID ((uint32_t)0xC0001143L) + +/* MessageId: ERR_HIL_UNEXPECTED_BLOCK_SIZE */ +/* MessageText: No description available - ERR_HIL_UNEXPECTED_BLOCK_SIZE. */ +#define ERR_HIL_UNEXPECTED_BLOCK_SIZE ((uint32_t)0xC0001144L) + +/* MessageId: ERR_HIL_COMPONENT_BUSY */ +/* MessageText: The component is busy and can not handle the requested service. */ +#define ERR_HIL_COMPONENT_BUSY ((uint32_t)0xC0001145L) + +/* MessageId: ERR_HIL_INVALID_HEADER */ +/* MessageText: Invalid (file) header. E.g. wrong CRC/MD5/Cookie. */ +#define ERR_HIL_INVALID_HEADER ((uint32_t)0xC0001150L) + +/* MessageId: ERR_HIL_INCOMPATIBLE */ +/* MessageText: Firmware does not match device. */ +#define ERR_HIL_INCOMPATIBLE ((uint32_t)0xC0001151L) + +/* MessageId: ERR_HIL_NOT_AVAILABLE */ +/* MessageText: Update file or destination (XIP-Area) not found. */ +#define ERR_HIL_NOT_AVAILABLE ((uint32_t)0xC0001152L) + +/* MessageId: ERR_HIL_READ */ +/* MessageText: Failed to read from file/area. */ +#define ERR_HIL_READ ((uint32_t)0xC0001153L) + +/* MessageId: ERR_HIL_WRITE */ +/* MessageText: Failed to write from file/area. */ +#define ERR_HIL_WRITE ((uint32_t)0xC0001154L) + +/* MessageId: ERR_HIL_IDENTICAL */ +/* MessageText: Update firmware and installed firmware are identical. */ +#define ERR_HIL_IDENTICAL ((uint32_t)0xC0001155L) + +/* MessageId: ERR_HIL_INSTALLATION */ +/* MessageText: Error during installation of firmware. */ +#define ERR_HIL_INSTALLATION ((uint32_t)0xC0001156L) + +/* MessageId: ERR_HIL_VERIFICATION */ +/* MessageText: Error during verification of firmware. */ +#define ERR_HIL_VERIFICATION ((uint32_t)0xC0001157L) + +/* MessageId: ERR_HIL_INVALIDATION */ +/* MessageText: Error during invalidation of firmware files. */ +#define ERR_HIL_INVALIDATION ((uint32_t)0xC0001158L) + +/* MessageId: ERR_HIL_FORMAT */ +/* MessageText: Volume is not formated. */ +#define ERR_HIL_FORMAT ((uint32_t)0xC0001160L) + +/* MessageId: ERR_HIL_VOLUME */ +/* MessageText: (De-)Initialization of volume failed. */ +#define ERR_HIL_VOLUME ((uint32_t)0xC0001161L) + +/* MessageId: ERR_HIL_VOLUME_DRV */ +/* MessageText: (De-)Initialization of volume driver failed. */ +#define ERR_HIL_VOLUME_DRV ((uint32_t)0xC0001162L) + +/* MessageId: ERR_HIL_VOLUME_INVALID */ +/* MessageText: The volume is invalid. */ +#define ERR_HIL_VOLUME_INVALID ((uint32_t)0xC0001163L) + +/* MessageId: ERR_HIL_VOLUME_EXCEEDED */ +/* MessageText: Number of supported volumes exceeded. */ +#define ERR_HIL_VOLUME_EXCEEDED ((uint32_t)0xC0001164L) + +/* MessageId: ERR_HIL_VOLUME_MOUNT */ +/* MessageText: The volume is mounted (in use). */ +#define ERR_HIL_VOLUME_MOUNT ((uint32_t)0xC0001165L) + +/* MessageId: ERR_HIL_ERASE */ +/* MessageText: Failed to erase file/directory/flash. */ +#define ERR_HIL_ERASE ((uint32_t)0xC0001166L) + +/* MessageId: ERR_HIL_OPEN */ +/* MessageText: Failed to open file/directory. */ +#define ERR_HIL_OPEN ((uint32_t)0xC0001167L) + +/* MessageId: ERR_HIL_CLOSE */ +/* MessageText: Failed to close file/directory. */ +#define ERR_HIL_CLOSE ((uint32_t)0xC0001168L) + +/* MessageId: ERR_HIL_CREATE */ +/* MessageText: Failed to create file/directory. */ +#define ERR_HIL_CREATE ((uint32_t)0xC0001169L) + +/* MessageId: ERR_HIL_MODIFY */ +/* MessageText: Failed to modify file/directory. */ +#define ERR_HIL_MODIFY ((uint32_t)0xC0001170L) + +/* MessageId: ERR_HIL_FS_NOT_AVAILABLE */ +/* MessageText: File system not available. */ +#define ERR_HIL_FS_NOT_AVAILABLE ((uint32_t)0xC0001171L) + +/* MessageId: ERR_HIL_FILE_NOT_FOUND */ +/* MessageText: File not available. */ +#define ERR_HIL_FILE_NOT_FOUND ((uint32_t)0xC0001172L) + +/* MessageId: ERR_HIL_DIAG_NO_INFO */ +/* MessageText: No diagnostic information available. */ +#define ERR_HIL_DIAG_NO_INFO ((uint32_t)0xC0001173L) + +/* MessageId: ERR_HIL_QUEUE_UNKNOWN */ +/* MessageText: Queue is not available. */ +#define ERR_HIL_QUEUE_UNKNOWN ((uint32_t)0xC0001174L) + +/* MessageId: ERR_HIL_NAME_UNKNOWN */ +/* MessageText: Name is unknown / not available. */ +#define ERR_HIL_NAME_UNKNOWN ((uint32_t)0xC0001175L) + +/* MessageId: ERR_HIL_UPDATE_ERROR */ +/* MessageText: Failed to update firmware. */ +#define ERR_HIL_UPDATE_ERROR ((uint32_t)0xC0001176L) + +/* MessageId: ERR_HIL_DDP_STATE_INVALID */ +/* MessageText: DDP is in wrong state. */ +#define ERR_HIL_DDP_STATE_INVALID ((uint32_t)0xC0001177L) + +/* MessageId: ERR_HIL_MANUFACTURER_INVALID */ +/* MessageText: Manufacturer in file header does not match target. */ +#define ERR_HIL_MANUFACTURER_INVALID ((uint32_t)0xC0001178L) + +/* MessageId: ERR_HIL_DEVICE_CLASS_INVALID */ +/* MessageText: Device class in file header does not match target. */ +#define ERR_HIL_DEVICE_CLASS_INVALID ((uint32_t)0xC0001179L) + +/* MessageId: ERR_HIL_HW_COMPATIBILITY_INVALID */ +/* MessageText: Hardware compatibility index in file header does not match target. */ +#define ERR_HIL_HW_COMPATIBILITY_INVALID ((uint32_t)0xC000117AL) + +/* MessageId: ERR_HIL_HW_OPTIONS_INVALID */ +/* MessageText: Hardware options in file header does not match target. */ +#define ERR_HIL_HW_OPTIONS_INVALID ((uint32_t)0xC000117BL) + +/* MessageId: ERR_HIL_INIT_FAULT_FTL */ +/* MessageText: FTL volume initialization fault. */ +#define ERR_HIL_INIT_FAULT_FTL ((uint32_t)0xC000117CL) + +/* MessageId: ERR_HIL_MD5 */ +/* MessageText: MD5 checksum is invalid. */ +#define ERR_HIL_MD5 ((uint32_t)0xC000117DL) + +/* MessageId: ERR_HIL_SIGNATURE */ +/* MessageText: The signature is invalid. */ +#define ERR_HIL_SIGNATURE ((uint32_t)0xC000117EL) + +/*********************************************************************************** + Miscellaneous Results +************************************************************************************/ + +/* MessageId: SUCCESS_HIL_FRAGMENTED */ +/* MessageText: Fragment accepted. */ +#define SUCCESS_HIL_FRAGMENTED ((uint32_t)0x0000F005L) + +/* MessageId: ERR_HIL_RESET_REQUIRED */ +/* MessageText: Reset required. */ +#define ERR_HIL_RESET_REQUIRED ((uint32_t)0xC000F006L) + +/* MessageId: ERR_HIL_EVALUATION_TIME_EXPIRED */ +/* MessageText: Evaluation time expired. Reset required. */ +#define ERR_HIL_EVALUATION_TIME_EXPIRED ((uint32_t)0xC000F007L) + +/* MessageId: ERR_HIL_FIRMWARE_CRASHED */ +/* MessageText: The firmware has crashed and the exception handler is running. */ +#define ERR_HIL_FIRMWARE_CRASHED ((uint32_t)0xC000DEADL) + +#endif /* HIL_RESULTS_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SharedDefines.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SharedDefines.h new file mode 100644 index 0000000..644e0b8 --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SharedDefines.h @@ -0,0 +1,360 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_SharedDefines.h $: *//*! + + \file Hil_SharedDefines.h + + Defines which are used in various places. E.g. Fileheader, dual puort memory. + +**************************************************************************************/ +#ifndef HIL_SHAREDDEFINES_H_ +#define HIL_SHAREDDEFINES_H_ + +/*! \addtogroup HIL_DEV_BOOT_TYPE_doc + * + * Boot type definitions for netX chip family used for: + * - 2nd Stage Boot Loader + * - In Operating systems + * - Packet services + * + * \{ */ +#define HIL_DEV_BOOT_TYPE_PFLASH_SRAMBUS 0x00 /*!< ROM Loader: Parallel Flash (SRAM Bus) */ +#define HIL_DEV_BOOT_TYPE_PFLASH_EXTBUS 0x01 /*!< ROM Loader: Parallel Flash (Extension Bus) */ +#define HIL_DEV_BOOT_TYPE_DUALPORT 0x02 /*!< ROM Loader: Dual-Port Memory */ +#define HIL_DEV_BOOT_TYPE_PCI 0x03 /*!< ROM Loader: PCI Interface */ +#define HIL_DEV_BOOT_TYPE_MMC 0x04 /*!< ROM Loader: Multimedia Card */ +#define HIL_DEV_BOOT_TYPE_I2C 0x05 /*!< ROM Loader: I2C Bus */ +#define HIL_DEV_BOOT_TYPE_SFLASH 0x06 /*!< ROM Loader: Serial Flash */ +#define HIL_DEV_BOOT_TYPE_2ND_STAGE_FLASH_BASED 0x07 /*!< 2nd Stage Boot Loader: Serial Flash */ +#define HIL_DEV_BOOT_TYPE_2ND_STAGE_RAM_BASED 0x08 /*!< 2nd Stage Boot Loader: RAM */ +#define HIL_DEV_BOOT_TYPE_IFLASH 0x09 /*!< ROM Loader: Internal Flash */ +/*! \} */ + +/*! \addtogroup HIL_DEV_CHIP_TYPE_doc + * + * Chip type definitions for netX chip family used for: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - In Operating system + * + * \{ */ +#define HIL_DEV_CHIP_TYPE_UNKNOWN 0x00 /*!< unknown Chip */ +#define HIL_DEV_CHIP_TYPE_NETX500 0x01 /*!< netX500 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX100 0x02 /*!< netX100 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX50 0x03 /*!< netX50 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX10 0x04 /*!< netX10 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX51 0x05 /*!< netX51 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX52 0x06 /*!< netX52 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX4000 0x07 /*!< netX4000 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX4100 0x08 /*!< netX4100 Chip */ +#define HIL_DEV_CHIP_TYPE_NETX90 0x09 /*!< netX90 Chip */ +#define HIL_DEV_CHIP_TYPE_NETIOL 0x0A /*!< netIOL Chip */ +#define HIL_DEV_CHIP_TYPE_NETXXXL_MPW 0x0B /*!< netXXXL MPW Chip */ +/*! \} */ + + +/*! \addtogroup HIL_HW_ASSEMBLY_doc + * + * The assembly option defines the physical hardware interface connected to a + * netX xC (Communication Controller) or xPIC port. + * The defines will be used in the following locations: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - Second state loader + * - Device data (secmem, flash device lable, ...) + * - Configuration utilities (sycon.net, taglist editor) + * + * \{ */ +#define HIL_HW_ASSEMBLY_UNDEFINED 0x0000 +#define HIL_HW_ASSEMBLY_NOT_AVAILABLE 0x0001 + +#define HIL_HW_ASSEMBLY_VALIDATION_START 0x0010 /*!< Start of HW option validation area */ + +#define HIL_HW_ASSEMBLY_SERIAL 0x0010 /*!< UART interface (e.g. RS232, RS485) */ +#define HIL_HW_ASSEMBLY_ASI 0x0020 /*!< AS-Interface */ +#define HIL_HW_ASSEMBLY_CAN 0x0030 /*!< CAN interface */ +#define HIL_HW_ASSEMBLY_DEVICENET 0x0040 /*!< DeviceNet interface */ +#define HIL_HW_ASSEMBLY_PROFIBUS 0x0050 /*!< PROFIBUS interface */ + +#define HIL_HW_ASSEMBLY_CCLINK 0x0070 /*!< CC-Link Fieldbus interface */ +#define HIL_HW_ASSEMBLY_CCLINK_IE_FIELD_1GB 0x0071 /*!< CC-Link IE Field interface */ + +#define HIL_HW_ASSEMBLY_ETHERNET 0x0080 /*!< Ethernet with internal PHY */ +#define HIL_HW_ASSEMBLY_ETHERNET_X_PHY 0x0081 /*!< Ethernet with external PHY */ +#define HIL_HW_ASSEMBLY_ETHERNET_FIBRE_OPTIC 0x0082 /*!< Fiber optic Ethernet */ +#define HIL_HW_ASSEMBLY_ETHERNET_TAP 0x0083 /*!< Passive Ethernet TAP */ + +#define HIL_HW_ASSEMBLY_SPI 0x0090 /*!< SPI */ +#define HIL_HW_ASSEMBLY_IO_LINK 0x00A0 /*!< IO-LINK interface */ +#define HIL_HW_ASSEMBLY_COMPONET 0x00B0 /*!< CompoNet interface */ + +#define HIL_HW_ASSEMBLY_VALIDATION_END 0xFFEF /*!< End of HW option validation area */ + +#define HIL_HW_ASSEMBLY_I2C_UNKNOWN 0xFFF4 +#define HIL_HW_ASSEMBLY_SSI 0xFFF5 +#define HIL_HW_ASSEMBLY_SYNC 0xFFF6 + +#define HIL_HW_ASSEMBLY_FIELDBUS 0xFFF8 + +#define HIL_HW_ASSEMBLY_TOUCH_SCREEN 0xFFFA +#define HIL_HW_ASSEMBLY_I2C_PIO 0xFFFB +#define HIL_HW_ASSEMBLY_I2C_PIO_NT 0xFFFC +#define HIL_HW_ASSEMBLY_PROPRIETARY 0xFFFD +#define HIL_HW_ASSEMBLY_NOT_CONNECTED 0xFFFE +#define HIL_HW_ASSEMBLY_RESERVED 0xFFFF +/*! \} */ + + +/*! \addtogroup HIL_MANUFACTURER_doc + * + * The manufacturer code defines the manufacturer of the device (hardware). + * + * \note: All numbers above 0x00FF are assigned to OEM customers. Those numbers + * are not listed here. + * + * The defines will be used in the + * following locations: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - Second state loader + * - Device data (secmem, flash device lable, ...) + * - Configuration utilities (sycon.net, taglist editor) + * + * \{ */ +#define HIL_MANUFACTURER_UNDEFINED 0x0000 +#define HIL_MANUFACTURER_HILSCHER_GMBH 0x0001 /*!< Hilscher GmbH */ +#define HIL_MANUFACTURER_HILSCHER_GMBH_MAX 0x00FF /*!< Hilscher GmbH max. value */ +/*! \} */ + + +/*! \addtogroup HIL_HW_DEV_CLASS_doc + * + * The device class is used to create device groups specified by their functionality + * and hardware options (e.g. used netX chip, special functionalities). + * This is necessary because a netX firmware may not support all hardware + * devices or just one specific device. The following device classes are valid + * for when is set to HIL_MANUFACTURER_HILSCHER_GMBH + * + * The defines will be used in the + * following locations: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - Second state loader + * - Device data (secmem, flash device lable, ...) + * - Configuration utilities (sycon.net, taglist editor) + * + * \{ */ +#define HIL_HW_DEV_CLASS_UNDEFINED 0x0000 +#define HIL_HW_DEV_CLASS_UNCLASSIFIABLE 0x0001 +#define HIL_HW_DEV_CLASS_CHIP_NETX_500 0x0002 +#define HIL_HW_DEV_CLASS_CIFX 0x0003 +#define HIL_HW_DEV_CLASS_COMX_100 0x0004 +#define HIL_HW_DEV_CLASS_EVA_BOARD 0x0005 +#define HIL_HW_DEV_CLASS_NETDIMM 0x0006 +#define HIL_HW_DEV_CLASS_CHIP_NETX_100 0x0007 +#define HIL_HW_DEV_CLASS_NETX_HMI 0x0008 +/* #define HIL_HW_DEV_CLASS_RESERVED (abandoned) 0x0009 */ +#define HIL_HW_DEV_CLASS_NETIO_50 0x000A +#define HIL_HW_DEV_CLASS_NETIO_100 0x000B +#define HIL_HW_DEV_CLASS_CHIP_NETX_50 0x000C +#define HIL_HW_DEV_CLASS_GW_NETPAC 0x000D +#define HIL_HW_DEV_CLASS_GW_NETTAP 0x000E +#define HIL_HW_DEV_CLASS_NETSTICK 0x000F +#define HIL_HW_DEV_CLASS_NETANALYZER 0x0010 +#define HIL_HW_DEV_CLASS_NETSWITCH 0x0011 +#define HIL_HW_DEV_CLASS_NETLINK 0x0012 +#define HIL_HW_DEV_CLASS_NETIC_50 0x0013 +#define HIL_HW_DEV_CLASS_NPLC_C100 0x0014 +#define HIL_HW_DEV_CLASS_NPLC_M100 0x0015 +#define HIL_HW_DEV_CLASS_GW_NETTAP_50 0x0016 +#define HIL_HW_DEV_CLASS_NETBRICK 0x0017 +#define HIL_HW_DEV_CLASS_NPLC_T100 0x0018 +#define HIL_HW_DEV_CLASS_NETLINK_PROXY 0x0019 +#define HIL_HW_DEV_CLASS_CHIP_NETX_10 0x001A +#define HIL_HW_DEV_CLASS_NETJACK_10 0x001B +#define HIL_HW_DEV_CLASS_NETJACK_50 0x001C +#define HIL_HW_DEV_CLASS_NETJACK_100 0x001D +#define HIL_HW_DEV_CLASS_NETJACK_500 0x001E +#define HIL_HW_DEV_CLASS_NETLINK_10_USB 0x001F +#define HIL_HW_DEV_CLASS_COMX_10 0x0020 +#define HIL_HW_DEV_CLASS_NETIC_10 0x0021 +#define HIL_HW_DEV_CLASS_COMX_50 0x0022 +#define HIL_HW_DEV_CLASS_NETRAPID_10 0x0023 +#define HIL_HW_DEV_CLASS_NETRAPID_50 0x0024 +#define HIL_HW_DEV_CLASS_NETSCADA_T51 0x0025 +#define HIL_HW_DEV_CLASS_CHIP_NETX_51 0x0026 +#define HIL_HW_DEV_CLASS_NETRAPID_51 0x0027 +#define HIL_HW_DEV_CLASS_GW_EU5C 0x0028 +#define HIL_HW_DEV_CLASS_NETSCADA_T50 0x0029 +#define HIL_HW_DEV_CLASS_NETSMART_50 0x002A +#define HIL_HW_DEV_CLASS_IOLINK_GW_51 0x002B +#define HIL_HW_DEV_CLASS_NETHMI_B500 0x002C +#define HIL_HW_DEV_CLASS_CHIP_NETX_52 0x002D +#define HIL_HW_DEV_CLASS_COMX_51 0x002E +#define HIL_HW_DEV_CLASS_NETJACK_51 0x002F +#define HIL_HW_DEV_CLASS_NETHOST_T100 0x0030 +#define HIL_HW_DEV_CLASS_NETSCOPE_C100 0x0031 +#define HIL_HW_DEV_CLASS_NETRAPID_52 0x0032 +#define HIL_HW_DEV_CLASS_NETSMART_T51 0x0033 +#define HIL_HW_DEV_CLASS_NETSCADA_T52 0x0034 +#define HIL_HW_DEV_CLASS_NETSAFETY_51 0x0035 +#define HIL_HW_DEV_CLASS_NETSAFETY_52 0x0036 +#define HIL_HW_DEV_CLASS_NETPLC_J500 0x0037 +#define HIL_HW_DEV_CLASS_NETIC_52 0x0038 +#define HIL_HW_DEV_CLASS_GW_NETTAP_151 0x0039 +#define HIL_HW_DEV_CLASS_CHIP_NETX_4000_COM 0x003A +/* #define HIL_HW_DEV_CLASS_CIFX_4000 (abandoned) 0x003B */ +#define HIL_HW_DEV_CLASS_CHIP_NETX_90_COM 0x003C +#define HIL_HW_DEV_CLASS_NETRAPID_51_IO 0x003D +#define HIL_HW_DEV_CLASS_GW_NETTAP_151_CCIES 0x003E +#define HIL_HW_DEV_CLASS_CIFX_CCIES 0x003F +#define HIL_HW_DEV_CLASS_COMX_51_CCIES 0x0040 +#define HIL_HW_DEV_CLASS_NIOT_E_NPEX_BP52_IO 0x0041 +#define HIL_HW_DEV_CLASS_NIOT_E_NPEX_BP52_IOL 0x0042 +#define HIL_HW_DEV_CLASS_CHIP_NETX_4000_COM_HIFSDR 0x0043 +#define HIL_HW_DEV_CLASS_CHIP_NETX_4000_COM_SDR 0x0044 +#define HIL_HW_DEV_CLASS_CHIP_NETX_90_COM_HIFSDR 0x0045 +#define HIL_HW_DEV_CLASS_CHIP_NETX_90_APP_FOR_COM_USECASE_A HIL_HW_DEV_CLASS_CHIP_NETX_90_COM +#define HIL_HW_DEV_CLASS_CHIP_NETX_90_APP_FOR_COM_USECASE_C HIL_HW_DEV_CLASS_CHIP_NETX_90_COM_HIFSDR +#define HIL_HW_DEV_CLASS_NETFIELD_COM 0x0046 +#define HIL_HW_DEV_CLASS_NETFIELD_APP_FOR_NETFIELD_COM HIL_HW_DEV_CLASS_NETFIELD_COM +#define HIL_HW_DEV_CLASS_COMX_52 0x0047 +#define HIL_HW_DEV_CLASS_NETFIELD_DEV_IOLM_W 0x0048 +/* 0x0049 device class is worn out */ +/* 0x004A device class is worn out */ +/* 0x004B device class is worn out */ +#define HIL_HW_DEV_CLASS_NETJACK_52 0x004C + +/* NOTE: The device class will be assigned by TD department. */ + +#define HIL_HW_DEV_CLASS_HILSCHER_GMBH_MAX 0x7FFF /*!< Hilscher GmbH max. value */ +#define HIL_HW_DEV_CLASS_OEM_DEVICE 0xFFFE /*!< OEM device */ +/*! \} */ + + +/*! \addtogroup HIL_COMM_CLASS_doc + * + * Communication class definition. + * + * The defines will be used in the + * following locations: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - Second state loader + * - Device data (secmem, flash device lable, ...) + * - Configuration utilities (sycon.net, taglist editor) + * + * \{ */ +#define HIL_COMM_CLASS_UNDEFINED 0x0000 +#define HIL_COMM_CLASS_UNCLASSIFIABLE 0x0001 +#define HIL_COMM_CLASS_MASTER 0x0002 +#define HIL_COMM_CLASS_SLAVE 0x0003 +#define HIL_COMM_CLASS_SCANNER 0x0004 +#define HIL_COMM_CLASS_ADAPTER 0x0005 +#define HIL_COMM_CLASS_MESSAGING 0x0006 +#define HIL_COMM_CLASS_CLIENT 0x0007 +#define HIL_COMM_CLASS_SERVER 0x0008 +#define HIL_COMM_CLASS_IO_CONTROLLER 0x0009 +#define HIL_COMM_CLASS_IO_DEVICE 0x000A +#define HIL_COMM_CLASS_IO_SUPERVISOR 0x000B +#define HIL_COMM_CLASS_GATEWAY 0x000C +#define HIL_COMM_CLASS_MONITOR 0x000D +#define HIL_COMM_CLASS_PRODUCER 0x000E +#define HIL_COMM_CLASS_CONSUMER 0x000F +#define HIL_COMM_CLASS_SWITCH 0x0010 +#define HIL_COMM_CLASS_HUB 0x0011 +#define HIL_COMM_CLASS_COMBI 0x0012 +#define HIL_COMM_CLASS_MANAGING_NODE 0x0013 +#define HIL_COMM_CLASS_CONTROLLED_NODE 0x0014 +#define HIL_COMM_CLASS_PLC 0x0015 +#define HIL_COMM_CLASS_HMI 0x0016 +#define HIL_COMM_CLASS_ITEM_SERVER 0x0017 +#define HIL_COMM_CLASS_SCADA 0x0018 +#define HIL_COMM_CLASS_IO_CONTROLLER_SYSTEMREDUNDANCY 0x0019 +#define HIL_COMM_CLASS_IO_DEVICE_SYSTEMREDUNDANCY 0x001A + +/* NOTE: The comm class will be assigned by TD department. */ + +/*! \} */ + +/*! \addtogroup HIL_PROT_CLASS_doc + * + * Fieldbus protocol or a specific process definition. + * + * The defines will be used in the + * following locations: + * - Fileheader V3 (HIL_FILE_DEVICE_INFO_V1_0_T) + * - Second state loader + * - Device data (secmem, flash device lable, ...) + * - Configuration utilities (sycon.net, taglist editor) + * + * \{ */ +#define HIL_PROT_CLASS_UNDEFINED 0x0000 +#define HIL_PROT_CLASS_3964R 0x0001 +#define HIL_PROT_CLASS_ASINTERFACE 0x0002 +#define HIL_PROT_CLASS_ASCII 0x0003 +#define HIL_PROT_CLASS_CANOPEN 0x0004 +#define HIL_PROT_CLASS_CCLINK 0x0005 +#define HIL_PROT_CLASS_COMPONET 0x0006 +#define HIL_PROT_CLASS_CONTROLNET 0x0007 +#define HIL_PROT_CLASS_DEVICENET 0x0008 +#define HIL_PROT_CLASS_ETHERCAT 0x0009 +#define HIL_PROT_CLASS_ETHERNET_IP 0x000A +#define HIL_PROT_CLASS_FOUNDATION_FB 0x000B +#define HIL_PROT_CLASS_FL_NET 0x000C +#define HIL_PROT_CLASS_INTERBUS 0x000D +#define HIL_PROT_CLASS_IO_LINK 0x000E +#define HIL_PROT_CLASS_LON 0x000F +#define HIL_PROT_CLASS_MODBUS_PLUS 0x0010 +#define HIL_PROT_CLASS_MODBUS_RTU 0x0011 +#define HIL_PROT_CLASS_OPEN_MODBUS_TCP 0x0012 +#define HIL_PROT_CLASS_PROFIBUS_DP 0x0013 +#define HIL_PROT_CLASS_PROFIBUS_MPI 0x0014 +#define HIL_PROT_CLASS_PROFINET_IO 0x0015 +#define HIL_PROT_CLASS_RK512 0x0016 +#define HIL_PROT_CLASS_SERCOS_II 0x0017 +#define HIL_PROT_CLASS_SERCOS_III 0x0018 +#define HIL_PROT_CLASS_TCP_IP_UDP_IP 0x0019 +#define HIL_PROT_CLASS_POWERLINK 0x001A +#define HIL_PROT_CLASS_HART 0x001B +#define HIL_PROT_CLASS_COMBI 0x001C +#define HIL_PROT_CLASS_PROG_GATEWAY 0x001D +#define HIL_PROT_CLASS_PROG_SERIAL 0x001E +#define HIL_PROT_CLASS_PLC_CODESYS 0x001F +#define HIL_PROT_CLASS_PLC_PROCONOS 0x0020 +#define HIL_PROT_CLASS_PLC_IBH_S7 0x0021 +#define HIL_PROT_CLASS_PLC_ISAGRAF 0x0022 +#define HIL_PROT_CLASS_VISU_QVIS 0x0023 +#define HIL_PROT_CLASS_ETHERNET 0x0024 +#define HIL_PROT_CLASS_RFC1006 0x0025 +#define HIL_PROT_CLASS_DF1 0x0026 +#define HIL_PROT_CLASS_VARAN 0x0027 +#define HIL_PROT_CLASS_3S_PLC_HANDLER 0x0028 +#define HIL_PROT_CLASS_ATVISE 0x0029 +#define HIL_PROT_CLASS_MQTT 0x002A +#define HIL_PROT_CLASS_OPCUA 0x002B +#define HIL_PROT_CLASS_CCLINK_IE_BASIC 0x002C +#define HIL_PROT_CLASS_CCLINK_IE_FIELD 0x002D +#define HIL_PROT_CLASS_NETWORK_SERVICES 0x002E +#define HIL_PROT_CLASS_NETPROXY 0x002F +#define HIL_PROT_CLASS_PROTOCOL_DETECT 0x0030 +#define HIL_PROT_CLASS_TSN_CORE 0x0031 +#define HIL_PROT_CLASS_IEEE_802_1_AS 0x0032 + +/* NOTE: The protocol class will be assigned by TD department. */ + +#define HIL_PROT_CLASS_OEM 0xFFF0 +/*! \} */ + + +/*! \addtogroup HIL_CONFORMANCE_CLASS_doc + * + * Conformance class definition for usage with network service protocol class. + * + * The defines will only be used in the combination with + * protocol class HIL_PROT_CLASS_NETWORK_SERVICES. + * The defines are used as individual bits. + * + * \{ */ +#define HIL_CONF_CLASS_FLAG_NDIS_AWARE 0x0001 + +/*! \} */ + + +#endif /* HIL_SHAREDDEFINES_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SystemCmd.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SystemCmd.h new file mode 100644 index 0000000..d7d350d --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_SystemCmd.h @@ -0,0 +1,2655 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_SystemCmd.h $: *//*! + + \file Hil_SystemCmd.h + + Hilscher Packet Command Codes Handled by the System. + +**************************************************************************************/ +#ifndef HIL_SYSTEMCMD_H_ +#define HIL_SYSTEMCMD_H_ + +#include "Hil_Types.h" +#include "Hil_Packet.h" +#include "Hil_DualPortMemory.h" +#include "Hil_FirmwareIdent.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_SYSTEMCMD) +#endif + +#define RCX_PROCESS_QUEUE_NAME "RCX_QUE" + +/* firmware control */ +#define HIL_FIRMWARE_RESET_REQ 0x00001E00 +#define HIL_FIRMWARE_RESET_CNF 0x00001E01 + +/* firmware information */ +#define HIL_LISTS_GET_NUM_ENTRIES_REQ 0x00001E10 +#define HIL_LISTS_GET_NUM_ENTRIES_CNF 0x00001E11 + +/* system error log access */ +#define HIL_SYSTEM_ERRORLOG_REQ 0x00001E12 +#define HIL_SYSTEM_ERRORLOG_CNF 0x00001E13 + +#define HIL_EXCEPTION_INFO_REQ 0x00001E14 +#define HIL_EXCEPTION_INFO_CNF 0x00001E15 + +/* queue identification */ +#define HIL_QUE_IDENTIFY_REQ 0x00001E20 +#define HIL_QUE_IDENTIFY_CNF 0x00001E21 +#define HIL_QUE_IDENTIFY_IDX_REQ 0x00001E22 +#define HIL_QUE_IDENTIFY_IDX_CNF 0x00001E23 + +/* queue load retrieval */ +#define HIL_QUE_GET_LOAD_REQ 0x00001E30 +#define HIL_QUE_GET_LOAD_CNF 0x00001E31 + +/* DPM data access functions */ +#define HIL_SYSTEM_INFORMATION_BLOCK_REQ 0x00001E32 +#define HIL_SYSTEM_INFORMATION_BLOCK_CNF 0x00001E33 +#define HIL_CHANNEL_INFORMATION_BLOCK_REQ 0x00001E34 +#define HIL_CHANNEL_INFORMATION_BLOCK_CNF 0x00001E35 +#define HIL_SYSTEM_CONTROL_BLOCK_REQ 0x00001E36 +#define HIL_SYSTEM_CONTROL_BLOCK_CNF 0x00001E37 +#define HIL_SYSTEM_STATUS_BLOCK_REQ 0x00001E38 +#define HIL_SYSTEM_STATUS_BLOCK_CNF 0x00001E39 +#define HIL_CONTROL_BLOCK_REQ 0x00001E3A +#define HIL_CONTROL_BLOCK_CNF 0x00001E3B +#define HIL_HANDSHAKE_CHANNEL_REQ 0x00001E3C +#define HIL_HANDSHAKE_CHANNEL_CNF 0x00001E3D + +/* task identification and readout of diagnosis data */ +#define HIL_TSK_GET_NAME_REQ 0x00001E3E +#define HIL_TSK_GET_NAME_CNF 0x00001E3F +#define HIL_TSK_IDENTIFY_REQ 0x00001E40 +#define HIL_TSK_IDENTIFY_CNF 0x00001E41 +#define HIL_TSK_IDENTIFY_IDX_REQ 0x00001E42 +#define HIL_TSK_IDENTIFY_IDX_CNF 0x00001E43 +#define HIL_TSK_GET_STATUS_REQ 0x00001E44 +#define HIL_TSK_GET_STATUS_CNF 0x00001E45 +#define HIL_TSK_GET_INFO_FIELD_REQ 0x00001E46 +#define HIL_TSK_GET_INFO_FIELD_CNF 0x00001E47 + +/* task control */ +#define HIL_TSK_START_REQ 0x00001E48 +#define HIL_TSK_START_CNF 0x00001E49 +#define HIL_TSK_STOP_REQ 0x00001E4A +#define HIL_TSK_STOP_CNF 0x00001E4B + +#define HIL_TSK_GET_STATUS_ARRAY_REQ 0x00001E4E +#define HIL_TSK_GET_STATUS_ARRAY_CNF 0x00001E4F + +/* task array identification and structure information readout */ +#define HIL_TSK_GET_INFO_ARRAY_REQ 0x00001E50 +#define HIL_TSK_GET_INFO_ARRAY_CNF 0x00001E51 +#define HIL_TSK_GET_INFO_STRUCT_REQ 0x00001E52 +#define HIL_TSK_GET_INFO_STRUCT_CNF 0x00001E53 +#define HIL_TSK_GET_INFO_STRUCT_IDX_REQ 0x00001E54 +#define HIL_TSK_GET_INFO_STRUCT_IDX_CNF 0x00001E55 +#define HIL_TSK_GET_INFO_FIELD_SIZE_REQ 0x00001E56 +#define HIL_TSK_GET_INFO_FIELD_SIZE_CNF 0x00001E57 +#define HIL_TSK_GET_INFO_FIELD_SIZE_IDX_REQ 0x00001E58 +#define HIL_TSK_GET_INFO_FIELD_SIZE_IDX_CNF 0x00001E59 + +/* read information about memory usage */ +#define HIL_MALLINFO_REQ 0x00001E5A +#define HIL_MALLINFO_CNF 0x00001E5B + +/* file upload/download */ +#define HIL_FILE_DOWNLOAD_REQ 0x00001E62 +#define HIL_FILE_DOWNLOAD_CNF 0x00001E63 +#define HIL_FILE_DOWNLOAD_DATA_REQ 0x00001E64 +#define HIL_FILE_DOWNLOAD_DATA_CNF 0x00001E65 + +#define HIL_FILE_DOWNLOAD_ABORT_REQ 0x00001E66 +#define HIL_FILE_DOWNLOAD_ABORT_CNF 0x00001E67 + +#define HIL_FILE_UPLOAD_REQ 0x00001E60 +#define HIL_FILE_UPLOAD_CNF 0x00001E61 +#define HIL_FILE_UPLOAD_DATA_REQ 0x00001E6E +#define HIL_FILE_UPLOAD_DATA_CNF 0x00001E6F + +#define HIL_FILE_UPLOAD_ABORT_REQ 0x00001E5E +#define HIL_FILE_UPLOAD_ABORT_CNF 0x00001E5F + +#define HIL_FORMAT_REQ 0x00001ED6 +#define HIL_FORMAT_CNF 0x00001ED7 + +/* file information */ +#define HIL_FILE_GET_MD5_REQ 0x00001E68 +#define HIL_FILE_GET_MD5_CNF 0x00001E69 +#define HIL_FILE_GET_HEADER_MD5_REQ 0x00001E72 +#define HIL_FILE_GET_HEADER_MD5_CNF 0x00001E73 + +/* file delete */ +#define HIL_FILE_DELETE_REQ 0x00001E6A +#define HIL_FILE_DELETE_CNF 0x00001E6B + +/* file rename */ +#define HIL_FILE_RENAME_REQ 0x00001E7C +#define HIL_FILE_RENAME_CNF 0x00001E7D + +/* volume information */ +#define HIL_VOLUME_GET_ENTRY_REQ 0x00001E6C +#define HIL_VOLUME_GET_ENTRY_CNF 0x00001E6D + +/* directory list */ +#define HIL_DIR_LIST_REQ 0x00001E70 +#define HIL_DIR_LIST_CNF 0x00001E71 + +/* indexed task access */ +#define HIL_TSK_GET_STATUS_IDX_REQ 0x00001E74 +#define HIL_TSK_GET_STATUS_IDX_CNF 0x00001E75 +#define HIL_TSK_GET_INFO_FIELD_IDX_REQ 0x00001E76 +#define HIL_TSK_GET_INFO_FIELD_IDX_CNF 0x00001E77 + +/* indexed task control */ +#define HIL_TSK_START_IDX_REQ 0x00001E78 +#define HIL_TSK_START_IDX_CNF 0x00001E79 +#define HIL_TSK_STOP_IDX_REQ 0x00001E7A +#define HIL_TSK_STOP_IDX_CNF 0x00001E7B + +/* log queues */ +#define HIL_QUE_LOG_SET_REQ 0x00001EA0 +#define HIL_QUE_LOG_SET_CNF 0x00001EA1 +#define HIL_QUE_LOG_CLR_REQ 0x00001EA2 +#define HIL_QUE_LOG_CLR_CNF 0x00001EA3 + +/* read/write memory */ +#define HIL_PHYSMEM_READ_REQ 0x00001EA8 +#define HIL_PHYSMEM_READ_CNF 0x00001EA9 + +#define HIL_PHYSMEM_WRITE_REQ 0x00001EAA +#define HIL_PHYSMEM_WRITE_CNF 0x00001EAB + +/* firmware info */ +#define HIL_GET_LIB_VERSION_INFO_REQ 0x00001EBA +#define HIL_GET_LIB_VERSION_INFO_CNF 0x00001EBB + +#define HIL_FIRMWARE_IDENTIFY_REQ 0x00001EB6 +#define HIL_FIRMWARE_IDENTIFY_CNF 0x00001EB7 + + +#define HIL_HW_IDENTIFY_REQ 0x00001EB8 +#define HIL_HW_IDENTIFY_CNF 0x00001EB9 + +#define HIL_SECURITY_EEPROM_READ_REQ 0x00001EBC +#define HIL_SECURITY_EEPROM_READ_CNF 0x00001EBD +#define HIL_SECURITY_EEPROM_WRITE_REQ 0x00001EBE +#define HIL_SECURITY_EEPROM_WRITE_CNF 0x00001EBF + +/* module management */ +#define HIL_MODULE_INSTANTIATE_REQ 0x00001EC0 +#define HIL_MODULE_INSTANTIATE_CNF 0x00001EC1 +#define HIL_MODULE_GET_INFO_IDX_REQ 0x00001EC2 +#define HIL_MODULE_GET_INFO_IDX_CNF 0x00001EC3 +#define HIL_CHANNEL_INSTANTIATE_REQ 0x00001EC4 +#define HIL_CHANNEL_INSTANTIATE_CNF 0x00001EC5 + +/* Device Data Provider (DDP) access */ +#define HIL_DDP_SERVICE_GET_REQ 0x00001EEA +#define HIL_DDP_SERVICE_GET_CNF 0x00001EEB +#define HIL_DDP_SERVICE_SET_REQ 0x00001EEC +#define HIL_DDP_SERVICE_SET_CNF 0x00001EED + +#define HIL_SET_MAC_ADDR_REQ 0x00001EEE +#define HIL_SET_MAC_ADDR_CNF 0x00001EEF + +#define HIL_HW_LICENSE_INFO_REQ 0x00001EF4 +#define HIL_HW_LICENSE_INFO_CNF 0x00001EF5 + +#define HIL_HW_HARDWARE_INFO_REQ 0x00001EF6 +#define HIL_HW_HARDWARE_INFO_CNF 0x00001EF7 + +/* DPM info functions */ +#define HIL_DPM_GET_BLOCK_INFO_REQ 0x00001EF8 +#define HIL_DPM_GET_BLOCK_INFO_CNF 0x00001EF9 + +/* Communication flag info functions */ +#define HIL_DPM_GET_COMFLAG_INFO_REQ 0x00001EFA +#define HIL_DPM_GET_COMFLAG_INFO_CNF 0x00001EFB + + +/* Common Status block functions */ +#define HIL_DPM_GET_COMMON_STATE_REQ 0x00001EFC +#define HIL_DPM_GET_COMMON_STATE_CNF 0x00001EFD + +/* Extended status block */ +#define HIL_DPM_GET_EXTENDED_STATE_REQ 0x00001EFE +#define HIL_DPM_GET_EXTENDED_STATE_CNF 0x00001EFF + +/* reserved for further functions (documented at DPM Spec) */ + +#define HIL_ENABLE_PERF_MEASUREMENT_REQ 0x00001ED2 +#define HIL_ENABLE_PERF_MEASUREMENT_CNF 0x00001ED3 + +#define HIL_GET_PERF_COUNTERS_REQ 0x00001ED4 +#define HIL_GET_PERF_COUNTERS_CNF 0x00001ED5 + +/* Time handling requests */ +#define HIL_TIME_COMMAND_REQ 0x00001ED8 +#define HIL_TIME_COMMAND_CNF 0x00001ED9 + + +/* Backup / Restore commands */ +#define HIL_BACKUP_REQ 0x00001F50 +#define HIL_BACKUP_CNF 0x00001F51 +#define HIL_RESTORE_REQ 0x00001F52 +#define HIL_RESTORE_CNF 0x00001F53 +/* do NOT add further commands in the range 0x00001FXX (because of collosion with PNS_IF task) */ + + + +/****************************************************************************** + * Packet: HIL_TIME_COMMAND_REQ/HIL_TIME_COMMAND_CNF + * + */ + +/* Time command codes */ +#define TIME_CMD_GETSTATE 0x00000001 +#define TIME_CMD_GETTIME 0x00000002 +#define TIME_CMD_SETTIME 0x00000003 + +/* Time RTC information */ +#define TIME_INFO_RTC_MSK 0x00000007 +#define TIME_INFO_RTC_TYPE_MSK 0x00000003 +#define TIME_INFO_RTC_RTC_STATE 0x00000004 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TIME_CMD_DATA_Ttag +{ + uint32_t ulTimeCmd; + uint32_t ulData; + uint32_t ulReserved; +} HIL_TIME_CMD_DATA_T; + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TIME_CMD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_TIME_CMD_DATA_T tData; /*!< packet data */ +} HIL_TIME_CMD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TIME_CMD_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_TIME_CMD_DATA_T tData; /*!< packet data */ +} HIL_TIME_CMD_CNF_T; + + +/****************************************************************************** + * Packet: HIL_ENABLE_PERF_MEASUREMENT_REQ/HIL_ENABLE_PERF_MEASUREMENT_CNF + * + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ENABLE_PERF_MEASUREMENT_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_ENABLE_PERF_MEASUREMENT_REQ_T; + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ENABLE_PERF_MEASUREMENT_CNF_DATA_Ttag +{ + uint32_t ulOldState; +} HIL_ENABLE_PERF_MEASUREMENT_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_ENABLE_PERF_MEASUREMENT_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_ENABLE_PERF_MEASUREMENT_CNF_DATA_T tData; +} HIL_ENABLE_PERF_MEASUREMENT_CNF_T; + +/****************************************************************************** + * Packet: HIL_GET_PERF_COUNTERS_REQ/HIL_GET_PERF_COUNTERS_CNF + * + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_PERF_COUNTERS_REQ_DATA_Ttag +{ + uint16_t usStartToken; + uint16_t usTokenCount; +} HIL_GET_PERF_COUNTERS_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_PERF_COUNTERS_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_PERF_COUNTERS_REQ_DATA_T tData; +} HIL_GET_PERF_COUNTERS_REQ_T; + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PERF_COUNTER_DATA_Ttag +{ + uint32_t ulNanosecondsLower; + uint32_t ulNanosecondsUpper; +} HIL_PERF_COUNTER_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_PERF_COUNTERS_CNF_DATA_Ttag +{ + uint16_t usStartToken; + uint16_t usTokenCount; + HIL_PERF_COUNTER_DATA_T tPerfSystemUptime; + /* following entry is a placeholder for a dynamic array whose length is given by ulLen in the packet header */ + HIL_PERF_COUNTER_DATA_T atPerfCounters[1]; +} HIL_GET_PERF_COUNTERS_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_PERF_COUNTERS_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_GET_PERF_COUNTERS_CNF_DATA_T tData; +} HIL_GET_PERF_COUNTERS_CNF_T; + +/****************************************************************************** + * Packet: HIL_SET_MAC_ADDR_REQ/HIL_SET_MAC_ADDR_CNF + * + * This packet reconfigures the MAC address + * If HIL_STORE_MAC_ADDRESS is set, it will also update the Sec EEPROM permanently. + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_MAC_ADDR_REQ_DATA_Ttag +{ + uint32_t ulParam; /*!< Parameter Bit Field */ + uint8_t abMacAddr[6]; /*!< MAC address */ + uint8_t abPad[2]; /*!< Pad bytes, set to zero */ +} HIL_SET_MAC_ADDR_REQ_DATA_T; + +#define HIL_STORE_MAC_ADDRESS 0x00000001 +#define HIL_FORCE_MAC_ADDRESS 0x00000002 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_MAC_ADDR_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_SET_MAC_ADDR_REQ_DATA_T tData; /*!< packet data */ +} HIL_SET_MAC_ADDR_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SET_MAC_ADDR_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ +} HIL_SET_MAC_ADDR_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FIRMWARE_RESET_REQ/HIL_FIRMWARE_RESET_CNF + * + * This packet executes a RESET on the netX + */ + +/* Hilscher reset mode definitions */ +#define HIL_RESET_MODE_CMD_MSK 0x0000000F +#define HIL_RESET_MODE_CMD_SRT 0 + +#define HIL_RESET_MODE_COLDSTART 0 +#define HIL_RESET_MODE_WARMSTART 1 +#define HIL_RESET_MODE_BOOTSTART 2 +#define HIL_RESET_MODE_UPDATESTART 3 +#define HIL_RESET_MODE_CONSOLESTART 4 + +/* Hilscher reset parameter definitions */ +#define HIL_RESET_PARAM_MSK 0x000000F0 +#define HIL_RESET_PARAM_SRT 4 + +#define HIL_RESET_PARAM_CONSOLE_ETH 0x00000000 +#define HIL_RESET_PARAM_CONSOLE_UART 0x00000001 +#define HIL_RESET_PARAM_CONSOLE_USB 0x00000002 +#define HIL_RESET_PARAM_CONSOLE_DPM 0x00000003 /* Reserved / Unused */ +#define HIL_RESET_PARAM_CONSOLE_DEFAULT 0x0000000F + +/* Hilscher additional reset flag definitions */ +#define HIL_RESET_FLAG_MSK 0xFFFFFF00 +#define HIL_RESET_FLAG_SRT 8 + +/* Clear REMANENT flag */ +#define HIL_RESET_FLAG_CLEAR_REMANENT_MSK 0x00000100 +#define HIL_RESET_FLAG_CLEAR_REMANENT_SRT 8 + +/* Install VERIFICATION flag */ +#define HIL_RESET_FLAG_VERIFY_INSTALLATION_MSK 0x00000200 +#define HIL_RESET_FLAG_VERIFY_INSTALLATION_SRT 9 + + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_RESET_REQ_DATA_Ttag +{ + uint32_t ulTimeToReset; /* time to reset in ms */ + uint32_t ulResetMode; /* reset mode param */ +} HIL_FIRMWARE_RESET_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_RESET_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FIRMWARE_RESET_REQ_DATA_T tData; /* packet data */ +} HIL_FIRMWARE_RESET_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_RESET_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FIRMWARE_RESET_CNF_T; + + +/****************************************************************************** + * Packet: HIL_QUE_IDENTIFY_REQ/HIL_QUE_IDENTIFY_CNF + * + * This packet allows identifying a queue by name + */ + + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_REQ_DATA_Ttag +{ + uint8_t szQueName[16]; /* queue name */ + uint32_t ulInst; /* instance of queue */ +} HIL_QUE_IDENTIFY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} HIL_QUE_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_CNF_DATA_Ttag +{ + uint32_t ulQue; /* queue handle */ +} HIL_QUE_IDENTIFY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} HIL_QUE_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_QUE_IDENTIFY_IDX_REQ/HIL_QUE_IDENTIFY_IDX_CNF + * + * This packet allows identifying a queue by index + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_IDX_REQ_DATA_Ttag +{ + uint32_t ulIndex; /* queue table index */ +} HIL_QUE_IDENTIFY_IDX_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_IDX_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_IDENTIFY_IDX_REQ_DATA_T tData; /* packet data */ +} HIL_QUE_IDENTIFY_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_IDX_CNF_DATA_Ttag +{ + uint32_t ulIndex; /* queue table index */ + uint8_t szQueName[16]; /* queue name */ + uint32_t ulInst; /* instance of queue */ + uint32_t ulQue; /* queue handle */ +} HIL_QUE_IDENTIFY_IDX_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_IDENTIFY_IDX_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_IDENTIFY_IDX_CNF_DATA_T tData; /* packet data */ +} HIL_QUE_IDENTIFY_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_IDENTIFY_REQ/HIL_TSK_IDENTIFY_CNF + * + * This packet allows identifying a task by name + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_REQ_DATA_Ttag +{ + uint8_t szTskName[16]; /* task name */ + uint32_t ulInst; /* task instance */ +} HIL_TSK_IDENTIFY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_CNF_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ + uint32_t ulTskIdentifier; /* task identifier */ + uint16_t usTskMajorVersion; /* task major version */ + uint16_t usTskMinorVersion; /* task minor version */ + uint32_t ulNumOfDiagStructs; /* count of task diagnostic structures */ + uint32_t ulPriority; /* task priority */ +} HIL_TSK_IDENTIFY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_NAME_REQ/HIL_TSK_GET_NAME_CNF + * + * This packet allows retrieving a task name from a given handle + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_NAME_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ +} HIL_TSK_GET_NAME_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_NAME_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_NAME_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_NAME_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_NAME_CNF_DATA_Ttag +{ + uint8_t abTskName[16]; /* task name */ + uint32_t ulInstance; /* task instance */ +} HIL_TSK_GET_NAME_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_NAME_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_NAME_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_NAME_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_IDENTIFY_IDX_REQ/HIL_TSK_IDENTIFY_IDX_CNF + * + * This packet allows identifying a task by index + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_IDX_REQ_DATA_Ttag +{ + uint32_t ulIndex; /* task table index */ +} HIL_TSK_IDENTIFY_IDX_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_IDX_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_IDENTIFY_IDX_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_IDENTIFY_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_IDX_CNF_DATA_Ttag +{ + uint32_t ulIndex; /* task table index */ + uint8_t szTskName[16]; /* task name */ + uint32_t ulInstance; /* task instance */ + uint32_t ulTsk; /* task handle */ + uint32_t ulTskIdentifier; /* task identifier */ + uint16_t usTskMajorVersion; /* task major version */ + uint16_t usTskMinorVersion; /* task minor version */ + uint32_t ulNumOfDiagStructs; /* count of task diagnostic structures */ + uint32_t ulPriority; /* task priority */ +} HIL_TSK_IDENTIFY_IDX_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_IDENTIFY_IDX_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_IDENTIFY_IDX_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_IDENTIFY_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_STATUS_IDX_REQ/HIL_TSK_GET_STATUS_IDX_CNF + * Packet: HIL_TSK_GET_STATUS_REQ /HIL_TSK_GET_STATUS_CNF + * + * These packets allow retrieving the task status either by index or handle + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ +} HIL_TSK_GET_STATUS_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_STATUS_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_STATUS_REQ_T; + +typedef HIL_TSK_GET_STATUS_REQ_T HIL_TSK_GET_STATUS_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_CNF_DATA_Ttag +{ + uint32_t ulStatusCode; /* task status code */ +} HIL_TSK_GET_STATUS_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_STATUS_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_STATUS_CNF_T; + +typedef HIL_TSK_GET_STATUS_CNF_T HIL_TSK_GET_STATUS_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_INFO_FIELD_REQ/HIL_TSK_GET_INFO_FIELD_CNF + * + * This packet retrieves the diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ + uint32_t ulInfoNo; /* index of information field */ +} HIL_TSK_GET_INFO_FIELD_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_FIELD_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_FIELD_REQ_T; + +typedef HIL_TSK_GET_INFO_FIELD_REQ_T HIL_TSK_GET_INFO_FIELD_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_CNF_DATA_Ttag +{ + uint8_t abData[1]; /* ATTENTION: This is a placeholder for info field data. + The packet must be allocated in correct size*/ +} HIL_TSK_GET_INFO_FIELD_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_FIELD_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_FIELD_CNF_T; + +typedef HIL_TSK_GET_INFO_FIELD_CNF_T HIL_TSK_GET_INFO_FIELD_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_INFO_FIELD_SIZE_REQ/HIL_TSK_GET_INFO_FIELD_SIZE_CNF + * + * This function retrieves the sizes of the diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ + uint32_t ulInfoNo; /* index of information field */ +} HIL_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_SIZE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_FIELD_SIZE_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_FIELD_SIZE_REQ_T; + +typedef HIL_TSK_GET_INFO_FIELD_SIZE_REQ_T HIL_TSK_GET_INFO_FIELD_SIZE_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_Ttag +{ + uint32_t ulInfoSize; /* info field size in bytes */ +} HIL_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_FIELD_SIZE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_FIELD_SIZE_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_FIELD_SIZE_CNF_T; + +typedef HIL_TSK_GET_INFO_FIELD_SIZE_CNF_T HIL_TSK_GET_INFO_FIELD_SIZE_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_INFO_STRUCT_REQ/HIL_TSK_GET_INFO_STRUCT_CNF + * + * This function retrieves the structural information of the + * diagnostic structures of a given task + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_STRUCT_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ + uint32_t ulInfoNo; /* index of information field */ +} HIL_TSK_GET_INFO_STRUCT_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STRUCT_FIELD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_STRUCT_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_STRUCT_REQ_T; + +typedef HIL_TSK_GET_INFO_FIELD_REQ_T HIL_TSK_GET_INFO_STRUCT_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_STRUCT_CNF_DATA_Ttag +{ + uint8_t abData[1]; /* ATTENTION: This is a placeholder for info field data. + The packet must be allocated in correct size*/ +} HIL_TSK_GET_INFO_STRUCT_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_STRUCT_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_FIELD_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_STRUCT_CNF_T; + +typedef HIL_TSK_GET_INFO_FIELD_CNF_T HIL_TSK_GET_INFO_STRUCT_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_INFO_ARRAY_REQ/HIL_TSK_GET_INFO_ARRAY_CNF + * + * This function retrieves the diagnostic structure count and the task handle + * by reading the task table in an indexed way + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_ARRAY_REQ_DATA_Ttag +{ + uint32_t ulStartIndex; /* start index of requested list */ +} HIL_TSK_GET_INFO_ARRAY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_ARRAY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_ARRAY_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_ARRAY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENTtag +{ + uint32_t ulTsk; /* task handle */ + uint32_t ulNumberOfInfoFields; /* number of info fields */ + /* the field ulInfoNo of the earlier two requests will have the value range of 0 - (ulNumberOfInfoFields-1) */ +} HIL_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENT; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_ARRAY_CNF_DATA_Ttag +{ + uint32_t ulStartIndex; /* start index */ + uint32_t ulNumberOfEntries; /* number of entries (declaring range of start to start+count-1) */ + uint32_t ulCurrentTskCount; /* current number of tasks */ + HIL_TSK_GET_INFO_ARRAY_CNF_DATA_ELEMENT atInfoData[1]; /* ATTENTION: This is a placeholder for task info data. + The packet must be allocated in correct size*/ +} HIL_TSK_GET_INFO_ARRAY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_INFO_ARRAY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_INFO_ARRAY_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_INFO_ARRAY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_START_REQ/HIL_TSK_START_CNF + * + * This packet allows starting a user task + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_START_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ +} HIL_TSK_START_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_START_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_START_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_START_REQ_T; + +typedef HIL_TSK_START_REQ_T HIL_TSK_START_IDX_REQ_T; + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_START_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_TSK_START_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_STOP_REQ/HIL_TSK_STOP_CNF + * + * This packet allows stopping a user task + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_STOP_REQ_DATA_Ttag +{ + uint32_t ulTsk; /* task handle */ +} HIL_TSK_STOP_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_STOP_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_STOP_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_STOP_REQ_T; + +typedef HIL_TSK_STOP_REQ_T HIL_TSK_STOP_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_STOP_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_TSK_STOP_CNF_T; + + +/****************************************************************************** + * Packet: MID_SYS_QUE_LOG_SET_REQ/MID_SYS_QUE_LOG_SET_CNF + * + * This packet sets a logical queue entry + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_SET_REQ_DATA_Ttag +{ + uint32_t ulLogQue; /* logical queue id */ +} HIL_QUE_LOG_SET_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_SET_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_LOG_SET_REQ_DATA_T tData; /* packet data */ +} HIL_QUE_LOG_SET_REQ_T; + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_SET_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_QUE_LOG_SET_CNF_T; + + +/****************************************************************************** + * Packet: MID_SYS_QUE_LOG_CLR_REQ/MID_SYS_QUE_LOG_CLR_CNF + * + * This packet clears a logical queue entry + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_CLR_REQ_DATA_Ttag +{ + uint32_t ulLogQue; /* logical queue id */ +} HIL_QUE_LOG_CLR_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_CLR_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_LOG_CLR_REQ_DATA_T tData; /* packet data */ +} HIL_QUE_LOG_CLR_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_LOG_CLR_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet data */ +} HIL_QUE_LOG_CLR_CNF_T; + + +/****************************************************************************** + * Packet: HIL_QUE_GET_LOAD_REQ/HIL_QUE_GET_LOAD_CNF + * + * This packet allows retrieving the queue load of a given queue + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_GET_LOAD_REQ_DATA_Ttag +{ + uint32_t ulQue[1]; /* ATTENTION: This is a placeholder for number of queues to query. + The packet must be allocated in correct size*/ +} HIL_QUE_GET_LOAD_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_GET_LOAD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_GET_LOAD_REQ_DATA_T tData; /* packet data */ +} HIL_QUE_GET_LOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_GET_LOAD_CNF_DATA_Ttag +{ + uint32_t ulQueLoad[1]; /* ATTENTION: This is a placeholder for queue load entries + The packet must be allocated in correct size*/ +} HIL_QUE_GET_LOAD_CNF_DATA_T; + +#define HIL_QUE_LOAD_INVALID (0xffffffffL) + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_QUE_GET_LOAD_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_QUE_GET_LOAD_CNF_DATA_T tData; /* packet data */ +} HIL_QUE_GET_LOAD_CNF_T; + + +/****************************************************************************** + * Packet: HIL_PHYSMEM_READ_REQ/HIL_PHYSMEM_READ_CNF + * + * This packet allows read accesss to physical memory area + */ + +#define HIL_PHYSMEM_ACCESSTYPE_8BIT 0 +#define HIL_PHYSMEM_ACCESSTYPE_16BIT 1 +#define HIL_PHYSMEM_ACCESSTYPE_32BIT 2 +#define HIL_PHYSMEM_ACCESSTYPE_TASK 3 + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_READ_REQ_DATA_Ttag +{ + uint32_t ulPhysicalAddress; + uint32_t ulAccessType; + uint32_t ulReadLength; + +} HIL_PHYSMEM_READ_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_READ_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PHYSMEM_READ_REQ_DATA_T tData; +} HIL_PHYSMEM_READ_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_READ_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_PHYSMEM_READ_CNF_T; + +/****************************************************************************** + * Packet: HIL_PHYSMEM_WRITE_REQ/HIL_PHYSMEM_WRITE_CNF + * + * This packet allows write accesss to physical memory area + */ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_WRITE_REQ_DATA_Ttag +{ + uint32_t ulPhysicalAddress; + uint32_t ulAccessType; +} HIL_PHYSMEM_WRITE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_WRITE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_PHYSMEM_WRITE_REQ_DATA_T tData; +} HIL_PHYSMEM_WRITE_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_PHYSMEM_WRITE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_PHYSMEM_WRITE_CNF_T; + + +/****************************************************************************** + * Packet: HIL_MODULE_INSTANTIATE_REQ/HIL_MODULE_INSTANTIATE_CNF + * + * This packet allows starting of a firmware module for a given channel + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_INSTANTIATE_REQ_DATA_Ttag +{ + HIL_TASK_UID_T tModuleUuid; /* packet header */ + uint32_t ulInst; /* packet data */ +} HIL_MODULE_INSTANTIATE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_INSTANTIATE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_MODULE_INSTANTIATE_REQ_DATA_T tData; /* packet data */ +} HIL_MODULE_INSTANTIATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_INSTANTIATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_MODULE_INSTANTIATE_CNF_T; + + +/****************************************************************************** + * Packet: HIL_MODULE_CHANNEL_REQ/HIL_MODULE_CHANNEL_CNF + * + * This packet allows starting of a previously downloaded firmware module for a given channel + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_CHANNEL_INSTANTIATE_REQ_DATA_Ttag +{ + uint32_t ulChannelNo; /* channel number */ +} HIL_CHANNEL_INSTANTIATE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_CHANNEL_INSTANTIATE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_CHANNEL_INSTANTIATE_REQ_DATA_T tData; /* packet data */ +} HIL_CHANNEL_INSTANTIATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_CHANNEL_INSTANTIATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_CHANNEL_INSTANTIATE_CNF_T; + + +/****************************************************************************** + * Packet: HIL_MODULE_GET_INFO_IDX_REQ/HIL_MODULE_GET_INFO_IDX_CNF + * + * This packet reads out the current available module information from the + * module table + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_GET_INFO_IDX_REQ_DATA_Ttag +{ + uint32_t ulIdx; /* module table index */ +} HIL_MODULE_GET_INFO_IDX_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_GET_INFO_IDX_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_MODULE_GET_INFO_IDX_REQ_DATA_T tData; /* packet data */ +} HIL_MODULE_GET_INFO_IDX_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_GET_INFO_IDX_CNF_DATA_Ttag +{ + /* index in module table */ + uint32_t ulIdx; + /* module uuid */ + HIL_UUID_T tModuleUuid; + /* init table address */ + uint32_t ulInitTableAddress; + /* code block start address */ + uint32_t ulCodeBlockStart; + /* data block start address */ + uint32_t ulDataBlockStart; + /* bss block start address */ + uint32_t ulBssBlockStart; + /* GOT start address */ + uint32_t ulGOT; + /* PLT start address */ + uint32_t ulPLT; + /* task associated with module */ + uint32_t ulNumTasks; + /* static task table start */ + uint32_t ulStaticTaskTableStart; + /* debug table start */ + uint32_t ulDebugTableStart; + uint32_t ulDebugTableSize; + /* export table start */ + uint32_t ulExportTableStart; + uint32_t ulExportTableEntries; +} HIL_MODULE_GET_INFO_IDX_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MODULE_GET_INFO_IDX_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_MODULE_GET_INFO_IDX_CNF_DATA_T tData; /* packet data */ +} HIL_MODULE_GET_INFO_IDX_CNF_T; + + +/****************************************************************************** + * Packet: HIL_TSK_GET_STATUS_ARRAY_REQ/HIL_TSK_GET_STATUS_ARRAY_CNF + * + * This function reads out the task status' in an indexed way + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_ARRAY_REQ_DATA_Ttag +{ + uint32_t ulStartIndex; /* start index of requested list */ +} HIL_TSK_GET_STATUS_ARRAY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_ARRAY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_STATUS_ARRAY_REQ_DATA_T tData; /* packet data */ +} HIL_TSK_GET_STATUS_ARRAY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_ARRAY_CNF_DATA_Ttag +{ + uint32_t ulStartIndex; /* start index */ + uint32_t ulNumberOfEntries; /* number of entries (declaring range of start to start+count-1) */ + uint32_t ulCurrentTskCount; /* current number of tasks */ + uint32_t aulStatusCodes[1]; /* ATTENTION: This is a placeholder for the status codes + The packet must be allocated in correct size*/ +} HIL_TSK_GET_STATUS_ARRAY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TSK_GET_STATUS_ARRAY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_TSK_GET_STATUS_ARRAY_CNF_DATA_T tData; /* packet data */ +} HIL_TSK_GET_STATUS_ARRAY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_DPM_GET_BLOCK_INFO_REQ/HIL_DPM_GET_BLOCK_INFO_CNF + * + * This function retrieves the DPM Channel Block information + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_BLOCK_INFO_REQ_DATA_Ttag +{ + uint32_t ulAreaIndex; /* area index */ + uint32_t ulSubblockIndex; /* subblock index */ +} HIL_DPM_GET_BLOCK_INFO_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_BLOCK_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_BLOCK_INFO_REQ_DATA_T tData; /* packet data */ +} HIL_DPM_GET_BLOCK_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_BLOCK_INFO_CNF_DATA_Ttag +{ + uint32_t ulAreaIndex; /* area index */ + uint32_t ulSubblockIndex; /* number of subblock to request data of */ + uint32_t ulType; /* Type of subblock */ + uint32_t ulOffset; /* Relative Offset of this Subblock within the Area */ + uint32_t ulSize; /* Size of the Subblock */ + uint16_t usFlags; /* flags of the subblock */ + uint16_t usHandshakeMode; /* Handshake Mode */ + uint16_t usHandshakeBit; /* Bit position in the Handshake register */ + uint16_t usReserved; /* res */ +} HIL_DPM_GET_BLOCK_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_BLOCK_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_BLOCK_INFO_CNF_DATA_T tData; /* packet data */ +} HIL_DPM_GET_BLOCK_INFO_CNF_T; + + +/****************************************************************************** + * Packet: HIL_DPM_GET_COMFLAG_INFO_REQ/HIL_DPM_GET_COMFLAG_INFO_CNF + * + * This packet retrieves the currently set COM Flags + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMFLAG_INFO_REQ_DATA_Ttag +{ + uint32_t ulAreaIndex; /* area index */ +} HIL_DPM_GET_COMFLAG_INFO_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMFLAG_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_COMFLAG_INFO_REQ_DATA_T tData; /* packet data */ +} HIL_DPM_GET_COMFLAG_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMFLAG_INFO_CNF_DATA_Ttag +{ + uint32_t ulAreaIndex; /* area index */ + uint32_t ulNetxComFlag; + uint32_t ulHostComFlag; +} HIL_DPM_GET_COMFLAG_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMFLAG_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_COMFLAG_INFO_CNF_DATA_T tData; /* packet data */ +} HIL_DPM_GET_COMFLAG_INFO_CNF_T; + + +/****************************************************************************** + * Packet: HIL_LISTS_GET_NUM_ENTRIES_REQ/HIL_LISTS_GET_NUM_ENTRIES_CNF + * + * This function retrieves the number of tasks and queues available on + * the system. + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LISTS_GET_NUM_ENTRIES_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_LISTS_GET_NUM_ENTRIES_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LISTS_GET_NUM_ENTRIES_CNF_DATA_Ttag +{ + uint32_t ulNumTasks; /* number of tasks */ + uint32_t ulNumQueues; /* number of queues */ +} HIL_LISTS_GET_NUM_ENTRIES_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LISTS_GET_NUM_ENTRIES_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_LISTS_GET_NUM_ENTRIES_CNF_DATA_T tData; /* packet data */ +} HIL_LISTS_GET_NUM_ENTRIES_CNF_T; + + + +/****************************************************************************** + * Packet: HIL_FIRMWARE_IDENTIFY_REQ/HIL_FIRMWARE_IDENTIFY_CNF + * + * This function identifies the currently running firmware on a given channel + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_IDENTIFY_REQ_DATA_Ttag +{ + uint32_t ulChannelId; /* channel id */ +} HIL_FIRMWARE_IDENTIFY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_IDENTIFY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FIRMWARE_IDENTIFY_REQ_DATA_T tData; /* packet data */ +} HIL_FIRMWARE_IDENTIFY_REQ_T; + +#define HIL_FIRMWARE_IDENTIFY_SYSTEM 0xFFFFFFFF + +/***** confirmation packet *****/ + +/*****************************************************************************/ +/*! Firmware Identification Structure */ +/*****************************************************************************/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_IDENTIFY_CNF_DATA_Ttag +{ + HIL_FW_IDENTIFICATION_T tFirmwareIdentification; /* firmware identification */ +} HIL_FIRMWARE_IDENTIFY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FIRMWARE_IDENTIFY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FIRMWARE_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} HIL_FIRMWARE_IDENTIFY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_HW_IDENTIFY_REQ/HIL_HW_IDENTIFY_CNF + * + * This function retrieves the hardware identification + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_IDENTIFY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_HW_IDENTIFY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_IDENTIFY_CNF_DATA_Ttag +{ + uint32_t ulDeviceNumber; /* device number */ + uint32_t ulSerialNumber; /* serial number */ + uint16_t ausHwOptions[4]; /* hardware options */ + uint16_t usDeviceClass; /* device class */ + uint8_t bHwRevision; /* hardware revision */ + uint8_t bHwCompatibility; /* hardware compatibility */ + uint32_t ulBootType; /* how did the device boot up */ + uint32_t ulChipTyp; /* chip typ */ + uint32_t ulChipStep; /* chip step */ + uint32_t ulRomcodeRevision; /* romcode revision */ +} HIL_HW_IDENTIFY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_IDENTIFY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_HW_IDENTIFY_CNF_DATA_T tData; /* packet data */ +} HIL_HW_IDENTIFY_CNF_T; + + + + + + +/************************************************************************************************** + * file transfer packets + */ + +#define HIL_FILE_XFER_INVALID 0 +#define HIL_FILE_XFER_FILESYSTEM 1 /* transfer is related to the Filesystem installed in the Firmware (i.e. 2nd stage bootloader etc.) */ +#define HIL_FILE_XFER_FILE HIL_FILE_XFER_FILESYSTEM +#define HIL_FILE_XFER_MODULE 2 /* will be directly loaded into ram and relocated to be integrated in the running firmware */ +#define HIL_FILE_XFER_PARALLEL_FLASH 3 /* flasher interface */ +#define HIL_FILE_XFER_SERIAL_FLASH 4 /* flasher interface */ +#define HIL_FILE_XFER_LICENSE_CODE 5 /* license code interface */ + +#define HIL_FILE_CHANNEL_0 (0) +#define HIL_FILE_CHANNEL_1 (1) +#define HIL_FILE_CHANNEL_2 (2) +#define HIL_FILE_CHANNEL_3 (3) +#define HIL_FILE_CHANNEL_4 (4) +#define HIL_FILE_CHANNEL_5 (5) + +#define HIL_FILE_SYSTEM (0xFFFFFFFF) + + +/****************************************************************************** + * Packet: HIL_FILE_UPLOAD_REQ/HIL_FILE_UPLOAD_CNF + * + * This packet starts a file upload + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_REQ_DATA_Ttag +{ + uint32_t ulXferType; + uint32_t ulMaxBlockSize; + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} HIL_FILE_UPLOAD_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_UPLOAD_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_UPLOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_CNF_DATA_Ttag +{ + uint32_t ulMaxBlockSize; /* maximum block size possible */ + uint32_t ulFileLength; /* file size to transfer */ +} HIL_FILE_UPLOAD_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_UPLOAD_CNF_DATA_T tData; /* packet data */ +} HIL_FILE_UPLOAD_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FILE_UPLOAD_DATA_REQ/HIL_FILE_UPLOAD_DATA_CNF + * + * This packet requests the data from a previously successful HIL_FILE_UPLOAD_REQ + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_DATA_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_UPLOAD_DATA_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_DATA_CNF_DATA_Ttag +{ + uint32_t ulBlockNo; /* block number starting from 0 in a download sequence */ + uint32_t ulChksum; /* cumulative CRC-32 checksum */ + /* data block follows here */ +} HIL_FILE_UPLOAD_DATA_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_DATA_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_UPLOAD_DATA_CNF_DATA_T tData; /* packet data */ +} HIL_FILE_UPLOAD_DATA_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FILE_UPLOAD_ABORT_REQ/HIL_FILE_UPLOAD_ABORT_CNF + * + * This packet aborts a currently running file upload + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_ABORT_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_UPLOAD_ABORT_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_UPLOAD_ABORT_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_UPLOAD_ABORT_CNF_T; + + + +/****************************************************************************** + * Packet: HIL_FORMAT_REQ/HIL_FORMAT_CNF_T + * + * Formats the default volume + */ +#define HIL_FORMAT_REQ_DATA_FLAGS_QUICKFORMAT 0x00000000 +#define HIL_FORMAT_REQ_DATA_FLAGS_FULLFORMAT 0x00000001 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FORMAT_REQ_DATA_Ttag +{ + uint32_t ulFlags; + uint32_t ulReserved; + /* Future version may have the volume name starting here as NUL terminated string, + Currently unsupported */ +} HIL_FORMAT_REQ_DATA_T; + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FORMAT_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FORMAT_REQ_DATA_T tData; +} HIL_FORMAT_REQ_T; + + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FORMAT_CNF_DATA_Ttag +{ + /* Valid if format has failed during a full format with an error during + erase / verify (ulSta = TLR_E_HIL_FORMAT_ERASE_FAILED or TLR_E_HIL_FORMAT_VERIFY_FAILED */ + uint32_t ulExtendedErrorInfo; + uint32_t ulErrorOffset; +} HIL_FORMAT_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FORMAT_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FORMAT_CNF_DATA_T tData; +} HIL_FORMAT_CNF_T; + +/****************************************************************************** + * Packet: HIL_FILE_DOWNLOAD_REQ/HIL_FILE_DOWNLOAD_CNF + * + * This packet starts a file download + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_REQ_DATA_Ttag +{ + uint32_t ulXferType; /* transfer type */ + uint32_t ulMaxBlockSize; /* maximum possible download size by requestor */ + uint32_t ulFileLength; /* file size to download */ + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} HIL_FILE_DOWNLOAD_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_DOWNLOAD_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_DOWNLOAD_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_CNF_DATA_Ttag +{ + uint32_t ulMaxBlockSize; /* download block size selected */ +} HIL_FILE_DOWNLOAD_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_DOWNLOAD_CNF_DATA_T tData; /* packet data */ +} HIL_FILE_DOWNLOAD_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FILE_DOWNLOAD_DATA_REQ/HIL_FILE_DOWNLOAD_DATA_CNF + * + * This packet transfers the file data of a previously successful HIL_DOWNLOAD_REQ + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_DATA_REQ_DATA_Ttag +{ + uint32_t ulBlockNo; /* block number */ + uint32_t ulChksum; /* cumulative CRC-32 checksum */ + /* data block follows here */ +} HIL_FILE_DOWNLOAD_DATA_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_DATA_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_DOWNLOAD_DATA_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_DOWNLOAD_DATA_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_DATA_CNF_DATA_Ttag +{ + uint32_t ulExpectedCrc32; /* expected CRC-32 checksum */ +} HIL_FILE_DOWNLOAD_DATA_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_DATA_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_DOWNLOAD_DATA_CNF_DATA_T tData; /* packet data */ +} HIL_FILE_DOWNLOAD_DATA_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FILE_DOWNLOAD_ABORT_REQ/HIL_FILE_DOWNLOAD_ABORT_CNF + * + * This packet aborts a currently running file download + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_ABORT_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_DOWNLOAD_ABORT_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DOWNLOAD_ABORT_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_DOWNLOAD_ABORT_CNF_T; + + +/****************************************************************************** + * Packet: HIL_FILE_GET_MD5_REQ/HIL_FILE_GET_MD5_CNF + * + * This packet retrieves the MD5 sum of a given file + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_GET_MD5_REQ_DATA_Ttag +{ + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} HIL_FILE_GET_MD5_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_GET_MD5_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_GET_MD5_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_GET_MD5_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_GET_MD5_CNF_DATA_Ttag +{ + uint8_t abMD5[16]; /* MD5 checksum */ +} HIL_FILE_GET_MD5_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_GET_MD5_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_GET_MD5_CNF_DATA_T tData; /* packet data */ +} HIL_FILE_GET_MD5_CNF_T; + +/* This packet has the same structure, so we are using a typedef here instead of copy and paste */ +typedef HIL_FILE_GET_MD5_REQ_T HIL_FILE_GET_HEADER_MD5_REQ_T; +typedef HIL_FILE_GET_MD5_CNF_T HIL_FILE_GET_HEADER_MD5_CNF_T; + +/****************************************************************************** + * Packet: HIL_FILE_DELETE_REQ/HIL_FILE_DELETE_CNF + * + * This packet allows deleting a file on the system + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DELETE_REQ_DATA_Ttag +{ + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usFileNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated file name will follow here */ +} HIL_FILE_DELETE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DELETE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_DELETE_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_DELETE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_DELETE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_DELETE_CNF_T; + +/****************************************************************************** + * Packet: HIL_FILE_RENAME_REQ/HIL_FILE_RENAME_CNF + * + * This packet allows renaming a file on the system + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_RENAME_REQ_DATA_Ttag +{ + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usOldNameLength; /* length of NUL-terminated old file name that will follow */ + uint16_t usNewNameLength; /* length of NUL-terminated new file name that will follow */ + /* a NUL-terminated file name will follow here */ +} HIL_FILE_RENAME_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_RENAME_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_FILE_RENAME_REQ_DATA_T tData; /* packet data */ +} HIL_FILE_RENAME_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_FILE_RENAME_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_FILE_RENAME_CNF_T; + +/****************************************************************************** + * Packet: HIL_DIR_LIST_REQ/HIL_DIR_LIST_CNF + * + * This packet retrieves a Directory Listing of a given directory + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DIR_LIST_REQ_DATA_Ttag +{ + uint32_t ulChannelNo; /* 0 = Channel 0, ..., 3 = Channel 3, 0xFFFFFFFF = System, see HIL_FILE_xxxx */ + uint16_t usDirNameLength; /* length of NUL-terminated file name that will follow */ + /* a NUL-terminated dir name will follow here */ +} HIL_DIR_LIST_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DIR_LIST_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_DIR_LIST_REQ_DATA_T tData; +} HIL_DIR_LIST_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DIR_LIST_CNF_DATA_Ttag +{ + uint8_t szName[16]; /* file name */ + uint32_t ulFileSize; /* file size */ + uint8_t bFileType; /* file type */ + uint8_t bReserved; /* reserved */ + uint16_t bReserved2; /* reserved */ +} HIL_DIR_LIST_CNF_DATA_T; + +#define HIL_DIR_LIST_CNF_FILE_TYPE_DIRECTORY 1 +#define HIL_DIR_LIST_CNF_FILE_TYPE_FILE 2 + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DIR_LIST_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DIR_LIST_CNF_DATA_T tData; /* packet data */ +} HIL_DIR_LIST_CNF_T; + +/****************************************************************************** + * Packet: HIL_VOLUME_GET_ENTRY_REQ/HIL_VOLUME_GET_ENTRY_CNF + * + * This packet retrieves the volume information from the system by index + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VOLUME_GET_ENTRY_REQ_DATA_Ttag +{ + uint32_t ulVolumeIndex; /* volume entry table index */ +} HIL_VOLUME_GET_ENTRY_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VOLUME_GET_ENTRY_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_VOLUME_GET_ENTRY_REQ_DATA_T tData; /* packet data */ +} HIL_VOLUME_GET_ENTRY_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VOLUME_GET_ENTRY_CNF_DATA_Ttag +{ + uint32_t ulVolumeCount; /* count of volumes */ + uint8_t szName[16]; /* name of currently requested volume entry */ +} HIL_VOLUME_GET_ENTRY_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_VOLUME_GET_ENTRY_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_VOLUME_GET_ENTRY_CNF_DATA_T tData; /* packet data */ +} HIL_VOLUME_GET_ENTRY_CNF_T; + + +/****************************************************************************** + * Packet: HIL_GET_COMMON_STATE_REQ/HIL_GET_COMMON_STATE_CNF + * + * This packet retrieves the Common State Block of a given Channel in the DPM + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMMON_STS_BLOCK_REQ_DATA_Ttag +{ + uint32_t ulChannelId; +} HIL_READ_COMMON_STS_BLOCK_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMMON_STS_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_COMMON_STS_BLOCK_REQ_DATA_T tData; +} HIL_READ_COMMON_STS_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMMON_STS_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_COMMON_STATUS_BLOCK_T tCommonStatus; +} HIL_READ_COMMON_STS_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMMON_STS_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_COMMON_STS_BLOCK_CNF_DATA_T tData; +} HIL_READ_COMMON_STS_BLOCK_CNF_T; + + +/************************************** + * legacy definitions of HIL_READ_COMMON_STS_BLOCK_REQ_T packet for compatibility reasons + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMMON_STATE_REQ_DATA_Ttag +{ + uint32_t ulChannelIndex; /* channel number */ +} HIL_DPM_GET_COMMON_STATE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMMON_STATE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_COMMON_STATE_REQ_DATA_T tData; /* packet data */ +} HIL_DPM_GET_COMMON_STATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMMON_STATE_CNF_DATA_Ttag +{ + uint8_t abData[64]; /* common status block data */ +} HIL_DPM_GET_COMMON_STATE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_COMMON_STATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_COMMON_STATE_CNF_DATA_T tData; /* packet data */ +} HIL_DPM_GET_COMMON_STATE_CNF_T; + + + +/****************************************************************************** + * Packet: HIL_GET_EXTENDED_STATE_REQ/HIL_GET_EXTENDED_STATE_CNF + * + * This packet retrieves the Extended State Block of a given Channel in the DPM + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_EXTENDED_STATE_REQ_DATA_Ttag +{ + uint32_t ulOffset; /* offset to start the reading from the extended status block */ + uint32_t ulDataLen; /* size of block to be read from extended status block */ + uint32_t ulChannelIndex; /* channel number from which to read the extended status block */ +} HIL_DPM_GET_EXTENDED_STATE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_EXTENDED_STATE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_EXTENDED_STATE_REQ_DATA_T tData; /* packet data */ +} HIL_DPM_GET_EXTENDED_STATE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_EXTENDED_STATE_CNF_DATA_Ttag +{ + uint32_t ulOffset; /* offset to start the reading from the extended status block */ + uint32_t ulDataLen; /* size of block to be read from extended status block */ + uint8_t abData[432]; /* data block */ +} HIL_DPM_GET_EXTENDED_STATE_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DPM_GET_EXTENDED_STATE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_DPM_GET_EXTENDED_STATE_CNF_DATA_T tData; /* packet data */ +} HIL_DPM_GET_EXTENDED_STATE_CNF_T; + + +/****************************************************************************** + * Packet: HIL_SECURITY_EEPROM_READ_REQ/HIL_SECURITY_EEPROM_READ_CNF + * + * This packet allows reading the security eeprom + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_READ_REQ_DATA_Ttag +{ + uint32_t ulZoneId; /* zone id */ +} HIL_SECURITY_EEPROM_READ_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_READ_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_SECURITY_EEPROM_READ_REQ_DATA_T tData; /* packet data */ +} HIL_SECURITY_EEPROM_READ_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_READ_CNF_DATA_Ttag +{ + uint8_t abZoneData[32]; /* zone data */ +} HIL_SECURITY_EEPROM_READ_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_READ_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_SECURITY_EEPROM_READ_CNF_DATA_T tData; /* packet data */ +} HIL_SECURITY_EEPROM_READ_CNF_T; + +#define HIL_SECURITY_EEPROM_ZONE_0 0 +#define HIL_SECURITY_EEPROM_ZONE_1 1 +#define HIL_SECURITY_EEPROM_ZONE_2 2 +#define HIL_SECURITY_EEPROM_ZONE_3 3 + + +/****************************************************************************** + * Packet: HIL_SECURITY_EEPROM_WRITE_REQ/HIL_SECURITY_EEPROM_WRITE_CNF + * + * This packet allows writing of the user zones in the security eeprom + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_WRITE_REQ_DATA_Ttag +{ + uint32_t ulZoneId; /* zone id , see HIL_SECURITY_EEPROM_ZONE_* defines */ + uint8_t abZoneData[32]; /* zone data */ +} HIL_SECURITY_EEPROM_WRITE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_WRITE_REQ_Ttag +{ + /* Packet header */ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_SECURITY_EEPROM_WRITE_REQ_DATA_T tData; /* packet data */ +} HIL_SECURITY_EEPROM_WRITE_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SECURITY_EEPROM_WRITE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_SECURITY_EEPROM_WRITE_CNF_T; + + +/****************************************************************************** + * Packet: HIL_GET_LIB_VERSION_INFO_REQ/HIL_GET_LIB_VERSION_INFO_CNF + * + * This packet allows retrieving the version information of libraries integrated + * into the firmware + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_LIB_VERSION_INFO_REQ_DATA_Ttag +{ + uint32_t ulVersionIndex; /* version table index */ +} HIL_GET_LIB_VERSION_INFO_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_LIB_VERSION_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_GET_LIB_VERSION_INFO_REQ_DATA_T tData; /* packet data */ +} HIL_GET_LIB_VERSION_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LIB_VERSION_Ttag +{ + unsigned short usMajor; + unsigned short usMinor; + unsigned short usBuild; + unsigned short usRevision; +} HIL_LIB_VERSION_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LIB_NAME_Ttag +{ + unsigned char bNameLength; + unsigned char abName[63]; +} HIL_LIB_NAME_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_LIB_DATE_Ttag +{ + unsigned short usYear; + unsigned char bMonth; + unsigned char bDay; +} HIL_LIB_DATE_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_LIB_VERSION_INFO_CNF_DATA_Ttag +{ + HIL_LIB_VERSION_T tLibVersion; /* !< library version */ + HIL_LIB_NAME_T tLibName; /* !< library name */ + HIL_LIB_DATE_T tLibDate; /* !< library date */ + uint32_t ulType; /* type of library */ +} HIL_GET_LIB_VERSION_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_GET_LIB_VERSION_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_GET_LIB_VERSION_INFO_CNF_DATA_T tData; /* packet data */ +} HIL_GET_LIB_VERSION_INFO_CNF_T; + + +/****************************************************************************** + * Packet: HIL_HW_LICENSE_INFO_REQ/HIL_HW_LICENSE_INFO_CNF + * + * This packet allows retrieving the license information from the security memory + */ + +/* request packet */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_LICENSE_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_HW_LICENSE_INFO_REQ_T; + +/* confirmation packet */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_LICENSE_INFO_CNF_DATA_Ttag +{ + uint32_t ulLicenseFlags1; + uint32_t ulLicenseFlags2; + uint16_t usNetxLicenseID; + uint16_t usNetxLicenseFlags; +} HIL_HW_LICENSE_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_LICENSE_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_HW_LICENSE_INFO_CNF_DATA_T tData; +} HIL_HW_LICENSE_INFO_CNF_T; + +/****************************************************************************** + * Packet: HIL_HW_HARDWARE_INFO_REQ/HIL_HW_HARDWARE_INFO_CNF + * + * This packet allows retrieving hardware information + */ + +/* request packet */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_HARDWARE_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_HW_HARDWARE_INFO_REQ_T; + +/* confirmation packet */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_HARDWARE_INFO_CNF_DATA_Ttag +{ + /* device number */ + uint32_t ulDeviceNumber; + /* serial number */ + uint32_t ulSerialNumber; + /* hardware options */ + uint16_t ausHwOptions[4]; + /* manufacturer code */ + uint16_t usManufacturer; + /* production date */ + uint16_t usProductionDate; + /* license info */ + uint32_t ulLicenseFlags1; + uint32_t ulLicenseFlags2; + uint16_t usNetxLicenseID; + uint16_t usNetxLicenseFlags; + /* device class */ + uint16_t usDeviceClass; + /* hardware revision */ + uint8_t bHwRevision; + /* hardware compatibility */ + uint8_t bHwCompatibility; + /* hardware features 1 */ + uint32_t ulHardwareFeatures1; + /* hardware features 2 */ + uint32_t ulHardwareFeatures2; + /* boot option */ + uint8_t bBootOption; + /* reserved */ + uint8_t bReserved[11]; +} HIL_HW_HARDWARE_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_HW_HARDWARE_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_HW_HARDWARE_INFO_CNF_DATA_T tData; +} HIL_HW_HARDWARE_INFO_CNF_T; + +/***************************************************************************** + * HIL_BACKUP_REQ/HIL_BACKUP_CNF +*****************************************************************************/ + +/***************************************************************************** + * This packet initiates a backup of the SYSVOLUME onto the given device +*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BACKUP_REQ_DATA_Ttag +{ + uint8_t szBackupPoint[1]; /*!< NULL terminated string containing the path + to backup to. This is just a placeholder, and the strucure needs to + be extended by the number of characters of the backup point, + e.g. "SDMMC:/backup" */ +} HIL_BACKUP_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BACKUP_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_BACKUP_REQ_DATA_T tData; /* packet data */ +} HIL_BACKUP_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_BACKUP_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_BACKUP_CNF_T; + +/***************************************************************************** + * HIL_RESTORE_REQ/HIL_RESTORE_CNF +*****************************************************************************/ + +/***************************************************************************** + * This packet initiates a restore of the SYSVOLUME from the given device / path +*****************************************************************************/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_RESTORE_REQ_DATA_Ttag +{ + uint8_t szRestorePoint[1]; /*!< NULL terminated string containing the path + to restore from. This is just a placeholder, and the strucure needs to + be extended by the number of characters of the restore point + e.g. "SDMMC:/backup" */ +} HIL_RESTORE_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_RESTORE_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ + HIL_RESTORE_REQ_DATA_T tData; /* packet data */ +} HIL_RESTORE_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_RESTORE_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /* packet header */ +} HIL_RESTORE_CNF_T; + + +/****************************************************************************** + * HIL_SYSTEM_INFORMATION_BLOCK_REQ/HIL_SYSTEM_INFORMATION_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_INFO_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_READ_SYS_INFO_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_INFO_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_SYSTEM_INFO_BLOCK_T tSystemInfo; +} HIL_READ_SYS_INFO_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_INFO_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_SYS_INFO_BLOCK_CNF_DATA_T tData; +} HIL_READ_SYS_INFO_BLOCK_CNF_T; + + +/****************************************************************************** + * HIL_CHANNEL_INFORMATION_BLOCK_REQ/HIL_CHANNEL_INFORMATION_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_CHNL_INFO_BLOCK_REQ_DATA_Ttag +{ + uint32_t ulChannelId; +} HIL_READ_CHNL_INFO_BLOCK_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_CHNL_INFO_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_CHNL_INFO_BLOCK_REQ_DATA_T tData; +} HIL_READ_CHNL_INFO_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_CHNL_INFO_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_CHANNEL_INFO_BLOCK_T tChannelInfo; +} HIL_READ_CHNL_INFO_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_CHNL_INFO_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_CHNL_INFO_BLOCK_CNF_DATA_T tData; +} HIL_READ_CHNL_INFO_BLOCK_CNF_T; + + +/****************************************************************************** + * HIL_SYSTEM_CONTROL_BLOCK_REQ/HIL_SYSTEM_CONTROL_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_CNTRL_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_READ_SYS_CNTRL_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_CNTRL_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_SYSTEM_CONTROL_BLOCK_T tSystemControl; +} HIL_READ_SYS_CNTRL_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_CNTRL_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_SYS_CNTRL_BLOCK_CNF_DATA_T tData; +} HIL_READ_SYS_CNTRL_BLOCK_CNF_T; + +/****************************************************************************** + * HIL_SYSTEM_STATUS_BLOCK_REQ/HIL_SYSTEM_STATUS_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_STATUS_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_READ_SYS_STATUS_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_STATUS_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_SYSTEM_STATUS_BLOCK_T tSystemState; +} HIL_READ_SYS_STATUS_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_SYS_STATUS_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_SYS_STATUS_BLOCK_CNF_DATA_T tData; +} HIL_READ_SYS_STATUS_BLOCK_CNF_T; + + +/****************************************************************************** + * HIL_CONTROL_BLOCK_REQ/HIL_CONTROL_BLOCK_CNF + ******************************************************************************/ + +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMM_CNTRL_BLOCK_REQ_DATA_Ttag +{ + uint32_t ulChannelId; +} HIL_READ_COMM_CNTRL_BLOCK_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMM_CNTRL_BLOCK_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_COMM_CNTRL_BLOCK_REQ_DATA_T tData; +} HIL_READ_COMM_CNTRL_BLOCK_REQ_T; + +/***** confirmation packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMM_CNTRL_BLOCK_CNF_DATA_Ttag +{ + HIL_DPM_CONTROL_BLOCK_T tControl; +} HIL_READ_COMM_CNTRL_BLOCK_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_READ_COMM_CNTRL_BLOCK_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_READ_COMM_CNTRL_BLOCK_CNF_DATA_T tData; +} HIL_READ_COMM_CNTRL_BLOCK_CNF_T; + + + + + +/****************************************************************************** + * HIL_MALLINFO_REQ + ******************************************************************************/ +/***** request packet *****/ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MALLINFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_MALLINFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MALLINFO_CNF_DATA_Ttag +{ + /* values reported by mallinfo() call, see malloc documentation for further description */ + int32_t arena; /* total space allocated from system */ + int32_t ordblks; /* number of non-inuse chunks */ + int32_t hblks; /* number of mmapped regions */ + int32_t hblkhd; /* total space in mmapped regions */ + int32_t uordblks; /* total allocated space */ + int32_t fordblks; /* total non-inuse space */ + int32_t keepcost; /* top-most, releasable (via malloc_trim) space */ + uint32_t ulTotalHeap; /* Total Heap area size in bytes */ +} HIL_MALLINFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_MALLINFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_MALLINFO_CNF_DATA_T tData; +} HIL_MALLINFO_CNF_T; + + +/****************************************************************************** + * Packet: HIL_SYSTEM_ERRORLOG_REQ/HIL_SYSTEM_ERRORLOG_CNF + * + * This request handles multiple operations on the system error buffers + */ + +/***** request packet *****/ + +/* Definition of error request commands */ +#define HIL_SYSTEM_ERRORLOG_CMD_READINDEX (0x1) +#define HIL_SYSTEM_ERRORLOG_CMD_READCOUNT (0x2) +#define HIL_SYSTEM_ERRORLOG_CMD_CLEARBUFFERS (0x4) + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SYSTEM_ERRORLOG_REQ_DATA_Ttag +{ + uint32_t ulCommand; /*!< See command defines above */ + uint32_t ulParameter; /*!< Additional parameters of command */ +} HIL_SYSTEM_ERRORLOG_REQ_DATA_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SYSTEM_ERRORLOG_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_SYSTEM_ERRORLOG_REQ_DATA_T tData; /*!< packet data */ +} HIL_SYSTEM_ERRORLOG_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SYSTEM_ERRORLOG_CNF_DATA_Ttag +{ + uint32_t ulCommand; /*!< Requested command */ + uint32_t ulResult; /*!< Index or returning information of ulCommand */ + /* Here follows one HIL_SYSTEM_ERRORLOG_CNF_DATA_ELEMENT depending on ulCommand of request. + * If available, ulLen in Header is set accordingly + */ +} HIL_SYSTEM_ERRORLOG_CNF_DATA_T; + +/* Description string size (remaining space of the packet) + * 124 bytes = Packet header + ((ulCommand + ulResult) + (ulTimeStamp + ulError)) + szDescription + */ +#define HIL_SYSTEM_ERRORLOG_STRING_LENGTH (HIL_DPM_SYSTEM_MAILBOX_MIN_SIZE - HIL_PACKET_HEADER_SIZE - sizeof(HIL_SYSTEM_ERRORLOG_CNF_DATA_T) - 2*sizeof(uint32_t)) + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SYSTEM_ERRORLOG_CNF_DATA_ELEMENT_Ttag +{ + uint32_t ulTimeStamp; /*!< Seconds since startup */ + uint32_t ulError; /*!< Module specific error value */ + int8_t szDescription[HIL_SYSTEM_ERRORLOG_STRING_LENGTH]; /*!< Description string, rest of available space */ +} HIL_SYSTEM_ERRORLOG_CNF_DATA_ELEMENT_T; + + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_SYSTEM_ERRORLOG_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_SYSTEM_ERRORLOG_CNF_DATA_T tData; /*!< packet data */ +} HIL_SYSTEM_ERRORLOG_CNF_T; + + +/************************************************************************************************** + * device data provider packet API + */ + +/* DDP datatype definitions */ +#define HIL_DDP_SERVICE_DATATYPE_MASK (0xFFFFFFF0) +#define HIL_DDP_SERVICE_DATATYPE_OPTION_MASK (0x0000000F) + +#define HIL_DDP_SERVICE_DATATYPE_BASE_DEVICE_DATA (0x00) + +#define HIL_DDP_SERVICE_DATATYPE_MAC_ADDRESSES_APP (0x10) + +#define HIL_DDP_SERVICE_DATATYPE_MAC_ADDRESSES_COM (0x20) + +#define HIL_DDP_SERVICE_DATATYPE_USB_INFORMATION (0x30) + +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA (0x40) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_0 (0x41) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_1 (0x42) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_2 (0x43) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_3 (0x44) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_4 (0x45) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_5 (0x46) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_6 (0x47) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_7 (0x48) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_8 (0x49) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_9 (0x4A) + +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP (0x50) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP_0 (0x51) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP_1 (0x52) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP_2 (0x53) +#define HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP_3 (0x54) + +#define HIL_DDP_SERVICE_DATATYPE_OEM_OPTIONS (0x60) +#define HIL_DDP_SERVICE_DATATYPE_OEM_SERIALNUMBER (0x61) +#define HIL_DDP_SERVICE_DATATYPE_OEM_ORDERNUMBER (0x62) +#define HIL_DDP_SERVICE_DATATYPE_OEM_HARDWAREREVISION (0x63) +#define HIL_DDP_SERVICE_DATATYPE_OEM_PRODUCTIONDATE (0x64) +#define HIL_DDP_SERVICE_DATATYPE_OEM_VENDORDATA_0 (0x66) /* 80 Bytes payload */ +#define HIL_DDP_SERVICE_DATATYPE_OEM_VENDORDATA_1 (0x67) /* 32 Bytes payload */ + +#define HIL_DDP_SERVICE_DATATYPE_STATE (0x70) + +/* DDP number definitions, compare with values in DeviceProductionData.h */ + +#define HIL_DDP_SERVICE_DEFAULT_NAME_SIZE (16) + +#define HIL_DDP_SERVICE_MAC_APP_NUM (4) +#define HIL_DDP_SERVICE_MAC_COM_NUM (8) + +#define HIL_DDP_SERVICE_FLASH_AREA_NUM (10) +#define HIL_DDP_SERVICE_FLASH_CHIP_NUM (4) + +/* DDP state definitions. */ +#define HIL_DDP_SERVICE_STATE_PASSIVE (0) +#define HIL_DDP_SERVICE_STATE_ACTIVE (1) + +/* DDP service structures */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_BASE_DEVICE_DATA_Ttag +{ + /* Members as defined in HIL_PRODUCT_DATA_BASIC_DEVICE_DATA_T of DeviceProductionData.h */ + uint16_t usManufacturer; + uint16_t usDeviceClass; + uint32_t ulDeviceNumber; + uint32_t ulSerialNumber; + uint8_t bHwCompatibility; + uint8_t bHwRevision; + uint16_t usProductionDate; +} HIL_DDP_SERVICE_BASE_DEVICE_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_MAC_ADDRESS_Ttag +{ + uint8_t abMacAddress[6]; +} HIL_DDP_SERVICE_MAC_ADDRESS_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_USB_INFO_Ttag +{ + uint16_t usUSBVendorID; /*!< USB Device vendor ID (VID) */ + uint16_t usUSBProductID; /*!< USB Device product ID (PID) */ + uint8_t abUSBVendorName[HIL_DDP_SERVICE_DEFAULT_NAME_SIZE]; /*!< USB Product name (Byte array) */ + uint8_t abUSBProductName[HIL_DDP_SERVICE_DEFAULT_NAME_SIZE]; /*!< USB Product name string (Byte array) */ +} HIL_DDP_SERVICE_USB_INFO_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_LIBSTORAGE_AREA_Ttag +{ + /* Members as defined in HIL_PRODUCT_DATA_LIBSTORAGE_AREAS_T of DeviceProductionData.h */ + uint32_t ulContentType; + uint32_t ulAreaStart; + uint32_t ulAreaSize; + uint32_t ulChipNumber; + int8_t szName[HIL_DDP_SERVICE_DEFAULT_NAME_SIZE]; + uint8_t bAccessTyp; +} HIL_DDP_SERVICE_LIBSTORAGE_AREA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_LIBSTORAGE_CHIP_Ttag +{ + /* Members as defined in HIL_PRODUCT_DATA_LIBSTORAGE_CHIPS_T of DeviceProductionData.h */ + uint32_t ulChipNumber; + int8_t szFlashName[HIL_DDP_SERVICE_DEFAULT_NAME_SIZE]; + uint32_t ulBlockSize; + uint32_t ulFlashSize; + uint32_t ulMaxEnduranceCycles; +} HIL_DDP_SERVICE_LIBSTORAGE_CHIP_T; + +/****************************************************************************** + * Packet: HIL_DDP_SERVICE_GET_REQ/HIL_DDP_SERVICE_GET_CNF + * + * Retrieve information about a device using Device Data Provider + */ + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_GET_REQ_DATA_Ttag +{ + uint32_t ulDataType; /*!< DDP_SERVICE_DATATYPE_* definitions */ +} HIL_DDP_SERVICE_GET_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_GET_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_DDP_SERVICE_GET_REQ_DATA_T tData; /*!< packet data */ +} HIL_DDP_SERVICE_GET_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_GET_CNF_DATA_Ttag +{ + uint32_t ulDataType; /*!< DDP_SERVICE_DATATYPE_* definitions */ + union HIL_DDP_SERVICE_GET_DATATYPE_U + { + /* Fixed structures for specific ulDataType */ + HIL_DDP_SERVICE_BASE_DEVICE_DATA_T tBaseDeviceData; /*!< HIL_DDP_SERVICE_DATATYPE_BASE_DEVICE_DATA */ + HIL_DDP_SERVICE_USB_INFO_T tUSBInfo; /*!< HIL_DDP_SERVICE_DATATYPE_USB_INFORMATION */ + HIL_DDP_SERVICE_LIBSTORAGE_AREA_T tFlashArea; /*!< HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_AREA_* */ + HIL_DDP_SERVICE_LIBSTORAGE_CHIP_T tFlashChip; /*!< HIL_DDP_SERVICE_DATATYPE_STORAGE_FLASH_CHIP_* */ + + /* Members for multiple keys (ulDataType) */ + uint32_t ulValue; /*!< Keys with 32bit values, e.g. OEM Option Flags */ + /* The following arrays are defined with maximum values. + Actual valid or used length/sizes dependent on DataType and my be smaller. */ + int8_t szString[80]; /*!< Strings, e.g. OEM Serial Number; maximum 80 bytes (including NULL termination) */ + uint8_t abData[80]; /*!< Binary data, e.g. OEM Vendor Data; maximum 80 bytes */ + HIL_DDP_SERVICE_MAC_ADDRESS_T atMacAddress[13]; /*!< HIL_DDP_SERVICE_DATATYPE_MAC_ADDRESSES_*; maximum 13 addresses (6bytes*13=78) */ + } uDataType; +} HIL_DDP_SERVICE_GET_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_GET_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_DDP_SERVICE_GET_CNF_DATA_T tData; /*!< packet data */ +} HIL_DDP_SERVICE_GET_CNF_T; + + +/****************************************************************************** + * Packet: HIL_DDP_SERVICE_SET_REQ/HIL_DDP_SERVICE_SET_CNF + * + * Set information to Device Data Provider + */ + +/***** request packet *****/ + +/* Set data structure equal to data structure of Get confirmation */ +typedef HIL_DDP_SERVICE_GET_CNF_DATA_T HIL_DDP_SERVICE_SET_REQ_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_SET_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ + HIL_DDP_SERVICE_SET_REQ_DATA_T tData; /*!< packet data */ +} HIL_DDP_SERVICE_SET_REQ_T; + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_DDP_SERVICE_SET_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; /*!< packet header */ +} HIL_DDP_SERVICE_SET_CNF_T; + + +/****************************************************************************** + * Packet: HIL_EXCEPTION_INFO_REQ/HIL_EXCEPTION_INFO_CNF + * + * This packet allows retrieving of the exception context + */ + +#define HIL_EXCEPTION_TYPE_EXCEPTION 1 +#define HIL_EXCEPTION_TYPE_THREAD 2 +#define HIL_EXCEPTION_TYPE_INTERRUPT 3 + +/***** request packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_EXCEPTION_INFO_REQ_Ttag +{ + HIL_PACKET_HEADER_T tHead; +} HIL_EXCEPTION_INFO_REQ_T; + + +/***** confirmation packet *****/ + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_EXCEPTION_INFO_CNF_DATA_Ttag +{ + uint32_t ulType; /* State type: exception, thread, interrupt */ + uint32_t ulVector; /* Vector number */ + + uint32_t aulR[11]; /* General purpose registers (R0..R10) */ + uint32_t ulFP; /* Frame pointer (R11) */ + uint32_t ulIP; /* Intra-procedure call scratch register (R12) */ + uint32_t ulSP; /* Stack pointer (R13) */ + uint32_t ulLR; /* Link register (R14) */ + uint32_t ulPC; /* Program counter (R15) */ + uint32_t ulPSR; /* Program status register (PSR/CPSR) */ + + union + { + /* ARM/Cortex-R */ + struct + { + uint32_t ulDFSR; /* Data fault status register */ + uint32_t ulDFAR; /* Data fault address register */ + } arm; + + /* Cortex-M */ + struct + { + uint32_t ulXLR; /* Exception return LR (Cortex-M) */ + uint32_t ulBASEPRI; /* Base priority level (Cortex-M) */ + } cm; + } u; +} HIL_EXCEPTION_INFO_CNF_DATA_T; + +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_EXCEPTION_INFO_CNF_Ttag +{ + HIL_PACKET_HEADER_T tHead; + HIL_EXCEPTION_INFO_CNF_DATA_T tData; +} HIL_EXCEPTION_INFO_CNF_T; + + + +/* Deprecated defines with wrong spelling, shall not be used anymore */ +#define HIL_DDP_SERVICE_DATATYPE_OEM_VEDORDATA_0 HIL_DDP_SERVICE_DATATYPE_OEM_VENDORDATA_0 +#define HIL_DDP_SERVICE_DATATYPE_OEM_VEDORDATA_1 HIL_DDP_SERVICE_DATATYPE_OEM_VENDORDATA_1 + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_SYSTEMCMD) +#endif + + +#endif /* HIL_SYSTEMCMD_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Taglist.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Taglist.h new file mode 100644 index 0000000..94fa4ec --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Taglist.h @@ -0,0 +1,1881 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Taglist.h $: *//*! + + \file Hil_Taglist.h + + The Hilscher tag list is a data structure which can be added to the binary firmware + file. The data which is stored within this list can be manipulated via a special + tag list editor tool without recompiling the firmware itself. + + The firmware also can access the data of the tag list and use the data to accept + behavior or configurations which is compiled into the firmware binary. + + This file defines all related tag codes and structures. + +**************************************************************************************/ +#ifndef HIL_TAGLIST_H_ +#define HIL_TAGLIST_H_ + +#include +#include "Hil_Compiler.h" + +/************************************************************************************** + Tag type code ranges and segmentation. +**************************************************************************************/ + +/** Tag type code modifier, if set the tag shall be ignored by the firmware */ +#define HIL_TAG_IGNORE_FLAG 0x80000000 + +/** Tag type mask */ +#define HIL_TAG_MASK 0x7FFFFFFF + +/* Tag type ranges */ +#define HIL_TAG_SPECIAL_START 0x00000000 +#define HIL_TAG_SPECIAL_END 0x000007FF + +#define HIL_TAG_GENERAL_START 0x00000800 +#define HIL_TAG_GENERAL_END 0x00000FFF + +#define HIL_TAG_FIRMWARE_START 0x00001000 +#define HIL_TAG_FIRMWARE_END 0x0FFFFFFF + +#define HIL_TAG_FACILITY_START 0x10000000 +#define HIL_TAG_FACILITY_END 0x1FFFFFFF + +#define HIL_TAG_USER_START 0x20000000 +#define HIL_TAG_USER_END 0x2FFFFFFF + +#define HIL_TAG_PROTOCOL_START 0x30000000 +#define HIL_TAG_PROTOCOL_END 0x3FFFFFFF + +#define HIL_TAG_BSL_START 0x40000000 +#define HIL_TAG_BSL_END 0x4FFFFFFF + + + + +/************************************************************************************** + Tag type codes. + NOTE: New tag codes are coordinated by the netX tools department (NXT). +**************************************************************************************/ + +/* Tag types from the special tag code range */ +#define HIL_TAG_END_OF_LIST 0x00000000 + + + +/* Tag types from the general tag code range */ +#define HIL_TAG_MEMSIZE 0x00000800 +#define HIL_TAG_MIN_PERSISTENT_STORAGE_SIZE 0x00000801 +#define HIL_TAG_MIN_OS_VERSION 0x00000802 +#define HIL_TAG_MAX_OS_VERSION 0x00000803 +#define HIL_TAG_MIN_CHIP_REV 0x00000804 +#define HIL_TAG_MAX_CHIP_REV 0x00000805 +#define HIL_TAG_NUM_COMM_CHANNEL 0x00000806 /* deprecated */ + + + +/* Tag types from the firmware tag code range */ +#define HIL_TAG_TASK_GROUP 0x00001000 +#define HIL_TAG_IT_STATIC_TASK_PARAMETER_BLOCK 0x00001001 /* deprecated */ +#define HIL_TAG_IT_STATIC_TASK_ENTRY 0x00001002 /* deprecated */ +#define HIL_TAG_TASK 0x00001003 + +#define HIL_TAG_TIMER 0x00001010 + +#define HIL_TAG_INTERRUPT_GROUP 0x00001020 +#define HIL_TAG_INTERRUPT 0x00001023 + +#define HIL_TAG_UART 0x00001030 + +#define HIL_TAG_LED 0x00001040 +#define HIL_TAG_IOPIN 0x00001041 /* tag structure description is not available */ +#define HIL_TAG_SWAP_LNK_ACT_LED 0x00001042 /* tag structure description is not available */ + +#define HIL_TAG_XC 0x00001050 + +#define HIL_TAG_DPM_COMM_CHANNEL 0x00001060 +#define HIL_TAG_DPM_SETTINGS 0x00001061 +#define HIL_TAG_DPM_BEHAVIOUR 0x00001062 + +#define HIL_TAG_REMANENT_DATA_RESPONSIBLE 0x00001070 + +#define HIL_TAG_DDP_MODE_AFTER_STARTUP 0x00001081 + +#define HIL_TAG_PHY_ENABLE_TIMEOUT 0x00001090 + + +/* Tag types from the Ethernet Interface facility tag code range */ +#define HIL_TAG_PNS_ETHERNET_PARAMS 0x100F0000 + +#define HIL_TAG_EIF_EDD_CONFIG 0x105D0000 +#define HIL_TAG_EIF_EDD_INSTANCE 0x105D0001 +#define HIL_TAG_EIF_NDIS_ENABLE 0x105D0002 + + + +/* Tag types from the netX Diagnostics and Remote Access facility tag code range */ +#define HIL_TAG_DIAG_IF_CTRL_UART 0x10820000 +#define HIL_TAG_DIAG_IF_CTRL_USB 0x10820001 +#define HIL_TAG_DIAG_IF_CTRL_TCP 0x10820002 +#define HIL_TAG_DIAG_TRANSPORT_CTRL_CIFX 0x10820010 +#define HIL_TAG_DIAG_TRANSPORT_CTRL_PACKET 0x10820011 + +/* Tag types for specific usecase */ +#define HIL_TAG_HTTP_PORT_CONFIG 0x10920000 +#define HIL_TAG_HTTPS_PORT_CONFIG 0x10920001 + +#define HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX100_PARAMS 0x10960000 +#define HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX50_PARAMS 0x10960001 + +#define HIL_TAG_NETPLC_IO_HANDLER_ENABLE 0x10a30000 /* tag structure description is not available */ +#define HIL_TAG_NETPLC_IO_HANDLER_DIGITAL 0x10a30001 /* tag structure description is not available */ +#define HIL_TAG_NETPLC_IO_HANDLER_ANALOG 0x10a30002 /* tag structure description is not available */ + + /* 0x10e00000 Tag id is worn out */ +#define HIL_TAG_NF_GEN_DIAG_RESOURCES 0x10e00001 +#define HIL_TAG_NF_PROFI_ENERGY_MODES 0x10e00002 +#define HIL_TAG_NF_PN_IOL_PROFILE_PADDING 0x10e00003 +#define HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM 0x10e00004 +#define HIL_TAG_NF_SWAP_COM_LEDS 0x10e00005 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS 0x10e00006 + +#define HIL_TAG_LWIP_PORTS_FOR_IP_ZERO 0x10e90000 +#define HIL_TAG_LWIP_NETIDENT_BEHAVIOUR 0x10e90001 +#define HIL_TAG_LWIP_QUANTITY_STRUCTURE 0x10e90002 + +/* Tag types from the user defined tag code range */ + + + +/* Tag types from the protocol tag code range */ +/* TagID is 0x3ppppnn where pppp is the protocol class and nnn is the identifier of the specific tag */ +#define HIL_TAG_CO_DEVICEID 0x30004000 + +#define HIL_TAG_CCL_DEVICEID 0x30005000 + +#define HIL_TAG_COMPONET_DEVICEID 0x30006000 /* tag structure description is not available */ + +#define HIL_TAG_DEVICENET_DEVICEID 0x30008000 /* tag structure description is not available */ +#define HIL_TAG_DEVICENET_CAN_SAMPLING 0x30008001 /* tag structure description is not available */ + +#define HIL_TAG_ECS_DEVICEID 0x30009000 /* tag structure description is not available */ +#define HIL_TAG_ECS_ENABLE_BOOTSTRAP 0x30009001 /* tag structure description is not available */ +#define HIL_TAG_ECS_SELECT_SOE_COE 0x30009002 /* tag structure description is not available */ +#define HIL_TAG_ECS_CONFIG_EOE 0x30009003 /* tag structure description is not available */ +#define HIL_TAG_ECS_MBX_SIZE 0x30009004 /* tag structure description is not available */ +#define HIL_TAG_ECM_ENI_BUS_STATE 0x30009005 + +#define HIL_TAG_EIP_DEVICEID 0x3000A000 +#define HIL_TAG_EIP_EDD_CONFIGURATION 0x3000A001 /* Tag is obsolete */ +#define HIL_TAG_EIP_DLR_PROTOCOL 0x3000A002 +#define HIL_TAG_EIP_EIS_CONFIG 0x3000A003 /* Tag ID shall only be internal, not exposed through tag list editor */ +#define HIL_TAG_EIP_EIS_RESOURCES 0x3000A004 + +#define HIL_TAG_DP_DEVICEID 0x30013000 /* tag structure description is not available */ + +#define HIL_TAG_PN_DEVICEID 0x30015000 +#define HIL_TAG_PROFINET_FEATURES 0x30015001 +#define HIL_TAG_PROFINET_FEATURES_V2 0x30015002 +#define HIL_TAG_PROFINET_SYSTEM_REDUNDANCY_FEATURES 0x30015003 +#define HIL_TAG_PROFINET_CONTROLLER_QUANTITIES 0x30015004 + +#define HIL_TAG_S3S_DEVICEID 0x30018000 /* tag structure description is not available */ + +#define HIL_TAG_TCP_PORT_NUMBERS 0x30019000 + +#define HIL_TAG_PLS_DEVICEID 0x3001A000 /* tag structure description is not available */ + + + +/* Tag types from the 2nd stage loader tag code range */ +#define HIL_TAG_BSL_SDRAM_PARAMS 0x40000000 /* tag structure description is not available */ +#define HIL_TAG_BSL_HIF_PARAMS 0x40000001 /* tag structure description is not available */ +#define HIL_TAG_BSL_SDMMC_PARAMS 0x40000002 /* tag structure description is not available */ +#define HIL_TAG_BSL_UART_PARAMS 0x40000003 /* tag structure description is not available */ +#define HIL_TAG_BSL_USB_PARAMS 0x40000004 /* tag structure description is not available */ +#define HIL_TAG_BSL_MEDIUM_PARAMS 0x40000005 /* tag structure description is not available */ +#define HIL_TAG_BSL_EXTSRAM_PARAMS 0x40000006 /* tag structure description is not available */ +#define HIL_TAG_BSL_HWDATA_PARAMS 0x40000007 /* tag structure description is not available */ +#define HIL_TAG_BSL_FSU_PARAMS 0x40000008 /* tag structure description is not available */ +#define HIL_TAG_BSL_MMIO_NETX50_PARAMS 0x40000009 /* tag structure description is not available */ +#define HIL_TAG_BSL_MMIO_NETX10_PARAMS 0x4000000A /* tag structure description is not available */ +#define HIL_TAG_BSL_HIF_NETX10_PARAMS 0x4000000B /* tag structure description is not available */ +#define HIL_TAG_BSL_USB_DESCR_PARAMS 0x4000000C /* tag structure description is not available */ +#define HIL_TAG_BSL_DISK_POS_PARAMS 0x4000000D /* tag structure description is not available */ +#define HIL_TAG_BSL_BACKUP_POS_PARAMS 0x4000000E /* tag structure description is not available */ +#define HIL_TAG_BSL_MMIO_NETX51_52_PARAMS 0x4000000F /* tag structure description is not available */ +#define HIL_TAG_BSL_HIF_NETX51_52_PARAMS 0x40000010 /* tag structure description is not available */ +#define HIL_TAG_BSL_SERFLASH_PARAMS 0x40000011 /* tag structure description is not available */ + + +/************************************************************************************** + General tag list definitions +**************************************************************************************/ + +/** Macro for forcing an instance of a tag list or single tag into a separate + * ".taglist" section (needed for NXFs) */ +#define __SEC_TAGLIST__ __attribute__ ((section (".taglist"))) + +#define HIL_TAGLIST_START_TOKEN "TagList>" +#define HIL_TAGLIST_END_TOKEN " [Header] - HIL_TAGLIST_HEADER_T <- not present in nxf files (this structure) + * \----> [Tag] - HIL_TAG_* + * [Tag] - HIL_TAG_* + * ... - ... + * [Tag] - HIL_TAG_END_OF_LIST_T <- Always required + * [Footer] - HIL_TAGLIST_FOOTER_T <- Not present in nxf files + */ +typedef struct +{ + /*! Start token of the taglist data area. + * This field must contain the token sting defined by HIL_TAGLIST_START_TOKEN. */ + uint8_t abStartToken[8]; + + /*! Size of the taglist data area. + * \note This includes the Header and Footer and possible padding/ spare space */ + uint16_t usTagListSize; + + /*! Size of the filled taglist data. + * \note This is the size of all tags in the taglist without header,footer and spare space*/ + uint16_t usContentSize; +} HIL_TAGLIST_HEADER_T; + +/** Taglist footer. + * Taglist footer for use with netX90/netX4000 based firmwares. + */ +typedef struct +{ + /*! Reserved for future usage */ + uint32_t ulReserved; + + /*! End token of the taglist data area. + * This field must contain the token string defined by HIL_TAGLIST_END_TOKEN. */ + uint8_t abEndToken[8]; +} HIL_TAGLIST_FOOTER_T; + +/** Tag header with type code and length of following tag data */ +typedef struct __HIL_ALIGNED_DWORD__ +{ + uint32_t ulTagType; + uint32_t ulTagDataLength; +} HIL_TAG_HEADER_T; + +/** Identifier string for named resources */ +typedef struct +{ + char abName[16]; +} HIL_TAG_IDENTIFIER_T; + + + +/************************************************************************************** + End of tag list tag definitions. + Tag codes: HIL_TAG_END_OF_LIST +**************************************************************************************/ +typedef struct +{ + HIL_TAG_HEADER_T tHeader; +} HIL_TAG_END_OF_LIST_T; + + + +/************************************************************************************** + UINT32 tag definitions. + Tag codes: HIL_TAG_MEMSIZE, HIL_TAG_MIN_PERSISTENT_STORAGE_SIZE, + HIL_TAG_MIN_CHIP_REV, HIL_TAG_MAX_CHIP_REV +**************************************************************************************/ +typedef struct +{ + uint32_t ulValue; +} HIL_TAG_UINT32_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_UINT32_DATA_T tData; +} HIL_TAG_UINT32_T; + + + +/************************************************************************************** + Version tag definitions. + Tag codes: HIL_TAG_MIN_OS_VERSION, HIL_TAG_MAX_OS_VERSION +**************************************************************************************/ +typedef struct +{ + uint16_t usMajor; + uint16_t usMinor; + uint16_t usBuild; + uint16_t usRevision; +} HIL_TAG_VERSION_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_VERSION_DATA_T tData; +} HIL_TAG_VERSION_T; + + + +/************************************************************************************** + Tag: HIL_TAG_LED + Name: LED + Desc: This tag is used to modify physical LED connection settings in the firmware. + + Help: See Tag list editor + +**************************************************************************************/ +/* resource codes for LED tag */ +#define HIL_TAG_LED_RESOURCE_TYPE_GPIO 1 +#define HIL_TAG_LED_RESOURCE_TYPE_PIO 2 +#define HIL_TAG_LED_RESOURCE_TYPE_HIFPIO 3 + +/* polarity codes for LED tag */ +#define HIL_TAG_LED_POLARITY_NORMAL 0 +#define HIL_TAG_LED_POLARITY_INVERTED 1 + +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX LED object identifier, read-only */ + uint32_t ulUsesResourceType; /*!< RX_PERIPHERAL_TYPE_PIO or RX_PERIPHERAL_TYPE_GPIO (see rX_Config.h) */ + uint32_t ulPinNumber; /*!< PIO or GPIO index number */ + uint32_t ulPolarity; /*!< control code for GPIO polarity (see rX_Config.h) */ +} HIL_TAG_LED_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_LED_DATA_T tData; +} HIL_TAG_LED_T; + + + +/************************************************************************************** + Tag: HIL_TAG_TASK_GROUP + Name: Task Group + Desc: Used to modify the priority of an group of task with the same group + reference number. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + char szTaskListName[64]; /*!< group name, read-only */ + uint32_t ulBasePriority; /*!< base priority for the tasks in the group */ + uint32_t ulBaseToken; /*!< base token for the tasks in the group */ + uint32_t ulRange; /*!< number of tasks in the group, read-only */ + uint32_t ulTaskGroupRef; /*!< group reference number (common to all tasks in the group), read-only */ +} HIL_TAG_TASK_GROUP_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_TASK_GROUP_DATA_T tData; +} HIL_TAG_TASK_GROUP_T; + + + +/************************************************************************************** + Tag: HIL_TAG_TASK + Name: Task + Desc: Used to modify an individual task priority. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX task object identifier, read-only */ + uint32_t ulPriority; /*!< task priority offset */ + uint32_t ulToken; /*!< task token offset */ +} HIL_TAG_TASK_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_TASK_DATA_T tData; +} HIL_TAG_TASK_T; + + + +/************************************************************************************** + Tag: HIL_TAG_INTERRUPT_GROUP + Name: Interrupt Group + Desc: Used to modify the priority of an group of interrupts with the same + group reference number. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + char szInterruptListName[64]; /*!< group name, read-only */ + uint32_t ulBaseIntPriority; /*!< base interrupt priority for the interrupts in the group */ + uint32_t ulRangeInt; /*!< number of interrupts in the group, read-only */ + uint32_t ulBaseTaskPriority; /*!< base task priority if one of the handlers is configured to run in task mode */ + uint32_t ulBaseTaskToken; /*!< base task token if one of the handlers is configured to run in task mode */ + uint32_t ulRangeTask; /*!< number of interrupts in the group that execute in task mode, read-only */ + uint32_t ulInterruptGroupRef; /*!< group reference number (common to all interrupts in the group), read-only */ +} HIL_TAG_INTERRUPT_GROUP_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_INTERRUPT_GROUP_DATA_T tData; +} HIL_TAG_INTERRUPT_GROUP_T; + + + +/************************************************************************************** + Tag: HIL_TAG_INTERRUPT + Name: Interrupt + Desc: Used to modify an individual interrupt priority. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX interrupt object identifier, read-only */ + uint32_t ulInterruptPriority; /*!< interrupt priority offset */ + uint32_t ulTaskPriority; /*!< interrupt handler task priority offset */ + uint32_t ulTaskToken; /*!< interrupt handler task token offset */ +} HIL_TAG_INTERRUPT_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_INTERRUPT_DATA_T tData; +} HIL_TAG_INTERRUPT_T; + + + +/************************************************************************************** + Tag: HIL_TAG_TIMER + Name: Hardware Timer + Desc: Used to change a timer number. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX timer object identifier, read-only */ + uint32_t ulTimNum; /*!< netX hardware timer number */ +} HIL_TAG_TIMER_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_TIMER_DATA_T tData; +} HIL_TAG_TIMER_T; + + + +/************************************************************************************** + Tag: HIL_TAG_UART + Name: UART + Desc: Used to set UART configuration settings. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX UART object identifier, read-only */ + uint32_t ulUrtNumber; /*!< netX UART number (see rX_Config.h) */ + uint32_t ulBaudRate; /*!< baud rate control code (see rX_Config.h) */ + uint32_t ulParity; /*!< parity control code (see rX_Config.h) */ + uint32_t ulStopBits; /*!< stop bits control code (see rX_Config.h) */ + uint32_t ulDataBits; /*!< data bits control code (see rX_Config.h) */ + uint32_t ulRxFifoLevel; /*!< "rx ready" trigger level for Rx FIFO (set to 0 to force immediate notification, set to 1..16 to enable FIFO) */ + uint32_t ulTxFifoLevel; /*!< "tx empty" trigger level for Tx FIFO (set to 0 to force immediate send, set to 1..16 to enable FIFO */ + uint32_t ulRtsMode; /*!< control code for RTS signal behavior (see rX_Config.h) */ + uint32_t ulRtsPolarity; /*!< control code for RTS signal polarity (see rX_Config.h) */ + uint32_t ulRtsForerun; /*!< RTS signal forerun with respect to TxD (in bits or in UART clock ticks depending on ulRtsMode) */ + uint32_t ulRtsTrail; /*!< RTS signal trail with respect to TxD (in bits or in UART clock ticks depending on ulRtsMode) */ + uint32_t ulCtsMode; /*!< control code for CTS signal behavior (see rX_Config.h) */ + uint32_t ulCtsPolarity; /*!< control code for CTS signal polarity (see rX_Config.h) */ +} HIL_TAG_UART_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_UART_DATA_T tData; +} HIL_TAG_UART_T; + + + +/************************************************************************************** + Tag: HIL_TAG_XC + Name: xC Unit + Desc: Modify the XC unit which should be used + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_IDENTIFIER_T tIdentifier; /*!< rcX xC object identifier, read-only */ + uint32_t ulXcId; /*!< netX xC unit number */ +} HIL_TAG_XC_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_XC_DATA_T tData; +} HIL_TAG_XC_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DPM_COMM_CHANNEL + Name: DPM Communication Channels + Desc: Used to modify the RX_HIF_CHANNEL_Ts and the RX_HIF_CHANNEL_BLOCK_Ts describing + communication channels. + + Help: See Tag list editor + +**************************************************************************************/ +/** Maximum number of communication channels for DPM communication channels tag */ +#define DPM_MAX_COMM_CHANNELS 4 + +typedef struct +{ + uint32_t ulNumCommChannels; /*!< number of communication channels to be instantiated (1 .. DPM_MAX_COMM_CHANNELS) */ + struct + { /* total communication channel size is (0x1000 + ulInDataSize + ulOutDataSize) */ + uint32_t ulInDataSize; /*!< total size of the normal priority input data area (area 0) in bytes */ + uint32_t ulOutDataSize; /*!< total size of the normal priority output data area (area 0) in bytes */ + } atCommChannelSizes[DPM_MAX_COMM_CHANNELS]; +} HIL_TAG_DPM_COMM_CHANNEL_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DPM_COMM_CHANNEL_DATA_T tData; +} HIL_TAG_DPM_COMM_CHANNEL_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DPM_SETTINGS + Name: DPM Settings + Desc: Modify the RX_HIF_SET_T describing DPM location and access. The values + replaces the statically defined values at system startup time. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulDpmMode; /*!< DPM mode, 2 (8-bit) / 3 (16-bit) / 5 (PCI), default: 5) */ + uint32_t ulDpmSize; /*!< DPM size in bytes, default: 16384 for comX, 32768 for other targets) */ + uint32_t ulDpmBaseAddress; /*!< DPM base address (in INTRAM), default: 0x00018000) */ +} HIL_TAG_DPM_SETTINGS_DATA_T; + + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DPM_SETTINGS_DATA_T tData; +} HIL_TAG_DPM_SETTINGS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DIAG_IF_CTRL_UART + Name: UART Diagnostics Interface + Desc: UART interface of netX Diagnostics and Remote Access component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bEnableFlag; /*!< TRUE: activate this interface, FALSE: do not use this interface */ + uint8_t bIfNumber; /*!< netX UART number to use */ + uint8_t abReserved[2]; +} HIL_TAG_DIAG_IF_CTRL_UART_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DIAG_IF_CTRL_UART_DATA_T tData; +} HIL_TAG_DIAG_IF_CTRL_UART_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DIAG_IF_CTRL_USB + Name: USB Diagnostics Interface + Desc: USB interface of netX Diagnostics and Remote Access component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bEnableFlag; /*!< TRUE: activate this interface, FALSE: do not use this interface */ + uint8_t bIfNumber; /*!< netX USB interface number to use (currently, 0 is the only valid value) */ + uint8_t abReserved[2]; +} HIL_TAG_DIAG_IF_CTRL_USB_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DIAG_IF_CTRL_USB_DATA_T tData; +} HIL_TAG_DIAG_IF_CTRL_USB_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DIAG_IF_CTRL_TCP + Name: TCP Diagnostics Interface + Desc: TCP interface of netX Diagnostics and Remote Access component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bEnableFlag; /*!< TRUE: activate this interface, FALSE: do not use this interface */ + uint8_t bReserved; + uint16_t usPortNumber; /*!< TCP port number, typically HIL_TRANSPORT_IP_PORT (50111, see HilTransport.h) */ +} HIL_TAG_DIAG_IF_CTRL_TCP_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DIAG_IF_CTRL_TCP_DATA_T tData; +} HIL_TAG_DIAG_IF_CTRL_TCP_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DIAG_TRANSPORT_CTRL_CIFX + Name: Remote Access via cifX API + Desc: cifX transport interface of netX Diagnostics and Remote Access component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bEnableFlag; /*!< TRUE: activate support for this transport type, FALSE: do not use this transport type */ + uint8_t abReserved[3]; +} HIL_TAG_DIAG_TRANSPORT_CTRL_CIFX_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DIAG_TRANSPORT_CTRL_CIFX_DATA_T tData; +} HIL_TAG_DIAG_TRANSPORT_CTRL_CIFX_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DIAG_TRANSPORT_CTRL_PACKET + Name: Remote Access via rcX Packets + Desc: Packet transport interface of netX Diagnostics and Remote Access component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bEnableFlag; /*!< TRUE: activate support for this transport type, FALSE: do not use this transport type */ + uint8_t abReserved[3]; +} HIL_TAG_DIAG_TRANSPORT_CTRL_PACKET_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DIAG_TRANSPORT_CTRL_PACKET_DATA_T tData; +} HIL_TAG_DIAG_TRANSPORT_CTRL_PACKET_T; + + + +/************************************************************************************** + Tag: HIL_TAG_HTTP_PORT_CONFIG + Name: HTTP port configuration + Desc: Configures the HTTP port of the build in web server component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** 0: Do not start http web server, other value: port to use by http */ + uint16_t usPort; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[2]; + +} HIL_TAG_HTTP_PORT_CONFIG_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_HTTP_PORT_CONFIG_DATA_T tData; +} HIL_TAG_HTTP_PORT_CONFIG_T; + + + +/************************************************************************************** + Tag: HIL_TAG_HTTPS_PORT_CONFIG + Name: HTTPS port configuration + Desc: Configures the HTTPS port of the build in web server component. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** 0: Do not start https web server, other value: port to use by https */ + uint16_t usPort; + + /** Certification handling on startup: + * 0 - Certificate and private key must be present in CertDB, otherwise https won't start. + * 1 - Self signed certificate and private key will be generated if any configuration issue in CertDB is detected. + * 2 - Self signed certificate and private key will be generated if no configuration within CertDB is present. */ + uint8_t bCertificateHandling; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved; + +} HIL_TAG_HTTPS_PORT_CONFIG_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_HTTPS_PORT_CONFIG_DATA_T tData; +} HIL_TAG_HTTPS_PORT_CONFIG_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DPM_BEHAVIOUR + Name: DPM Behaviour + Desc: AP Task DPM Behaviour settings + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bComStateLegacyMode; /*!< 1: Enable legacy mode for "ulCommunicationState */ + uint8_t bReserved1; + uint8_t bReserved2; + uint8_t bReserved3; +} HIL_TAG_DPM_BEHAVIOUR_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DPM_BEHAVIOUR_DATA_T tData; +} HIL_TAG_DPM_BEHAVIOUR_T; + + + +/************************************************************************************** + Tag: HIL_TAG_REMANENT_DATA_RESPONSIBLE + Name: Remanent Data Responsibility + Desc: With this tag, you can adjust whether loading and storing of remanent data is entirely + performed by the communication firmware or by the host application. + + Help: + When remanent data handling is configured to be done in the host domain, the host + application has to provide remanent data for each relevant component of the firmware + via packet HIL_SET_REMANENT_DATA_REQ during initialization. + Subsequently, it must handle the packets HIL_STORE_REMANENT_DATA_IND with which modified + remanent data for each component is submitted in order for the host to store it onto a + non-volatile storage device during runtime. + + Depending on the specific stack implementation, there still may be the need for the + host to store certain non-volatile data even if the stack is responsible for remanent + data storage. Please refer to the manual of your particular Firmware for further + information. +**************************************************************************************/ +typedef struct +{ + /** Responsibility switch. + * - 0: Communication firmware stores remanent data + * - 1: Host stores remanent data */ + uint8_t bHandledByHost; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[3]; + +} HIL_TAG_REMANENT_DATA_RESPONSIBLE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_REMANENT_DATA_RESPONSIBLE_DATA_T tData; +} HIL_TAG_REMANENT_DATA_RESPONSIBLE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_LWIP_NETIDENT_BEHAVIOUR + Name: LWIP netident behaviour + Desc: With this tag, you can adjust whether the firmware shall activate the + Hilscher netident protocol, which is build-in in the IP stack, or not. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** netident behavior. + * - 0: netident is disabled + * - 1: netident is enabled */ + uint8_t bNetidentEnable; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[3]; + +} HIL_TAG_LWIP_NETIDENT_BEHAVIOUR_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_LWIP_NETIDENT_BEHAVIOUR_DATA_T tData; +} HIL_TAG_LWIP_NETIDENT_BEHAVIOUR_T; + + + +/************************************************************************************** + Tag: HIL_TAG_LWIP_QUANTITY_STRUCTURE + Name: Socket API Quantity Structure + Desc: adjust the resources allocated and provided by the build-in IP stack + + Help: + With this tag, you can adjust the resources allocated and provided by the + build-in IP stack integrated in the firmware. + + The number of Socket API services at DPM via Mailbox can be configured. + The number of sockets for Socket API usage inside the IP stack can be configured. + +**************************************************************************************/ + +#define HIL_TAG_LWIP_MIN_NUM_SERVICE 1 +#define HIL_TAG_LWIP_MAX_NUM_SERVICE 8 /* highest allowed value. individual firmware may define its own, lower maximum value */ +#define HIL_TAG_LWIP_DEFAULT_NUM_SERVICE 4 +#define HIL_TAG_LWIP_MIN_NUM_SOCKET 1 +#define HIL_TAG_LWIP_MAX_NUM_SOCKET 64 /* highest allowed value. individual firmware may define its own, lower maximum value */ +#define HIL_TAG_LWIP_DEFAULT_NUM_SOCKET 8 + +typedef struct +{ + /** number of Socket API services at DPM level.*/ + uint8_t bNumberDpmSocketServices; + /** number of handled socket (for Socket API usage) in IP stack. */ + uint8_t bNumberSockets; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[2]; + +} HIL_TAG_LWIP_QUANTITY_STRUCTURE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_LWIP_QUANTITY_STRUCTURE_DATA_T tData; +} HIL_TAG_LWIP_QUANTITY_STRUCTURE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DEVICENET_CAN_SAMPLING + Name: CAN Sample point + Desc: Configures the CAN sample point + + Help: + The sample point location is defined as <=80% of the bit timing. With this option + it is possible to shift the sample point between the recommended default setting to + an alternative setting. + This may solve timing issue when devices are used, which run out of specification + regarding to the clock timings. + + NOTE: Using this setting may make the product non-conform to the specification! + + Baud rate | default timing | alternative timing + ------------|----------------|------------------- + 250 kBaud | 90,0% | 80,0% + 125 kBaud | 90,0% | 80,0% + 100 kBaud | 90,0% | 80,0% + 50 kBaud | 90,0% | 80,0% + 20 kBaud | 90,0% | 80,0% + 12,5 kBaud | 90,0% | 80,0% + 10 kBaud | 90,0% | 80,0% + +**************************************************************************************/ +typedef struct +{ + /** Sample point timing settings. + * - 0: default timing + * - 1: alternative timing + */ + uint8_t bEnableAlternativeSamplePointTimings; + + /** Reserved field for future use. + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[3]; + +} HIL_TAG_DEVICENET_CAN_SAMPLING_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DEVICENET_CAN_SAMPLING_DATA_T tData; +} HIL_TAG_DEVICENET_CAN_SAMPLING_T; + + + +/************************************************************************************** + Tag: HIL_TAG_CO_DEVICEID + Name: CANopen Product Information + Desc: N/A + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulVendorId; + uint32_t ulProductCode; + uint16_t usMajRev; + uint16_t usMinRev; + uint16_t usDeviceProfileNumber; + uint16_t usAdditionalInfo; + +} HIL_CO_DEVICEID_ID_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_CO_DEVICEID_ID_DATA_T tData; + +} HIL_CO_DEVICEID_ID_T; + + + +/************************************************************************************** + Tag: HIL_TAG_CCL_DEVICEID + Name: CC-Link Product Information + Desc: N/A + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulVendorId; + uint32_t ulModelType; + uint32_t ulSwVersion; + +} HIL_CCL_DEVICEID_ID_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_CCL_DEVICEID_ID_DATA_T tData; + +} HIL_CCL_DEVICEID_ID_T; + + + +/************************************************************************************** + Tag: HIL_TAG_DDP_MODE_AFTER_STARTUP + Name: DDP Mode after firmware startup + Desc: With this tag, you can control the DDP mode on firmware startup + + Help: + The DDP is integrated in the firmware operating system. + The DDP offers two modes: "active" or "passive" mode. + This influences the possibilities of your application in regards of the usage + of the DDP Set API to modify parameter in DDP. + + In "passive" mode the usage of the DDP Set API is possible (for writable + parameters). The firmware will treat the writable DDP parameters as invalid + (with all corresponding consequences) until the application informs the firmware + that DDP parameters are now valid. + The application is required to use the DDP API to set DDP mode to "active" later. + + Consequences of "passive" DDP mode (incomplete list) + - protocol specific configuration is rejected + - NDIS is not working + + In "active" mode the usage of DDP Set API is not possible and will be rejected. + The firmware will directly use and activate the DDP parameters (which are + typically contained in FDL). + + By default (if taglist is unchanged) the DDP starts in "active" more. + In consequence, no DDP parameter can be changed with DDP Set API. + +**************************************************************************************/ +typedef struct +{ + /** DDP mode after firmware startup. + * - 0: Startup in mode "passive". Using DDP Set API is possible + * - 1: Startup in mode "active". Using DDP Set API is impossible + * - other: reserved */ + uint8_t bDdpModeAfterStartup; + + /** Reserved field for future use + * Set to 0 to avoid unwanted behavior with upcoming version. */ + uint8_t abReserved[3]; + +} HIL_TAG_DDP_INITIAL_STATE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_DDP_INITIAL_STATE_DATA_T tData; +} HIL_TAG_DDP_INITIAL_STATE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PHY_ENABLE_TIMEOUT + Name: Phy enable timeout after firmware startup + Desc: With this tag you can specify a maximum delay until Phys will be activated by firmware. + + Help: With this tag, you can set the timeout to enable the Phys after firmware startup. + If no Phy configuration is provided to main protocol stack integrated in the firmware + up to this timeout, all Phys will be enabled with default settings. + The default settings are Autonegotiation and Autocrossover. + + If the main protocol stack gets its valid Phy configuration prior the timeout hits, + the Phys will be configured with the parameters from configuration. + If the main protocol stack gets its valid Phy configuration after the timeout hits, + the protocol stack will reparameterize the Phys according to its configuration. + This may lead to short link loss in case the configuration is different to defaults. + + By default (if taglist is unchanged) the Phy enable timeout is inactive and set to 0s. + In this case the Phy is not switched on by the firmware and a valid Phy + configuration of the protocol stack is needed. + If the timeout is set to a value greater than 0s, the firmware will check the Phys + state after the given timeout. If Phys are not configured, they will be enabled. + +**************************************************************************************/ + +/* Phy timeout value definitions */ +#define HIL_TAG_PHY_ENABLE_TIMEOUT_DISABLED (0) /*!< never enable Phy without configuration */ +#define HIL_TAG_PHY_ENABLE_TIMEOUT_MIN (1) /*!< wait for 1 second, minimum allowed value */ +#define HIL_TAG_PHY_ENABLE_TIMEOUT_MAX (300) /*!< wait for 300 second, minimum allowed value */ +#define HIL_TAG_PHY_ENABLE_TIMEOUT_DEFAULT (0) /*!< do not enable Phy without configuration, default value */ + +typedef struct +{ + /** Phy enable timeout in seconds after firmware startup. + * - 0: wait for protocol stack configuration. + * - 1-300: Phy shall be enabled 1-300 seconds after firmware startup + * - other: reserved */ + uint32_t ulPhyEnableTimeoutAfterStartup; + +} HIL_TAG_PHY_ENABLE_TIMEOUT_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PHY_ENABLE_TIMEOUT_DATA_T tData; +} HIL_TAG_PHY_ENABLE_TIMEOUT_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIF_EDD_INSTANCE + Name: Ethernet Channel Number + Desc: With this tag you specify the DPM Channel of the RTE protocol stack EDD + to which Ethernet Interface component shall connect. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulEddInstanceNo; /*!< instance number of the EDD (0 .. (DPM_MAX_COMM_CHANNELS - 1)) */ +} HIL_TAG_EIF_EDD_INSTANCE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIF_EDD_INSTANCE_DATA_T tData; +} HIL_TAG_EIF_EDD_INSTANCE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIF_EDD_CONFIG + Name: Ethernet Config + Desc: With this tag you can configure the Ethernet Interface component. + + Help: See Tag list editor + +**************************************************************************************/ + +/* EDD type definitions for Ethernet Interface configuration tag */ +#define RX_EIF_EDD_TYPE_VIRTUAL 0 /*!< virtual EDD attached to TCP stack */ +#define RX_EIF_EDD_TYPE_STD_MAC 1 /*!< single-port standard Ethernet interface */ +#define RX_EIF_EDD_TYPE_2PORT_SWITCH 2 /*!< 2-port switch */ +#define RX_EIF_EDD_TYPE_2PORT_HUB 3 /*!< 2-port hub */ + +/** Ethernet Interface component when used without run-time linking to an RTE communication stack */ +typedef struct +{ + uint32_t ulEddType; /*!< type of the EDD (see EDD type definitions for Ethernet Interface configuration) */ + uint32_t ulFirstXcNumber; /*!< number of the first (or the only) xC used */ +} HIL_TAG_EIF_EDD_CONFIG_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIF_EDD_CONFIG_DATA_T tData; +} HIL_TAG_EIF_EDD_CONFIG_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIF_NDIS_ENABLE + Name: Ethernet NDIS support + Desc: With this tag you can enable NDIS support for the Ethernet interface. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulNDISEnable; /*!< 0: NDIS is disabled, 1: NDIS is enabled */ +} HIL_TAG_EIF_NDIS_ENABLE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIF_NDIS_ENABLE_DATA_T tData; +} HIL_TAG_EIF_NDIS_ENABLE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_TCP_PORT_NUMBERS + Name: Ethernet Interface TCP Port Numbers + Desc: This tag is used to specify IP port ranges to be handled by Ethernet Interface. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_ETHINTF_TCPUDP_PORT_NUMBERS_RANGE_START_DEFAULT (1024) /*!< Default value for start port (ulPortStart) */ +#define HIL_TAG_ETHINTF_TCPUDP_PORT_NUMBERS_RANGE_END_DEFAULT (2048) /*!< Default value for end port (ulPortEnd) */ + +typedef struct +{ + /* Note: The range which is (ulPortEnd - ulPortStart) must not go below a limit of 1024 */ + + uint32_t ulPortStart; /*!< TCP/UDP-Port range, start port. */ + uint32_t ulPortEnd; /*!< TCP/UDP-Port range, end port */ + uint32_t ulNumberOfProtocolStackPorts; /*!< Number of ports the protocol stack uses. */ + uint32_t ulNumberOfUserPorts; /*!< Number of additional ports the user put into the list (ausPortList)*/ + uint16_t ausPortList[20]; /*!< Port list */ +} HIL_TAG_TCP_PORT_NUMBERS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_TCP_PORT_NUMBERS_DATA_T tData; + +} HIL_TAG_ETHINTF_TCPUDP_PORT_NUMBERS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_GEN_DIAG_RESOURCES + Name: Generic Diagnosis Resources + Desc: With this tag you can configure generic diagnosis resources. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Number of additional netPROXY Generic Diagnosis instances required by the OEM + * application for own diagnosis functions. Allowed values 32...256 in steps of 8 */ + uint16_t usNumOfDiagnosisInstances; + + /** Reserved, set to zero */ + uint8_t abReserved[2]; + +} HIL_TAG_NF_GEN_DIAG_RESOURCES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_GEN_DIAG_RESOURCES_DATA_T tData; +} HIL_TAG_NF_GEN_DIAG_RESOURCES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_PROFI_ENERGY_MODES + Name: PROFIenergy Support + Desc: With this tag you can enable and configure PROFIenergy feature. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Activation of PROFIenergy feature and setting the number of supported PROFIenergy + * modes. Allowed values: + * - 0 == PROFIenergy is disabled + * - 1..8 == PROFIenergy is supported with 1..8 modes */ + uint8_t bPROFIenergyMode; + + /** Reserved, set to zero */ + uint8_t abReserved[3]; + +} HIL_TAG_NF_PROFI_ENERGY_MODES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_PROFI_ENERGY_MODES_DATA_T tData; +} HIL_TAG_NF_PROFI_ENERGY_MODES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_PN_IOL_PROFILE_PADDING + Name: PROFINET IO-Link Profile Submodule Padding + Desc: With this tag you can configure the padding used for IO-Link Master Profile submodules + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_NF_PN_IOL_PROFILE_PADDING_PADMODE_UNALIGNMENT 0 +#define HIL_TAG_NF_PN_IOL_PROFILE_PADDING_PADMODE_2BYTE_ALIGNMENT 1 +#define HIL_TAG_NF_PN_IOL_PROFILE_PADDING_PADMODE_4BYTE_ALIGNMENT 2 + +typedef struct +{ + /** PROFINET IO-Link profile submodule padding. + * Allowed values: All HIL_TAG_NF_PN_IOL_PROFILE_PADDING_PADMODE_* defines */ + uint8_t bProfilePaddingMode; + + /** Reserved, set to zero */ + uint8_t abReserved[3]; + +} HIL_TAG_NF_PN_IOL_PROFILE_PADDING_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_PN_IOL_PROFILE_PADDING_DATA_T tData; +} HIL_TAG_NF_PN_IOL_PROFILE_PADDING_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM + Name: PROFINET IO-Link Profile Pin4 DIO in IOLM Submodule + Desc: With this tag you can specify where Pin4 DIO data is located. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_DISABLED 0 +#define HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_ENABLED 1 + +typedef struct +{ + /** PROFINET IO-Link profile submodule DIO in IOLM. + * Allowed values: All HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_* defines */ + uint8_t bDioInIolm; + + /** Reserved, set to zero */ + uint8_t abReserved[3]; + +} HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_DATA_T tData; +} HIL_TAG_NF_PN_IOL_PROFILE_DIO_IN_IOLM_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_SWAP_COM_LEDS + Name: Swap COM LEDs + Desc: This tag allows to swap the COM0 and COM1 indicator LEDs with each other. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Activate swapping + * Allowed values: + * - TRUE: Swap COM0 with COM1 + * - FALSE: Don't swap */ + uint8_t bSwapComLeds; + + /** Reserved, set to zero */ + uint8_t abReserved[3]; + +} HIL_TAG_NF_SWAP_COM_LEDS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_SWAP_COM_LEDS_DATA_T tData; +} HIL_TAG_NF_SWAP_COM_LEDS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS + Name: netFIELD PROFINET IO-Link profile Configuration Flags. + Desc: Enable/disable some special features in the PNSIOLM package + +**************************************************************************************/ +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIO_IN_IOLM_DISABLED 0 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIO_IN_IOLM_ENABLED 1 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIAG_ENABLED 0 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIAG_DISABLED 1 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_PA_ENABLED 0 +#define HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_PA_DISABLED 1 + +typedef struct +{ + /* PROFINET IO-Link profile submodule DIO in IOLM. + * Allowed values: All HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIO_IN_IOLM_* defines */ + uint8_t bDioInIolm; + + /* PROFINET IO-Link profile enable/disable general diagnosis mapping. + * Allowed values: All HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DIAG_* defines */ + uint8_t bDisableDiag; + + /* PROFINET IO-Link profile enable/disable general process alarms mapping. + * Allowed values: All HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_PA_* defines */ + uint8_t bDisablePA; + + /* Reserved, set to zero */ + uint8_t bReserved; + +} HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_DATA_T tData; +} HIL_TAG_NF_PN_IOL_PROFILE_CFG_FLAGS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PNS_ETHERNET_PARAMS + Name: Ethernet and Fiber Optic IF + Desc: With this tag you can specify which port of hardware uses Fiber Optic physics. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_PNS_ETHERNET_FIBEROPTICMODE_OFF (0) +#define HIL_TAG_PNS_ETHERNET_FIBEROPTICMODE_ON (1) +#define HIL_TAG_PNS_ETHERNET_FIBEROPTICMODE_PORT0_ONLY_ON (2) +#define HIL_TAG_PNS_ETHERNET_FIBEROPTICMODE_PORT1_ONLY_ON (3) + +typedef struct +{ + uint8_t bActivePortsBf; /*!< each bit for one port */ + uint8_t bFiberOpticMode; /*!< see defines above */ + uint8_t abReserved[2]; +} HIL_TAG_PNS_ETHERNET_PARAMS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PNS_ETHERNET_PARAMS_DATA_T tData; +} HIL_TAG_PNS_ETHERNET_PARAMS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX50_PARAMS + Name: netX50 Fiber Optic DMI + Desc: With this tag you can configure the Fiber Optic Transceiver DMI settings. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bSDA1PinIdx; /*!< mmio number */ + uint8_t bSDA2PinIdx; /*!< mmio number */ + uint8_t bSCLPinIdx; /*!< mmio number */ + uint8_t bReserved; +} HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX50_PARAMS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX50_PARAMS_DATA_T tData; +} HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX50_PARAMS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX100_PARAMS + Name: netX100/500 Fiber Optic DMI + Desc: With this tag you can configure the Fiber Optic Transceiver DMI settings. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_PINTYPE_NONE (0) +#define HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_PINTYPE_GPIO (1) +#define HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_PINTYPE_PIO (2) + +typedef struct +{ + uint8_t bSelectPinType; /*!< see value definitions above */ + uint8_t bSelectPinInvert; /*!< 0: non invert, 1: invert */ + uint8_t bSelectPinIdx; /*!< gpio/pio number */ + uint8_t bReserved; +} HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX100_PARAMS_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX100_PARAMS_DATA_T tData; +} HIL_TAG_PNS_FIBER_OPTIC_IF_DMI_NETX100_PARAMS_T; + + + +/************************************************************************************** + Tag: HIL_TAG_ECM_ENI_BUS_STATE + Name: EtherCAT Master bus state for ENI + Desc: With this tag you can configure the target Bus state of firmware when configured with ENI file. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_ECM_ENI_BUS_STATE_OFF (0) /*!< BusState off after ChannelInit (application controlled startup) */ +#define HIL_TAG_ECM_ENI_BUS_STATE_ON (1) /*!< BusState on after ChannelInit (automatic startup) */ + +typedef struct +{ + /** Target bus state for ENI files on ChannelInit */ + uint32_t ulTargetBusState; +} HIL_TAG_ECM_ENI_BUS_STATE_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_ECM_ENI_BUS_STATE_DATA_T tData; +} HIL_TAG_ECM_ENI_BUS_STATE_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIP_DEVICEID + Name: Ethernet/IP Product Information + Desc: With this tag you can modify CIP Product Information to be used by firmware. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint16_t usVendorID; + uint16_t usDeviceType; + uint16_t usProductCode; + uint8_t bMajRev; + uint8_t bMinRev; + uint8_t abProductName[32]; +} HIL_TAG_EIP_DEVICEID_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIP_DEVICEID_DATA_T tData; +} HIL_TAG_EIP_DEVICEID_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIP_DLR_PROTOCOL + Name: DLR Protocol + Desc: With this tag you can disable Ethernet/IP DLR protocol. + + Help: See Tag list editor + +**************************************************************************************/ +#define HIL_TAG_EIP_DLR_PROTOCOL_OFF 0 /*!< DLR functionality is turned OFF */ +#define HIL_TAG_EIP_DLR_PROTOCOL_ON 1 /*!< DLR functionality is turned ON */ + +typedef struct +{ + uint32_t ulEnableDLR; /*!< Enable/disable DLR functionality */ + +} HIL_TAG_EIP_DLR_PROTOCOL_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIP_DLR_PROTOCOL_DATA_T tData; +} HIL_TAG_EIP_DLR_PROTOCOL_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIP_EIS_RESOURCES + Name: Ethernet/IP resources configuration + Desc: N/A + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Maximum number of supported CIP services the host can register (not bound to any user object), default = 10 */ + uint16_t usMaxUserServices; + + /** Maximum overall number of CIP objects (Stack-internal and host-registered), default = 32 */ + uint16_t usMaxObjects; + + /** Maximum number of Assembly Instances the host can register, default = 10 */ + uint16_t usMaxAssemblyInstance; + + /** Depth of each UDP receive queue (there is exactly one global queue for I/O frames, and one queue for Encapsulation/UDP), default = 8 */ + uint16_t usMaxUdpQueueElements; + + /** Maximum number of TCP connections/sockets + * Maximum number of concurrent class 3 connections + * Maximum number of concurrent UCCM requests + * default = 8 + */ + uint16_t usMaxTcpConnections; + + /** Depth of the TCP send and receive queues for each TCP connection, default = 8*/ + uint16_t usMaxTcpQueueElements; + + /** Maximum number of parallel IO connections, default = 5 */ + uint16_t usMaxIOConnections; +} HIL_TAG_EIP_EIS_RESOURCES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIP_EIS_RESOURCES_DATA_T tData; +} HIL_TAG_EIP_EIS_RESOURCES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_EIP_EIS_CONFIG + Name: Ethernet/IP configuration. + Desc: N/A (For internal use only) + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_EIP_EIS_RESOURCES_DATA_T tData; +} HIL_TAG_EIP_EIS_CONFIG_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PN_DEVICEID + Name: PROFINET Product Information + Desc: With this tag you can modify Profinet Product Information when using database configuration. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint32_t ulVendorId; /*!< the PROFINET VendorID to use */ + uint32_t ulDeviceId; /*!< the PROFINET DeviceID to use */ +} HIL_TAG_PN_DEVICEID_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PN_DEVICEID_DATA_T tData; +} HIL_TAG_PN_DEVICEID_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PROFINET_FEATURES + Name: Profinet Features + Desc: With this tag you can configure several PROFINET features of the firmware. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + uint8_t bNumAdditionalIoAR; /*!< 0: only 1 cyclic Profinet connection is possible, for allowed values refer to PNS API Manual for details */ + uint8_t bIoSupervisorSupported; /*!< 0: IO Supervisor communication is not accepted by firmware / 1: IO Supervisor communication is accepted by firmware */ + uint8_t bIRTSupported; /*!< 0: IRT communication is not accepted by firmware / 1: IRT communication is accepted by firmware */ + uint8_t bReserved; + uint16_t usMinDeviceInterval; /*!< the MinDeviceInterval according to GSDML file of the product (allowed values: Power of two in range [8 - 4096]) */ + uint8_t abReserved[2]; +} HIL_TAG_PROFINET_FEATURES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PROFINET_FEATURES_DATA_T tData; +} HIL_TAG_PROFINET_FEATURES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PROFINET_FEATURES_V2 + Name: Profinet Features V2 + Desc: With this tag you can configure several PROFINET features of the firmware. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Maximum number of user submodules supported by the product. Allowed values [1, 1000] */ + uint16_t usNumSubmodules; + /** Minimum size of RPC buffers in KB. Allowed values [4, 64]. */ + uint8_t bRPCBufferSize; + /** Number of additional IO ARs available for Shared Device and SystemRedundancy. Nonzero value enables additional IO connections. For allowed values refer to PNS API Manual for details */ + uint8_t bNumAdditionalIOAR; + /** Number of implicit ARs used for Read Implicit Services. Allowed values [1, 8]. */ + uint8_t bNumImplicitAR; + /** Number of parallel Device Access ARs supported by device. Allowed values [0, 1]. */ + uint8_t bNumDAAR; + /** Maximum number of diagnosis entries generated by application. Allowed values [0, 1000] */ + uint16_t usNumSubmDiagnosis; +} HIL_TAG_PROFINET_FEATURES_V2_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PROFINET_FEATURES_V2_DATA_T tData; +} HIL_TAG_PROFINET_FEATURES_V2_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PROFINET_SYSTEM_REDUNDANCY_FEATURES + Name: Profinet SystemRedundancy + Desc: With this tag you can configure SystemRedundancy functionality. + + Help: See Tag list editor + +**************************************************************************************/ +typedef struct +{ + /** Number of AR Sets supported by the device. Set to non-zero value to allow SR type connections. Allowed values [0, 1]. */ + uint8_t bNumberOfARSets; + /** 32Bits alignment */ + uint8_t abPadding[3]; +} HIL_TAG_PROFINET_SYSTEM_REDUNDANCY_FEATURES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PROFINET_SYSTEM_REDUNDANCY_FEATURES_DATA_T tData; +} HIL_TAG_PROFINET_SYSTEM_REDUNDANCY_FEATURES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_PROFINET_CONTROLLER_QUANTITIES + Name: PROFINET Controller Features + Desc: With this tag, you can modify the quantity structures of Profinet IO-Controller features. + + Help: With this tag, you can modify the quantity structures of PROFINET IO-Controller part + of the firmware. This may be required in case the Hilscher default values do not meet + specific customer requirements. + Changing the parameters will influence the memory requirements of the firmware. + +**************************************************************************************/ +#define HIL_TAG_PNM_MIN_NUM_IO_AR (1) +#define HIL_TAG_PNM_MAX_NUM_IO_AR (128) +#define HIL_TAG_PNM_MIN_NUM_DA_AR (0) +#define HIL_TAG_PNM_MAX_NUM_DA_AR (1) +#define HIL_TAG_PNM_MIN_NUM_SUBMODULE (32) +#define HIL_TAG_PNM_MAX_NUM_SUBMODULE (2048) +#define HIL_TAG_PNM_MIN_SIZE_PARAM_RECORD_STORE (4) +#define HIL_TAG_PNM_DEFAULT_PARAM_RECORD_STORE (16) +#define HIL_TAG_PNM_MAX_SIZE_PARAM_RECORD_STORE (256) +#define HIL_TAG_PNM_MIN_NUM_AR_VENDOR_BLOCKS (1) +#define HIL_TAG_PNM_DEFAULT_NUM_AR_VENDOR_BLOCKS (256) +#define HIL_TAG_PNM_MAX_NUM_AR_VENDOR_BLOCKS (512) +#define HIL_TAG_PNM_MIN_SIZE_AR_VENDOR_BLOCK (128) +#define HIL_TAG_PNM_DEFAULT_SIZE_AR_VENDOR_BLOCK (512) +#define HIL_TAG_PNM_MAX_SIZE_AR_VENDOR_BLOCK (4096) +#define HIL_TAG_PNM_MIN_SIZE_APPL_RPC_BUFFER (4) +#define HIL_TAG_PNM_DEFAULT_SIZE_AR_APPL_RPC_BUFFER (64) +#define HIL_TAG_PNM_MAX_SIZE_APPL_RPC_BUFFER (256) + +typedef struct +{ + /** Number of parallel IO ARs. Allowed values see above. */ + uint16_t usNumIOAR; + /** Number of parallel Device Access ARs. Allowed values see above. */ + uint16_t usNumDAAR; + /** Maximum number of submodules over all IO ARs. Allowed values see above. */ + uint16_t usNumSubmodules; + /** Available GSD parameter record storage per AR in KB. Allowed values see above. */ + uint16_t usParamRecordStorage; + /** Number of ARVendorBlocks over all IO ARs. Allowed values see above. */ + uint16_t usNumARVendorBlocks; + /** Size per ARVendrBlock in byte. Allowed values see above. */ + uint16_t usSizeARVendorBlock; + /** Size of single application service RPC buffer in KB. Allowed values see above. */ + uint16_t usSizeApplRpcBuffer; + + /** 32Bits alignment */ + uint8_t abPadding[2]; + +} HIL_TAG_PROFINET_CONTROLLER_QUANTITIES_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_PROFINET_CONTROLLER_QUANTITIES_DATA_T tData; +} HIL_TAG_PROFINET_CONTROLLER_QUANTITIES_T; + + + +/************************************************************************************** + Tag: HIL_TAG_LWIP_PORTS_FOR_IP_ZERO + Name: LWIP Ports for IP 0.0.0.0 + Desc: With this tag you can enable IP ports for usage with Broadcast communication when IP is 0.0.0.0. + + Help: With this tag, you can set IP ports which the LWIP stack integrated in firmware + shall handle even if it does not have a valid IP configuration. + These ports will be usable with Multicast communication only. + + Setting a port to 0 means that this entry in taglist shall be ignored. This allows + e.g. only activating a single port (or even zero ports). + + By default (if taglist is unchanged) the ports shall be set to 0. + +**************************************************************************************/ +typedef struct +{ + uint16_t usPort0; + uint16_t usPort1; + +} HIL_TAG_LWIP_PORTS_FOR_IP_ZERO_DATA_T; + +typedef struct +{ + HIL_TAG_HEADER_T tHeader; + HIL_TAG_LWIP_PORTS_FOR_IP_ZERO_DATA_T tData; +} HIL_TAG_LWIP_PORTS_FOR_IP_ZERO_T; + + + + + + +/************************************************************************************** + Backward Compatibility Definitions. + NOTE: It is recommend to update components which using those definitions +**************************************************************************************/ +#ifndef HIL_TAG_DISABLE_COMPATIBILITY_MODE + #define HIL_MOD_TAG_IGNORE_FLAG HIL_TAG_IGNORE_FLAG + #define HIL_MOD_TAG_END HIL_TAG_END_OF_LIST + #define HIL_MOD_TAG_NUM_COMM_CHANNEL HIL_TAG_NUM_COMM_CHANNEL + #define HIL_MOD_TAG_IT_STATIC_TASKS HIL_TAG_TASK_GROUP + #define HIL_MOD_TAG_IT_STATIC_TASK_PARAMETER_BLOCK HIL_TAG_IT_STATIC_TASK_PARAMETER_BLOCK + #define HIL_MOD_TAG_IT_STATIC_TASK_ENTRY HIL_TAG_IT_STATIC_TASK_ENTRY + #define HIL_MOD_TAG_IT_TIMER HIL_TAG_TIMER + #define HIL_MOD_TAG_IT_INTERRUPT HIL_TAG_INTERRUPT_GROUP + #define HIL_MOD_TAG_IT_LED HIL_TAG_LED + #define HIL_MOD_TAG_IT_XC HIL_TAG_XC + #define HIL_MOD_TAG_IT_LED_RESOURCE_TYPE_PIO HIL_TAG_LED_RESOURCE_TYPE_PIO + #define HIL_MOD_TAG_IT_LED_RESOURCE_TYPE_GPIO HIL_TAG_LED_RESOURCE_TYPE_GPIO + #define HIL_MOD_TAG_IT_LED_RESOURCE_TYPE_HIFPIO HIL_TAG_LED_RESOURCE_TYPE_HIFPIO + #define HIL_MOD_TAG_IT_LED_POLARITY_NORMAL HIL_TAG_LED_POLARITY_NORMAL + #define HIL_MOD_TAG_IT_LED_POLARITY_INVERTED HIL_TAG_LED_POLARITY_INVERTED + + + typedef HIL_TAG_HEADER_T HIL_MODULE_TAG_ENTRY_HEADER_T; + typedef HIL_TAG_IDENTIFIER_T HIL_MOD_TAG_IDENTIFIER_T; + typedef HIL_TAG_UINT32_T HIL_MODULE_TAG_ENTRY_UINT32_T; + typedef HIL_TAG_TASK_GROUP_DATA_T HIL_MOD_TAG_IT_STATIC_TASKS_T; + typedef HIL_TAG_TASK_GROUP_T HIL_MOD_TAG_IT_STATIC_TASKS_TAG_T; + typedef HIL_TAG_INTERRUPT_GROUP_DATA_T HIL_MOD_TAG_IT_INTERRUPT_T; + typedef HIL_TAG_INTERRUPT_GROUP_T HIL_MOD_TAG_IT_INTERRUPT_TAG_T; + typedef HIL_TAG_TIMER_DATA_T HIL_MOD_TAG_IT_TIMER_T; + typedef HIL_TAG_TIMER_T HIL_MOD_TAG_IT_TIMER_TAG_T; + typedef HIL_TAG_LED_DATA_T HIL_MOD_TAG_IT_LED_T; + typedef HIL_TAG_LED_T HIL_MOD_TAG_IT_LED_TAG_T; + typedef HIL_TAG_XC_DATA_T HIL_MOD_TAG_IT_XC_T; + typedef HIL_TAG_XC_T HIL_MOD_TAG_IT_XC_TAG_T; + + typedef struct + { + char szTaskName[16]; /*!< task name, read-only */ + uint32_t ulTaskGroupRef; /*!< group reference number (common to all tasks in the group), read-only */ + uint32_t ulPriority; /*!< task priority (offset) relative to task group's base task priority */ + uint32_t ulToken; /*!< task token (offset) relative to task group's base task token */ + } HIL_MOD_TAG_IT_STATIC_TASK_ENTRY_T; + + typedef struct + { + HIL_MODULE_TAG_ENTRY_HEADER_T tHeader; + HIL_MOD_TAG_IT_STATIC_TASK_ENTRY_T tData; + } HIL_MOD_TAG_IT_STATIC_TASK_ENTRY_TAG_T; + + /** generic task parameter block / substructure referenced by index */ + typedef struct + { + uint32_t ulSubstructureIdx; /*!< read-only */ + uint32_t ulTaskIdentifier; /*!< read-only, Task identifier as specified in TLR_TaskIdentifier.h */ + uint32_t ulParameterVersion; /*!< read-only, parameter version as specified by particular task */ + } HIL_MOD_TAG_IT_STATIC_TASK_PARAMETER_BLOCK_T; + + /** servX port configuration tag hat been renamed */ + #define HIL_TAG_SERVX_PORT_NUMBER HIL_TAG_HTTP_PORT_CONFIG + #define HIL_TAG_SERVX_PORT_NUMBER_DATA_T HIL_TAG_HTTP_PORT_CONFIG_DATA_T + #define HIL_TAG_SERVX_PORT_NUMBER_T HIL_TAG_HTTP_PORT_CONFIG_T + +#endif /* HIL_TAG_DISABLE_COMPATIBILITY_MODE */ +/************************************************************************************** + End of backward compatibility Definitions. +**************************************************************************************/ + + + +#endif /* HIL_TAGLIST_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Types.h b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Types.h new file mode 100644 index 0000000..c1e993b --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/Hil_Types.h @@ -0,0 +1,61 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/Hil_Types.h $: *//*! + + \file Hil_Types.h + + Hilscher Type Definition. + +**************************************************************************************/ +#ifndef HIL_TYPES_H_ +#define HIL_TYPES_H_ + + +#include +#include "Hil_Compiler.h" + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_PACK_1(HIL_TYPES) +#endif + +/** UUID */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_UUID_Ttag +{ + uint32_t ulData1; + uint16_t usData2; + uint16_t usData3; + uint8_t abData4[8]; +} HIL_UUID_T; + + +/** task UUID with special meaning of the elements */ +typedef __HIL_PACKED_PRE struct __HIL_PACKED_POST HIL_TASK_UID_Ttag +{ + uint32_t ulProtocolType; /*!< use any arbitrary value */ + uint16_t usMajorVersion; /*!< major number of the task (or stack) version */ + uint16_t usTaskType; /*!< see HIL_TASK_UID_TASK_xxx below */ + uint32_t ulLayerLevel; /*!< layer number (per the OSI model) */ + uint32_t ulLayerSubTask; /*!< subtask number, e.g. in case of multiple channels */ +} HIL_TASK_UID_T; + +/*********************** Task Types for HIL_TASK_UID_T ***********************/ +/** task type not set */ +#define HIL_TASK_UID_TASK_TYPE_INVALID (0x0000) +/** user application task */ +#define HIL_TASK_UID_TASK_TYPE_USER (0x0001) +/** task belonging to a communication protocol stack */ +#define HIL_TASK_UID_TASK_TYPE_PROTOCOL_STACK (0x0002) +/** task belonging to the rcX operating system */ +#define HIL_TASK_UID_TASK_TYPE_RCX (0x0003) +/** task belonging to the Windows CE operating system (legacy only) */ +#define HIL_TASK_UID_TASK_TYPE_WINCE (0x0004) +/** XPEC channel that has not yet been allocated by a protocol stack (legacy only) */ +#define HIL_TASK_UID_TASK_TYPE_XPEC (0x0005) + + +#ifdef __HIL_PRAGMA_PACK_ENABLE + #pragma __HIL_PRAGMA_UNPACK_1(HIL_TYPES) +#endif + +#endif /* HIL_TYPES_H_ */ diff --git a/libcifx/Toolkit/Common/HilscherDefinitions/User_Compiler.h b/libcifx/Toolkit/Common/HilscherDefinitions/User_Compiler.h new file mode 100644 index 0000000..978eeee --- /dev/null +++ b/libcifx/Toolkit/Common/HilscherDefinitions/User_Compiler.h @@ -0,0 +1,17 @@ +/************************************************************************************** + Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** +  $HeadURL: https://subversion01/svn/HilscherDefinitions/netXFirmware/Headers/tags/20230403-00/includes/User_Compiler.h $: *//*! + + \file User_Compiler.h + +**************************************************************************************/ +#ifndef USER_COMPILER_H_ +#define USER_COMPILER_H_ + + #define __HIL_PACKED_PRE + #define __HIL_PACKED_POST + + #define __HIL_ALIGNED_DWORD__ + +#endif /* USER_COMPILER_H_ */ diff --git a/libcifx/Toolkit/Common/cifXAPI/cifXErrors.h b/libcifx/Toolkit/Common/cifXAPI/cifXErrors.h new file mode 100644 index 0000000..0394e93 --- /dev/null +++ b/libcifx/Toolkit/Common/cifXAPI/cifXErrors.h @@ -0,0 +1,960 @@ +#ifndef __CIFXERRORS_H__ +#define __CIFXERRORS_H__ + +/******************************************************************************* +* CIFX Device Driver Errors +*******************************************************************************/ +/* */ +/* Values are 32 bit values laid out as follows: */ +/* */ +/* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 */ +/* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* |Sev|C|R| Facility | Code | */ +/* +---+-+-+-----------------------+-------------------------------+ */ +/* */ +/* where */ +/* */ +/* Sev - is the severity code */ +/* */ +/* 00 - Success */ +/* 01 - Informational */ +/* 10 - Warning */ +/* 11 - Error */ +/* */ +/* C - is the Customer code flag */ +/* */ +/* R - is a reserved bit */ +/* */ +/* Facility - is the facility code */ +/* */ +/* Code - is the facility's status code */ +/* */ +/* */ +/* Define the facility codes */ +/* */ + + +/* */ +/* Define the severity codes */ +/* */ + + +/* */ +/* MessageId: CIFX_NO_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* No Error */ +/* */ +#define CIFX_NO_ERROR ((int32_t)0x00000000L) + +/******************************************************************************* +* Generic Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_INVALID_POINTER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid pointer (e.g. NULL) passed to driver */ +/* */ +#define CIFX_INVALID_POINTER ((int32_t)0x800A0001L) + +/* */ +/* MessageId: CIFX_INVALID_BOARD */ +/* */ +/* MessageText: */ +/* */ +/* No board with the given name / index available */ +/* */ +#define CIFX_INVALID_BOARD ((int32_t)0x800A0002L) + +/* */ +/* MessageId: CIFX_INVALID_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* No channel with the given index available */ +/* */ +#define CIFX_INVALID_CHANNEL ((int32_t)0x800A0003L) + +/* */ +/* MessageId: CIFX_INVALID_HANDLE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid handle passed to driver */ +/* */ +#define CIFX_INVALID_HANDLE ((int32_t)0x800A0004L) + +/* */ +/* MessageId: CIFX_INVALID_PARAMETER */ +/* */ +/* MessageText: */ +/* */ +/* Invalid parameter */ +/* */ +#define CIFX_INVALID_PARAMETER ((int32_t)0x800A0005L) + +/* */ +/* MessageId: CIFX_INVALID_COMMAND */ +/* */ +/* MessageText: */ +/* */ +/* Invalid command */ +/* */ +#define CIFX_INVALID_COMMAND ((int32_t)0x800A0006L) + +/* */ +/* MessageId: CIFX_INVALID_BUFFERSIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid buffer size */ +/* */ +#define CIFX_INVALID_BUFFERSIZE ((int32_t)0x800A0007L) + +/* */ +/* MessageId: CIFX_INVALID_ACCESS_SIZE */ +/* */ +/* MessageText: */ +/* */ +/* Invalid access size */ +/* */ +#define CIFX_INVALID_ACCESS_SIZE ((int32_t)0x800A0008L) + +/* */ +/* MessageId: CIFX_FUNCTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Function failed */ +/* */ +#define CIFX_FUNCTION_FAILED ((int32_t)0x800A0009L) + +/* */ +/* MessageId: CIFX_FILE_OPEN_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* File could not be opened */ +/* */ +#define CIFX_FILE_OPEN_FAILED ((int32_t)0x800A000AL) + +/* */ +/* MessageId: CIFX_FILE_SIZE_ZERO */ +/* */ +/* MessageText: */ +/* */ +/* File size is zero */ +/* */ +#define CIFX_FILE_SIZE_ZERO ((int32_t)0x800A000BL) + +/* */ +/* MessageId: CIFX_FILE_LOAD_INSUFF_MEM */ +/* */ +/* MessageText: */ +/* */ +/* Insufficient memory to load file */ +/* */ +#define CIFX_FILE_LOAD_INSUFF_MEM ((int32_t)0x800A000CL) + +/* */ +/* MessageId: CIFX_FILE_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* File checksum compare failed */ +/* */ +#define CIFX_FILE_CHECKSUM_ERROR ((int32_t)0x800A000DL) + +/* */ +/* MessageId: CIFX_FILE_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error reading from file */ +/* */ +#define CIFX_FILE_READ_ERROR ((int32_t)0x800A000EL) + +/* */ +/* MessageId: CIFX_FILE_TYPE_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file type */ +/* */ +#define CIFX_FILE_TYPE_INVALID ((int32_t)0x800A000FL) + +/* */ +/* MessageId: CIFX_FILE_NAME_INVALID */ +/* */ +/* MessageText: */ +/* */ +/* Invalid file name */ +/* */ +#define CIFX_FILE_NAME_INVALID ((int32_t)0x800A0010L) + +/* */ +/* MessageId: CIFX_FUNCTION_NOT_AVAILABLE */ +/* */ +/* MessageText: */ +/* */ +/* Driver function not available */ +/* */ +#define CIFX_FUNCTION_NOT_AVAILABLE ((int32_t)0x800A0011L) + +/* */ +/* MessageId: CIFX_BUFFER_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Given buffer is too short */ +/* */ +#define CIFX_BUFFER_TOO_SHORT ((int32_t)0x800A0012L) + +/* */ +/* MessageId: CIFX_MEMORY_MAPPING_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to map the memory */ +/* */ +#define CIFX_MEMORY_MAPPING_FAILED ((int32_t)0x800A0013L) + +/* */ +/* MessageId: CIFX_NO_MORE_ENTRIES */ +/* */ +/* MessageText: */ +/* */ +/* No more entries available */ +/* */ +#define CIFX_NO_MORE_ENTRIES ((int32_t)0x800A0014L) + +/* */ +/* MessageId: CIFX_CALLBACK_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown callback handling mode */ +/* */ +#define CIFX_CALLBACK_MODE_UNKNOWN ((int32_t)0x800A0015L) + +/* */ +/* MessageId: CIFX_CALLBACK_CREATE_EVENT_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create callback events */ +/* */ +#define CIFX_CALLBACK_CREATE_EVENT_FAILED ((int32_t)0x800A0016L) + +/* */ +/* MessageId: CIFX_CALLBACK_CREATE_RECV_BUFFER */ +/* */ +/* MessageText: */ +/* */ +/* Failed to create callback receive buffer */ +/* */ +#define CIFX_CALLBACK_CREATE_RECV_BUFFER ((int32_t)0x800A0017L) + +/* */ +/* MessageId: CIFX_CALLBACK_ALREADY_USED */ +/* */ +/* MessageText: */ +/* */ +/* Callback already used */ +/* */ +#define CIFX_CALLBACK_ALREADY_USED ((int32_t)0x800A0018L) + +/* */ +/* MessageId: CIFX_CALLBACK_NOT_REGISTERED */ +/* */ +/* MessageText: */ +/* */ +/* Callback was not registered before */ +/* */ +#define CIFX_CALLBACK_NOT_REGISTERED ((int32_t)0x800A0019L) + +/* */ +/* MessageId: CIFX_INTERRUPT_DISABLED */ +/* */ +/* MessageText: */ +/* */ +/* Interrupt is disabled */ +/* */ +#define CIFX_INTERRUPT_DISABLED ((int32_t)0x800A001AL) + +/******************************************************************************* +* Generic Driver Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_DRV_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* Driver not initialized */ +/* */ +#define CIFX_DRV_NOT_INITIALIZED ((int32_t)0x800B0001L) + +/* */ +/* MessageId: CIFX_DRV_INIT_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Driver init state error */ +/* */ +#define CIFX_DRV_INIT_STATE_ERROR ((int32_t)0x800B0002L) + +/* */ +/* MessageId: CIFX_DRV_READ_STATE_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Driver read state error */ +/* */ +#define CIFX_DRV_READ_STATE_ERROR ((int32_t)0x800B0003L) + +/* */ +/* MessageId: CIFX_DRV_CMD_ACTIVE */ +/* */ +/* MessageText: */ +/* */ +/* Command is active on device */ +/* */ +#define CIFX_DRV_CMD_ACTIVE ((int32_t)0x800B0004L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* General error during download */ +/* */ +#define CIFX_DRV_DOWNLOAD_FAILED ((int32_t)0x800B0005L) + +/* */ +/* MessageId: CIFX_DRV_WRONG_DRIVER_VERSION */ +/* */ +/* MessageText: */ +/* */ +/* Wrong driver version */ +/* */ +#define CIFX_DRV_WRONG_DRIVER_VERSION ((int32_t)0x800B0006L) + +/* */ +/* MessageId: CIFX_DRV_DRIVER_NOT_LOADED */ +/* */ +/* MessageText: */ +/* */ +/* CIFx driver is not running */ +/* */ +#define CIFX_DRV_DRIVER_NOT_LOADED ((int32_t)0x800B0030L) + +/* */ +/* MessageId: CIFX_DRV_INIT_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Failed to initialize the device */ +/* */ +#define CIFX_DRV_INIT_ERROR ((int32_t)0x800B0031L) + +/* */ +/* MessageId: CIFX_DRV_CHANNEL_NOT_INITIALIZED */ +/* */ +/* MessageText: */ +/* */ +/* Channel not initialized (xChannelOpen not called) */ +/* */ +#define CIFX_DRV_CHANNEL_NOT_INITIALIZED ((int32_t)0x800B0032L) + +/* */ +/* MessageId: CIFX_DRV_IO_CONTROL_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* IOControl call failed */ +/* */ +#define CIFX_DRV_IO_CONTROL_FAILED ((int32_t)0x800B0033L) + +/* */ +/* MessageId: CIFX_DRV_NOT_OPENED */ +/* */ +/* MessageText: */ +/* */ +/* Driver was not opened */ +/* */ +#define CIFX_DRV_NOT_OPENED ((int32_t)0x800B0034L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_STORAGE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown download storage type (RAM/FLASH based) found */ +/* */ +#define CIFX_DRV_DOWNLOAD_STORAGE_UNKNOWN ((int32_t)0x800B0040L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_FW_WRONG_CHANNEL */ +/* */ +/* MessageText: */ +/* */ +/* Channel number for a firmware download not supported */ +/* */ +#define CIFX_DRV_DOWNLOAD_FW_WRONG_CHANNEL ((int32_t)0x800B0041L) + +/* */ +/* MessageId: CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS */ +/* */ +/* MessageText: */ +/* */ +/* Modules are not allowed without a Base OS firmware */ +/* */ +#define CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS ((int32_t)0x800B0042L) + +/******************************************************************************* +* Generic Device Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_DEV_DPM_ACCESS_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Dual port memory not accessible (board not found) */ +/* */ +#define CIFX_DEV_DPM_ACCESS_ERROR ((int32_t)0x800C0010L) + +/* */ +/* MessageId: CIFX_DEV_NOT_READY */ +/* */ +/* MessageText: */ +/* */ +/* Device not ready (ready flag failed) */ +/* */ +#define CIFX_DEV_NOT_READY ((int32_t)0x800C0011L) + +/* */ +/* MessageId: CIFX_DEV_NOT_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Device not running (running flag failed) */ +/* */ +#define CIFX_DEV_NOT_RUNNING ((int32_t)0x800C0012L) + +/* */ +/* MessageId: CIFX_DEV_WATCHDOG_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Watchdog test failed */ +/* */ +#define CIFX_DEV_WATCHDOG_FAILED ((int32_t)0x800C0013L) + +/* */ +/* MessageId: CIFX_DEV_SYSERR */ +/* */ +/* MessageText: */ +/* */ +/* Error in handshake flags */ +/* */ +#define CIFX_DEV_SYSERR ((int32_t)0x800C0015L) + +/* */ +/* MessageId: CIFX_DEV_MAILBOX_FULL */ +/* */ +/* MessageText: */ +/* */ +/* Send mailbox is full */ +/* */ +#define CIFX_DEV_MAILBOX_FULL ((int32_t)0x800C0016L) + +/* */ +/* MessageId: CIFX_DEV_PUT_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Send packet timeout */ +/* */ +#define CIFX_DEV_PUT_TIMEOUT ((int32_t)0x800C0017L) + +/* */ +/* MessageId: CIFX_DEV_GET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Receive packet timeout */ +/* */ +#define CIFX_DEV_GET_TIMEOUT ((int32_t)0x800C0018L) + +/* */ +/* MessageId: CIFX_DEV_GET_NO_PACKET */ +/* */ +/* MessageText: */ +/* */ +/* No packet available */ +/* */ +#define CIFX_DEV_GET_NO_PACKET ((int32_t)0x800C0019L) + +/* */ +/* MessageId: CIFX_DEV_MAILBOX_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Mailbox too short */ +/* */ +#define CIFX_DEV_MAILBOX_TOO_SHORT ((int32_t)0x800C001AL) + +/* */ +/* MessageId: CIFX_DEV_RESET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Reset command timeout */ +/* */ +#define CIFX_DEV_RESET_TIMEOUT ((int32_t)0x800C0020L) + +/* */ +/* MessageId: CIFX_DEV_NO_COM_FLAG */ +/* */ +/* MessageText: */ +/* */ +/* COM-flag not set */ +/* */ +#define CIFX_DEV_NO_COM_FLAG ((int32_t)0x800C0021L) + +/* */ +/* MessageId: CIFX_DEV_EXCHANGE_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* I/O data exchange failed */ +/* */ +#define CIFX_DEV_EXCHANGE_FAILED ((int32_t)0x800C0022L) + +/* */ +/* MessageId: CIFX_DEV_EXCHANGE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* I/O data exchange timeout */ +/* */ +#define CIFX_DEV_EXCHANGE_TIMEOUT ((int32_t)0x800C0023L) + +/* */ +/* MessageId: CIFX_DEV_COM_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown I/O exchange mode */ +/* */ +#define CIFX_DEV_COM_MODE_UNKNOWN ((int32_t)0x800C0024L) + +/* */ +/* MessageId: CIFX_DEV_FUNCTION_FAILED */ +/* */ +/* MessageText: */ +/* */ +/* Device function failed */ +/* */ +#define CIFX_DEV_FUNCTION_FAILED ((int32_t)0x800C0025L) + +/* */ +/* MessageId: CIFX_DEV_DPMSIZE_MISMATCH */ +/* */ +/* MessageText: */ +/* */ +/* DPM size differs from configuration */ +/* */ +#define CIFX_DEV_DPMSIZE_MISMATCH ((int32_t)0x800C0026L) + +/* */ +/* MessageId: CIFX_DEV_STATE_MODE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown state mode */ +/* */ +#define CIFX_DEV_STATE_MODE_UNKNOWN ((int32_t)0x800C0027L) + +/* */ +/* MessageId: CIFX_DEV_HW_PORT_IS_USED */ +/* */ +/* MessageText: */ +/* */ +/* Device is still accessed */ +/* */ +#define CIFX_DEV_HW_PORT_IS_USED ((int32_t)0x800C0028L) + +/* */ +/* MessageId: CIFX_DEV_CONFIG_LOCK_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Configuration locking timeout */ +/* */ +#define CIFX_DEV_CONFIG_LOCK_TIMEOUT ((int32_t)0x800C0029L) + +/* */ +/* MessageId: CIFX_DEV_CONFIG_UNLOCK_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Configuration unlocking timeout */ +/* */ +#define CIFX_DEV_CONFIG_UNLOCK_TIMEOUT ((int32_t)0x800C002AL) + +/* */ +/* MessageId: CIFX_DEV_HOST_STATE_SET_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set HOST state timeout */ +/* */ +#define CIFX_DEV_HOST_STATE_SET_TIMEOUT ((int32_t)0x800C002BL) + +/* */ +/* MessageId: CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Clear HOST state timeout */ +/* */ +#define CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT ((int32_t)0x800C002CL) + +/* */ +/* MessageId: CIFX_DEV_INITIALIZATION_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Timeout during channel initialization */ +/* */ +#define CIFX_DEV_INITIALIZATION_TIMEOUT ((int32_t)0x800C002DL) + +/* */ +/* MessageId: CIFX_DEV_BUS_STATE_ON_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set Bus ON Timeout */ +/* */ +#define CIFX_DEV_BUS_STATE_ON_TIMEOUT ((int32_t)0x800C002EL) + +/* */ +/* MessageId: CIFX_DEV_BUS_STATE_OFF_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set Bus OFF Timeout */ +/* */ +#define CIFX_DEV_BUS_STATE_OFF_TIMEOUT ((int32_t)0x800C002FL) + +/* */ +/* MessageId: CIFX_DEV_MODULE_ALREADY_RUNNING */ +/* */ +/* MessageText: */ +/* */ +/* Module already running */ +/* */ +#define CIFX_DEV_MODULE_ALREADY_RUNNING ((int32_t)0x800C0040L) + +/* */ +/* MessageId: CIFX_DEV_MODULE_ALREADY_EXISTS */ +/* */ +/* MessageText: */ +/* */ +/* Module already exists */ +/* */ +#define CIFX_DEV_MODULE_ALREADY_EXISTS ((int32_t)0x800C0041L) + +/* */ +/* MessageId: CIFX_DEV_DMA_INSUFF_BUFFER_COUNT */ +/* */ +/* MessageText: */ +/* */ +/* Number of configured DMA buffers insufficient */ +/* */ +#define CIFX_DEV_DMA_INSUFF_BUFFER_COUNT ((int32_t)0x800C0050L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_TOO_SMALL */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffers size too small (min size 256Byte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_TOO_SMALL ((int32_t)0x800C0051L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_TOO_BIG */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffers size too big (max size 63,75KByte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_TOO_BIG ((int32_t)0x800C0052L) + +/* */ +/* MessageId: CIFX_DEV_DMA_BUFFER_NOT_ALIGNED */ +/* */ +/* MessageText: */ +/* */ +/* DMA buffer alignment failed (must be 256Byte) */ +/* */ +#define CIFX_DEV_DMA_BUFFER_NOT_ALIGNED ((int32_t)0x800C0053L) + +/* */ +/* MessageId: CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* I/O data uncontrolled handshake mode not supported */ +/* */ +#define CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED ((int32_t)0x800C0054L) + +/* */ +/* MessageId: CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED */ +/* */ +/* MessageText: */ +/* */ +/* I/O area in DMA mode not supported (only area 0 possible) */ +/* */ +#define CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED ((int32_t)0x800C0055L) + +/* */ +/* MessageId: CIFX_DEV_DMA_STATE_ON_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set DMA ON Timeout */ +/* */ +#define CIFX_DEV_DMA_STATE_ON_TIMEOUT ((int32_t)0x800C0056L) + +/* */ +/* MessageId: CIFX_DEV_DMA_STATE_OFF_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Set DMA OFF Timeout */ +/* */ +#define CIFX_DEV_DMA_STATE_OFF_TIMEOUT ((int32_t)0x800C0057L) + +/* */ +/* MessageId: CIFX_DEV_SYNC_STATE_INVALID_MODE */ +/* */ +/* MessageText: */ +/* */ +/* Device is in invalid mode for this operation */ +/* */ +#define CIFX_DEV_SYNC_STATE_INVALID_MODE ((int32_t)0x800C0058L) + +/* */ +/* MessageId: CIFX_DEV_SYNC_STATE_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Waiting for synchronization event bits timed out */ +/* */ +#define CIFX_DEV_SYNC_STATE_TIMEOUT ((int32_t)0x800C0059L) + +/******************************************************************************* +* CIFX API Transport Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_TRANSPORT_SEND_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Time out while sending data */ +/* */ +#define CIFX_TRANSPORT_SEND_TIMEOUT ((int32_t)0x800D0001L) + +/* */ +/* MessageId: CIFX_TRANSPORT_RECV_TIMEOUT */ +/* */ +/* MessageText: */ +/* */ +/* Time out waiting for incoming data */ +/* */ +#define CIFX_TRANSPORT_RECV_TIMEOUT ((int32_t)0x800D0002L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CONNECT */ +/* */ +/* MessageText: */ +/* */ +/* Unable to communicate to the device / no answer */ +/* */ +#define CIFX_TRANSPORT_CONNECT ((int32_t)0x800D0003L) + +/* */ +/* MessageId: CIFX_TRANSPORT_ABORTED */ +/* */ +/* MessageText: */ +/* */ +/* Transfer has been aborted due to keep alive timeout or interface detachment */ +/* */ +#define CIFX_TRANSPORT_ABORTED ((int32_t)0x800D0004L) + +/* */ +/* MessageId: CIFX_TRANSPORT_INVALID_RESPONSE */ +/* */ +/* MessageText: */ +/* */ +/* The packet response was rejected due to invalid packet data */ +/* */ +#define CIFX_TRANSPORT_INVALID_RESPONSE ((int32_t)0x800D0005L) + +/* */ +/* MessageId: CIFX_TRANSPORT_UNKNOWN_DATALAYER */ +/* */ +/* MessageText: */ +/* */ +/* The data layer provided by the device is not supported */ +/* */ +#define CIFX_TRANSPORT_UNKNOWN_DATALAYER ((int32_t)0x800D0006L) + +/* */ +/* MessageId: CIFX_CONNECTOR_FUNCTIONS_READ_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* Error reading the connector functions from the DLL */ +/* */ +#define CIFX_CONNECTOR_FUNCTIONS_READ_ERROR ((int32_t)0x800D0010L) + +/* */ +/* MessageId: CIFX_CONNECTOR_IDENTIFIER_TOO_LONG */ +/* */ +/* MessageText: */ +/* */ +/* Connector delivers an identifier longer than 6 characters */ +/* */ +#define CIFX_CONNECTOR_IDENTIFIER_TOO_LONG ((int32_t)0x800D0011L) + +/* */ +/* MessageId: CIFX_CONNECTOR_IDENTIFIER_EMPTY */ +/* */ +/* MessageText: */ +/* */ +/* Connector delivers an empty identifier */ +/* */ +#define CIFX_CONNECTOR_IDENTIFIER_EMPTY ((int32_t)0x800D0012L) + +/* */ +/* MessageId: CIFX_CONNECTOR_DUPLICATE_IDENTIFIER */ +/* */ +/* MessageText: */ +/* */ +/* Connector identifier already used */ +/* */ +#define CIFX_CONNECTOR_DUPLICATE_IDENTIFIER ((int32_t)0x800D0013L) + +/******************************************************************************* +* CIFX API Transport Header State Errors +*******************************************************************************/ +/* */ +/* MessageId: CIFX_TRANSPORT_ERROR_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Unknown error code in transport header */ +/* */ +#define CIFX_TRANSPORT_ERROR_UNKNOWN ((int32_t)0x800E0001L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CHECKSUM_ERROR */ +/* */ +/* MessageText: */ +/* */ +/* CRC16 checksum failed */ +/* */ +#define CIFX_TRANSPORT_CHECKSUM_ERROR ((int32_t)0x800E0002L) + +/* */ +/* MessageId: CIFX_TRANSPORT_LENGTH_INCOMPLETE */ +/* */ +/* MessageText: */ +/* */ +/* Transaction with incomplete length detected */ +/* */ +#define CIFX_TRANSPORT_LENGTH_INCOMPLETE ((int32_t)0x800E0003L) + +/* */ +/* MessageId: CIFX_TRANSPORT_DATA_TYPE_UNKOWN */ +/* */ +/* MessageText: */ +/* */ +/* Device does not support requested data type */ +/* */ +#define CIFX_TRANSPORT_DATA_TYPE_UNKOWN ((int32_t)0x800E0004L) + +/* */ +/* MessageId: CIFX_TRANSPORT_DEVICE_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Device not available/unknown */ +/* */ +#define CIFX_TRANSPORT_DEVICE_UNKNOWN ((int32_t)0x800E0005L) + +/* */ +/* MessageId: CIFX_TRANSPORT_CHANNEL_UNKNOWN */ +/* */ +/* MessageText: */ +/* */ +/* Channel not available/unknown */ +/* */ +#define CIFX_TRANSPORT_CHANNEL_UNKNOWN ((int32_t)0x800E0006L) + +/* */ +/* MessageId: CIFX_TRANSPORT_SEQUENCE */ +/* */ +/* MessageText: */ +/* */ +/* Sequence error detected */ +/* */ +#define CIFX_TRANSPORT_SEQUENCE ((int32_t)0x800E0007L) + +/* */ +/* MessageId: CIFX_TRANSPORT_BUFFEROVERFLOW */ +/* */ +/* MessageText: */ +/* */ +/* Buffer overflow detected */ +/* */ +#define CIFX_TRANSPORT_BUFFEROVERFLOW ((int32_t)0x800E0008L) + +/* */ +/* MessageId: CIFX_TRANSPORT_RESOURCE */ +/* */ +/* MessageText: */ +/* */ +/* Device signals out of resources */ +/* */ +#define CIFX_TRANSPORT_RESOURCE ((int32_t)0x800E0009L) + +/* */ +/* MessageId: CIFX_TRANSPORT_KEEPALIVE */ +/* */ +/* MessageText: */ +/* */ +/* Device connection monitoring error (Keep alive) */ +/* */ +#define CIFX_TRANSPORT_KEEPALIVE ((int32_t)0x800E000AL) + +/* */ +/* MessageId: CIFX_TRANSPORT_DATA_TOO_SHORT */ +/* */ +/* MessageText: */ +/* */ +/* Received transaction data too short */ +/* */ +#define CIFX_TRANSPORT_DATA_TOO_SHORT ((int32_t)0x800E000BL) + +/*******************************************************************************/ + +#endif /*__CIFXERRORS_H__ */ diff --git a/libcifx/Toolkit/Common/cifXAPI/cifXUser.h b/libcifx/Toolkit/Common/cifXAPI/cifXUser.h new file mode 100644 index 0000000..20b519b --- /dev/null +++ b/libcifx/Toolkit/Common/cifXAPI/cifXUser.h @@ -0,0 +1,672 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXUser.h 12193 2018-07-18 06:37:19Z Robert $: + + Description: + CIFx driver API definition file + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2022-06-14 Added CIFX_IO_AREA_MASK definition + 2019-03-26 Added timeout definition for firmware update + 2018-11-19 - Update definitions and structures concerning xSysdeviceResetEx() + - SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK structure extended by bResetMode + 2018-11-06 Add new function xSysdeviceResetEx() + 2018-07-18 Extended the CIFX_TO_FIRMWARE_START to 20 seconds + 2016-04-07 Lint warnings removed + 2015-07-23 Added API function pointer definitions usable in a pointer table + 2015-03-31 Added guard for _MSC_VER to allow compilation using -wundef + 2014-07-07 Added support for IAR C/C++ Compiler (ARM Cores only) + 2014-04-28 Added support for armcc compiler + 2012-01-31 Added COM-State notification structure + 2011-12-12 SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK structure extended by ulHWFeatures + 2011-11-29 Added xSysdeviceExtendedMemory() + 2011-09-13 - CIFX_MAX_PACKET_SIZE changed from 1600 to 1596 bytes because of mailbox counter + - xSysdeviceBoostart() function added + 2010-04-22 Added ulBootError to SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK + 2010-04-15 - Added timeout to xChannelSyncState function + - Added CIFX_SYNC_WAIT_CMD to be able to wait for sync signalling by firmware + 2010-04-01 Data types update + 2010-03-23 - Data types changed for 32/64Bit usage + - Event functions include + 2009-10-29 DMA state function and states included + 2009-10-01 CIFX_TO_WAIT_COS_CMD/ACK changed to 20ms + 2009-06-08 SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK structure extended by bDevIdNumber + 2009-04-28 New download mode for modules included + 2009-01-23 netX DPM signature included + 2008-11-25 NETX_SYSTEM_STATUS block structure updated + - removed LEDs + - added CPU load and system start time values + 2008-06-19 xDriverRestartDevice() function parameters changed + 2008-05-27 APIENTRY now set empty, if not defined outside the file + 2008-04-29 DOWNLOAD_MODE_LICENSECODE added + 2008-03-17 xDriverRestartDevice() included + 2008-02-22 Firmware version changed from Major,Minor,Revision,Build to + Major,Minor,Build,Revision, as decided on 19.11.2007 + 2007-07-26 Added DOWNLOAD_MODE_BOOTLOADER + 2007-04-17 Parameters for the following functions changed + - xSysdeviceDownload/Upload + - xSysdeviceFindFirstFile/NextFile + - xChannelDownload/Upload + - xChannelFindFirstFile/NextFile + 2007-04-13 CALLBACK state definition included + 2007-04-10 - PFN_TRANSFER_PACKET moved to toolkit headers + - CIFX_COLDSTART and CIFX_WARMSTART changed to + CIFX_SYSTEMSTART and CIFX_CHANNELINIT + 2007-04-04 xChannelBusState() included + 2007-03-28 typedef for PFN_TRANSFER_PACKET included + 2007-03-21 Added: + - xChannelIOInfo + - xSysdeviceReset + - CIFX_WARMSTART/CIFX_COLDSTART + 2007-03-20 Added: + - xChannelFindFirstFile + - xChannelFindNextFile + - xChannelUpload + - xSysdeviceFindFirstFile + - xSysdeviceFindNextFile + - xSysdeviceUpload + 2007-03-16 Removed CIFX_DRIVER define around API functions, + as it is not needed anymore (since V0.920 of driver) + 2006-12-04 PACKED_POST moved to closing curly brace after type definition + 2006-10-18 Changed HANDLE to CIFXHANDLE which is a void*, to be + usable on VxWorks without compiler warnings + 2006-03-17 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup CIFX_DRIVER_API cifX Driver API implementation */ +/*! \{ */ +/*****************************************************************************/ + +/* prevent multiple inclusion */ +#ifndef __CIFxUSER_H +#define __CIFxUSER_H + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #define __CIFx_PACKED_PRE + #define __CIFx_PACKED_POST + #pragma once + #pragma pack(1) /* Always align structures to 1Byte boundery */ + #ifndef STRICT /* Check Typedefinition */ + #define STRICT + #endif + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/* support for GNU compiler */ +#ifdef __GNUC__ + #define __CIFx_PACKED_PRE + #define __CIFx_PACKED_POST __attribute__((packed)) +#endif + +/* support for ARMCC and IAR compiler (ARM cores only) */ +#if defined (__ADS__) || defined (__REALVIEW__) || defined (__CC_ARM) || defined (__ICCARM__) + /* tight packing of structure members */ + #define __CIFx_PACKED_PRE __packed + #define __CIFx_PACKED_POST +#endif /* __ADS__, __REALVIEW__, __CC_ARM */ + +#ifdef __cplusplus + extern "C" { +#endif /* _cplusplus */ + +#include /*lint !e537 !e451 */ + +#ifndef APIENTRY + #define APIENTRY +#endif + +/* ------------------------------------------------------------------------------------ */ +/* global definitions */ +/* ------------------------------------------------------------------------------------ */ +typedef void* CIFXHANDLE; + +/* DPM memory validation */ +#define CIFX_DPM_NO_MEMORY_ASSIGNED 0x0BAD0BADUL +#define CIFX_DPM_INVALID_CONTENT 0xFFFFFFFFUL + +#define CIFX_DPMSIGNATURE_BSL_STR "BOOT" +#define CIFX_DPMSIGNATURE_BSL_VAL 0x544F4F42UL +#define CIFX_DPMSIGNATURE_FW_STR "netX" +#define CIFX_DPMSIGNATURE_FW_VAL 0x5874656EUL + +/* CIFx global timeouts in milliseconds */ +#define CIFX_TO_WAIT_HW_RESET_ACTIVE 2000UL +#define CIFX_TO_WAIT_HW 2000UL +#define CIFX_TO_WAIT_COS_CMD 20UL +#define CIFX_TO_WAIT_COS_ACK 20UL +#define CIFX_TO_SEND_PACKET 5000UL +#define CIFX_TO_1ST_PACKET 1000UL +#define CIFX_TO_CONT_PACKET 1000UL +#define CIFX_TO_LAST_PACKET 1000UL +#define CIFX_TO_FIRMWARE_START 20000UL +#define CIFX_TO_FIRMWARE_UPDATE 30000UL + +/* Maximum channel number */ +#define CIFX_MAX_NUMBER_OF_CHANNEL_DEFINITION 8 +#define CIFX_MAX_NUMBER_OF_CHANNELS 6 +#define CIFX_NO_CHANNEL 0xFFFFFFFF + +/* Maximum file name length */ +#define CIFX_MAX_FILE_NAME_LENGTH 260 +#define CIFX_MIN_FILE_NAME_LENGTH 5 + +/* The system device port number */ +#define CIFX_SYSTEM_DEVICE 0xFFFFFFFF + +/* Information commands */ +#define CIFX_INFO_CMD_SYSTEM_INFORMATION 1 +#define CIFX_INFO_CMD_SYSTEM_INFO_BLOCK 2 +#define CIFX_INFO_CMD_SYSTEM_CHANNEL_BLOCK 3 +#define CIFX_INFO_CMD_SYSTEM_CONTROL_BLOCK 4 +#define CIFX_INFO_CMD_SYSTEM_STATUS_BLOCK 5 + +/* General commands */ +#define CIFX_CMD_READ_DATA 1 +#define CIFX_CMD_WRITE_DATA 2 + +/* HOST mode definition */ +#define CIFX_HOST_STATE_NOT_READY 0 +#define CIFX_HOST_STATE_READY 1 +#define CIFX_HOST_STATE_READ 2 + +/* WATCHDOG commands*/ +#define CIFX_WATCHDOG_STOP 0 +#define CIFX_WATCHDOG_START 1 + +/* Configuration Lock commands*/ +#define CIFX_CONFIGURATION_UNLOCK 0 +#define CIFX_CONFIGURATION_LOCK 1 +#define CIFX_CONFIGURATION_GETLOCKSTATE 2 + +/* BUS state commands*/ +#define CIFX_BUS_STATE_OFF 0 +#define CIFX_BUS_STATE_ON 1 +#define CIFX_BUS_STATE_GETSTATE 2 + +/* DMA state commands*/ +#define CIFX_DMA_STATE_OFF 0 +#define CIFX_DMA_STATE_ON 1 +#define CIFX_DMA_STATE_GETSTATE 2 + +/* Memory pointer commands*/ +#define CIFX_MEM_PTR_OPEN 1 +#define CIFX_MEM_PTR_OPEN_USR 2 +#define CIFX_MEM_PTR_CLOSE 3 + +/* I/O area definition */ +#define CIFX_IO_AREA_MASK 0x0F +#define CIFX_IO_INPUT_AREA 1 +#define CIFX_IO_OUTPUT_AREA 2 + +/* xChannelReset definitions */ +#define CIFX_SYSTEMSTART 1 +#define CIFX_CHANNELINIT 2 +#define CIFX_BOOTSTART 3 /* This definition is not supported by cifXAPI */ + +/* xSysdeviceResetEx definitions */ +#define CIFX_RESETEX_SYSTEMSTART 0 +#define CIFX_RESETEX_BOOTSTART 2 +#define CIFX_RESETEX_UPDATESTART 3 + +/* Shift value for variant selection of CIFX_RESETEX_UPDATESTART */ +#define CIFX_RESETEX_UPDATESTART_VARIANT_SRT 4 + +/* Sync command definitions */ +#define CIFX_SYNC_SIGNAL_CMD 1 +#define CIFX_SYNC_ACKNOWLEDGE_CMD 2 +#define CIFX_SYNC_WAIT_CMD 3 + +typedef struct CIFX_NOTIFY_RX_MBX_FULL_DATA_Ttag +{ + uint32_t ulRecvCount; +} CIFX_NOTIFY_RX_MBX_FULL_DATA_T; + +typedef struct CIFX_NOTIFY_TX_MBX_EMPTY_DATA_Ttag +{ + uint32_t ulMaxSendCount; +} CIFX_NOTIFY_TX_MBX_EMPTY_DATA_T; + +typedef struct CIFX_NOTIFY_COM_STATE_Ttag +{ + uint32_t ulComState; +} CIFX_NOTIFY_COM_STATE_T; + +/* Notifications */ +#define CIFX_NOTIFY_RX_MBX_FULL 1 +#define CIFX_NOTIFY_TX_MBX_EMPTY 2 +#define CIFX_NOTIFY_PD0_IN 3 +#define CIFX_NOTIFY_PD1_IN 4 +#define CIFX_NOTIFY_PD0_OUT 5 +#define CIFX_NOTIFY_PD1_OUT 6 +#define CIFX_NOTIFY_SYNC 7 +#define CIFX_NOTIFY_COM_STATE 8 + +/* Extended memory commands */ +#define CIFX_GET_EXTENDED_MEMORY_INFO 1 +#define CIFX_GET_EXTENDED_MEMORY_POINTER 2 +#define CIFX_FREE_EXTENDED_MEMORY_POINTER 3 + +/*****************************************************************************/ +/*! Structure definitions */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct DRIVER_INFORMATIONtag +{ + char abDriverVersion[32]; /*!< Driver version */ + uint32_t ulBoardCnt; /*!< Number of available Boards */ +} __CIFx_PACKED_POST DRIVER_INFORMATION; + +#define CIFx_MAX_INFO_NAME_LENTH 16 + +/*****************************************************************************/ +/*! Directory Information structure for enumerating directories */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_DIRECTORYENTRYtag +{ + CIFXHANDLE hList; /*!< Handle from Enumeration function, do not touch */ + char szFilename[CIFx_MAX_INFO_NAME_LENTH]; /*!< Returned file name. */ + uint8_t bFiletype; /*!< Returned file type. */ + uint32_t ulFilesize; /*!< Returned file size. */ + +} __CIFx_PACKED_POST CIFX_DIRECTORYENTRY; + +/*****************************************************************************/ +/*! Extended memory information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_EXTENDED_MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void* pvMemoryPtr; /*!< Memory pointer */ + uint32_t ulMemorySize; /*!< Memory size of the Extended memory area */ + uint32_t ulMemoryType; /*!< Memory type information */ + +} __CIFx_PACKED_POST CIFX_EXTENDED_MEMORY_INFORMATION; + +/*****************************************************************************/ +/*! System Channel Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_INFORMATIONtag +{ + uint32_t ulSystemError; /*!< Global system error */ + uint32_t ulDpmTotalSize; /*!< Total size dual-port memory in bytes */ + uint32_t ulMBXSize; /*!< System mailbox data size [Byte]*/ + uint32_t ulDeviceNumber; /*!< Global device number */ + uint32_t ulSerialNumber; /*!< Global serial number */ + uint32_t ulOpenCnt; /*!< Channel open counter */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_INFORMATION; + +/* System Channel: System Information Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_INFO_BLOCKtag +{ + uint8_t abCookie[4]; /*!< 0x00 "netX" cookie */ + uint32_t ulDpmTotalSize; /*!< 0x04 Total Size of the whole dual-port memory in bytes */ + uint32_t ulDeviceNumber; /*!< 0x08 Device number */ + uint32_t ulSerialNumber; /*!< 0x0C Serial number */ + uint16_t ausHwOptions[4]; /*!< 0x10 Hardware options, xC port 0..3 */ + uint16_t usManufacturer; /*!< 0x18 Manufacturer Location */ + uint16_t usProductionDate; /*!< 0x1A Date of production */ + uint32_t ulLicenseFlags1; /*!< 0x1C License code flags 1 */ + uint32_t ulLicenseFlags2; /*!< 0x20 License code flags 2 */ + uint16_t usNetxLicenseID; /*!< 0x24 netX license identification */ + uint16_t usNetxLicenseFlags; /*!< 0x26 netX license flags */ + uint16_t usDeviceClass; /*!< 0x28 netX device class */ + uint8_t bHwRevision; /*!< 0x2A Hardware revision index */ + uint8_t bHwCompatibility; /*!< 0x2B Hardware compatibility index */ + uint8_t bDevIdNumber; /*!< 0x2C Device identification number (rotary switch) */ + uint8_t bReserved; /*!< 0x2D Reserved byte */ + uint16_t usReserved; /*!< 0x2E:0x2F Reserved */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK; + +/* System Channel: Channel Information Block */ +#define CIFX_SYSTEM_CHANNEL_DEFAULT_INFO_BLOCK_SIZE 16 +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_CHANNEL_INFO_BLOCKtag +{ + uint8_t abInfoBlock[CIFX_MAX_NUMBER_OF_CHANNEL_DEFINITION][CIFX_SYSTEM_CHANNEL_DEFAULT_INFO_BLOCK_SIZE]; +} __CIFx_PACKED_POST SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK; + +/* System Channel: System Control Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCKtag +{ + uint32_t ulSystemCommandCOS; /*!< 0x00 System channel change of state command */ + uint32_t ulSystemControl; /*!< 0x04 System channel control */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCK; + +/* System Channel: System Status Block */ +typedef __CIFx_PACKED_PRE struct SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCKtag +{ + uint32_t ulSystemCOS; /*!< 0x00 System channel change of state acknowledge */ + uint32_t ulSystemStatus; /*!< 0x04 Actual system state */ + uint32_t ulSystemError; /*!< 0x08 Actual system error */ + uint32_t ulBootError; /*!< 0x0C Bootup error code (only valid if Cookie="BOOT") */ + uint32_t ulTimeSinceStart; /*!< 0x10 time since start in seconds */ + uint16_t usCpuLoad; /*!< 0x14 cpu load in 0,01% units (10000 => 100%) */ + uint16_t usReserved; /*!< 0x16 Reserved */ + uint32_t ulHWFeatures; /*!< 0x18 Hardware features */ + uint8_t abReserved[36]; /*!< 0x1C:3F Reserved */ +} __CIFx_PACKED_POST SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK; + +/*****************************************************************************/ +/*! Board Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct BOARD_INFORMATIONtag +{ + int32_t lBoardError; /*!< Global Board error. Set when device specific data must not be used */ + char abBoardName[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board name */ + char abBoardAlias[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board alias name */ + uint32_t ulBoardID; /*!< Unique board ID, driver created*/ + uint32_t ulSystemError; /*!< System error */ + uint32_t ulPhysicalAddress; /*!< Physical memory address */ + uint32_t ulIrqNumber; /*!< Hardware interrupt number */ + uint8_t bIrqEnabled; /*!< Hardware interrupt enable flag */ + uint32_t ulChannelCnt; /*!< Number of available channels */ + uint32_t ulDpmTotalSize; /*!< Dual-Port memory size in bytes */ + SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK tSystemInfo; /*!< System information */ +} __CIFx_PACKED_POST BOARD_INFORMATION; + +/*****************************************************************************/ +/*! Channel Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CHANNEL_INFORMATIONtag +{ + char abBoardName[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board name */ + char abBoardAlias[CIFx_MAX_INFO_NAME_LENTH]; /*!< Global board alias name */ + uint32_t ulDeviceNumber; /*!< Global board device number */ + uint32_t ulSerialNumber; /*!< Global board serial number */ + + uint16_t usFWMajor; /*!< Major Version of Channel Firmware */ + uint16_t usFWMinor; /*!< Minor Version of Channel Firmware */ + uint16_t usFWBuild; /*!< Build number of Channel Firmware */ + uint16_t usFWRevision; /*!< Revision of Channel Firmware */ + uint8_t bFWNameLength; /*!< Length of FW Name */ + uint8_t abFWName[63]; /*!< Firmware Name */ + uint16_t usFWYear; /*!< Build Year of Firmware */ + uint8_t bFWMonth; /*!< Build Month of Firmware (1..12) */ + uint8_t bFWDay; /*!< Build Day of Firmware (1..31) */ + + uint32_t ulChannelError; /*!< Channel error */ + uint32_t ulOpenCnt; /*!< Channel open counter */ + uint32_t ulPutPacketCnt; /*!< Number of put packet commands */ + uint32_t ulGetPacketCnt; /*!< Number of get packet commands */ + uint32_t ulMailboxSize; /*!< Mailbox packet size in bytes */ + uint32_t ulIOInAreaCnt; /*!< Number of IO IN areas */ + uint32_t ulIOOutAreaCnt; /*!< Number of IO OUT areas */ + uint32_t ulHskSize; /*!< Size of the handshake cells */ + uint32_t ulNetxFlags; /*!< Actual netX state flags */ + uint32_t ulHostFlags; /*!< Actual Host flags */ + uint32_t ulHostCOSFlags; /*!< Actual Host COS flags */ + uint32_t ulDeviceCOSFlags; /*!< Actual Device COS flags */ + +} __CIFx_PACKED_POST CHANNEL_INFORMATION; + +/*****************************************************************************/ +/*! IO Area Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CHANNEL_IO_INFORMATIONtag +{ + uint32_t ulTotalSize; /*!< Total IO area size in byte */ + uint32_t ulReserved; /*!< reserved for further use */ + uint32_t ulIOMode; /*!< Exchange mode */ +} __CIFx_PACKED_POST CHANNEL_IO_INFORMATION; + +/*****************************************************************************/ +/*! Memory Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void** ppvMemoryPtr; /*!< Memory pointer */ + uint32_t* pulMemorySize; /*!< Complete size of the mapped memory */ + uint32_t ulChannel; /*!< Requested channel number */ + uint32_t* pulChannelStartOffset;/*!< Start offset of the requested channel */ + uint32_t* pulChannelSize; /*!< Memory size of the requested channel */ +} __CIFx_PACKED_POST MEMORY_INFORMATION; + +/*****************************************************************************/ +/*! PLC Memory Information structure */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct PLC_MEMORY_INFORMATIONtag +{ + void* pvMemoryID; /*!< Identification of the memory area */ + void** ppvMemoryPtr; /*!< Memory pointer */ + uint32_t ulAreaDefinition; /*!< Input/output area */ + uint32_t ulAreaNumber; /*!< Area number */ + uint32_t* pulIOAreaStartOffset; /*!< Start offset */ + uint32_t* pulIOAreaSize; /*!< Memory size */ +} __CIFx_PACKED_POST PLC_MEMORY_INFORMATION; + + +/***************************************************************************/ +/* Driver dependent information */ + +#define CIFX_MAX_PACKET_SIZE 1596 /*!< Maximum size of the RCX packet in bytes */ +#define CIFX_PACKET_HEADER_SIZE 40 /*!< Maximum size of the RCX packet header in bytes */ +#define CIFX_MAX_DATA_SIZE (CIFX_MAX_PACKET_SIZE - CIFX_PACKET_HEADER_SIZE) /*!< Maximum RCX packet data size */ + +#define CIFX_MSK_PACKET_ANSWER 0x00000001 /*!< Packet answer bit */ + +/*****************************************************************************/ +/*! Packet header */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_PACKET_HEADERtag +{ + uint32_t ulDest; /*!< destination of packet, process queue */ + uint32_t ulSrc; /*!< source of packet, process queue */ + uint32_t ulDestId; /*!< destination reference of packet */ + uint32_t ulSrcId; /*!< source reference of packet */ + uint32_t ulLen; /*!< length of packet data without header */ + uint32_t ulId; /*!< identification handle of sender */ + uint32_t ulState; /*!< status code of operation */ + uint32_t ulCmd; /*!< packet command defined in TLR_Commands.h */ + uint32_t ulExt; /*!< extension */ + uint32_t ulRout; /*!< router */ +} __CIFx_PACKED_POST CIFX_PACKET_HEADER; + +/*****************************************************************************/ +/*! Definition of the rcX Packet */ +/*****************************************************************************/ +typedef __CIFx_PACKED_PRE struct CIFX_PACKETtag +{ + CIFX_PACKET_HEADER tHeader; /**! */ + uint8_t abData[CIFX_MAX_DATA_SIZE]; +} __CIFx_PACKED_POST CIFX_PACKET; + +#define CIFX_CALLBACK_ACTIVE 0 +#define CIFX_CALLBACK_FINISHED 1 +typedef void(APIENTRY *PFN_PROGRESS_CALLBACK)(uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, int8_t bFinished, int32_t lError); +typedef void(APIENTRY *PFN_RECV_PKT_CALLBACK)(CIFX_PACKET* ptRecvPkt, void* pvUser); +typedef void(APIENTRY *PFN_NOTIFY_CALLBACK) (uint32_t ulNotification, uint32_t ulDataLen, void* pvData, void* pvUser); + +#define DOWNLOAD_MODE_FIRMWARE 1 +#define DOWNLOAD_MODE_CONFIG 2 +#define DOWNLOAD_MODE_FILE 3 +#define DOWNLOAD_MODE_BOOTLOADER 4 /*!< Download bootloader update to target. */ +#define DOWNLOAD_MODE_LICENSECODE 5 /*!< License update code. */ +#define DOWNLOAD_MODE_MODULE 6 + + +/*************************************************************************** +* API Functions +***************************************************************************/ + +/* Global driver functions */ +int32_t APIENTRY xDriverOpen ( CIFXHANDLE* phDriver); +int32_t APIENTRY xDriverClose ( CIFXHANDLE hDriver); +int32_t APIENTRY xDriverGetInformation ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +int32_t APIENTRY xDriverGetErrorDescription ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +int32_t APIENTRY xDriverEnumBoards ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +int32_t APIENTRY xDriverEnumChannels ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); +int32_t APIENTRY xDriverMemoryPointer ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd,void* pvMemoryInfo); +int32_t APIENTRY xDriverRestartDevice ( CIFXHANDLE hDriver, char* szBoardName, void* pvData); + +/* System device depending functions */ +int32_t APIENTRY xSysdeviceOpen ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +int32_t APIENTRY xSysdeviceClose ( CIFXHANDLE hSysdevice); +int32_t APIENTRY xSysdeviceGetMBXState ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +int32_t APIENTRY xSysdevicePutPacket ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceGetPacket ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceInfo ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +int32_t APIENTRY xSysdeviceFindFirstFile ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceFindNextFile ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceDownload ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xSysdeviceUpload ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xSysdeviceReset ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +int32_t APIENTRY xSysdeviceResetEx ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); +int32_t APIENTRY xSysdeviceBootstart ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); + +int32_t APIENTRY xSysdeviceExtendedMemory ( CIFXHANDLE hSysdevice, uint32_t ulCmd, CIFX_EXTENDED_MEMORY_INFORMATION* ptExtMemData); + +/* Channel depending functions */ +int32_t APIENTRY xChannelOpen ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +int32_t APIENTRY xChannelClose ( CIFXHANDLE hChannel); +int32_t APIENTRY xChannelFindFirstFile ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xChannelFindNextFile ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xChannelDownload ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t APIENTRY xChannelUpload ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +int32_t APIENTRY xChannelGetMBXState ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +int32_t APIENTRY xChannelPutPacket ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +int32_t APIENTRY xChannelGetPacket ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +int32_t APIENTRY xChannelGetSendPacket ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt); + +int32_t APIENTRY xChannelConfigLock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelReset ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +int32_t APIENTRY xChannelInfo ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +int32_t APIENTRY xChannelWatchdog ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger); +int32_t APIENTRY xChannelHostState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelBusState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t APIENTRY xChannelDMAState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState); + +int32_t APIENTRY xChannelIOInfo ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +int32_t APIENTRY xChannelIORead ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +int32_t APIENTRY xChannelIOWrite ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +int32_t APIENTRY xChannelIOReadSendData ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +int32_t APIENTRY xChannelControlBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelCommonStatusBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelExtendedStatusBlock ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +int32_t APIENTRY xChannelUserBlock ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +int32_t APIENTRY xChannelPLCMemoryPtr ( CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo); +int32_t APIENTRY xChannelPLCIsReadReady ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulReadState); +int32_t APIENTRY xChannelPLCIsWriteReady ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulWriteState); +int32_t APIENTRY xChannelPLCActivateWrite ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); +int32_t APIENTRY xChannelPLCActivateRead ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); + +int32_t APIENTRY xChannelRegisterNotification ( CIFXHANDLE hChannel, uint32_t ulNotification, PFN_NOTIFY_CALLBACK pfnCallback, void* pvUser); +int32_t APIENTRY xChannelUnregisterNotification( CIFXHANDLE hChannel, uint32_t ulNotification); +int32_t APIENTRY xChannelSyncState ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulTimeout, uint32_t* pulErrorCount); +/***************************************************************************/ + +/*************************************************************************** +* API Functionpointer definitions +***************************************************************************/ + +/* Global driver functions */ +typedef int32_t (APIENTRY *PFN_XDRIVEROPEN) ( CIFXHANDLE* phDriver); +typedef int32_t (APIENTRY *PFN_XDRIVERCLOSE) ( CIFXHANDLE hDriver); +typedef int32_t (APIENTRY *PFN_XDRIVERGETINFORMATION) ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERGETERRORDESCRIPTION) ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +typedef int32_t (APIENTRY *PFN_XDRIVERENUMBOARDS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERENUMCHANNELS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERMEMORYPOINTER) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd, void* pvMemoryInfo); +typedef int32_t (APIENTRY *PFN_XDRIVERRESTARTDEVICE) ( CIFXHANDLE hDriver, char* szBoardName, void* pvData); + +/* System device depending functions */ +typedef int32_t (APIENTRY *PFN_XSYSDEVICEOPEN) ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +typedef int32_t (APIENTRY *PFN_XSYSDEVICECLOSE) ( CIFXHANDLE hSysdevice); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEGETMBXSTATE) ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEPUTPACKET) ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEGETPACKET) ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEINFO) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICEFINDFIRSTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEFINDNEXTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEDOWNLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEUPLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICERESET) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XSYSDEVICERESETEX) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); +typedef int32_t (APIENTRY *PFN_XSYSDEVICEBOOTSTART) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); + +typedef int32_t (APIENTRY *PFN_XSYSDEVICEEXTENDEDMEMORY) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, CIFX_EXTENDED_MEMORY_INFORMATION* ptExtMemData); + +/* Channel depending functions */ +typedef int32_t (APIENTRY *PFN_XCHANNELOPEN) ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +typedef int32_t (APIENTRY *PFN_XCHANNELCLOSE) ( CIFXHANDLE hChannel); +typedef int32_t (APIENTRY *PFN_XCHANNELFINDFIRSTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELFINDNEXTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XCHANNELDOWNLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELUPLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_XCHANNELGETMBXSTATE) ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_XCHANNELPUTPACKET) ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELGETPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELGETSENDPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt); + +typedef int32_t (APIENTRY *PFN_XCHANNELCONFIGLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELRESET) ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELINFO) ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_XCHANNELWATCHDOG) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger); +typedef int32_t (APIENTRY *PFN_XCHANNELHOSTSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELBUSSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELDMASTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState); + +typedef int32_t (APIENTRY *PFN_XCHANNELIOINFO) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELIOREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELIOWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_XCHANNELIOREADSENDDATA) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_XCHANNELCONTROLBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELCOMMONSTATUSBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELEXTENDEDSTATUSBLOCK)( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_XCHANNELUSERBLOCK) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_XCHANNELPLCMEMORYPTR) ( CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCISREADREADY) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulReadState); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCISWRITEREADY) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulWriteState); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCACTIVATEWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); +typedef int32_t (APIENTRY *PFN_XCHANNELPLCACTIVATEREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber); + +typedef int32_t (APIENTRY *PFN_XCHANNELREGISTERNOTIFICATION) ( CIFXHANDLE hChannel, uint32_t ulNotification, PFN_NOTIFY_CALLBACK pfnCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_XCHANNELUNREGISTERNOTIFICATION)( CIFXHANDLE hChannel, uint32_t ulNotification); +typedef int32_t (APIENTRY *PFN_XCHANNELSYNCSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulTimeout, uint32_t* pulErrorCount); +/***************************************************************************/ + +#ifdef __cplusplus +} +#endif + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #pragma pack() /* Always align structures to default boundery */ + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +#undef __CIFx_PACKED_PRE +#undef __CIFx_PACKED_POST + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __CIFxUSER_H */ diff --git a/libcifx/Toolkit/Common/cifXAPI/netXAPI.h b/libcifx/Toolkit/Common/cifXAPI/netXAPI.h new file mode 100644 index 0000000..2da18b8 --- /dev/null +++ b/libcifx/Toolkit/Common/cifXAPI/netXAPI.h @@ -0,0 +1,381 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netXAPI.h 14572 2018-10-15 11:24:27Z Robert $: + + Description: + Global netX API definition for netX drivers + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-10-10 - Added type cast to error definitions for 64Bit systems + 2018-11-06 - Added function pointer PFN_SYSDEVICERESETEX for new function xSysdeviceResetEx() + 2018-10-12 - Changed file header to actual version + - Using new Hilscher headers and definitions + 2015-07-24 - Reviewed consolidated from several sources + 2013-06-24 - Added APIENTRY to NXAPI callback prototypes + 2011-01-11 - Updated data types to ISOC99 + - Additional functions for netXTransport added + 2009-05-04 - Declaration for nxDrvGetConfig() added + 2008-07-08 - xSysdevice/xChannel download included + 2008-02-19 - New error number included + 2008-02-01 - NXDRV_DEVICE_INFORMATION structure extended by + complete system information block + - New error number included + 2007-11-09 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup NETX_API nXDRV API implementation */ +/*! \{ */ +/*****************************************************************************/ + +/* prevent multiple inclusion */ +#ifndef __NETxAPI_H +#define __NETxAPI_H + +#pragma once + +#include "cifXUser.h" + +#ifdef __cplusplus + extern "C" { +#endif /* _cplusplus */ + + +/***************************************************************************** +*! netX API Error Definition +*****************************************************************************/ +#define NXAPI_NO_ERROR ((int32_t)0x00000000L) + +#define NXAPI_NOT_INITIALIZED ((int32_t)0x00000010L) +#define NXAPI_NO_WORKING_DIRECTORY ((int32_t)0x00000011L) +#define NXAPI_NO_ENTRIES ((int32_t)0x00000012L) +#define NXAPI_NO_ENTRY_FOUND ((int32_t)0x00000013L) +#define NXAPI_UNKOWN_COMMAND ((int32_t)0x00000014L) +#define NXAPI_INVALID_POINTER ((int32_t)0x00000015L) +#define NXAPI_INVALID_PARAMETER ((int32_t)0x00000016L) +#define NXAPI_BUFFER_TOO_SHORT ((int32_t)0x00000017L) + +#define NXAPI_DRIVER_NOT_INITIALIZED ((int32_t)0x00000020L) +#define NXAPI_DRIVER_DLL_NOT_LOADED ((int32_t)0x00000021L) +#define NXAPI_DRIVER_INTERFACE_MISSING ((int32_t)0x00000022L) +#define NXAPI_DRIVER_FUNCTION_MISSING ((int32_t)0x00000023L) +#define NXAPI_DRIVER_NO_DEVICE_FOUND ((int32_t)0x00000024L) +#define NXAPI_DRIVER_DOWNLOAD_FAILED ((int32_t)0x00000025L) +#define NXAPI_DRIVER_INVALID_COMMAND ((int32_t)0x00000026L) + +#define NXAPI_DRIVER_DIRECTORY_CREATE ((int32_t)0x00000030L) +#define NXAPI_DRIVER_FILE_CREATE ((int32_t)0x00000031L) +#define NXAPI_DRIVER_FILE_READ ((int32_t)0x00000032L) +#define NXAPI_DRIVER_FILE_WRITE ((int32_t)0x00000032L) +#define NXAPI_DRIVER_FILE_DELETE ((int32_t)0x00000032L) + +/* Registry errors */ +#define NXAPI_DRIVER_REG_OPEN ((int32_t)0x00000040L) +#define NXAPI_DRIVER_REG_CLOSE ((int32_t)0x00000041L) + +#define NXAPI_DRIVER_REG_ENUM_KEY ((int32_t)0x00000043L) +#define NXAPI_DRIVER_REG_CREATE_KEY ((int32_t)0x00000044L) +#define NXAPI_DRIVER_REG_DELETE_KEY ((int32_t)0x00000045L) +#define NXAPI_DRIVER_REG_READ_KEY ((int32_t)0x00000046L) + +#define NXAPI_DRIVER_REG_ENUM_VALUE ((int32_t)0x00000047L) +#define NXAPI_DRIVER_REG_CREATE_VALUE ((int32_t)0x00000048L) +#define NXAPI_DRIVER_REG_DELETE_VALUE ((int32_t)0x00000049L) +#define NXAPI_DRIVER_REG_READ_VALUE ((int32_t)0x0000004AL) +#define NXAPI_DRIVER_REG_WRITE_VALUE ((int32_t)0x0000004BL) + + + +/***************************************************************************** +**** nxAPI Download Command definitions **** +*****************************************************************************/ +#define NXAPI_CMD_FIRMWARE 0x00000001L +#define NXAPI_CMD_CONFIGURATION 0x00000002L +#define NXAPI_CMD_WARMSTART 0x00000003L +#define NXAPI_CMD_BOOTLOADER 0x00000004L + +/***************************************************************************** +**** nxAPI Configuration Command definitions **** +*****************************************************************************/ +#define NXAPI_CMD_READ_DRIVER_CFG 0x00000001L +#define NXAPI_CMD_WRITE_DRIVER_CFG 0x00000002L +#define NXAPI_CMD_READ_CHANNEL_CFG 0x00000003L +#define NXAPI_CMD_WRITE_CHANNEL_CFG 0x00000004L + +#define NXAPI_CMD_READ_FILE_CFG 0x00000005L +#define NXAPI_CMD_DELETE_FW_FILE 0x00000006L +#define NXAPI_CMD_DELETE_CFG_FILE 0x00000007L +#define NXAPI_CMD_DELETE_ALL_FILES 0x00000008L + +#define NXAPI_CFG_DATATYPE_STRING 0x00000001L /* Null terminated string */ +#define NXAPI_CFG_DATATYPE_BINARY 0x00000003L +#define NXAPI_CFG_DATATYPE_DWORD 0x00000004L + + +/***************************************************************************** +**** INCLUDE FILES AND CONSTANT DEFINITIONS **** +*****************************************************************************/ +#define NXDRV_NAME_LENGTH 64 +#define NXDRV_VERSION_LENGTH 64 + +/* Global hardware driver type */ +#define NXDRV_TYPE_DPM 0x00000001 +#define NXDRV_TYPE_USB 0x00000002 +#define NXDRV_TYPE_SERIAL 0x00000004 +#define NXDRV_TYPE_ETH 0x00000008 + +/* Global driver Requirements */ +#define NXDRV_REQ_STARTUP_SW 0x00000001 + +/* Command Definitions */ +#define NXDRV_FIND_FIRST 1 +#define NXDRV_FIND_NEXT 2 + +/* Command definitions of Extended Name */ +#define NXCON_GET_FULL_NAME 1 +#define NXCON_GET_SHORT_NAME 2 + +/* defines of the nxCon functions */ +#define NXCON_MAX_LENGTH_CONNECTOR_IDENTIFIER 6 +#define NXCON_UUID_STRING_SIZE 37 +#define NXCON_FILE_NAME_LENGTH 256 +#define NXCON_DESCRIPTION_LENGTH 64 + +/*****************************************************************************/ +/*! typedef struct NXDRV_HW_INFORMATION +** Structure contains information about available drivers */ +/*****************************************************************************/ +typedef struct tagNXDRV_HW_INFORMATION +{ + char szDriverName[NXDRV_NAME_LENGTH]; /*!< Name of the driver */ + char szVersion[NXDRV_NAME_LENGTH]; /*!< Driver version */ + uint32_t ulDriverType; /*!< Driver type */ + uint32_t ulDriverRequirements; /*!< Driver requirements */ + uint32_t ulDeviceClass; /*!< Supported device class */ +} NXDRV_HW_INFORMATION, *PNXDRV_HW_INFORMATION; + +/*****************************************************************************/ +/*! typedef struct NXDRV_DEVICE_INFORMATION +** Structure contains the drivers device information. */ +/*****************************************************************************/ +typedef struct tagNXDRV_DEVICE_INFORMATION +{ + CIFXHANDLE hDevice; /*!< Device handle */ + char szDeviceName[NXDRV_NAME_LENGTH];/*!< Device name */ + SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK tSystemInfoBlock; /*!< Device System Info Block */ +} NXDRV_DEVICE_INFORMATION, *PNXDRV_DEVICE_INFORMATION; + +/*****************************************************************************/ +/*! typedef struct NXDRV_CONFIG_INFORMATION +** Structure contains the driver configuration information. */ +/*****************************************************************************/ +typedef struct tagNXDRV_DRIVER_CFG_DATA_INFO +{ + char szValueName[NXDRV_NAME_LENGTH]; /*!< Value name */ + uint32_t ulValueIndex; /*!< Value index */ + uint32_t ulValueType; /*!< Value type */ + uint32_t ulValueSize; /*!< Value size */ +} NXDRV_DRIVER_CFG_DATA_INFO, *PNXDRV_DRIVER_CFG_DATA_INFO; + + +typedef int32_t(APIENTRY *PFN_NXDRV_INFO) (uint32_t ulSize, void* pvInfo); +typedef void(APIENTRY *PFN_NXAPI_PROGRESS_CALLBACK)(uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, char bFinished, int32_t lError); +typedef void(APIENTRY *PFN_NXAPI_BROWSE_CALLBACK) (uint32_t ulBoard,BOARD_INFORMATION* ptBoardInfo, uint32_t ulStep, uint32_t ulMaxStep, void* pvUser, char bFinished, int32_t lError); + +/*****************************************************************************/ +/*! netX API driver functions */ +/*****************************************************************************/ +int32_t APIENTRY nxDrvInit ( void); +int32_t APIENTRY nxDrvExit ( void); +int32_t APIENTRY nxDrvGetInformation ( uint32_t ulSize, + PNXDRV_HW_INFORMATION ptDrvInfo); + +int32_t APIENTRY nxDrvFindDevice ( uint32_t ulCmd, uint32_t ulInfoSize, + NXDRV_DEVICE_INFORMATION* ptDeviceInfo, uint32_t* pulSearchIdx); + +int32_t APIENTRY nxDrvBrowseDevices ( PFN_NXAPI_BROWSE_CALLBACK pfnCallback, void* pvUser); + +int32_t APIENTRY nxDrvDownload ( CIFXHANDLE hDevice, uint32_t ulChannel, uint32_t ulCmd, + uint32_t ulFileSize, char* pszFileName, unsigned char* pabFileData, + void* pvUser, PFN_NXAPI_PROGRESS_CALLBACK pfnCallback); + +int32_t APIENTRY nxDrvStart ( CIFXHANDLE hDevice, uint32_t ulChannel); +int32_t APIENTRY nxDrvStartEx ( CIFXHANDLE hDevice, uint32_t ulChannel, uint32_t ulResetTimeout, uint32_t ulMode); + +int32_t APIENTRY nxDrvGetConfigInfo ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, uint32_t ulSearchIndex, uint32_t ulBufferSize, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData); +int32_t APIENTRY nxDrvGetConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData, uint32_t ulBufferSize, void* pvData); +int32_t APIENTRY nxDrvSetConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData, uint32_t ulBufferSize, void* pvData); +int32_t APIENTRY nxDrvDeleteConfig ( CIFXHANDLE hDevice, uint32_t ulCmd, int32_t lChannel, NXDRV_DRIVER_CFG_DATA_INFO* ptCfgData); + +/*************************************************************************** +* Extension of nxAPI ( Connector extension ) +***************************************************************************/ +int32_t APIENTRY nxConGetConfig ( char* szUUID, uint32_t* pulConfigSize, char* pcConfig); +int32_t APIENTRY nxConSetConfig ( char* szUUID, char* pcConfig); +int32_t APIENTRY nxConCreateConfigDialog ( char* szUUID, void* pvParentWnd, void** pvDialogWnd); +int32_t APIENTRY nxConCloseConfigDialog ( char* szUUID, int32_t fSaveChanges); +int32_t APIENTRY nxConEnumerate ( uint32_t ulConnectorIdx, uint32_t ulSize, void* pvConnectorInfo); +int32_t APIENTRY nxConGetCorrespondName ( char* szSourceName, uint32_t ulCmd, uint32_t ulCorrespondSize, char* szCorrespondName); + +/*************************************************************************** +* CIFX Device Driver API Functions +***************************************************************************/ +/* Global driver functions */ +typedef int32_t (APIENTRY *PFN_DRVOPEN) ( CIFXHANDLE* phDriver); +typedef int32_t (APIENTRY *PFN_DRVCLOSE) ( CIFXHANDLE hDriver); +typedef int32_t (APIENTRY *PFN_DRVGETINFORMATION) ( CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo); +typedef int32_t (APIENTRY *PFN_DRVGETERRORDESCRIPTION) ( int32_t lError, char* szBuffer, uint32_t ulBufferLen); +typedef int32_t (APIENTRY *PFN_DRVENUMBOARDS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo); +typedef int32_t (APIENTRY *PFN_DRVENUMCHANNELS) ( CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo); + +/* System device depending functions */ +typedef int32_t (APIENTRY *PFN_SYSDEVICEOPEN) ( CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice); +typedef int32_t (APIENTRY *PFN_SYSDEVICECLOSE) ( CIFXHANDLE hSysdevice); +typedef int32_t (APIENTRY *PFN_SYSDEVICEGETMBXSTATE) ( CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_SYSDEVICEPUTPACKET) ( CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICEGETPACKET) ( CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICEINFO) ( CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo); + +typedef int32_t (APIENTRY *PFN_SYSDEVICEFINDFIRSTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_SYSDEVICEFINDNEXTFILE) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_SYSDEVICEDOWNLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_SYSDEVICEUPLOAD) ( CIFXHANDLE hSysdevice, uint32_t ulChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_SYSDEVICERESET) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_SYSDEVICERESETEX) ( CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); + +typedef int32_t (APIENTRY *PFN_CHANNELOPEN) ( CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel); +typedef int32_t (APIENTRY *PFN_CHANNELCLOSE) ( CIFXHANDLE hChannel); + +typedef int32_t (APIENTRY *PFN_CHANNELFINDFIRSTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_CHANNELFINDNEXTFILE) ( CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_CHANNELDOWNLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +typedef int32_t (APIENTRY *PFN_CHANNELUPLOAD) ( CIFXHANDLE hChannel, uint32_t ulMode, char* pszFileName, unsigned char* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +typedef int32_t (APIENTRY *PFN_CHANNELGETMBXSTATE) ( CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount); +typedef int32_t (APIENTRY *PFN_CHANNELPUTPACKET) ( CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELGETPACKET) ( CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout); + +typedef int32_t (APIENTRY *PFN_CHANNELCONTROLBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELCOMMONSTATUSBLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELEXTENDEDSTATUSBLOCK)( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELUSERBLOCK) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData); + +typedef int32_t (APIENTRY *PFN_CHANNELCONFIGLOCK) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELRESET) ( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELINFO) ( CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo); +typedef int32_t (APIENTRY *PFN_CHANNELHOSTSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELBUSSTATE) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELIOINFO) ( CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData); +typedef int32_t (APIENTRY *PFN_CHANNELIOREAD) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); +typedef int32_t (APIENTRY *PFN_CHANNELIOWRITE) ( CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout); + + +typedef struct NXDRV_FUNCTION_TABLEtag +{ + /* The cifX API interface */ + PFN_DRVOPEN pfnDriverOpen; /*!< xDriverOpen */ + PFN_DRVCLOSE pfnDriverClose; + PFN_DRVGETINFORMATION pfnDriverGetInformation; + PFN_DRVGETERRORDESCRIPTION pfnDriverGetErrorDescription; + PFN_DRVENUMBOARDS pfnDriverEnumBoards; + PFN_DRVENUMCHANNELS pfnDriverEnumChannels; + + /* System channel functions */ + PFN_SYSDEVICEOPEN pfnSysdeviceOpen; + PFN_SYSDEVICECLOSE pfnSysdeviceClose; + PFN_SYSDEVICEGETMBXSTATE pfnSysdeviceGetMBXState; + PFN_SYSDEVICEPUTPACKET pfnSysdevicePutPacket; + PFN_SYSDEVICEGETPACKET pfnSysdeviceGetPacket; + PFN_SYSDEVICEINFO pfnSysdeviceInfo; + PFN_SYSDEVICEFINDFIRSTFILE pfnSysdeviceFindFirstFile; + PFN_SYSDEVICEFINDNEXTFILE pfnSysdeviceFindNextFile; + + PFN_SYSDEVICEDOWNLOAD pfnSysdeviceDownload; + PFN_SYSDEVICEUPLOAD pfnSysdeviceUpload; + + PFN_SYSDEVICERESET pfnSysdeviceReset; + PFN_SYSDEVICERESETEX pfnSysdeviceResetEx; + + /* Communication channel functions */ + PFN_CHANNELOPEN pfnChannelOpen; + PFN_CHANNELCLOSE pfnChannelClose; + PFN_CHANNELFINDFIRSTFILE pfnChannelFindFirstFile; + PFN_CHANNELFINDNEXTFILE pfnChannelFindNextFile; + + PFN_CHANNELDOWNLOAD pfnChannelDownload; + PFN_CHANNELUPLOAD pfnChannelUpload; + + PFN_CHANNELGETMBXSTATE pfnChannelGetMBXState; + PFN_CHANNELPUTPACKET pfnChannelPutPacket; + PFN_CHANNELGETPACKET pfnChannelGetPacket; + + PFN_CHANNELCONTROLBLOCK pfnChannelControlBlock; + PFN_CHANNELCOMMONSTATUSBLOCK pfnChannelCommonStatusBlock; + PFN_CHANNELEXTENDEDSTATUSBLOCK pfnChannelExtendedStatusBlock; +/* PFN_CHANNELUSERBLOCK pfnChannelUserBlock; */ + + PFN_CHANNELCONFIGLOCK pfnChannelConfigLock; + PFN_CHANNELRESET pfnChannelReset; + PFN_CHANNELINFO pfnChannelInfo; + PFN_CHANNELHOSTSTATE pfnChannelHostState; + PFN_CHANNELBUSSTATE pfnChannelBusState; + PFN_CHANNELIOINFO pfnChannelIOInfo; + PFN_CHANNELIOREAD pfnChannelIORead; + PFN_CHANNELIOWRITE pfnChannelIOWrite; + +} NXDRV_FUNCTION_TABLE, *PNXDRV_FUNCTION_TABLE; + +/*****************************************************************************/ +/*! typedef struct NXDRV_INFORMATION +** Structure contains the cifX driver information about available driver DLLs*/ +/*****************************************************************************/ +typedef struct tagNXDRV_INFORMATION +{ + CIFXHANDLE hDriver; + int32_t lError; + NXDRV_FUNCTION_TABLE* ptFnc; +} NXDRV_INFORMATION, *PNXDRV_INFORMATION; + +/*************************************************************************** +* Extension of nxAPI ( Connector extension ) +***************************************************************************/ + +/*****************************************************************************/ +/*! typedef struct NXCON_CONNECTOR_INFO_T +** Structure contains the connector information of a available connector */ +/*****************************************************************************/ +typedef struct NXCON_CONNECTOR_INFO_Ttag +{ + char szConnectorUUID [NXCON_UUID_STRING_SIZE]; /*!< UUID of the selected connector */ + char szIdentifier [NXCON_MAX_LENGTH_CONNECTOR_IDENTIFIER]; /*!< Identifier of the connector */ + char szFileName [NXCON_FILE_NAME_LENGTH]; /*!< File name of the connector */ + char szFullFileName [NXCON_FILE_NAME_LENGTH]; /*!< Full file name of the connector */ + char szDescription [NXCON_DESCRIPTION_LENGTH]; /*!< Description of the connector */ + uint32_t ulConnectorType; /*!< Supported types of the selected connector */ +} NXCON_CONNECTOR_INFO_T, *PNXCON_CONNECTOR_INFO_T; + +/***************************************************************************/ + +#ifdef __cplusplus +} +#endif + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __NETxAPI_H */ diff --git a/libcifx/Toolkit/Doc/html/images/hilscher_logo.jpg b/libcifx/Toolkit/Doc/html/images/hilscher_logo.jpg new file mode 100644 index 0000000..3572a33 Binary files /dev/null and b/libcifx/Toolkit/Doc/html/images/hilscher_logo.jpg differ diff --git a/libcifx/Toolkit/Doxyfile.cfg b/libcifx/Toolkit/Doxyfile.cfg new file mode 100644 index 0000000..ae4b1f0 --- /dev/null +++ b/libcifx/Toolkit/Doxyfile.cfg @@ -0,0 +1,285 @@ +# Doxyfile 1.4.3 + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- +PROJECT_NAME = "cifX DPM Toolkit" +PROJECT_NUMBER = +OUTPUT_DIRECTORY = Doc +CREATE_SUBDIRS = NO +OUTPUT_LANGUAGE = English +USE_WINDOWS_ENCODING = YES +BRIEF_MEMBER_DESC = YES +REPEAT_BRIEF = YES +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the +ALWAYS_DETAILED_SEC = YES +INLINE_INHERITED_MEMB = NO +FULL_PATH_NAMES = YES +STRIP_FROM_PATH = +STRIP_FROM_INC_PATH = +SHORT_NAMES = NO +JAVADOC_AUTOBRIEF = NO +MULTILINE_CPP_IS_BRIEF = NO +DETAILS_AT_TOP = NO +INHERIT_DOCS = YES +DISTRIBUTE_GROUP_DOC = NO +SEPARATE_MEMBER_PAGES = NO +TAB_SIZE = 8 +ALIASES = +OPTIMIZE_OUTPUT_FOR_C = NO +OPTIMIZE_OUTPUT_JAVA = NO +SUBGROUPING = YES +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- +EXTRACT_ALL = YES +EXTRACT_PRIVATE = YES +EXTRACT_STATIC = YES +EXTRACT_LOCAL_CLASSES = YES +EXTRACT_LOCAL_METHODS = YES +HIDE_UNDOC_MEMBERS = NO +HIDE_UNDOC_CLASSES = NO +HIDE_FRIEND_COMPOUNDS = NO +HIDE_IN_BODY_DOCS = NO +INTERNAL_DOCS = NO +CASE_SENSE_NAMES = YES +HIDE_SCOPE_NAMES = NO +SHOW_INCLUDE_FILES = YES +INLINE_INFO = YES +SORT_MEMBER_DOCS = YES +SORT_BRIEF_DOCS = NO +SORT_BY_SCOPE_NAME = NO +GENERATE_TODOLIST = YES +GENERATE_TESTLIST = NO +GENERATE_BUGLIST = YES +GENERATE_DEPRECATEDLIST= YES +ENABLED_SECTIONS = +MAX_INITIALIZER_LINES = 10 +SHOW_USED_FILES = NO +SHOW_DIRECTORIES = YES +FILE_VERSION_FILTER = +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- +QUIET = NO +WARNINGS = YES +WARN_IF_UNDOCUMENTED = YES +WARN_IF_DOC_ERROR = YES +WARN_NO_PARAMDOC = YES +WARN_FORMAT = "$file($line) $text" +WARN_LOGFILE = doxygen.log +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- +INPUT = . +FILE_PATTERNS = *.c \ + *.h +RECURSIVE = YES +EXCLUDE = +EXCLUDE_SYMLINKS = NO +EXCLUDE_PATTERNS = +EXAMPLE_PATH = . +EXAMPLE_PATTERNS = +EXAMPLE_RECURSIVE = YES +IMAGE_PATH = +INPUT_FILTER = +FILTER_PATTERNS = +FILTER_SOURCE_FILES = NO +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- +SOURCE_BROWSER = NO +INLINE_SOURCES = NO +STRIP_CODE_COMMENTS = YES +REFERENCED_BY_RELATION = YES +REFERENCES_RELATION = YES +USE_HTAGS = NO +VERBATIM_HEADERS = YES +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- +ALPHABETICAL_INDEX = YES +COLS_IN_ALPHA_INDEX = 5 +IGNORE_PREFIX = +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- +GENERATE_HTML = YES +HTML_OUTPUT = +HTML_FILE_EXTENSION = +HTML_HEADER = ./doxygen/header.html +HTML_FOOTER = ./doxygen/footer.html +HTML_STYLESHEET = ./doxygen/hilscher.css +HTML_ALIGN_MEMBERS = YES +GENERATE_HTMLHELP = YES +CHM_FILE = cifXToolkit.chm +HHC_LOCATION = "D:/Programme/HTML Help Workshop/hhc.exe" +GENERATE_CHI = NO +BINARY_TOC = NO +TOC_EXPAND = NO +DISABLE_INDEX = YES +ENUM_VALUES_PER_LINE = 4 +GENERATE_TREEVIEW = YES +TREEVIEW_WIDTH = 250 +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- +GENERATE_LATEX = YES +LATEX_OUTPUT = +LATEX_CMD_NAME = latex +MAKEINDEX_CMD_NAME = +COMPACT_LATEX = NO +PAPER_TYPE = a4 +EXTRA_PACKAGES = +LATEX_HEADER = ./doxygen/header.tex +PDF_HYPERLINKS = YES +USE_PDFLATEX = YES +LATEX_BATCHMODE = YES +LATEX_HIDE_INDICES = NO +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- +GENERATE_RTF = NO +RTF_OUTPUT = +COMPACT_RTF = NO +RTF_HYPERLINKS = YES +RTF_STYLESHEET_FILE = +RTF_EXTENSIONS_FILE = +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- +GENERATE_MAN = NO +MAN_OUTPUT = +MAN_EXTENSION = .3 +MAN_LINKS = YES +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- +GENERATE_XML = NO +XML_OUTPUT = xml +XML_SCHEMA = +XML_DTD = +XML_PROGRAMLISTING = YES +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- +GENERATE_AUTOGEN_DEF = NO +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- +GENERATE_PERLMOD = NO +PERLMOD_LATEX = NO +PERLMOD_PRETTY = YES +PERLMOD_MAKEVAR_PREFIX = +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- +ENABLE_PREPROCESSING = YES +MACRO_EXPANSION = NO +EXPAND_ONLY_PREDEF = NO +SEARCH_INCLUDES = YES +INCLUDE_PATH = +INCLUDE_FILE_PATTERNS = +PREDEFINED = "DECLARE_INTERFACE(name)=class name" \ + "STDMETHOD(result,name)=virtual result name" \ + "PURE= = 0" \ + THIS_= \ + THIS= \ + DECLARE_REGISTRY_RESOURCEID=// \ + DECLARE_PROTECT_FINAL_CONSTRUCT=// \ + "DECLARE_AGGREGATABLE(Class)= " \ + "DECLARE_REGISTRY_RESOURCEID(Id)= " \ + DECLARE_MESSAGE_MAP \ + = \ + BEGIN_MESSAGE_MAP=/* \ + END_MESSAGE_MAP=*/// \ + BEGIN_COM_MAP=/* \ + END_COM_MAP=*/// \ + BEGIN_PROP_MAP=/* \ + END_PROP_MAP=*/// \ + BEGIN_MSG_MAP=/* \ + END_MSG_MAP=*/// \ + BEGIN_PROPERTY_MAP=/* \ + END_PROPERTY_MAP=*/// \ + BEGIN_OBJECT_MAP=/* \ + END_OBJECT_MAP()=*/// \ + DECLARE_VIEW_STATUS=// \ + "STDMETHOD(a)=HRESULT a" \ + "ATL_NO_VTABLE= " \ + "__declspec(a)= " \ + BEGIN_CONNECTION_POINT_MAP=/* \ + END_CONNECTION_POINT_MAP=*/// \ + "DECLARE_DYNAMIC(class)= " \ + "IMPLEMENT_DYNAMIC(class1, class2)= " \ + "DECLARE_DYNCREATE(class)= " \ + "IMPLEMENT_DYNCREATE(class1, class2)= " \ + "IMPLEMENT_SERIAL(class1, class2, class3)= " \ + "DECLARE_MESSAGE_MAP()= " \ + TRY=try \ + "CATCH_ALL(e)= catch(...)" \ + END_CATCH_ALL= \ + "THROW_LAST()= throwRUNTIME_CLASS(class)=class" \ + MAKEINTRESOURCE(nId)=nId \ + "IMPLEMENT_REGISTER(v, w, x, y, z)= " \ + ASSERT(x)=assert(x) \ + ASSERT_VALID(x)=assert(x) \ + TRACE0(x)=printf(x) \ + "OS_ERR(A,B)={ #A, B }" \ + __cplusplus \ + "DECLARE_OLECREATE(class)= " \ + "BEGIN_DISPATCH_MAP(class1, class2)= " \ + "INTERFACE_PART(class, id, name)= " \ + END_INTERFACE_MAP()= \ + "DISP_FUNCTION(class, name, function, result, id)=" \ + END_DISPATCH_MAP()= \ + "IMPLEMENT_OLECREATE2(class, name, id1, id2, id3, id4, id5, id6, id7, id8, id9, id10, id11)=" +EXPAND_AS_DEFINED = +SKIP_FUNCTION_MACROS = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- +TAGFILES = +GENERATE_TAGFILE = +ALLEXTERNALS = NO +EXTERNAL_GROUPS = NO +PERL_PATH = +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- +CLASS_DIAGRAMS = YES +HIDE_UNDOC_RELATIONS = NO +HAVE_DOT = YES +CLASS_GRAPH = YES +COLLABORATION_GRAPH = YES +GROUP_GRAPHS = YES +UML_LOOK = NO +TEMPLATE_RELATIONS = YES +INCLUDE_GRAPH = YES +INCLUDED_BY_GRAPH = YES +CALL_GRAPH = YES +GRAPHICAL_HIERARCHY = YES +DIRECTORY_GRAPH = YES +DOT_IMAGE_FORMAT = png +DOT_PATH = +DOTFILE_DIRS = +MAX_DOT_GRAPH_WIDTH = 1024 +MAX_DOT_GRAPH_HEIGHT = 1024 +MAX_DOT_GRAPH_DEPTH = 1000 +DOT_TRANSPARENT = NO +DOT_MULTI_TARGETS = NO +GENERATE_LEGEND = YES +DOT_CLEANUP = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- +SEARCHENGINE = NO diff --git a/libcifx/Toolkit/HilscherSLA.pdf b/libcifx/Toolkit/HilscherSLA.pdf new file mode 100644 index 0000000..116577d Binary files /dev/null and b/libcifx/Toolkit/HilscherSLA.pdf differ diff --git a/libcifx/Toolkit/OSAbstraction/OS_Custom.c b/libcifx/Toolkit/OSAbstraction/OS_Custom.c new file mode 100644 index 0000000..fed4579 --- /dev/null +++ b/libcifx/Toolkit/OSAbstraction/OS_Custom.c @@ -0,0 +1,447 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Custom.c 14561 2022-07-26 13:22:39Z RMayer $: + + Description: + Target system abstraction layer + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2022-04-14 Added options and functions to handle cached I/O buffer access via PLC functions + 2021-09-01 - updated function parameters to match definitions in OS_Dependent.h. + - changed OS-Time() parameters to 64Bit data types + 2011-12-13 added OS_Time() function body + 2006-08-07 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file OS_Custom.c +* Sample Target system abstraction layer. Implementation must be done +* according to used target system */ +/*****************************************************************************/ + +#include "OS_Dependent.h" + +#error "Implement target system abstraction in this file" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_OS_ABSTRACTION Operating System Abstraction +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Memory allocation function +* \param ulSize Length of memory to allocate +* \return Pointer to allocated memory */ +/*****************************************************************************/ +void* OS_Memalloc(uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Memory freeing function +* \param pvMem Memory block to free */ +/*****************************************************************************/ +void OS_Memfree(void* pvMem) +{ +} + +/*****************************************************************************/ +/*! Memory reallocating function (used for resizing dynamic toolkit arrays) +* \param pvMem Memory block to resize +* \param ulNewSize new size of the memory block +* \return pointer to the resized memory block */ +/*****************************************************************************/ +void* OS_Memrealloc(void* pvMem, uint32_t ulNewSize) +{ +} + +/*****************************************************************************/ +/*! Memory setting +* \param pvMem Memory block +* \param bFill Byte to use for memory initialization +* \param ulSize Memory size for initialization) */ +/*****************************************************************************/ +void OS_Memset(void* pvMem, unsigned char bFill, uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Copy memory from one block to another +* \param pvDest Destination memory block +* \param pvSrc Source memory block +* \param ulSize Copy size in bytes */ +/*****************************************************************************/ +void OS_Memcpy(void* pvDest, void* pvSrc, uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Compare two memory blocks +* \param pvBuf1 First memory block +* \param pvBuf2 Second memory block +* \param ulSize Compare size in bytes +* \return 0 if both buffers are equal */ +/*****************************************************************************/ +int OS_Memcmp(void* pvBuf1, void* pvBuf2, uint32_t ulSize) +{ +} + +/*****************************************************************************/ +/*! Move memory +* \param pvDest Destination memory +* \param pvSrc Source memory +* \param ulSize Size in byte to move */ +/*****************************************************************************/ +void OS_Memmove(void* pvDest, void* pvSrc, uint32_t ulSize) +{ +} + + +/*****************************************************************************/ +/*! Sleep for a specific time +* \param ulSleepTimeMs Time in ms to sleep for */ +/*****************************************************************************/ +void OS_Sleep(uint32_t ulSleepTimeMs) +{ +} + +/*****************************************************************************/ +/*! Retrieve a counter based on millisecond used for timeout monitoring +* \return Current counter value (resolution of this value will influence +* timeout monitoring in driver/toolkit functions( */ +/*****************************************************************************/ +uint32_t OS_GetMilliSecCounter(void) +{ +} + +/*****************************************************************************/ +/*! Create an auto reset event +* \return handle to the created event */ +/*****************************************************************************/ +void* OS_CreateEvent(void) +{ +} + +/*****************************************************************************/ +/*! Set an event +* \param pvEvent Handle to event being signalled */ +/*****************************************************************************/ +void OS_SetEvent(void* pvEvent) +{ +} + +/*****************************************************************************/ +/*! Reset an event +* \param pvEvent Handle to event being reset */ +/*****************************************************************************/ +void OS_ResetEvent(void* pvEvent) +{ +} + +/*****************************************************************************/ +/*! Delete an event +* \param pvEvent Handle to event being deleted */ +/*****************************************************************************/ +void OS_DeleteEvent(void* pvEvent) +{ +} + +/*****************************************************************************/ +/*! Wait for the signalling of an event +* \param pvEvent Handle to event being wait for +* \param ulTimeout Timeout in ms to wait for event +* \return 0 if event was signalled */ +/*****************************************************************************/ +uint32_t OS_WaitEvent(void* pvEvent, uint32_t ulTimeout) +{ +} + +/*****************************************************************************/ +/*! Compare two ASCII string +* \param pszBuf1 First buffer +* \param pszBuf2 Second buffer +* \return 0 if strings are equal */ +/*****************************************************************************/ +int OS_Strcmp(const char* pszBuf1, const char* pszBuf2) +{ +} + +/*****************************************************************************/ +/*! Compare characters of two strings without regard to case +* \param pszBuf1 First buffer +* \param pszBuf2 Second buffer +* \param ulLen Number of characters to compare +* \return 0 if strings are equal */ +/*****************************************************************************/ +int OS_Strnicmp(const char* pszBuf1, const char* pszBuf2, uint32_t ulLen) +{ +} + +/*****************************************************************************/ +/*! Query the length of an ASCII string +* \param szText ASCII string +* \return character count of szText */ +/*****************************************************************************/ +int OS_Strlen(const char* szText) +{ +} + +/*****************************************************************************/ +/*! Copies one string to another monitoring the maximum length of the target +* buffer. +* \param szDest Destination buffer +* \param szSource Source buffer +* \param ulLen Maximum length to copy +* \return pointer to szDest */ +/*****************************************************************************/ +char* OS_Strncpy(char* szDest, const char* szSource, uint32_t ulLen) +{ +} + + +/*****************************************************************************/ +/*! Create an interrupt safe locking mechanism (Spinlock/critical section) +* \return handle to the locking object */ +/*****************************************************************************/ +void* OS_CreateLock(void) +{ +} + +/*****************************************************************************/ +/*! Enter a critical section/spinlock +* \param pvLock Handle to the locking object */ +/*****************************************************************************/ +void OS_EnterLock(void* pvLock) +{ +} + +/*****************************************************************************/ +/*! Leave a critical section/spinlock +* \param pvLock Handle to the locking object */ +/*****************************************************************************/ +void OS_LeaveLock(void* pvLock) +{ +} + +/*****************************************************************************/ +/*! Delete a critical section/spinlock object +* \param pvLock Handle to the locking object being deleted */ +/*****************************************************************************/ +void OS_DeleteLock(void* pvLock) +{ +} + +/*****************************************************************************/ +/*! Create an Mutex object for locking code sections +* \return handle to the mutex object */ +/*****************************************************************************/ +void* OS_CreateMutex(void) +{ +} + +/*****************************************************************************/ +/*! Wait for mutex +* \param pvMutex Handle to the Mutex locking object +* \param ulTimeout Wait timeout +* \return !=0 on succes */ +/*****************************************************************************/ +int OS_WaitMutex(void* pvMutex, uint32_t ulTimeout) +{ +} + +/*****************************************************************************/ +/*! Release a mutex section section +* \param pvMutex Handle to the locking object */ +/*****************************************************************************/ +void OS_ReleaseMutex(void* pvMutex) +{ +} + +/*****************************************************************************/ +/*! Delete a Mutex object +* \param pvMutex Handle to the mutex object being deleted */ +/*****************************************************************************/ +void OS_DeleteMutex(void* pvMutex) +{ +} + +/*****************************************************************************/ +/*! Opens a file in binary mode +* \param szFile Full file name (incl. path if necessary) of the file to open +* \param pulFileLen Returned length of the opened file +* \return handle to the file, NULL mean file could not be opened */ +/*****************************************************************************/ +void* OS_FileOpen(char* szFile, uint32_t* pulFileLen) +{ +} + +/*****************************************************************************/ +/*! Closes a previously opened file +* \param pvFile Handle to the file being closed */ +/*****************************************************************************/ +void OS_FileClose(void* pvFile) +{ +} + +/*****************************************************************************/ +/*! Read a specific amount of bytes from the file +* \param pvFile Handle to the file being read from +* \param ulOffset Offset inside the file, where read starts at +* \param ulSize Size in bytes to be read +* \param pvBuffer Buffer to place read bytes in +* \return number of bytes actually read from file */ +/*****************************************************************************/ +uint32_t OS_FileRead(void* pvFile, uint32_t ulOffset, uint32_t ulSize, void* pvBuffer) +{ +} + +/*****************************************************************************/ +/*! OS specific initialization (if needed), called during cifXTKitInit() +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t OS_Init(void) +{ +} + +/*****************************************************************************/ +/*! OS specific de-initialization (if needed), called during cifXTKitInit() */ +/*****************************************************************************/ +void OS_Deinit(void) +{ +} + +/*****************************************************************************/ +/*! This functions is called for PCI cards in the toolkit. It is expected to +* write back all BAR's (Base address registers), Interrupt and Command +* Register. These registers are invalidated during cifX Reset and need to be +* re-written after the reset has succeeded +* \param pvOSDependent OS Dependent Variable passed during call to +* cifXTKitAddDevice +* \param pvPCIConfig Configuration returned by OS_ReadPCIConfig +* (implementation dependent) */ +/*****************************************************************************/ +void OS_WritePCIConfig(void* pvOSDependent, void* pvPCIConfig) +{ + /* TODO: Implement PCI register accesss, needed for cifX cards, */ +} + +/*****************************************************************************/ +/*! This functions is called for PCI cards in the toolkit. It is expected to +* read all BAR's (Base address registers), Interrupt and Command Register. +* These registers are invalidated during cifX Reset and need to be +* re-written after the reset has succeeded +* \param pvOSDependent OS Dependent Variable passed during call to +* cifXTKitAddDevice +* \return pointer to stored register copies (implementation dependent) */ +/*****************************************************************************/ +void* OS_ReadPCIConfig(void* pvOSDependent) +{ + /* TODO: Implement PCI register access, needed for cifX cards. */ +} + +/*****************************************************************************/ +/*! This function Maps a DPM pointer to a user application if needed. +* This example just returns the pointer valid inside the driver. +* \param pvDriverMem Pointer to be mapped +* \param ulMemSize Size to be mapped +* \param ppvMappedMem Returned mapped pointer (usable by application) +* \param pvOSDependent OS Dependent variable passed during call to +* cifXTKitAddDevice +* \param fCached Caching option (0 = do not use caching) +* \return Handle that is needed for unmapping NULL is a mapping failure */ +/*****************************************************************************/ +void* OS_MapUserPointer(void* pvDriverMem, uint32_t ulMemSize, void** ppvMappedMem, void* pvOSDependent, unsigned char fCached) +{ +} + +/*****************************************************************************/ +/*! This function unmaps a previously mapped user application pointer +* \param phMapping Handle that was returned by OS_MapUserPointer +* \param pvOSDependent OS Dependent variable passed during call to +* cifXTKitAddDevice +* \return !=0 on success */ +/*****************************************************************************/ +int OS_UnmapUserPointer(void* phMapping, void* pvOSDependent) +{ +} + +/*****************************************************************************/ +/*! This function flushes a cached memory area to the device buffer +* \param pvMem Pointer to the cached memory +* \param ulMemSize Length of the cached memory area */ +/*****************************************************************************/ +void OS_FlushCacheMemory_ToDevice(void* pvMem, unsigned long ulMemSize) +{ +} + +/*****************************************************************************/ +/*! This function invalidates a cache buffer to be refreshed by +* the physical memory. +* \param pvMem Pointer to the cached memory +* \param ulMemSize Length of the cached memory area */ +/*****************************************************************************/ +void OS_InvalidateCacheMemory_FromDevice(void* pvMem, unsigned long ulMemSize) +{ +} + +/*****************************************************************************/ +/*! This function enables the interrupts for the device physically +* \param pvOSDependent OS Dependent Variable passed during call to +* cifXTKitAddDevice */ +/*****************************************************************************/ +void OS_EnableInterrupts(void* pvOSDependent) +{ +} + +/*****************************************************************************/ +/*! This function disables the interrupts for the device physically +* \param pvOSDependent OS Dependent Variable passed during call to +* cifXTKitAddDevice */ +/*****************************************************************************/ +void OS_DisableInterrupts(void* pvOSDependent) +{ +} + +#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK +/*****************************************************************************/ +/*! Lock DSR against IST +* \param pvOSDependent Device Extension */ +/*****************************************************************************/ +void OS_IrqLock(void* pvOSDependent) +{ +} + +/*****************************************************************************/ +/*! Unlock DSR against IST +* \param pvOSDependent Device Extension */ +/*****************************************************************************/ +void OS_IrqUnlock(void* pvOSDependent) +{ +} +#endif + +#ifdef CIFX_TOOLKIT_TIME +/*****************************************************************************/ +/*! Get System time +* \param ptTime Pointer to store the time value +* \return actual time value in seconds sincd 01.01.1970 */ +/*****************************************************************************/ +uint64_t OS_Time( uint64_t *ptTime) +{ + if (NULL != ptTime) + *ptTime = 0; + + return 0; +} +#endif + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/OSAbstraction/OS_Includes.h b/libcifx/Toolkit/OSAbstraction/OS_Includes.h new file mode 100644 index 0000000..2787add --- /dev/null +++ b/libcifx/Toolkit/OSAbstraction/OS_Includes.h @@ -0,0 +1,32 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Includes.h 6603 2014-10-02 14:57:53Z stephans $: + + Description: + Headerfile for specific target system includes, data types and definitions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2006-08-08 initial version (special OS dependencies must be added) + +**************************************************************************************/ + +#ifndef __OS_INCLUDES__H +#define __OS_INCLUDES__H + + #error "Insert needed Target system definitions, data types and header files here" +/* + #define APIENTRY + + #ifndef NULL + #define NULL 0 + #endif + + #define UNREFERENCED_PARAMETER(a) (a=a) +*/ +#endif /* __OS_INCLUDES__H */ diff --git a/libcifx/Toolkit/OSAbstraction/OS_SPICustom.c b/libcifx/Toolkit/OSAbstraction/OS_SPICustom.c new file mode 100644 index 0000000..541de5b --- /dev/null +++ b/libcifx/Toolkit/OSAbstraction/OS_SPICustom.c @@ -0,0 +1,98 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_SPICustom.c 12305 2018-08-09 12:54:55Z Robert $: + + Description: + Implementation of the custom SPI abstration layer + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2018-07-26 Added return value to OS_SpiInit() + 2014-08-27 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file OS_SPICustom.c +* Sample SPI abstraction layer. Implementation must be done +* according to used target system */ +/*****************************************************************************/ + +#include "OS_Spi.h" + +#ifdef CIFX_TOOLKIT_HWIF + #error "Implement SPI target system abstraction in this file" +#endif + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_OS_ABSTRACTION Operating System Abstraction +* \{ */ +/*****************************************************************************/ + + +/*****************************************************************************/ +/*! Initialize SPI components +* \param pvOSDependent OS Dependent parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +long OS_SpiInit(void* pvOSDependent) +{ + /* initialize SPI device */ + return 0; +} + +/*****************************************************************************/ +/*! Assert chip select +* \param pvOSDependent OS Dependent parameter to identify card */ +/*****************************************************************************/ +void OS_SpiAssert(void* pvOSDependent) +{ + /* assert chip select */ +} + +/*****************************************************************************/ +/*! Deassert chip select +* \param pvOSDependent OS Dependent parameter to identify card */ +/*****************************************************************************/ +void OS_SpiDeassert(void* pvOSDependent) +{ + /* deassert chip select */ +} + +/*****************************************************************************/ +/*! Lock the SPI bus +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiLock(void* pvOSDependent) +{ + /* lock access to SPI device */ +} + +/*****************************************************************************/ +/*! Unlock the SPI bus +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiUnlock(void* pvOSDependent) +{ + /* unlock access to SPI device */ +} + +/*****************************************************************************/ +/*! Transfer byte stream via SPI +* \param pvOSDependent OS Dependent parameter to identify card +* \param pbSend Send buffer (NULL for polling) +* \param pbRecv Receive buffer (NULL if discard) +* \param ulLen Length of SPI transfer */ +/*****************************************************************************/ +void OS_SpiTransfer(void* pvOSDependent, uint8_t* pbSend, uint8_t* pbRecv, uint32_t ulLen) +{ + +} +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/SerialDPM/OS_Spi.h b/libcifx/Toolkit/SerialDPM/OS_Spi.h new file mode 100644 index 0000000..cec90ce --- /dev/null +++ b/libcifx/Toolkit/SerialDPM/OS_Spi.h @@ -0,0 +1,82 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Spi.h 12195 2018-07-18 10:07:13Z AlexanderMinor $: + + Description: + SPI abstraction + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2014-08-01 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file OS_Spi.h +* SPI abstraction layer */ +/*****************************************************************************/ + +#ifndef OS_SPI__H +#define OS_SPI__H + +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + +/*****************************************************************************/ +/*! Initialize SPI components +* \param pvOSDependent OS Dependent parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +long OS_SpiInit(void* pvOSDependent); + +/*****************************************************************************/ +/*! Assert chip select +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiAssert(void* pvOSDependent); + +/*****************************************************************************/ +/*! Deassert chip select +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiDeassert(void* pvOSDependent); + +/*****************************************************************************/ +/*! Lock the SPI bus +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiLock(void* pvOSDependent); + +/*****************************************************************************/ +/*! Unlock the SPI bus +* \param pvOSDependent OS Dependent parameter */ +/*****************************************************************************/ +void OS_SpiUnlock(void* pvOSDependent); + +/*****************************************************************************/ +/*! Transfer byte stream via SPI. As send and receive buffer are optional, +* the routine must be capable of sending dummy bytes (in case pbSend == NULL) +* and discard receive bytes (if pbRecv == NULL). If caller does not pass +* any buffer at all, we are dealing with an idle transfer to waste some time. +* \param pvOSDependent OS Dependent parameter +* \param pbSend Send buffer (Can be NULL for polling data from slave) +* \param pbRecv Receive buffer (Can be NULL if slaves received data + is discarded by caller) +* \param ulLen Length of SPI transfer */ +/*****************************************************************************/ +void OS_SpiTransfer(void* pvOSDependent, uint8_t* pbSend, uint8_t* pbRecv, uint32_t ulLen); + +#ifdef __cplusplus +} +#endif + +#endif /* OS_SPI__H */ diff --git a/libcifx/Toolkit/SerialDPM/SerialDPMInterface.c b/libcifx/Toolkit/SerialDPM/SerialDPMInterface.c new file mode 100644 index 0000000..6931505 --- /dev/null +++ b/libcifx/Toolkit/SerialDPM/SerialDPMInterface.c @@ -0,0 +1,475 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: SerialDPMInterface.c 14801 2023-05-10 09:36:54Z RMayer $: + + Description: + Serial DPM Interface + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-05-10 Adapted netX Read/Write function definitions to new ulOption parameter + 2019-08-06 Chip detection loop in SerialDPM_Init() reworked + 2018-08-09 fixed pclint warnings + 2014-08-01 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file SerialDPMInterface.c +* Serial DPM protocol implementation */ +/*****************************************************************************/ + +#include "OS_Spi.h" +#include "cifXHWFunctions.h" +#include "SerialDPMInterface.h" +#include "cifXErrors.h" + +#define MAX_CNT(array) (sizeof((array))/sizeof((array)[0])) +#define MIN(a,b) (((a)<(b))?(a):(b)) + +#define MAX_TRANSFER_LEN 124 +#define CMD_READ_NX50(len) (0x80 | len) +#define CMD_READ_NX10(len) ((len > 127)? 0x80:(0x80 | len)) +#define CMD_WRITE_NX10(len) ((len > 127)? 0x00:len) +/*lint -emacro(572, CMD_READ_NX51 ) : Excessive shift value */ +#define CMD_READ_NX51(addr) (0x80 | ((addr>>16)&0xF)) +/*lint -emacro(572, CMD_WRITE_NX51 ) : Excessive shift value */ +#define CMD_WRITE_NX51(addr) ((addr>>16)&0xF) +#define CMD_LEN_NX51(len) ((len > 255)? 0x00:len) + +#ifndef CIFX_TOOLKIT_HWIF + #error "CIFX_TOOLKIT_HWIF must be explicitly enabled to support serial DPM!" +#endif + +/*****************************************************************************/ +/*! Read a number of bytes from SPI interface (netX50 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to read data from +* \param pvData Buffer to store read data +* \param ulLen Number of bytes to read */ +/*****************************************************************************/ +static void* Read_NX50( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t bUnused = 0x00; + uint32_t ulByteTimeout = 100; + uint32_t ulDpmAddr = (uint32_t)pvAddr; + uint8_t* pabData = (uint8_t*)pvData; + + OS_SpiLock(ptDevice->pvOSDependent); + while (ulLen > 0) + { + uint8_t abSend[3]; + uint32_t ulChunkLen = MIN(MAX_TRANSFER_LEN, ulLen); + + ulLen -= ulChunkLen; + + /* Assemble command */ + abSend[0] = (uint8_t)((ulDpmAddr >> 8) & 0xFF); + abSend[1] = (uint8_t)((ulDpmAddr >> 0) & 0xFF); + abSend[2] = (uint8_t)(CMD_READ_NX50(ulChunkLen)); + + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + + do + { + if(ulByteTimeout == 0) + { + OS_SpiDeassert(pvDevInstance); + return pvData; + } + --ulByteTimeout; + + /* get the idle bytes done */ + OS_SpiTransfer(pvDevInstance, NULL, &bUnused, 1); + + } while((bUnused & 0xFF) != 0xA5); + + while(ulChunkLen--) + { + OS_SpiTransfer(pvDevInstance, &bUnused, pabData++, 1); + } + + OS_SpiDeassert(pvDevInstance); + + ulDpmAddr += MAX_TRANSFER_LEN; + } + OS_SpiUnlock(ptDevice->pvOSDependent); + + return pvData; +} + +/*****************************************************************************/ +/*! Write a number of bytes to SPI interface (netX50 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to write data to +* \param pvData Data to write to SPI interface +* \param ulLen Number of bytes to write */ +/*****************************************************************************/ +static void* Write_NX50( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint32_t ulDpmAddr = (uint32_t)pvAddr; + uint8_t* pabData = (uint8_t*)pvData; + + OS_SpiLock(ptDevice->pvOSDependent); + while (ulLen > 0) + { + uint8_t abSend[3]; + uint32_t ulChunkLen = MIN(MAX_TRANSFER_LEN, ulLen); + + ulLen -= ulChunkLen; + + /* Assemble command */ + abSend[0] = (uint8_t)((ulDpmAddr >> 8) & 0xFF); + abSend[1] = (uint8_t)((ulDpmAddr >> 0) & 0xFF); + abSend[2] = (uint8_t)ulChunkLen; + + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + OS_SpiTransfer(pvDevInstance, pabData, NULL, ulChunkLen); + OS_SpiDeassert(pvDevInstance); + + ulDpmAddr += ulChunkLen; + pabData += ulChunkLen; /*lint !e662 */ + } + OS_SpiUnlock(ptDevice->pvOSDependent); + + return pvAddr; +} + +/*****************************************************************************/ +/*! Read a number of bytes from SPI interface (netX500 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to read data from +* \param pvData Buffer to store read data +* \param ulLen Number of bytes to read */ +/*****************************************************************************/ +static void* Read_NX500( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t bUnused = 0x00; + uint32_t ulByteTimeout = 100; + uint32_t ulDpmAddr = (uint32_t)pvAddr; + uint8_t* pabData = (uint8_t*)pvData; + uint32_t ulPreLen = ulDpmAddr&0x3; + + /* Align offset and length */ + ulDpmAddr &= ~0x3; + + OS_SpiLock(ptDevice->pvOSDependent); + while (ulLen > 0) + { + uint8_t abSend[3]; + uint32_t ulChunkLen = MIN(MAX_TRANSFER_LEN, ulLen); + uint32_t ulAlignedLen = (ulChunkLen+3)&~0x3; + + ulLen -= ulChunkLen; + + /* Assemble command */ + abSend[0] = (uint8_t)((ulDpmAddr >> 8) & 0xFF); + abSend[1] = (uint8_t)((ulDpmAddr >> 0) & 0xFF); + abSend[2] = (uint8_t)(CMD_READ_NX50(ulAlignedLen)); + + /* assert chip select */ + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + + do + { + if(ulByteTimeout == 0) + { + OS_SpiDeassert(pvDevInstance); + return pvData; + } + --ulByteTimeout; + + /* get the idle bytes done */ + OS_SpiTransfer(pvDevInstance, NULL, &bUnused, 1); + + } while((bUnused & 0xFF) != 0xA5); + + if (ulPreLen) + { + OS_SpiTransfer(pvDevInstance, NULL, NULL, ulPreLen); + ulPreLen = 0; + } + + OS_SpiTransfer(pvDevInstance, NULL, pabData, ulChunkLen); + + if (0 != (ulAlignedLen - ulChunkLen)) + { + OS_SpiTransfer(pvDevInstance, NULL, NULL, ulAlignedLen - ulChunkLen); + } + + OS_SpiDeassert(pvDevInstance); + + ulDpmAddr += ulChunkLen; + pabData += ulChunkLen; /*lint !e662 */ + } + OS_SpiUnlock(ptDevice->pvOSDependent); + + return pvData; +} + +/*****************************************************************************/ +/*! Read and modify number of bytes from SPI interface (netX500 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to read/modify data +* \param pvData Data to write to SPI interface +* \param ulLen Number of bytes to write */ +/*****************************************************************************/ +static void* ReadModifyWrite_NX500( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + uint32_t ulDpmAddr = (uint32_t)pvAddr; + uint8_t* pabData = (uint8_t*)pvData; + uint8_t abRead[4]; + + if (ulDpmAddr&0x3) + { + uint32_t ulAlignedAddr = ulDpmAddr&~0x3; + uint8_t* pabRead = &abRead[ulDpmAddr&0x3]; + uint32_t ulPartLen = MIN(ulLen, (4 - (ulDpmAddr&0x3))); + + ulLen -= ulPartLen; + ulDpmAddr += ulPartLen; + + (void) Read_NX50( 0, pvDevInstance, (void*)ulAlignedAddr, abRead, 4); + while (ulPartLen--) + { + *pabRead++ = *pabData++; + } + (void) Write_NX50( 0, pvDevInstance, (void*)ulAlignedAddr, abRead, 4); + } + + if (ulLen&~0x3) + { + uint32_t ulAlignedLen = ulLen&~0x3; + (void) Write_NX50( 0, pvDevInstance, (void*)ulDpmAddr, pabData, ulAlignedLen); + pabData += ulAlignedLen; + ulDpmAddr += ulAlignedLen; + ulLen -= ulAlignedLen; + } + + if (ulLen&0x3) + { + uint8_t* pabRead = &abRead[0]; + + (void) Read_NX50( 0, pvDevInstance, (void*)ulDpmAddr, abRead, 4); + while (ulLen--) + { + *pabRead++ = *pabData++; + } + (void) Write_NX50( 0, pvDevInstance, (void*)ulDpmAddr, abRead, 4); + } + return pvAddr; +} + +/*****************************************************************************/ +/*! Read a number of bytes from SPI interface (netX10 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to read data from +* \param pvData Buffer to store read data +* \param ulLen Number of bytes to read */ +/*****************************************************************************/ +static void* Read_NX10( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t abSend[3]; + + /* Assemble command */ + abSend[0] = (uint8_t)(((uint32_t)pvAddr >> 8) & 0xFF); + abSend[1] = (uint8_t)(((uint32_t)pvAddr >> 0) & 0xFF); + abSend[2] = (uint8_t)(CMD_READ_NX10(ulLen)); + + OS_SpiLock(ptDevice->pvOSDependent); + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + OS_SpiTransfer(pvDevInstance, NULL, (uint8_t*)pvData, ulLen); + OS_SpiDeassert(pvDevInstance); + OS_SpiUnlock(ptDevice->pvOSDependent); + return pvData; +} + +/*****************************************************************************/ +/*! Write a number of bytes to SPI interface (netX10 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to write data to +* \param pvData Data to write to SPI interface +* \param ulLen Number of bytes to write */ +/*****************************************************************************/ +static void* Write_NX10( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t abSend[3]; + + /* Assemble command */ + abSend[0] = (uint8_t)(((uint32_t)pvAddr >> 8) & 0xFF); + abSend[1] = (uint8_t)(((uint32_t)pvAddr >> 0) & 0xFF); + abSend[2] = (uint8_t)(CMD_WRITE_NX10(ulLen)); + + OS_SpiLock(ptDevice->pvOSDependent); + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + OS_SpiTransfer(pvDevInstance, (uint8_t*)pvData, NULL, ulLen); + OS_SpiDeassert(pvDevInstance); + OS_SpiUnlock(ptDevice->pvOSDependent); + return pvAddr; +} + +/*****************************************************************************/ +/*! Read a number of bytes from SPI interface (netX51 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to read data from +* \param pvData Buffer to store read data +* \param ulLen Number of bytes to read */ +/*****************************************************************************/ +static void* Read_NX51( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t abSend[4]; + + /* Assemble command */ + abSend[0] = (uint8_t)(CMD_READ_NX51((uint32_t)pvAddr)); + abSend[1] = (uint8_t)(((uint32_t)pvAddr >> 8) & 0xFF); + abSend[2] = (uint8_t)(((uint32_t)pvAddr >> 0) & 0xFF); + abSend[3] = (uint8_t)(CMD_LEN_NX51(ulLen)); + + OS_SpiLock(ptDevice->pvOSDependent); + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + OS_SpiTransfer(pvDevInstance, NULL, (uint8_t*)pvData, ulLen); + OS_SpiDeassert(pvDevInstance); + OS_SpiUnlock(ptDevice->pvOSDependent); + return pvData; +} + +/*****************************************************************************/ +/*! Write a number of bytes to SPI interface (netX51 Slave) +* \param ulOption 0 = memcpy / 1 = single transfer +* \param pvDevInstance Device Instance +* \param pvAddr Address offset in DPM to write data to +* \param pvData Data to write to SPI interface +* \param ulLen Number of bytes to write */ +/*****************************************************************************/ +static void* Write_NX51( uint32_t ulOption, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen) +{ + DEVICEINSTANCE* ptDevice = (DEVICEINSTANCE*) pvDevInstance; + uint8_t abSend[3]; + + /* Assemble command */ + abSend[0] = (uint8_t)(CMD_WRITE_NX51((uint32_t)pvAddr)); + abSend[1] = (uint8_t)(((uint32_t)pvAddr >> 8) & 0xFF); + abSend[2] = (uint8_t)(((uint32_t)pvAddr >> 0) & 0xFF); + + OS_SpiLock(ptDevice->pvOSDependent); + OS_SpiAssert(pvDevInstance); + OS_SpiTransfer(pvDevInstance, abSend, NULL, MAX_CNT(abSend)); + OS_SpiTransfer(pvDevInstance, (uint8_t*)pvData, NULL, ulLen); + OS_SpiDeassert(pvDevInstance); + OS_SpiUnlock(ptDevice->pvOSDependent); + return pvAddr; +} + +/*****************************************************************************/ +/*! Initialize serial DPM interface +* \param ptDevice Device Instance +* \return protocol type identifier */ +/*****************************************************************************/ +int SerialDPM_Init(DEVICEINSTANCE* ptDevice) +{ + uint8_t bUnused; + int iSerDpmType = SERDPM_UNKNOWN; + int iDummyReadCnt = 0; + + if (CIFX_NO_ERROR == OS_SpiInit(ptDevice->pvOSDependent)) + { + uint32_t ulDetect = 0; + uint8_t abSend[] = {CMD_READ_NX51(0xFF), 0xFF, CMD_READ_NX50(4)}; + + OS_SpiLock(ptDevice->pvOSDependent); + + /* ATTENTION: Some of the netX chips needs a DUMMY read before delivering valid data */ + /* If the first access delivers a SERDPM_UNKNOWN result, */ + /* the loop should be processed again a second time */ + do + { + /* Execute the SPI chip detection */ + OS_SpiAssert(ptDevice); + OS_SpiTransfer(ptDevice, abSend, (unsigned char*)&ulDetect, MAX_CNT(abSend)); + OS_SpiDeassert(ptDevice); + + if (0 == ulDetect) + { + iSerDpmType = SERDPM_NETX10; + } else if (0x00FFFFFF == ulDetect) + { + iSerDpmType = SERDPM_NETX50; + } else if (0x64 == (0xFF & ulDetect)) + { + iSerDpmType = SERDPM_NETX100; + } else if (0x11 == (0x1F & ulDetect)) + { + iSerDpmType = SERDPM_NETX51; + } else + { + iSerDpmType = SERDPM_UNKNOWN; + } + + iDummyReadCnt++; + + } while ((iDummyReadCnt < 2) && (iSerDpmType == SERDPM_UNKNOWN)); + + OS_SpiUnlock(ptDevice->pvOSDependent); + + switch (iSerDpmType) + { + case SERDPM_NETX100: + ptDevice->pfnHwIfRead = Read_NX500; + ptDevice->pfnHwIfWrite = ReadModifyWrite_NX500; + break; + + case SERDPM_NETX50: + ptDevice->pfnHwIfRead = Read_NX50; + ptDevice->pfnHwIfWrite = Write_NX50; + break; + case SERDPM_NETX10: + ptDevice->pfnHwIfRead = Read_NX10; + ptDevice->pfnHwIfWrite = Write_NX10; + /* Initialize SPI unit of slave by making 2 dummy reads */ + (void) Read_NX10(0, ptDevice, 0, &bUnused, 1); + (void) Read_NX10(0, ptDevice, 0, &bUnused, 1); + break; + case SERDPM_NETX51: + ptDevice->pfnHwIfRead = Read_NX51; + ptDevice->pfnHwIfWrite = Write_NX51; + /* Initialize SPI unit of slave by making 2 dummy reads */ + (void) Read_NX51(0, ptDevice, 0, &bUnused, 1); + (void) Read_NX51(0, ptDevice, 0, &bUnused, 1); + break; + default: + /* Protocol type detection failed */ + break; + } + + /* This is a SPI connection, not PCI! */ + ptDevice->fPCICard = 0; + /* The DPM address must be zero, as we only transfer address offsets via the SPI interface. */ + ptDevice->pbDPM = NULL; + } + + return iSerDpmType; +} diff --git a/libcifx/Toolkit/SerialDPM/SerialDPMInterface.h b/libcifx/Toolkit/SerialDPM/SerialDPMInterface.h new file mode 100644 index 0000000..2d661dd --- /dev/null +++ b/libcifx/Toolkit/SerialDPM/SerialDPMInterface.h @@ -0,0 +1,44 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: SerialDPMInterface.h 12249 2018-08-07 07:43:24Z Robert $: + + Description: + Serial DPM Interface + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2014-08-01 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file SerialDPMInterface.h +* Serial DPM interface function definition */ +/*****************************************************************************/ + +#ifndef SERIALDPMINTERFACE__H +#define SERIALDPMINTERFACE__H + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define SERDPM_UNKNOWN 0x00 +#define SERDPM_NETX10 0x01 +#define SERDPM_NETX50 0x02 +#define SERDPM_NETX51 0x03 +#define SERDPM_NETX100 0x04 + +int SerialDPM_Init ( DEVICEINSTANCE* ptDevice); + +#ifdef __cplusplus +} +#endif + +#endif /* SERIALDPMINTERFACE__H */ diff --git a/libcifx/Toolkit/Source/HilPCIDefs.h b/libcifx/Toolkit/Source/HilPCIDefs.h new file mode 100644 index 0000000..9f20e59 --- /dev/null +++ b/libcifx/Toolkit/Source/HilPCIDefs.h @@ -0,0 +1,71 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: HilPCIDefs.h 13179 2019-09-02 11:35:36Z LuisContreras $: + + Description: + cifX PCI definitions file + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-09-01 Updated CIFX M2 IDs + 2019-08-07 Removed packing macros (if needed, see cifXUser.h) + 2019-08-06 CIFX M2 added + 2018-10-12 CIFX4000 added + 2010-10-02 netJACK 100 added + 2009-09-04 PCI information for PLX based devices added + 2009-07-15 created + +**************************************************************************************/ + +/* prevent multiple inclusion */ +#ifndef __CIFX_PCI_DEFS_H +#define __CIFX_PCI_DEFS_H + +/*****************************************************************************/ +/*! CIFX PCI information */ +/*****************************************************************************/ +/* Default Hilscher PCI Information (netX chip only) */ +#define HILSCHER_PCI_VENDOR_ID 0x15CF +#define HILSCHER_PCI_SUBSYSTEM_VENDOR_ID 0x15CF + +#define NETX_CHIP_PCI_DEVICE_ID 0x0000 +#define NETX_CHIP_PCI_SUBYSTEM_ID 0x0000 + +/* PCI Information for CIFX50-FB and CIFX50-RE cards */ +#define CIFX50_PCI_DEVICE_ID 0x0000 +#define CIFX50_PCI_SUBYSTEM_ID 0x0000 + +/* PCI Information for CIFX M2 cards */ +#define CIFXM2_PCI_DEVICE_ID 0x0090 +#define CIFXM2_PCI_SUBYSTEM_ID_FLASH 0x6001 +#define CIFXM2_PCI_SUBYSTEM_ID_GPIO 0x1002 + +/* PCI Information for CIFX4000 cards */ +#define CIFX4000_PCI_DEVICE_ID 0x4000 +#define CIFX4000_PCI_SUBVENDOR_ID 0x0000 +#define CIFX4000_PCI_SUBYSTEM_ID_FLASH 0x0000 + +/* PCI Information for NETPLC100C-FB and NETPLC100C-RE cards */ +#define NETPLC100C_PCI_DEVICE_ID 0x0010 +#define NETPLC100C_PCI_SUBYSTEM_ID_RAM 0x0000 +#define NETPLC100C_PCI_SUBYSTEM_ID_FLASH 0x0001 + +/* PCI Information for netJACK100 cards */ +#define NETJACK100_PCI_DEVICE_ID 0x0020 +#define NETJACK100_PCI_SUBYSTEM_ID_RAM 0x0000 +#define NETJACK100_PCI_SUBYSTEM_ID_FLASH 0x0001 + +/* PLX Technology PCI Information */ +#define PLX_PCI_VENDOR_ID 0x10B5 +#define PCI9030_DEVICE_ID 0x9030 + +/* PCI Information for NXSB-PCA / NX-PCA-PCI cards */ +#define NXPCAPCI_REV2_SUBSYS_ID 0x3235 +#define NXPCAPCI_REV3_SUBSYS_ID 0x3335 + +#endif /* __CIFX_PCI_DEFS_H */ diff --git a/libcifx/Toolkit/Source/Hilcrc32.c b/libcifx/Toolkit/Source/Hilcrc32.c new file mode 100644 index 0000000..848f1d0 --- /dev/null +++ b/libcifx/Toolkit/Source/Hilcrc32.c @@ -0,0 +1,141 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: Hilcrc32.c 14650 2023-01-25 10:25:04Z RMayer $: + + Description: + CRC32 function implementation + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-09-01 - Created a separate function module + +**************************************************************************************/ +#include "Hilcrc32.h" + +/*****************************************************************************/ +/*! Open Source CRC32 Function */ +/*****************************************************************************/ + +/*- + * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or + * code or tables extracted from it, as desired without restriction. + * + * First, the polynomial itself and its table of feedback terms. The + * polynomial is + * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 + * + * Note that we take it "backwards" and put the highest-order term in + * the lowest-order bit. The X^32 term is "implied"; the LSB is the + * X^31 term, etc. The X^0 term (usually shown as "+1") results in + * the MSB being 1 + * + * Note that the usual hardware shift register implementation, which + * is what we're using (we're merely optimizing it by doing eight-bit + * chunks at a time) shifts bits into the lowest-order term. In our + * implementation, that means shifting towards the right. Why do we + * do it this way? Because the calculated CRC must be transmitted in + * order from highest-order term to lowest-order term. UARTs transmit + * characters in order from LSB to MSB. By storing the CRC this way + * we hand it to the UART in the order low-byte to high-byte; the UART + * sends each low-bit to hight-bit; and the result is transmission bit + * by bit from highest- to lowest-order term without requiring any bit + * shuffling on our part. Reception works similarly + * + * The feedback terms table consists of 256, 32-bit entries. Notes + * + * The table can be generated at runtime if desired; code to do so + * is shown later. It might not be obvious, but the feedback + * terms simply represent the results of eight shift/xor opera + * tions for all combinations of data and CRC register values + * + * The values must be right-shifted by eight bits by the "updcrc + * logic; the shift must be unsigned (bring in zeroes). On some + * hardware you could probably optimize the shift in assembler by + * using byte-swap instructions + * polynomial $edb88320 + * + * + * CRC32 code derived from work by Gary S. Brown. + */ + +/*****************************************************************************/ +/*! CRC 32 lookup table */ +/*****************************************************************************/ +static const uint32_t Crc32Table[256]= +{ + 0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL, + 0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL, + 0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL, + 0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL, + 0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL, + 0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL, + 0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL, + 0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL, + 0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL, + 0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL, + 0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL, + 0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL, + 0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL, + 0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL, + 0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL, + 0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL, + 0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL, + 0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL, + 0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL, + 0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL, + 0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL, + 0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL, + 0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL, + 0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL, + 0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL, + 0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL, + 0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL, + 0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL, + 0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL, + 0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL, + 0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL, + 0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL, + 0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL, + 0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL, + 0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL, + 0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL, + 0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL, + 0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL, + 0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL, + 0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL, + 0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL, + 0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL, + 0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL, + 0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL, + 0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL, + 0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL, + 0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL, + 0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL, + 0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL, + 0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL, + 0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL, + 0x2d02ef8d +}; + +/*****************************************************************************/ +/*! Create a CRC32 value from the given buffer data +* \param ulCRC Continued CRC32 value +* \param pabBuffer Buffer to create the CRC from +* \param ulLength Buffer length +* \return CRC32 value */ +/*****************************************************************************/ +uint32_t CreateCRC32(uint32_t ulCRC, uint8_t* pabBuffer, uint32_t ulLength) +{ + if( (0 == pabBuffer) || (0 == ulLength) ) return ulCRC; + ulCRC = ulCRC ^ 0xffffffff; + for(;ulLength > 0; --ulLength) + { + ulCRC = (Crc32Table[((ulCRC) ^ (*(pabBuffer++)) ) & 0xff] ^ ((ulCRC) >> 8)); + } + return ulCRC ^ 0xffffffff; +} \ No newline at end of file diff --git a/libcifx/Toolkit/Source/Hilcrc32.h b/libcifx/Toolkit/Source/Hilcrc32.h new file mode 100644 index 0000000..35a80a5 --- /dev/null +++ b/libcifx/Toolkit/Source/Hilcrc32.h @@ -0,0 +1,35 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: Hilcrc32.h 14199 2021-09-03 11:11:45Z RMayer $: + + Description: + CRC32 function definition + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-09-01 - Created a separate function module + +**************************************************************************************/ +#ifndef HILCRC32_INCLUDED +#define HILCRC32_INCLUDED + +#include /*lint !e537 !e451 */ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* Create a continued CRC32 value. Start with ulCRC = 0. */ +uint32_t CreateCRC32(uint32_t ulCRC, uint8_t* pabBuffer, uint32_t ulLength); + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +#endif /* HILCRC32_INCLUDED */ diff --git a/libcifx/Toolkit/Source/Hilmd5.c b/libcifx/Toolkit/Source/Hilmd5.c new file mode 100644 index 0000000..0e6f989 --- /dev/null +++ b/libcifx/Toolkit/Source/Hilmd5.c @@ -0,0 +1,396 @@ +/*------------------------------------------------------------------------- +* 20.04.2007 RM - Changed int to long for compiler / machine independency +--------------------------------------------------------------------------*/ +/* + Copyright (C) 1999, 2000, 2002 Aladdin Enterprises. All rights reserved. + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + L. Peter Deutsch + ghost@aladdin.com + + */ +/* $Id: Hilmd5.c 12205 2018-07-23 08:52:53Z LuisContreras $ */ +/* + Independent implementation of MD5 (RFC 1321). + + This code implements the MD5 Algorithm defined in RFC 1321, whose + text is available at + http://www.ietf.org/rfc/rfc1321.txt + The code is derived from the text of the RFC, including the test suite + (section A.5) but excluding the rest of Appendix A. It does not include + any code or documentation that is identified in the RFC as being + copyrighted. + + The original and principal author of md5.c is L. Peter Deutsch + . Other authors are noted in the change history + that follows (in reverse chronological order): + + 2002-04-13 lpd Clarified derivation from RFC 1321; now handles byte order + either statically or dynamically; added missing #include + in library. + 2002-03-11 lpd Corrected argument list for main(), and added int return + type, in test program and T value program. + 2002-02-21 lpd Added missing #include in test program. + 2000-07-03 lpd Patched to eliminate warnings about "constant is + unsigned in ANSI C, signed in traditional"; made test program + self-checking. + 1999-11-04 lpd Edited comments slightly for automatic TOC extraction. + 1999-10-18 lpd Fixed typo in header comment (ansi2knr rather than md5). + 1999-05-03 lpd Original version. + */ + +#include "Hilmd5.h" + +#undef BYTE_ORDER /* 1 = big-endian, -1 = little-endian, 0 = unknown */ +#ifdef ARCH_IS_BIG_ENDIAN +# define BYTE_ORDER (ARCH_IS_BIG_ENDIAN ? 1 : -1) +#else +# define BYTE_ORDER 0 +#endif + +static void* md5_memcpy(void* pvDest, const void* pvSrc, long iSize) +{ + char* pcDest=(char*)pvDest; + const char* pcSrc=(const char*)pvSrc; + while(iSize-->0) + { + *(pcDest++)=*(pcSrc)++; + } + return pvDest; +} + + + +#define T_MASK ((md5_word_t)~0) +#define T1 /* 0xd76aa478 */ (T_MASK ^ 0x28955b87) +#define T2 /* 0xe8c7b756 */ (T_MASK ^ 0x173848a9) +#define T3 0x242070db +#define T4 /* 0xc1bdceee */ (T_MASK ^ 0x3e423111) +#define T5 /* 0xf57c0faf */ (T_MASK ^ 0x0a83f050) +#define T6 0x4787c62a +#define T7 /* 0xa8304613 */ (T_MASK ^ 0x57cfb9ec) +#define T8 /* 0xfd469501 */ (T_MASK ^ 0x02b96afe) +#define T9 0x698098d8 +#define T10 /* 0x8b44f7af */ (T_MASK ^ 0x74bb0850) +#define T11 /* 0xffff5bb1 */ (T_MASK ^ 0x0000a44e) +#define T12 /* 0x895cd7be */ (T_MASK ^ 0x76a32841) +#define T13 0x6b901122 +#define T14 /* 0xfd987193 */ (T_MASK ^ 0x02678e6c) +#define T15 /* 0xa679438e */ (T_MASK ^ 0x5986bc71) +#define T16 0x49b40821 +#define T17 /* 0xf61e2562 */ (T_MASK ^ 0x09e1da9d) +#define T18 /* 0xc040b340 */ (T_MASK ^ 0x3fbf4cbf) +#define T19 0x265e5a51 +#define T20 /* 0xe9b6c7aa */ (T_MASK ^ 0x16493855) +#define T21 /* 0xd62f105d */ (T_MASK ^ 0x29d0efa2) +#define T22 0x02441453 +#define T23 /* 0xd8a1e681 */ (T_MASK ^ 0x275e197e) +#define T24 /* 0xe7d3fbc8 */ (T_MASK ^ 0x182c0437) +#define T25 0x21e1cde6 +#define T26 /* 0xc33707d6 */ (T_MASK ^ 0x3cc8f829) +#define T27 /* 0xf4d50d87 */ (T_MASK ^ 0x0b2af278) +#define T28 0x455a14ed +#define T29 /* 0xa9e3e905 */ (T_MASK ^ 0x561c16fa) +#define T30 /* 0xfcefa3f8 */ (T_MASK ^ 0x03105c07) +#define T31 0x676f02d9 +#define T32 /* 0x8d2a4c8a */ (T_MASK ^ 0x72d5b375) +#define T33 /* 0xfffa3942 */ (T_MASK ^ 0x0005c6bd) +#define T34 /* 0x8771f681 */ (T_MASK ^ 0x788e097e) +#define T35 0x6d9d6122 +#define T36 /* 0xfde5380c */ (T_MASK ^ 0x021ac7f3) +#define T37 /* 0xa4beea44 */ (T_MASK ^ 0x5b4115bb) +#define T38 0x4bdecfa9 +#define T39 /* 0xf6bb4b60 */ (T_MASK ^ 0x0944b49f) +#define T40 /* 0xbebfbc70 */ (T_MASK ^ 0x4140438f) +#define T41 0x289b7ec6 +#define T42 /* 0xeaa127fa */ (T_MASK ^ 0x155ed805) +#define T43 /* 0xd4ef3085 */ (T_MASK ^ 0x2b10cf7a) +#define T44 0x04881d05 +#define T45 /* 0xd9d4d039 */ (T_MASK ^ 0x262b2fc6) +#define T46 /* 0xe6db99e5 */ (T_MASK ^ 0x1924661a) +#define T47 0x1fa27cf8 +#define T48 /* 0xc4ac5665 */ (T_MASK ^ 0x3b53a99a) +#define T49 /* 0xf4292244 */ (T_MASK ^ 0x0bd6ddbb) +#define T50 0x432aff97 +#define T51 /* 0xab9423a7 */ (T_MASK ^ 0x546bdc58) +#define T52 /* 0xfc93a039 */ (T_MASK ^ 0x036c5fc6) +#define T53 0x655b59c3 +#define T54 /* 0x8f0ccc92 */ (T_MASK ^ 0x70f3336d) +#define T55 /* 0xffeff47d */ (T_MASK ^ 0x00100b82) +#define T56 /* 0x85845dd1 */ (T_MASK ^ 0x7a7ba22e) +#define T57 0x6fa87e4f +#define T58 /* 0xfe2ce6e0 */ (T_MASK ^ 0x01d3191f) +#define T59 /* 0xa3014314 */ (T_MASK ^ 0x5cfebceb) +#define T60 0x4e0811a1 +#define T61 /* 0xf7537e82 */ (T_MASK ^ 0x08ac817d) +#define T62 /* 0xbd3af235 */ (T_MASK ^ 0x42c50dca) +#define T63 0x2ad7d2bb +#define T64 /* 0xeb86d391 */ (T_MASK ^ 0x14792c6e) + + +static void +md5_process(md5_state_t *pms, const md5_byte_t *data /*[64]*/) +{ + md5_word_t + a = pms->abcd[0], b = pms->abcd[1], + c = pms->abcd[2], d = pms->abcd[3]; + md5_word_t t; +#if BYTE_ORDER > 0 + /* Define storage only for big-endian CPUs. */ + md5_word_t X[16]; +#else + /* Define storage for little-endian or both types of CPUs. */ + md5_word_t xbuf[16]; + const md5_word_t *X; +#endif + + { +#if BYTE_ORDER == 0 + /* + * Determine dynamically whether this is a big-endian or + * little-endian machine, since we can use a more efficient + * algorithm on the latter. + */ + static const long w = 1; + + if (*((const md5_byte_t *)&w)) /* dynamic little-endian */ /*lint !e506 */ +#endif +#if BYTE_ORDER <= 0 /* little-endian */ + { + /* + * On little-endian machines, we can process properly aligned + * data without copying it. + */ + if (!((data - /*lint -e413*/ (const md5_byte_t *)0) & 3)) { + /* data are properly aligned */ + X = (const md5_word_t *)data; + } else { + /* not aligned */ + (void)md5_memcpy(xbuf, data, 64); + X = xbuf; + } + } +#endif +#if BYTE_ORDER == 0 + else /* dynamic big-endian */ +#endif +#if BYTE_ORDER >= 0 /* big-endian */ + { + /* + * On big-endian machines, we must arrange the bytes in the + * right order. + */ + const md5_byte_t *xp = data; + long i; + +# if BYTE_ORDER == 0 + X = xbuf; /* (dynamic only) */ +# else +# define xbuf X /* (static only) */ +# endif + for (i = 0; i < 16; ++i, xp += 4) + xbuf[i] = xp[0] + (xp[1] << 8) + (xp[2] << 16) + (xp[3] << 24); + } +#endif + } + +#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32 - (n)))) + + /* Round 1. */ + /* Let [abcd k s i] denote the operation + a = b + ((a + F(b,c,d) + X[k] + T[i]) <<< s). */ +#define F(x, y, z) (((x) & (y)) | (~(x) & (z))) +#define SET(a, b, c, d, k, s, Ti)\ + t = a + F(b,c,d) + X[k] + Ti;\ + a = ROTATE_LEFT(t, s) + b + /* Do the following 16 operations. */ + SET(a, b, c, d, 0, 7, T1); + SET(d, a, b, c, 1, 12, T2); + SET(c, d, a, b, 2, 17, T3); + SET(b, c, d, a, 3, 22, T4); + SET(a, b, c, d, 4, 7, T5); + SET(d, a, b, c, 5, 12, T6); + SET(c, d, a, b, 6, 17, T7); + SET(b, c, d, a, 7, 22, T8); + SET(a, b, c, d, 8, 7, T9); + SET(d, a, b, c, 9, 12, T10); + SET(c, d, a, b, 10, 17, T11); + SET(b, c, d, a, 11, 22, T12); + SET(a, b, c, d, 12, 7, T13); + SET(d, a, b, c, 13, 12, T14); + SET(c, d, a, b, 14, 17, T15); + SET(b, c, d, a, 15, 22, T16); +#undef SET + + /* Round 2. */ + /* Let [abcd k s i] denote the operation + a = b + ((a + G(b,c,d) + X[k] + T[i]) <<< s). */ +#define G(x, y, z) (((x) & (z)) | ((y) & ~(z))) +#define SET(a, b, c, d, k, s, Ti)\ + t = a + G(b,c,d) + X[k] + Ti;\ + a = ROTATE_LEFT(t, s) + b + /* Do the following 16 operations. */ + SET(a, b, c, d, 1, 5, T17); + SET(d, a, b, c, 6, 9, T18); + SET(c, d, a, b, 11, 14, T19); + SET(b, c, d, a, 0, 20, T20); + SET(a, b, c, d, 5, 5, T21); + SET(d, a, b, c, 10, 9, T22); + SET(c, d, a, b, 15, 14, T23); + SET(b, c, d, a, 4, 20, T24); + SET(a, b, c, d, 9, 5, T25); + SET(d, a, b, c, 14, 9, T26); + SET(c, d, a, b, 3, 14, T27); + SET(b, c, d, a, 8, 20, T28); + SET(a, b, c, d, 13, 5, T29); + SET(d, a, b, c, 2, 9, T30); + SET(c, d, a, b, 7, 14, T31); + SET(b, c, d, a, 12, 20, T32); +#undef SET + + /* Round 3. */ + /* Let [abcd k s t] denote the operation + a = b + ((a + H(b,c,d) + X[k] + T[i]) <<< s). */ +#define H(x, y, z) ((x) ^ (y) ^ (z)) +#define SET(a, b, c, d, k, s, Ti)\ + t = a + H(b,c,d) + X[k] + Ti;\ + a = ROTATE_LEFT(t, s) + b + /* Do the following 16 operations. */ + SET(a, b, c, d, 5, 4, T33); + SET(d, a, b, c, 8, 11, T34); + SET(c, d, a, b, 11, 16, T35); + SET(b, c, d, a, 14, 23, T36); + SET(a, b, c, d, 1, 4, T37); + SET(d, a, b, c, 4, 11, T38); + SET(c, d, a, b, 7, 16, T39); + SET(b, c, d, a, 10, 23, T40); + SET(a, b, c, d, 13, 4, T41); + SET(d, a, b, c, 0, 11, T42); + SET(c, d, a, b, 3, 16, T43); + SET(b, c, d, a, 6, 23, T44); + SET(a, b, c, d, 9, 4, T45); + SET(d, a, b, c, 12, 11, T46); + SET(c, d, a, b, 15, 16, T47); + SET(b, c, d, a, 2, 23, T48); +#undef SET + + /* Round 4. */ + /* Let [abcd k s t] denote the operation + a = b + ((a + I(b,c,d) + X[k] + T[i]) <<< s). */ +#define I(x, y, z) ((y) ^ ((x) | ~(z))) +#define SET(a, b, c, d, k, s, Ti)\ + t = a + I(b,c,d) + X[k] + Ti;\ + a = ROTATE_LEFT(t, s) + b + /* Do the following 16 operations. */ + SET(a, b, c, d, 0, 6, T49); + SET(d, a, b, c, 7, 10, T50); + SET(c, d, a, b, 14, 15, T51); + SET(b, c, d, a, 5, 21, T52); + SET(a, b, c, d, 12, 6, T53); + SET(d, a, b, c, 3, 10, T54); + SET(c, d, a, b, 10, 15, T55); + SET(b, c, d, a, 1, 21, T56); + SET(a, b, c, d, 8, 6, T57); + SET(d, a, b, c, 15, 10, T58); + SET(c, d, a, b, 6, 15, T59); + SET(b, c, d, a, 13, 21, T60); + SET(a, b, c, d, 4, 6, T61); + SET(d, a, b, c, 11, 10, T62); + SET(c, d, a, b, 2, 15, T63); + SET(b, c, d, a, 9, 21, T64); +#undef SET + + /* Then perform the following additions. (That is increment each + of the four registers by the value it had before this block + was started.) */ + pms->abcd[0] += a; + pms->abcd[1] += b; + pms->abcd[2] += c; + pms->abcd[3] += d; +} + +void +md5_init(md5_state_t *pms) +{ + pms->count[0] = pms->count[1] = 0; + pms->abcd[0] = 0x67452301; + pms->abcd[1] = /*0xefcdab89*/ T_MASK ^ 0x10325476; + pms->abcd[2] = /*0x98badcfe*/ T_MASK ^ 0x67452301; + pms->abcd[3] = 0x10325476; +} + +void +md5_append(md5_state_t *pms, const md5_byte_t *data, long nbytes) +{ + const md5_byte_t *p = data; + long left = nbytes; + long offset = (pms->count[0] >> 3) & 63; + md5_word_t nbits = (md5_word_t)(nbytes << 3); + + if (nbytes <= 0) + return; + + /* Update the message length. */ + pms->count[1] += nbytes >> 29; + pms->count[0] += nbits; + if (pms->count[0] < nbits) + pms->count[1]++; + + /* Process an initial partial block. */ + if (offset) { + long copy = (offset + nbytes > 64 ? 64 - offset : nbytes); + + (void)md5_memcpy(pms->buf + offset, p, copy); + if (offset + copy < 64) + return; + p += copy; + left -= copy; + md5_process(pms, pms->buf); + } + + /* Process full blocks. */ + for (; left >= 64; p += 64, left -= 64) + md5_process(pms, p); + + /* Process a final partial block. */ + if (left) + (void)md5_memcpy(pms->buf, p, left); +} + +void +md5_finish(md5_state_t *pms, md5_byte_t digest[16]) +{ + static const md5_byte_t pad[64] = { + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + }; + md5_byte_t data[8]; + long i; + + /* Save the length before padding. */ + for (i = 0; i < 8; ++i) + data[i] = (md5_byte_t)(pms->count[i >> 2] >> ((i & 3) << 3)); + /* Pad to 56 bytes mod 64. */ + md5_append(pms, pad, ((55 - (pms->count[0] >> 3)) & 63) + 1); + /* Append the length. */ + md5_append(pms, data, 8); + for (i = 0; i < 16; ++i) + digest[i] = (md5_byte_t)(pms->abcd[i >> 2] >> ((i & 3) << 3)); +} diff --git a/libcifx/Toolkit/Source/Hilmd5.h b/libcifx/Toolkit/Source/Hilmd5.h new file mode 100644 index 0000000..17fb164 --- /dev/null +++ b/libcifx/Toolkit/Source/Hilmd5.h @@ -0,0 +1,97 @@ +/*------------------------------------------------------------------------- +* 20.04.2007 RM - Changed int to long for compiler / machine independency +--------------------------------------------------------------------------*/ + +/* + Copyright (C) 1999, 2002 Aladdin Enterprises. All rights reserved. + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + L. Peter Deutsch + ghost@aladdin.com + + */ +/* $Id: Hilmd5.h 7534 2016-04-07 10:48:59Z LuisContreras $ */ +/* + Independent implementation of MD5 (RFC 1321). + + This code implements the MD5 Algorithm defined in RFC 1321, whose + text is available at + http://www.ietf.org/rfc/rfc1321.txt + The code is derived from the text of the RFC, including the test suite + (section A.5) but excluding the rest of Appendix A. It does not include + any code or documentation that is identified in the RFC as being + copyrighted. + + The original and principal author of md5.h is L. Peter Deutsch + . Other authors are noted in the change history + that follows (in reverse chronological order): + + 2002-04-13 lpd Removed support for non-ANSI compilers; removed + references to Ghostscript; clarified derivation from RFC 1321; + now handles byte order either statically or dynamically. + 1999-11-04 lpd Edited comments slightly for automatic TOC extraction. + 1999-10-18 lpd Fixed typo in header comment (ansi2knr rather than md5); + added conditionalization for C++ compilation from Martin + Purschke . + 1999-05-03 lpd Original version. + */ + +#ifndef md5_INCLUDED +# define md5_INCLUDED + +/* + * This package supports both compile-time and run-time determination of CPU + * byte order. If ARCH_IS_BIG_ENDIAN is defined as 0, the code will be + * compiled to run only on little-endian CPUs; if ARCH_IS_BIG_ENDIAN is + * defined as non-zero, the code will be compiled to run only on big-endian + * CPUs; if ARCH_IS_BIG_ENDIAN is not defined, the code will be compiled to + * run on either big- or little-endian CPUs, but will run slightly less + * efficiently on either one than if ARCH_IS_BIG_ENDIAN is defined. + */ + +#include /*lint !e537 !e451 */ + +typedef uint8_t md5_byte_t; /* 8-bit byte */ +typedef uint32_t md5_word_t; /* 32-bit word */ + +/* Define the state of the MD5 Algorithm. */ +typedef struct md5_state_s { + md5_word_t count[2]; /* message length in bits, lsw first */ + md5_word_t abcd[4]; /* digest buffer */ + md5_byte_t buf[64]; /* accumulate block */ +} md5_state_t; + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* Initialize the algorithm. */ +void md5_init(md5_state_t *pms); + +/* Append a string to the message. */ +void md5_append(md5_state_t *pms, const md5_byte_t *data, long nbytes); + +/* Finish the message and return the digest. */ +void md5_finish(md5_state_t *pms, md5_byte_t digest[16]); + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +#endif /* md5_INCLUDED */ diff --git a/libcifx/Toolkit/Source/NetX_ROMLoader.h b/libcifx/Toolkit/Source/NetX_ROMLoader.h new file mode 100644 index 0000000..e06970d --- /dev/null +++ b/libcifx/Toolkit/Source/NetX_ROMLoader.h @@ -0,0 +1,104 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: NetX_ROMLoader.h 6598 2014-10-02 08:57:18Z stephans $: + + Description: + netX romloader bootblock definitions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2006-12-06 obsoleted #pragma once removed + 2006-03-06 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file +* netX romloader bootblock definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_DPMSTRUCTURE DPM Structure Definition +* \{ */ +/*****************************************************************************/ + +#ifndef __NETX_ROMLOADER_H +#define __NETX_ROMLOADER_H + +#define MSK_SYSSTA_LED_READY 0x00000001UL /*!< Bitmask for the system state READY LED */ +#define MSK_SYSSTA_LED_RUN 0x00000002UL /*!< Bitmask for the system state RUN LED */ + +#define MSK_SYSSTA_BOOT_ACTIVE 0x00000008UL /*!< Bitmask for bootloader is active */ +#define MSK_SYSSTA_BOOT_START 0x00000080UL /*!< Bitmask to toggle/xor when requesting bootloader to start image */ + +#define BOOTBLOCK_COOKIE_PCI 0xF8BEAF00UL /*!< Bootblock cookie used for PCI mode */ +#define BOOTBLOCK_COOKIE_8BIT 0xF8BEAF08UL /*!< Bootblock cookie used for 8Bit Memory */ +#define BOOTBLOCK_COOKIE_16BIT 0xF8BEAF16UL /*!< Bootblock cookie used for 16Bit Memory */ +#define BOOTBLOCK_COOKIE_32BIT 0xF8BEAF32UL /*!< Bootblock cookie used for 32Bit Memory */ + +#define BOOTBLOCK_FILE_SIGNATURE 0x5854454EUL /*!< Bootblock signature ('NETX') */ + +#pragma pack(4) + +/*****************************************************************************/ +/*! Bootblock expected by netX Romloader */ +/*****************************************************************************/ +typedef struct NETX_BOOTBLOCK_Ttag +{ + uint32_t ulCookie; /*!< Cookie identifying bus width and valid bootblock */ + + union + { + uint32_t ulMemCtrl; /*!< Parallel/Serial Flash Mode for setting up timing parameters */ + uint32_t ulSpeed; /*!< I2C/SPI Mode for identifying speed of device */ + uint32_t ulReserved; /*!< PCI/DPM mode */ + } unCtrl; + + uint32_t ulApplEntrypoint; /*!< Entrypoint to application after relocation */ + uint32_t ulApplChecksum; /*!< Checksum of application */ + uint32_t ulApplSize; /*!< size of application in DWORDs */ + uint32_t ulApplStartAddr; /*!< Relocation address of application */ + uint32_t ulSignature; /*!< Bootblock signature ('NETX') */ + + union { + uint32_t ulSdramGeneralCtrl; /*!< SDRam General control value */ + uint32_t ulExpBusReg; /*!< Expension bus register value (EXPBus Bootmode) */ + } unCtrl0; + + union { + uint32_t ulSdramTimingCtrl; /*!< SDRam Timing control register value */ + uint32_t ulIoRegMode0; /*!< IORegmode0 register value (EXPBus Bootmode) */ + } unCtrl1; + + union { + uint32_t ulIoRegMode1; /*!< IORegmode1 register value (EXPBus Bootmode) */ + uint32_t ulRes0; /*!< unused/reserved */ + } unCtrl2; + + union { + uint32_t ulIfConf1; /*!< IfConfig1 register value (EXPBus Bootmode) */ + uint32_t ulRes0; /*!< unused/reserved */ + } unCtrl3; + + union { + uint32_t ulIfConf2; /*!< IfConfig2 register value (EXPBus Bootmode) */ + uint32_t ulRes0; /*!< unused/reserved */ + } unCtrl4; + + uint32_t ulMiscAsicCtrl; /*!< ASIC CTRL register value */ + uint32_t ulRes[2]; /*!< unused/reserved */ + uint32_t ulBootChecksum; /*!< Bootblock checksum */ +} NETX_BOOTBLOCK_T, *PNETX_BOOTBLOCK_T; + +#pragma pack() + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif diff --git a/libcifx/Toolkit/Source/NetX_RegDefs.h b/libcifx/Toolkit/Source/NetX_RegDefs.h new file mode 100644 index 0000000..e5a1d18 --- /dev/null +++ b/libcifx/Toolkit/Source/NetX_RegDefs.h @@ -0,0 +1,670 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: NetX_RegDefs.h 7534 2016-04-07 10:48:59Z LuisContreras $: + + Description: + netX register definitions for DPM/DMA access + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2016-04-07 Lint: Added guard for _MSC_VER to allow compilation using -wundef + 2010-04-21 DMA Triple Buffer definition updated (was an error in manual) + 2006-12-06 obsoleted #pragma once removed + 2006-08-08 created + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file +* netX register definitions for DPM/DMA access */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_DPMSTRUCTURE DPM Structure Definition +* \{ */ +/*****************************************************************************/ + +#ifndef __NETX_REGDEFS__H +#define __NETX_REGDEFS__H + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #pragma pack(4) + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/*****************************************************************************/ +/* NETX loacal memory definitions */ +/*****************************************************************************/ + +#define NETX_LOCAL_MEMORY_SIZE 0x20000 +#define NETX_DPM_MEMORY_SIZE 0x10000 +#define NETX_DPM_REGBLOCK_SIZE 0x200 + +#define NET_BOOTLOADER_RESET_TIME 500 +#define NET_BOOTLOADER_STARTUP_CYCLES 50 +#define NET_BOOTLOADER_STARTUP_WAIT 100 +#define NET_BOOTLOADER_STARTUP_TIME 2000 + +/*****************************************************************************/ +/* Structures and Basic DPM Layout structures */ +/*****************************************************************************/ + +#define NETX_MAX_DMA_CHANNELS 8 + +/*****************************************************************************/ +/*! Single DMA Channel Configuration Area */ +/*****************************************************************************/ +typedef struct NETX_DMA_CHANNEL_CONFIGtag +{ + volatile uint32_t ulPCIStartAddr; /*!< Start Address of DMA on PCI Bus */ + volatile uint32_t ulNetXMemStartAddr; /*!< Address inside netX where the transfer comes from/goes to */ + volatile uint32_t ulDMACtrl; /*!< Control register for starting a transfer or acquiring state */ + volatile uint32_t ulMbxBase; /*!< Mailbox Base address */ + volatile uint32_t ulBufCtrl; /*!< Control register for buffered transfers (Acknowledge, Buffer Select) */ + volatile uint32_t aulMemBaseBuffer[3]; /*!< Base Addresses of Buffers */ +} NETX_DMA_CHANNEL_CONFIG; + +/*****************************************************************************/ +/*! netX Host Register Block, always located at Offset DPMSize - 0x200 */ +/*****************************************************************************/ +typedef struct NETX_GLOBAL_REG_BLOCKtag +{ + /* 0xFE00, start of the DMA channel data (8Channels * 8DWords * 4Bytes/DWord = 0x100 Bytes) */ + NETX_DMA_CHANNEL_CONFIG atDmaCtrl[NETX_MAX_DMA_CHANNELS]; /*!< Configuration Register for all 8 DMA Channels */ + + /* 0xFF00, start of the netX Host control block */ + volatile uint32_t reserved[47]; /*!< unused/reserved */ + + /* 0xFFBC, start of the defined registers */ + volatile uint32_t ulPCIBaseAddress; /*!< PCI Base address of 2nd Memory Window */ + volatile uint32_t ulWatchDogTimeoutHost; /*!< Host Watchdog Timeout value */ + volatile uint32_t ulWatchDogTrigger; /*!< Host Watchdog triggering cell */ + volatile uint32_t ulWatchDogTimeoutNetx; /*!< NetX Watchdog Timeout value */ + volatile uint32_t reserved2; /*!< unused/reserved */ + volatile uint32_t ulCyclicTimerControl; /*!< Control of cyclic timer (repeat/single, + timer resolution, up/down) */ + volatile uint32_t ulCyclicTimerStart; /*!< Timer start value */ + volatile uint32_t ulSystemState; /*!< System state register */ + volatile uint32_t ulHostReset; /*!< Host reset for initiating a hard reset of + the netX chip */ + volatile uint32_t ulIRQState_0; /*!< IRQ State 0 */ + volatile uint32_t ulIRQState_1; /*!< IRQ State 1 */ + volatile uint32_t reserved3; /*!< unused/reserved */ + volatile uint32_t reserved4; /*!< unused/reserved */ + volatile uint32_t ulIRQEnable_0; /*!< IRQ enable register 0 */ + volatile uint32_t ulIRQEnable_1; /*!< IRQ enable register 1 */ + volatile uint32_t reserved5; /*!< unused/reserved */ + volatile uint32_t reserved6; /*!< unused/reserved */ +} NETX_GLOBAL_REG_BLOCK,*PNETX_GLOBAL_REG_BLOCK; + +#if defined(_MSC_VER) + #if _MSC_VER >= 1000 + #pragma pack() + #endif /* _MSC_VER >= 1000 */ +#endif /* _MSC_VER */ + +/*****************************************************************************/ +/* Registers and Masks */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* DMA Host Start Address register */ +/*****************************************************************************/ +/* DPMHS_CHx_HOST_START Bits [31:2] */ +#define MSK_HOST_START_DMA_ADDR 0xFFFFFFFC /*!< Bitmask indicating DMA start address in host memory*/ +#define SRT_HOST_START_DMA_ADDR 2 /*!< Shift right term for DMA start address in host */ +/* DPMHS_CHx_NETX_START Bits [1:0] */ +#define MSK_HOST_START_DMA_ADDR_RES0 0x00000003 /*!< Bitmask indicating DMA start address reserved */ +#define SRT_HOST_START_DMA_ADDR_RES0 0 /*!< Shift right term for DMA start address reserved */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* DMA netX Start Address register */ +/*****************************************************************************/ +/* DPMHS_CHx_NETX_START Bits [31:2] */ +#define MSK_NETX_START_DMA_ADDR 0xFFFFFFFC /*!< Bitmask indicating DMA start address in netX memory*/ +#define SRT_NETX_START_DMA_ADDR 2 /*!< Shift right term for DMA start address in netX */ +/* DPMHS_CHx_NETX_START Bits [1:0] */ +#define MSK_NETX_START_DMA_ADDR_RES0 0x00000003 /*!< Bitmask indicating DMA start address reserved */ +#define SRT_NETX_START_DMA_ADDR_RES0 0 /*!< Shift right term for DMA start address reserved */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* DMA CTRL register */ +/*****************************************************************************/ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [31] */ +#define MSK_DMA_CTRL_DONE 0x80000000 /*!< Bitmask indicating Transfer finished */ +#define SRT_DMA_CTRL_DONE 31 /*!< Shift right term for Transfer finished flag */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [30:28] */ +#define MSK_DMA_CTRL_STATUS 0x70000000 /*!< Bitmask for Status code of last Transfer */ +#define SRT_DMA_CTRL_STATUS 28 /*!< Shift right term for Status code of last transfer */ + /* DMA control state definition */ + #define DMA_CTRL_STATUS_NOERROR 0 /*!< No Error during transfer */ + #define DMA_CTRL_STATUS_SEL_TIMEOUT 1 /*!< Device select timeout */ + #define DMA_CTRL_STATUS_TRDY_TIMEOUT 2 /*!< target nTRDY timeout */ + #define DMA_CTRL_STATUS_ABORT 3 /*!< target abort error */ + #define DMA_CTRL_STATUS_PARITY_ERROR 4 /*!< parity error */ + #define DMA_CTRL_STATUS_MBX_ERROR 7 /*!< Mailbox error (MBX not enabled) */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [27] */ +#define MSK_DMA_CTRL_START 0x08000000 /*!< Bitmask for starting DMA transfer */ +#define SRT_DMA_CTRL_START 27 /*!< shift right term for starting DMA transfer */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [26] */ +#define MSK_DMA_CTRL_ACTIVE 0x04000000 /*!< Bitmask showing an active DMA transfer (busy) */ +#define SRT_DMA_CTRL_ACTIVE 26 /*!< Shift right term for active transfer flag */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [25] */ +#define MSK_DMA_CTRL_IRQ_EN 0x02000000 /*!< Bitmask for requesting IRQ after transfer */ +#define SRT_DMA_CTRL_IRQ_EN 25 /*!< Shift right term for IRQ Enable flag */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [24] */ +#define MSK_DMA_CTRL_MBX 0x01000000 /*!< Bitmask for enabling Mailbox for channel */ +#define SRT_DMA_CTRL_MBX 24 /*!< Shift right term for Mailbox enable flag */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [23:21] */ +#define MSK_DMA_CTRL_TYPE 0x00E00000 /*!< Bitmask for DMA transfer type */ +#define SRT_DMA_CTRL_TYPE 21 /*!< Shift right term for DMA transfer type */ + /* DMA type definition */ + #define DMA_CTRL_TYPE_SPECIAL 0 /*!< Special Cycle (e.g.IRQ Ack) */ + #define DMA_CTRL_TYPE_IO 1 /*!< I/O Cycle */ + #define DMA_CTRL_TYPE_MEMORY 3 /*!< Memory Cycle */ + #define DMA_CTRL_TYPE_CONFIGURATION 5 /*!< Configuration Cycle */ + #define DMA_CTRL_TYPE_MULTIPLEMEMORY 6 /*!< Multiple Memory reads (Host to netX only) */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [20] */ +#define MSK_DMA_CTRL_DIRECTION 0x00100000 /*!< Bitmask for transfer direction (0=Host to netX)*/ +#define SRT_DMA_CTRL_DIRECTION 20 /*!< Shift right term for direction */ +/* DPMHS_CHx_HOST_DMA_CTRL Bits [19:2] */ +#define MSK_DMA_CTRL_TRANSFERLENGTH 0x000FFFFF /*!< Bitmask for transfer length (multiple of DWORD)*/ +#define SRT_DMA_CTRL_TRANSFERLENGTH 0 /*!< Shift right term for transfer length */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Buffer control register */ +/*****************************************************************************/ +#define MSK_BUF_CTRL_BUFFERSIZE 0xFF000000 /*!< Bitmask for buffer size */ +#define SRT_BUF_CTRL_BUFFERSIZE 24 /*!< Shift right term for buffer size */ +#define MSK_BUF_CTRL_NETX_TO_HOST_ACK 0x00080000 /*!< Bitmask for netX to host buffer acknowledge */ +#define SRT_BUF_CTRL_NETX_TO_HOST_ACK 19 /*!< Shift right term netX to host buffer ack. */ +#define MSK_BUF_CTRL_NETX_TO_HOST_BUF 0x00070000 /*!< Bitmask for netX to Host buffer number */ +#define SRT_BUF_CTRL_NETX_TO_HOST_BUF 16 /*!< Shift right term for Host to netX buffer number */ +#define MSK_BUF_CTRL_HOST_TO_NETX_ACK 0x00000008 /*!< Bitmask for host to netX buffer acknowledge */ +#define SRT_BUF_CTRL_HOST_TO_NETX_ACK 3 /*!< Shift right term for host to netx buffer acknowledge */ +#define MSK_BUF_CTRL_HOST_TO_NETX_BUF 0x00000007 /*!< Bitmask for host to netx buffer number */ +#define SRT_BUF_CTRL_HOST_TO_NETX_BUF 0 /*!< Shift right term for host to netx buffer number */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Mailbox base address register */ +/*****************************************************************************/ +/* DPMHS_CHx_HOST_MBX_BASE Bits [31:8] */ +#define MSK_MBX_BASE_BUFFER_ADDR 0xFFFFFF00 /*!< Bitmask for Mailbox buffer base address */ +#define SRT_MBX_BASE_BUFFER_ADDR 8 /*!< Shift right term for Mailbox buffer base address */ +/* DPMHS_CHx_HOST_MBX_BASE Bits [7:1] */ +#define MSK_MBX_BASE_MBX_SIZE 0x000000FE /*!< Bitmask for Mailbox size */ +#define SRT_MBX_BASE_MBX_SIZE 1 /*!< Shift right term for Mailbox size */ + /* Size definition */ + #define MSK_MBX_BASE_MBX_SIZE_256 0x00000000 /*!< Bitmask for 256 Byte Mailbox */ + #define MBX_BASE_MBX_SIZE_256 0 /*!< Value for 256 Byte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_512 0x00000002 /*!< Bitmask for 512 Byte Mailbox */ + #define MBX_BASE_MBX_SIZE_512 1 /*!< Value for 512 Byte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_1K 0x00000006 /*!< Bitmask for 1 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_1K 3 /*!< Value for 1 KByte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_2K 0x0000000E /*!< Bitmask for 2 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_2K 7 /*!< Value for 2 KByte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_4K 0x0000001E /*!< Bitmask for 4 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_4K 15 /*!< Value for 4 KByte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_8K 0x0000003E /*!< Bitmask for 8 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_8K 31 /*!< Value for 8 KByte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_16K 0x0000007E /*!< Bitmask for 16 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_16K 63 /*!< Value for 16 KByte Mailbox */ + #define MSK_MBX_BASE_MBX_SIZE_32K 0x000000FE /*!< Bitmask for 32 KByte Mailbox */ + #define MBX_BASE_MBX_SIZE_32K 127 /*!< Value for 32 KByte Mailbox */ +/* DPMHS_CHx_HOST_MBX_BASE Bits [0] */ +#define MSK_MBX_BASE_TRANSFER_ENABLE 0x00000001 /*!< Bitmask for enabling Mailbox */ +#define SRT_MBX_BASE_TRANSFER_ENABLE 0 /*!< Shift right term for enabling Mailbox */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* DPM host handshake register (8Bit) */ +/*****************************************************************************/ +/* DPMHS_DPM_HOST_HANDSHAKE8 Bits [31:24] */ +#define MSK_DPM_HSK_HOST_TO_NETX_DATA8 0xFF000000 /*!< Bitmask indicating DPM host to netX handshake data */ +#define SRT_DPM_HSK_HOST_TO_NETX_DATA8 24 /*!< Shift right term for DPM host to netX handshake data */ +/* DPMHS_DPM_HOST_HANDSHAKE8 Bits [23:16] */ +#define MSK_DPM_HSK_NETX_TO_HOST_DATA8 0x0000FFFF /*!< Bitmask indicating DPM netX to host handshake data */ +#define SRT_DPM_HSK_NETX_TO_HOST_DATA8 16 /*!< Shift right term for DPM netX to host handshake data */ +/* DPMHS_DPM_HOST_HANDSHAKE8 Bits [15:8] */ +#define MSK_DPM_HSK_DATA_MEMORY_HIGH 0x0000FF00 /*!< Bitmask indicating DPM handshake data memory high */ +#define SRT_DPM_HSK_DATA_MEMORY_HIGH 8 /*!< Shift right term for DPM handshake data memory high */ +/* DPMHS_DPM_HOST_HANDSHAKE8 Bits [15:8] */ +#define MSK_DPM_HSK_DATA_MEMORY_LOW 0x000000FF /*!< Bitmask indicating DPM handshake data memory low */ +#define SRT_DPM_HSK_DATA_MEMORY_LOW 0 /*!< Shift right term for DPM handshake data memory low */ + +/*****************************************************************************/ +/* DPM host handshake register (16Bit) */ +/*****************************************************************************/ +/* DPMHS_DPM_HOST_HANDSHAKE16 Bits [31:16] */ +#define MSK_DPM_HSK_HOST_TO_NETX_DATA16 0xFFFF0000 /*!< Bitmask indicating DPM host to netX handshake data */ +#define SRT_DPM_HSK_HOST_TO_NETX_DATA16 16 /*!< Shift right term for DPM host to netX handshake data */ +/* DPMHS_DPM_HOST_HANDSHAKE16 Bits [15:0] */ +#define MSK_DPM_HSK_NETX_TO_HOST_DATA16 0x0000FFFF /*!< Bitmask indicating DPM netX to host handshake data */ +#define SRT_DPM_HSK_NETX_TO_HOST_DATA16 0 /*!< Shift right term for DPM netX to host handshake data */ + +/*****************************************************************************/ +/* Watchdog HOST timeout register */ +/*****************************************************************************/ +/* DPMHS_WDG_HOST_TIMEOUT Bits [31:16] */ +#define MSK_WDG_HOST_TIMEOUT_RES0 0xFFFF0000 /*!< Bitmask indicating watchdog host timeout reserved */ +#define SRT_WDG_HOST_TIMEOUT_RES0 16 /*!< Shift right term for watchdog host timeout reserved */ +/* DPMHS_WDG_HOST_TIMEOUT Bits [15:0] */ +#define MSK_WDG_HOST_TIMEOUT_VALUE 0x0000FFFF /*!< Bitmask indicating watchdog host timeout value */ +#define SRT_WDG_HOST_TIMEOUT_VALUE 0 /*!< Shift right term for watchdog host timeout value */ + +/*****************************************************************************/ +/* Watchdog HOST trigger register */ +/*****************************************************************************/ +/* DPMHS_WDG_HOST_TRIG Bits [31:16] */ +#define MSK_WDG_HOST_TRIGGER_RES0 0xFFFF0000 /*!< Bitmask indicating watchdog host trigger reserved */ +#define SRT_WDG_HOST_TRIGGER_RES0 16 /*!< Shift right term for watchdog host trigger reserved */ +/* DPMHS_WDG_HOST_TRIG Bits [15:0] */ +#define MSK_WDG_HOST_TRIGGER_CODE 0x0000FFFF /*!< Bitmask indicating watchdog host trigger code */ +#define SRT_WDG_HOST_TRIGGER_CODE 0 /*!< Shift right term for watchdog host trigger code */ + +/*****************************************************************************/ +/* Watchdog ARM timeout register */ +/*****************************************************************************/ +/* DPMHS_WDG_ARM_TIMEOUT Bits [31:16] */ +#define MSK_WDG_ARM_RES0 0xFFFF0000 /*!< Bitmask indicating watchdog ARM timeout reserved */ +#define SRT_WDG_ARM_RES0 16 /*!< Shift right term for watchdog ARM timeout reserved */ +/* DPMHS_WDG_ARM_TIMEOUT Bits [15:0] */ +#define MSK_WDG_ARM_TIMEOUT_VAL 0x0000FFFF /*!< Bitmask indicating watchdog ARM timeout value */ +#define SRT_WDG_ARM_TIMEOUT_VAL 0 /*!< Shift right term for watchdog ARM timeout value */ + +/*****************************************************************************/ +/* Timer control register */ +/*****************************************************************************/ +/* DPMHS_TMR_CTRL Bits [31:16] */ +#define MSK_TIMER_CTRL_RES1 0xFFFF0000 /*!< Bitmask timer control reserved */ +#define SRT_TIMER_CTRL_RES1 16 /*!< Shift right term for timer control reserved */ +/* DPMHS_TMR_CTRL Bits [15] */ +#define MSK_TIMER_CTRL_START 0x00008000 /*!< Bitmask for starting timer */ +#define SRT_TIMER_CTRL_START 15 /*!< Shift right term for start flag */ +/* DPMHS_TMR_CTRL Bits [14:5] */ +#define MSK_TIMER_CTRL_RES0 0x00007FE0 /*!< Bitmask timer control reserved */ +#define SRT_TIMER_CTRL_RES0 5 /*!< Shift right term for timer control reserved */ +/* DPMHS_TMR_CTRL Bits [4] */ +#define MSK_TIMER_CTRL_SERR_EN 0x00000010 /*!< Bitmask for enabling system error on timer elapse */ +#define SRT_TIMER_CTRL_SERR_EN 4 /*!< Shift right term for system error enabling flag */ +/* DPMHS_TMR_CTRL Bits [3] */ +#define MSK_TIMER_CTRL_FNCT_RELOAD 0x00000008 /*!< Bitmask for enabling cyclic timer */ +#define SRT_TIMER_CTRL_FNCT_RELOAD 3 /*!< Shift right term for cyclic timer enable flag */ +/* DPMHS_TMR_CTRL Bits [2:0] */ +#define MSK_TIMER_CTRL_CLKDIV 0x00000007 /*!< Bitmask for clock divider (which counts timer value) */ +#define SRT_TIMER_CTRL_CLKDIV 0 /*!< Shift right term for clock divider settings */ + /* Definiton of the timer clock divider */ + #define MSK_TIMER_CTRL_CLKDIV_100US 0x00000000 /*!< Set Clock divider to 100 us */ + #define MSK_TIMER_CTRL_CLKDIV_10US 0x00000001 /*!< Set Clock divider to 10 us */ + #define MSK_TIMER_CTRL_CLKDIV_1US 0x00000002 /*!< Set Clock divider to 1 us */ + #define MSK_TIMER_CTRL_CLKDIV_100NS 0x00000003 /*!< Set Clock divider to 100 ns */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Timer start value register */ +/*****************************************************************************/ +/* DPMHS_TMR_START_VALUE Bits [31:16] */ +#define MSK_TMR_START_RES0 0xFFFF0000 /*!< Bitmask indicating timer start reserved */ +#define SRT_TMR_START_RES0 16 /*!< Shift right term for timer start reserved */ +/* DPMHS_CHx_NETX_START Bits [15:0] */ +#define MSK_TMR_START_VALUE 0x0000FFFF /*!< Bitmask indicating timer start value */ +#define SRT_TMR_START_VALUE 0 /*!< Shift right term for timer start value */ + +/*****************************************************************************/ +/* Systen Status register */ +/*****************************************************************************/ +/* DPMHS_SYS_STA Bits [31:16] */ +#define MSK_SYS_STA_RES0 0xFFFF0000 /*!< Bitmask for system state reserved */ +#define SRT_SYS_STA_RES0 16 /*!< Shift right term system state reserved */ +/* DPMHS_SYS_STA Bits [15:8] */ +#define MSK_SYS_STA_NETX_STATE_CODE 0x0000FF00 /*!< Bitmask for system state netx state code */ +#define SRT_SYS_STA_NETX_STATE_CODE 8 /*!< Shift right term system state netx state code */ +/* DPMHS_SYS_STA Bits [7:4] */ +#define MSK_SYS_STA_HOST_STATE 0x000000F0 /*!< Bitmask for system state host state */ +#define SRT_SYS_STA_HOST_STATE 4 /*!< Shift right term system state host state */ +/* DPMHS_SYS_STA Bits [3:2] */ +#define MSK_SYS_STA_NEXT_STATE 0x0000000C /*!< Bitmask for system state netX state */ +#define SRT_SYS_STA_NEXT_STATE 2 /*!< Shift right term system state netX state */ +/* DPMHS_SYS_STA Bits [1] */ +#define MSK_SYS_STA_RUN 0x00000002 /*!< Bitmask for system state run */ +#define SRT_SYS_STA_RUN 1 /*!< Shift right term system state run */ +/* DPMHS_SYS_STA Bits [0] */ +#define MSK_SYS_STA_READY 0x00000001 /*!< Bitmask for system state ready */ +#define SRT_SYS_STA_READY 0 /*!< Shift right term system state ready */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* DPM Host side reset register */ +/*****************************************************************************/ +/* DPMHS_RES_REQ Bits [31:17] */ +#define MSK_RES_REQ_RES0 0xFFFE0000 /*!< Bitmask for reset request reserved */ +#define SRT_RES_REQ_RES0 17 /*!< Shift right term request reserved */ +/* DPMHS_RES_REQ Bits [16:8] */ +#define MSK_RES_REQ_COUNT 0x0001FF00 /*!< Bitmask for reset request counter */ +#define SRT_RES_REQ_COUNT 8 /*!< Shift right term request counter */ +/* DPMHS_RES_REQ Bits [7:0] */ +#define MSK_RES_REQ_CTRL 0x000000FF /*!< Bitmask for reset request control */ +#define SRT_RES_REQ_CTRL 0 /*!< Shift right term request control */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Interrupt status 0 register */ +/*****************************************************************************/ +/* DPMHS_INT_STA0 Bits [31:25] */ +#define MSK_IRQ_STA0_INT_REQ 0x80000000 /*!< Global Interrupt bitmask */ +#define SRT_IRQ_STA0_INT_REQ 31 /*!< Shift right term for global interrupt */ +#define MSK_IRQ_STA0_MEM_LOCK 0x40000000 /*!< Memory lock interrupt bitmask */ +#define SRT_IRQ_STA0_MEM_LOCK 30 /*!< Shift right term for memory lock irq */ +#define MSK_IRQ_STA0_WATCHDOG 0x20000000 /*!< Watchdog interrupt bitmask */ +#define SRT_IRQ_STA0_WATCHDOG 29 /*!< Shift right term for watchdog irq */ +/* DPMHS_INT_STA0 Bits [28:27] */ +#define MSK_IRQ_STA0_RES1 0x18000000 /*!< Interrupt STA0 reserved bitmask */ +#define SRT_IRQ_STA0_RES1 27 /*!< Shift right term for reserved bitmask */ +/* DPMHS_INT_STA0 Bits [26:25] */ +#define MSK_IRQ_STA0_SYSSTA 0x04000000 /*!< System state change interrupt bitmask */ +#define SRT_IRQ_STA0_SYSSTA 26 /*!< Shift right term for System state change */ +#define MSK_IRQ_STA0_TIMER 0x02000000 /*!< Timer interrupt bitmask */ +#define SRT_IRQ_STA0_TIMER 25 /*!< Shift right term for timer irq */ +/* DPMHS_INT_STA0 Bits [24] */ +#define MSK_IRQ_STA0_RES0 0x01000000 /*!< Interrupt STA0 reserved bitmask */ +#define SRT_IRQ_STA0_RES0 24 /*!< Shift right term for reserved bitmask */ +/* DPMHS_INT_STA0 Bits [23:16] */ +#define MSK_IRQ_STA0_VECTOR 0x00FF0000 /*!< Interrupt vector bitmask */ +#define SRT_IRQ_STA0_VECTOR 16 /*!< Shift right term for interrupt vector */ + /* Interrupt vector */ + #define MSK_IRQ_STA0_VECTOR_HS0 0x00100000 /*!< Handshake cell 0 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS0 0x10 /*!< Handshake cell 0 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS1 0x00110000 /*!< Handshake cell 1 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS1 0x11 /*!< Handshake cell 1 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS2 0x00120000 /*!< Handshake cell 2 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS2 0x12 /*!< Handshake cell 2 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS3 0x00130000 /*!< Handshake cell 3 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS3 0x13 /*!< Handshake cell 3 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS4 0x00140000 /*!< Handshake cell 4 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS4 0x14 /*!< Handshake cell 4 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS5 0x00150000 /*!< Handshake cell 5 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS5 0x15 /*!< Handshake cell 5 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS6 0x00160000 /*!< Handshake cell 6 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS6 0x16 /*!< Handshake cell 6 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS7 0x00170000 /*!< Handshake cell 7 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS7 0x17 /*!< Handshake cell 7 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS8 0x00180000 /*!< Handshake cell 8 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS8 0x18 /*!< Handshake cell 8 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS9 0x00190000 /*!< Handshake cell 9 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS9 0x19 /*!< Handshake cell 9 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS10 0x001A0000 /*!< Handshake cell 10 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS10 0x1A /*!< Handshake cell 10 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS11 0x001B0000 /*!< Handshake cell 11 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS11 0x1B /*!< Handshake cell 11 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS12 0x001C0000 /*!< Handshake cell 12 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS12 0x1C /*!< Handshake cell 12 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS13 0x001D0000 /*!< Handshake cell 13 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS13 0x1D /*!< Handshake cell 13 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS14 0x001E0000 /*!< Handshake cell 14 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS14 0x1E /*!< Handshake cell 14 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_HS15 0x001F0000 /*!< Handshake cell 15 interrupt bitmask */ + #define IRQ_STA0_VECTOR_HS15 0x1F /*!< Handshake cell 15 interrupt value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH0 0x00200000 /*!< netX controlled DMA Ch#0 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH0 0x20 /*!< netX controlled DMA Ch#0 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH1 0x00210000 /*!< netX controlled DMA Ch#1 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH1 0x21 /*!< netX controlled DMA Ch#1 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH2 0x00220000 /*!< netX controlled DMA Ch#2 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH2 0x22 /*!< netX controlled DMA Ch#2 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH3 0x00230000 /*!< netX controlled DMA Ch#3 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH3 0x23 /*!< netX controlled DMA Ch#3 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH4 0x00240000 /*!< netX controlled DMA Ch#4 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH4 0x24 /*!< netX controlled DMA Ch#4 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH5 0x00250000 /*!< netX controlled DMA Ch#5 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH5 0x25 /*!< netX controlled DMA Ch#5 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH6 0x00260000 /*!< netX controlled DMA Ch#6 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH6 0x26 /*!< netX controlled DMA Ch#6 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_DATA_CH7 0x00270000 /*!< netX controlled DMA Ch#7 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_DATA_CH7 0x27 /*!< netX controlled DMA Ch#7 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH0 0x00300000 /*!< netX controlled DMA Ch#0 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH0 0x30 /*!< netX controlled DMA Ch#0 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH1 0x00310000 /*!< netX controlled DMA Ch#1 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH1 0x31 /*!< netX controlled DMA Ch#1 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH2 0x00320000 /*!< netX controlled DMA Ch#2 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH2 0x32 /*!< netX controlled DMA Ch#2 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH3 0x00330000 /*!< netX controlled DMA Ch#3 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH3 0x33 /*!< netX controlled DMA Ch#3 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH4 0x00340000 /*!< netX controlled DMA Ch#4 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH4 0x34 /*!< netX controlled DMA Ch#4 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH5 0x00350000 /*!< netX controlled DMA Ch#5 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH5 0x35 /*!< netX controlled DMA Ch#5 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH6 0x00360000 /*!< netX controlled DMA Ch#6 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH6 0x36 /*!< netX controlled DMA Ch#6 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_NETXC_MBX_CH7 0x00370000 /*!< netX controlled DMA Ch#7 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_NETXC_MBX_CH7 0x37 /*!< netX controlled DMA Ch#7 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH0 0x00400000 /*!< Host controlled DMA Ch#0 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH0 0x40 /*!< Host controlled DMA Ch#0 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH1 0x00410000 /*!< Host controlled DMA Ch#1 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH1 0x41 /*!< Host controlled DMA Ch#1 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH2 0x00420000 /*!< Host controlled DMA Ch#2 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH2 0x42 /*!< Host controlled DMA Ch#2 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH3 0x00430000 /*!< Host controlled DMA Ch#3 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH3 0x43 /*!< Host controlled DMA Ch#3 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH4 0x00440000 /*!< Host controlled DMA Ch#4 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH4 0x44 /*!< Host controlled DMA Ch#4 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH5 0x00450000 /*!< Host controlled DMA Ch#5 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH5 0x45 /*!< Host controlled DMA Ch#5 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH6 0x00460000 /*!< Host controlled DMA Ch#6 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH6 0x46 /*!< Host controlled DMA Ch#6 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_DATA_CH7 0x00470000 /*!< Host controlled DMA Ch#7 irq (data) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_DATA_CH7 0x47 /*!< Host controlled DMA Ch#7 irq (data) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH0 0x00500000 /*!< Host controlled DMA Ch#0 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH0 0x50 /*!< Host controlled DMA Ch#0 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH1 0x00510000 /*!< Host controlled DMA Ch#1 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH1 0x51 /*!< Host controlled DMA Ch#1 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH2 0x00520000 /*!< Host controlled DMA Ch#2 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH2 0x52 /*!< Host controlled DMA Ch#2 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH3 0x00530000 /*!< Host controlled DMA Ch#3 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH3 0x53 /*!< Host controlled DMA Ch#3 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH4 0x00540000 /*!< Host controlled DMA Ch#4 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH4 0x54 /*!< Host controlled DMA Ch#4 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH5 0x00550000 /*!< Host controlled DMA Ch#5 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH5 0x55 /*!< Host controlled DMA Ch#5 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH6 0x00560000 /*!< Host controlled DMA Ch#6 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH6 0x56 /*!< Host controlled DMA Ch#6 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_HOSTC_MBX_CH7 0x00570000 /*!< Host controlled DMA Ch#7 irq (mbx) bitmask */ + #define IRQ_STA0_VECTOR_HOSTC_MBX_CH7 0x57 /*!< Host controlled DMA Ch#7 irq (mbx) value */ + #define MSK_IRQ_STA0_VECTOR_MEMLOCK 0x00600000 /*!< Memory lock interrupt bitmask */ + #define IRQ_STA0_VECTOR_MEMLOCK 0x60 /*!< Memory lock interrupt value */ + #define MSK_IRQ_STA0_VECTOR_WDGTIMEOUT 0x00610000 /*!< Watchdog timeout bitmask */ + #define IRQ_STA0_VECTOR_WDGTIMEOUT 0x61 /*!< Watchdog timeout value */ + #define MSK_IRQ_STA0_VECTOR_SYSSTA 0x00700000 /*!< System state change intterupt bitmask */ + #define IRQ_STA0_VECTOR_SYSSTA 0x70 /*!< System state change intterupt value */ + #define MSK_IRQ_STA0_VECTOR_TIMER 0x00710000 /*!< Timer interrupt bitmask */ + #define IRQ_STA0_VECTOR_TIMER 0x71 /*!< Timer interrupt value */ +/* DPMHS_INT_STA0 Bits [15:0] */ +#define MSK_IRQ_STA0_HANDSHAKE 0x0000FFFF /*!< Handshake interrupt mask (Each bit = 1 cell) */ +#define SRT_IRQ_STA0_HANDSHAKE 0 /*!< Shift right term for handshake interrupt */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Interrupt status 1 register */ +/*****************************************************************************/ +/* DPMHS_INT_STA1 Bits [31:24] */ +#define MSK_IRQ_STA1_NETXC_DATA_CH7 0x80000000 /*!< netX controlled DMA Ch#7 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH7 31 /*!< netX controlled DMA Ch#7 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH6 0x40000000 /*!< netX controlled DMA Ch#6 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH6 30 /*!< netX controlled DMA Ch#6 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH5 0x20000000 /*!< netX controlled DMA Ch#5 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH5 29 /*!< netX controlled DMA Ch#5 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH4 0x10000000 /*!< netX controlled DMA Ch#4 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH4 28 /*!< netX controlled DMA Ch#4 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH3 0x08000000 /*!< netX controlled DMA Ch#3 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH3 27 /*!< netX controlled DMA Ch#3 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH2 0x04000000 /*!< netX controlled DMA Ch#2 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH2 26 /*!< netX controlled DMA Ch#2 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH1 0x02000000 /*!< netX controlled DMA Ch#1 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH1 25 /*!< netX controlled DMA Ch#1 irq (data) srt */ +#define MSK_IRQ_STA1_NETXC_DATA_CH0 0x01000000 /*!< netX controlled DMA Ch#0 irq (data) bitmask */ +#define SRT_IRQ_STA1_NETXC_DATA_CH0 24 /*!< netX controlled DMA Ch#0 irq (data) srt */ +/* DPMHS_INT_STA1 Bits [23:16] */ +#define MSK_IRQ_STA1_NETXC_MBX_CH7 0x00800000 /*!< netX controlled DMA Ch#7 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH7 23 /*!< netX controlled DMA Ch#7 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH6 0x00400000 /*!< netX controlled DMA Ch#6 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH6 22 /*!< netX controlled DMA Ch#6 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH5 0x00200000 /*!< netX controlled DMA Ch#5 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH5 21 /*!< netX controlled DMA Ch#5 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH4 0x00100000 /*!< netX controlled DMA Ch#4 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH4 20 /*!< netX controlled DMA Ch#4 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH3 0x00080000 /*!< netX controlled DMA Ch#3 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH3 19 /*!< netX controlled DMA Ch#3 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH2 0x00040000 /*!< netX controlled DMA Ch#2 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH2 18 /*!< netX controlled DMA Ch#2 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH1 0x00020000 /*!< netX controlled DMA Ch#1 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH1 17 /*!< netX controlled DMA Ch#1 irq (mbx) srt */ +#define MSK_IRQ_STA1_NETXC_MBX_CH0 0x00010000 /*!< netX controlled DMA Ch#0 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_NETXC_MBX_CH0 16 /*!< netX controlled DMA Ch#0 irq (mbx) srt */ +/* DPMHS_INT_STA1 Bits [15:8] */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH7 0x00008000 /*!< Host controlled DMA Ch#7 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH7 15 /*!< Host controlled DMA Ch#7 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH6 0x00004000 /*!< Host controlled DMA Ch#6 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH6 14 /*!< Host controlled DMA Ch#6 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH5 0x00002000 /*!< Host controlled DMA Ch#5 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH5 13 /*!< Host controlled DMA Ch#5 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH4 0x00001000 /*!< Host controlled DMA Ch#4 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH4 12 /*!< Host controlled DMA Ch#4 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH3 0x00000800 /*!< Host controlled DMA Ch#3 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH3 11 /*!< Host controlled DMA Ch#3 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH2 0x00000400 /*!< Host controlled DMA Ch#2 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH2 10 /*!< Host controlled DMA Ch#2 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH1 0x00000200 /*!< Host controlled DMA Ch#1 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH1 9 /*!< Host controlled DMA Ch#1 irq (data) srt */ +#define MSK_IRQ_STA1_HOSTC_DATA_CH0 0x00000100 /*!< Host controlled DMA Ch#0 irq (data) bitmask */ +#define SRT_IRQ_STA1_HOSTC_DATA_CH0 8 /*!< Host controlled DMA Ch#0 irq (data) srt */ +/* DPMHS_INT_STA1 Bits [7:0] */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH7 0x00000080 /*!< Host controlled DMA Ch#7 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH7 7 /*!< Host controlled DMA Ch#7 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH6 0x00000040 /*!< Host controlled DMA Ch#6 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH6 6 /*!< Host controlled DMA Ch#6 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH5 0x00000020 /*!< Host controlled DMA Ch#5 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH5 5 /*!< Host controlled DMA Ch#5 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH4 0x00000010 /*!< Host controlled DMA Ch#4 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH4 4 /*!< Host controlled DMA Ch#4 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH3 0x00000008 /*!< Host controlled DMA Ch#3 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH3 3 /*!< Host controlled DMA Ch#3 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH2 0x00000004 /*!< Host controlled DMA Ch#2 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH2 2 /*!< Host controlled DMA Ch#2 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH1 0x00000002 /*!< Host controlled DMA Ch#1 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH1 1 /*!< Host controlled DMA Ch#1 irq (mbx) srt */ +#define MSK_IRQ_STA1_HOSTC_MBX_CH0 0x00000001 /*!< Host controlled DMA Ch#0 irq (mbx) bitmask */ +#define SRT_IRQ_STA1_HOSTC_MBX_CH0 0 /*!< Host controlled DMA Ch#0 irq (mbx) srt */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Interrupt enable 0 register */ +/*****************************************************************************/ +/* DPMHS_INT_EN0 Bits [31:29] */ +#define MSK_IRQ_EN0_INT_REQ 0x80000000 /*!< Global Interrupt bitmask */ +#define SRT_IRQ_EN0_INT_REQ 31 /*!< Shift right term for global interrupt */ +#define MSK_IRQ_EN0_MEM_LOCK 0x40000000 /*!< Memory lock interrupt bitmask */ +#define SRT_IRQ_EN0_MEM_LOCK 30 /*!< Shift right term for memory lock irq */ +#define MSK_IRQ_EN0_WATCHDOG 0x20000000 /*!< Watchdog interrupt bitmask */ +#define SRT_IRQ_EN0_WATCHDOG 29 /*!< Shift right term for watchdog irq */ +/* DPMHS_INT_EN0 Bits [28:27] */ +#define MSK_IRQ_EN0_RES_1 0x18000000 /*!< Reserved bitmask */ +#define SRT_IRQ_EN0_RES_1 27 /*!< Shift right term reserved bitmask */ +/* DPMHS_INT_EN0 Bits [26:25] */ +#define MSK_IRQ_EN0_SYSSTA 0x04000000 /*!< System state change interrupt bitmask */ +#define SRT_IRQ_EN0_SYSSTA 26 /*!< Shift right term for System state change */ +#define MSK_IRQ_EN0_TIMER 0x02000000 /*!< Timer interrupt bitmask */ +#define SRT_IRQ_EN0_TIMER 25 /*!< Shift right term for timer irq */ +/* DPMHS_INT_EN0 Bits [24:16] */ +#define MSK_IRQ_EN0_RES_0 0x01FF0000 /*!< Reserved bitmask */ +#define SRT_IRQ_EN0_RES_0 16 /*!< Shift right term reserved bitmask */ +/* DPMHS_INT_EN0 Bits [15:0] */ +#define MSK_IRQ_EN0_HANDSHAKE 0x0000FFFF /*!< Handshake interrupt mask (Each bit = 1 cell) */ +#define SRT_IRQ_EN0_HANDSHAKE 0 /*!< Shift right term for handshake interrupt */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Interrupt enable 1 register */ +/*****************************************************************************/ +/* DPMHS_INT_EN1 Bits [31:24] */ +#define MSK_IRQ_EN1_NETXC_DATA_CH7 0x80000000 /*!< netX controlled DMA Ch#7 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH7 31 /*!< netX controlled DMA Ch#7 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH6 0x40000000 /*!< netX controlled DMA Ch#6 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH6 30 /*!< netX controlled DMA Ch#6 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH5 0x20000000 /*!< netX controlled DMA Ch#5 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH5 29 /*!< netX controlled DMA Ch#5 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH4 0x10000000 /*!< netX controlled DMA Ch#4 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH4 28 /*!< netX controlled DMA Ch#4 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH3 0x08000000 /*!< netX controlled DMA Ch#3 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH3 27 /*!< netX controlled DMA Ch#3 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH2 0x04000000 /*!< netX controlled DMA Ch#2 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH2 26 /*!< netX controlled DMA Ch#2 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH1 0x02000000 /*!< netX controlled DMA Ch#1 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH1 25 /*!< netX controlled DMA Ch#1 irq (data) srt */ +#define MSK_IRQ_EN1_NETXC_DATA_CH0 0x01000000 /*!< netX controlled DMA Ch#0 irq (data) bitmask */ +#define SRT_IRQ_EN1_NETXC_DATA_CH0 24 /*!< netX controlled DMA Ch#0 irq (data) srt */ +/* DPMHS_INT_EN1 Bits [23:16] */ +#define MSK_IRQ_EN1_NETXC_MBX_CH7 0x00800000 /*!< netX controlled DMA Ch#7 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH7 23 /*!< netX controlled DMA Ch#7 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH6 0x00400000 /*!< netX controlled DMA Ch#6 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH6 22 /*!< netX controlled DMA Ch#6 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH5 0x00200000 /*!< netX controlled DMA Ch#5 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH5 21 /*!< netX controlled DMA Ch#5 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH4 0x00100000 /*!< netX controlled DMA Ch#4 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH4 20 /*!< netX controlled DMA Ch#4 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH3 0x00080000 /*!< netX controlled DMA Ch#3 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH3 19 /*!< netX controlled DMA Ch#3 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH2 0x00040000 /*!< netX controlled DMA Ch#2 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH2 18 /*!< netX controlled DMA Ch#2 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH1 0x00020000 /*!< netX controlled DMA Ch#1 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH1 17 /*!< netX controlled DMA Ch#1 irq (mbx) srt */ +#define MSK_IRQ_EN1_NETXC_MBX_CH0 0x00010000 /*!< netX controlled DMA Ch#0 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_NETXC_MBX_CH0 16 /*!< netX controlled DMA Ch#0 irq (mbx) srt */ +/* DPMHS_INT_EN1 Bits [15:8] */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH7 0x00008000 /*!< Host controlled DMA Ch#7 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH7 15 /*!< Host controlled DMA Ch#7 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH6 0x00004000 /*!< Host controlled DMA Ch#6 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH6 14 /*!< Host controlled DMA Ch#6 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH5 0x00002000 /*!< Host controlled DMA Ch#5 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH5 13 /*!< Host controlled DMA Ch#5 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH4 0x00001000 /*!< Host controlled DMA Ch#4 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH4 12 /*!< Host controlled DMA Ch#4 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH3 0x00000800 /*!< Host controlled DMA Ch#3 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH3 11 /*!< Host controlled DMA Ch#3 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH2 0x00000400 /*!< Host controlled DMA Ch#2 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH2 10 /*!< Host controlled DMA Ch#2 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH1 0x00000200 /*!< Host controlled DMA Ch#1 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH1 9 /*!< Host controlled DMA Ch#1 irq (data) srt */ +#define MSK_IRQ_EN1_HOSTC_DATA_CH0 0x00000100 /*!< Host controlled DMA Ch#0 irq (data) bitmask */ +#define SRT_IRQ_EN1_HOSTC_DATA_CH0 8 /*!< Host controlled DMA Ch#0 irq (data) srt */ +/* DPMHS_INT_EN1 Bits [7:0] */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH7 0x00000080 /*!< Host controlled DMA Ch#7 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH7 7 /*!< Host controlled DMA Ch#7 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH6 0x00000040 /*!< Host controlled DMA Ch#6 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH6 6 /*!< Host controlled DMA Ch#6 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH5 0x00000020 /*!< Host controlled DMA Ch#5 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH5 5 /*!< Host controlled DMA Ch#5 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH4 0x00000010 /*!< Host controlled DMA Ch#4 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH4 4 /*!< Host controlled DMA Ch#4 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH3 0x00000008 /*!< Host controlled DMA Ch#3 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH3 3 /*!< Host controlled DMA Ch#3 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH2 0x00000004 /*!< Host controlled DMA Ch#2 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH2 2 /*!< Host controlled DMA Ch#2 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH1 0x00000002 /*!< Host controlled DMA Ch#1 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH1 1 /*!< Host controlled DMA Ch#1 irq (mbx) srt */ +#define MSK_IRQ_EN1_HOSTC_MBX_CH0 0x00000001 /*!< Host controlled DMA Ch#0 irq (mbx) bitmask */ +#define SRT_IRQ_EN1_HOSTC_MBX_CH0 0 /*!< Host controlled DMA Ch#0 irq (mbx) srt */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +#endif /* __NETX_REGDEFS__H */ diff --git a/libcifx/Toolkit/Source/OS_Dependent.h b/libcifx/Toolkit/Source/OS_Dependent.h new file mode 100644 index 0000000..8132268 --- /dev/null +++ b/libcifx/Toolkit/Source/OS_Dependent.h @@ -0,0 +1,111 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: OS_Dependent.h 14502 2022-06-14 12:18:41Z RMayer $: + + Description: + OS Dependent function declaration. These functions must be implemented for the + toolkit, to allow abstraction from the operating system + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2022-06-07 Added new option and functions to handle cached IO memory buffers + 2021-09-01 - updated function parameters to match templates in OS_Custom.c + - changed OS-Time() parameters to 64Bit data types + 2011-11-29 Added OS_Time() function + 2011-05-25 OS_Init was still using long instead of int32_t as return + 2010-03-29 Added define CIFX_TOOLKIT_ENABLE_DSR_LOCK to allow lockout against + ISR (used in DSR). This needs the functions OS_IrqLock / OS_IrqUnlock + which should lock at least against the Device Interrupt + 2008-06-17 Function OS_MapUserPointer() and OS_UnmapUserPointer() extended by + a new parameter pcOSDependent + 2007-04-19 OS_Strnicmp function included + 2007-03-27 Mutex functions included + 2007-03-21 Support enabling and disabling on interrupts on the card (used for assign + PCI interrupts and enabling the host to process the DPM/PCI Irqs) + 2006-07-07 initial version + +**************************************************************************************/ + +#ifndef __OS_DEPENDENT__H +#define __OS_DEPENDENT__H + +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define CIFX_EVENT_SIGNALLED 0 +#define CIFX_EVENT_TIMEOUT 1 + +int32_t OS_Init(void); +void OS_Deinit(void); + +void* OS_Memalloc(uint32_t ulSize); +void OS_Memfree(void* pvMem); +void* OS_Memrealloc(void* pvMem, uint32_t ulNewSize); + +void OS_Memset(void* pvMem, unsigned char bFill, uint32_t ulSize); +void OS_Memcpy(void* pvDest, void* pvSrc, uint32_t ulSize); +int OS_Memcmp(void* pvBuf1, void* pvBuf2, uint32_t ulSize); +void OS_Memmove(void* pvDest, void* pvSrc, uint32_t ulSize); + +void* OS_ReadPCIConfig(void* pvOSDependent); +void OS_WritePCIConfig(void* pvOSDependent, void* pvPCIConfig); +void OS_EnableInterrupts(void* pvOSDependent); +void OS_DisableInterrupts(void* pvOSDependent); + +void* OS_FileOpen(char* szFile, uint32_t* pulFileLen); +uint32_t OS_FileRead(void* pvFile, uint32_t ulOffset, uint32_t ulSize, void* pvBuffer); +void OS_FileClose(void* pvFile); + +uint32_t OS_GetMilliSecCounter(void); +void OS_Sleep(uint32_t ulSleepTimeMs); + +void* OS_CreateLock(void); +void OS_EnterLock(void* pvLock); +void OS_LeaveLock(void* pvLock); +void OS_DeleteLock(void* pvLock); + +void* OS_CreateMutex(void); +int OS_WaitMutex(void* pvMutex, uint32_t ulTimeout); +void OS_ReleaseMutex(void* pvMutex); +void OS_DeleteMutex(void* pvMutex); + +void* OS_CreateEvent(void); +void OS_SetEvent(void* pvEvent); +void OS_ResetEvent(void* pvEvent); +void OS_DeleteEvent(void* pvEvent); +uint32_t OS_WaitEvent(void* pvEvent, uint32_t ulTimeout); + +int OS_Strcmp(const char* pszBuf1, const char* pszBuf2); +int OS_Strnicmp(const char* pszBuf1, const char* pszBuf2, uint32_t ulLen); +int OS_Strlen(const char* szText); +char* OS_Strncpy(char* szDest, const char* szSource, uint32_t ulLen); + +void* OS_MapUserPointer(void* pvDriverMem, uint32_t ulMemSize, void** ppvMappedMem, void* pvOSDependent, unsigned char fCached); +int OS_UnmapUserPointer(void* phMapping, void* pvOSDependent); +void OS_FlushCacheMemory_ToDevice(void* pvCachedMemPtr, unsigned long ulMemSize); +void OS_InvalidateCacheMemory_FromDevice(void* pvCachedMemPtr, unsigned long ulMemSize); + +#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK + void OS_IrqLock(void* pvOSDependent); + void OS_IrqUnlock(void* pvOSDependent); +#endif + +#ifdef CIFX_TOOLKIT_TIME + uint64_t OS_Time( uint64_t *ptTime); +#endif + +#ifdef __cplusplus +} +#endif + + +#endif /* __OS_DEPENDENT__H */ diff --git a/libcifx/Toolkit/Source/WarmstartFile.h b/libcifx/Toolkit/Source/WarmstartFile.h new file mode 100644 index 0000000..cc8460e --- /dev/null +++ b/libcifx/Toolkit/Source/WarmstartFile.h @@ -0,0 +1,54 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: WarmstartFile.h 6598 2014-10-02 08:57:18Z stephans $: + + Description: + Read/Write access functions for warm start parameter files + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2006-10-13 Changed to be usable in the toolkit + 2006-06-08 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*!\file WarmstartFile.h +* Read/Write access functions for warm start parameter files */ +/*****************************************************************************/ + +#ifndef __WARMSTART_FILE__H +#define __WARMSTART_FILE__H + +#include "cifXToolkit.h" + +#define CIFX_WS_FIELDBUS_INVALID 0xFFFFFFFFUL /**< Content of fieldbus header element, when data is not validated */ +#define CIFX_WS_FIELDBUS_CAN_OPEN 0UL /**< Content of fieldbus header element for CANOpen slaves */ +#define CIFX_WS_FIELDBUS_PROFIBUS 1UL /**< Content of fieldbus header element for Profibus slaves */ +#define CIFX_WS_FIELDBUS_DEVICENET 2UL /**< Content of fieldbus header element for Devicenet slaves */ +#define CIFX_WS_FIELDBUS_ETHERNETIP 3UL /**< Content of fieldbus header element for Ethernet/IP slaves */ +#define CIFX_WS_FIELDBUS_ETHERCAT 4UL /**< Content of fieldbus header element for Ethercat slaves */ +#define CIFX_WS_FIELDBUS_SERCOS3 5UL /**< Content of fieldbus header element for Sercos III slaves */ +#define CIFX_WS_FIELDBUS_PROFINET 6UL /**< Content of fieldbus header element for Profinet slaves */ + +#define CIFX_WS_WARMSTART_FILE_COOKIE 0x12345678 /* First DWORD of a warmstart file, identifying it as such */ + +/*****************************************************************************/ +/* File header structure (prepends every warm start file) */ +/*****************************************************************************/ +typedef struct CIFX_WS_FILEHEADERtag +{ + uint32_t ulCookie; /**< identifier */ + uint32_t ulCRC32; /**< CRC of data portion */ + uint32_t ulFieldbus; /**< fieldbus the data is for */ + uint32_t ulDataLen; /**< length of the following data */ + uint8_t abReserved[16]; /**< reserved values */ + +} CIFX_WS_FILEHEADER, *PCIFX_WS_FILEHEADER; + +#endif /* __WARMSTART_FILE__H */ diff --git a/libcifx/Toolkit/Source/cifXDownload.c b/libcifx/Toolkit/Source/cifXDownload.c new file mode 100644 index 0000000..d68b0b4 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXDownload.c @@ -0,0 +1,1508 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXDownload.c 14700 2023-04-27 08:11:12Z RMayer $: + + Description: + cifX download functionality + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-21 Added file size 0 check and sending abort cmd in DEV_UploadFile(), + to prevent ERR_HIL_RESOURCE_IN_USE because of not executed HIL_FILE_UPLOAD_DATA_REQ + 2021-08-13 Removed "\r\n" from trace strings, now generally handled in USER-Trace() + 2019-02-22 Add possibility to download netX90 /netX4000 firmware updates + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file cifXDownload.c +* cifX download functionality */ +/*****************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +#include "Hil_ModuleLoader.h" +#include "Hil_SystemCmd.h" +#include "Hil_Results.h" +#include "Hilmd5.h" +#include "Hilcrc32.h" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_HARDWARE Hardware Access +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Delete all existing files in a channel, from the file system. +* \param ptChannel Channel instance +* \param ulChannel Channel number +* \param pfnTransferPacket Function used for transferring packets +* \param pfnRecvPacket User callback for unsolicited receive packets +* \param pvUser User parameter passed on callback +* \param szExceptFile File extension to ignore while deleting files +* \return always returns 1 */ +/*****************************************************************************/ +int DEV_RemoveChannelFiles(PCHANNELINSTANCE ptChannel, uint32_t ulChannel, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser, + char* szExceptFile) +{ + /* Try to find file with the extension *.nxm, *.nxf, *.mod and remove it */ + CIFX_DIRECTORYENTRY tDirectoryEntry; + int32_t lRet = CIFX_NO_ERROR; + int fFindFirst = 1; + + /* Search for all firmware files. If one is found. delete it an start with find first again, */ + /* because we can't store a directory list in here */ + do + { + if ( fFindFirst) + { + OS_Memset(&tDirectoryEntry, 0, sizeof(tDirectoryEntry)); + + /* Search first file */ + if ( !(CIFX_NO_ERROR == (lRet = xSysdeviceFindFirstFile( ptChannel, ulChannel, &tDirectoryEntry, pfnRecvPacket, pvUser)))) + { + /* No more files, or error during find first */ + break; + } else + { + /* Is this a valid file name */ + int iStrlen = OS_Strlen(tDirectoryEntry.szFilename); + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + if( !((NULL != szExceptFile) && + (4 == OS_Strlen(szExceptFile)) && + (0 == OS_Strnicmp( szExceptFile, &tDirectoryEntry.szFilename[iStrlen - 4], 4))) ) + { + /* Delete file and continue with find first file again */ + (void)DEV_DeleteFile( ptChannel, ulChannel, tDirectoryEntry.szFilename, pfnTransferPacket, pfnRecvPacket, pvUser); + } + } else + { + /* Not a valid file, search next file */ + fFindFirst = 0; + } + } + } else + { + /* Search for more files */ + if ( !(CIFX_NO_ERROR == (lRet = xSysdeviceFindNextFile( ptChannel, ulChannel, &tDirectoryEntry, pfnRecvPacket, pvUser)))) + { + /* No more files, or error during find next */ + break; + } else + { + /* Is this a valid file name */ + int iStrlen = OS_Strlen(tDirectoryEntry.szFilename); + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + /* If firmware file, delete it, else search until all files checked */ + if( !((NULL != szExceptFile) && + (4 == OS_Strlen(szExceptFile)) && + (0 == OS_Strnicmp( szExceptFile, &tDirectoryEntry.szFilename[iStrlen - 4], 4))) ) + { + /* Delete the file and start with find first again */ + (void)DEV_DeleteFile( ptChannel, ulChannel, tDirectoryEntry.szFilename, pfnTransferPacket, pfnRecvPacket, pvUser); + fFindFirst = 1; + } + } + } + } + } while ( CIFX_NO_ERROR == lRet); + + return 1; +} + +/*****************************************************************************/ +/*! Check if we have a firmware file +* \param pszFileName Input file name +* \return 1 on success */ +/*****************************************************************************/ +int DEV_IsFWFile( char* pszFileName) +{ + /* Check if we have a .NXO, .NXF,.NXM or .MOD extension */ + int fRet = 0; + int iStrlen = OS_Strlen(pszFileName); + + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + if ( (0 == OS_Strnicmp( HIL_FILE_EXTENSION_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( HIL_FILE_EXTENSION_NXM_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( HIL_FILE_EXTENSION_OPTION, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( ".MOD", &pszFileName[iStrlen - 4], 4) ) ) + { + fRet = 1; + } + } + + return fRet; +} + +/*****************************************************************************/ +/*! Check if we have a firmware (update) file for netX90 and netX4000 +* \param pszFileName Input file name +* \return 1 on success */ +/*****************************************************************************/ +int DEV_IsFWFileNetX90or4000( char* pszFileName) +{ + /* Check if we have a .NXI or .NAI extension, or FWUPDATE.ZIP / FWUPDATE.NXS + Note: NXE or NAE should be downloaded in update container. + */ + int fRet = 0; + int iStrlen = OS_Strlen(pszFileName); + + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + if ( (0 == OS_Strnicmp( HIL_FILE_EXTENSION_NXI_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( HIL_FILE_EXTENSION_NAI_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) ) + { + fRet = 1; + + /* Check for ZIP container */ + } else if( (iStrlen == OS_Strlen("FWUPDATE.ZIP")) && + (0 == OS_Strnicmp( "FWUPDATE.ZIP", &pszFileName[0], iStrlen)) ) + { + fRet = 1; + + /* Check for NXS container */ + } else if( (iStrlen == OS_Strlen("FWUPDATE.NXS")) && + (0 == OS_Strnicmp( "FWUPDATE.NXS", &pszFileName[0], iStrlen)) ) + { + fRet = 1; + } + } + + return fRet; +} + +/*****************************************************************************/ +/*! Check if we have a NXO file +* \param pszFileName Input file name +* \return 1 on success */ +/*****************************************************************************/ +int DEV_IsNXOFile( char* pszFileName) +{ + /* Check if we have a .NXO, .NXF,.NXM or .MOD extension */ + int fRet = 0; + int iStrlen = OS_Strlen(pszFileName); + + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + if ( 0 == OS_Strnicmp( HIL_FILE_EXTENSION_OPTION, &pszFileName[iStrlen - 4], 4) ) + { + fRet = 1; + } + } + + return fRet; +} + +/*****************************************************************************/ +/*! Check if we have a NXF file +* \param pszFileName Input file name +* \return 1 on success */ +/*****************************************************************************/ +int DEV_IsNXFFile( char* pszFileName) +{ + /* Check if we have a .NXO, .NXF,.NXM or .MOD extension */ + int fRet = 0; + int iStrlen = OS_Strlen(pszFileName); + + if( iStrlen >= CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + if ( 0 == OS_Strnicmp( HIL_FILE_EXTENSION_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) + { + fRet = 1; + } + } + + return fRet; +} + +/*****************************************************************************/ +/*! Delete existing firmware file from file system. +* This should prevent multiple firmware files in the file system, where +* only the first one is usable. +* \param ptChannel Channel instance +* \param ulChannel Channel number +* \param pfnTransferPacket Function used for transferring packets +* \param pfnRecvPacket User callback for unsolicited receive packets +* \param pvUser User parameter passed on callback +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int DEV_RemoveFWFiles(PCHANNELINSTANCE ptChannel, uint32_t ulChannel, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser) +{ + /* Try to find file with the extension *.nxm, *.nxf, *.mod and remove it */ + CIFX_DIRECTORYENTRY tDirectoryEntry; + int32_t lRet = CIFX_NO_ERROR; + int fFindFirst = 1; + + OS_Memset(&tDirectoryEntry, 0, sizeof(tDirectoryEntry)); + + /* Search for all firmware files. If one is found. delete it an start with find first again, */ + /* because we can't store a directory list in here */ + do + { + if ( fFindFirst) + { + /* Search first file */ + if ( !(CIFX_NO_ERROR == (lRet = xSysdeviceFindFirstFile( ptChannel, ulChannel, &tDirectoryEntry, pfnRecvPacket, pvUser)))) + { + /* No more files, or error during find first */ + break; + } else + { + /* Check for firmware file */ + if( DEV_IsFWFile( tDirectoryEntry.szFilename)) + { + /* Delete file and continue with find first file again */ + (void)DEV_DeleteFile( ptChannel, ulChannel, tDirectoryEntry.szFilename, pfnTransferPacket, pfnRecvPacket, pvUser); + } else + { + /* Not a firmware, search next file */ + fFindFirst = 0; + } + } + } else + { + /* Search for more files */ + if ( !(CIFX_NO_ERROR == (lRet = xSysdeviceFindNextFile( ptChannel, ulChannel, &tDirectoryEntry, pfnRecvPacket, pvUser)))) + { + /* No more files, or error during find next */ + break; + } else + { + /* If firmware file, delete it, else search until all files checked */ + if (DEV_IsFWFile( tDirectoryEntry.szFilename)) + { + /* Delete file and continue with find first file again */ + (void)DEV_DeleteFile( ptChannel, ulChannel, tDirectoryEntry.szFilename, pfnTransferPacket, pfnRecvPacket, pvUser); + fFindFirst = 1; + } + } + } + } while ( CIFX_NO_ERROR == lRet); + + return 1; +} + +/*****************************************************************************/ +/*! Delete the given file +* \param pvChannel Channel instance +* \param ulChannelNumber Channel number +* \param pszFileName Input file name +* \param pfnTransferPacket Function used for transferring packets +* \param pfnRecvPacket User callback for unsolicited receive packets +* \param pvUser User parameter passed on callback +* \return 1 on success */ +/*****************************************************************************/ +int32_t DEV_DeleteFile(void* pvChannel, uint32_t ulChannelNumber, char* pszFileName, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser) +{ + /* Create delete packet */ + union + { + CIFX_PACKET tPacket; + HIL_FILE_DELETE_REQ_T tFileDelete; + + } uSendPkt; + CIFX_PACKET tConf; + char* pbCopyPtr = NULL; + uint32_t ulCopySize = 0; + uint16_t usFileNameLen = (uint16_t)OS_Strlen(pszFileName); + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulSrc = OS_GetMilliSecCounter(); /* Early versions used pvChannel as ulSrc, + but this won't work on 64 Bit machines. + As we need something unique we use the current system time */ + + + OS_Memset(&uSendPkt, 0, sizeof(uSendPkt)); + OS_Memset(&tConf, 0, sizeof(tConf)); + + /* Initialize the message */ + uSendPkt.tFileDelete.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tFileDelete.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tFileDelete.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_DELETE_REQ); + uSendPkt.tFileDelete.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tFileDelete.tHead.ulLen = HOST_TO_LE32((uint32_t)(sizeof(uSendPkt.tFileDelete.tData) + + usFileNameLen + 1)); + + /* Insert file data */ + uSendPkt.tFileDelete.tData.ulChannelNo = HOST_TO_LE32(ulChannelNumber); + uSendPkt.tFileDelete.tData.usFileNameLength = HOST_TO_LE16( (uint16_t)(usFileNameLen + 1) ); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPkt.tPacket.abData[0])) + sizeof(uSendPkt.tFileDelete.tData); + ulCopySize = min( (sizeof(uSendPkt.tPacket.abData) - sizeof(uSendPkt.tFileDelete.tData)), uSendPkt.tFileDelete.tData.usFileNameLength); + + /* Insert file name */ + (void)OS_Strncpy( pbCopyPtr, pszFileName, ulCopySize); + + /* Send delete packet */ + lRet = pfnTransferPacket( pvChannel, + &uSendPkt.tPacket, + (CIFX_PACKET*)&tConf, + (uint32_t)sizeof(tConf), + CIFX_TO_FIRMWARE_START, /* Could take a little while */ + pfnRecvPacket, + pvUser); + + if(CIFX_NO_ERROR == lRet) + lRet = LE32_TO_HOST(tConf.tHeader.ulState); + + return lRet; +} + +/*****************************************************************************/ +/*! Get the firmware transfer type from file name +* \param eChipType netC chip type working on +* \param pszFileName Input file name +* \param pulTransferType Buffer for transfer type +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_GetFWTransferTypeFromFileName( CIFX_TOOLKIT_CHIPTYPE_E eChipType, + char* pszFileName, + uint32_t* pulTransferType) +{ + /* Check if we have a NXF or .NXM / .MOD extension */ + int32_t lRet = CIFX_NO_ERROR; + + int iStrlen = (int)OS_Strlen(pszFileName); + if( iStrlen < CIFX_MIN_FILE_NAME_LENGTH) /* At least x.abc */ + { + lRet = CIFX_FILE_NAME_INVALID; + } else + { + /* Check if we have a valid firmware file */ + lRet = CIFX_FILE_TYPE_INVALID; + + /* netX90/netX4000 files */ + if( (eCHIP_TYPE_NETX90 == eChipType) || + (eCHIP_TYPE_NETX4000 == eChipType) ) + { + if (DEV_IsFWFileNetX90or4000( pszFileName)) + { + /* Use file transfer type for netX90/4000 updates */ + *pulTransferType = HIL_FILE_XFER_FILE; + lRet = CIFX_NO_ERROR; + } + } else if (DEV_IsFWFile( pszFileName)) + { + /* other firmware files */ + /* We have a firmware file, choose the correct download type */ + if ( (0 == OS_Strnicmp( HIL_FILE_EXTENSION_NXM_FIRMWARE, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( HIL_FILE_EXTENSION_OPTION, &pszFileName[iStrlen - 4], 4) ) || + (0 == OS_Strnicmp( ".MOD", &pszFileName[iStrlen - 4], 4) ) ) + { + /* We are using the module file transfer type */ + *pulTransferType = HIL_FILE_XFER_MODULE; + } else + { + /* All other files are downloaded via the file transfer type */ + *pulTransferType = HIL_FILE_XFER_FILE; + } + lRet = CIFX_NO_ERROR; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Check if we have to download a file +* \param pvChannel Channel instance +* \param ulChannelNumber Channel number +* \param pfDownload Download flag +* \param pszFileName File name +* \param pvFileData File data buffer +* \param ulFileSize File size +* \param pfnTransferPacket Transfer packet function +* \param pfnRecvPacket Receive packet callback for unhandled packets +* \param pvUser User data for callback functions +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_CheckForDownload( void* pvChannel, uint32_t ulChannelNumber, int* pfDownload, + char* pszFileName, void* pvFileData, uint32_t ulFileSize, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)pvChannel; + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + /* Read the MD5 from the system */ + union + { + CIFX_PACKET tPacket; + HIL_FILE_GET_MD5_REQ_T tRequest; + } uSendPkt; + union + { + CIFX_PACKET tPacket; + HIL_FILE_GET_MD5_CNF_T tConf; + } uConf; + char* pbCopyPtr = NULL; + uint32_t ulCopySize = 0; + uint16_t usFileNameLen = (uint16_t)OS_Strlen(pszFileName); + uint32_t ulSrc = OS_GetMilliSecCounter(); /* Early versions used pvChannel as ulSrc, + but this won't work on 64 Bit machines. + As we need something unique we use the current system time */ + + OS_Memset(&uSendPkt, 0, sizeof(uSendPkt)); + OS_Memset(&uConf, 0, sizeof(uConf)); + + /* Set flag to download always necessary */ + *pfDownload = 1; + + /* Initialize the message */ + uSendPkt.tRequest.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tRequest.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tRequest.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_GET_MD5_REQ); + uSendPkt.tRequest.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tRequest.tHead.ulLen = HOST_TO_LE32((uint32_t)(sizeof(uSendPkt.tRequest.tData) + usFileNameLen + 1)); + uSendPkt.tRequest.tData.usFileNameLength = HOST_TO_LE16( (uint16_t)(usFileNameLen + 1) ); + uSendPkt.tRequest.tData.ulChannelNo = HOST_TO_LE32(ulChannelNumber); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPkt.tPacket.abData[0])) + sizeof(uSendPkt.tRequest.tData); + ulCopySize = min( (sizeof(uSendPkt.tPacket.abData) - sizeof(uSendPkt.tRequest.tData)), uSendPkt.tRequest.tData.usFileNameLength); + + /* Insert file name */ + (void)OS_Strncpy( pbCopyPtr, pszFileName, ulCopySize); + + /* Read the MD5 from the system */ + lRet = pfnTransferPacket( pvChannel, + &uSendPkt.tPacket, + &uConf.tPacket, + (uint32_t)sizeof(uConf.tPacket), + CIFX_TO_FIRMWARE_START, /* Could take a little while */ + pfnRecvPacket, + pvUser); + + if(CIFX_NO_ERROR != lRet) + { + /* Error reading MD5 checksum */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Failed to send MD5 request, lRet = 0x%08x", lRet); + } + } else if(SUCCESS_HIL_OK != LE32_TO_HOST(uConf.tConf.tHead.ulSta)) + { + /* Error reading MD5 checksum */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "No MD5 Information available. Probably the file does not exist on device. (ulState = 0x%08x)", + uConf.tConf.tHead.ulSta); + } + } else + { + /* We got an MD5 from the rcX, test it */ + /* Calculate MD5 */ + md5_state_t tMd5State; + md5_byte_t abMd5[16]; + + OS_Memset(abMd5, 0, sizeof(abMd5)); + + md5_init(&tMd5State); + md5_append(&tMd5State, (md5_byte_t*)pvFileData, ulFileSize); + md5_finish(&tMd5State, abMd5); + + if(OS_Memcmp(abMd5, uConf.tConf.tData.abMD5, sizeof(abMd5)) == 0) + { + /* same file already on device, suppress download */ + *pfDownload = 0; + + /* MD5 checksum is equal, no download necessary */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "MD5 checksum is identical, download not necessary"); + } + + } else + { + /* MD5 checksum is not identical, download necessary */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "MD5 not identical, process file download"); + } + } + } + + return lRet; +} /*lint !e429 : pvFileData not freed or returned */ + +/*****************************************************************************/ +/*! Process firmware download +* \param ptDevInstance Instance to start up +* \param ulChannel Channel number +* \param pszFullFileName Full file name (used for opening file) +* \param pszFileName Short file name (used on device) +* \param ulFileLength Length of the file +* \param pbBuffer File buffer +* \param pbLoadState Returned action of download (see CIFXTKIT_DOWNLOAD_XXX) +* \param pfnTransferPacket Function to used for exchanging packets +* \param pfnCallback Progress callback +* \param pfnRecvPktCallback Callback for unexpected packets +* \param pvUser Callback user parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_ProcessFWDownload( PDEVICEINSTANCE ptDevInstance, + uint32_t ulChannel, + char* pszFullFileName, + char* pszFileName, + uint32_t ulFileLength, + uint8_t* pbBuffer, + uint8_t* pbLoadState, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, + void* pvUser) +{ + PCHANNELINSTANCE ptSysDevice = &ptDevInstance->tSystemDevice; + int32_t lRet = CIFX_NO_ERROR; + + *pbLoadState = CIFXTKIT_DOWNLOAD_NONE; + + /*------------------------------------------------------------*/ + /* Process the firmware download depending on the eDeviceType */ + /*------------------------------------------------------------*/ + switch (ptDevInstance->eDeviceType) + { + /*----------------------------*/ + /* This is a RAM based device */ + /*----------------------------*/ + /* - RAM based devices are started by a RESET and therefore it is not necessary to delete a file */ + /* - Firmware files (NXF) and/or Modules (NXO) are loaded into RAM and not into the file system */ + case eCIFX_DEVICE_RAM_BASED: + { + /* We have not to delete files but we have to change the "transfer type" of the file */ + uint32_t ulTransfertype = HIL_FILE_XFER_MODULE; + + /* Check if we have a NXF*/ + if( DEV_IsNXFFile(pszFileName) && + (0 != ulChannel) ) + { + /* Downloading an NXF to a channel other than 0 is not supported */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error channel number %u for a firmware is not supported", + ulChannel); + } + + /* Check if we have an NXO file */ + } else if( DEV_IsNXOFile(pszFileName) && + (!ptDevInstance->fModuleLoad)) + { + /* Downloading an NXO without a running Base OS is not allowed */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error NXO files are not allowed without a Base OS firmware"); + } + } else + { + /* Download the file stored in the buffer */ + lRet = DEV_DownloadFile(ptSysDevice, + ulChannel, + ptDevInstance->tSystemDevice.tSendMbx.ulSendMailboxLength, + ulTransfertype, + pszFileName, + ulFileLength, + pbBuffer, + pfnTransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + + if(CIFX_NO_ERROR != lRet) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error downloading firmware to device '%s'"\ + " - (lRet=0x%08X)!", + pszFullFileName, + lRet); + } + } else + { + /*-----------------------*/ + /* We have loaded a file */ + /*-----------------------*/ + + /* Check if we have a NXF */ + if ( DEV_IsNXFFile( pszFileName)) + { + /* NXF loaded, store information for startup handling */ + *pbLoadState = CIFXTKIT_DOWNLOAD_FIRMWARE | CIFXTKIT_DOWNLOAD_EXECUTED; /* we have a firmware loaded */ + } + + /* Check if we have a NXO */ + if ( DEV_IsNXOFile( pszFileName)) + { + /* NXO loaded, store information for startup handling */ + *pbLoadState = CIFXTKIT_DOWNLOAD_MODULE | CIFXTKIT_DOWNLOAD_EXECUTED; /* we have a module loaded */ + } + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Successfully downloaded the firmware to device '%s'!", + pszFullFileName); + } + } + } + } + break; + + /*------------------------------*/ + /* This is a FLASH based device */ + /*------------------------------*/ + /* - FLASH based devices are not reseted on the beginning */ + /* - Files are checked if they are already existing to prevent a download into FLASH */ + /* - If a new firmware files (NXF) is loaded, all other files (NXD/NXO etc) are deleted in all "PORTs" */ + /* - Firmware files are only allowed for PORT0 */ + /* - If an NXO is downloaded, all files (NXO/NXD) are deleted first. An existing NXF must be protected, because it is the base module! */ + case eCIFX_DEVICE_FLASH_BASED: + { + /* We have not to delete files but we have to change the "transfer type" of the file */ + uint32_t ulTransfertype = HIL_FILE_XFER_FILE; + int fDownload = 0; + + /* Does the file exist on the hardware, if so, skip the download */ + if ( CIFX_NO_ERROR != (lRet = DEV_CheckForDownload( ptSysDevice, + ulChannel, + &fDownload, + pszFileName, + pbBuffer, + ulFileLength, + pfnTransferPacket, + NULL, + NULL))) + { + /* Display an error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error checking for download '%s'!", + pszFullFileName); + } + + /* Check if we have to download the file */ + } else if(!fDownload) + { + /*-----------------------------------*/ + /* Download not necessary */ + /*-----------------------------------*/ + /* Store NXO Information for startup */ + if(DEV_IsNXOFile(pszFileName)) + { + if( !ptDevInstance->fModuleLoad) + { + /* Downloading an NXO without a running Base OS is not allowed */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error NXO files are not allowed without a Base OS firmware"); + } + + lRet = CIFX_FILE_TYPE_INVALID; + + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Skipping download for file '%s'" \ + "[checksum identical]!", + pszFullFileName); + } + + *pbLoadState = CIFXTKIT_DOWNLOAD_MODULE; + } + } else if(DEV_IsNXFFile(pszFileName)) + { + *pbLoadState = CIFXTKIT_DOWNLOAD_FIRMWARE; + } else + { + lRet = CIFX_FILE_TYPE_INVALID; + } + } else + { + + /*-----------------------------------*/ + /* Download is necessary */ + /*-----------------------------------*/ + /* Check if we have a NXF*/ + if( DEV_IsNXFFile(pszFileName)) + { + if (0 != ulChannel) + { + /* Downloading an NXF to a channel other than 0 is not supported */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error channel number %u for a firmware is not supported", + ulChannel); + } + lRet = CIFX_INVALID_PARAMETER; + fDownload = 0; + + } else + { + /* ATTENTION: If we are downloading an "NXF" file, we have a complete firmware. */ + /* In this case all other files should be deleted! */ + /* NXF are stored under channel 0 */ + + /* Files for a flash based device are always transfered into the FLASH file system */ + /* We have to delete existing files, depending of a NXF/NXO */ + uint32_t ulChNum = 0; + + /* Remove ALL files */ + for ( ulChNum = 0; ulChNum < CIFX_MAX_NUMBER_OF_CHANNELS; ulChNum++) + { + (void)DEV_RemoveChannelFiles(ptSysDevice, ulChNum, pfnTransferPacket, NULL, NULL, NULL); + } + + /* We have loaded a new firmware file */ + *pbLoadState = CIFXTKIT_DOWNLOAD_FIRMWARE; + } + + /* Check if we have an NXO file */ + } else if( DEV_IsNXOFile(pszFileName)) + { + if( !ptDevInstance->fModuleLoad) + { + /* Downloading an NXO without a running Base OS is not allowed */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error NXO files are not allowed without a Base OS firmware"); + } + + lRet = CIFX_FILE_TYPE_INVALID; + fDownload = 0; + + } else + { + /* ATTENTION: If the file is an "NXO", we have to delete all files EXCEPT the "NXF" */ + /* because this is our BASE OS file! */ + /* NXF are stored under channel 0, NXOs are storeable in each channel */ + + /* Files for a flash based device are always transfered into the FLASH file system */ + /* We have to delete existing files, depending of a NXF/NXO */ + /* Leave NXF file */ + (void)DEV_RemoveChannelFiles( ptSysDevice, ulChannel, pfnTransferPacket, NULL, NULL, HIL_FILE_EXTENSION_FIRMWARE); + + /* We have loaded a new module */ + *pbLoadState = CIFXTKIT_DOWNLOAD_MODULE; + } + } else + { + /* TODO: Unsupported file , do we need to check this???*/ + fDownload = 0; + } + + if(fDownload) + { + /* Download the file stored in the buffer */ + lRet = DEV_DownloadFile(ptSysDevice, + ulChannel, + ptDevInstance->tSystemDevice.tSendMbx.ulSendMailboxLength, + ulTransfertype, + pszFileName, + ulFileLength, + pbBuffer, + pfnTransferPacket, + NULL, + NULL, + NULL); + + if(CIFX_NO_ERROR != lRet) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error downloading firmware to device '%s'"\ + " - (lRet=0x%08X)!", + pszFullFileName, + lRet); + } + + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Successfully downloaded the firmware to device '%s'!", + pszFullFileName); + } + + *pbLoadState |= CIFXTKIT_DOWNLOAD_EXECUTED; + } + } + } + } + break; + + default: + /* Unknown device type */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error unsupported device type %u found for download handling!", + ptDevInstance->eDeviceType); + } + break; + + } /* end switch */ + + return lRet; +} /*lint !e429 : pbBuffer not freed or returned */ + +/*****************************************************************************/ +/*! Download a file to the hardware +* \param pvChannel Channel instance the download is performed on +* \param ulChannel Channel number the download is for +* \param ulMailboxSize Size of the mailbox +* \param ulTransferType Type of transfer (see HIL_FILE_XFER_XXX defines) +* \param szFileName Short file name (needed by firmware to create the file by name) +* \param ulFileLength Length of the file to download +* \param pvData File data being downloaded +* \param pfnTransferPacket Function used for transferring packets +* \param pfnCallback User callback for download progress indications +* \param pfnRecvPktCallback User callback for unsolicited receive packets +* \param pvUser User parameter passed on callback +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DownloadFile(void* pvChannel, + uint32_t ulChannel, + uint32_t ulMailboxSize, + uint32_t ulTransferType, + char* szFileName, + uint32_t ulFileLength, + void* pvData, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, + void* pvUser) +{ + union + { + CIFX_PACKET tPacket; + HIL_FILE_DOWNLOAD_REQ_T tDownloadReq; + HIL_FILE_DOWNLOAD_DATA_REQ_T tDownloadDataReq; + HIL_FILE_DOWNLOAD_ABORT_REQ_T tAbortReq; + } uSendPkt; + union + { + CIFX_PACKET tPacket; + HIL_FILE_DOWNLOAD_CNF_T tDownloadCnf; + HIL_FILE_DOWNLOAD_DATA_CNF_T tDownloadDataCnf; + HIL_FILE_DOWNLOAD_ABORT_CNF_T tAbortCnf; + } uRecvPkt; + + /* Set download state informations */ + uint32_t ulMaxDataLength = ulMailboxSize - /* Maximum possible user data length */ + (uint32_t)sizeof(HIL_FILE_DOWNLOAD_DATA_REQ_T); + + char* pbCopyPtr = NULL; + uint32_t ulCopySize = 0; + uint32_t ulSendLen = 0; + uint32_t ulTransferedLength = 0; + uint8_t* pabActData = NULL; + uint32_t ulCRC = 0; + uint32_t ulBlockNumber = 0; + uint32_t ulState = HIL_FILE_DOWNLOAD_REQ; + uint32_t ulCmdDataState = HIL_PACKET_SEQ_NONE; + int fStopDownload = 0; + int32_t lRetAbort = CIFX_NO_ERROR; + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulCurrentId = 0; + uint32_t ulSrc = OS_GetMilliSecCounter(); /* Early versions used pvChannel as ulSrc, + but this won't work on 64 Bit machines. + As we need something unique we use the current system time */ + uint32_t ulTransferTimeout = CIFX_TO_SEND_PACKET; + + OS_Memset(&uSendPkt, 0, sizeof(uSendPkt)); + OS_Memset(&uRecvPkt, 0, sizeof(uRecvPkt)); + + /* Check parameters */ + if( NULL == pvData) + return CIFX_INVALID_POINTER; + + if( 0 == ulFileLength) + return CIFX_INVALID_PARAMETER; + + pabActData = (uint8_t*)pvData; + + /* Performce download */ + do + { + switch (ulState) + { + /* Send download request */ + case HIL_FILE_DOWNLOAD_REQ: + { + /* Validate filename length to fit mailbox/packet */ + uint32_t ulFileNameLength = min( ((uint32_t)OS_Strlen(szFileName) + 1), + (ulMailboxSize - (uint32_t)sizeof(HIL_FILE_DOWNLOAD_REQ_T))); /*lint !e666 : function call OS_Strlen() */ + + /* Insert packet data */ + ++ulCurrentId; + uSendPkt.tDownloadReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tDownloadReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tDownloadReq.tHead.ulDestId = HOST_TO_LE32(0); + uSendPkt.tDownloadReq.tHead.ulSrcId = HOST_TO_LE32(0); + uSendPkt.tDownloadReq.tHead.ulLen = HOST_TO_LE32((uint32_t)(sizeof(HIL_FILE_DOWNLOAD_REQ_DATA_T) + + ulFileNameLength)); + uSendPkt.tDownloadReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tDownloadReq.tHead.ulSta = HOST_TO_LE32(0); + uSendPkt.tDownloadReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_DOWNLOAD_REQ); + uSendPkt.tDownloadReq.tHead.ulExt = HOST_TO_LE32(ulCmdDataState); + uSendPkt.tDownloadReq.tHead.ulRout = HOST_TO_LE32(0); + + /* Insert command data (extended data) */ + uSendPkt.tDownloadReq.tData.ulFileLength = HOST_TO_LE32(ulFileLength); + uSendPkt.tDownloadReq.tData.ulMaxBlockSize = HOST_TO_LE32(ulMaxDataLength); + uSendPkt.tDownloadReq.tData.ulXferType = HOST_TO_LE32(ulTransferType); + uSendPkt.tDownloadReq.tData.ulChannelNo = HOST_TO_LE32(ulChannel); + uSendPkt.tDownloadReq.tData.usFileNameLength = HOST_TO_LE16((uint16_t)ulFileNameLength); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPkt.tPacket.abData[0])) + sizeof(uSendPkt.tDownloadReq.tData); + ulCopySize = min( (sizeof(uSendPkt.tPacket.abData) - sizeof(uSendPkt.tDownloadReq.tData)), uSendPkt.tDownloadReq.tData.usFileNameLength); + + /* Insert file name */ + (void)OS_Strncpy( pbCopyPtr, szFileName, ulCopySize); + + /* Transfer packet */ + lRet = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + ulTransferTimeout, + pfnRecvPktCallback, + pvUser); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST((int32_t)uRecvPkt.tDownloadCnf.tHead.ulSta))) ) + { + /* Error during first packet, end download */ + /* Send progress notification */ + if(pfnCallback) + pfnCallback(ulTransferedLength, ulFileLength, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + /* Send abort request on unusable data */ + ulState = HIL_FILE_DOWNLOAD_ABORT_REQ; + } else if( LE32_TO_HOST(uRecvPkt.tDownloadCnf.tData.ulMaxBlockSize) == 0) + { + /* Error in device information, stop download (Device returned illegal block size */ + lRet = CIFX_INVALID_ACCESS_SIZE; + + /* Send progress notification */ + if(pfnCallback) + pfnCallback(ulTransferedLength, ulFileLength, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + /* Send abort request on unusable data */ + ulState = HIL_FILE_DOWNLOAD_ABORT_REQ; + } else + { + /* Everything went ok, so start transmitting file data now */ + /* Get download packet size from the device confirmation. + If the devices packet size is smaller than our size, use the length from the device. + Otherwise use our length. */ + if( ulMaxDataLength > LE32_TO_HOST(uRecvPkt.tDownloadCnf.tData.ulMaxBlockSize)) + ulMaxDataLength = LE32_TO_HOST(uRecvPkt.tDownloadCnf.tData.ulMaxBlockSize); + + /* Check if the file fits into one packet or if we have to send multiple packets */ + ulSendLen = ulMaxDataLength; + if(ulFileLength <= ulSendLen) + { + /* We have only one packet to send */ + ulSendLen = ulFileLength; + ulCmdDataState = HIL_PACKET_SEQ_NONE; + } else + { + /* We have to send multiple packets */ + ulCmdDataState = HIL_PACKET_SEQ_FIRST; + } + + /* Goto next state */ + ulState = HIL_FILE_DOWNLOAD_DATA_REQ; + } + } + break; + + /* Data download packets */ + case HIL_FILE_DOWNLOAD_DATA_REQ: + { + ++ulCurrentId; + uSendPkt.tDownloadDataReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tDownloadDataReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tDownloadDataReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_DOWNLOAD_DATA_REQ); + uSendPkt.tDownloadDataReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tDownloadDataReq.tHead.ulExt = HOST_TO_LE32(ulCmdDataState); + + /* Copy file data to packet */ + OS_Memcpy( &uSendPkt.tDownloadDataReq.tData + 1, pabActData, ulSendLen); + + /* Adjust packet length */ + uSendPkt.tDownloadDataReq.tHead.ulLen = HOST_TO_LE32((uint32_t)(sizeof(HIL_FILE_DOWNLOAD_DATA_REQ_DATA_T) + + ulSendLen)); + + /* Create continued CRC */ + ulCRC = CreateCRC32( ulCRC, pabActData, ulSendLen); + uSendPkt.tDownloadDataReq.tData.ulChksum = HOST_TO_LE32(ulCRC); + uSendPkt.tDownloadDataReq.tData.ulBlockNo = HOST_TO_LE32(ulBlockNumber); + ++ulBlockNumber; + + /* Transfer packet */ + lRet = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + ulTransferTimeout, + pfnRecvPktCallback, + pvUser); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST((int32_t)(uRecvPkt.tDownloadDataCnf.tHead.ulSta)))) ) + { + /* Driver error during transfer packet, end download */ + /* Always try to send an abort request */ + if(pfnCallback) + pfnCallback(ulTransferedLength, ulFileLength, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + ulState = HIL_FILE_DOWNLOAD_ABORT_REQ; + } else + { + /* Add send size to transferred size */ + ulTransferedLength += ulSendLen; + + /* Indicate progress, if user wants a notification */ + if(pfnCallback) + pfnCallback(ulTransferedLength, ulFileLength, pvUser, + (ulTransferedLength == ulFileLength) ? CIFX_CALLBACK_FINISHED : CIFX_CALLBACK_ACTIVE, + lRet); + + /* Check if we are done with the download */ + if( (HIL_PACKET_SEQ_LAST == ulCmdDataState) || + (HIL_PACKET_SEQ_NONE == ulCmdDataState) ) + { + /* No more packets to send, end download */ + fStopDownload = 1; + } else + { + /* Move data pointer to next data */ + pabActData += ulSendLen; + + /* Calculate next message length */ + if ( ulFileLength <= (ulSendLen + ulTransferedLength)) + { + /* Set the send length to rest of data, + This will be the last packet */ + ulSendLen = ulFileLength - ulTransferedLength; + ulCmdDataState = HIL_PACKET_SEQ_LAST; + + /* ATTENTION: Check the transfer type */ + if ( HIL_FILE_XFER_MODULE == ulTransferType) + { + /* Module loading will relocate the module with the last packet. + So the confirmation packet takes longer, depending on the + file size (and contained firmware). + Measurements showed that for every 100kB the module needs + one additional second for relocation */ + ulTransferTimeout += (ulFileLength / (100 * 1024)) * 1000; + } + } else + { + ulCmdDataState = HIL_PACKET_SEQ_MIDDLE; + } + + /* Goto next state */ + ulState = HIL_FILE_DOWNLOAD_DATA_REQ; + } + } + } + break; + + /* Abort active download */ + case HIL_FILE_DOWNLOAD_ABORT_REQ: + { + ++ulCurrentId; + uSendPkt.tAbortReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tAbortReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tAbortReq.tHead.ulDestId = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulSrcId = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulLen = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tAbortReq.tHead.ulSta = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_DOWNLOAD_ABORT_REQ); + uSendPkt.tAbortReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tAbortReq.tHead.ulRout = HOST_TO_LE32(0); + + /* Transfer packet */ + lRetAbort = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + ulTransferTimeout, + pfnRecvPktCallback, + pvUser); + + if( lRetAbort == CIFX_NO_ERROR) + { + /* Return packet state if function succeeded */ + lRetAbort = LE32_TO_HOST((int32_t)uRecvPkt.tAbortCnf.tHead.ulSta); + } + + /* End download */ + fStopDownload = 1; + } + break; + + default: + /* unknown, leave command */ + lRet = CIFX_FUNCTION_FAILED; + + /* End download */ + fStopDownload = 1; + break; + } + + } while(!fStopDownload); + + /* Always return lRet first, then abort error */ + if( CIFX_NO_ERROR != lRet) + return lRet; + else if( CIFX_NO_ERROR != lRetAbort) + return lRetAbort; + else + return CIFX_NO_ERROR; +} /*lint !e429 : pvData not freed or returned */ + +/*****************************************************************************/ +/*! Uploads a file from the hardware. It is required to list the files +* on the hardware, to know the file length for creating the buffer. +* \param pvChannel Channel instance the upload is performed on +* \param ulChannel Channel number the upload made is for +* \param ulMailboxSize Size of the mailbox +* \param ulTransferType Type of transfer (see HIL_FILE_XFER_XXX defines) +* \param szFileName Short file name +* \param pulDataBufferLen Length of the provided buffer, returned length of data +* \param pvData Buffer for storing upload. This buffer must be allocated by the caller. +* \param pfnTransferPacket Function used for transferring packets +* \param pfnCallback User callback for upload progress indications +* \param pfnRecvPktCallback User callback for unsolicited receive packets +* \param pvUser User parameter passed on callback +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_UploadFile(void* pvChannel, + uint32_t ulChannel, + uint32_t ulMailboxSize, + uint32_t ulTransferType, + char* szFileName, + uint32_t* pulDataBufferLen, + void* pvData, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, + void* pvUser) +{ + /* Usually one brace should be enough, but GNU wants to have a second brace + to initialize the structure. On GCC 4.0.3 the whole structure is initialized + as described in ISOC90 */ + union + { + CIFX_PACKET tPacket; + HIL_FILE_UPLOAD_REQ_T tUploadReq; + HIL_FILE_UPLOAD_DATA_REQ_T tUploadDataReq; + HIL_FILE_DOWNLOAD_ABORT_REQ_T tAbortReq; + } uSendPkt; + + union + { + CIFX_PACKET tPacket; + HIL_FILE_UPLOAD_CNF_T tUploadCnf; + HIL_FILE_UPLOAD_DATA_CNF_T tUploadDataCnf; + } uRecvPkt; + + char* pbCopyPtr = NULL; + uint32_t ulCopySize = 0; + uint32_t ulFileLength = 0; + uint16_t usFilenameLen = (uint16_t)(OS_Strlen(szFileName) + 1); /*Firmware expects length including terminating NULL */ + uint32_t ulBlockSize = ulMailboxSize - + (uint32_t)sizeof(uRecvPkt.tUploadDataCnf); /* maximum size of each file block */ + int fSendAbort = 0; + int32_t lRetAbort = CIFX_NO_ERROR; + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulCurrentId = 0; + uint32_t ulSrc = OS_GetMilliSecCounter(); /* Early versions used pvChannel as ulSrc, + but this won't work on 64 Bit machines. + As we need something unique we use the current system time */ + + OS_Memset(&uSendPkt, 0, sizeof(uSendPkt)); + OS_Memset(&uRecvPkt, 0, sizeof(uRecvPkt)); + + /* Check parameters */ + if( (NULL == pvData) || (NULL == pulDataBufferLen) ) + return CIFX_INVALID_POINTER; + + if( ulMailboxSize < HIL_DPM_SYSTEM_MAILBOX_MIN_SIZE) + return CIFX_DEV_MAILBOX_TOO_SHORT; + + ++ulCurrentId; + uSendPkt.tUploadReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tUploadReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tUploadReq.tHead.ulDestId = HOST_TO_LE32(0); + uSendPkt.tUploadReq.tHead.ulSrcId = HOST_TO_LE32(0); + uSendPkt.tUploadReq.tHead.ulLen = HOST_TO_LE32((uint32_t)(sizeof(uSendPkt.tUploadReq.tData) + usFilenameLen)); + uSendPkt.tUploadReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tUploadReq.tHead.ulSta = HOST_TO_LE32(0); + uSendPkt.tUploadReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_UPLOAD_REQ); + uSendPkt.tUploadReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tUploadReq.tHead.ulRout = HOST_TO_LE32(0); + + uSendPkt.tUploadReq.tData.usFileNameLength = HOST_TO_LE16(usFilenameLen); + uSendPkt.tUploadReq.tData.ulXferType = HOST_TO_LE32(ulTransferType); + uSendPkt.tUploadReq.tData.ulMaxBlockSize = HOST_TO_LE32(ulBlockSize); + uSendPkt.tUploadReq.tData.ulChannelNo = HOST_TO_LE32(ulChannel); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPkt.tPacket.abData[0])) + sizeof(uSendPkt.tUploadReq.tData); + ulCopySize = min( (sizeof(uSendPkt.tPacket.abData) - sizeof(uSendPkt.tUploadReq.tData)), uSendPkt.tUploadReq.tData.usFileNameLength); + + (void)OS_Strncpy( pbCopyPtr, szFileName, ulCopySize); + + lRet = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + /* Read file length */ + ulFileLength = LE32_TO_HOST(uRecvPkt.tUploadCnf.tData.ulFileLength); + + /* ATTENTION: We have to send an "Abort" to the system if: */ + /* 1. Command or File Error occured */ + /* 2. If the file exists but the length is 0 */ + /* In both cases, it is possible the system has activated a data transfer and waits */ + /* on data requests commands. */ + /* It is necessary to send a "Abort" command, otherwise the next file access will fail */ + /* with an error "COMMAND_ACTIVE". */ + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(uRecvPkt.tPacket.tHeader.ulState))) || + (0 == ulFileLength) ) + { + /* Set return of read file length to 0 */ + *pulDataBufferLen = 0; + + /* Send progress notification */ + if(pfnCallback) + pfnCallback( 0, 0, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + /* Execute an abort command */ + fSendAbort = 1; + } else + { + /* Check file length against user buffer length */ + if(ulFileLength > *pulDataBufferLen) + { + fSendAbort = 1; + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + uint32_t ulCRC = 0; + uint8_t* pbData = (uint8_t*)pvData; /* pointer to return buffer */ + uint32_t ulTransferredBytes = 0; + uint32_t ulTotalBytes = ulFileLength; + + /* Set return of read file length to 0 */ + *pulDataBufferLen = 0; + + /* Create upload data packet */ + ++ulCurrentId; + OS_Memset( &uSendPkt.tUploadDataReq, 0, sizeof(uSendPkt.tUploadDataReq)); + uSendPkt.tUploadDataReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tUploadDataReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tUploadDataReq.tHead.ulDestId = HOST_TO_LE32(0); + uSendPkt.tUploadDataReq.tHead.ulSrcId = HOST_TO_LE32(0); + uSendPkt.tUploadDataReq.tHead.ulLen = HOST_TO_LE32(0); + uSendPkt.tUploadDataReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tUploadDataReq.tHead.ulSta = HOST_TO_LE32(0); + uSendPkt.tUploadDataReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_UPLOAD_DATA_REQ); + uSendPkt.tUploadDataReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tUploadDataReq.tHead.ulRout = HOST_TO_LE32(0); + + /* Adjust block size to the size of the system */ + if( LE32_TO_HOST(uRecvPkt.tUploadCnf.tData.ulMaxBlockSize) < ulBlockSize) + ulBlockSize = LE32_TO_HOST(uRecvPkt.tUploadCnf.tData.ulMaxBlockSize); + + /* Check size we have to send */ + /* If this is only one packet, set extension to NONE */ + uSendPkt.tUploadDataReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_FIRST); + if( ulTotalBytes <= ulBlockSize) + uSendPkt.tUploadDataReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); /* We can send all in one packet */ + + /* Perform upload */ + while( (ulFileLength > 0) && (CIFX_NO_ERROR == lRet) ) + { + /* Send and receive data */ + lRet = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + /* Check for errors */ + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(uRecvPkt.tPacket.tHeader.ulState))) ) + { + /* This is a packet error from the hardware */ + /* - Inform application */ + /* - Leave upload and send abort */ + if(pfnCallback) + pfnCallback(ulTransferredBytes, ulTotalBytes, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + fSendAbort = 1; + break; + } else + { + uint32_t ulCurrentDataLen = LE32_TO_HOST(uRecvPkt.tUploadDataCnf.tHead.ulLen) - + (uint32_t)sizeof(uRecvPkt.tUploadDataCnf.tData); + uint8_t* pbRecvData = (uint8_t*)(&uRecvPkt.tUploadDataCnf.tData + 1); + uint32_t ulPacketCrc = LE32_TO_HOST(uRecvPkt.tUploadDataCnf.tData.ulChksum); + + /* Create own checksum and compare with it */ + ulCRC = CreateCRC32( ulCRC, pbRecvData, ulCurrentDataLen); + + if(ulCRC != ulPacketCrc) + { + /* Abort, as a CRC32 error occurred */ + lRet = CIFX_FILE_CHECKSUM_ERROR; + + /* Send progress notification */ + if(pfnCallback) + pfnCallback(ulTransferredBytes, ulTotalBytes, pvUser, CIFX_CALLBACK_FINISHED, lRet); + + fSendAbort = 1; + break; + } else + { + /* Next packet */ + ++ulCurrentId; + uSendPkt.tUploadDataReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + + /* Calculate outstanding size */ + ulFileLength -= ulCurrentDataLen; + OS_Memcpy(pbData, pbRecvData, ulCurrentDataLen); + pbData += ulCurrentDataLen; + ulTransferredBytes += ulCurrentDataLen; + *pulDataBufferLen = ulTransferredBytes; + + /* Send progress notification */ + if(pfnCallback) + pfnCallback(ulTransferredBytes, ulTotalBytes, pvUser, + (ulTransferredBytes == ulTotalBytes)? CIFX_CALLBACK_FINISHED : CIFX_CALLBACK_ACTIVE, + lRet); + + /* Calculate next packet length and packet extension */ + if(ulFileLength != 0) + { + if(ulFileLength <= ulBlockSize) + uSendPkt.tUploadDataReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_LAST); + else + uSendPkt.tUploadDataReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_MIDDLE); + } + } + } + } + } + } + + /* If anything failed during upload, send an abort request */ + if( fSendAbort) + { + ++ulCurrentId; + uSendPkt.tAbortReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPkt.tAbortReq.tHead.ulSrc = HOST_TO_LE32(ulSrc); + uSendPkt.tAbortReq.tHead.ulDestId = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulSrcId = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulLen = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulId = HOST_TO_LE32(ulCurrentId); + uSendPkt.tAbortReq.tHead.ulSta = HOST_TO_LE32(0); + uSendPkt.tAbortReq.tHead.ulCmd = HOST_TO_LE32(HIL_FILE_UPLOAD_ABORT_REQ); + uSendPkt.tAbortReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_NONE); + uSendPkt.tAbortReq.tHead.ulRout = HOST_TO_LE32(0); + + /* Transfer packet */ + lRetAbort = pfnTransferPacket(pvChannel, + &uSendPkt.tPacket, + &uRecvPkt.tPacket, + (uint32_t)sizeof(uRecvPkt.tPacket), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + if( lRetAbort == CIFX_NO_ERROR) + { + /* Return packet state if function succeeded */ + lRetAbort = LE32_TO_HOST((int32_t)uRecvPkt.tPacket.tHeader.ulState); + } + } + + /* Always return lRet first, then abort error */ + if( CIFX_NO_ERROR != lRet) + return lRet; + else if( CIFX_NO_ERROR != lRetAbort) + return lRetAbort; + else + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/Source/cifXEndianess.c b/libcifx/Toolkit/Source/cifXEndianess.c new file mode 100644 index 0000000..f507931 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXEndianess.c @@ -0,0 +1,126 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXEndianess.c 13253 2019-10-11 10:57:04Z LuisContreras $: + + Description: + Little/Big Endian conversion + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-10-11 Change prototype of endianess conversion function + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file cifXEndianess.c +* Little/Big Endian conversion */ +/*****************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +/*****************************************************************************/ +/*! Convert a buffer from / to host endianess +* this structure is used for automatically transforming a structure (which +* is described by this structure) from/to host endianess */ +/*****************************************************************************/ +int32_t cifXConvertEndianess(unsigned int uiOffset, void* pvBuffer, int iBufferLen, + const CIFX_ENDIANESS_ENTRY_T* atConv, int iConvLen) +{ +/* Conversion needs only be done, it host and dpm endianess differ */ +#ifdef CIFX_TOOLKIT_BIGENDIAN + /* We need to make sure, that we can handle odd offsets, so we are using + a byte pointer here and build the appropriate data type byte by byte. + Compilers provide packing/unaligned access in different ways, and we + are not able to generalize it */ + uint8_t* pbBuffer = (uint8_t*)pvBuffer; + int iActConvEntry; + int iActElement; + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK + if((NULL == pvBuffer) || (NULL == atConv)) + return CIFX_INVALID_POINTER; +#endif /* CIFX_TOOLKIT_PARAMETER_CHECK */ + + /* On Big-endian targets, the given block shall only be read from start */ + if(0 != uiOffset) + return CIFX_INVALID_PARAMETER; + + /* Iterate over complete user table */ + for(iActConvEntry = 0; iActConvEntry < iConvLen; ++iActConvEntry) + { + /* Iterate over all elements given from this entry. (From iOffset to iOffset + iElementCnt * size) */ + for(iActElement = 0; iActElement < atConv[iActConvEntry].iElementCnt; ++iActElement) + { + switch(atConv[iActConvEntry].eWidth) + { + case eCIFX_ENDIANESS_WIDTH_8BIT: + /* nothing to do for 8 bit */ + break; + + case eCIFX_ENDIANESS_WIDTH_16BIT: + { + uint16_t usValue; + int iOffset = atConv[iActConvEntry].iOffset + iActElement * 2; + + if( (iOffset + 2) < iBufferLen) + { + OS_Memcpy(&usValue, pbBuffer + iOffset, 2); + usValue = LE16_TO_HOST(usValue); + OS_Memcpy(pbBuffer + iOffset, &usValue, 2); + } + } + break; + + case eCIFX_ENDIANESS_WIDTH_32BIT: + { + uint32_t ulValue; + int iOffset = atConv[iActConvEntry].iOffset + iActElement * 4; + + if( (iOffset + 4) < iBufferLen) + { + OS_Memcpy(&ulValue, pbBuffer + iOffset, 4); + ulValue = LE32_TO_HOST(ulValue); + OS_Memcpy(pbBuffer + iOffset, &ulValue, 4); + } + } + break; + + case eCIFX_ENDIANESS_WIDTH_64BIT: + { + uint64_t ullValue; + int iOffset = atConv[iActConvEntry].iOffset + iActElement * 8; + + if( (iOffset + 8) < iBufferLen) + { + OS_Memcpy(&ullValue, pbBuffer + iOffset, 8); + ullValue = LE64_TO_HOST(ullValue); + OS_Memcpy(pbBuffer + iOffset, &ullValue, 8); + } + } + break; + + default: + /* This should never happen */ + break; + } + } + } + return CIFX_NO_ERROR; +#else + UNREFERENCED_PARAMETER(uiOffset); + UNREFERENCED_PARAMETER(pvBuffer); + UNREFERENCED_PARAMETER(iBufferLen); + UNREFERENCED_PARAMETER(atConv); + UNREFERENCED_PARAMETER(iConvLen); + return CIFX_NO_ERROR; /*lint !e438 : unused variables */ +#endif /* CIFX_TOOLKIT_BIGENDIAN */ +} diff --git a/libcifx/Toolkit/Source/cifXEndianess.h b/libcifx/Toolkit/Source/cifXEndianess.h new file mode 100644 index 0000000..069df6b --- /dev/null +++ b/libcifx/Toolkit/Source/cifXEndianess.h @@ -0,0 +1,92 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXEndianess.h 13253 2019-10-11 10:57:04Z LuisContreras $: + + Description: + Little/Big Endian conversion + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2019-10-11 Change prototype of endianess conversion function + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file cifXEndianess.h +* Little/Big Endian conversion */ +/*****************************************************************************/ + +#ifndef __CIFX_ENDIANESS__H +#define __CIFX_ENDIANESS__H + +/* Give the user the possibility to use own macros for + endianess conversion */ +#ifndef BIGENDIAN_MACROS_PROVIDED + #ifndef CIFX_TOOLKIT_BIGENDIAN + /* Little endian, so we don't need a conversion */ + #define LE16_TO_HOST(a) (a) + #define LE32_TO_HOST(a) (a) + #define LE64_TO_HOST(a) (a) + #define HOST_TO_LE16(a) (a) + #define HOST_TO_LE32(a) (a) + #define HOST_TO_LE64(a) (a) + #else + /* BIG endian, so we DO need a conversion */ + /*lint -emacro(572, LE??_TO_HOST) : Excessive shift value */ + /*lint -esym(666, LE??_TO_HOST) : Expression with side effects passed to repeated parameter 1 */ + #define LE16_TO_HOST(a) ( (((a) & 0x00FF) << 8) | \ + (((a) & 0xFF00) >> 8) ) + + #define LE32_TO_HOST(a) ( (((a) & 0x000000FFUL) << 24) | \ + (((a) & 0x0000FF00UL) << 8) | \ + (((a) & 0x00FF0000UL) >> 8) | \ + (((a) & 0xFF000000UL) >> 24) ) + + #define LE64_TO_HOST(a) ( (((a) & 0x00000000000000FFULL) << 56) | \ + (((a) & 0x000000000000FF00ULL) << 40) | \ + (((a) & 0x0000000000FF0000ULL) << 24) | \ + (((a) & 0x00000000FF000000ULL) << 8) | \ + (((a) & 0x000000FF00000000ULL) >> 8) | \ + (((a) & 0x0000FF0000000000ULL) >> 24) | \ + (((a) & 0x00FF000000000000ULL) >> 40) | \ + (((a) & 0xFF00000000000000ULL) >> 56) ) + + #define HOST_TO_LE16(a) LE16_TO_HOST(a) + #define HOST_TO_LE32(a) LE32_TO_HOST(a) + #define HOST_TO_LE64(a) LE64_TO_HOST(a) + #endif +#endif + +typedef enum +{ + eCIFX_ENDIANESS_WIDTH_8BIT, + eCIFX_ENDIANESS_WIDTH_16BIT, + eCIFX_ENDIANESS_WIDTH_32BIT, + eCIFX_ENDIANESS_WIDTH_64BIT + +} CIFX_ENDIANESS_WIDTH; + +/*****************************************************************************/ +/*! Structure definition for endianess conversion function. An array of this +* this structure is used for automatically transforming a structure (which +* is described by this structure) from/to host endianess */ +/*****************************************************************************/ +typedef struct CIFX_ENDIANESS_ENTRY_Ttag +{ + int iOffset; /*!< Offset inside the buffer */ + CIFX_ENDIANESS_WIDTH eWidth; /*!< Data width of structure */ + int iElementCnt; /*!< Number of elements to convert */ + +} CIFX_ENDIANESS_ENTRY_T, *PCIFX_ENDIANESS_ENTRY_T; + +int32_t cifXConvertEndianess(unsigned int uiOffset, void* pvBuffer, int iBufferLen, + const CIFX_ENDIANESS_ENTRY_T* atConv, int iConvLen); + +#endif /* __CIFX_ENDIANESS__H */ diff --git a/libcifx/Toolkit/Source/cifXFunctions.c b/libcifx/Toolkit/Source/cifXFunctions.c new file mode 100644 index 0000000..a0e52d1 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXFunctions.c @@ -0,0 +1,3713 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXFunctions.c 14699 2023-04-27 07:51:13Z RMayer $: + + Description: + cifX API function implementation + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-26 - Added new compiler option CIFX_TOOLKIT_USE_CUSTOM_DRV_FUNCS + - Moved check parameter macros to cifXtoolkit.h + 2022-06-14 - Added option and handling for cached PLC memory pointers + - Reorganized xChannelPLCMemoryPtr() to handle caching option for IO area 0 + 2022-01-18 Fixed xSysdeviceResetEx() to allow additional flags passing to underlying functions + 2021-09-13 Propagate changes of cifXErrors.h (spelling of name + CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED) + 2020-02-06 xDriverEnumBoards() should return CIFX_NO_MORE_ENTRIES + if ulBoard exceeds actual board count, instead of invalid board + 2019-10-11 Use internal buffer for endian conversion in xChannelControlBlock() + Propagate prototype changes of endian conversion function + 2018-11-06 Added new function xSysdeviceResetEx() + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file cifXFunctions.c +* cifX API function implementation */ +/*****************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +#include "Hil_Results.h" +#include "Hil_Packet.h" +#include "Hil_SystemCmd.h" + +/* Commonly used function from cifXInit.c, not exposed to the user interface */ +int32_t cifXStartModule ( PDEVICEINSTANCE ptDevInstance, uint32_t ulChannelNumber, char* pszModuleName, + uint32_t ulFileSize, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); +int32_t cifXReadFirmwareIdent( PDEVICEINSTANCE ptDevInstance, uint32_t ulChannel, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser); + +#ifdef CIFX_TOOLKIT_TIME +void cifXInitTime ( PDEVICEINSTANCE ptDevInstance); +#endif + +/*****************************************************************************/ +/*! \addtogroup CIFX_DRIVER_API cifX Driver API implementation +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Errorcode to Errordescription lookup table (english only) */ +/*****************************************************************************/ +static struct CIFX_ERROR_TO_DESCRtag +{ + int32_t lError; + char* szErrorDescr; + +} s_atErrorToDescrTable[] = +{ +#ifndef CIFX_TOOLKIT_NO_ERRORLOOKUP + /******************************************************************************* + * cifX Device Driver Errors (Global) + *******************************************************************************/ + {CIFX_INVALID_POINTER ,"Invalid pointer (e.g. NULL) passed to driver" }, + {CIFX_INVALID_BOARD ,"No board with the given name / index available"}, + {CIFX_INVALID_CHANNEL ,"No channel with the given index available" }, + {CIFX_INVALID_HANDLE ,"Invalid handle passed to driver" }, + {CIFX_INVALID_PARAMETER ,"Invalid parameter" }, + {CIFX_INVALID_COMMAND ,"Invalid command" }, + {CIFX_INVALID_BUFFERSIZE ,"Invalid buffer size" }, + {CIFX_INVALID_ACCESS_SIZE ,"Invalid access size" }, + {CIFX_FUNCTION_FAILED ,"Function failed" }, + {CIFX_FILE_OPEN_FAILED ,"File could not be opened" }, + {CIFX_FILE_SIZE_ZERO ,"File size is zero" }, + {CIFX_FILE_LOAD_INSUFF_MEM ,"Insufficient memory to load file" }, + {CIFX_FILE_READ_ERROR ,"Error reading from file" }, + {CIFX_FILE_TYPE_INVALID ,"Invalid file type" }, + {CIFX_FILE_NAME_INVALID ,"Invalid file name" }, + {CIFX_FUNCTION_NOT_AVAILABLE ,"Driver function not available" }, + {CIFX_BUFFER_TOO_SHORT ,"Given buffer is too short" }, + {CIFX_MEMORY_MAPPING_FAILED ,"Failed to map the memory" }, + {CIFX_NO_MORE_ENTRIES ,"No more entries available" }, + {CIFX_CALLBACK_MODE_UNKNOWN ,"Unknown callback handling mode" }, + {CIFX_CALLBACK_CREATE_EVENT_FAILED ,"Failed to create callback events" }, + {CIFX_CALLBACK_CREATE_RECV_BUFFER ,"Failed to create callback receive buffer" }, + {CIFX_CALLBACK_ALREADY_USED ,"Callback already used" }, + {CIFX_CALLBACK_NOT_REGISTERED ,"Callback was not registered before" }, + {CIFX_INTERRUPT_DISABLED ,"Interrupt is disabled" }, + /******************************************************************************* + * Generic Driver Errors + *******************************************************************************/ + {CIFX_DRV_NOT_INITIALIZED ,"Driver not initialized" }, + {CIFX_DRV_INIT_STATE_ERROR ,"Driver init state error" }, + {CIFX_DRV_READ_STATE_ERROR ,"Driver read state error" }, + {CIFX_DRV_CMD_ACTIVE ,"Command is active on device" }, + {CIFX_DRV_DOWNLOAD_FAILED ,"General error during download" }, + {CIFX_DRV_WRONG_DRIVER_VERSION ,"Wrong driver version" }, + {CIFX_DRV_DRIVER_NOT_LOADED ,"CIFx driver is not running" }, + {CIFX_DRV_INIT_ERROR ,"Failed to initialize the device" }, + {CIFX_DRV_CHANNEL_NOT_INITIALIZED ,"Channel not initialized (xChannelOpen not called)"}, + {CIFX_DRV_IO_CONTROL_FAILED ,"IOControl call failed" }, + {CIFX_DRV_NOT_OPENED ,"Driver was not opened" }, + {CIFX_DRV_DOWNLOAD_STORAGE_UNKNOWN ,"Unknown download storage type (RAM/FLASH based) found"}, + {CIFX_DRV_DOWNLOAD_FW_WRONG_CHANNEL,"Channel number for a firmware download not supported" }, + {CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS,"Modules are not allowed without a Base OS firmware" }, + /******************************************************************************* + * Generic Device Errors + *******************************************************************************/ + {CIFX_DEV_DPM_ACCESS_ERROR ,"Dual port memory not accessible (board not found)"}, + {CIFX_DEV_NOT_READY ,"Device not ready (ready flag failed)" }, + {CIFX_DEV_NOT_RUNNING ,"Device not running (running flag failed)" }, + {CIFX_DEV_WATCHDOG_FAILED ,"Watchdog test failed" }, + {CIFX_DEV_SYSERR ,"Error in handshake flags" }, + {CIFX_DEV_MAILBOX_FULL ,"Send mailbox is full" }, + {CIFX_DEV_PUT_TIMEOUT ,"Send packet timeout" }, + {CIFX_DEV_GET_TIMEOUT ,"Receive packet timeout" }, + {CIFX_DEV_GET_NO_PACKET ,"No packet available" }, + {CIFX_DEV_RESET_TIMEOUT ,"Reset command timeout" }, + {CIFX_DEV_NO_COM_FLAG ,"COM-flag not set" }, + {CIFX_DEV_EXCHANGE_FAILED ,"I/O data exchange failed" }, + {CIFX_DEV_EXCHANGE_TIMEOUT ,"I/O data exchange timeout" }, + {CIFX_DEV_COM_MODE_UNKNOWN ,"Unknown I/O exchange mode " }, + {CIFX_DEV_FUNCTION_FAILED ,"Device function failed " }, + {CIFX_DEV_DPMSIZE_MISMATCH ,"DPM size differs from configuration" }, + {CIFX_DEV_STATE_MODE_UNKNOWN ,"Unknown state mode" }, + {CIFX_DEV_HW_PORT_IS_USED ,"Output port already in use" }, + {CIFX_DEV_CONFIG_LOCK_TIMEOUT ,"Configuration locking timeout" }, + {CIFX_DEV_CONFIG_UNLOCK_TIMEOUT ,"Configuration unlocking timeout" }, + {CIFX_DEV_HOST_STATE_SET_TIMEOUT ,"Set HOST state timeout" }, + {CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT ,"Clear HOST state timeout" }, + {CIFX_DEV_INITIALIZATION_TIMEOUT ,"Timeout during channel initialization" }, + {CIFX_DEV_BUS_STATE_ON_TIMEOUT ,"Set Bus ON timeout" }, + {CIFX_DEV_BUS_STATE_OFF_TIMEOUT ," Set Bus OFF timeout" }, + {CIFX_DEV_MODULE_ALREADY_RUNNING ,"Module already running" }, + {CIFX_DEV_MODULE_ALREADY_EXISTS ,"Module already exists" }, + {CIFX_DEV_DMA_INSUFF_BUFFER_COUNT ,"Number of configured DMA buffers insufficient" }, + {CIFX_DEV_DMA_BUFFER_TOO_SMALL ,"DMA buffers size too small (min size 256Byte)" }, + {CIFX_DEV_DMA_BUFFER_TOO_BIG ,"DMA buffers size too big (max size 63,75KByte)" }, + {CIFX_DEV_DMA_BUFFER_NOT_ALIGNED ,"DMA buffer alignment failed (must be 256Byte)" }, + {CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED ,"I/O data uncontrolled handshake mode not supported" }, + {CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED,"I/O area in DMA mode not supported (only area 0 possible)" }, + {CIFX_DEV_DMA_STATE_ON_TIMEOUT ,"Set DMA ON timeout" }, + {CIFX_DEV_DMA_STATE_OFF_TIMEOUT ,"Set DMA OFF timeout" }, + {CIFX_DEV_SYNC_STATE_INVALID_MODE ,"Device is in invalid mode for this operation" }, + {CIFX_DEV_SYNC_STATE_TIMEOUT ,"Waiting for synchronization event bits timed out" }, + + /*******************************************************************************/ +#else + {CIFX_NO_ERROR, ""}, +#endif +}; + +/*****************************************************************************/ +/*! Structure description of NETX_SYSTEM_CHANNEL_INFO */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atSystemChannelInfo[] = +{ + /* Offset, Width, Elements */ + { 0x04, eCIFX_ENDIANESS_WIDTH_32BIT, 1}, /* ulSizeOfChannel */ + { 0x08, eCIFX_ENDIANESS_WIDTH_16BIT, 2}, /* usSizeOfMailbox + usMailboxStartOffset */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_HANDSHAKE_CHANNEL_INFO */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atHandshakeChannelInfo[] = +{ + /* Offset, Width, Elements */ + { 0x04, eCIFX_ENDIANESS_WIDTH_32BIT, 1}, /* ulSizeOfChannel */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_COMMUNICATION_CHANNEL_INFO */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atCommChannelInfo[] = +{ + /* Offset, Width, Elements */ + { 0x04, eCIFX_ENDIANESS_WIDTH_32BIT, 1}, /* ulSizeOfChannel */ + { 0x08, eCIFX_ENDIANESS_WIDTH_16BIT, 3}, /* usCommunicationClass + usProtocolClass + usProtocolConformanceClass */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_APPLICATION_CHANNEL_INFO */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atAppChannelInfo[] = +{ + /* Offset, Width, Elements */ + { 0x04, eCIFX_ENDIANESS_WIDTH_32BIT, 1}, /* ulSizeOfChannel */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_SYSTEM_INFO_BLOCK */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atSystemInfoBlock[] = +{ + /* Offset, Width, Elements */ + { 0x04, eCIFX_ENDIANESS_WIDTH_32BIT, 3}, /* DpmTotalSize, DevNr, SerNr */ + { 0x10, eCIFX_ENDIANESS_WIDTH_16BIT, 6}, /* ausHwOptions, usMfg, usProdDat */ + { 0x1C, eCIFX_ENDIANESS_WIDTH_32BIT, 2}, /* ulLicenseFlags1/2 */ + { 0x24, eCIFX_ENDIANESS_WIDTH_16BIT, 3}, /* LicenseId/flags, DeviceClass */ + { 0x2C, eCIFX_ENDIANESS_WIDTH_16BIT, 2}, /* ausReserved */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_SYSTEM_CONTROL_BLOCK */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atSystemControlBlock[] = +{ + /* Offset, Width, Elements */ + { 0x00, eCIFX_ENDIANESS_WIDTH_32BIT, 2}, /* ulSystemCmdCOS, ulReserved */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_SYSTEM_STATUS_BLOCK */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atSystemStatusBlock[] = +{ + /* Offset, Width, Elements */ + { 0x00, eCIFX_ENDIANESS_WIDTH_32BIT, 5}, /* ulSystem-COS/Status/Error + ulReserved1 */ + { 0x14, eCIFX_ENDIANESS_WIDTH_16BIT, 1}, /* usCpuLoad */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_CONTROL_BLOCK */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atControlBlock[] = +{ + /* Offset, Width, Elements */ + { 0x00, eCIFX_ENDIANESS_WIDTH_32BIT, 2}, /* ulApplCos, ulWatchdog */ +}; + +/*****************************************************************************/ +/*! Structure description of NETX_COMMON_STATUS_BLOCK */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atCommonStatusBlock[] = +{ + /* Offset, Width, Elements */ + { 0x00, eCIFX_ENDIANESS_WIDTH_32BIT, 3}, /* ulCommCos,ulCommState, + ulCommError */ + { 0x0C, eCIFX_ENDIANESS_WIDTH_16BIT, 2}, /* usVersion,usWatchDogTime + */ + { 0x14, eCIFX_ENDIANESS_WIDTH_32BIT, 2}, /* ulHostWatchDog, ulErrorCount, + */ + { 0x22, eCIFX_ENDIANESS_WIDTH_16BIT, 3}, /* ausReserved[3] + */ + { 0x28, eCIFX_ENDIANESS_WIDTH_32BIT, 6}, /* ulSlaveState, ulSlaveErrLogInd + ulNumOfConfigSlaves,ulNumOfActiveSlaves + ulNumOfDiagSlaves, ulReserved */ +}; + +extern uint32_t g_ulDeviceCount; /*!< Number of available device (Array size of g_pptDevices) */ +extern PDEVICEINSTANCE* g_pptDevices; /*!< Array containing all handled device instances */ +extern TKIT_DRIVER_INFORMATION g_tDriverInfo; /*!< Global driver information */ + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK +/*****************************************************************************/ +/*! Checks if the given sysdevice handle is valid +* \param hChannel Sysdevice handle +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t CheckSysdeviceHandle(CIFXHANDLE hChannel) +{ + int32_t lRet = CIFX_INVALID_HANDLE; + + if ( NULL != hChannel) + { + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hChannel; + if ( ptSysDevice->fIsSysDevice) + { + if( 0 == ptSysDevice->ulOpenCount) + { + /* We are probably in the initialization phase without an opened device handle */ + lRet = CIFX_NO_ERROR; + + }else if ( (0 == g_ulDeviceCount) || + (NULL == g_pptDevices) ) + { + /* We can't search for the handle in the device list, because the list is not available. */ + /* Maybe we are in the initialization phase and the list is not created yet. */ + lRet = CIFX_NO_ERROR; + + }else + { + /* Try to find the ptSysDevice pointer in one of the device instances */ + uint32_t ulDev = 0; + + for(ulDev = 0; ulDev < g_ulDeviceCount; ++ulDev) + { + if (ptSysDevice == &g_pptDevices[ulDev]->tSystemDevice) + { + lRet = CIFX_NO_ERROR; + break; + } + } + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Checks if the given channel handle is valid +* \param hChannel Channel handle +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t CheckChannelHandle(CIFXHANDLE hChannel) +{ + int32_t lRet = CIFX_INVALID_HANDLE; + + if ( NULL != hChannel) + { + PCHANNELINSTANCE ptDevice = (PCHANNELINSTANCE)hChannel; + if ( ptDevice->fIsChannel) + { + /* Check if we can find our device in the device table */ + if ( 0 == g_ulDeviceCount) + { + /* We are in the initialization phase without an device entry in the g_pptDevices table */ + lRet = CIFX_NO_ERROR; + + }else if ( (0 == g_ulDeviceCount) || + (NULL == g_pptDevices) ) + { + /* We can't search for the handle in the device list, because the list is not available. */ + /* Maybe we are in the initialization phase and the list is not created yet. */ + lRet = CIFX_NO_ERROR; + + }else + { + /* Try to find the ptSysDevice pointer in one of the device instances */ + uint32_t ulDev = 0; + + /* Check if we can find our channel inside a device */ + for(ulDev = 0; ulDev < g_ulDeviceCount; ++ulDev) + { + uint32_t ulChannel = 0; + for( ulChannel = 0; ulChannel < g_pptDevices[ulDev]->ulCommChannelCount; ++ulChannel) + { + if ( ptDevice == g_pptDevices[ulDev]->pptCommChannels[ulChannel]) + { + lRet = CIFX_NO_ERROR; + break; + } + } + } + } + } + } + + return lRet; +} +#endif + +/*****************************************************************************/ +/*! Opens the System device on the given board +* \param hDriver Driver handle +* \param szBoard Name of the board to open +* \param phSysdevice Returned handle to the System device area +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceOpen(CIFXHANDLE hDriver, char* szBoard, CIFXHANDLE* phSysdevice) +{ + int32_t lRet = CIFX_INVALID_BOARD; + uint32_t ulIdx; + + if(0 == g_tDriverInfo.ulOpenCount) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(szBoard); + CHECK_POINTER(phSysdevice); + + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ++ulIdx) + { + if( (OS_Strcmp(g_pptDevices[ulIdx]->szName, szBoard) == 0) || + (OS_Strcmp(g_pptDevices[ulIdx]->szAlias, szBoard) == 0) ) + { + ++g_pptDevices[ulIdx]->tSystemDevice.ulOpenCount; + *phSysdevice = (CIFXHANDLE)(&g_pptDevices[ulIdx]->tSystemDevice); + lRet = CIFX_NO_ERROR; + break; + } + } + + return lRet; /*lint !e438 */ +} + +/*****************************************************************************/ +/*! Closes an open System device +* \param hSysdevice Handle to the System device to close +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceClose(CIFXHANDLE hSysdevice) +{ + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + + --ptSysDevice->ulOpenCount; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Gets the Mailbox state of an open system device +* \param hSysdevice Handle to the System device +* \param pulRecvPktCount Number of packets in receive mailbox +* \param pulSendPktCount Number of packets the application is able to send +* at once +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceGetMBXState(CIFXHANDLE hSysdevice, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount) +{ + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + return DEV_GetMBXState(ptSysDevice, pulRecvPktCount, pulSendPktCount); +} + +/*****************************************************************************/ +/*! Inserts a packet into the System Mailbox +* \param hSysdevice Handle to the System device +* \param ptSendPkt Packet to send to device +* \param ulTimeout maximum time to wait for packet to be accepted +* by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdevicePutPacket(CIFXHANDLE hSysdevice, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + if( !OS_WaitMutex( ptSysDevice->tSendMbx.pvSendMBXMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + lRet = DEV_PutPacket(ptSysDevice, ptSendPkt, ulTimeout); + + OS_ReleaseMutex( ptSysDevice->tSendMbx.pvSendMBXMutex); + + return lRet; +} + +/*****************************************************************************/ +/*! Retrieves a packet from the System Mailbox +* \param hSysdevice Handle to the System device +* \param ulSize Size of the buffer to retrieve the packet +* \param ptRecvPkt Pointer to buffer for received packet +* \param ulTimeout maximum time to wait for packet to be delivered +* by device (in ms) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceGetPacket(CIFXHANDLE hSysdevice, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + if( !OS_WaitMutex( ptSysDevice->tRecvMbx.pvRecvMBXMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + lRet = DEV_GetPacket(ptSysDevice, ptRecvPkt, ulSize, ulTimeout); + + OS_ReleaseMutex( ptSysDevice->tRecvMbx.pvRecvMBXMutex); + + return lRet; +} + +/*****************************************************************************/ +/*! Download a file (Firmware, Configuration, etc) to the device +* \param hSysdevice Handle to the system device +* \param ulChannel Channel number to load the file to +* \param ulMode Download mode (DOWNLOAD_MODE_FIRMWARE, etc) +* \param pszFileName Name of the file +* \param pabFileData Pointer to the file data +* \param ulFileSize Length of the file data +* \param pfnCallback Callback for progress indication +* (NULL for no callback) +* \param pfnRecvPktCallback Callback Callback pointer for unsolicited receive packets +* (NULL for no callback) +* \param pvUser User parameter passed to callback +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceDownload( CIFXHANDLE hSysdevice, + uint32_t ulChannel, + uint32_t ulMode, + char* pszFileName, + uint8_t* pabFileData, + uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, + void* pvUser) +{ + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + uint32_t ulTransferType = 0; + int32_t lRet = CIFX_NO_ERROR; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + CHECK_POINTER(pszFileName); + CHECK_POINTER(pabFileData); + + switch(ulMode) + { + case DOWNLOAD_MODE_FIRMWARE: + if( CIFX_NO_ERROR != (lRet = DEV_GetFWTransferTypeFromFileName( ((PDEVICEINSTANCE)(ptSysDevice->pvDeviceInstance))->eChipType, + pszFileName, &ulTransferType))) + return lRet; + + lRet = DEV_DownloadFile(ptSysDevice, + ulChannel, + ptSysDevice->tSendMbx.ulSendMailboxLength, + ulTransferType, + pszFileName, + ulFileSize, + pabFileData, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + + break; + + case DOWNLOAD_MODE_CONFIG: + case DOWNLOAD_MODE_FILE: + ulTransferType = HIL_FILE_XFER_FILE; + lRet = DEV_DownloadFile(ptSysDevice, + ulChannel, + ptSysDevice->tSendMbx.ulSendMailboxLength, + ulTransferType, + pszFileName, + ulFileSize, + pabFileData, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + break; + + case DOWNLOAD_MODE_LICENSECODE: + ulTransferType = HIL_FILE_XFER_LICENSE_CODE; + + lRet = DEV_DownloadFile(ptSysDevice, + ulChannel, + ptSysDevice->tSendMbx.ulSendMailboxLength, + ulTransferType, + pszFileName, + ulFileSize, + pabFileData, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + + break; + + case DOWNLOAD_MODE_MODULE: + { + /* We downloading a NXO file */ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptSysDevice->pvDeviceInstance; + PCHANNELINSTANCE ptChannelInst = NULL; + + /* Check if we have a NXO module file */ + if ( !DEV_IsNXOFile( pszFileName)) + { + lRet = CIFX_FILE_NAME_INVALID; + } else if(ulChannel >= ptDevInstance->ulCommChannelCount) + { + /* Invalid channel number */ + lRet = CIFX_INVALID_CHANNEL; + } else + { + /* Check if the channel is READY and something is already loaded */ + ptChannelInst = ptDevInstance->pptCommChannels[ulChannel]; + + /* Check if we are supporting modules */ + if( !ptDevInstance->fModuleLoad) + { + lRet = CIFX_DRV_DOWNLOAD_MODULE_NO_BASEOS; + } else if( DEV_IsReady(ptChannelInst)) + { + /* Channel already READY */ + lRet = CIFX_DEV_MODULE_ALREADY_RUNNING; + } else + { + uint8_t bLoadState = CIFXTKIT_DOWNLOAD_NONE; + if ( CIFX_NO_ERROR == (lRet = DEV_ProcessFWDownload( ptDevInstance, + ulChannel, + NULL, + pszFileName, + ulFileSize, + pabFileData, + &bLoadState, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser))) + { + /* Start module */ + if (CIFX_NO_ERROR == (lRet = cifXStartModule( ptDevInstance, ulChannel, pszFileName, + ulFileSize, pfnRecvPktCallback, pvUser))) + { + if ( CIFX_NO_ERROR == (lRet = cifXReadFirmwareIdent( ptDevInstance, ulChannel, + pfnRecvPktCallback, pvUser))) + { + if ( 0 == (bLoadState & CIFXTKIT_DOWNLOAD_EXECUTED)) + { + /* Return download skipped, file exists */ + lRet = CIFX_DEV_MODULE_ALREADY_EXISTS; + } + } + } + } + } + } + } + break; + + default: + return CIFX_INVALID_PARAMETER; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Gets the information of a system device +* \param hSysdevice Handle to the system device +* \param ulCmd Information to fetch (see defines CIFX_INFO_CMD_SYSTEM_XXX) +* \param ulSize Size of the passed structure +* \param pvInfo Pointer to the structure for returned data +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceInfo(CIFXHANDLE hSysdevice, uint32_t ulCmd, uint32_t ulSize, void* pvInfo) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = NULL; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + CHECK_POINTER(pvInfo); + + ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + + switch(ulCmd) + { + case CIFX_INFO_CMD_SYSTEM_INFORMATION: + if( ulSize < (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_INFORMATION)) + { + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + /* Insert global system channel information */ + SYSTEM_CHANNEL_SYSTEM_INFORMATION* ptInfo = (SYSTEM_CHANNEL_SYSTEM_INFORMATION*)pvInfo; + + /* These values are directly read from DPM, so they need to be converted to host endianess */ + ptInfo->ulSystemError = LE32_TO_HOST(HWIF_READ32(ptSysDevice->pvDeviceInstance, ptSysChannel->tSystemState.ulSystemError)); + ptInfo->ulDpmTotalSize = LE32_TO_HOST(HWIF_READ32(ptSysDevice->pvDeviceInstance, ptSysChannel->tSystemInfo.ulDpmTotalSize)); + ptInfo->ulDeviceNumber = LE32_TO_HOST(HWIF_READ32(ptSysDevice->pvDeviceInstance, ptSysChannel->tSystemInfo.ulDeviceNumber)); + ptInfo->ulSerialNumber = LE32_TO_HOST(HWIF_READ32(ptSysDevice->pvDeviceInstance, ptSysChannel->tSystemInfo.ulSerialNumber)); + + ptInfo->ulMBXSize = ptSysDevice->tRecvMbx.ulRecvMailboxLength; + ptInfo->ulOpenCnt = ptSysDevice->ulOpenCount; + } + break; + + case CIFX_INFO_CMD_SYSTEM_INFO_BLOCK: + if( ulSize < (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK)) + { + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + uint32_t ulCopyLen = min( ulSize, + (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_INFO_BLOCK)); + + HWIF_READN(ptSysDevice->pvDeviceInstance, pvInfo, &ptSysChannel->tSystemInfo, ulCopyLen); + + (void)cifXConvertEndianess(0, + pvInfo, + ulCopyLen, + s_atSystemInfoBlock, + sizeof(s_atSystemInfoBlock) / sizeof(s_atSystemInfoBlock[0])); + } + break; + + case CIFX_INFO_CMD_SYSTEM_CHANNEL_BLOCK: + if( ulSize < (uint32_t)sizeof(SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK)) + { + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK* ptInfoBuffer = (SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK*) pvInfo; /* use the read buffer for data conversion */ + + uint32_t ulCopyLen = min( ulSize, + (uint32_t)sizeof(SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK)); + int iChannel; + + HWIF_READN(ptSysDevice->pvDeviceInstance, pvInfo, &ptSysChannel->atChannelInfo[0], ulCopyLen); + + /* Convert channel information structure. This depends on the first byte (bChannelType), + so we need to parse the whole array */ + for(iChannel = 0; + iChannel < (int) (sizeof(ptSysChannel->atChannelInfo) / sizeof(ptSysChannel->atChannelInfo[0])); + ++iChannel) + { + uint32_t ulBlockLength = (uint32_t)sizeof(ptSysChannel->atChannelInfo[0]); + uint32_t ulOffset = (uint32_t)(iChannel * ulBlockLength); + + if( ulOffset > ulCopyLen) + break; + + if( (ulOffset + sizeof(ptSysChannel->atChannelInfo[0])) > ulCopyLen) + { + /* part of block copied, so calculate restlen */ + ulBlockLength = ulCopyLen - ulOffset; + } + + /* Convert endianess */ + switch(ptInfoBuffer->abInfoBlock[iChannel][0]) + { + case HIL_CHANNEL_TYPE_SYSTEM: + (void)cifXConvertEndianess(0, + &ptInfoBuffer->abInfoBlock[iChannel], /*lint !e545 */ + ulBlockLength, + s_atSystemChannelInfo, + sizeof(s_atSystemChannelInfo) / sizeof(s_atSystemChannelInfo[0])); + break; + + case HIL_CHANNEL_TYPE_HANDSHAKE: + (void)cifXConvertEndianess(0, + &ptInfoBuffer->abInfoBlock[iChannel], /*lint !e545 */ + ulBlockLength, + s_atHandshakeChannelInfo, + sizeof(s_atHandshakeChannelInfo) / sizeof(s_atHandshakeChannelInfo[0])); + break; + + case HIL_CHANNEL_TYPE_COMMUNICATION: + (void)cifXConvertEndianess(0, + &ptInfoBuffer->abInfoBlock[iChannel], /*lint !e545 */ + ulBlockLength, + s_atCommChannelInfo, + sizeof(s_atCommChannelInfo) / sizeof(s_atCommChannelInfo[0])); + break; + + case HIL_CHANNEL_TYPE_APPLICATION: + (void)cifXConvertEndianess(0, + &ptInfoBuffer->abInfoBlock[iChannel], /*lint !e545 */ + ulBlockLength, + s_atAppChannelInfo, + sizeof(s_atAppChannelInfo) / sizeof(s_atAppChannelInfo[0])); + break; + + default: + /* This should never happen */ + break; + } + } + } + break; + + case CIFX_INFO_CMD_SYSTEM_CONTROL_BLOCK: + if( ulSize < (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCK)) + { + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + uint32_t ulCopyLen = min(ulSize, + (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_CONTROL_BLOCK)); + HWIF_READN(ptSysDevice->pvDeviceInstance, pvInfo, &ptSysChannel->tSystemControl, ulCopyLen); + + (void)cifXConvertEndianess(0, + pvInfo, + ulCopyLen, + s_atSystemControlBlock, + sizeof(s_atSystemControlBlock) / sizeof(s_atSystemControlBlock[0])); + } + break; + + case CIFX_INFO_CMD_SYSTEM_STATUS_BLOCK: + if( ulSize < (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK)) + { + lRet = CIFX_INVALID_BUFFERSIZE; + } else + { + uint32_t ulCopyLen = min(ulSize, + (uint32_t)sizeof(SYSTEM_CHANNEL_SYSTEM_STATUS_BLOCK)); + + HWIF_READN(ptSysDevice->pvDeviceInstance, pvInfo, &ptSysChannel->tSystemState, ulCopyLen); + + (void)cifXConvertEndianess(0, + pvInfo, + ulCopyLen, + s_atSystemStatusBlock, + sizeof(s_atSystemStatusBlock) / sizeof(s_atSystemStatusBlock[0])); + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + + } /* end switch */ + + return lRet; +} + +/*****************************************************************************/ +/*! Hard resets a complete device via system channel with reset parameter +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \param ulMode Reset mode with parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceResetEx(CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode) +{ + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE) hSysdevice; + int32_t lRet = CIFX_NO_ERROR; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + + /* Evaluate which mode is selected, only write reset parameter if reset mode is supported */ + if(CIFX_RESETEX_SYSTEMSTART == (HIL_SYS_CONTROL_RESET_MODE_MASK & ulMode)) + { + lRet = DEV_DoSystemStart(ptSysDevice, ulTimeout, (HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK & ulMode)); + } + else if(CIFX_RESETEX_BOOTSTART == (HIL_SYS_CONTROL_RESET_MODE_MASK & ulMode)) + { + lRet = DEV_DoSystemBootstart(ptSysDevice, ulTimeout, (HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK & ulMode)); + } + else if(CIFX_RESETEX_UPDATESTART == (HIL_SYS_CONTROL_RESET_MODE_MASK & ulMode)) + { + lRet = DEV_DoUpdateStart(ptSysDevice, ulTimeout, (HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK & ulMode)); + } + else + { + /* No handling for unknown reset mode */ + lRet = CIFX_INVALID_PARAMETER; + } + + #ifdef CIFX_TOOLKIT_TIME + if (CIFX_NO_ERROR == lRet) + cifXInitTime((PDEVICEINSTANCE)ptSysDevice->pvDeviceInstance); + #endif + + return lRet; +} + +/*****************************************************************************/ +/*! Hard resets a complete device via system channel +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceReset(CIFXHANDLE hSysdevice, uint32_t ulTimeout) +{ + int32_t lRet; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + + lRet = DEV_DoSystemStart(ptSysDevice, ulTimeout, 0); + + #ifdef CIFX_TOOLKIT_TIME + if (CIFX_NO_ERROR == lRet) + cifXInitTime((PDEVICEINSTANCE)ptSysDevice->pvDeviceInstance); + #endif + + return lRet; +} + +/*****************************************************************************/ +/*! Boot start reset to via system channel +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceBootstart(CIFXHANDLE hSysdevice, uint32_t ulTimeout) +{ + int32_t lRet; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + + lRet = DEV_DoSystemBootstart(ptSysDevice, ulTimeout, 0); + + return lRet; +} + +/*****************************************************************************/ +/*! Get/Return a memory pointer to an extended board memory if available +* \param hSysdevice Handle to system device +* \param ulCmd Command for get/free +* \param ptExtMemInfo Pointer to a user buffer to return the information +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceExtendedMemory(CIFXHANDLE hSysdevice, uint32_t ulCmd, CIFX_EXTENDED_MEMORY_INFORMATION* ptExtMemInfo) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptSysDevice->pvDeviceInstance; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = NULL; + + CHECK_SYSDEVICEHANDLE(hSysdevice); + CHECK_POINTER(ptExtMemInfo); + + ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + + if(0 == g_tDriverInfo.ulOpenCount) + return CIFX_DRV_NOT_OPENED; + + switch(ulCmd) + { + case CIFX_GET_EXTENDED_MEMORY_POINTER: + { + void* pvMemoryPtr = NULL; + + if( (NULL == ptDevInst->pbExtendedMemory) || + (0 == ptDevInst->ulExtendedMemorySize)) + + { + lRet = CIFX_MEMORY_MAPPING_FAILED; + }else + { + + ptExtMemInfo->pvMemoryID = NULL; + ptExtMemInfo->pvMemoryPtr = NULL; + ptExtMemInfo->ulMemorySize = 0; + ptExtMemInfo->ulMemoryType = 0; + + + /* Return global memory information */ + if(NULL == (ptExtMemInfo->pvMemoryID = OS_MapUserPointer(ptDevInst->pbExtendedMemory, + ptDevInst->ulExtendedMemorySize, + &pvMemoryPtr, + ptDevInst->pvOSDependent, + 0))) + { + lRet = CIFX_MEMORY_MAPPING_FAILED; + } else + { + ptExtMemInfo->pvMemoryPtr = pvMemoryPtr; + ptExtMemInfo->ulMemorySize = ptDevInst->ulExtendedMemorySize; + ptExtMemInfo->ulMemoryType = LE32_TO_HOST(HWIF_READ32( ptDevInst, ptSysChannel->tSystemState.ulHWFeatures)) & (HIL_SYSTEM_EXTMEM_ACCESS_MSK | HIL_SYSTEM_EXTMEM_TYPE_MSK); + + if( HIL_SYSTEM_EXTMEM_ACCESS_BOTH == (ptExtMemInfo->ulMemoryType & HIL_SYSTEM_EXTMEM_ACCESS_MSK)) + ptExtMemInfo->ulMemorySize = ptDevInst->ulExtendedMemorySize / 2; + else if( HIL_SYSTEM_EXTMEM_ACCESS_INTERNAL == (ptExtMemInfo->ulMemoryType & HIL_SYSTEM_EXTMEM_ACCESS_MSK)) + ptExtMemInfo->ulMemorySize = 0; + } + } + } + break; + + case CIFX_FREE_EXTENDED_MEMORY_POINTER: + { + /* Clear user area */ + if(!OS_UnmapUserPointer(ptExtMemInfo->pvMemoryID, ptDevInst->pvOSDependent)) + { + lRet = CIFX_INVALID_HANDLE; + } else + { + ptExtMemInfo->pvMemoryID = NULL; + ptExtMemInfo->pvMemoryPtr = NULL; + ptExtMemInfo->ulMemorySize = 0; + ptExtMemInfo->ulMemoryType = 0; + } + } + break; + + case CIFX_GET_EXTENDED_MEMORY_INFO: + { + ptExtMemInfo->pvMemoryID = NULL; + ptExtMemInfo->pvMemoryPtr = NULL; + ptExtMemInfo->ulMemorySize = ptDevInst->ulExtendedMemorySize; + ptExtMemInfo->ulMemoryType = LE32_TO_HOST(HWIF_READ32( ptDevInst, ptSysChannel->tSystemState.ulHWFeatures)) & (HIL_SYSTEM_EXTMEM_ACCESS_MSK | HIL_SYSTEM_EXTMEM_TYPE_MSK); + + if( HIL_SYSTEM_EXTMEM_ACCESS_BOTH == (ptExtMemInfo->ulMemoryType & HIL_SYSTEM_EXTMEM_ACCESS_MSK)) + ptExtMemInfo->ulMemorySize = ptDevInst->ulExtendedMemorySize / 2; + else if( HIL_SYSTEM_EXTMEM_ACCESS_INTERNAL == (ptExtMemInfo->ulMemoryType & HIL_SYSTEM_EXTMEM_ACCESS_MSK)) + ptExtMemInfo->ulMemorySize = 0; + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } /* end switch */ + + return lRet; +} + +/*****************************************************************************/ +/*! Opens a channel by name (Name can be obtained when enumerating Channels) +* \param hDriver Driver handle +* \param szBoard DOS Device Name of the Board to open +* \param ulChannel Channel number to open (0..n) +* \param phChannel Returned handle to the channel (Needed for all channel +* specific operations) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelOpen(CIFXHANDLE hDriver, char* szBoard, uint32_t ulChannel, CIFXHANDLE* phChannel) +{ + int32_t lRet = CIFX_INVALID_BOARD; + uint32_t ulIdx; + + if(0 == g_tDriverInfo.ulOpenCount) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(szBoard); + CHECK_POINTER(phChannel); + + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ++ulIdx) + { + /* Try to find the requested board */ + if( (OS_Strcmp(g_pptDevices[ulIdx]->szName, szBoard) == 0) || + (OS_Strcmp(g_pptDevices[ulIdx]->szAlias, szBoard) == 0) ) + { + /* Try to open the given channel */ + lRet = CIFX_INVALID_CHANNEL; + if(ulChannel < g_pptDevices[ulIdx]->ulCommChannelCount) + { + /* We found the channel */ + PCHANNELINSTANCE ptChannel = g_pptDevices[ulIdx]->pptCommChannels[ulChannel]; + ++ptChannel->ulOpenCount; + *phChannel = (CIFXHANDLE)ptChannel; + lRet = CIFX_NO_ERROR; + } + break; + } + } + + return lRet; /*lint !e438 */ +} + +/*****************************************************************************/ +/*! Closes a previously opened channel +* \param hChannel Channel handle acquired by xChannelOpen +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelClose(CIFXHANDLE hChannel) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + --ptChannel->ulOpenCount; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Download a file (Firmware, Configuration, etc) to the device +* \param hChannel Handle to the channel +* \param ulMode Download mode (DOWNLOAD_MODE_FIRMWARE, etc) +* \param pszFileName Name of the file +* \param pabFileData Pointer to the file data +* \param ulFileSize Length of the file data +* \param pfnCallback Callback for progress indication +* (NULL for no callback) +* \param pfnRecvPktCallback Callback Callback pointer for unsolicited receive packets +* (NULL for no callback) +* \param pvUser User parameter passed to callback +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelDownload(CIFXHANDLE hChannel, uint32_t ulMode, + char* pszFileName, uint8_t* pabFileData, uint32_t ulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + uint32_t ulTransferType = 0; + int32_t lRet = CIFX_NO_ERROR; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pszFileName); + CHECK_POINTER(pabFileData); + + switch(ulMode) + { + case DOWNLOAD_MODE_FIRMWARE: + if( CIFX_NO_ERROR != (lRet = DEV_GetFWTransferTypeFromFileName( ((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->eChipType, + pszFileName, &ulTransferType))) + return lRet; + break; + + case DOWNLOAD_MODE_CONFIG: + case DOWNLOAD_MODE_FILE: + ulTransferType = HIL_FILE_XFER_FILE; + break; + + case DOWNLOAD_MODE_LICENSECODE: + ulTransferType = HIL_FILE_XFER_LICENSE_CODE; + break; + + default: + return CIFX_INVALID_PARAMETER; + } + + lRet = DEV_DownloadFile(ptChannel, + ptChannel->ulChannelNumber, + ptChannel->tSendMbx.ulSendMailboxLength, + ulTransferType, + pszFileName, + ulFileSize, + pabFileData, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + + return lRet; +} + +/*****************************************************************************/ +/*! Returns the Mailbox state from a specific channel +* \param hChannel Channel handle acquired by xChannelOpen +* \param pulRecvPktCount Number of Messages waiting in receive mailbox +* \param pulSendPktCount State of the Send Mailbox +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelGetMBXState(CIFXHANDLE hChannel, uint32_t* pulRecvPktCount, uint32_t* pulSendPktCount) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + return DEV_GetMBXState(ptChannel, pulRecvPktCount, pulSendPktCount); +} + +/*****************************************************************************/ +/*! Inserts a packet into the channels mailbox +* \param hChannel Channel handle acquired by xChannelOpen +* \param ptSendPkt Packet to send to channel +* \param ulTimeout Time in ms to wait for card to accept the packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPutPacket(CIFXHANDLE hChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if another command is active */ + if ( 0 == OS_WaitMutex( ptChannel->tSendMbx.pvSendMBXMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + lRet = DEV_PutPacket(ptChannel, ptSendPkt, ulTimeout); + + /* Release command */ + OS_ReleaseMutex(ptChannel->tSendMbx.pvSendMBXMutex); + + return lRet; +} + +/*****************************************************************************/ +/*! Gets a packet from the channels mailbox +* \param hChannel Channel handle acquired by xChannelOpen +* \param ulSize Size of the return packet buffer +* \param ptRecvPkt Returned packet +* \param ulTimeout Time in ms to wait for available message +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelGetPacket(CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if another command is active */ + if ( 0 == OS_WaitMutex( ptChannel->tRecvMbx.pvRecvMBXMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + lRet = DEV_GetPacket(ptChannel, ptRecvPkt, ulSize, ulTimeout); + + /* Release command */ + OS_ReleaseMutex(ptChannel->tRecvMbx.pvRecvMBXMutex); + + return lRet; +} + +/*****************************************************************************/ +/*! Gets send packet from the channels mailbox +* \param hChannel Channel handle acquired by xChannelOpen +* \param ulSize Size of the return packet buffer +* \param ptRecvPkt Returned packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelGetSendPacket(CIFXHANDLE hChannel, uint32_t ulSize, CIFX_PACKET* ptRecvPkt) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + CIFX_PACKET* ptPacket = (CIFX_PACKET*)ptChannel->tSendMbx.ptSendMailboxStart->abSendMailbox; + uint32_t ulCopySize = 0; + + ulCopySize = HWIF_READ32(ptChannel->pvDeviceInstance, ptPacket->tHeader.ulLen) + HIL_PACKET_HEADER_SIZE; + + if( ulCopySize > ulSize) + { + /* Use the user buffer length if packet does not fit in the user buffer */ + ulCopySize = ulSize; + lRet = CIFX_BUFFER_TOO_SHORT; + } + + /* Just copy the available data into the user buffer */ + HWIF_READN(ptChannel->pvDeviceInstance, ptRecvPkt, ptPacket, ulCopySize); + + return lRet; +} + +/*****************************************************************************/ +/*! Lock the configuration on a communication channel +* \param hChannel Channel handle +* \param ulCmd CIFX_CONFIGURATION_XXX defines +* \param pulState Return locking state +* \param ulTimeout Timeout in [ms] +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelConfigLock(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pulState); + + /* Check if we are in interrupt mode */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + /* TODO: WAIT until card has recognized the LOCK command */ + UNREFERENCED_PARAMETER(ulTimeout); + + switch (ulCmd) + { + case CIFX_CONFIGURATION_LOCK: + { + /* Check if the configuration is already LOCKED */ + if( ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_CONFIG_LOCKED) + { + /* Configuration already locked */ + *pulState = CIFX_CONFIGURATION_LOCK; + } else + { + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_LOCK_CONFIGURATION | HIL_APP_COS_LOCK_CONFIGURATION_ENABLE, + 0, + HIL_APP_COS_LOCK_CONFIGURATION_ENABLE, + CIFX_DEV_CONFIG_LOCK_TIMEOUT, + ulTimeout); + + if(CIFX_NO_ERROR == lRet) + { + /* Set actual state */ + *pulState = CIFX_CONFIGURATION_LOCK; + } + } + } + break; + + case CIFX_CONFIGURATION_UNLOCK: + { + /* Check if the configuration is NOT LOCKED */ + if( !(ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_CONFIG_LOCKED)) + { + /* Configuration is NOT locked */ + *pulState = CIFX_CONFIGURATION_UNLOCK; + } else + { + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_LOCK_CONFIGURATION_ENABLE, + HIL_APP_COS_LOCK_CONFIGURATION, + HIL_APP_COS_LOCK_CONFIGURATION_ENABLE, + CIFX_DEV_CONFIG_UNLOCK_TIMEOUT, + ulTimeout); + + if(CIFX_NO_ERROR == lRet) + { + /* Set actual state */ + *pulState = CIFX_CONFIGURATION_UNLOCK; + } + } + } + break; + + case CIFX_CONFIGURATION_GETLOCKSTATE: + /* Get the actual state of the config lock bit */ + if( 0 == (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_CONFIG_LOCKED)) + { + /* Configuration is not locked */ + *pulState = CIFX_CONFIGURATION_UNLOCK; + } else + { + /* Configuration is locked */ + *pulState = CIFX_CONFIGURATION_LOCK; + } + break; + + default: + /* Unknown command */ + lRet = CIFX_INVALID_COMMAND; + break; + + } + + return lRet; +} + +/*****************************************************************************/ +/*! Set BUS state off a communication channel +* \param hChannel Channel handle +* \param ulCmd CIFX_CONFIGURATION_XXX defines +* \param pulState Return actual state on CIFX_GET_BUS_STATE +* \param ulTimeout Timeout in [ms] +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelBusState(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_INVALID_PARAMETER; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pulState); + + lRet = DEV_BusState( (PCHANNELINSTANCE)hChannel, + ulCmd, + pulState, + ulTimeout); + + return lRet; +} + +/*****************************************************************************/ +/*! Reset a communication channel +* \param hChannel Channel handle +* \param ulResetMode Reset Mode +* \param ulTimeout Timeout to wait for reset complete in [ms] +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelReset(CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout) +{ + int32_t lRet; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + /* TODO: Get packet and I/O mutexe before processing a channel init */ + /* TODO: System start via channel ? */ + switch(ulResetMode) + { + case CIFX_SYSTEMSTART: + lRet = DEV_DoSystemStart(ptChannel, ulTimeout, 0); + #ifdef CIFX_TOOLKIT_TIME + if (CIFX_NO_ERROR == lRet) + cifXInitTime((PDEVICEINSTANCE)ptChannel->pvDeviceInstance); + #endif + break; + + case CIFX_CHANNELINIT: + lRet = DEV_DoChannelInit(ptChannel, ulTimeout); + break; + + default: + lRet = CIFX_INVALID_PARAMETER; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Reads I/O Area information for the given Channel +* \param hChannel Channel handle +* \param ulCmd CIFX_IO_INPUT_AREA/CIFX_IO_OUTPUT_AREA +* \param ulAreaNumber Number of area to get information for +* \param ulSize Size of returned data structure +* \param pvData Pointer to returned data +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelIOInfo(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulAreaNumber, uint32_t ulSize, void* pvData) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + CHANNEL_IO_INFORMATION* ptIoInformation = (CHANNEL_IO_INFORMATION*)pvData; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvData); + + if(ulSize != sizeof(*ptIoInformation)) + return CIFX_INVALID_BUFFERSIZE; + + if(!DEV_IsRunning(ptChannel)) + { + lRet = CIFX_DEV_NOT_RUNNING; + } + + switch(ulCmd) + { + case CIFX_IO_INPUT_AREA: + { + if(0 == ptChannel->ulIOInputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else if(ulAreaNumber >= ptChannel->ulIOInputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + PIOINSTANCE ptIoArea = ptChannel->pptIOInputAreas[ulAreaNumber]; + + if(HIL_IO_MODE_DEFAULT != HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bPDInHskMode)) + ptIoInformation->ulIOMode = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bPDInHskMode); + else + ptIoInformation->ulIOMode = ptIoArea->usHandshakeMode; + + ptIoInformation->ulTotalSize = ptIoArea->ulDPMAreaLength; + } + } + break; + + case CIFX_IO_OUTPUT_AREA: + { + if(0 == ptChannel->ulIOOutputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + } else if(ulAreaNumber >= ptChannel->ulIOOutputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + PIOINSTANCE ptIoArea = ptChannel->pptIOOutputAreas[ulAreaNumber]; + + if(HIL_IO_MODE_DEFAULT != HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bPDOutHskMode)) + ptIoInformation->ulIOMode = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bPDOutHskMode); + else + ptIoInformation->ulIOMode = ptIoArea->usHandshakeMode; + ptIoInformation->ulTotalSize = ptIoArea->ulDPMAreaLength; + } + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Reads the Input data from the channel +* \param hChannel Channel handle acquired by xChannelOpen +* \param ulAreaNumber Number of the I/O Area (0..n) +* \param ulOffset Data offset in Input area +* \param ulDataLen Length of data to read +* \param pvData Buffer to place returned data +* \param ulTimeout Timeout in ms to wait for finished I/O Handshake +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelIORead(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + int32_t lRet = CIFX_NO_ERROR; + PIOINSTANCE ptIOArea = NULL; + uint8_t bIOBitState = HIL_FLAGS_NONE; + + if(!DEV_IsRunning(ptChannel)) + return CIFX_DEV_NOT_RUNNING; + + if(ulAreaNumber >= ptChannel->ulIOInputAreas) + return CIFX_INVALID_PARAMETER; + + ptIOArea = ptChannel->pptIOInputAreas[ulAreaNumber]; + bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 0); + +#ifdef CIFX_TOOLKIT_DMA + /* Check for DMA transfer */ + if( ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /*------------------------------*/ + /* This is DMA IO data transfer */ + /*------------------------------*/ + /* This is DMACh n */ + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + uint32_t ulDMChIdx = ptChannel->ulChannelNumber * 2 + eDMA_INPUT_BUFFER_IDX; + PCIFX_DMABUFFER_T ptDmaInfo = &ptDevInst->atDmaBuffers[ulDMChIdx]; + + if(0 != ulAreaNumber ) /* Only support for area 0 in DMA mode */ + return CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED; + + if( (ulOffset + ulDataLen) > ptDmaInfo->ulSize) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Check if another command is active */ + if ( !OS_WaitMutex( ptIOArea->pvMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + /* TODO: define read procedure ??Toggle -> Read or READ->Toggle */ + if(HIL_FLAGS_NONE == bIOBitState) + { + /* Read data without handshake does not work in DMA operation*/ + lRet = CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED; + + } else + { + /* Read data */ + if(!DEV_WaitForBitState(ptChannel, ptIOArea->bHandshakeBit, bIOBitState, ulTimeout)) + { + lRet = CIFX_DEV_EXCHANGE_FAILED; + } else + { + /* Read data */ + OS_Memcpy( pvData, + ((uint8_t*)(ptDmaInfo->pvBuffer)) + ulOffset, + ulDataLen); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read data done */ + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOArea->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + } + + /* Release command */ + OS_ReleaseMutex( ptIOArea->pvMutex); + + } else +#endif + { + /*---------------------------*/ + /* This is DPM data transfer */ + /*---------------------------*/ + if( (ulOffset + ulDataLen) > ptIOArea->ulDPMAreaLength) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Check if another command is active */ + if ( !OS_WaitMutex( ptIOArea->pvMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + /* Read data */ + if(HIL_FLAGS_NONE == bIOBitState) + { + /* Read data */ + HWIF_READN( ptChannel->pvDeviceInstance, + pvData, + &ptIOArea->pbDPMAreaStart[ulOffset], + ulDataLen); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + } else if(!DEV_WaitForBitState(ptChannel, ptIOArea->bHandshakeBit, bIOBitState, ulTimeout)) + { + lRet = CIFX_DEV_EXCHANGE_FAILED; + } else + { + /* Read data */ + HWIF_READN( ptChannel->pvDeviceInstance, + pvData, + &ptIOArea->pbDPMAreaStart[ulOffset], + ulDataLen); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read data done */ + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOArea->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + + /* Release command */ + OS_ReleaseMutex( ptIOArea->pvMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Writes the Output data to the channel +* \param hChannel Channel handle acquired by xChannelOpen +* \param ulAreaNumber Number of the I/O Area (0..n) +* \param ulOffset Data offset in Output area +* \param ulDataLen Length of data to send +* \param pvData Buffer containing send data +* \param ulTimeout Timeout in ms to wait for handshake completion +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelIOWrite(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData, uint32_t ulTimeout) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + int32_t lRet = CIFX_NO_ERROR; + PIOINSTANCE ptIOArea = NULL; + uint8_t bIOBitState = HIL_FLAGS_NONE; + + if(!DEV_IsRunning(ptChannel)) + return CIFX_DEV_NOT_RUNNING; + if(ulAreaNumber >= ptChannel->ulIOOutputAreas) + return CIFX_INVALID_PARAMETER; + + ptIOArea = ptChannel->pptIOOutputAreas[ulAreaNumber]; + bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 1); + +#ifdef CIFX_TOOLKIT_DMA + /* Check for DMA transfer */ + if( ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /*------------------------------*/ + /* This is DMA IO data transfer */ + /*------------------------------*/ + /* This is DMACh n+1 */ + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + uint32_t ulDMChIdx = ptChannel->ulChannelNumber * 2 + eDMA_OUTPUT_BUFFER_IDX; + PCIFX_DMABUFFER_T ptDmaInfo = &ptDevInst->atDmaBuffers[ulDMChIdx]; + + if(0 != ulAreaNumber ) /* Only support for area 0 in DMA mode */ + return CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED; + + if( (ulOffset + ulDataLen) > ptDmaInfo->ulSize) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Check if another command is active */ + if ( !OS_WaitMutex( ptIOArea->pvMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + /* Read data */ + /* TODO: define read procedure ??Toggle -> Read or READ->Toggle */ + if(HIL_FLAGS_NONE == bIOBitState) + { + /* Read data without handshake does not work in DMA operation*/ + lRet = CIFX_DEV_DMA_HANDSHAKEMODE_NOT_SUPPORTED; + + } else + { + if(!DEV_WaitForBitState(ptChannel, ptIOArea->bHandshakeBit, bIOBitState, ulTimeout)) + { + lRet = CIFX_DEV_EXCHANGE_FAILED; + } else + { + /* Read data */ + OS_Memcpy( (((uint8_t*)(ptDmaInfo->pvBuffer)) + ulOffset), + pvData, + ulDataLen); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read data done */ + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOArea->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + } + + /* Release command */ + OS_ReleaseMutex( ptIOArea->pvMutex); + + } else +#endif + { + /*---------------------------*/ + /* This is DPM data transfer */ + /*---------------------------*/ + if( (ulOffset + ulDataLen) > ptIOArea->ulDPMAreaLength) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Check if another command is active */ + if ( !OS_WaitMutex( ptIOArea->pvMutex, ulTimeout)) + return CIFX_DRV_CMD_ACTIVE; + + /* Read data */ + /* TODO: define write procedure ??Toggle -> Write or Write->Toggle */ + if(HIL_FLAGS_NONE == bIOBitState) + { + /* Read data without handshake */ + HWIF_WRITEN( ptChannel->pvDeviceInstance, + &ptIOArea->pbDPMAreaStart[ulOffset], + pvData, + ulDataLen); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + } else + { + if(!DEV_WaitForBitState(ptChannel, ptIOArea->bHandshakeBit, bIOBitState, ulTimeout)) + { + lRet = CIFX_DEV_EXCHANGE_FAILED; + } else + { + /* Read data */ + HWIF_WRITEN( ptChannel->pvDeviceInstance, + &ptIOArea->pbDPMAreaStart[ulOffset], + pvData, + ulDataLen); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read data done */ + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOArea->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + /* Check COMM Flag for return value */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + } + + /* Release command */ + OS_ReleaseMutex( ptIOArea->pvMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read back Send Data Area from channel +* \param hChannel Channel handle acquired by xChannelOpen +* \param ulAreaNumber Number of the I/O Area (0..n) +* \param ulOffset Data start offset +* \param ulDataLen Data length to read +* \param pvData Data buffer +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelIOReadSendData(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulOffset, uint32_t ulDataLen, void* pvData) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + int32_t lRet = CIFX_NO_ERROR; + +#ifdef CIFX_TOOLKIT_DMA + + /* Check for DMA transfer */ + if( ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /* This is DMACh n */ + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + uint32_t ulDMChIdx = ptChannel->ulChannelNumber * 2 + eDMA_OUTPUT_BUFFER_IDX; /* We reading the Output buffer */ + PCIFX_DMABUFFER_T ptDmaInfo = &ptDevInst->atDmaBuffers[ulDMChIdx]; + + if(0 != ulAreaNumber ) /* Only support for area 0 in DMA mode */ + return CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED; + + if( (ulOffset + ulDataLen) > ptDmaInfo->ulSize) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Read data */ + OS_Memcpy( pvData, + ((uint8_t*)(ptDmaInfo->pvBuffer)) + ulOffset, + ulDataLen); + } else + +#endif + + { + PIOINSTANCE ptIOArea = NULL; + + if(ulAreaNumber >= ptChannel->ulIOOutputAreas) + return CIFX_INVALID_PARAMETER; + + ptIOArea = ptChannel->pptIOOutputAreas[ulAreaNumber]; + + if( (ulOffset + ulDataLen) > ptIOArea->ulDPMAreaLength) + return CIFX_INVALID_ACCESS_SIZE; /* read size too long */ + + /* Read data */ + HWIF_READN(ptChannel->pvDeviceInstance, + pvData, + &ptIOArea->pbDPMAreaStart[ulOffset], + ulDataLen); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read/Write Control block +* \param hChannel Handle to the channel +* \param ulCmd CIFX_CMD_READ_DATA/CIFX_CMD_WRITE_DATA +* \param ulOffset Start offset of read/write +* \param ulDataLen Length of data to read/write +* \param pvData Buffer to copy from/to +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelControlBlock(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvData); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if CONTROL block is available */ + } else if(NULL == ptChannel->ptControlBlock) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + if ((ulOffset + ulDataLen) > ptChannel->ulControlBlockSize) + lRet = CIFX_INVALID_ACCESS_SIZE; + else + { + HIL_DPM_CONTROL_BLOCK_T tChannelControlBlockTmp = {0}; + void* pvDataInternal = pvData; /* Default to user buffer */ + int32_t lRetTmp = CIFX_NO_ERROR; /* Error from the conversion function */ + + if(CIFX_CMD_WRITE_DATA == ulCmd) + { + /* To prohibit changes to user supplied buffer on write, use a local copy instead */ + pvDataInternal = (void*)(((uint8_t*)&tChannelControlBlockTmp) + ulOffset); + OS_Memcpy(pvDataInternal, pvData, ulDataLen); + lRetTmp = cifXConvertEndianess(ulOffset, + pvDataInternal, + ulDataLen, + s_atControlBlock, + sizeof(s_atControlBlock) / sizeof(s_atControlBlock[0])); + } + + if(CIFX_NO_ERROR == lRetTmp) + { + lRet = DEV_ReadWriteBlock(ptChannel, + (void*)ptChannel->ptControlBlock, + ulOffset, + ptChannel->ulControlBlockSize, + pvDataInternal, + ulDataLen, + ulCmd, + 1); + } + + /* Note: We accept errors from the DEV_ReadWriteBlock() function because we want to inform the user in any case */ + /* (e.g. CIFX_DEV_NOT_RUNNING) even if we running the conversion on an not filled / empty buffer! */ + if(CIFX_CMD_READ_DATA == ulCmd) + { + lRetTmp = cifXConvertEndianess(ulOffset, + pvDataInternal, + ulDataLen, + s_atControlBlock, + sizeof(s_atControlBlock) / sizeof(s_atControlBlock[0])); + } + + /* Error of DEV_ReadWriteBlock() takes priority over (possible) Endianess conversion error */ + if((CIFX_NO_ERROR == lRet) && (CIFX_NO_ERROR != lRetTmp)) + lRet = lRetTmp; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read/Write Common status block +* \param hChannel Handle to the channel +* \param ulCmd CIFX_CMD_READ_DATA +* \param ulOffset Start offset of read +* \param ulDataLen Length of data to read +* \param pvData Buffer to copy to +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelCommonStatusBlock(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvData); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if STATUS block is available */ + } else if(NULL == ptChannel->ptCommonStatusBlock) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + lRet = DEV_ReadWriteBlock(ptChannel, + (void*)ptChannel->ptCommonStatusBlock, + ulOffset, + ptChannel->ulCommonStatusSize, + pvData, + ulDataLen, + ulCmd, + 0); + + /* Note: We accept errors from the DEV_ReadWriteBlock() function because we want to inform the user in any case */ + /* (e.g. CIFX_DEV_NOT_RUNNING) even if we running the conversion on an not filled / empty buffer! */ + if(CIFX_CMD_READ_DATA == ulCmd) + { + int32_t lRetTmp = cifXConvertEndianess(ulOffset, + pvData, + ulDataLen, + s_atCommonStatusBlock, + sizeof(s_atCommonStatusBlock) / sizeof(s_atCommonStatusBlock[0])); + + /* Error of DEV_ReadWriteBlock() takes priority over (possible) Endianess conversion error */ + if((CIFX_NO_ERROR == lRet) && (CIFX_NO_ERROR != lRetTmp)) + lRet = lRetTmp; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read Extended status block +* \param hChannel Handle to the channel +* \param ulCmd CIFX_CMD_READ_DATA +* \param ulOffset Start offset of read +* \param ulDataLen Length of data to read +* \param pvData Buffer to copy to +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelExtendedStatusBlock(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvData); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if CONTROL block is available */ + } else if(NULL == ptChannel->ptExtendedStatusBlock) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + lRet = DEV_ReadWriteBlock(ptChannel, + (void*)ptChannel->ptExtendedStatusBlock, + ulOffset, + ptChannel->ulExtendedStatusSize, + pvData, + ulDataLen, + ulCmd, + 0); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read a user block +* \param hChannel Handle to the channel +* \param ulAreaNumber Userblock number +* \param ulCmd CIFX_CMD_READ_DATA +* \param ulOffset Start offset of read +* \param ulDataLen Length of data to read +* \param pvData Buffer to copy to +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelUserBlock(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t ulCmd, uint32_t ulOffset, uint32_t ulDataLen, void* pvData) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvData); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if CONTROL block is available */ + } else if( (ulAreaNumber >= ptChannel->ulUserAreas) || + (NULL == ptChannel->pptUserAreas[ulAreaNumber]) ) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + PUSERINSTANCE ptUserInstance = ptChannel->pptUserAreas[ulAreaNumber]; + + lRet = DEV_ReadWriteBlock(ptChannel, + (void*)ptUserInstance->pbUserBlockStart, + ulOffset, + ptUserInstance->ulUserBlockLength, + pvData, + ulDataLen, + ulCmd, + 1); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Gets a pointer to an IO Area +* \param hChannel Handle to the channel +* \param ulCmd CIFX_MEM_PTR_OPEN/CIFX_MEM_PTR_CLOSE +* \param pvMemoryInfo Pointer to requested memory structure +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPLCMemoryPtr(CIFXHANDLE hChannel, uint32_t ulCmd, void* pvMemoryInfo) +{ + PLC_MEMORY_INFORMATION* ptMemory = (PLC_MEMORY_INFORMATION*)pvMemoryInfo; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + int fUseCaching = 0; + unsigned long ulAreaDefinition = 0; + PDEVICEINSTANCE ptDevInst = NULL; + int32_t lRet = CIFX_NO_ERROR; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvMemoryInfo); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + return CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + if( (0 == ptChannel->ulIOInputAreas) || + (0 == ptChannel->ulIOOutputAreas) ) + /* No IO blocks defined */ + return CIFX_FUNCTION_NOT_AVAILABLE; + + ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + fUseCaching = ptDevInst->fCachedMemAccess; + ulAreaDefinition = ptMemory->ulAreaDefinition; + +#ifdef CIFX_CACHE_TEST + /* Check for additional option in area definition */ + /* and overwrite if additional flags are set. */ + if (0 != (ulAreaDefinition & ~CIFX_IO_AREA_MASK)) + { + /* Override caching option to get uncached pointers */ + ulAreaDefinition &= CIFX_IO_AREA_MASK; + fUseCaching = 0; + } +#endif + +#ifdef CIFX_TOOLKIT_DMA + + /* Check for DMA transfer */ + if( ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /*------------------------------*/ + /* This is DMA IO data transfer */ + /*------------------------------*/ + /* This is DMACh n */ + PCIFX_DMABUFFER_T ptDmaInfo = NULL; + CACHED_MEMORY_AREA_T* ptCachedMemInfo = NULL; + uint32_t ulDMChIdx = 0; + + if(0 != ptMemory->ulAreaNumber) + { + /* Invalid IO area */ + lRet = CIFX_DEV_DMA_IO_AREA_NOT_SUPPORTED; /* Only support for area 0 in DMA mode */ + } else + { + if (ulAreaDefinition == CIFX_IO_INPUT_AREA) + { + ulDMChIdx = ptChannel->ulChannelNumber * 2 + eDMA_INPUT_BUFFER_IDX; + ptDmaInfo = &ptDevInst->atDmaBuffers[ulDMChIdx]; + ptCachedMemInfo = &ptChannel->tCachedIOInputArea; + } else + { + ulDMChIdx = ptChannel->ulChannelNumber * 2 + eDMA_OUTPUT_BUFFER_IDX; + ptDmaInfo = &ptDevInst->atDmaBuffers[ulDMChIdx]; + ptCachedMemInfo = &ptChannel->tCachedIOOutputArea; + } + + /* Check user command */ + switch(ulCmd) + { + case CIFX_MEM_PTR_OPEN: + { + void* pvMappedDPM = NULL; + void* pvDPM = ptDmaInfo->pvBuffer; + uint32_t ulDPMSize = ptDmaInfo->ulSize; + + /* Check for caching option */ + if ((0 != fUseCaching) && + (NULL != ptCachedMemInfo->pvMemPtr)) + { + /* Mapping already exists */ + lRet = CIFX_NO_MORE_ENTRIES; + } else + { + /* Return global memory information */ + if (NULL == (ptMemory->pvMemoryID = OS_MapUserPointer(pvDPM, ulDPMSize, &pvMappedDPM, ptDevInst->pvOSDependent, (unsigned char)fUseCaching))) + { + lRet = CIFX_MEMORY_MAPPING_FAILED; + } else + { + *(ptMemory->ppvMemoryPtr) = (void*)pvMappedDPM; + *(ptMemory->pulIOAreaStartOffset) = 0; /* In DMA mode, we don't have a DPM start offeset */ + *(ptMemory->pulIOAreaSize) = ulDPMSize; + + /* Store the memory pointer for later cache operation (e.g. flush) */ + if (0 != fUseCaching) + { + ptCachedMemInfo->pvMemPtr = (void*)pvMappedDPM; + ptCachedMemInfo->ulAreaSize = ulDPMSize; + } + } + } + } + break; + + case CIFX_MEM_PTR_CLOSE: + { + if(!OS_UnmapUserPointer(ptMemory->pvMemoryID, ptDevInst->pvOSDependent)) + { + lRet = CIFX_INVALID_HANDLE; + } else + { + ptMemory->pvMemoryID = NULL; + *(ptMemory->ppvMemoryPtr) = NULL; + *(ptMemory->pulIOAreaStartOffset) = 0; + *(ptMemory->pulIOAreaSize) = 0; + + if (0 != fUseCaching) + { + /* Remove any stored cache buffer information */ + ptCachedMemInfo->pvMemPtr = NULL; + ptCachedMemInfo->ulAreaSize = 0; + } + } + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + + } /* end switch */ + } + } else + +#endif + + { + PIOINSTANCE* pptIOInstances = NULL; + uint32_t ulAreaCount = 0; + CACHED_MEMORY_AREA_T* ptCachedMemInfo = NULL; + + if(ulAreaDefinition == CIFX_IO_INPUT_AREA) + { + ulAreaCount = ptChannel->ulIOInputAreas; + pptIOInstances = ptChannel->pptIOInputAreas; + ptCachedMemInfo = &ptChannel->tCachedIOInputArea; + + } else + { + ulAreaCount = ptChannel->ulIOOutputAreas; + pptIOInstances = ptChannel->pptIOOutputAreas; + ptCachedMemInfo = &ptChannel->tCachedIOOutputArea; + } + + /* Check if IO area is available */ + if (ptMemory->ulAreaNumber >= ulAreaCount) + { + /* Invalid IO area */ + lRet = CIFX_INVALID_PARAMETER; + } else + { + /* Check user command */ + switch(ulCmd) + { + case CIFX_MEM_PTR_OPEN: + { + void* pvMappedDPM = NULL; + void* pvDPM = pptIOInstances[ptMemory->ulAreaNumber]->pbDPMAreaStart; + uint32_t ulDPMSize = pptIOInstances[ptMemory->ulAreaNumber]->ulDPMAreaLength; + + /* Check for caching option */ + if ((0 != fUseCaching) && + (NULL != ptCachedMemInfo->pvMemPtr)) + { + /* Mapping already exists */ + lRet = CIFX_NO_MORE_ENTRIES; + + }else + { + /* Return global memory information */ + if (NULL == (ptMemory->pvMemoryID = OS_MapUserPointer(pvDPM, ulDPMSize, &pvMappedDPM, ptDevInst->pvOSDependent, (unsigned char)fUseCaching))) + { + lRet = CIFX_MEMORY_MAPPING_FAILED; + } else + { + *(ptMemory->ppvMemoryPtr) = (void*)pvMappedDPM; + *(ptMemory->pulIOAreaStartOffset) = (uint32_t)(pptIOInstances[ptMemory->ulAreaNumber]->pbDPMAreaStart - + ptChannel->pbDPMChannelStart); + *(ptMemory->pulIOAreaSize) = ulDPMSize; + + if (0 != fUseCaching) + { + /* Remove any stored cache buffer information */ + ptCachedMemInfo->pvMemPtr = (void*)pvMappedDPM; + ptCachedMemInfo->ulAreaSize = ulDPMSize; + } + } + } + } + break; + + case CIFX_MEM_PTR_CLOSE: + { + if(!OS_UnmapUserPointer(ptMemory->pvMemoryID, ptDevInst->pvOSDependent)) + { + lRet = CIFX_INVALID_HANDLE; + } else + { + ptMemory->pvMemoryID = NULL; + *(ptMemory->ppvMemoryPtr) = NULL; + *(ptMemory->pulIOAreaStartOffset) = 0; + *(ptMemory->pulIOAreaSize) = 0; + + if (0 != fUseCaching) + { + /* Remove any stored cache buffer information */ + ptCachedMemInfo->pvMemPtr = NULL; + ptCachedMemInfo->ulAreaSize = 0; + } + } + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } /* end switch */ + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Checks if the given IO Area is ready for the next handshake +* \param hChannel Handle to the channel +* \param ulAreaNumber Area to check +* \param pulReadState Returned state of the area (!=0 means area is ready) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPLCIsReadReady(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulReadState) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } else if(0 == ptChannel->ulIOInputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + /* Check if IO area is available */ + if(ulAreaNumber >= ptChannel->ulIOInputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + /* Check if the device is communication. If only the COM flag is missing, we return the current bit state */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + if( (lRet != CIFX_DEV_NOT_READY) && + (lRet != CIFX_DEV_NOT_RUNNING) ) + { + /* Read back the send data area */ + PIOINSTANCE ptIOInst = ptChannel->pptIOInputAreas[ulAreaNumber]; + uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOInst, 0); + + *pulReadState = 0; + + if( (HIL_FLAGS_NONE == bIOBitState) || + (DEV_GetHandshakeBitState(ptChannel, (uint32_t)(1UL << ptIOInst->bHandshakeBit)) == bIOBitState) ) + { + *pulReadState = 1; + + /* Invalidate the IO input buffer, for cache refresh */ + if (NULL != ptChannel->tCachedIOInputArea.pvMemPtr) + { + OS_InvalidateCacheMemory_FromDevice(ptChannel->tCachedIOInputArea.pvMemPtr, ptChannel->tCachedIOInputArea.ulAreaSize); + } + } + } + } + } + + /* Assuming that the request was handled */ + return lRet; +} + +/*****************************************************************************/ +/*! Checks if the given IO Area is ready for the next handshake +* \param hChannel Handle to the channel +* \param ulAreaNumber Area to check +* \param pulWriteState Returned state of the area (!=0 means area is ready) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPLCIsWriteReady(CIFXHANDLE hChannel, uint32_t ulAreaNumber, uint32_t* pulWriteState) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } else if(0 == ptChannel->ulIOOutputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + /* Check if IO area is available */ + if(ulAreaNumber >= ptChannel->ulIOOutputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + /* Check if the device is communication. If only the COM flag is missing, we return the current bit state */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + if( (lRet != CIFX_DEV_NOT_READY) && + (lRet != CIFX_DEV_NOT_RUNNING) ) + { + /* Read back the send data area */ + PIOINSTANCE ptIOInst = ptChannel->pptIOOutputAreas[ulAreaNumber]; + uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOInst, 1); + + *pulWriteState = 0; + + if( (HIL_FLAGS_NONE == bIOBitState) || + (DEV_GetHandshakeBitState(ptChannel, (uint32_t)(1UL << ptIOInst->bHandshakeBit)) == bIOBitState) ) + { + *pulWriteState = 1; + } + } + } + } + + /* Assuming that the request was handled */ + return lRet; +} + +/*****************************************************************************/ +/*! Toggles the Handshake bit for the given IO Output Area +* \param hChannel Handle to the channel +* \param ulAreaNumber Areanumber +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPLCActivateWrite(CIFXHANDLE hChannel, uint32_t ulAreaNumber) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } else if(0 == ptChannel->ulIOOutputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + /* Check if IO area is available */ + if(ulAreaNumber >= ptChannel->ulIOOutputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + /* Check if the device is communication. If only the COM flag is missing, we toggle the bits */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + if( (lRet != CIFX_DEV_NOT_READY) && + (lRet != CIFX_DEV_NOT_RUNNING) ) + { + PIOINSTANCE ptIOInst = ptChannel->pptIOOutputAreas[ulAreaNumber]; + + /* Flush the IO output cache to output buffer */ + if (NULL != ptChannel->tCachedIOOutputArea.pvMemPtr) + { + OS_FlushCacheMemory_ToDevice(ptChannel->tCachedIOOutputArea.pvMemPtr, ptChannel->tCachedIOOutputArea.ulAreaSize); + } + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOInst->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Toggles the Handshake bit for the given IO Input Area +* \param hChannel Handle to the channel +* \param ulAreaNumber Areanumber +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelPLCActivateRead(CIFXHANDLE hChannel, uint32_t ulAreaNumber) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } else if(0 == ptChannel->ulIOInputAreas) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + } else + { + /* Check if IO area is available */ + if(ulAreaNumber >= ptChannel->ulIOInputAreas) + { + lRet = CIFX_INVALID_PARAMETER; + } else + { + /* Check if the device is communication. If only the COM flag is missing, we toggle the bits */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + + if( (lRet != CIFX_DEV_NOT_READY) && + (lRet != CIFX_DEV_NOT_RUNNING) ) + { + PIOINSTANCE ptIOInst = ptChannel->pptIOInputAreas[ulAreaNumber]; + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + DEV_ToggleBit(ptChannel, (uint32_t)(1UL << ptIOInst->bHandshakeBit)); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } + } + } + + return lRet; +} + +#ifndef CIFX_TOOLKIT_USE_CUSTOM_DRV_FUNCS +/*****************************************************************************/ +/*! Open a connection to the driver +* \param phDriver Returned handle to the driver +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverOpen(CIFXHANDLE* phDriver) +{ + if(!g_tDriverInfo.fInitialized) + return CIFX_DRV_DRIVER_NOT_LOADED; + + CHECK_POINTER(phDriver); + + *phDriver = &g_tDriverInfo; + + ++g_tDriverInfo.ulOpenCount; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Close a connection to the driver +* \param hDriver Handle to connection, that is being closed +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverClose(CIFXHANDLE hDriver) +{ + if(!g_tDriverInfo.fInitialized) + return CIFX_DRV_DRIVER_NOT_LOADED; + + if(g_tDriverInfo.ulOpenCount == 0) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + + --g_tDriverInfo.ulOpenCount; + + return CIFX_NO_ERROR; /*lint !e438 */ +} + +/*****************************************************************************/ +/*! Query Driver information +* \param hDriver Handle to the driver +* \param ulSize Size of the passed DRIVER_INFORMATION Structure +* \param pvDriverInfo Pointer to returned data (DRIVER_INFORMATION +* structure) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverGetInformation(CIFXHANDLE hDriver, uint32_t ulSize, void* pvDriverInfo) +{ + DRIVER_INFORMATION* ptDriverInfo = (DRIVER_INFORMATION*)pvDriverInfo; + + if(g_tDriverInfo.ulOpenCount == 0) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(pvDriverInfo); + + if(ulSize < (uint32_t)sizeof(*ptDriverInfo)) + return CIFX_INVALID_BUFFERSIZE; + + ptDriverInfo->ulBoardCnt = g_ulDeviceCount; + (void)OS_Strncpy(ptDriverInfo->abDriverVersion, TOOLKIT_VERSION, sizeof(ptDriverInfo->abDriverVersion)); + + return CIFX_NO_ERROR; /*lint !e438 */ +} +#endif +/*****************************************************************************/ +/*! Query human readable error description +* \param lError Error to look up +* \param szBuffer Pointer to return data +* \param ulBufferLen Length of return buffer +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverGetErrorDescription(int32_t lError, char* szBuffer, uint32_t ulBufferLen) +{ + int32_t lRet = CIFX_FUNCTION_FAILED; + int iIdx = 0; + + CHECK_POINTER(szBuffer); + + for(iIdx = 0; iIdx < (int)(sizeof(s_atErrorToDescrTable) / sizeof(s_atErrorToDescrTable[0])); ++iIdx) + { + if(s_atErrorToDescrTable[iIdx].lError == lError) + { + (void)OS_Strncpy(szBuffer, s_atErrorToDescrTable[iIdx].szErrorDescr, ulBufferLen); + lRet = CIFX_NO_ERROR; + break; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Enumerate over all handled boards/devices +* \param hDriver Driver handle +* \param ulBoard Board number (incremented from 0 up) +* \param ulSize Size of return buffer +* \param pvBoardInfo Return buffer (BOARD_INFORMATION structure) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverEnumBoards(CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulSize, void* pvBoardInfo) +{ + BOARD_INFORMATION* ptBoardInfo = (BOARD_INFORMATION*)pvBoardInfo; + PDEVICEINSTANCE ptDevInstance = NULL; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = NULL; + + if(g_tDriverInfo.ulOpenCount == 0) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(pvBoardInfo); + + if(ulSize < (uint32_t)sizeof(*ptBoardInfo)) + return CIFX_INVALID_BUFFERSIZE; + + if(ulBoard >= g_ulDeviceCount) + return CIFX_NO_MORE_ENTRIES; + + ptDevInstance = g_pptDevices[ulBoard]; + ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->pbDPM; + + (void)OS_Strncpy(ptBoardInfo->abBoardName, ptDevInstance->szName, sizeof(ptBoardInfo->abBoardName)); + (void)OS_Strncpy(ptBoardInfo->abBoardAlias, ptDevInstance->szAlias, sizeof(ptBoardInfo->abBoardAlias)); + ptBoardInfo->ulBoardID = ulBoard; + + { + ptBoardInfo->ulSystemError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemError)); + + ptBoardInfo->ulPhysicalAddress = ptDevInstance->ulPhysicalAddress; + ptBoardInfo->ulIrqNumber = ptDevInstance->ulIrqNumber; + ptBoardInfo->bIrqEnabled = ptDevInstance->fIrqEnabled? 1 : 0; + ptBoardInfo->ulDpmTotalSize = ptDevInstance->ulDPMSize; + ptBoardInfo->ulChannelCnt = ptDevInstance->ulCommChannelCount; + + HWIF_READN(ptDevInstance, &ptBoardInfo->tSystemInfo, &ptSysChannel->tSystemInfo, sizeof(ptBoardInfo->tSystemInfo)); + } + + (void)cifXConvertEndianess(0, + &ptBoardInfo->tSystemInfo, + sizeof(ptBoardInfo->tSystemInfo), + s_atSystemInfoBlock, + sizeof(s_atSystemInfoBlock) / sizeof(s_atSystemInfoBlock[0])); + + return CIFX_NO_ERROR; /*lint !e438 */ +} + +/*****************************************************************************/ +/*! Enumerate over all channels on the given boards +* \param hDriver Driver handle +* \param ulBoard Board number +* \param ulChannel Channel number (incremented from 0 up) +* \param ulSize Size of return buffer +* \param pvChannelInfo Return buffer (CHANNEL_INFORMATION structure) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xDriverEnumChannels(CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulChannel, uint32_t ulSize, void* pvChannelInfo) +{ + CHANNEL_INFORMATION* ptChannelInfo = (CHANNEL_INFORMATION*)pvChannelInfo; + PDEVICEINSTANCE ptDevInstance = NULL; + PCHANNELINSTANCE ptChannel = NULL; + int32_t lRet = CIFX_NO_ERROR; + + if(g_tDriverInfo.ulOpenCount == 0) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(pvChannelInfo); + + if(ulSize < (uint32_t)sizeof(*ptChannelInfo)) + return CIFX_INVALID_BUFFERSIZE; + + if(ulBoard >= g_ulDeviceCount) + return CIFX_INVALID_BOARD; + + ptDevInstance = g_pptDevices[ulBoard]; + + if(ulChannel >= ptDevInstance->ulCommChannelCount) + return CIFX_NO_MORE_ENTRIES; + + ptChannel = ptDevInstance->pptCommChannels[ulChannel]; + + /* Read the channel information */ + lRet = xChannelInfo( ptChannel, ulSize, ptChannelInfo); + + return lRet; /*lint !e438 */ +} + +/*! ************************************************************************** +* Get/Return a memory pointer to the boards dual-port memory +* \param hDriver Driver handle +* \param ulBoard The board number (0) +* \param ulCmd Function command (CIFX_MEM_PTR_OPEN/CIFX_MEM_PTR_CLOSE) +* \param pvMemoryInfo Memory information structure +* \return CIFX_NO_ERROR on success +******************************************************************************/ +int32_t APIENTRY xDriverMemoryPointer(CIFXHANDLE hDriver, uint32_t ulBoard, uint32_t ulCmd, void* pvMemoryInfo) +{ + int32_t lRet = CIFX_NO_ERROR; + MEMORY_INFORMATION* ptMemory = (MEMORY_INFORMATION*)pvMemoryInfo; + + if(0 == g_tDriverInfo.ulOpenCount) + return CIFX_DRV_NOT_OPENED; + + CHECK_DRIVERHANDLE(hDriver); + CHECK_POINTER(pvMemoryInfo); + + /* We only support 1 board */ + if(ulBoard >= g_ulDeviceCount) + { + lRet = CIFX_INVALID_BOARD; + } else + { + /* Get the device instance */ + PDEVICEINSTANCE ptDevInst = g_pptDevices[ulBoard]; + switch(ulCmd) + { + case CIFX_MEM_PTR_OPEN: + { + void* pvMappedDPM = NULL; + + *(ptMemory->pulMemorySize) = 0; + *(ptMemory->ppvMemoryPtr) = NULL; + + /* Return global memory information */ + if(NULL == (ptMemory->pvMemoryID = OS_MapUserPointer(ptDevInst->pbDPM, ptDevInst->ulDPMSize, &pvMappedDPM, ptDevInst->pvOSDependent, 0))) + { + lRet = CIFX_MEMORY_MAPPING_FAILED; + } else + { + *(ptMemory->ppvMemoryPtr) = (void*)pvMappedDPM; + *(ptMemory->pulMemorySize) = ptDevInst->ulDPMSize; + } + + /* Check requested channel */ + if(ptMemory->ulChannel != CIFX_NO_CHANNEL) + { + /* Process channel information */ + if(ptMemory->ulChannel >= ptDevInst->ulCommChannelCount) + { + *(ptMemory->pulChannelStartOffset) = 0; + *(ptMemory->pulChannelSize) = 0; + lRet = CIFX_INVALID_CHANNEL; + } else + { + PCHANNELINSTANCE ptChannel = ptDevInst->pptCommChannels[ptMemory->ulChannel]; + uint32_t ulOffset = (uint32_t)(ptChannel->pbDPMChannelStart - + ptDevInst->pbDPM); + + /* Get Channel information */ + *(ptMemory->pulChannelSize) = ptChannel->ulDPMChannelLength; + *(ptMemory->pulChannelStartOffset) = ulOffset; + } + } + } + break; + + case CIFX_MEM_PTR_CLOSE: + /* Clear user area */ + if(!OS_UnmapUserPointer(ptMemory->pvMemoryID, ptDevInst->pvOSDependent)) + { + lRet = CIFX_INVALID_HANDLE; + } else + { + ptMemory->pvMemoryID = NULL; + *(ptMemory->ppvMemoryPtr) = NULL; + *(ptMemory->pulMemorySize) = 0; + *(ptMemory->ppvMemoryPtr) = NULL; + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } /* end switch */ + } + + return lRet; /*lint !e438 */ +} + +/*****************************************************************************/ +/*! Get Channel information on an open channel +* \param hChannel Handle to the channel +* \param ulSize Size of return buffer +* \param pvChannelInfo Return buffer (CHANNEL_INFORMATION structure) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelInfo(CIFXHANDLE hChannel, uint32_t ulSize, void* pvChannelInfo) +{ + CHANNEL_INFORMATION* ptChannelInfo = (CHANNEL_INFORMATION*)pvChannelInfo; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + PDEVICEINSTANCE ptDevInstance = NULL; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pvChannelInfo); + + ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + if(ulSize < (uint32_t)sizeof(*ptChannelInfo)) + return CIFX_INVALID_BUFFERSIZE; + + (void)OS_Strncpy(ptChannelInfo->abBoardName, + ptDevInstance->szName, + (uint32_t)sizeof(ptChannelInfo->abBoardName)); + (void)OS_Strncpy(ptChannelInfo->abBoardAlias, + ptDevInstance->szAlias, + (uint32_t)sizeof(ptChannelInfo->abBoardAlias)); + + ptChannelInfo->ulDeviceNumber = ptDevInstance->ulDeviceNumber; + ptChannelInfo->ulSerialNumber = ptDevInstance->ulSerialNumber; + + ptChannelInfo->usFWMajor = ptChannel->tFirmwareIdent.tFwVersion.usMajor; + ptChannelInfo->usFWMinor = ptChannel->tFirmwareIdent.tFwVersion.usMinor; + ptChannelInfo->usFWRevision = ptChannel->tFirmwareIdent.tFwVersion.usRevision; + ptChannelInfo->usFWBuild = ptChannel->tFirmwareIdent.tFwVersion.usBuild; + ptChannelInfo->bFWNameLength = ptChannel->tFirmwareIdent.tFwName.bNameLength; + + OS_Memcpy(ptChannelInfo->abFWName, + ptChannel->tFirmwareIdent.tFwName.abName, + sizeof(ptChannelInfo->abFWName)); + + ptChannelInfo->usFWYear = ptChannel->tFirmwareIdent.tFwDate.usYear; + ptChannelInfo->bFWMonth = ptChannel->tFirmwareIdent.tFwDate.bMonth; + ptChannelInfo->bFWDay = ptChannel->tFirmwareIdent.tFwDate.bDay; + + ptChannelInfo->ulChannelError = 0; + if(0 != ptChannel->ptCommonStatusBlock) + { + ptChannelInfo->ulChannelError = LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationError)); + } + + ptChannelInfo->ulOpenCnt = ptChannel->ulOpenCount; + ptChannelInfo->ulPutPacketCnt = ptChannel->tSendMbx.ulSendPacketCnt; + ptChannelInfo->ulGetPacketCnt = ptChannel->tRecvMbx.ulRecvPacketCnt; + ptChannelInfo->ulMailboxSize = ptChannel->tSendMbx.ulSendMailboxLength; + ptChannelInfo->ulIOInAreaCnt = ptChannel->ulIOInputAreas; + ptChannelInfo->ulIOOutAreaCnt = ptChannel->ulIOOutputAreas; + ptChannelInfo->ulHskSize = ptChannel->bHandshakeWidth; + + /* Check if we are in interrupt mode */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + ptChannelInfo->ulNetxFlags = ptChannel->usNetxFlags; + ptChannelInfo->ulHostFlags = ptChannel->usHostFlags; + ptChannelInfo->ulHostCOSFlags = ptChannel->ulHostCOSFlags; + ptChannelInfo->ulDeviceCOSFlags = ptChannel->ulDeviceCOSFlags; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Trigger channels watchdog +* \param hChannel Handle to the channel +* \param ulCmd Trigger command (CIFX_WATCHDOG_START to +* trigger/start, CIFX_WATCHDOG_STOP to end watchdog) +* \param pulTrigger Old trigger value from device +* (informational use only) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelWatchdog(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulTrigger) +{ + return DEV_TriggerWatchdog( (PCHANNELINSTANCE)hChannel, ulCmd, pulTrigger); +} + +/*****************************************************************************/ +/*! Set/Get Host state of the card +* \param hChannel Handle to the channel +* \param ulCmd Host state command (CIFX_HOST_STATE_NOT_READY, +* CIFX_HOST_STATE_READY, CIFX_HOST_STATE_READ) +* \param pulState Returned state if command is CIFX_HOST_STATE_READ +* \param ulTimeout Time in ms to wait for start/stop communication +* flag +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelHostState(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_INVALID_PARAMETER; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pulState); + + switch(ulCmd) + { + case CIFX_HOST_STATE_READ: + lRet = DEV_GetHostState( (PCHANNELINSTANCE)hChannel, + pulState); + break; + + case CIFX_HOST_STATE_READY: + case CIFX_HOST_STATE_NOT_READY: + lRet = DEV_SetHostState( (PCHANNELINSTANCE)hChannel, + ulCmd, + ulTimeout); + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Starts directory enumeration on the given channel +* \param hChannel Handle to the channel +* \param ptDirectoryInfo Pointer to enumeration result. +* (Will be initialized inside function) +* \param pfnRecvPktCallback Callback for unhandled packets +* \param pvUser User data for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelFindFirstFile(CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + return xSysdeviceFindFirstFile(hChannel, ptChannel->ulChannelNumber, ptDirectoryInfo, pfnRecvPktCallback, pvUser); +} + +/*****************************************************************************/ +/*! Enumerate next entry in directory on the given channel +* \param hChannel Handle to the channel +* \param ptDirectoryInfo Pointer to enumeration result. +* \param pfnRecvPktCallback Callback for unhandled packets +* \param pvUser User data for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelFindNextFile(CIFXHANDLE hChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + return xSysdeviceFindNextFile(hChannel, ptChannel->ulChannelNumber, ptDirectoryInfo, pfnRecvPktCallback, pvUser); +} + +/*****************************************************************************/ +/*! Starts directory enumeration on the given channel +* \param hSysdevice Handle to the system device +* \param ulChannel Channel number to get directory from +* \param ptDirectoryInfo Pointer to enumeration result. +* (Will be initialized inside function) +* \param pfnRecvPktCallback Callback for unhandled packets +* \param pvUser User data for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceFindFirstFile(CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hSysdevice; + union + { + CIFX_PACKET tPacket; + HIL_DIR_LIST_REQ_T tDirListReq; + + } uSendPacket; + HIL_DIR_LIST_CNF_T tDirListCnf; + + OS_Memset(&uSendPacket, 0, sizeof(uSendPacket)); + OS_Memset(&tDirListCnf, 0, sizeof(tDirListCnf)); + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK + if ( (CIFX_NO_ERROR != CheckSysdeviceHandle(hSysdevice)) && + (CIFX_NO_ERROR != CheckChannelHandle(hSysdevice)) ) + return CIFX_INVALID_HANDLE; +#endif + + CHECK_POINTER(ptDirectoryInfo); + + if(OS_Strlen(ptDirectoryInfo->szFilename) > 0) + { + uint16_t usDirNameLength = (uint16_t)(OS_Strlen(ptDirectoryInfo->szFilename) + 1); + + uSendPacket.tDirListReq.tData.usDirNameLength = HOST_TO_LE16(usDirNameLength); + (void)OS_Strncpy( (char*)((&uSendPacket.tDirListReq.tData) + 1), + ptDirectoryInfo->szFilename, + usDirNameLength); + } + + uSendPacket.tDirListReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPacket.tDirListReq.tHead.ulSrc = HOST_TO_LE32(((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->ulPhysicalAddress); + uSendPacket.tDirListReq.tHead.ulCmd = HOST_TO_LE32(HIL_DIR_LIST_REQ); + uSendPacket.tDirListReq.tHead.ulLen = HOST_TO_LE32( ((uint32_t)sizeof(uSendPacket.tDirListReq.tData) + + uSendPacket.tDirListReq.tData.usDirNameLength) ); + uSendPacket.tDirListReq.tData.ulChannelNo = HOST_TO_LE32(ulChannel); + + + lRet = DEV_TransferPacket(ptChannel, + &uSendPacket.tPacket, + (CIFX_PACKET*)&tDirListCnf, + sizeof(tDirListCnf), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + if( CIFX_NO_ERROR == lRet) + { + if( SUCCESS_HIL_OK == (lRet = LE32_TO_HOST(tDirListCnf.tHead.ulSta)) ) + { + uint8_t* pbListEntry = (uint8_t*)&ptDirectoryInfo->hList; + if ((tDirListCnf.tHead.ulExt & HIL_PACKET_SEQ_MASK) == HIL_PACKET_SEQ_LAST) + { + /* this is the last packet */ + lRet = CIFX_NO_MORE_ENTRIES; + /* invalidate handle */ + *pbListEntry = 0; + } else + { + /* TODO: Store handle for directory list, which needs to be set by firmware */ + *pbListEntry = 1; + + (void)OS_Strncpy(ptDirectoryInfo->szFilename, + (const char*)tDirListCnf.tData.szName, + sizeof(ptDirectoryInfo->szFilename)); + + ptDirectoryInfo->bFiletype = tDirListCnf.tData.bFileType; + ptDirectoryInfo->ulFilesize = LE32_TO_HOST(tDirListCnf.tData.ulFileSize); + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Enumerate next entry in directory on the given channel +* \param hSysdevice Handle to the system device +* \param ulChannel Channel number to get directory from +* \param ptDirectoryInfo Pointer to enumeration result +* \param pfnRecvPktCallback Callback for unhandled packets +* \param pvUser User data for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceFindNextFile(CIFXHANDLE hSysdevice, uint32_t ulChannel, CIFX_DIRECTORYENTRY* ptDirectoryInfo, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hSysdevice; + union + { + CIFX_PACKET tPacket; + HIL_DIR_LIST_REQ_T tDirListReq; + + } uSendPacket; + HIL_DIR_LIST_CNF_T tDirListCnf; + uint16_t usDirNameLen = 0; + + OS_Memset(&uSendPacket, 0, sizeof(uSendPacket)); + OS_Memset(&tDirListCnf, 0, sizeof(tDirListCnf)); + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK + if ( (CIFX_NO_ERROR != CheckSysdeviceHandle(hSysdevice)) && + (CIFX_NO_ERROR != CheckChannelHandle(hSysdevice)) ) + return CIFX_INVALID_HANDLE; +#endif + + CHECK_POINTER(ptDirectoryInfo); + + usDirNameLen = (uint16_t)(OS_Strlen(ptDirectoryInfo->szFilename) + 1); + uSendPacket.tDirListReq.tData.usDirNameLength = HOST_TO_LE16(usDirNameLen); + (void)OS_Strncpy( (char*)((&uSendPacket.tDirListReq.tData) + 1), + ptDirectoryInfo->szFilename, + usDirNameLen); + + uSendPacket.tDirListReq.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + uSendPacket.tDirListReq.tHead.ulSrc = HOST_TO_LE32(((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->ulPhysicalAddress); + uSendPacket.tDirListReq.tHead.ulCmd = HOST_TO_LE32(HIL_DIR_LIST_REQ); + uSendPacket.tDirListReq.tHead.ulLen = HOST_TO_LE32( ((uint32_t)sizeof(uSendPacket.tDirListReq.tData) + usDirNameLen) ); + uSendPacket.tDirListReq.tHead.ulExt = HOST_TO_LE32(HIL_PACKET_SEQ_MIDDLE); + + uSendPacket.tDirListReq.tData.ulChannelNo = HOST_TO_LE32(ulChannel); + + lRet = DEV_TransferPacket(ptChannel, + &uSendPacket.tPacket, + (CIFX_PACKET*)&tDirListCnf, + sizeof(tDirListCnf), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + if(CIFX_NO_ERROR == lRet) + { + if( SUCCESS_HIL_OK == (lRet = (LE32_TO_HOST(tDirListCnf.tHead.ulSta))) ) + { + if(( LE32_TO_HOST(tDirListCnf.tHead.ulExt) & HIL_PACKET_SEQ_MASK) == HIL_PACKET_SEQ_LAST) + { + uint8_t* pbListEntry = (uint8_t*)&ptDirectoryInfo->hList; + + /* invalidate handle */ + *pbListEntry = 0; + + /* this is the last packet */ + lRet = CIFX_NO_MORE_ENTRIES; + + } else + { + (void)OS_Strncpy(ptDirectoryInfo->szFilename, + (const char*)tDirListCnf.tData.szName, + sizeof(tDirListCnf.tData.szName)); + + ptDirectoryInfo->bFiletype = tDirListCnf.tData.bFileType; + ptDirectoryInfo->ulFilesize = LE32_TO_HOST(tDirListCnf.tData.ulFileSize); + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Uploads a file via system channel +* \param hSysdevice Handle to the System device +* \param ulChannel Channel number to get directory from +* \param ulMode Transfer Mode +* \param pszFileName Filename to upload +* \param pabFileData Pointer to buffer receiving upload +* \param pulFileSize [in]Length of buffer, [out] Bytes copied to buffer +* \param pfnCallback Callback pointer for progress +* (NULL for no callback) +* \param pfnRecvPktCallback Callback pointer for unsolicited receive packets +* (NULL for no callback) +* \param pvUser User parameter on callback. +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceUpload(CIFXHANDLE hSysdevice, uint32_t ulChannel, + uint32_t ulMode, char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + PCHANNELINSTANCE ptSysDevice = (PCHANNELINSTANCE)hSysdevice; + uint32_t ulTransferType = 0; + int32_t lRet = CIFX_NO_ERROR; + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK + if ( (CIFX_NO_ERROR != CheckSysdeviceHandle(hSysdevice)) && + (CIFX_NO_ERROR != CheckChannelHandle(hSysdevice)) ) + return CIFX_INVALID_HANDLE; +#endif + + CHECK_POINTER(pszFileName); + CHECK_POINTER(pabFileData); + CHECK_POINTER(pulFileSize); + + switch(ulMode) + { + case DOWNLOAD_MODE_FIRMWARE: + if( CIFX_NO_ERROR != (lRet = DEV_GetFWTransferTypeFromFileName( ((PDEVICEINSTANCE)(ptSysDevice->pvDeviceInstance))->eChipType, + pszFileName, &ulTransferType))) + return lRet; + break; + + case DOWNLOAD_MODE_CONFIG: + case DOWNLOAD_MODE_FILE: + ulTransferType = HIL_FILE_XFER_FILE; + break; + + default: + return CIFX_INVALID_PARAMETER; + } + + lRet = DEV_UploadFile(ptSysDevice, + ulChannel, + ptSysDevice->tRecvMbx.ulRecvMailboxLength, + ulTransferType, + pszFileName, + pulFileSize, + pabFileData, + DEV_TransferPacket, + pfnCallback, + pfnRecvPktCallback, + pvUser); + + return lRet; +} + +/*****************************************************************************/ +/*! Uploads a file via Communication channel +* \param hChannel Handle to the Channel +* \param ulMode Transfer Mode +* \param pszFileName Filename to upload +* \param pabFileData Pointer to buffer receiving upload +* \param pulFileSize [in]Length of buffer, [out] Bytes copied to buffer +* \param pfnCallback Callback pointer for progress +* (NULL for no callback) +* \param pfnRecvPktCallback Callback pointer for unsolicited receive packets +* (NULL for no callback) +* \param pvUser User parameter on callback. +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelUpload(CIFXHANDLE hChannel, uint32_t ulMode, + char* pszFileName, uint8_t* pabFileData, uint32_t* pulFileSize, + PFN_PROGRESS_CALLBACK pfnCallback, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + return xSysdeviceUpload(hChannel, + ptChannel->ulChannelNumber, + ulMode, + pszFileName, + pabFileData, + pulFileSize, + pfnCallback, + pfnRecvPktCallback, + pvUser); + +} + +/*****************************************************************************/ +/*! Set DMA state of a communication channel +* \param hChannel Channel handle +* \param ulCmd Command CIFX_DMA_STATE_xxx +* \param pulState Return actual state on CIFX_GET_DMA_STATE +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelDMAState(CIFXHANDLE hChannel, uint32_t ulCmd, uint32_t* pulState) +{ +#ifdef CIFX_TOOLKIT_DMA + + int32_t lRet = CIFX_INVALID_PARAMETER; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + PDEVICEINSTANCE ptDevInstance = NULL; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pulState); + + ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + /* Only possible on PCI devices */ + if( !ptDevInstance->fPCICard) + return CIFX_FUNCTION_NOT_AVAILABLE; + + /* Only possible if user provided DMA buffers */ + if(0 == ptDevInstance->ulDMABufferCount) + return CIFX_DEV_DMA_INSUFF_BUFFER_COUNT; + + /* Check if firmware supports DMA functions */ + + /*TODO: Check this */ + /*if( !ptChannel->ptCommonStatusBlock->ulCommunicationCOS->fPCICard) */ + /* return CIFX_FUNCTION_NOT_AVAILABLE; */ + + lRet = DEV_DMAState( (PCHANNELINSTANCE)hChannel, + ulCmd, + pulState); + + return lRet; + +#else + + UNREFERENCED_PARAMETER(hChannel); + UNREFERENCED_PARAMETER(ulCmd); + UNREFERENCED_PARAMETER(pulState); + return CIFX_FUNCTION_NOT_AVAILABLE; /*lint !e438 : unused variables */ + +#endif +} + +/*****************************************************************************/ +/*! Register a callback notification +* \param hChannel Handle to the Channel +* \param ulNotification Notification +* \param pfnCallback Callback function +* \param pvUser User data pointer +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelRegisterNotification(CIFXHANDLE hChannel, + uint32_t ulNotification, + PFN_NOTIFY_CALLBACK pfnCallback, + void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + PDEVICEINSTANCE ptDevInst = NULL; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pfnCallback); + + ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + if(!ptDevInst->fIrqEnabled) + return CIFX_INTERRUPT_DISABLED; + + switch (ulNotification) + { + case CIFX_NOTIFY_RX_MBX_FULL: + /* Check if already registered */ + if( NULL != ptChannel->tRecvMbx.pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + ptChannel->tRecvMbx.pvUser = pvUser; + ptChannel->tRecvMbx.pfnCallback = pfnCallback; + + if(DEV_WaitForBitState(ptChannel, + ptChannel->tRecvMbx.bRecvACKBitoffset, + HIL_FLAGS_NOT_EQUAL, + 0)) + { + CIFX_NOTIFY_RX_MBX_FULL_DATA_T tData; + tData.ulRecvCount = LE16_TO_HOST(HWIF_READ16(ptDevInst, ptChannel->tRecvMbx.ptRecvMailboxStart->usWaitingPackages)); + + pfnCallback(CIFX_NOTIFY_RX_MBX_FULL, sizeof(tData), &tData, pvUser); + } + } + break; + + case CIFX_NOTIFY_TX_MBX_EMPTY: + /* Check if already registered */ + if( NULL != ptChannel->tSendMbx.pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + ptChannel->tSendMbx.pvUser = pvUser; + ptChannel->tSendMbx.pfnCallback = pfnCallback; + + if(DEV_WaitForBitState(ptChannel, + ptChannel->tSendMbx.bSendCMDBitoffset, + HIL_FLAGS_EQUAL, + 0)) + { + CIFX_NOTIFY_TX_MBX_EMPTY_DATA_T tData; + tData.ulMaxSendCount = LE16_TO_HOST(HWIF_READ16(ptDevInst, ptChannel->tSendMbx.ptSendMailboxStart->usPackagesAccepted)); + + pfnCallback(CIFX_NOTIFY_TX_MBX_EMPTY, sizeof(tData), &tData, pvUser); + } + + } + break; + + case CIFX_NOTIFY_PD0_IN: + case CIFX_NOTIFY_PD0_OUT: + { + IOINSTANCE* ptIOArea = ptChannel->pptIOInputAreas[0]; + uint32_t ulAreaCount = ptChannel->ulIOInputAreas; + uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 0); + + if( CIFX_NOTIFY_PD0_OUT == ulNotification) + { + ptIOArea = ptChannel->pptIOOutputAreas[0]; + ulAreaCount = ptChannel->ulIOOutputAreas; + bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 1); + } + + /* Check if we have one input area */ + if( 0 == ulAreaCount) + { + /* No input area */ + lRet = CIFX_INVALID_PARAMETER; + + } else if( NULL != ptIOArea->pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + /* Add the callback */ + ptIOArea->pvUser = pvUser; + ptIOArea->pfnCallback = pfnCallback; + + if(DEV_WaitForBitState(ptChannel, + ptIOArea->bHandshakeBit, + bIOBitState, + 0)) + { + pfnCallback(ulNotification, 0, NULL, pvUser); + } + + lRet = CIFX_NO_ERROR; + } + } + break; + + case CIFX_NOTIFY_PD1_IN: + case CIFX_NOTIFY_PD1_OUT: + { + IOINSTANCE* ptIOArea = ptChannel->pptIOInputAreas[1]; + uint32_t ulAreaCount = ptChannel->ulIOInputAreas; + uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 0); + + if( CIFX_NOTIFY_PD1_OUT == ulNotification) + { + ptIOArea = ptChannel->pptIOOutputAreas[1]; + ulAreaCount = ptChannel->ulIOOutputAreas; + bIOBitState = DEV_GetIOBitstate(ptChannel, ptIOArea, 1); + } + + /* Check if we have two input areas */ + if( 1 <= ulAreaCount) + { + /* No input area */ + lRet = CIFX_INVALID_PARAMETER; + + } else if( NULL != ptIOArea->pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + /* Add the callback */ + ptIOArea->pvUser = pvUser; + ptIOArea->pfnCallback = pfnCallback; + + if(DEV_WaitForBitState(ptChannel, + ptIOArea->bHandshakeBit, + bIOBitState, + 0)) + { + pfnCallback(ulNotification, 0, NULL, pvUser); + } + } + } + break; + + case CIFX_NOTIFY_SYNC: + if( NULL != ptChannel->tSynch.pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + /* Add the callback */ + uint8_t bState = HIL_FLAGS_NOT_EQUAL; + + ptChannel->tSynch.pvUser = pvUser; + ptChannel->tSynch.pfnCallback = pfnCallback; + + /* Add callback for sync on startup */ + if( HIL_SYNC_MODE_HST_CTRL == HWIF_READ8(ptDevInst, ptChannel->ptCommonStatusBlock->bSyncHskMode)) + bState = HIL_FLAGS_EQUAL; + + if(DEV_WaitForSyncState(ptChannel, + bState, + 0)) + { + pfnCallback(ulNotification, 0, NULL, pvUser); + } + + } + break; + + case CIFX_NOTIFY_COM_STATE: + /* Check if already registered */ + if( NULL != ptChannel->tComState.pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_ALREADY_USED; + } else + { + CIFX_NOTIFY_COM_STATE_T tData; + + ptChannel->tComState.pvUser = pvUser; + ptChannel->tComState.pfnCallback = pfnCallback; + + /* Just update the actual flag state by reading it once */ + (void)DEV_WaitForBitState(ptChannel, + NCF_COMMUNICATING_BIT_NO, + HIL_FLAGS_SET, + 0); + + tData.ulComState = ptChannel->usNetxFlags & NCF_COMMUNICATING; + pfnCallback(CIFX_NOTIFY_COM_STATE, sizeof(tData), &tData, pvUser); + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Unregister a callback notification +* \param hChannel Handle to the Channel +* \param ulNotification Notification +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelUnregisterNotification( CIFXHANDLE hChannel, + uint32_t ulNotification) +{ + int32_t lRet = CIFX_NO_ERROR; + + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + + switch (ulNotification) + { + case CIFX_NOTIFY_RX_MBX_FULL: + /* Check if already registered */ + if( NULL == ptChannel->tRecvMbx.pfnCallback) + { + /* Not registered */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + ptChannel->tRecvMbx.pfnCallback = NULL; + } + break; + + case CIFX_NOTIFY_TX_MBX_EMPTY: + /* Check if already registered */ + if( NULL == ptChannel->tSendMbx.pfnCallback) + { + /* Already registered */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + ptChannel->tSendMbx.pfnCallback = NULL; + } + break; + + case CIFX_NOTIFY_PD0_IN: + case CIFX_NOTIFY_PD0_OUT: + { + IOINSTANCE* ptIOArea = ptChannel->pptIOInputAreas[0]; + uint32_t ulAreaCount = ptChannel->ulIOInputAreas; + + if( CIFX_NOTIFY_PD0_OUT == ulNotification) + { + ptIOArea = ptChannel->pptIOOutputAreas[0]; + ulAreaCount = ptChannel->ulIOOutputAreas; + } + + /* Check if we have one input area */ + if( 0 == ulAreaCount) + { + /* No input area */ + lRet = CIFX_INVALID_PARAMETER; + + } else if( NULL == ptIOArea->pfnCallback) + { + /* Not registered before */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + /* Add the callback */ + ptIOArea->pfnCallback = NULL; + ptIOArea->pvUser = NULL; + lRet = CIFX_NO_ERROR; + } + } + break; + + case CIFX_NOTIFY_PD1_IN: + case CIFX_NOTIFY_PD1_OUT: + { + IOINSTANCE* ptIOArea = ptChannel->pptIOInputAreas[1]; + uint32_t ulAreaCount = ptChannel->ulIOInputAreas; + + if( CIFX_NOTIFY_PD1_OUT == ulNotification) + { + ptIOArea = ptChannel->pptIOOutputAreas[1]; + ulAreaCount = ptChannel->ulIOOutputAreas; + } + + /* Check if we have two input areas */ + if( 1 <= ulAreaCount) + { + /* No input area */ + lRet = CIFX_INVALID_PARAMETER; + + } else if( NULL == ptIOArea->pfnCallback) + { + /* Not registered before */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + /* Add the callback */ + ptIOArea->pfnCallback = NULL; + ptIOArea->pvUser = NULL; + } + } + break; + + case CIFX_NOTIFY_SYNC: + if( NULL == ptChannel->tSynch.pfnCallback) + { + /* Not registered before */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + /* Add the callback */ + ptChannel->tSynch.pfnCallback = NULL; + ptChannel->tSynch.pvUser = NULL; + } + break; + + case CIFX_NOTIFY_COM_STATE: + if( NULL == ptChannel->tComState.pfnCallback) + { + /* Not registered before */ + lRet = CIFX_CALLBACK_NOT_REGISTERED; + } else + { + /* delete the callback */ + ptChannel->tComState.pfnCallback = NULL; + ptChannel->tComState.pvUser = NULL; + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Signal a sync state, either a sync command or acknowledge +* \param hChannel Handle to the Channel +* \param ulCmd Sync command +* \param ulTimeout Timeout to wait for sync / sync signalling +* \param pulErrorCount Actual sync error counter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelSyncState( CIFXHANDLE hChannel, + uint32_t ulCmd, + uint32_t ulTimeout, + uint32_t* pulErrorCount) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)hChannel; + + CHECK_CHANNELHANDLE(hChannel); + CHECK_POINTER(pulErrorCount); + + /* Check if device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + } else + { + switch (ulCmd) + { + case CIFX_SYNC_SIGNAL_CMD: + /* Check if SYNC mode is host controlled */ + if(HIL_SYNC_MODE_HST_CTRL != HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bSyncHskMode)) + { + /* Invalid Device mode */ + lRet = CIFX_DEV_SYNC_STATE_INVALID_MODE; + + } else if(!DEV_WaitForSyncState(ptChannel, HIL_FLAGS_EQUAL, ulTimeout)) + { + /* Sync cannot be signalled as bits are in wrong state */ + lRet = CIFX_DEV_SYNC_STATE_TIMEOUT; + } else + { + /* Signal new sync */ + DEV_ToggleSyncBit( (PDEVICEINSTANCE)ptChannel->pvDeviceInstance, (1 << ptChannel->ulChannelNumber)); + + /* Return actual error counter */ + *pulErrorCount = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bErrorSyncCnt); + + /* Check if the device is communication */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + break; + + case CIFX_SYNC_ACKNOWLEDGE_CMD: + /* Check if SYNC mode is device controlled */ + if(HIL_SYNC_MODE_DEV_CTRL != HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bSyncHskMode)) + { + /* Invalid Device mode */ + lRet = CIFX_DEV_SYNC_STATE_INVALID_MODE; + + } else if(!DEV_WaitForSyncState(ptChannel, HIL_FLAGS_NOT_EQUAL, ulTimeout)) + { + /* Sync cannot be signalled as bits are in wrong state */ + lRet = CIFX_DEV_SYNC_STATE_TIMEOUT; + } else + { + /* Acknowledge an device sys */ + DEV_ToggleSyncBit( (PDEVICEINSTANCE)ptChannel->pvDeviceInstance, (1 << ptChannel->ulChannelNumber)); + + /* Return actual error counter */ + *pulErrorCount = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bErrorSyncCnt); + + /* Check if the device is communication */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + break; + + case CIFX_SYNC_WAIT_CMD: + { + if( (HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bSyncHskMode) != HIL_SYNC_MODE_HST_CTRL) && + (HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bSyncHskMode) != HIL_SYNC_MODE_DEV_CTRL) ) + { + /* Invalid Device mode */ + lRet = CIFX_DEV_SYNC_STATE_INVALID_MODE; + } else + { + uint8_t bState = HIL_FLAGS_NOT_EQUAL; + + if( HIL_SYNC_MODE_HST_CTRL == HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bSyncHskMode)) + bState = HIL_FLAGS_EQUAL; + + /* Wait for sync */ + if(!DEV_WaitForSyncState(ptChannel, bState, ulTimeout)) + { + /* Sync timeout */ + lRet = CIFX_DEV_SYNC_STATE_TIMEOUT; + } else + { + /* Return actual error counter */ + *pulErrorCount = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->bErrorSyncCnt); + + /* Check if the device is communication */ + (void)DEV_IsCommunicating(ptChannel, &lRet); + } + } + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/Source/cifXHWFunctions.c b/libcifx/Toolkit/Source/cifXHWFunctions.c new file mode 100644 index 0000000..411a289 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXHWFunctions.c @@ -0,0 +1,2502 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXHWFunctions.c 14802 2023-05-10 09:39:47Z RMayer $: + + Description: + cifX API Hardware handling functions implementation + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-18 Added new option parameter for HWIF_READN / WRITEN function, to be able to + recognize single HWIF_READ16/WRITE32 and HWIF_READ32/WRITE32 accesses + 2023-02-07 Added wait flag in DEV_Reset_Execute() + Used DEV_Reset_Execute() to signal reset functions on APP_CPU/iDPM handling + 2022-01-04 Using new reset definition mask HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK in reset function + 2021-10-15 Added ulHostCOSFlagsSaved variable handling + 2020-08-18 After reset, fResetActive needs to be cleared before Handshake Cells + are re-evaluated + 2019-11-26 Use CIFX_DMA_STATE_* defines in DEV_DMAState() + 2019-11-13 Locking in DEV_ReadHandshakeFlags() includes Handshake Cell accesses + 2019-10-30 Increase timeout during updatestart to firmware (e.g. initial startup + may take longer than subsequent starts) + 2019-10-16 Reworked reset function handling and parameter passing + 2019-10-08 - Fix reset handling for use case IDPM & APP CPU + - Split Dev_DoResetEx(), offer separate updatestart function + 2019-03-21 Add timeout during resets for netX4000/4100 based PCI(e) devices to + prevent DPM accesses during reset. + 2018-11-06 Add reset handling for IDPM and APP CPUs. + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file cifXHWFunctions.c +* cifX API Hardware handling functions implementation */ +/*****************************************************************************/ + +#include "cifXHWFunctions.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +#include "Hil_Packet.h" +#include "Hil_SystemCmd.h" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_HARDWARE Hardware Access +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Sends a Packet to the device/channel +* \param ptChannel Channel instance to send a packet +* \param ptSendPkt Packet to send +* \param ulTimeout Maximum time in ms to wait for an empty mailbox +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_PutPacket(PCHANNELINSTANCE ptChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_DEV_MAILBOX_FULL; + + if(!DEV_IsReady(ptChannel)) + return CIFX_DEV_NOT_READY; + + /* Check if packet fits into the mailbox */ + if( (LE32_TO_HOST(ptSendPkt->tHeader.ulLen) + HIL_PACKET_HEADER_SIZE) > ptChannel->tSendMbx.ulSendMailboxLength) + return CIFX_DEV_MAILBOX_TOO_SHORT; + + if(DEV_WaitForBitState(ptChannel, ptChannel->tSendMbx.bSendCMDBitoffset, HIL_FLAGS_EQUAL, ulTimeout)) + { + /* Copy packet to mailbox */ + ++ptChannel->tSendMbx.ulSendPacketCnt; + HWIF_WRITEN(ptChannel->pvDeviceInstance, + ptChannel->tSendMbx.ptSendMailboxStart->abSendMailbox, + ptSendPkt, + LE32_TO_HOST(ptSendPkt->tHeader.ulLen) + HIL_PACKET_HEADER_SIZE); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Signal new packet */ + DEV_ToggleBit(ptChannel, ptChannel->tSendMbx.ulSendCMDBitmask); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + lRet = CIFX_NO_ERROR; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Retrieves a Packet from the device/channel +* \param ptChannel Channel instance to receive a packet from +* \param ptRecvPkt Pointer to place received Packet in +* \param ulRecvBufferSize Length of the receive buffer +* \param ulTimeout Maximum time in ms to wait for an empty mailbox +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_GetPacket( PCHANNELINSTANCE ptChannel, CIFX_PACKET* ptRecvPkt, uint32_t ulRecvBufferSize, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulCopySize = 0; + CIFX_PACKET* ptPacket = NULL; + + if(!DEV_IsReady(ptChannel)) + return CIFX_DEV_NOT_READY; + + if(!DEV_WaitForBitState(ptChannel, ptChannel->tRecvMbx.bRecvACKBitoffset, HIL_FLAGS_NOT_EQUAL, ulTimeout)) + return CIFX_DEV_GET_NO_PACKET; + + ++ptChannel->tRecvMbx.ulRecvPacketCnt; + + ptPacket = (CIFX_PACKET*)ptChannel->tRecvMbx.ptRecvMailboxStart->abRecvMailbox; + ulCopySize = LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptPacket->tHeader.ulLen)) + HIL_PACKET_HEADER_SIZE; + if(ulCopySize > ulRecvBufferSize) + { + /* We have to free the mailbox, read as much as possible */ + ulCopySize = ulRecvBufferSize; + lRet = CIFX_BUFFER_TOO_SHORT; + } + + HWIF_READN(ptChannel->pvDeviceInstance, ptRecvPkt, ptPacket, ulCopySize); + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Signal read packet done */ + DEV_ToggleBit(ptChannel, ptChannel->tRecvMbx.ulRecvACKBitmask); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + return lRet; +} + +/*****************************************************************************/ +/*! Exchanges a packet with the device +* ATTENTION: This function will poll for receive packet, and will discard +* any packets that do not match the send packet. So don't use +* it during active data transfers +* \param pvChannel Channel instance to exchange a packet +* \param ptSendPkt Send packet pointer +* \param ptRecvPkt Pointer to place received Packet in +* \param ulRecvBufferSize Length of the receive buffer +* \param ulTimeout Maximum time in ms to wait for an empty mailbox +* \param pvPktCallback Packet callback for unhandled receive packets +* \param pvUser User data for callback function +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_TransferPacket( void* pvChannel, CIFX_PACKET* ptSendPkt, CIFX_PACKET* ptRecvPkt, + uint32_t ulRecvBufferSize, uint32_t ulTimeout, + PFN_RECV_PKT_CALLBACK pvPktCallback, void* pvUser) +{ + int32_t lCount = 0; + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)pvChannel; + + if( (lRet = DEV_PutPacket(ptChannel, ptSendPkt, ulTimeout)) == CIFX_NO_ERROR) + { + do + { + if( (lRet = DEV_GetPacket(ptChannel, ptRecvPkt, ulRecvBufferSize, ulTimeout)) == CIFX_NO_ERROR) + { + /* Check if we got the answer */ + if( ((LE32_TO_HOST(ptRecvPkt->tHeader.ulCmd) & ~HIL_MSK_PACKET_ANSWER) == LE32_TO_HOST(ptSendPkt->tHeader.ulCmd)) && + (ptRecvPkt->tHeader.ulSrc == ptSendPkt->tHeader.ulSrc) && + (ptRecvPkt->tHeader.ulId == ptSendPkt->tHeader.ulId) && + (ptRecvPkt->tHeader.ulSrcId == ptSendPkt->tHeader.ulSrcId) ) + { + /* We got the answer message */ + /* lRet = ptRecvPkt->tHeader.ulState; */ /* Do not deliver back this information */ + break; + } else + { + /* This is not our packet, check if the user wants it */ + if( NULL != pvPktCallback) + { + pvPktCallback(ptRecvPkt, pvUser); + } + } + /* Reset error, in case we might drop out of the loop, with no proper answer, + returning a "good" state */ + lRet = CIFX_DEV_GET_TIMEOUT; + lCount++; + } else + { + /* Error during packet receive */ + break; + } + } while ( lCount < 10); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Waits for a given handshake bit state on the channel (polling mode) +* \param ptChannel Channel instance to wait for bitstate +* \param ulBitNumber BitNumber to wait for (Bitnumber is used for +* indexing the event array in IRQ mode) +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +static int DEV_WaitForBitState_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulBitNumber, uint8_t bState, uint32_t ulTimeout) +{ + uint8_t bActualState; + int iRet = 0; + uint32_t ulBitMask = 1 << ulBitNumber; + int32_t lStartTime = 0; + + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + if( (HIL_FLAGS_CLEAR == bState) || + (HIL_FLAGS_SET == bState) ) + { + bActualState = (ptChannel->usNetxFlags & ulBitMask)? HIL_FLAGS_SET : HIL_FLAGS_CLEAR; + + } else + { + if((ptChannel->usHostFlags ^ ptChannel->usNetxFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + } + + /* The desired state is already there, so just return true */ + if(bActualState == bState) + return 1; + + /* If no timeout is given, don't try to wait for the Bit change */ + if(0 == ulTimeout) + return 0; + + lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* Poll for desired bit state */ + while(bActualState != bState) + { + uint32_t ulDiffTime = 0L; + + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + if( (HIL_FLAGS_CLEAR == bState) || + (HIL_FLAGS_SET == bState) ) + { + bActualState = (ptChannel->usNetxFlags & ulBitMask)? HIL_FLAGS_SET : HIL_FLAGS_CLEAR; + + } else + { + if((ptChannel->usHostFlags ^ ptChannel->usNetxFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + } + + if(bActualState == bState) + { + iRet = 1; + break; + } + + /* Check for timeout */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + if ( ulDiffTime > ulTimeout) + { + break; + } + + OS_Sleep(0); + } + + return iRet; +} + +/*****************************************************************************/ +/*! Waits for a given handshake bit state on the channel (irq mode) +* \param ptChannel Channel instance to wait for bitstate +* \param ulBitNumber BitNumber to wait for (Bitnumber is used for +* indexing the event array in IRQ mode) +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +static int DEV_WaitForBitState_Irq(PCHANNELINSTANCE ptChannel, uint32_t ulBitNumber, uint8_t bState, uint32_t ulTimeout) +{ + uint8_t bActualState; + int iRet = 0; + uint32_t ulBitMask = 1 << ulBitNumber; + int32_t lStartTime = 0; + uint32_t ulInternalTimeout = ulTimeout; + + if( (HIL_FLAGS_CLEAR == bState) || + (HIL_FLAGS_SET == bState) ) + { + bActualState = (ptChannel->usNetxFlags & ulBitMask)? HIL_FLAGS_SET : HIL_FLAGS_CLEAR; + + } else + { + if((ptChannel->usHostFlags ^ ptChannel->usNetxFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + } + + /* The desired state is already there, so just return true */ + if(bActualState == bState) + return 1; + + /* If no timeout is given, don't try to wait for the Bit change */ + if(0 == ulTimeout) + return 0; + + /* Just wait for the Interrupt event to be signalled. This bit was toggled if the interrupt + is executed, so we don't need to check bit state afterwards + Note: Wait first time with timeout 0 and check if the state is the expected one. + If not it was a previously set event and we need to wait with the user supplied time out */ + + lStartTime = (int32_t)OS_GetMilliSecCounter(); + + do + { + uint32_t ulCurrentTime; + uint32_t ulDiffTime; + + /* Wait for DSR to signal Handshake bit change event */ + (void)OS_WaitEvent(ptChannel->ahHandshakeBitEvents[ulBitNumber], ulInternalTimeout); + + ulCurrentTime = OS_GetMilliSecCounter(); + ulDiffTime = ulCurrentTime - lStartTime; + + /* Adjust timeout for next run */ + ulInternalTimeout = ulTimeout - ulDiffTime; + + /* Check bit state */ + if( (HIL_FLAGS_CLEAR == bState) || + (HIL_FLAGS_SET == bState) ) + { + bActualState = (ptChannel->usNetxFlags & ulBitMask)? HIL_FLAGS_SET : HIL_FLAGS_CLEAR; + + } else + { + if((ptChannel->usHostFlags ^ ptChannel->usNetxFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + } + + if(bActualState == bState) + { + iRet = 1; + break; + } + + if( ulDiffTime >= ulTimeout) + { + /* Timeout expired */ + break; + } + + } while(iRet == 0); + + return iRet; +} + +/*****************************************************************************/ +/*! Waits for a given handshake bit state on the channel +* (IRQ/Polling Wrapper function) +* \param ptChannel Channel instance to wait for bitstate +* \param ulBitNumber BitNumber to wait for (Bitnumber is used for +* indexing the event array in IRQ mode) +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +int DEV_WaitForBitState(PCHANNELINSTANCE ptChannel, uint32_t ulBitNumber, uint8_t bState, uint32_t ulTimeout) +{ + if( ((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + return DEV_WaitForBitState_Irq(ptChannel, ulBitNumber, bState, ulTimeout); + else + return DEV_WaitForBitState_Poll(ptChannel, ulBitNumber, bState, ulTimeout); +} + +/*****************************************************************************/ +/*! Get expected handshake bit state from IOArea +* \param ptChannel Channel instance +* \param ptIOInstance Pointer to IOInstance +* \param fOutput !=0 for output areas +* \return Expected handshake bit state */ +/*****************************************************************************/ +uint8_t DEV_GetIOBitstate(PCHANNELINSTANCE ptChannel, PIOINSTANCE ptIOInstance, int fOutput) +{ + uint8_t bRet = ptIOInstance->bHandshakeBitState; + uint8_t* pbIOHskMode = NULL; + + if(fOutput) + pbIOHskMode = &ptChannel->ptCommonStatusBlock->bPDOutHskMode; + else + pbIOHskMode = &ptChannel->ptCommonStatusBlock->bPDInHskMode; + + switch(HWIF_READ8(ptChannel->pvDeviceInstance, *pbIOHskMode)) + { + case HIL_IO_MODE_BUFF_DEV_CTRL: + bRet = HIL_FLAGS_NOT_EQUAL; + break; + + case HIL_IO_MODE_UNCONTROLLED: + bRet = HIL_FLAGS_NONE; + break; + + case HIL_IO_MODE_BUFF_HST_CTRL: + bRet = HIL_FLAGS_EQUAL; + break; + + case HIL_IO_MODE_DEFAULT: + default: + /* Use data from channel information read on startup, + as I/O Mode is not provided in DPM */ + break; + } + + return bRet; +} + +/*****************************************************************************/ +/*! Toggles the given command handshake bit +* \param ptChannel Channel instance to change for bit for +* \param ulBitMask Bitmask to eXOR into command bits */ +/*****************************************************************************/ +void DEV_ToggleBit(PCHANNELINSTANCE ptChannel, uint32_t ulBitMask) +{ + ptChannel->usHostFlags ^= (uint16_t)ulBitMask; + + if( ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT) + { + HWIF_WRITE8(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t8Bit.bHostFlags, (uint8_t)ptChannel->usHostFlags); + } else + { + /* Write 16 Bit handshake */ + HWIF_WRITE16(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t16Bit.usHostFlags, HOST_TO_LE16(ptChannel->usHostFlags)); + } +} + +/*****************************************************************************/ +/*! Waits for Sync state on the channel (polling mode) +* \param ptChannel Channel instance to wait for bitstate +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +static int DEV_WaitForSyncState_Poll(PCHANNELINSTANCE ptChannel, uint8_t bState, uint32_t ulTimeout) +{ + uint8_t bActualState; + int iRet = 0; + uint32_t ulBitMask = 1 << ptChannel->ulChannelNumber; + int32_t lStartTime = 0; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + DEV_ReadHandshakeFlags(ptChannel, 1, 1); + + if((ptDevInst->tSyncData.usHSyncFlags ^ ptDevInst->tSyncData.usNSyncFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + /* The desired state is already there, so just return true */ + if(bActualState == bState) + return 1; + + /* If no timeout is given, don't try to wait for the Bit change */ + if(0 == ulTimeout) + return 0; + + lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* Poll for desired bit state */ + while(bActualState != bState) + { + uint32_t ulDiffTime = 0L; + + DEV_ReadHandshakeFlags(ptChannel, 1, 1); + + if((ptDevInst->tSyncData.usHSyncFlags ^ ptDevInst->tSyncData.usNSyncFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + if(bActualState == bState) + { + iRet = 1; + break; + } + + /* Check for timeout */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + if ( ulDiffTime > ulTimeout) + { + break; + } + + OS_Sleep(0); + } + + return iRet; +} + +/*****************************************************************************/ +/*! Waits for sync state on the channel (irq mode) +* \param ptChannel Channel instance to wait for bitstate +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +static int DEV_WaitForSyncState_Irq(PCHANNELINSTANCE ptChannel, uint8_t bState, uint32_t ulTimeout) +{ + uint8_t bActualState; + int iRet = 0; + uint32_t ulBitMask = 1 << ptChannel->ulChannelNumber; + int32_t lStartTime = 0; + uint32_t ulInternalTimeout = ulTimeout; + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + if((ptDevInstance->tSyncData.usHSyncFlags ^ ptDevInstance->tSyncData.usNSyncFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + /* The desired state is already there, so just return true */ + if(bActualState == bState) + return 1; + + /* If no timeout is given, don't try to wait for the Bit change */ + if(0 == ulTimeout) + return 0; + + /* Just wait for the Interrupt event to be signalled. This bit was toggled if the interrupt + is executed, so we don't need to check bit state afterwards.*/ + + lStartTime = (int32_t)OS_GetMilliSecCounter(); + + do + { + uint32_t ulCurrentTime; + uint32_t ulDiffTime; + + /* Wait for DSR to signal Handshake bit change event */ + (void)OS_WaitEvent(ptDevInstance->tSyncData.ahSyncBitEvents[ptChannel->ulChannelNumber], ulInternalTimeout); + + ulCurrentTime = OS_GetMilliSecCounter(); + ulDiffTime = ulCurrentTime - lStartTime; + + /* Adjust timeout for next run */ + ulInternalTimeout = ulTimeout - ulDiffTime; + + /* Check bit state */ + if((ptDevInstance->tSyncData.usHSyncFlags ^ ptDevInstance->tSyncData.usNSyncFlags) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + if(bActualState == bState) + { + iRet = 1; + break; + } + + if( ulDiffTime >= ulTimeout) + { + /* Timeout expired */ + break; + } + + } while(iRet == 0); + + return iRet; +} + +/*****************************************************************************/ +/*! Waits for sync state +* (IRQ/Polling Wrapper function) +* \param ptChannel Channel instance to wait for bitstate +* \param bState State the handshake bit should be in after returning +* from this function +* \param ulTimeout Maximum time in ms to wait for the desired bit state +* \return 0 on error/timeout, 1 on success */ +/*****************************************************************************/ +int DEV_WaitForSyncState(PCHANNELINSTANCE ptChannel, uint8_t bState, uint32_t ulTimeout) +{ + if( ((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + return DEV_WaitForSyncState_Irq(ptChannel, bState, ulTimeout); + else + return DEV_WaitForSyncState_Poll(ptChannel, bState, ulTimeout); +} + +/*****************************************************************************/ +/*! Toggles the given sync bit +* \param ptDevInstance Device instance +* \param ulBitMask Bitmask to eXOR into command bits */ +/*****************************************************************************/ +void DEV_ToggleSyncBit(PDEVICEINSTANCE ptDevInstance, uint32_t ulBitMask) +{ + /* Write 16 Bit handshake */ + HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)ptDevInstance->pbHandshakeBlock; + + OS_EnterLock(ptDevInstance->tSyncData.pvLock); + + ptDevInstance->tSyncData.usHSyncFlags ^= (uint16_t)ulBitMask; + HWIF_WRITE16(ptDevInstance, ptHandshakeBlock->atHsk[1].t16Bit.usHostFlags, HOST_TO_LE16(ptDevInstance->tSyncData.usHSyncFlags)); + + OS_LeaveLock(ptDevInstance->tSyncData.pvLock); +} + +/*****************************************************************************/ +/*! Reads the actual state of the host handshake bits for the given channel +* \param ptChannel Channel instance to change for bit for +* \param fReadHostCOS !=0 if Application COS should be read */ +/*****************************************************************************/ +void DEV_ReadHostFlags(PCHANNELINSTANCE ptChannel, int fReadHostCOS) +{ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + if(ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT) + ptChannel->usHostFlags = HWIF_READ8(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t8Bit.bHostFlags); + else + ptChannel->usHostFlags = LE16_TO_HOST(HWIF_READ16(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t16Bit.usHostFlags)); + + /* Also read host sync flags, as they might not be set to zero on flash based devices */ + if( (ptDevInstance->pbHandshakeBlock != NULL) && + (ptChannel->fIsSysDevice) ) + { + HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)ptDevInstance->pbHandshakeBlock; + ptDevInstance->tSyncData.usHSyncFlags = LE16_TO_HOST(HWIF_READ16(ptChannel->pvDeviceInstance, ptHandshakeBlock->atHsk[1].t16Bit.usHostFlags)); + } + + if(NULL != ptChannel->ptCommonStatusBlock) + ptChannel->ulDeviceCOSFlags = LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)); + + if( fReadHostCOS) + { + if(NULL != ptChannel->ptControlBlock) + { + ptChannel->ulHostCOSFlags = LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptControlBlock->ulApplicationCOS)); + ptChannel->ulHostCOSFlagsSaved = ptChannel->ulHostCOSFlags; + } + } +} + +/*****************************************************************************/ +/*! Reads the actual state of the handshake bits for the given channel +* \param ptChannel Channel instance to change for bit for +* \param fReadSyncFlags !=0 if sync flags should be updated +* \param fLockNeeded !=0 if flag access lock is needed. */ +/*****************************************************************************/ +void DEV_ReadHandshakeFlags(PCHANNELINSTANCE ptChannel, int fReadSyncFlags, int fLockNeeded) +{ + uint16_t usCOSAckBitMask = 0; + uint32_t ulNewCOSFlags = 0; + + /* Read sync flags */ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + /* Lock Handshake Cell and COS flag accesses */ + if(fLockNeeded) + OS_EnterLock(ptChannel->pvLock); + + if( (ptDevInstance->pbHandshakeBlock != NULL) && + fReadSyncFlags ) + { + HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)ptDevInstance->pbHandshakeBlock; + ptDevInstance->tSyncData.usNSyncFlags = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptHandshakeBlock->atHsk[1].t16Bit.usNetxFlags)); + } + + if(ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT) + { + /* Read 8 Bit handshake */ + ptChannel->usNetxFlags = HWIF_READ8(ptDevInstance, ptChannel->ptHandshakeCell->t8Bit.bNetxFlags); + } else + { + /* Read 16 Bit handshake */ + ptChannel->usNetxFlags = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptChannel->ptHandshakeCell->t16Bit.usNetxFlags)); + } + + /* Read device COS command state two times */ + if(ptChannel->fIsSysDevice) + { + /* This is the system device */ + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptChannel->pbDPMChannelStart; + if ((ptChannel->usNetxFlags ^ ptChannel->usHostFlags) & NSF_NETX_COS_CMD) + { + ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemCOS)); /* Read actual COS flags */ + usCOSAckBitMask = HSF_NETX_COS_ACK; + } + } else if(NULL != ptChannel->ptCommonStatusBlock) + { + /* This is a communication channel */ + if ((ptChannel->usNetxFlags ^ ptChannel->usHostFlags) & NCF_NETX_COS_CMD) + { + ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)); /* Read actual COS flags */ + usCOSAckBitMask = HCF_NETX_COS_ACK; + } + } + + if (usCOSAckBitMask) + { + /* Read the flags and acknowledge */ + if(ptChannel->ulDeviceCOSFlags != ulNewCOSFlags) + { + ptChannel->ulDeviceCOSFlagsChanged = ptChannel->ulDeviceCOSFlags ^ ulNewCOSFlags; + ptChannel->ulDeviceCOSFlags = ulNewCOSFlags; + } + + DEV_ToggleBit(ptChannel, usCOSAckBitMask); + } + + /* Unlock Handshake Cell and COS flag accesses */ + if(fLockNeeded) + OS_LeaveLock(ptChannel->pvLock); +} + +/*****************************************************************************/ +/*! Wait for NOT READY in poll mode +* \param ptChannel Channel instance to check +* \param ulTimeout Wait time +* \return 1 if channel is NOT ready */ +/*****************************************************************************/ +int DEV_WaitForNotReady_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout) +{ + /* Poll for Ready bit */ + int iActualState = 0; + uint32_t ulDiffTime = 0L; + int32_t lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* We do nothing without a timeout */ + if( ulTimeout == 0) + return iActualState; + + /* Check which READY to use */ + if(ptChannel->fIsSysDevice) + { + /* This is the system channel which will reset the whole card */ + do + { + /* Check if firmware is READY because we need the DPM Layout */ + DEVICEINSTANCE* ptDevInstance = (DEVICEINSTANCE*)ptChannel->pvDeviceInstance; + + if( (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue)) == CIFX_DPM_INVALID_CONTENT) || + (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue)) == CIFX_DPM_NO_MEMORY_ASSIGNED) || + (0 == (HWIF_READ8(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->t8Bit.bNetxFlags) & NSF_READY)) ) + { + /* Card is not ready anymore */ + iActualState = 1; + break; + } + /* Check time */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + OS_Sleep(0); + + } while (ulDiffTime < ulTimeout); + + } else + { + /* This is a communication channel which is restarted */ + do + { + if( (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) == CIFX_DPM_INVALID_CONTENT) || + (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) == CIFX_DPM_NO_MEMORY_ASSIGNED) || + (!DEV_IsReady(ptChannel)) ) + { + /* Channel is not READY anymore */ + iActualState = 1; + break; + } + + /* Check time */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + /* Wait until firmware is down */ + OS_Sleep(1); + + } while (ulDiffTime < ulTimeout); + } + + return iActualState; +} + +/*****************************************************************************/ +/*! Wait for READY in poll mode +* \param ptChannel Channel instance to check +* \param ulTimeout Wait time +* \return 1 if channel is ready */ +/*****************************************************************************/ +int DEV_WaitForReady_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout) +{ + /* Poll for Ready bit */ + int iActualState = 0; + uint32_t ulDiffTime = 0L; + int32_t lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* We do nothing without a timeout */ + if( ulTimeout == 0) + return iActualState; + + /* Check which READY to use */ + if(ptChannel->fIsSysDevice) + { + /* This is the system channel of the whole card */ + /* Wait until firmware is running */ + OS_Sleep( 10); + + do + { + DEVICEINSTANCE* ptDevInstance = (DEVICEINSTANCE*)ptChannel->pvDeviceInstance; + char szCookie[5] = {0}; + + /* Read the DPM cookie */ + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + + /* We need to check for a valid cookie */ + if ( (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_BSL_STR)) || + (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_FW_STR)) ) + { + /* Check if firmware is READY because we need the DPM Layout */ + if( (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue)) != CIFX_DPM_INVALID_CONTENT) && + (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue)) != CIFX_DPM_NO_MEMORY_ASSIGNED) ) + { + /* Check if firmware is READY because we need the DPM Layout */ + if(HWIF_READ8(ptChannel->pvDeviceInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->t8Bit.bNetxFlags) & NSF_READY) + { + DEV_ReadHostFlags(&ptDevInstance->tSystemDevice, 0); + + iActualState = 1; + break; + } + } + } + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + /* Wait until firmware is running */ + OS_Sleep(1); + + } while ( ulDiffTime < ulTimeout); + } else + { + /* This is a communication channel which is restarted */ + /* Check if this is a real channel (not for bootloader */ + if( ptChannel->fIsChannel) + { + do + { + /* Wait until the channel is running */ + OS_Sleep( 1); + + /* Wait for READY */ + if( DEV_IsReady(ptChannel)) + { + DEV_ReadHostFlags(ptChannel, 0); + iActualState = 1; + break; + } + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + } while ( ulDiffTime < ulTimeout); + } + } + + return iActualState; +} + +/*****************************************************************************/ +/*! Wait for NOT RUNNING in poll mode +* \param ptChannel Channel instance to check +* \param ulTimeout Wait time +* \return 1 if channel is NOT running */ +/*****************************************************************************/ +int DEV_WaitForNotRunning_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout) +{ + /* Poll for Ready bit */ + int iActualState = 1; + uint32_t ulDiffTime = 0L; + int32_t lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* We not processing a system channel */ + if(ptChannel->fIsSysDevice) + return iActualState; + + /* Check user timeout */ + if( 0 == ulTimeout) + { + if( DEV_IsRunning(ptChannel)) + iActualState = 0; + } else + { + /* User wants to wait */ + while(DEV_IsRunning(ptChannel)) + { + /* Check for timeout */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + if(ulDiffTime > ulTimeout) + { + iActualState = 0; + break; + } + + OS_Sleep(1); + } + } + + return iActualState; +} + +/*****************************************************************************/ +/*! Wait for RUNNING in poll mode +* \param ptChannel Channel instance to check +* \param ulTimeout Wait time +* \return 1 if channel is RUNNING */ +/*****************************************************************************/ +int DEV_WaitForRunning_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout) +{ + /* Poll for Ready bit */ + int iActualState = 1; + uint32_t ulDiffTime = 0L; + int32_t lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* We not processing a system channel, so always return a valid state */ + if(ptChannel->fIsSysDevice) + return iActualState; + + /* Check user timeout */ + if( 0 == ulTimeout) + { + /* Just return the actual state */ + iActualState = DEV_IsRunning(ptChannel); + } else + { + /* User wants to wait */ + while(!DEV_IsRunning(ptChannel)) + { + /* Check for timeout */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + if(ulDiffTime > ulTimeout) + { + iActualState = 0; + break; + } + + OS_Sleep(1); + } + } + + return iActualState; +} + +/*****************************************************************************/ +/*! Writes the saved state of the handshake bits to the given channel +* \param ptChannel Channel instance to write bits to */ +/*****************************************************************************/ +void DEV_WriteHandshakeFlags(PCHANNELINSTANCE ptChannel) +{ + if(ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT) + { + /* Read 8 Bit handshake */ + HWIF_WRITE8(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t8Bit.bHostFlags, (uint8_t)ptChannel->usHostFlags); + } else + { + /* Read 16 Bit handshake */ + HWIF_WRITE16(ptChannel->pvDeviceInstance, ptChannel->ptHandshakeCell->t16Bit.usHostFlags, HOST_TO_LE16(ptChannel->usHostFlags)); + } +} + +/*****************************************************************************/ +/*! Checks if the channel is ready +* \param ptChannel Channel instance to check +* \return 1 if channel is ready */ +/*****************************************************************************/ +int DEV_IsReady(PCHANNELINSTANCE ptChannel) +{ + int iRet = 0; + + /* Handshake flags are read on interrupt, so no need to read them here */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + if(ptChannel->fIsSysDevice) + { + if(ptChannel->usNetxFlags & NSF_READY) + { + iRet = 1; + } + } else + { + if(ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_READY) + { + iRet = 1; + } + } + + return iRet; +} + +/*****************************************************************************/ +/*! Checks if the channel is running +* \param ptChannel Channel instance to check +* \return 1 if channel is ready and running */ +/*****************************************************************************/ +int DEV_IsRunning(PCHANNELINSTANCE ptChannel) +{ + int iRet = 0; + + /* Handshake flags are read on interrupt, so no need to read them here */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + /* only a Communication channel can be running */ + if(!ptChannel->fIsSysDevice) + { + if( (ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_READY) && + (ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_RUN) ) + { + iRet = 1; + } + } + + return iRet; +} + +/*****************************************************************************/ +/*! Checks if the channel is communicating +* \param ptChannel Channel instance to check +* \param plError CIFX_NO_ERROR on successful read +* \return 1 if channel is communicating */ +/*****************************************************************************/ +int DEV_IsCommunicating(PCHANNELINSTANCE ptChannel, int32_t* plError) +{ + int iRet = 0; + + /* Only communication channels are allowed */ + if( ptChannel->fIsSysDevice) + { + *plError = CIFX_INVALID_HANDLE; + + /* Handshake flags are read during DEV_IsReady() */ + }else if( !DEV_IsReady(ptChannel)) + { + *plError = CIFX_DEV_NOT_READY; + + } else if( !(ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_RUN)) + { + *plError = CIFX_DEV_NOT_RUNNING; + + } else if ( ptChannel->usNetxFlags & NCF_COMMUNICATING) + { + iRet = 1; + *plError = CIFX_NO_ERROR; + } else + { + *plError = CIFX_DEV_NO_COM_FLAG; + } + + return iRet; +} + +/*****************************************************************************/ +/*! Returns the actual state of the device mailbox +* \param ptChannel Channel instance to check +* \param pulRecvPktCnt Number of pending packets to receive +* \param pulSendPktCnt Number of packets that can be sent to the device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_GetMBXState(PCHANNELINSTANCE ptChannel, uint32_t* pulRecvPktCnt, uint32_t* pulSendPktCnt) +{ + int32_t lRet = CIFX_NO_ERROR; + + /* Is Device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if mailbox is available */ + } else if(ptChannel->tRecvMbx.ulRecvMailboxLength == 0) + { + lRet = CIFX_FUNCTION_NOT_AVAILABLE; + + /* Check if device is READY */ + } else if(!DEV_IsReady(ptChannel)) + { + lRet = CIFX_DEV_NOT_READY; + } else + { + /* Get receive MBX state */ + *pulRecvPktCnt = LE16_TO_HOST(HWIF_READ16(ptChannel->pvDeviceInstance, ptChannel->tRecvMbx.ptRecvMailboxStart->usWaitingPackages)); + + /* Get send MBX state */ + *pulSendPktCnt = LE16_TO_HOST(HWIF_READ16(ptChannel->pvDeviceInstance, ptChannel->tSendMbx.ptSendMailboxStart->usPackagesAccepted)); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Triggers/Disables the cifX application Watchdog +* \param ptChannel Channel instance to trigger watchdog on +* \param ulTriggerCmd CIFX_WATCHDOG_START to start/trigger watchdog, +* CIFX_WATCHDOG_STOP to stop watchdog +* \param pulTriggerValue Last watchdog trigger value +* (informational use only) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_TriggerWatchdog(PCHANNELINSTANCE ptChannel, uint32_t ulTriggerCmd, uint32_t* pulTriggerValue) +{ + int32_t lRet = CIFX_DEV_NOT_RUNNING; + + if( (NULL == ptChannel) || + (NULL == pulTriggerValue) ) + return CIFX_INVALID_POINTER; + + /* Is Device installed and active */ + if(ptChannel->ulOpenCount == 0) + { + /* Init error occurred */ + lRet = CIFX_DRV_CHANNEL_NOT_INITIALIZED; + + /* Check if device is running */ + } else if(DEV_IsRunning(ptChannel)) + { + lRet = CIFX_NO_ERROR; + + /* Process command */ + if(ulTriggerCmd == CIFX_WATCHDOG_START) + { + /* Copy host value to device value */ + *pulTriggerValue = LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulHostWatchdog)); + HWIF_WRITE32(ptChannel->pvDeviceInstance, ptChannel->ptControlBlock->ulDeviceWatchdog, HOST_TO_LE32(*pulTriggerValue)); + + } else if(ulTriggerCmd == CIFX_WATCHDOG_STOP) + { + /* Stop watchdog function */ + HWIF_WRITE32(ptChannel->pvDeviceInstance, ptChannel->ptControlBlock->ulDeviceWatchdog, 0); + *pulTriggerValue = 0; + + } else + { + /* Unknown command */ + lRet = CIFX_INVALID_COMMAND; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Handle the application BUS state COS flag +* \param ptChannel Channel instance +* \param ulCmd new state to set (CIFX_BUS_STATE_ON / CIFX_BUS_STATE_OFF) +* \param pulState Buffer to store actual state +* \param ulTimeout timeout to wait for communication to start/stop +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_BusState(PCHANNELINSTANCE ptChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + + if( NULL == pulState) return CIFX_INVALID_POINTER; + + /* Read actual BUS state */ + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_BUS_ON) ? CIFX_BUS_STATE_ON : CIFX_BUS_STATE_OFF; + + switch (ulCmd) + { + case CIFX_BUS_STATE_ON: + { + /* Check if the BUS is already ON */ + (void)DEV_IsCommunicating(ptChannel, &lRet); /* lRet evaluated */ + + if( !*pulState && + (CIFX_DEV_NO_COM_FLAG == lRet) ) + { + /* BUS is OFF */ + int32_t lTemp = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_BUS_ON | HIL_APP_COS_BUS_ON_ENABLE, /* set mask */ + 0, /* clear mask */ + HIL_APP_COS_BUS_ON_ENABLE, /* post clear mask */ + CIFX_DEV_BUS_STATE_ON_TIMEOUT, + ulTimeout); + /* Only update return value, if handshaking did not succeed, so + we can wait for COM_BIT below */ + if(lTemp != CIFX_NO_ERROR) + lRet = lTemp; + } + + if(ulTimeout && (CIFX_DEV_NO_COM_FLAG == lRet)) + { + /* Wait for Bus is active if user want it */ + if (DEV_WaitForBitState( ptChannel, NCF_COMMUNICATING_BIT_NO, HIL_FLAGS_SET, ulTimeout)) + { + lRet = CIFX_NO_ERROR; + } else + { + /* Return Error */ + lRet = CIFX_DEV_NO_COM_FLAG; + } + + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_BUS_ON) ? + CIFX_BUS_STATE_ON : CIFX_BUS_STATE_OFF; + } + } + break; + + case CIFX_BUS_STATE_OFF: + { + int fWaitCommFlag = 1; + + /* Check if the BUS is off */ + if(!DEV_IsReady(ptChannel)) + { + lRet = CIFX_DEV_NOT_READY; + fWaitCommFlag = 0; + + } else if(*pulState || DEV_IsCommunicating(ptChannel, &lRet)) + { + /* BUS is ON */ + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_BUS_ON_ENABLE, /* set mask */ + HIL_APP_COS_BUS_ON, /* clear mask */ + HIL_APP_COS_BUS_ON_ENABLE, /* post clear mask */ + CIFX_DEV_BUS_STATE_OFF_TIMEOUT, + ulTimeout); + + + if(CIFX_DEV_FUNCTION_FAILED == lRet) + { + fWaitCommFlag = 0; + } + } + + /* Check if user wants to wait for the BUS state */ + if(ulTimeout && fWaitCommFlag) + { + /* Wait until BUS is OFF */ + if(DEV_WaitForBitState(ptChannel, NCF_COMMUNICATING_BIT_NO, HIL_FLAGS_CLEAR, ulTimeout)) + { + /* Set actual state */ + lRet = CIFX_NO_ERROR; + } else + { + /* Return error */ + lRet = CIFX_DEV_BUS_STATE_OFF_TIMEOUT; + } + + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_BUS_ON) ? + CIFX_BUS_STATE_ON : CIFX_BUS_STATE_OFF; + } + } + break; + + case CIFX_BUS_STATE_GETSTATE: + { + /* Update the COS flags */ + if (0 == DEV_IsRunning(ptChannel)) + lRet = CIFX_DEV_NOT_RUNNING; + } + break; + + default: + /* Unknown command */ + lRet = CIFX_INVALID_COMMAND; + break; + + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read the application COS flag state +* \param ptChannel Channel instance +* \param pulState returned host state (CIFX_HOST_STATE_READY / +* CIFX_HOST_STATE_NOT_READY) +* \return CIFX_NO_ERROR on success, or CIFX_DEV_NOT_READY */ +/*****************************************************************************/ +int32_t DEV_GetHostState(PCHANNELINSTANCE ptChannel, uint32_t* pulState) +{ + /* Don't return any state if card is not ready */ + if(!DEV_IsReady(ptChannel)) + return CIFX_DEV_NOT_READY; + + *pulState = (ptChannel->ulHostCOSFlags & HIL_APP_COS_APPLICATION_READY)? CIFX_HOST_STATE_READY : CIFX_HOST_STATE_NOT_READY; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Set the application ready COS flag +* \param ptChannel Channel instance +* \param ulNewState new state to set (CIFX_HOST_STATE_READY / +* CIFX_HOST_STATE_NOT_READY) +* \param ulTimeout timeout to wait for communication to start/stop +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_SetHostState(PCHANNELINSTANCE ptChannel, uint32_t ulNewState, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + + UNREFERENCED_PARAMETER(ulTimeout); /* prevent compiler warnings */ + + /* Don't set host state if card is not configured */ + if(!DEV_IsReady(ptChannel)) + return CIFX_DEV_NOT_READY; + + switch(ulNewState) + { + case CIFX_HOST_STATE_NOT_READY: + + /* Check user timeout */ + if( 0 == ulTimeout) + { + /* Just set the state */ + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Clear the application ready flag */ + ptChannel->ulHostCOSFlags &= ~HIL_APP_COS_APPLICATION_READY; + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } else + { + lRet = DEV_DoHostCOSChange(ptChannel, + 0, /* set mask */ + HIL_APP_COS_APPLICATION_READY, /* clear mask */ + 0, /* post clear mask */ + CIFX_DEV_HOST_STATE_CLEAR_TIMEOUT, + ulTimeout); + } + break; + + case CIFX_HOST_STATE_READY: + /* Check user timeout */ + if( 0 == ulTimeout) + { + /* Just set the state */ + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Clear the application ready flag */ + ptChannel->ulHostCOSFlags |= HIL_APP_COS_APPLICATION_READY; + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } else + { + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_APPLICATION_READY, /* set mask */ + 0, /* clear mask */ + 0, /* post clear mask */ + CIFX_DEV_HOST_STATE_SET_TIMEOUT, + ulTimeout); + } + break; + + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read/Write Block +* \param ptChannel Channel Instance +* \param pvBlock Pointer to the block to copy +* \param ulOffset Start offset to copy from/to +* \param ulBlockLen Total Length of the Block +* \param pvDest Source/Destination buffer +* \param ulDestLen Length of the Source/Destination Buffer +* \param ulCmd CIFX_CMD_READ_DATA/CIFX_CMD_WRITE_DATA +* \param fWriteAllowed !=0 if Write is allowed to the Block +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_ReadWriteBlock(PCHANNELINSTANCE ptChannel, void* pvBlock, uint32_t ulOffset, uint32_t ulBlockLen, void* pvDest, uint32_t ulDestLen, uint32_t ulCmd, int fWriteAllowed) +{ + int32_t lRet = CIFX_NO_ERROR; + + if( (ulOffset + ulDestLen) > ulBlockLen) + return CIFX_INVALID_ACCESS_SIZE; /* Size too long */ + + /* Process the state block area command */ + switch (ulCmd) + { + case CIFX_CMD_WRITE_DATA: + if(fWriteAllowed) + { + /* Write control block */ + HWIF_WRITEN( ptChannel->pvDeviceInstance, + ((uint8_t*)pvBlock) + ulOffset, + (uint8_t *)pvDest, + ulDestLen); + } else + { + lRet = CIFX_INVALID_COMMAND; + } + break; + + case CIFX_CMD_READ_DATA: + /* It is allowed to read the control block back */ + HWIF_READN( ptChannel->pvDeviceInstance, + (uint8_t *)pvDest, + ((uint8_t*)pvBlock) + ulOffset, + ulDestLen); + break; + + default: + /* Unknown command */ + lRet = CIFX_INVALID_COMMAND; + break; + } /* end switch */ + + /* Always deliver back system errors */ + if( (CIFX_NO_ERROR == lRet) && + !DEV_IsRunning(ptChannel) ) + lRet = CIFX_DEV_NOT_RUNNING; + + return lRet; +} + +/*****************************************************************************/ +/*! Returns the state of the given handshake bit/mask +* \param ptChannel Channel instance +* \param ulBitMsk Bitmask to check for +* \return HIL_FLAGS_EQUAL/HIL_FLAGS_NOT_EQUAL */ +/*****************************************************************************/ +uint8_t DEV_GetHandshakeBitState(PCHANNELINSTANCE ptChannel, uint32_t ulBitMsk) +{ + uint8_t bRet = HIL_FLAGS_EQUAL; + + /* Handshake flags are read on interrupt, so no need to read them here */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + if((ptChannel->usHostFlags ^ ptChannel->usNetxFlags) & ulBitMsk) + bRet = HIL_FLAGS_NOT_EQUAL; + + return bRet; +} + +/*****************************************************************************/ +/*! Check the COS flags on this device +* \param ptDevInstance Device instance */ +/*****************************************************************************/ +void DEV_CheckCOSFlags(PDEVICEINSTANCE ptDevInstance) +{ + /* Note: We assume, we only get here in polling mode */ + uint32_t ulChannel; + + if(!OS_WaitMutex(ptDevInstance->tSystemDevice.pvInitMutex, 0)) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "DEV_CheckCOSFlags(): Skipping COS Flag handling. Device is in system reset!"); + } + } else + { + /* Evaluate COS bits on Communication channels */ + for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ulChannel++) + { + PCHANNELINSTANCE ptChannel = ptDevInstance->pptCommChannels[ulChannel]; + uint32_t ulCOSChanged = 0; + + /* Check if we have an valid channel (not for the bootloader) */ + if( (0 == ptChannel->ptControlBlock) || + (0 == ptChannel->ptCommonStatusBlock) ) + return; + + if(!OS_WaitMutex(ptChannel->pvInitMutex, 0)) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "DEV_CheckCOSFlags(): Skipping Channel #%d, which is currently initializing!", + ulChannel); + } + + } else + { + /*------------------------------------------*/ + /* Process our own COS flags */ + /*------------------------------------------*/ + if( ptChannel->ulHostCOSFlags != LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->ptControlBlock->ulApplicationCOS))) + { + /* We have to update our COS flags */ + /* Check if we can signal a new COS state */ + if( DEV_WaitForBitState(ptChannel, HCF_HOST_COS_CMD_BIT_NO, HIL_FLAGS_EQUAL, 0)) + { + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Update flags */ + HWIF_WRITE32(ptDevInstance, ptChannel->ptControlBlock->ulApplicationCOS, HOST_TO_LE32(ptChannel->ulHostCOSFlags)); + ptChannel->ulHostCOSFlagsSaved = ptChannel->ulHostCOSFlags; + + /* Signal new COS flags */ + DEV_ToggleBit(ptChannel, HCF_HOST_COS_CMD); + + /* Remove all enable flags from the local COS flags */ + ptChannel->ulHostCOSFlags &= ~(HIL_APP_COS_BUS_ON_ENABLE | HIL_APP_COS_INITIALIZATION_ENABLE | HIL_APP_COS_LOCK_CONFIGURATION_ENABLE); + + OS_LeaveLock(ptChannel->pvLock); + } + } + /*------------------------------------------*/ + /* Process now Hardware COS flags */ + /*------------------------------------------*/ + /* Handshake flags are read on interrupt, so no need to read them here */ + if(!((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance))->fIrqEnabled) + DEV_ReadHandshakeFlags(ptChannel, 0, 1); + + /* Get the changed COS flags bitmask */ + ulCOSChanged = ptChannel->ulDeviceCOSFlagsChanged; + + if(ulCOSChanged != 0) + { + + /* TODO: Signal change event */ + } + + #if 0 + if(ulCOSChanged & HIL_COMM_COS_RESTART_REQUIRED) + { + /* Firmware requests a restart */ + + } + + if(ulCOSChanged & HIL_COMM_COS_CONFIG_AVAIL) + { + /* Configuration changed state */ + + } + + if(ulCOSChanged & HIL_COMM_COS_CONFIG_LOCKED) + { + /* Configuration locked */ + + } + #endif + + /* We've processed all pending COS flags on this channel */ + ptChannel->ulDeviceCOSFlagsChanged &= ~ulCOSChanged; + + OS_ReleaseMutex(ptChannel->pvInitMutex); + } + } + OS_ReleaseMutex(ptDevInstance->tSystemDevice.pvInitMutex); + } +} + +/*****************************************************************************/ +/*! Performs a channel initialization +* \param ptChannel Channel instance +* \param ulTimeout Timeout to wait for channel to become READY +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DoChannelInit(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + int fRunning = DEV_IsRunning(ptChannel); + + if(!OS_WaitMutex(ptChannel->pvInitMutex, CIFX_TO_WAIT_COS_CMD)) + { + /* This should only happen, if the DEV_CheckCOSFlags function is still busy checking + for COS changed on this channel */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInst, + TRACE_LEVEL_ERROR, + "DEV_DoChannelInit(): Error getting Mutex. Access to device COS flags is locked!"); + } + + lRet = CIFX_DRV_CMD_ACTIVE; + + } else + { + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_INITIALIZATION | HIL_APP_COS_INITIALIZATION_ENABLE, /* set mask */ + 0, /* clear mask */ + HIL_APP_COS_INITIALIZATION_ENABLE, /* post clear mask */ + CIFX_DEV_FUNCTION_FAILED, + CIFX_TO_WAIT_COS_CMD); + + /* Signal Initialisation */ + if(CIFX_NO_ERROR == lRet) + { + /* The card has recognized the initialisation, so we can wait until the card has processed it*/ + /* Card was running before, so wait for running flag to vanish */ + if(fRunning) + { + /* Check if the Firmware has removed it's running flag, + or if it's set now, and it was changed during last COS */ + if( (0 == (ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_RUN)) || + ( (ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_RUN) && + (ptChannel->ulDeviceCOSFlagsChanged & HIL_COMM_COS_RUN) ) ) + { + /* FW already removed it's RUN Flag during Channel Init command sequence. No need to + wait for running flag to vanish */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInst, + TRACE_LEVEL_DEBUG, + "DEV_DoChannelInit(): Firmware removed HIL_COMM_COS_RUN early! Skipping wait for NotRunning-State"); + } + + } else if( !DEV_WaitForNotRunning_Poll( ptChannel, CIFX_TO_WAIT_HW_RESET_ACTIVE)) + { + lRet = CIFX_DEV_RESET_TIMEOUT; + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInst, + TRACE_LEVEL_ERROR, + "DEV_DoChannelInit(): Error waiting for channel to leave running state!"); + } + } + } + + /* Card is in restart */ + if(CIFX_NO_ERROR == lRet) + { + /* Check if user wants to wait until the card is READY again */ + /* now wait for the channel and it must be at least READY */ + uint32_t ulTempTimeout = ( CIFX_TO_WAIT_HW > ulTimeout) ? ulTimeout : CIFX_TO_WAIT_HW; + if( DEV_WaitForNotReady_Poll( ptChannel, ulTempTimeout) ) + { + /* Firmware started after warm start process */ + if( 0 != ulTimeout) + { + /* now wait for the channel and it must be at least READY */ + if( !DEV_WaitForReady_Poll( ptChannel, ulTimeout) ) + { + lRet = CIFX_DEV_NOT_READY; + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) + { + USER_Trace((PDEVICEINSTANCE)(ptChannel->pvDeviceInstance), + TRACE_LEVEL_WARNING, + "DEV_DoChannelInit(): Channel did not enter READY state during timeout!"); + } + } + } + } + } + } + + OS_ReleaseMutex(ptChannel->pvInitMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Mark device to be in reset state and clear device internal structure for +* reset preparation +* \param ptDevInstance Device instance */ +/*****************************************************************************/ +static void DEV_Reset_Prepare(PDEVICEINSTANCE ptDevInstance) +{ + uint32_t ulIdx = 0; + + /* Reset is now active and DSR will ignore all incoming interrupts from now on */ + ptDevInstance->fResetActive = 1; + + /* Zero out all internal flags */ + OS_EnterLock(ptDevInstance->tSystemDevice.pvLock); + ptDevInstance->tSystemDevice.usHostFlags = 0; + ptDevInstance->tSystemDevice.usNetxFlags = 0; + OS_LeaveLock(ptDevInstance->tSystemDevice.pvLock); + + for ( ulIdx = 0; ulIdx < ptDevInstance->ulCommChannelCount; ulIdx++) + { + OS_EnterLock(ptDevInstance->pptCommChannels[ulIdx]->pvLock); + ptDevInstance->pptCommChannels[ulIdx]->usHostFlags = 0; + ptDevInstance->pptCommChannels[ulIdx]->usNetxFlags = 0; + ptDevInstance->pptCommChannels[ulIdx]->ulDeviceCOSFlags = 0; + ptDevInstance->pptCommChannels[ulIdx]->ulHostCOSFlags = 0; + OS_LeaveLock(ptDevInstance->pptCommChannels[ulIdx]->pvLock); + } +} + +/*****************************************************************************/ +/*! After reset, re-read the device flags to continue communication +* \param ptDevInstance Device instance */ +/*****************************************************************************/ +static void DEV_Reset_Finish(PDEVICEINSTANCE ptDevInstance) +{ + uint32_t ulIdx = 0; + + /* Reset not active anymore */ + ptDevInstance->fResetActive = 0; + + /* Reset is finished, so we can now update our internal states */ + if(ptDevInstance->fIrqEnabled) + { + (void)cifXTKitISRHandler(ptDevInstance,1); + cifXTKitDSRHandler(ptDevInstance); + + } else + { + /* Re-Read all handshake flags, as they will have reset */ + OS_EnterLock(ptDevInstance->tSystemDevice.pvLock); + DEV_ReadHostFlags( &ptDevInstance->tSystemDevice, 0); + DEV_ReadHandshakeFlags(&ptDevInstance->tSystemDevice, 1, 0); + OS_LeaveLock(ptDevInstance->tSystemDevice.pvLock); + + for ( ulIdx = 0; ulIdx < ptDevInstance->ulCommChannelCount; ulIdx++) + { + OS_EnterLock(ptDevInstance->pptCommChannels[ulIdx]->pvLock); + DEV_ReadHostFlags( ptDevInstance->pptCommChannels[ulIdx], 1); + DEV_ReadHandshakeFlags(ptDevInstance->pptCommChannels[ulIdx], 0, 0); + OS_LeaveLock(ptDevInstance->pptCommChannels[ulIdx]->pvLock); + } + } + +} + +/*****************************************************************************/ +/*! Setup device reset and wait until firmware removes READY bit +* \param ptDevInstance Device instance +* \param bHostFlagsChange Host Flags to be set in SystemChannel +* \param fWaitOnDevice Wait on device state if != 0 +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t DEV_Reset_Execute(PDEVICEINSTANCE ptDevInstance, uint8_t bHostFlagsChange, uint8_t fWaitOnDevice) +{ + PCHANNELINSTANCE ptSysDevice = &ptDevInstance->tSystemDevice; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + int32_t lRet = CIFX_NO_ERROR; + uint8_t bHostFlags = HWIF_READ8(ptDevInstance, ptSysDevice->ptHandshakeCell->t8Bit.bHostFlags); + + /* Lock flag access */ + OS_EnterLock(ptSysDevice->pvLock); + + /* Insert the reset cookie */ + HWIF_WRITE32(ptDevInstance, ptSysChannel->tSystemControl.ulSystemCommandCOS, HOST_TO_LE32(HIL_SYS_RESET_COOKIE)); + + /* Activate the Reset */ + HWIF_WRITE8(ptDevInstance, ptSysDevice->ptHandshakeCell->t8Bit.bHostFlags, (bHostFlags | bHostFlagsChange)); + + /* Leave flag access */ + OS_LeaveLock(ptSysDevice->pvLock); + + if( fWaitOnDevice) + { + /* Wait until card has recognized the reset */ + if( !DEV_WaitForNotReady_Poll( ptSysDevice, CIFX_TO_WAIT_HW_RESET_ACTIVE)) + lRet = CIFX_DEV_RESET_TIMEOUT; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Performs a system restart on a device and waits for card to get ready again +* \param ptChannel Channel instance (ALWAYS the system channel) +* \param ulTimeout Timeout to wait for device to become ready +* \param ulParam Reset parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DoSystemStart(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam ) +{ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + PCHANNELINSTANCE ptSysDevice = &ptDevInstance->tSystemDevice; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + uint32_t ulSystemStatus = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemStatus)); + int32_t lRet = CIFX_NO_ERROR; + + /* Card was running before, so wait for running flag to vanish */ + if(!DEV_IsReady(ptSysDevice)) + return CIFX_DEV_NOT_READY; + + if(!OS_WaitMutex(ptDevInstance->tSystemDevice.pvInitMutex, CIFX_TO_WAIT_COS_CMD)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemStart(): Error locking access to device!"); + } + + lRet = CIFX_DRV_INIT_STATE_ERROR; + }else + { + /* Set SystemControl value in the DPM to signal RESET "ONLY SYSTEM CHANNEL" */ + /* this is a coldstart and does not use any parameters */ + uint32_t ulSystemControl = HIL_SYS_CONTROL_RESET_MODE_COLDSTART | (ulParam & HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK); + HWIF_WRITE32(ptDevInstance, ptSysChannel->tSystemControl.ulSystemControl, HOST_TO_LE32((ulSystemControl))); + + if ( HIL_SYS_STATUS_IDPM == (HIL_SYS_STATUS_IDPM & ulSystemStatus) && + HIL_SYS_STATUS_APP == (HIL_SYS_STATUS_APP & ulSystemStatus) ) + { + /* If we're running with an enabled IDPM and APP CPU, no reset + * will be executed. We just signal the reset state to the COM CPU by using the HSF_RESET flag */ + + /* Activate the Reset */ + /* ATTENTION: Do not wait on the device, because the reset will be handled by the COM-CPU, */ + /* and tehrefore the APP CPU has to remove its MCP_CPU_ID_APP0 bit (see netX MCP register). */ + lRet = DEV_Reset_Execute(ptDevInstance, HSF_RESET, 0 ); + + } else + { + /* Prepare reset */ + DEV_Reset_Prepare(ptDevInstance); + + /* Perform the Reset */ + lRet = DEV_Reset_Execute(ptDevInstance, HSF_RESET, 1); + + if((CIFX_NO_ERROR != lRet) && (g_ulTraceLevel & TRACE_LEVEL_ERROR)) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemStart(): Error waiting for device to leave READY state!"); + } + + /* Now wait for the card to come back */ + if(CIFX_NO_ERROR == lRet) + { + /* Prohibit access to possibly uninitialized PCI memory during reset of netX4000 based PCI devices. + Timeout of 1s was communicated to be the upper boundary. */ + if( (ptDevInstance->fPCICard) && + (( eCHIP_TYPE_NETX4000 == ptDevInstance->eChipType) || + ( eCHIP_TYPE_NETX4100 == ptDevInstance->eChipType) ) ) + OS_Sleep(1000); + + /* now wait for card to become READY */ + if( !DEV_WaitForReady_Poll( ptSysDevice, ( 0 == ulTimeout) ? CIFX_TO_WAIT_HW : ulTimeout) ) + { + lRet = CIFX_DEV_NOT_READY; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemStart(): Error waiting for device to become ready!"); + } + } + + /* Re-read device handshake flags */ + DEV_Reset_Finish(ptDevInstance); + } + + /* it is not possible to distinguish between success and failure since do not know the correct state after reset */ + /* so write meaningful dpm content into log file, to let the user verify current system state */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + char szCookie[5]; + + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + /* split messages for better readability */ + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, "DEV_DoSystemStart(): (system status after reset)"); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -DPM-Cookie : '%02X','%02X','%02X','%02X'", + szCookie[0], + szCookie[1], + szCookie[2], + szCookie[3]); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -System Status : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemStatus)) ); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -System Error : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemError)) ); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -Boot Error : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulBootError)) ); + } + } + + OS_ReleaseMutex(ptDevInstance->tSystemDevice.pvInitMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Performs a system bootstart on a device and wait for card to get ready again +* \param ptChannel Channel instance (ALWAYS the system channel) +* \param ulTimeout Timeout to wait for device to become ready +* \param ulParam Reset parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DoSystemBootstart(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam) +{ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + PCHANNELINSTANCE ptSysDevice = &ptDevInstance->tSystemDevice; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + uint32_t ulSystemStatus = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemStatus)); + int32_t lRet = CIFX_NO_ERROR; + + /* Card was running before, so wait for running flag to vanish */ + if(!DEV_IsReady(ptSysDevice)) + return CIFX_DEV_NOT_READY; + + if(!OS_WaitMutex(ptDevInstance->tSystemDevice.pvInitMutex, CIFX_TO_WAIT_COS_CMD)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemBootstart(): Error locking access to device!"); + } + + lRet = CIFX_DRV_INIT_STATE_ERROR; + } else + { + /* Signal BOOTSTART RESET "ONLY SYSTEM CHANNEL" */ + /* Write the reset mode to DPM */ + uint32_t ulSystemControl = HIL_SYS_CONTROL_RESET_MODE_BOOTSTART | (ulParam & HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK); + HWIF_WRITE32(ptDevInstance, ptSysChannel->tSystemControl.ulSystemControl, HOST_TO_LE32((ulSystemControl))); + + if ( HIL_SYS_STATUS_IDPM == (HIL_SYS_STATUS_IDPM & ulSystemStatus) && + HIL_SYS_STATUS_APP == (HIL_SYS_STATUS_APP & ulSystemStatus) ) + { + /* If we're running with an enabled IDPM and APP CPU, no reset + * will be executed. We just signal the reset state to the COM CPU by using the HSF_RESET flag */ + + /* Activate the Reset (including BOOTSTART bit) */ + /* ATTENTION: Do not wait on the device, because the reset will be handled by the COM-CPU, */ + /* and tehrefore the APP CPU has to remove its MCP_CPU_ID_APP0 bit (see netX MCP register). */ + lRet = DEV_Reset_Execute(ptDevInstance, (uint8_t)(HSF_RESET | HSF_BOOTSTART), 0); + + } else + { + /* Prepare reset */ + DEV_Reset_Prepare(ptDevInstance); + + /* Perform the Reset (including BOOTSTART bit) */ + lRet = DEV_Reset_Execute(ptDevInstance, (uint8_t)(HSF_RESET | HSF_BOOTSTART), 1); + + if((CIFX_NO_ERROR != lRet) && (g_ulTraceLevel & TRACE_LEVEL_ERROR)) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemBootstart(): Error waiting for device to leave READY state!"); + } + + /* Now wait for the card to come back */ + if(CIFX_NO_ERROR == lRet) + { + /* Prohibit access to possibly uninitialized PCI memory during reset of netX4000 based PCI devices. + Timeout of 1s was communicated to be the upper boundary. */ + if( (ptDevInstance->fPCICard) && + (( eCHIP_TYPE_NETX4000 == ptDevInstance->eChipType) || + ( eCHIP_TYPE_NETX4100 == ptDevInstance->eChipType) ) ) + OS_Sleep(1000); + + /* now wait for card to become READY */ + if( !DEV_WaitForReady_Poll( ptSysDevice, ( 0 == ulTimeout) ? CIFX_TO_WAIT_HW : ulTimeout) ) + { + lRet = CIFX_DEV_NOT_READY; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemBootstart(): Error waiting for device to become ready!"); + } + } else + { + /* Check if the Bootloader is running */ + char szCookie[5] = {0}; + + /* Read the DPM cookie */ + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + + /* on DPM cards we need to check the for a valid cookie */ + if (0 != OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_BSL_STR)) + { + /* Failed to set the device into boot mode */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoSystemBootstart(): Error setting card into boot mode!"); + } + + lRet = CIFX_DEV_FUNCTION_FAILED; + } + } + + /* Re-read device handshake flags */ + DEV_Reset_Finish(ptDevInstance); + } + } + OS_ReleaseMutex(ptDevInstance->tSystemDevice.pvInitMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Performs update start on a device and waits for card to get ready again +* \param ptChannel Channel instance (ALWAYS the system channel) +* \param ulTimeout Timeout to wait for device to become ready +* \param ulParam Reset parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DoUpdateStart(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam) +{ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + PCHANNELINSTANCE ptSysDevice = &ptDevInstance->tSystemDevice; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptSysDevice->pbDPMChannelStart; + uint32_t ulSystemStatus = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemStatus)); + int32_t lRet = CIFX_NO_ERROR; + + /* Card was running before, so wait for running flag to vanish */ + if(!DEV_IsReady(ptSysDevice)) + return CIFX_DEV_NOT_READY; + + if(!OS_WaitMutex(ptDevInstance->tSystemDevice.pvInitMutex, CIFX_TO_WAIT_COS_CMD)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error locking access to device!"); + } + + lRet = CIFX_DRV_INIT_STATE_ERROR; + }else + { + /* Signal UPDATESTART RESET "ONLY SYSTEM CHANNEL" */ + /* Write the reset mode to DPM */ + uint32_t ulSystemControl = HIL_SYS_CONTROL_RESET_MODE_UPDATESTART | (ulParam & HIL_SYS_CONTROL_RESET_PARAM_FLAG_MASK); + HWIF_WRITE32(ptDevInstance, ptSysChannel->tSystemControl.ulSystemControl, HOST_TO_LE32((ulSystemControl))); + + if ( HIL_SYS_STATUS_IDPM == (HIL_SYS_STATUS_IDPM & ulSystemStatus) && + HIL_SYS_STATUS_APP == (HIL_SYS_STATUS_APP & ulSystemStatus) ) + { + /* If we're running with an enabled IDPM and APP CPU, no reset + * will be executed. We just signal the reset state to the COM CPU by using the HSF_RESET flag */ + + /* Activate the Reset */ + /* ATTENTION: Do not wait on the device, because the reset will be handled by the COM-CPU, */ + /* and tehrefore the APP CPU has to remove its MCP_CPU_ID_APP0 bit (see netX MCP register). */ + lRet = DEV_Reset_Execute(ptDevInstance, HSF_RESET, 0); + + } else + { + char szCookie[5] = {0}; + + /* Prepare reset */ + DEV_Reset_Prepare(ptDevInstance); + + /* Perform the Reset */ + lRet = DEV_Reset_Execute(ptDevInstance, HSF_RESET, 1); + + if(((CIFX_NO_ERROR != lRet)) && (g_ulTraceLevel & TRACE_LEVEL_ERROR)) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error waiting for device to leave READY state!"); + } + + /* Now wait for the card to come back */ + if(CIFX_NO_ERROR == lRet) + { + /* Prohibit access to possibly uninitialized PCI memory during reset of netX4000 based PCI devices. + Timeout of 1s was communicated to be the upper boundary. */ + if( (ptDevInstance->fPCICard) && + (( eCHIP_TYPE_NETX4000 == ptDevInstance->eChipType) || + ( eCHIP_TYPE_NETX4100 == ptDevInstance->eChipType) ) ) + OS_Sleep(1000); + + /* now wait for card to become READY */ + if( !DEV_WaitForReady_Poll( ptSysDevice, CIFX_TO_WAIT_HW ) ) + { + lRet = CIFX_DEV_NOT_READY; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error waiting for device to become ready!"); + } + } else + { + /* Check if MFW is running */ + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + + if (0 != OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_BSL_STR)) + { + /* Failed to set the device into boot mode */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error setting card into update mode!"); + } + + lRet = CIFX_DEV_FUNCTION_FAILED; + }else + { + /* This is an updatestart, expected one additional reset to be performed by MFW */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "DEV_DoUpdateStart(): Waiting for update being applied."); + } + + /* Wait until card has recognized the reset back to firmware */ + if( !DEV_WaitForNotReady_Poll( ptSysDevice, ( 0 == ulTimeout) ? CIFX_TO_FIRMWARE_UPDATE : ulTimeout)) + { + lRet = CIFX_DEV_RESET_TIMEOUT; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error waiting for device to leave READY state during update!"); + } + /* 2nd reset not triggered in time. Possible causes: + - timeout too short + - hardware doesn't support updatestart */ + } + + /* Only continue if update timeout was sufficient */ + if(CIFX_NO_ERROR == lRet) + { + /* Prohibit access to possibly uninitialized PCI memory during reset of netX4000 based PCI devices. + Timeout of 1s was communicated to be the upper boundary. */ + if( (ptDevInstance->fPCICard) && + (( eCHIP_TYPE_NETX4000 == ptDevInstance->eChipType) || + ( eCHIP_TYPE_NETX4100 == ptDevInstance->eChipType) ) ) + OS_Sleep(1000); + + /* now wait for card to become READY again */ + if( !DEV_WaitForReady_Poll( ptSysDevice, CIFX_TO_FIRMWARE_START) ) + { + lRet = CIFX_DEV_NOT_READY; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DEV_DoUpdateStart(): Error waiting for device to become ready!"); + } + } + } + } + } + + /* Re-read device handshake flags */ + DEV_Reset_Finish(ptDevInstance); + } + + /* Log the current DPM state */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + /* split messages for better readability */ + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, "DEV_DoUpdateStart(): (system status after reset)"); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -DPM-Cookie : '%02X','%02X','%02X','%02X'", + szCookie[0], + szCookie[1], + szCookie[2], + szCookie[3]); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -System Status : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemStatus)) ); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -System Error : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulSystemError)) ); + USER_Trace(ptDevInstance, TRACE_LEVEL_DEBUG, " -Boot Error : 0x%X", + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemState.ulBootError)) ); + } + } + + OS_ReleaseMutex(ptDevInstance->tSystemDevice.pvInitMutex); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Do a handshake for the ulApplicationCOS bits in DPM. This function will +* wait for access to ulApplicationCOS (via HSF_HOST_COS_CMD), toggle bits and +* wait for firmware to acknowledge COS. After handshaking is completed this +* function will clear bits in internal HostCOS flags defined in PostClearCOSMask +* \param ptChannel Channel instance +* \param ulSetCOSMask Host COS Bits to set +* \param ulClearCOSMask Host COS Bits to clear +* \param ulPostClearCOSMask Host COS Bits to clear after handshaking has completed +* \param lSignallingError Error to return if signalling was not acknowledged +* \param ulTimeout Timeout to wait handshake complete +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DoHostCOSChange(PCHANNELINSTANCE ptChannel, + uint32_t ulSetCOSMask, uint32_t ulClearCOSMask, + uint32_t ulPostClearCOSMask, int32_t lSignallingError, + uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + + /* Check if we are able to send a COS command */ + if( !DEV_WaitForBitState( ptChannel, HCF_HOST_COS_CMD_BIT_NO, HIL_FLAGS_EQUAL, ulTimeout)) + { + /* Wait for access to COS bits failed */ + + if(0 == ulTimeout) + { + /* User did not want to wait, so remember his flags, and update them with + next COS handshake. PostClearMask will be cleared by DSR or DEV_CheckCOSFlags() */ + OS_EnterLock(ptChannel->pvLock); + + ptChannel->ulHostCOSFlags |= ulSetCOSMask; + ptChannel->ulHostCOSFlags &= ~ulClearCOSMask; + + OS_LeaveLock(ptChannel->pvLock); + + lRet = CIFX_NO_ERROR; + + } else + { + lRet = CIFX_DEV_FUNCTION_FAILED; + } + + } else + { + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + ptChannel->ulHostCOSFlags |= ulSetCOSMask; + ptChannel->ulHostCOSFlags &= ~ulClearCOSMask; + + HWIF_WRITE32(ptChannel->pvDeviceInstance, ptChannel->ptControlBlock->ulApplicationCOS, HOST_TO_LE32(ptChannel->ulHostCOSFlags)); + ptChannel->ulHostCOSFlagsSaved = ptChannel->ulHostCOSFlags; + + DEV_ToggleBit(ptChannel, HCF_HOST_COS_CMD); + + /* Reset the enable bit in the local flags */ + ptChannel->ulHostCOSFlags &= ~ulPostClearCOSMask; + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + + /* Wait until card has acknowledged the COS flag */ + if( !DEV_WaitForBitState( ptChannel, HCF_HOST_COS_CMD_BIT_NO, HIL_FLAGS_EQUAL, ulTimeout)) + { + /* Wait for acknowledge from FW to COS handshake failed */ + if(0 == ulTimeout) + { + /* User did not want to wait, so tell him everything is OK */ + lRet = CIFX_NO_ERROR; + } else + { + lRet = lSignallingError; + } + } else + { + lRet = CIFX_NO_ERROR; + } + } + + return lRet; +} + + +#ifdef CIFX_TOOLKIT_DMA +/*****************************************************************************/ +/*! Setup DMA buffers +* \param ptChannel Channel instance +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_SetupDMABuffers( PCHANNELINSTANCE ptChannel) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulChannelNumber = 0; + uint32_t ulDMAChIdx = 0; + uint32_t ulBaseBuffer = 0; + NETX_DMA_CHANNEL_CONFIG* pDMACtrl_1 = NULL; + NETX_DMA_CHANNEL_CONFIG* pDMACtrl_2 = NULL; + CIFX_DMABUFFER_T* ptDMABuffer_1 = NULL; + CIFX_DMABUFFER_T* ptDMABuffer_2 = NULL; + + /* + netX Buffer Layout + ---------------------------------- 0 + | MemBaseBuffer | + | used for (Host-->netX) | + |----------------------------------| BufferSize + | MemBaseBuffer + BufferSize | + | used for (netX-->Host) | + ---------------------------------- BufferSize * 2 + + DMA channel layout: + n = Communication channel number + DMACh n = Input data + DMACh n+1 = Output data + */ + + /* Get the device instance from the channel instance */ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + /* Get the DMA control registers */ + ulChannelNumber = ptChannel->ulChannelNumber ; + ulDMAChIdx = ulChannelNumber * 2; /* 2 DMA channels per communication channel */ + + /* Get the corresponding netX DMA control register */ + pDMACtrl_1 = &ptDevInstance->ptGlobalRegisters->atDmaCtrl[ulDMAChIdx + eDMA_INPUT_BUFFER_IDX]; /* Input channel */ + pDMACtrl_2 = &ptDevInstance->ptGlobalRegisters->atDmaCtrl[ulDMAChIdx + eDMA_OUTPUT_BUFFER_IDX];/* Output channel */ + + /* Get the user created DMA buffers */ + ptDMABuffer_1 = &ptDevInstance->atDmaBuffers[ulDMAChIdx + eDMA_INPUT_BUFFER_IDX]; /* Input buffer */ + ptDMABuffer_2 = &ptDevInstance->atDmaBuffers[ulDMAChIdx + eDMA_OUTPUT_BUFFER_IDX]; /* Output buffer */ + + /*------------------------------------*/ + /* Setup INPUT DMA channel and buffer */ + /*------------------------------------*/ + /* Insert the physical buffer address */ + /* Channel N is used as direction netX->Host, so we need to substract "BufferSize" from the pointer to get the DMA at proper location */ + /* Switch to ONE buffer operation!!!!! */ + ulBaseBuffer = ptDMABuffer_1->ulPhysicalAddress - ptDMABuffer_1->ulSize; + pDMACtrl_1->aulMemBaseBuffer[0] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_1->aulMemBaseBuffer[1] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_1->aulMemBaseBuffer[2] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_1->ulBufCtrl = HOST_TO_LE32((ptDMABuffer_1->ulSize / 256) << 24); /* Setup buffer size */ + + + /*-------------------------------------*/ + /* Setup OUTPUT DMA channel and buffer */ + /*-------------------------------------*/ + /* Insert the physical buffer address */ + /* Channel N+1 is used as direction Host->netX so we can use the given pointer to get the DMA buffer*/ + /* Switch to ONE buffer operation!!!!! */ + ulBaseBuffer = ptDMABuffer_2->ulPhysicalAddress; + pDMACtrl_2->aulMemBaseBuffer[0] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_2->aulMemBaseBuffer[1] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_2->aulMemBaseBuffer[2] = HOST_TO_LE32(ulBaseBuffer); + pDMACtrl_2->ulBufCtrl = HOST_TO_LE32((ptDMABuffer_2->ulSize / 256) << 24); /* Setup buffer size */ + + return lRet; +} + +/*****************************************************************************/ +/*! Handle the application DMA state COS flag +* \param ptChannel Channel instance +* \param ulCmd new state to set (CIFX_DMA_STATE_ON / CIFX_DMA_STATE_OFF) +* \param pulState Buffer to store actual state +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t DEV_DMAState(PCHANNELINSTANCE ptChannel, uint32_t ulCmd, uint32_t* pulState) +{ + int32_t lRet = CIFX_NO_ERROR; + + if( NULL == pulState) + return CIFX_INVALID_POINTER; + + /* Check if device is READY */ + if(!DEV_IsReady(ptChannel)) + return CIFX_DEV_NOT_READY; + + /* Read actual DMA state */ + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_DMA) ? + CIFX_DMA_STATE_ON : CIFX_DMA_STATE_OFF; + + switch (ulCmd) + { + case CIFX_DMA_STATE_ON: + { + /* Check if the DMA is already ON */ + if(CIFX_DMA_STATE_ON != *pulState) + { + /* Setup DMA buffers always, to make sure HIL_COMM_COS_DMA state is handled correctly */ + (void)DEV_SetupDMABuffers(ptChannel); + + /* DMA is OFF, signal new DMA state */ + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_DMA | HIL_APP_COS_DMA_ENABLE, /* set mask */ + 0, /* clear mask */ + HIL_APP_COS_DMA_ENABLE, /* post clear mask */ + CIFX_DEV_DMA_STATE_ON_TIMEOUT, + CIFX_TO_WAIT_COS_ACK); /* Alwas wait for the card ACK */ + + /* Read actual state */ + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_DMA) ? + CIFX_DMA_STATE_ON : CIFX_DMA_STATE_OFF; + } + } + break; + + case CIFX_DMA_STATE_OFF: + { + /* Check if the DMA is already OFF */ + if(CIFX_DMA_STATE_OFF != *pulState) + { + /* DMA is ON, signal new DMA state */ + lRet = DEV_DoHostCOSChange(ptChannel, + HIL_APP_COS_DMA_ENABLE, /* set mask */ + HIL_APP_COS_DMA, /* clear mask */ + HIL_APP_COS_DMA_ENABLE, /* post clear mask */ + CIFX_DEV_DMA_STATE_OFF_TIMEOUT, + CIFX_TO_WAIT_COS_ACK); /* Alwas wait for the card ACK */ + + /* Read actual state */ + *pulState = (LE32_TO_HOST(HWIF_READ32(ptChannel->pvDeviceInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)) & HIL_COMM_COS_DMA) ? + CIFX_BUS_STATE_ON : CIFX_BUS_STATE_OFF; + } + } + break; + + case CIFX_DMA_STATE_GETSTATE: + break; + + default: + /* Unknown command */ + lRet = CIFX_INVALID_COMMAND; + break; + + } + + return lRet; +} + +/*****************************************************************************/ +/*! Get actual DMA input buffer +* !!!! This function will be needed if "Buffer switch" is supported !!! +* !!!! Currently we only using "One Buffer" operation in the Toolkit!!! +* \param ptChannel Channel instance +* \param ulDirection Direction value +* \return actual DMA buffer number */ +/*****************************************************************************/ +uint32_t GetActualDMABuffer( PCHANNELINSTANCE ptChannel, uint32_t ulDirection) +{ + uint32_t ulTemp = 0; + uint32_t ulDMAChIdx = (ptChannel->ulChannelNumber * 2) + ulDirection; /* This is the input buffer */ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)ptChannel->pvDeviceInstance; + + /* Setup pointer to global netX register block */ + NETX_DMA_CHANNEL_CONFIG* pDMACtrl = &ptDevInstance->ptGlobalRegisters->atDmaCtrl[ulDMAChIdx]; + + /* Acknowledge the buffer */ + pDMACtrl->ulBufCtrl |= HOST_TO_LE32((1 << 19)); + ulTemp = (LE32_TO_HOST(pDMACtrl->ulBufCtrl)) & (7 << 16); + + ulTemp = (ulTemp >> 17) & 0x00000003; + + return ulTemp; +} +#endif + +#ifdef CIFX_TOOLKIT_HWIF +/*****************************************************************************/ +/*! Wrapper function to read byte from DPM +* \param ptDev Device instance +* \param pvSrc DPM address to read from +* \return Byte read from DPM */ +/*****************************************************************************/ +uint8_t HwIfRead8(PDEVICEINSTANCE ptDev, void* pvSrc) +{ + uint8_t bData = 0; + (void)ptDev->pfnHwIfRead(1, ptDev, pvSrc, &bData, sizeof(bData)); + return bData; +} + +/*****************************************************************************/ +/*! Wrapper function to read word from DPM +* \param ptDev Device instance +* \param pvSrc DPM address to read from +* \return Word read from DPM */ +/*****************************************************************************/ +uint16_t HwIfRead16(PDEVICEINSTANCE ptDev, void* pvSrc) +{ + uint16_t usData = 0; + (void)ptDev->pfnHwIfRead(1, ptDev, pvSrc, &usData, sizeof(usData)); + return usData; +} + +/*****************************************************************************/ +/*! Wrapper function to read double word from DPM +* \param ptDev Device instance +* \param pvSrc DPM address to read from +* \return Double word read from DPM */ +/*****************************************************************************/ +uint32_t HwIfRead32(PDEVICEINSTANCE ptDev, void* pvSrc) +{ + uint32_t ulData = 0; + (void)ptDev->pfnHwIfRead(1, ptDev, pvSrc, &ulData, sizeof(ulData)); + return ulData; +} + +#endif /* CIFX_TOOLKIT_HWIF */ +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/Source/cifXHWFunctions.h b/libcifx/Toolkit/Source/cifXHWFunctions.h new file mode 100644 index 0000000..1926216 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXHWFunctions.h @@ -0,0 +1,616 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXHWFunctions.h 14802 2023-05-10 09:39:47Z RMayer $: + + Description: + cifX API Hardware handling functions declaration + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-26 DEV function definitions from cifXToolkit.h moved here + 2023-04-18 Added new option parameter for HWIF_READN / WRITEN function, to be able to + recognize single HWIF_READ16/WRITE32 and HWIF_READ32/WRITE32 accesses + 2022-06-14 Added new structure and option for cached IO handling + 2021-10-15 Added ulHostCOSFlagsSaved variable used in DSR handling + 2019-10-16 Parameters for reset functions changed, removed DEV_DoResetEx() function + 2019-10-14 Add separate function for update device + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Added chip type definitions for netX90/netX4000 (eCHIP_TYPE_NETX90 / eCHIP_TYPE_NETX4000) + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file * +* cifX API Hardware handling functions declaration */ +/*****************************************************************************/ + +#ifndef CIFX_HWFUNCTIONS__H +#define CIFX_HWFUNCTIONS__H + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include "OS_Dependent.h" +#include +#include "cifXUser.h" + +#include "Hil_DualPortMemory.h" +#include "Hil_FirmwareIdent.h" +#include "NetX_RegDefs.h" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_STRUCTURE Toolkit Structure Definitions +* \{ */ +/*****************************************************************************/ + +#define CIFX_TKIT_IRQ_OTHERDEVICE 0 /*!< cifXTKitISRHandler return, if the IRQ + is a shared PCI irq and was not from + the cifX device */ +#define CIFX_TKIT_IRQ_HANDLED 1 /*!< cifXTKitISRHandler return, if the IRQ + was handled directly inside ISR */ +#define CIFX_TKIT_IRQ_DSR_REQUESTED 2 /*!< cifXTKitISRHandler return, if the IRQ + requires deferred processing. The toolkit + then expects the DSRHandler to be called. */ + +typedef int32_t (*PFN_TRANSFER_PACKET) (void* pvChannel, CIFX_PACKET* ptSendPkt, CIFX_PACKET* ptRecvPkt, uint32_t ulRecvBufferSize, uint32_t ulTimeout, PFN_RECV_PKT_CALLBACK pfnPktCallback, void*); + +/*****************************************************************************/ +/*! Structure defining an User Block */ +/*****************************************************************************/ +typedef struct USERINSTANCEtag +{ + uint8_t* pbUserBlockStart; /*!< Pointer to user block start in DPM */ + uint32_t ulUserBlockLength; /*!< Length of user block */ + +} USERINSTANCE, *PUSERINSTANCE; + +/*****************************************************************************/ +/*! Structure defining an I/O Block */ +/*****************************************************************************/ +typedef struct IOINSTANCEtag +{ + uint8_t* pbDPMAreaStart; /*!< DPM Pointer to start of IO Instance */ + uint32_t ulDPMAreaLength; /*!< Length of IO Instance */ + uint8_t bHandshakeBit; /*!< Handshake bit associated with IO Instance */ + uint16_t usHandshakeMode; /*!< Handshake mode for this IO instance */ + uint8_t bHandshakeBitState; /*!< Handshake bit to wait for (depending on Handshake mode */ + void* pvMutex; /*!< Synchronisation object */ + uint32_t ulNotifyEvent; /*!< Event that is signalled via callback */ + PFN_NOTIFY_CALLBACK pfnCallback; /*!< Notification callback */ + void* pvUser; /*!< User pointer for callback */ + +} IOINSTANCE, *PIOINSTANCE; + +/*****************************************************************************/ +/*! Structure defining the send mailbox */ +/*****************************************************************************/ +typedef struct NETX_TX_MAILBOX_Ttag +{ + HIL_DPM_SEND_MAILBOX_BLOCK_T* ptSendMailboxStart; /*!< virtual start address of send mailbox */ + uint32_t ulSendMailboxLength; /*!< Length of send mailbox in bytes */ + uint32_t ulSendCMDBitmask; /*!< Bitmask for Handshakeflags to send packet */ + uint8_t bSendCMDBitoffset; /*!< Bitnumber for send packet flag (used for notification array indexing) */ + void* pvSendMBXMutex; /*!< Synchronisation object for the send mailbox */ + uint32_t ulSendPacketCnt; /*!< Number of packets sent on this mailbox */ + PFN_NOTIFY_CALLBACK pfnCallback; /*!< Notification callback */ + void* pvUser; /*!< User pointer for callback */ + +} NETX_TX_MAILBOX_T; + +/*****************************************************************************/ +/*! Structure defining the receive mailbox */ +/*****************************************************************************/ +typedef struct NETX_RX_MAILBOX_Ttag +{ + HIL_DPM_RECV_MAILBOX_BLOCK_T* ptRecvMailboxStart; /*!< virtual start address of receive mailbox */ + uint32_t ulRecvMailboxLength; /*!< Length of receive mailbox in bytes */ + uint32_t ulRecvACKBitmask; /*!< Bitmask for Handshakeflags to ack recv. packet */ + uint8_t bRecvACKBitoffset; /*!< Bitnumber for recv packet ack flag (used for notification array indexing) */ + void* pvRecvMBXMutex; /*!< Synchronisation object for the receive mailbox */ + uint32_t ulRecvPacketCnt; /*!< Number of packets received on this mailbox */ + PFN_NOTIFY_CALLBACK pfnCallback; /*!< Notification callback */ + void* pvUser; /*!< User pointer for callback */ + +} NETX_RX_MAILBOX_T; + +/*****************************************************************************/ +/*! Structure used for COM-state notification */ +/*****************************************************************************/ +typedef struct NETX_COM_STATE_Ttag +{ + PFN_NOTIFY_CALLBACK pfnCallback; /*!< Notification callback */ + void* pvUser; /*!< User pointer for callback */ +} NETX_COM_STATE_T; + +/*****************************************************************************/ +/*! Structure defining the sync data */ +/*****************************************************************************/ +typedef struct NETX_SYNC_DATA_Ttag +{ + PFN_NOTIFY_CALLBACK pfnCallback; /*!< Notification callback */ + void* pvUser; /*!< User pointer for callback */ +} NETX_SYNC_DATA_T; + +/*****************************************************************************/ +/*! Structure defining cached memory information */ +/*****************************************************************************/ +typedef struct CACHED_MEMORY_AREA_Ttag +{ + void* pvMemPtr; /*!< Memory pointer to cached area */ + unsigned long ulAreaSize; /*!< Size of the cached memory area in bytes */ +} CACHED_MEMORY_AREA_T; + +/*****************************************************************************/ +/*! Structure defining a channel instance */ +/*****************************************************************************/ +typedef struct CHANNELINSTANCEtag +{ + void* pvDeviceInstance; /*!< Pointer to the device instance belonging to this channel */ + + void* pvInitMutex; /*!< Device is currently initializing, e.g. while doing a reset */ + + uint8_t* pbDPMChannelStart; /*!< virtual start address of channel block */ + uint32_t ulDPMChannelLength; /*!< length of channel block */ + uint32_t ulChannelNumber; /*!< Number of the Channel */ + uint32_t ulBlockID; /*!< Block ID */ + + void* pvLock; /*!< Lock for synchronizing interrupt accesses to flags */ + uint32_t ulOpenCount; /*!< Number of open device function called for channel */ + + int fIsSysDevice; /*!< !=0 if the channel instance belong to a systemdevice */ + int fIsChannel; /*!< !=0 this is a real channel */ + + HIL_FW_IDENTIFICATION_T tFirmwareIdent; /*!< Firmware Identification */ + + /*----------------------------------------- + --- Mailbox specific data --- + -----------------------------------------*/ + NETX_TX_MAILBOX_T tSendMbx; /*!< Send mailbox administration structure */ + NETX_RX_MAILBOX_T tRecvMbx; /*!< Receive mailbox administration structure*/ + /*---------------------------------------*/ + + NETX_COM_STATE_T tComState; /*!< defining resources for com-state notification */ + + uint16_t usHostFlags; /*!< Copy of the last actual command flags */ + uint16_t usNetxFlags; /*!< Copy of the last read status flags */ + + uint32_t ulDeviceCOSFlags; /*!< Device COS flags (copy, updated when COS Handshake is recognized) */ + uint32_t ulDeviceCOSFlagsChanged; /*!< Bitmask of changed bits since last COS Handshake */ + uint32_t ulHostCOSFlags; /*!< Host COS flags (copy) */ + uint32_t ulHostCOSFlagsSaved; /*!< Actual written Host COS flags */ + + HIL_DPM_CONTROL_BLOCK_T* ptControlBlock; /*!< Pointer to channel's control block */ + uint8_t bControlBlockBit; /*!< Handshake bit associated with control block*/ + uint32_t ulControlBlockSize; /*!< Size of the control block in bytes */ + + HIL_DPM_COMMON_STATUS_BLOCK_T* ptCommonStatusBlock; /*!< Pointer to channel's common status block */ + uint8_t bCommonStatusBit; /*!< Handshake bit associated with Common status block*/ + uint32_t ulCommonStatusSize; /*!< Size of the common status block in bytes */ + + HIL_DPM_EXTENDED_STATUS_BLOCK_T* ptExtendedStatusBlock;/*!< Pointer to channel's extended status block */ + uint8_t bExtendedStatusBit; /*!< Handshake bit associated with Extended status block*/ + uint32_t ulExtendedStatusSize; /*!< Size of the extended status block in bytes */ + + HIL_DPM_HANDSHAKE_CELL_T* ptHandshakeCell; /*!< pointer to channels handshake cell */ + uint8_t bHandshakeWidth; /*!< Width of the handshake cell */ + + void* ahHandshakeBitEvents[HIL_DPM_HANDSHAKE_PAIRS]; /*!< Event handle for each handshake bit pair. (used in interrupt mode) */ + + PIOINSTANCE* pptIOInputAreas; /*!< Input Areas array for this channel */ + uint32_t ulIOInputAreas; /*!< Number of Input areas */ + + PIOINSTANCE* pptIOOutputAreas; /*!< Output Areas array for this channel */ + uint32_t ulIOOutputAreas; /*!< Number of Output areas */ + + PUSERINSTANCE* pptUserAreas; /*!< User areas for this channel */ + uint32_t ulUserAreas; /*!< Number of user areas */ + + NETX_SYNC_DATA_T tSynch; /*!< Sync handling */ + + CACHED_MEMORY_AREA_T tCachedIOInputArea; /*!< Information about cached IO input memory area */ + CACHED_MEMORY_AREA_T tCachedIOOutputArea; /*!< Information about cached IO input memory area */ + +} CHANNELINSTANCE, *PCHANNELINSTANCE; + +/*****************************************************************************/ +/*! Enumeration for different netX chip types */ +/*****************************************************************************/ +typedef enum CIFX_TOOLKIT_CHIPTYPE_Etag +{ + eCHIP_TYPE_UNKNOWN, /*!< Chip cannot be identified */ + eCHIP_TYPE_NETX500, /*!< netX500 */ + eCHIP_TYPE_NETX100, /*!< netX100, can currently only be detected when FW is already running */ + eCHIP_TYPE_NETX50, /*!< netX 50 */ + eCHIP_TYPE_NETX10, /*!< netX 10 */ + eCHIP_TYPE_NETX51, /*!< netX 51 */ + eCHIP_TYPE_NETX52, /*!< netX 52 */ + eCHIP_TYPE_NETX4000, /*!< netX 4000 */ + eCHIP_TYPE_NETX4100, /*!< netX 4100 */ + eCHIP_TYPE_NETX90 /*!< netX 90 */ + +} CIFX_TOOLKIT_CHIPTYPE_E; + +typedef enum CIFX_TOOLKIT_DEVICETYPE_Etag +{ + eCIFX_DEVICE_AUTODETECT = 0, /*!< Autodetection of device. Default: PCI = RAM and DPM = Flash + For DPM: If no 'netX' or 'BOOT' cookie is present RAM based + device will be used */ + eCIFX_DEVICE_AUTODETECT_ERROR, /*!< Unable to autodetect device type */ + eCIFX_DEVICE_RAM_BASED, /*!< Always perform a reset on startup and re-download all files */ + eCIFX_DEVICE_FLASH_BASED, /*!< Assume a running bootloader/FW from flash */ + eCIFX_DEVICE_DONT_TOUCH /*!< Leave the device in the current state and try to connect to it */ + +} CIFX_TOOLKIT_DEVICETYPE_E; + + +/*****************************************************************************/ +/*! Notification events that can be signalled during cifXTKitAddDevice */ +/*****************************************************************************/ +typedef enum CIFX_TOOLKIT_NOTIFY_Etag +{ + eCIFX_TOOLKIT_EVENT_PRERESET = 0, /*!< Event signalled, before device is reset (HW Reset) */ + eCIFX_TOOLKIT_EVENT_POSTRESET, /*!< Called after HW reset has been executed */ + eCIFX_TOOLKIT_EVENT_PRE_BOOTLOADER, /*!< Called before bootloader is downloaded */ + eCIFX_TOOLKIT_EVENT_POST_BOOTLOADER /*!< Called after bootloader was downloaded and started */ + +} CIFX_TOOLKIT_NOTIFY_E; + +typedef void(*PFN_CIFXTK_NOTIFY)(void* pvDeviceInstance, CIFX_TOOLKIT_NOTIFY_E eEvent); + +typedef struct IRQ_TO_DSR_BUFFER_Ttag +{ + HIL_DPM_HANDSHAKE_ARRAY_T tHandshakeBuffer; + int fValid; + +} IRQ_TO_DSR_BUFFER_T; + +/*****************************************************************************/ +/*! Definition for cached IO buffer access */ +/*****************************************************************************/ +typedef enum CIFX_TOOLKIT_CACHED_MODE_Etag +{ + eCACHED_MODE_OFF = 0, /*!< Map IO buffer pointers in default uncached mode */ + eCACHED_MODE_ON /*!< Map IO buffer pointers in cached mode */ +} CIFX_TOOLKIT_CACHED_MODE_E; + +/*****************************************************************************/ +/*! DMA buffer structure. +* In DMA mode, passing the physical and virtual pointers to pre-defined +* to the toolkit. */ +/*****************************************************************************/ +#ifdef CIFX_TOOLKIT_DMA + + /*****************************************************************************/ + /*! Definition of the DMA channel numbers */ + /*****************************************************************************/ + typedef enum + { + eDMA_CHANNEL_0 = 0, + eDMA_CHANNEL_1 = 1, + eDMA_CHANNEL_2 = 2, + eDMA_CHANNEL_3 = 3, + eDMA_CHANNEL_4 = 4, + eDMA_CHANNEL_5 = 5, + eDMA_CHANNEL_6 = 6, + eDMA_CHANNEL_7 = 7 + } CIFX_DMA_CHANNEL; + + /*****************************************************************************/ + /*! Definition of the DMA buffers and direction */ + /*****************************************************************************/ + typedef enum + { + eDMA_INPUT_BUFFER_IDX = 0, /* Input buffer index */ + eDMA_OUTPUT_BUFFER_IDX = 1 /* Output buffer index */ + } CIFX_DMA_DIRECTION; + + /*****************************************************************************/ + /*! Definition of the DMA */ + /*****************************************************************************/ + typedef enum CIFX_TOOLKIT_DMA_MODE_Etag + { + eDMA_MODE_LEAVE = 0, /*!< Leave communication channels in actual mode */ + eDMA_MODE_ON, /*!< Switch channels into DMA mode if possible */ + eDMA_MODE_OFF /*!< Switch OFF DMA mode for all channels */ + } CIFX_TOOLKIT_DMA_MODE_E; + + /*****************************************************************************/ + /*! Default definitions and DMA buffer structure */ + /*****************************************************************************/ + /* ATTENTION: - Buffer size must be a multiple of 256 Byte */ + /* - Maximum supported DMA buffer size is 63,75 KByte */ + #define CIFX_DMA_MODULO_SIZE 256 + #define CIFX_DMA_MAX_BUFFER_SIZE (255 * CIFX_DMA_MODULO_SIZE) /*!< Max configureable DMA buffer size */ + #define CIFX_DMA_BUFFER_COUNT 8 /*!< Number of DMA buffers */ + #define CIFX_DEFAULT_DMA_BUFFER_SIZE 8*1024 /*!< DMA buffer size in KByte */ + + typedef struct CIFX_DMABUFFER_Ttag + { + uint32_t ulSize; /*!< DMA buffer size */ + uint32_t ulPhysicalAddress; /*!< Physical address of the buffer */ + void* pvBuffer; /*!< Pointer to the buffer */ + void* pvUser; /*!< User parameter */ + } CIFX_DMABUFFER_T, *PCIFX_DMABUFFER_T; + +#endif /* CIFX_TOOLKIT_DMA */ + +/*****************************************************************************/ +/*! Synchronisation structure +* If synchronisation is supported, these structure is used to hold the +* necessary data. Synch information in device global. +* Synch-Flags are located in the handshake channel and 16 bit by default */ +/*****************************************************************************/ +#define NETX_HSK_SYNCH_FLAG_POS 1 /*!< Position of the sync flahs in the HSK channel */ +#define NETX_NUM_OF_SYNCH_FLAGS 4 /*!< Number of supported sync flags */ + +typedef struct CIFX_SYNCH_DATA_Ttag +{ + void* pvLock; /*!< Lock for synchronizing interrupt accesses to flags */ + uint16_t usSyncMode; /*!< Synchronisation mode */ + uint16_t usHSyncFlags; /*!< Host synchronisation flags */ + uint16_t usNSyncFlags; /*!< netX synchronisation flags */ + void* ahSyncBitEvents[HIL_DPM_HANDSHAKE_PAIRS]; /*!< netX synchronisation flags */ + +} CIFX_SYNCH_DATA_T; + +#ifdef CIFX_TOOLKIT_HWIF + typedef void* (*PFN_HWIF_MEMCPY) ( uint32_t ulOpt, void* pvDevInstance, void* pvAddr, void* pvData, uint32_t ulLen); + + /*lint -emacro(534, HWIF_READN) : ignore return value */ + /*lint -emacro(534, HWIF_WRITE*) : ignore return value */ + #define HWIF_READ8(ptDev, Src) HwIfRead8(ptDev, (void*)&(Src)) + #define HWIF_READ16(ptDev, Src) HwIfRead16(ptDev, (void*)&(Src)) + #define HWIF_READ32(ptDev, Src) HwIfRead32(ptDev, (void*)&(Src)) + #define HWIF_READN(ptDev, Dst, Src, Len) ((PDEVICEINSTANCE)ptDev)->pfnHwIfRead( 0, ptDev, (void*)(Src), Dst, Len) + #define HWIF_WRITE8(ptDev, Dst, Src) \ + do { \ + uint8_t bData = Src; \ + ((PDEVICEINSTANCE)ptDev)->pfnHwIfWrite(1, ptDev, (void*)&(Dst), (void*)&bData, 1); \ + } while (0); + #define HWIF_WRITE16(ptDev, Dst, Src) \ + do { \ + uint16_t uiData = Src; \ + ((PDEVICEINSTANCE)ptDev)->pfnHwIfWrite(1, ptDev, (void*)&(Dst), (void*)&uiData, 2); \ + } while (0); + #define HWIF_WRITE32(ptDev, Dst, Src) \ + do { \ + uint32_t ulData = Src; \ + ((PDEVICEINSTANCE)ptDev)->pfnHwIfWrite(1, ptDev, (void*)&(Dst), (void*)&ulData, 4); \ + } while (0); + #define HWIF_WRITEN(ptDev, Dst, Src, Len) ((PDEVICEINSTANCE)ptDev)->pfnHwIfWrite(0, ptDev, (void*)(Dst), Src, Len) + +#else + #define HWIF_READ8(ptDev, Src) Src + #define HWIF_READ16(ptDev, Src) Src + #define HWIF_READ32(ptDev, Src) Src + #define HWIF_READN(ptDev, Dst, Src, Len) OS_Memcpy(Dst, Src, Len) + #define HWIF_WRITE8(ptDev, Dst, Src) (Dst) = (Src); + #define HWIF_WRITE16(ptDev, Dst, Src) (Dst) = (Src); + #define HWIF_WRITE32(ptDev, Dst, Src) (Dst) = (Src); + #define HWIF_WRITEN(ptDev, Dst, Src, Len) OS_Memcpy(Dst, Src, Len) +#endif /* CIFX_TOOLKIT_HWIF */ + +/*****************************************************************************/ +/*! Structure defining a physical device passed to the toolkit. Passing it, +* will create all logical device associated with this instance */ +/*****************************************************************************/ +typedef struct DEVICEINSTANCEtag +{ + uint32_t ulPhysicalAddress; /*!< Physical address of the cifX card */ + uint32_t ulIrqNumber; /*!< IRQ number assigned to card */ + int fIrqEnabled; /*!< !=0 if the IRQ is used on this device */ + + int fPCICard; /*!< !=0 if the card is a PCI card (netX directly connected to PCI) + ,this will reset the netX if eDeviceType is AUTODETECT or RAMBASE */ + int fModuleLoad; /*!< This devices works with modules */ + + CIFX_TOOLKIT_DEVICETYPE_E eDeviceType; /*!< Type of the device. If set to AUTODETECT it will be updated during + cifXAddDevice */ + PFN_CIFXTK_NOTIFY pfnNotify; /*!< Function to notify user of different states in the toolkit, to allow + memory controller reconfiguration, etc. */ + void* pvOSDependent; /*!< OS dependent pointer to device identification (used for PCI read/write request). + This parameter must allow the OS/User to identify the card and access it's PCI registers */ + uint8_t* pbDPM; /*!< Virtual/usable pointer to the cards DPM */ + uint32_t ulDPMSize; /*!< Size of the cards DPM */ + CIFX_TOOLKIT_CHIPTYPE_E eChipType; /*!< Type of chip */ + + char szName[CIFx_MAX_INFO_NAME_LENTH]; /*!< Default name of the card, must be inserted by user */ + char szAlias[CIFx_MAX_INFO_NAME_LENTH];/*!< Alias name of the card, must be inserted by user */ + + int32_t lInitError; /*!< Initialization error of the card */ + + PNETX_GLOBAL_REG_BLOCK ptGlobalRegisters; /*!< Pointer to the global host registers (only available on PCI) */ + uint32_t ulSerialNumber; /*!< Serial number of the card (read on startup) */ + uint32_t ulDeviceNumber; /*!< Device number of the card (read on startup) */ + uint32_t ulSlotNumber; /*!< Slot number on card (read on startup) */ + + uint8_t* pbHandshakeBlock; /*!< Pointer to start of Handshake block (NULL if no handshake block was found */ + int iIrqToDsrBuffer; /*!< IRQ to DSR Buffer number to use */ + IRQ_TO_DSR_BUFFER_T atIrqToDsrBuffer[2]; /*!< IRQ to DSR Buffers */ + uint32_t ulIrqCounter; /*!< Number of interrupts processed on this device */ + + CHANNELINSTANCE tSystemDevice; /*!< Every card has at least one SystemDevice */ + uint32_t ulCommChannelCount; /*!< Number of fount communication channels on the card */ + CHANNELINSTANCE** pptCommChannels; /*!< Array of all found channels */ + +#ifdef CIFX_TOOLKIT_DMA + /* DMA Buffer Structure */ + uint32_t ulDMABufferCount; /*!< Number of available DMA buffers */ + CIFX_DMABUFFER_T atDmaBuffers[CIFX_DMA_BUFFER_COUNT]; /*!< DMA buffer definition for the device */ +#endif /* CIFX_TOOLKIT_DMA */ + int fCachedMemAccess; /*!< Cached memory access to DMA buffer */ + + /* Synch handling */ + CIFX_SYNCH_DATA_T tSyncData; /*!< Synchronization structure */ + + int fResetActive; /*!< !=0 if a reset is pending on device (DEV_DoSystemStart) */ + + /* Extended memory (additional target memory) */ + uint8_t* pbExtendedMemory; /*!< Virtual/usable pointer to an extended memory area */ + uint32_t ulExtendedMemorySize; /*!< Size of the extended memory area */ + +#ifdef CIFX_TOOLKIT_HWIF + PFN_HWIF_MEMCPY pfnHwIfRead; /*!< Definable hardware read function */ + PFN_HWIF_MEMCPY pfnHwIfWrite; /*!< Definable hardware read function */ +#endif /* CIFX_TOOLKIT_HWIF */ + +} DEVICEINSTANCE, *PDEVICEINSTANCE; + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ +/* Interrupt service and handler function definition */ +int cifXTKitISRHandler (PDEVICEINSTANCE ptDevInstance, int fPCIIgnoreGlobalIntFlag); +void cifXTKitDSRHandler (PDEVICEINSTANCE ptDevInstance); + +/* Toolkit DEV interface Functions */ +void DEV_WriteHandshakeFlags (PCHANNELINSTANCE ptChannel); +void DEV_ReadHostFlags (PCHANNELINSTANCE ptChannel, int fReadHostCOS); +void DEV_ReadHandshakeFlags (PCHANNELINSTANCE ptChannel, int fReadSyncFlags, int fLockNeeded); + +uint8_t DEV_GetIOBitstate (PCHANNELINSTANCE ptChannel, PIOINSTANCE ptIOInstance, int fOutput); + +int DEV_WaitForBitState (PCHANNELINSTANCE ptChannel, uint32_t ulBitNumber, uint8_t bState, uint32_t ulTimeout); +void DEV_ToggleBit (PCHANNELINSTANCE ptChannel, uint32_t ulBitMask); + +int DEV_WaitForSyncState (PCHANNELINSTANCE ptChannel, uint8_t bState, uint32_t ulTimeout); +void DEV_ToggleSyncBit (PDEVICEINSTANCE ptDevInstance, uint32_t ulBitMask); + +int32_t DEV_PutPacket (PCHANNELINSTANCE ptChannel, CIFX_PACKET* ptSendPkt, uint32_t ulTimeout); +int32_t DEV_GetPacket (PCHANNELINSTANCE ptChannel, CIFX_PACKET* ptRecvPkt, uint32_t ulRecvBufferSize, uint32_t ulTimeout); +int32_t DEV_GetMBXState (PCHANNELINSTANCE ptChannel, uint32_t* pulRecvPktCnt, uint32_t* pulSendPktCnt); + +int32_t DEV_TransferPacket (void* pvChannel, CIFX_PACKET* ptSendPkt, CIFX_PACKET* ptRecvPkt, + uint32_t ulRecvBufferSize, uint32_t ulTimeout, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, void* pvUser); + +int DEV_IsReady (PCHANNELINSTANCE ptChannel); +int DEV_IsRunning (PCHANNELINSTANCE ptChannel); +int DEV_IsCommunicating (PCHANNELINSTANCE ptChannel, int32_t* plError); +int DEV_WaitForReady_Poll (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout); +int DEV_WaitForNotReady_Poll (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout); +int DEV_WaitForRunning_Poll (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout); +int DEV_WaitForNotRunning_Poll(PCHANNELINSTANCE ptChannel, uint32_t ulTimeout); + +int32_t DEV_TriggerWatchdog (PCHANNELINSTANCE ptChannel, uint32_t ulTriggerCmd, uint32_t* pulTriggerValue); +int32_t DEV_GetHostState (PCHANNELINSTANCE ptChannel, uint32_t* pulState); +int32_t DEV_SetHostState (PCHANNELINSTANCE ptChannel, uint32_t ulNewState, uint32_t ulTimeout); +int32_t DEV_ReadWriteBlock (PCHANNELINSTANCE ptChannel, void* pvBlock, uint32_t ulOffset, uint32_t ulBlockLen, void* pvDest, uint32_t ulDestLen, uint32_t ulCmd, int fWriteAllowed); +int32_t DEV_DoChannelInit (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout); +int32_t DEV_DoSystemStart (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam); +int32_t DEV_DoSystemBootstart (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam); +int32_t DEV_DoUpdateStart (PCHANNELINSTANCE ptChannel, uint32_t ulTimeout, uint32_t ulParam); +int32_t DEV_BusState (PCHANNELINSTANCE ptChannel, uint32_t ulCmd, uint32_t* pulState, uint32_t ulTimeout); +int32_t DEV_DoHostCOSChange (PCHANNELINSTANCE ptChannel, uint32_t ulSetCOSMask, uint32_t ulClearCOSMask, + uint32_t ulPostClearCOSMask, int32_t lSignallingError, uint32_t ulTimeout); +void DEV_CheckCOSFlags (PDEVICEINSTANCE ptDevInstance); +uint8_t DEV_GetHandshakeBitState (PCHANNELINSTANCE ptChannel, uint32_t ulBitMsk); + +/* Toolkit Internal Functions */ +int DEV_RemoveChannelFiles (PCHANNELINSTANCE ptChannel, uint32_t ulChannel, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser, + char* szExceptFile); + +int DEV_RemoveFWFiles (PCHANNELINSTANCE ptChannel, uint32_t ulChannel, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser); + +int32_t DEV_DeleteFile (void* pvChannel, uint32_t ulChannelNumber, char* pszFileName, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser); + +int32_t DEV_CheckForDownload (void* pvChannel, uint32_t ulChannelNumber, int* pfDownload, + char* pszFileName, void* pvFileData, uint32_t ulFileSize, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser); + + +int DEV_IsFWFile (char* pszFileName); +int DEV_IsNXFFile (char* pszFileName); +int DEV_IsNXOFile (char* pszFileName); + +int32_t DEV_GetFWTransferTypeFromFileName ( CIFX_TOOLKIT_CHIPTYPE_E eChipType, + char* pszFileName, + uint32_t* pulTransperType); + +int32_t DEV_ProcessFWDownload (PDEVICEINSTANCE ptDevInstance, + uint32_t ulChannel, + char* pszFullFileName, + char* pszFileName, + uint32_t ulFileLength, + uint8_t* pbBuffer, + uint8_t* pbLoadState, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, + void* pvUser); + +int32_t DEV_DownloadFile (void* pvChannel, + uint32_t ulChannel, + uint32_t ulMailboxSize, + uint32_t ulTransferType, + char* szFileName, + uint32_t ulFileLength, + void* pvData, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser); + +int32_t DEV_UploadFile (void* pvChannel, + uint32_t ulChannel, + uint32_t ulMailboxSize, + uint32_t ulTransfertype, + char* szFilename, + uint32_t* pulFileLength, + void* pvData, + PFN_TRANSFER_PACKET pfnTransferPacket, + PFN_PROGRESS_CALLBACK pfnCallback, + PFN_RECV_PKT_CALLBACK pfnRecvPacket, + void* pvUser); + +#ifdef CIFX_TOOLKIT_DMA + int32_t DEV_DMAState (PCHANNELINSTANCE ptChannel, uint32_t ulCmd, uint32_t* pulState); + int32_t DEV_SetupDMABuffers (PCHANNELINSTANCE ptChannel); +#endif + +#ifdef CIFX_TOOLKIT_HWIF + uint8_t HwIfRead8 (PDEVICEINSTANCE ptDev, void* pvSrc); + uint16_t HwIfRead16 (PDEVICEINSTANCE ptDev, void* pvSrc); + uint32_t HwIfRead32 (PDEVICEINSTANCE ptDev, void* pvSrc); +#endif /* CIFX_TOOLKIT_HWIF */ + +/****************************************************************************** +* Functions to be implemented by USER * +******************************************************************************/ +/* Trace level definitions */ +#define TRACE_LEVEL_DEBUG 0x00000001 +#define TRACE_LEVEL_INFO 0x00000002 +#define TRACE_LEVEL_WARNING 0x00000004 +#define TRACE_LEVEL_ERROR 0x00000008 + +/* Actual trace log level*/ +extern uint32_t g_ulTraceLevel; + +/* User trace function */ +void USER_Trace (PDEVICEINSTANCE ptDevInstance, uint32_t ulTraceLevel, + const char* szFormat, ...); + +#ifdef __cplusplus +} +#endif + +#endif /* CIFX_HWFUNCTIONS__H */ diff --git a/libcifx/Toolkit/Source/cifXInit.c b/libcifx/Toolkit/Source/cifXInit.c new file mode 100644 index 0000000..e35b030 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXInit.c @@ -0,0 +1,4423 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXInit.c 14703 2023-04-27 12:25:19Z RMayer $: + + Description: + cifX Toolkit Initialization function implementation. This file contains all functions + that need to be called by the application which wants to use the toolkit, to pass the + cards that need to be handled and initialize them all. This file also includes the + functions for downloading the firmware/configuration on startup and bring the card to live. + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-27 Added cifXReadHardwareIdent() function, to read netX "ChipType" + 2022-06-14 Added new user function to read IO buffer caching option + + 2021-08-31 - Reworked device type and chip typ detection in cifXStartDevice() / cifXHardwareReset() + - Adapted OS_Time() call to new parameter type definition + + 2021-08-13 - Fixed missing return of ulState packet errors in cifXReadFirmwareIdent() + - Removed "\r\n" from trace strings, now generally handled in USER_Trace() + + 2019-10-11 Propagate prototype changes of endianess conversion function + + 2019-03-01 Do not write PCIe configuration space during hardware reset of netX4000 + based PCI hardware + + 2019-02-12 Skip update handling for flash based netX90/4000 devices + + 2018-12-10 Integrate detection function for netX90/4000 for ROMloader and while + firmware is running (the latter expects register block at end of DPM) + + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + + 2018-09-24 Reworked startup structure, moved netx500 and netX51 hboot functions + to own source modules + +**************************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +#include "Hil_Packet.h" +#include "Hil_ModuleLoader.h" +#include "Hil_SystemCmd.h" +#include "Hil_Results.h" + +#include "NetX_ROMLoader.h" +#include "netx50_romloader_dpm.h" +#include "netx51_romloader_dpm.h" + + +/* Use external definitions for the netX specific functions */ +/* This keeps the netX chip headers independent of toolkit definitions. */ +extern int32_t cifXStartBootloader_netX100 ( PDEVICEINSTANCE ptDevInstance, + uint8_t* pbFileData, + uint32_t ulFileDataLen); + +extern int32_t cifXStartBootloader_hboot ( PDEVICEINSTANCE ptDevInstance, + uint8_t* pbFileData, + uint32_t ulFileDataLen); + +extern int IsNetX51or52ROM ( PDEVICEINSTANCE ptDevInstance); +extern int IsNetX4x00FLASH ( PDEVICEINSTANCE ptDevInstance); +extern int IsNetX4x00ROM ( PDEVICEINSTANCE ptDevInstance); +extern int IsNetX90FLASH ( PDEVICEINSTANCE ptDevInstance); +extern int IsNetX90ROM ( PDEVICEINSTANCE ptDevInstance); + +/*****************************************************************************/ +/*! Structure description of NETX_FW_IDENTIFY_CNF_DATA_T */ +/*****************************************************************************/ +static const CIFX_ENDIANESS_ENTRY_T s_atFWIdentifyConv[] = +{ + /* Offset, Width, Elements */ + { 0x00, eCIFX_ENDIANESS_WIDTH_16BIT, 4}, /* tFwVersion.Maj/Min/Build/Rev */ + { 0x48, eCIFX_ENDIANESS_WIDTH_16BIT, 1}, /* tFwDate.usYear */ +}; + +uint32_t g_ulTraceLevel = TRACE_LEVEL_ERROR; /*!< Tracelevel used by the toolkit */ + +/*****************************************************************************/ +/*! \addtogroup CIFX_TOOLKIT_FUNCS cifX DPM Toolkit specific functions +* \{ */ +/*****************************************************************************/ + +uint32_t g_ulDeviceCount = 0; /*!< Number of devices handled by toolkit */ +PDEVICEINSTANCE* g_pptDevices = NULL; /*!< Array of device informations */ + +TKIT_DRIVER_INFORMATION g_tDriverInfo = {0}; /*!< Global driver information */ + +void* g_pvTkitLock = NULL; + +/*****************************************************************************/ +/*! Cyclic timer for COS bit checking, if we are running in polling mode */ +/*****************************************************************************/ +void cifXTKitCyclicTimer(void) +{ + uint32_t ulIdx; + + OS_EnterLock(g_pvTkitLock); + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ulIdx++) + { + if(!g_pptDevices[ulIdx]->fIrqEnabled) + { + /* Device is not running in IRQ mode, so we need to check COS */ + DEV_CheckCOSFlags(g_pptDevices[ulIdx]); + } + } + OS_LeaveLock(g_pvTkitLock); +} + +/*****************************************************************************/ +/*! Delete a channel instance structure and all contained allocated data +* \param ptChannelInst Channel instance to delete (will also be free'd) */ +/*****************************************************************************/ +static void cifXDeleteChannelInstance(PCHANNELINSTANCE ptChannelInst) +{ + uint32_t ulTemp; + + /*-------------------------------------------------*/ + /* Free dynamic objects created for the interrupt */ + /*-------------------------------------------------*/ + /* Clean up all interrupt events */ + for(ulTemp = 0; ulTemp < sizeof(ptChannelInst->ahHandshakeBitEvents) / sizeof(ptChannelInst->ahHandshakeBitEvents[0]); ++ulTemp) + { + if(NULL != ptChannelInst->ahHandshakeBitEvents[ulTemp]) + { + OS_DeleteEvent(ptChannelInst->ahHandshakeBitEvents[ulTemp]); + ptChannelInst->ahHandshakeBitEvents[ulTemp] = NULL; + } + } + + /*-------------------------------------------------*/ + /* Free all dynamically allocated I/O Input Areas */ + /*-------------------------------------------------*/ + if(NULL != ptChannelInst->pptIOInputAreas) + { + for(ulTemp = 0; ulTemp < ptChannelInst->ulIOInputAreas; ++ulTemp) + { + PIOINSTANCE ptIoInst = ptChannelInst->pptIOInputAreas[ulTemp]; + + if(NULL != ptIoInst) + { + /* Delete synchronisation object */ + OS_DeleteMutex(ptIoInst->pvMutex); + + OS_Memfree(ptIoInst); + ptChannelInst->pptIOInputAreas[ulTemp] = NULL; + } + } + + OS_Memfree(ptChannelInst->pptIOInputAreas); + ptChannelInst->pptIOInputAreas = NULL; + } + + /*-------------------------------------------------*/ + /* Free all dynamically allocated I/O Output Areas */ + /*-------------------------------------------------*/ + if(NULL != ptChannelInst->pptIOOutputAreas) + { + for(ulTemp = 0; ulTemp < ptChannelInst->ulIOOutputAreas; ++ulTemp) + { + PIOINSTANCE ptIoInst = ptChannelInst->pptIOOutputAreas[ulTemp]; + + if(NULL!= ptIoInst) + { + /* Delete synchronisation object */ + OS_DeleteMutex(ptIoInst->pvMutex); + + OS_Memfree(ptIoInst); + ptChannelInst->pptIOOutputAreas[ulTemp] = NULL; + } + } + + OS_Memfree(ptChannelInst->pptIOOutputAreas); + ptChannelInst->pptIOOutputAreas = NULL; + } + + /*-------------------------------------------------*/ + /* Free all dynamically allocated User Areas */ + /*-------------------------------------------------*/ + if(NULL != ptChannelInst->pptUserAreas) + { + for(ulTemp = 0; ulTemp < ptChannelInst->ulUserAreas; ++ulTemp) + { + OS_Memfree(ptChannelInst->pptUserAreas[ulTemp]); + ptChannelInst->pptUserAreas[ulTemp] = NULL; + } + + OS_Memfree(ptChannelInst->pptUserAreas); + ptChannelInst->pptUserAreas = NULL; + } + + /*-------------------------------------------------*/ + /* Delete Mailbox synchronisation objects (Mutex) */ + /*-------------------------------------------------*/ + if(NULL != ptChannelInst->tSendMbx.pvSendMBXMutex) + OS_DeleteMutex(ptChannelInst->tSendMbx.pvSendMBXMutex); + if(NULL != ptChannelInst->tRecvMbx.pvRecvMBXMutex) + OS_DeleteMutex(ptChannelInst->tRecvMbx.pvRecvMBXMutex); + + /*-------------------------------------------------*/ + /* Delete lock object */ + /*-------------------------------------------------*/ + if(NULL != ptChannelInst->pvLock) + OS_DeleteLock(ptChannelInst->pvLock); + if(NULL != ptChannelInst->pvInitMutex) + OS_DeleteMutex(ptChannelInst->pvInitMutex); + + /* Free channel instance */ + OS_Memfree(ptChannelInst); +} + +/*****************************************************************************/ +/*! Evaluate the netX chip of the device (when running in ROMloader) and sets +* value in supplied device instance +* +* Global register block only evaluated for netX90/4000 based devices. +* +* \param ptDevInstance Device instance +* \param ulActDPMState Actual DPM state +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXDetectChipTypebyROMLoader(PDEVICEINSTANCE ptDevInstance, uint32_t ulActDPMState) +{ + int32_t lRet = CIFX_DRV_INIT_STATE_ERROR; + uint32_t ulCookie = 0; + + ptDevInstance->eChipType = eCHIP_TYPE_UNKNOWN; + + HWIF_READN(ptDevInstance, &ulCookie, ptDevInstance->pbDPM, sizeof(ulCookie)); + + /*-----------------------------*/ + /* Start with netX50 */ + /*-----------------------------*/ + if(ulCookie == HOST_TO_LE32(NETX50_BOOTID_DPM)) + { + /* This is a netX50 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX50; + lRet = CIFX_NO_ERROR; + + /*-----------------------------*/ + /* Check for netX51 / netX52 */ + /*-----------------------------*/ + } else if(IsNetX51or52ROM(ptDevInstance)) + { + /* eChipType already set */ + lRet = CIFX_NO_ERROR; + + /*-----------------------------*/ + /* Check for netX4000 / 4100 */ + /*-----------------------------*/ + } else if(IsNetX4x00ROM(ptDevInstance)) + { + /* eChipType already set */ + lRet = CIFX_NO_ERROR; + + /*-----------------------------*/ + /* Check for netX90 */ + /*-----------------------------*/ + } else if(IsNetX90ROM(ptDevInstance)) + { + /* eChipType already set */ + lRet = CIFX_NO_ERROR; + + /*-----------------------------*/ + /* Check for netX100 / netX500 */ + /*-----------------------------*/ + } else if( (ulActDPMState & (MSK_SYSSTA_BOOT_ACTIVE | MSK_SYSSTA_LED_READY)) == (MSK_SYSSTA_BOOT_ACTIVE | MSK_SYSSTA_LED_READY) ) + { + /* This must be a netX100/500. Currently we are not able to + detect netX100 / netX500 independently */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX500; + lRet = CIFX_NO_ERROR; + } + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "Chiptype detected: %d", + ptDevInstance->eChipType); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Performs a hardware reset on the given device +* \param ptDevInstance Instance to reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXHardwareReset(PDEVICEINSTANCE ptDevInstance) +{ + static const uint32_t s_aulResetSequence[] = + { + 0x00000000, 0x00000001,0x00000003, 0x00000007, + 0x0000000F, 0x0000001F,0x0000003F, 0x0000007F, + 0x000000FF + }; + + void* pvPCIConfig = NULL; + uint32_t ulIdx = 0; + int32_t lRet = CIFX_DRV_INIT_STATE_ERROR; + volatile uint32_t* pulHostReset = &ptDevInstance->ptGlobalRegisters->ulHostReset; + volatile uint32_t* pulSystemState = &ptDevInstance->ptGlobalRegisters->ulSystemState; + + /* Read PCI config */ + if(ptDevInstance->fPCICard) + { + /* Only RAM based PCI devices without netX4x00 needs to save the PCI Configuration before a reset */ + /* Note: At this point we are not able to detect netX4000 chips, which does not loose + PCI Config information during a reset. But we don't know the chip state before a reset + and therefore we can't be sure to find a DPM and the global register block. */ + pvPCIConfig = OS_ReadPCIConfig(ptDevInstance->pvOSDependent); + } + + /* Check for netX5x and load pointer to reset and system state in DPM */ + if( IsNetX51or52ROM(ptDevInstance)) + { + NETX51_DPM_CONFIG_AREA_T* ptDpmConfig = (NETX51_DPM_CONFIG_AREA_T*)ptDevInstance->pbDPM; + pulHostReset = &ptDpmConfig->ulDpmResetRequest; + pulSystemState = &ptDpmConfig->ulDpmSysSta; + } + + /* Perform netX Hardware Reset */ + for(ulIdx = 0; ulIdx < sizeof(s_aulResetSequence) / sizeof(s_aulResetSequence[0]); ++ulIdx) + HWIF_WRITE32(ptDevInstance, *pulHostReset, HOST_TO_LE32(s_aulResetSequence[ulIdx])); + + /* Wait until netX is in reset */ + OS_Sleep(NET_BOOTLOADER_RESET_TIME); + + /* Write PCI config */ + if( ptDevInstance->fPCICard) + { + /* Only RAM based PCI devices without netX4x00 needs to restore the PCI Configuration after a reset */ + /* Note: But we don't know the chip type at this point and for any further access to a DPM + we have to restore the PCI config information, otherwise it is possible we accessinhg + device memory which is not correctly mapped by the host system. */ + OS_WritePCIConfig(ptDevInstance->pvOSDependent, pvPCIConfig); + } + + /* Call user, to allow setting up DPM, HW etc, */ + if(ptDevInstance->pfnNotify) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Calling supplied function (0x%08X) after resetting the card!", + ptDevInstance->pfnNotify); + } + ptDevInstance->pfnNotify(ptDevInstance, eCIFX_TOOLKIT_EVENT_POSTRESET); + } + + /* Wait for romloader to signal PCI Boot State */ + for(ulIdx = 0; (ulIdx < NET_BOOTLOADER_STARTUP_CYCLES) && (lRet != CIFX_NO_ERROR); ++ulIdx) + { + uint32_t ulState; + OS_Sleep(NET_BOOTLOADER_STARTUP_WAIT); + + ulState = LE32_TO_HOST(HWIF_READ32(ptDevInstance, *pulSystemState)); /*lint !e564 */ + + /* Check if state not 0xFFFFFFFF. This happens if memory is not available. */ + if( (ulState == CIFX_DPM_INVALID_CONTENT) || + (ulState == CIFX_DPM_NO_MEMORY_ASSIGNED) ) + { + /* Error, register block not available */ + lRet = CIFX_MEMORY_MAPPING_FAILED; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DPM Content invalid after Reset (Data=0x%08X)!", + ulState); + } + break; + + } else + { + /* Detect chip type after hardware reset */ + lRet = cifXDetectChipTypebyROMLoader( ptDevInstance, ulState); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Download the 2nd Stage Bootloader to the card, starts it and checks if +* it is running on the card +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXRunBootloader(PDEVICEINSTANCE ptDevInstance) +{ + uint32_t ulFileSize = 0; + void* pvFile = NULL; + int32_t lRet = CIFX_DRV_INIT_STATE_ERROR; + + CIFX_FILE_INFORMATION tFileInfo; + OS_Memset(&tFileInfo, 0, sizeof(tFileInfo)); + + /* Read boot loader file name depending to the chip type */ + USER_GetBootloaderFile( ptDevInstance, &tFileInfo); + + /* Try to open the file */ + if(NULL == (pvFile = OS_FileOpen(tFileInfo.szFullFileName, &ulFileSize))) + { + lRet = CIFX_FILE_OPEN_FAILED; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error opening bootloader file '%s'!", + tFileInfo.szFullFileName); + } + } else + { + /* Read bootloader file data */ + uint8_t* pbBuffer = (uint8_t*)OS_Memalloc(ulFileSize); + + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Downloading bootloder '%s'", + tFileInfo.szFullFileName); + } + + if( NULL == pbBuffer) + { + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating file buffer!"); + } + } else + { + if(ulFileSize != OS_FileRead(pvFile, 0, ulFileSize, pbBuffer)) + { + lRet = CIFX_FILE_READ_ERROR; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading bootloader file '%s'!", + tFileInfo.szFullFileName); + } + + } else + { + + /* Call user, to allow setting up DPM, HW etc, */ + if(ptDevInstance->pfnNotify) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Calling supplied function (0x%08X) before starting bootloader!", + ptDevInstance->pfnNotify); + } + ptDevInstance->pfnNotify(ptDevInstance, eCIFX_TOOLKIT_EVENT_PRE_BOOTLOADER); + } + + switch(ptDevInstance->eChipType) + { + case eCHIP_TYPE_NETX500: + case eCHIP_TYPE_NETX100: + lRet = cifXStartBootloader_netX100(ptDevInstance, + pbBuffer, + ulFileSize); + break; + + case eCHIP_TYPE_NETX50: + case eCHIP_TYPE_NETX51: + case eCHIP_TYPE_NETX52: + lRet = cifXStartBootloader_hboot(ptDevInstance, + pbBuffer, + ulFileSize); + break; + + default: + lRet = CIFX_DRV_INIT_STATE_ERROR; + break; + } + + if(CIFX_NO_ERROR == lRet) + { + uint32_t ulIdx = 0; + + /* Wait until 2nd Stage loader or firmware is running */ + for(ulIdx = 0; ulIdx < NET_BOOTLOADER_STARTUP_CYCLES; ++ulIdx) + { + volatile uint32_t* pulDpmStart = (volatile uint32_t*)ptDevInstance->pbDPM; + + /* Wait until bootloader is active */ + OS_Sleep(NET_BOOTLOADER_STARTUP_WAIT); + + /* Call user, to setup DPM, in case the bootloader uses + other timings/bit width than the original ROM loader settings */ + if( ptDevInstance->pfnNotify && (0 == ulIdx)) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Calling supplied function (0x%08X) after starting bootloader!", + ptDevInstance->pfnNotify); + } + ptDevInstance->pfnNotify(ptDevInstance, eCIFX_TOOLKIT_EVENT_POST_BOOTLOADER); + } + + /* Check if state not 0xFFFFFFFF. This happens if memory is not available. */ + if( (HWIF_READ32(ptDevInstance, *pulDpmStart) == HOST_TO_LE32(CIFX_DPM_INVALID_CONTENT)) || + (HWIF_READ32(ptDevInstance, *pulDpmStart) == HOST_TO_LE32(CIFX_DPM_NO_MEMORY_ASSIGNED)) ) + { + /* Set temporary error, device is not yet back on bus */ + lRet = CIFX_MEMORY_MAPPING_FAILED; + + } else + { + if( (HWIF_READ32(ptDevInstance, *pulDpmStart) != HOST_TO_LE32(CIFX_DPMSIGNATURE_BSL_VAL)) && + (HWIF_READ32(ptDevInstance, *pulDpmStart) != HOST_TO_LE32(CIFX_DPMSIGNATURE_FW_VAL)) ) + { + /* no 'netX' or 'BOOT' signature found */ + lRet = CIFX_DRV_INIT_STATE_ERROR; + } else + { + /* All states are OK */ + lRet = CIFX_NO_ERROR; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Bootloader was downloaded and started successfully!"); + } + + break; + } + } + } + + if(CIFX_NO_ERROR != lRet) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "DPM not accessible after starting Bootloader! (lRet=0x%08X)", + lRet); + } + } + } + } + + /* Free file buffer */ + OS_Memfree(pbBuffer); + } + + /* Close file */ + OS_FileClose(pvFile); + + } /*lint !e593 : pbBuffer possible not freed */ + + return lRet; +} + +/*****************************************************************************/ +/*! Start RAM based device +* Device will execute a complet hardware reset here +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartRAMDevice(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet = CIFX_NO_ERROR; + + /*--------------------------------------*/ + /* Check DPM size which must be 64KByte */ + /*--------------------------------------*/ + if(ptDevInstance->ulDPMSize < NETX_DPM_MEMORY_SIZE) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "RAM based device needs a DPM >= 64kB to work (DPMSize=%u). Device cannot be handled!", + ptDevInstance->ulDPMSize); + } + + lRet = CIFX_INVALID_BOARD; + + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "New RAM based device found, device will be reset!"); + } + + /*-------------------------------------------------------------*/ + /* Call user notify function to allow setting up DPM, HW etc. */ + /*-------------------------------------------------------------*/ + if(ptDevInstance->pfnNotify) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "Calling supplied function (0x%08X) before resetting the card (HWReset)!", + ptDevInstance->pfnNotify); + } + ptDevInstance->pfnNotify(ptDevInstance, eCIFX_TOOLKIT_EVENT_PRERESET); + } + + /*-------------------------------------------------------------*/ + /* Reset card */ + /*-------------------------------------------------------------*/ + if(CIFX_NO_ERROR != (lRet = cifXHardwareReset(ptDevInstance))) + { + /* HW reset failed */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Hardware reset failed, check if the card is correctly configured (PCI/DPM bootmode) (lRet=0x%08X)!", + lRet); + } + + /*-------------------------------------------------------------*/ + /* Load Bootloader to card and start it. */ + /*-------------------------------------------------------------*/ + } else if( CIFX_NO_ERROR != (lRet = cifXRunBootloader(ptDevInstance))) + { + /* Bootloader could not be started */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Bootloader could not be started! (lRet=0x%08X)", + lRet); + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Handle BASE OS Module for RAM based devices +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXHandleRAMBaseOSModule(PDEVICEINSTANCE ptDevInstance) +{ + /* Check if we have a BASE OS image (cifXrcX.nxf) ready for download (new download mechanism). + If not, we will try to continue the "old" style that expects a module containing + the whole rcX */ + + int32_t lRet = CIFX_NO_ERROR; + CIFX_DEVICE_INFORMATION tDevInfo; + CIFX_FILE_INFORMATION tFileInfo; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + OS_Memset(&tFileInfo, 0, sizeof(tFileInfo)); + + /* Initialize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /*-----------------------------------------*/ + /* Ask user about an BASE OS Module */ + /*-----------------------------------------*/ + if( USER_GetOSFile(&tDevInfo, &tFileInfo)) + { + uint32_t ulFileLength = 0; + void* pvFile = NULL; + CIFXHANDLE hSysDevice = (CIFXHANDLE)&ptDevInstance->tSystemDevice; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_WARNING, + "O/S file (%s) found. Download and start base rcX System!", tFileInfo.szShortFileName); + } + + /*-----------------------------------------*/ + /* Open the file */ + /*-----------------------------------------*/ + if(NULL == (pvFile = OS_FileOpen(tFileInfo.szFullFileName, &ulFileLength))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error opening OS file '%s'!", + tFileInfo.szFullFileName); + } + + lRet = CIFX_FILE_OPEN_FAILED; + + } else + { + /*-------------------------------------------------------*/ + /* Create local buffer and read the file into the buffer */ + /*-------------------------------------------------------*/ + void* pbBuffer = OS_Memalloc(ulFileLength); + if (NULL == pbBuffer) + { + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating file buffer!"); + } + + } else + { + /*-------------------------------------------------------*/ + /* Read the file into the buffer */ + /*-------------------------------------------------------*/ + if(ulFileLength != OS_FileRead(pvFile, 0, ulFileLength, pbBuffer)) + { + /* Error reading file */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading OS file from disk '%s'!", + tFileInfo.szFullFileName); + } + + lRet = CIFX_FILE_READ_ERROR; + + /*---------------------------------------------------------------------------------------------*/ + /* based devices are not using a FLASH file system, the BASE OS file must be always downloaded */ + /*---------------------------------------------------------------------------------------------*/ + } else if(CIFX_NO_ERROR != (lRet = xSysdeviceDownload(hSysDevice, + 0, + DOWNLOAD_MODE_FIRMWARE, + tFileInfo.szShortFileName, + (uint8_t*)pbBuffer, + ulFileLength, + NULL, + NULL, + NULL))) + { + /* Error during download */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error downloading OS file to device '%s'"\ + " - (lRet=0x%08X)!", + tFileInfo.szFullFileName, + lRet); + } + } else + { + /* Start the Base OS + - We need to send a channel instantiate request, so the bootloader + starts up the base module */ + + HIL_CHANNEL_INSTANTIATE_REQ_T tSendPkt; + HIL_CHANNEL_INSTANTIATE_CNF_T tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + /* Download successfull */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "OS file was downloaded successfully '%s'", tFileInfo.szFullFileName); + } + + /* Create start request */ + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tSendPkt.tHead.ulLen = HOST_TO_LE32(sizeof(HIL_CHANNEL_INSTANTIATE_REQ_DATA_T)); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_CHANNEL_INSTANTIATE_REQ); + tSendPkt.tData.ulChannelNo = HOST_TO_LE32(CIFX_SYSTEM_DEVICE); + + /* Transfer packet */ + lRet = DEV_TransferPacket( &ptDevInstance->tSystemDevice, + (CIFX_PACKET*)&tSendPkt, + (CIFX_PACKET*)&tRecvPkt, + sizeof(HIL_MODULE_INSTANTIATE_CNF_T), + CIFX_TO_SEND_PACKET, + NULL, + NULL); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(tRecvPkt.tHead.ulSta))) ) + { + /* Error starting the firmware */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error sending Start request to start Base OS (lRet=0x%08X)!", + lRet); + } + } else + { + /*-------------------------------------------- + Wait until READY is gone!!!!!!!!!!!!!!!!!!! + --------------------------------------------*/ + if (!DEV_WaitForNotReady_Poll( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START)) + { + lRet = CIFX_DEV_RESET_TIMEOUT; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error waiting for firmware to leave reset state! (lRet=0x%08X)", + lRet); + } + } else + { + /*-------------------------------------------- + Wait until READY is back + --------------------------------------------*/ + /* Check if firmware is READY because we need the DPM Layout */ + if (!DEV_WaitForReady_Poll( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START)) + { + lRet = CIFX_DEV_NOT_READY; + + /* READY state not reached */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error device does not reach READY state! (lRet=0x%08X)", + lRet); + } + } + } + } + } + + /* Free the file buffer */ + OS_Memfree(pbBuffer); + } + + /* Close the file */ + OS_FileClose(pvFile); + + } /*lint !e429 : pbBuffer not freed or returned */ + } + + return lRet; +} + +/*****************************************************************************/ +/*! Start Flash based device +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartFlashDevice(PDEVICEINSTANCE ptDevInstance) +{ + /* Check if a FW or Bootloader is running */ + ptDevInstance = ptDevInstance; + + /* Note: Checks already done in cifXEvaluateDeviveType() */ + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Handle Flash based BASE OS Module +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXHandleFlashBaseOSModule(PDEVICEINSTANCE ptDevInstance) +{ + /* Check if we have a BASE OS image (comXrcX.nxf) ready for download (new download mechanism). + If not, we will try to continue the "old" style that expects a module containing + the whole rcX */ + + /* ATTENTION: + Base Module Start + -------------------------- + - On Flash based cards: we have to start the Base Module with a SYSTEM_RESTART + */ + + int32_t lRet = CIFX_NO_ERROR; + CIFX_DEVICE_INFORMATION tDevInfo; + CIFX_FILE_INFORMATION tFileInfo; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + OS_Memset(&tFileInfo, 0, sizeof(tFileInfo)); + + /* Initialize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Ask user about an BASE OS Module */ + if(USER_GetOSFile(&tDevInfo, &tFileInfo)) + { + uint32_t ulFileLength = 0; + void* pvFile = NULL; + + CIFXHANDLE hSysDevice = (CIFXHANDLE)&ptDevInstance->tSystemDevice; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "O/S file (%s) found. Download and start base rcX System!", tFileInfo.szShortFileName); + } + + /*-----------------------------------------*/ + /* Open the file */ + /*-----------------------------------------*/ + if(NULL == (pvFile = OS_FileOpen( tFileInfo.szFullFileName, &ulFileLength))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error opening OS file '%s'!", + tFileInfo.szFullFileName); + } + + lRet = CIFX_FILE_OPEN_FAILED; + + } else + { + /*-------------------------------------------------------*/ + /* Create local buffer and read the file into the buffer */ + /*-------------------------------------------------------*/ + uint8_t* pbBuffer = (uint8_t*)OS_Memalloc(ulFileLength); + + if (NULL == pbBuffer) + { + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating file buffer!"); + } + + } else + { + /*-------------------------------------------------------*/ + /* Read the file into the buffer */ + /*-------------------------------------------------------*/ + if(ulFileLength != OS_FileRead(pvFile, 0, ulFileLength, pbBuffer)) + { + /* Error reading file */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading OS file from disk '%s'!", + tFileInfo.szFullFileName); + } + + lRet = CIFX_FILE_READ_ERROR; + + } else + { + /* On a flash based device we need to check if the file already exists + We will only download it, if our file is different from that on the + device, or the device does not have this file */ + int fDownload = 0; + if ( CIFX_NO_ERROR != (lRet = DEV_CheckForDownload( hSysDevice, + HIL_PACKET_DEST_SYSTEM, /* BASE OS will be found in "PORT_0" */ + &fDownload, + tFileInfo.szShortFileName, + pbBuffer, + ulFileLength, + DEV_TransferPacket, + NULL, + NULL))) + { + /* Display an error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error checking for download '%s'!", + tFileInfo.szFullFileName); + } + } else if (!fDownload) + { + /* File already exists on the hardware, we have not to download it*/ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "Skipping download for file '%s'" \ + "[checksum identical]!", + tFileInfo.szFullFileName); + } + } else + { + /* Delete all files in all channels */ + uint32_t ulChNum = 0; + for ( ulChNum = 0; ulChNum < CIFX_MAX_NUMBER_OF_CHANNELS; ulChNum++) + { + (void)DEV_RemoveChannelFiles( (PCHANNELINSTANCE)hSysDevice, ulChNum, DEV_TransferPacket, NULL, NULL, NULL); + } + + /* Download the file stored in the buffer */ + lRet = xSysdeviceDownload(hSysDevice, + 0, + DOWNLOAD_MODE_FIRMWARE, + tFileInfo.szShortFileName, + pbBuffer, + ulFileLength, + NULL, + NULL, + NULL); + + if(CIFX_NO_ERROR != lRet) + { + /* Error during download */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Error downloading OS file to device '%s'"\ + " - (lRet=0x%08X)!", + tFileInfo.szFullFileName, + lRet); + } + } else + { + /* Download successful */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_DEBUG, + "OS file was downloaded successfully '%s'", tFileInfo.szFullFileName); + } + + /* Start the Base OS */ + /* We have to do a SYSTEMSTART */ + if ( CIFX_NO_ERROR != (lRet = DEV_DoSystemStart( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START, 0))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error during Flash based Base OS system start! (lRet=0x%08X)", + lRet); + } + } + } + } + } /*lint !e429 : pbBuffer not freed or returned */ + + /* Free the file buffer */ + OS_Memfree(pbBuffer); + } + + /* Close the file */ + OS_FileClose(pvFile); + + } /*lint !e429 : pbBuffer not freed or returned */ + } + + return lRet; +} + + +/*****************************************************************************/ +/*! Download firmware/module files to a specified device +* \param ptDevInstance Instance to download the files to +* \param ptDevChannelCfg Channel configuration data (downloaded files, etc.) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXDownloadFWFiles(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulChannel = 0; + + /* Process all channels */ + for(ulChannel = 0; ulChannel < CIFX_MAX_NUMBER_OF_CHANNELS; ++ulChannel) + { + CIFX_DEVICE_INFORMATION tDevInfo; + uint32_t ulIdx = 0; + uint32_t ulFirmwareCnt = 0; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = ulChannel; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Get information about the number of firmware files to download */ + ulFirmwareCnt = USER_GetFirmwareFileCount(&tDevInfo); + + /* Show information about the channel and the number of firmware files to download */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Firmware download, checking / starting: CHANNEL #%d, %d file(s)", + ulChannel, + ulFirmwareCnt); + } + + /*----------------------------*/ + /* Process all firmware files */ + /*----------------------------*/ + for(ulIdx = 0; ulIdx < ulFirmwareCnt; ++ulIdx) + { + CIFX_FILE_INFORMATION tFileInfo; + + OS_Memset(&tFileInfo, 0, sizeof(tFileInfo)); + + /* Read file information */ + if(!USER_GetFirmwareFile(&tDevInfo, ulIdx, &tFileInfo)) + { + /* Firmware file not returned by USER */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error querying Firmware to load from USER_GetFirmwareFile (ulIdx=%u)!", + ulIdx); + } + } else + { + /*-----------------------------------------*/ + /* Open the file */ + /*-----------------------------------------*/ + uint32_t ulFileLength = 0; + void* pvFile = OS_FileOpen(tFileInfo.szFullFileName, &ulFileLength); + if(NULL == pvFile) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error opening Firmware file '%s'!", + tFileInfo.szFullFileName); + } + + } else + { + /*-------------------------------------------------------*/ + /* Create local buffer and read the file into the buffer */ + /*-------------------------------------------------------*/ + uint8_t* pbBuffer = (uint8_t*)OS_Memalloc(ulFileLength); + + if (NULL == pbBuffer) + { + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating file buffer!"); + } + + } else + { + /*-------------------------------------------------------*/ + /* Read the file into the buffer */ + /*-------------------------------------------------------*/ + if(ulFileLength != OS_FileRead(pvFile, 0, ulFileLength, pbBuffer)) + { + /* Error reading file */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading Firmware file from disk '%s'!", + tFileInfo.szFullFileName); + } + } else + { + uint8_t bLoadState = CIFXTKIT_DOWNLOAD_NONE; + if( CIFX_NO_ERROR == (lRet = DEV_ProcessFWDownload( ptDevInstance, + ulChannel, + tFileInfo.szFullFileName, + tFileInfo.szShortFileName, + ulFileLength, + pbBuffer, + &bLoadState, + DEV_TransferPacket, + NULL, + NULL, + NULL))) + { + switch(bLoadState & ~CIFXTKIT_DOWNLOAD_EXECUTED) + { + case CIFXTKIT_DOWNLOAD_MODULE: + /* Store name and module state */ + (void)OS_Strncpy(ptDevChannelCfg->atChannelData[ulChannel].szFileName, + tFileInfo.szShortFileName, + sizeof(ptDevChannelCfg->atChannelData[ulChannel].szFileName)); + + ptDevChannelCfg->atChannelData[ulChannel].fModuleLoaded = 1; + ptDevChannelCfg->atChannelData[ulChannel].ulFileSize = ulFileLength; + break; + + case CIFXTKIT_DOWNLOAD_FIRMWARE: + /* Store name and firmware state */ + /* Unselect all modules, because we have a firmware */ + OS_Memset(ptDevChannelCfg->atChannelData, 0, sizeof(ptDevChannelCfg->atChannelData)); + + /* Set firmware information */ + if( bLoadState & CIFXTKIT_DOWNLOAD_EXECUTED) + ptDevChannelCfg->fFWLoaded = 1; + + ptDevChannelCfg->atChannelData[ulChannel].ulFileSize = ulFileLength; + break; + + default: + /* nothing to do*/ + break; + } + } + } + + /* Free the file buffer */ + OS_Memfree(pbBuffer); + } + + /* Close the file */ + OS_FileClose(pvFile); + + } /*lint !e429 : pbBuffer not freed or returned */ + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Download configuration files to a specified device +* \param ptDevInstance Instance to download the files to +* \param ptDevChannelCfg Channel configuration data (downloaded files, etc.) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXDownloadCNFFiles(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + CIFXHANDLE hSysDevice = (CIFXHANDLE)&ptDevInstance->tSystemDevice; + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulChannel = 0; + + /* Process all channels */ + for(ulChannel = 0; ulChannel < CIFX_MAX_NUMBER_OF_CHANNELS; ++ulChannel) + { + CIFX_DEVICE_INFORMATION tDevInfo; + uint32_t ulIdx = 0; + uint32_t ulConfigCnt = 0; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = ulChannel; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Get information about the number of configuration files to download */ + ulConfigCnt = USER_GetConfigurationFileCount(&tDevInfo); + + /* Display information about configuration files to download */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Configuration download, checking / starting: CHANNEL#%d, %d file(s)!", + ulChannel, + ulConfigCnt); + } + + /*---------------------------------*/ + /* Process all configuration files */ + /*---------------------------------*/ + for(ulIdx = 0; ulIdx < ulConfigCnt; ++ulIdx) + { + CIFX_FILE_INFORMATION tFileInfo; + + OS_Memset(&tFileInfo, 0, sizeof(tFileInfo)); + + /* Read file information */ + if(!USER_GetConfigurationFile(&tDevInfo, ulIdx, &tFileInfo)) + { + /* Configuration file not returned by USER */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error querying configuration to load via USER_GetConfigurationFile (ulIdx=%u)!", + ulIdx); + } + } else + { + /*----------------------------*/ + /* Open the file */ + /*----------------------------*/ + uint32_t ulFileLength = 0; + void* pvFile = OS_FileOpen(tFileInfo.szFullFileName, &ulFileLength); + if(NULL == pvFile) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error opening configuration file '%s'!", + tFileInfo.szFullFileName); + } + } else + { + /*-------------------------------------------------------*/ + /* Create local buffer and read the file into the buffer */ + /*-------------------------------------------------------*/ + uint8_t* pbBuffer = (uint8_t*)OS_Memalloc(ulFileLength); + + if (NULL == pbBuffer) + { + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating file buffer!"); + } + + } else + { + /*-------------------------------------------------------*/ + /* Read the file into the buffer */ + /*-------------------------------------------------------*/ + if( ulFileLength != OS_FileRead(pvFile, 0, ulFileLength, pbBuffer)) + { + /* Error reading file */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading configuration file from disk '%s'!", + tFileInfo.szFullFileName); + } + } else + { + /* Check if we have to download the file or if it already exists on the hardware */ + int fDownload = 0; + if ( CIFX_NO_ERROR != (lRet = DEV_CheckForDownload( hSysDevice, + ulChannel, + &fDownload, + tFileInfo.szShortFileName, + pbBuffer, + ulFileLength, + DEV_TransferPacket, + NULL, + NULL))) + { + /* Display an error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error checking for download '%s'!", + tFileInfo.szFullFileName); + } + } else if(!fDownload) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Skipping download for file '%s'" \ + "[checksum identical]!", + tFileInfo.szFullFileName); + } + } else + { + /* Download the file stored in the buffer */ + lRet = xSysdeviceDownload(hSysDevice, + ulChannel, + DOWNLOAD_MODE_CONFIG, + tFileInfo.szShortFileName, + pbBuffer, + ulFileLength, + NULL, + NULL, + NULL); + if(CIFX_NO_ERROR != lRet) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error downloading configuration to device '%s'"\ + " - (lRet=0x%08X)!", + tFileInfo.szFullFileName, + lRet); + } + } else + { + /* We have downloaded a configuration file */ + ptDevChannelCfg->atChannelData[ulChannel].fCNFLoaded = 1; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Successfully downloaded the configuration to device '%s'!", + tFileInfo.szFullFileName); + } + } + } + } + + /* Free the file buffer */ + OS_Memfree(pbBuffer); + } + + /* Close the file */ + OS_FileClose(pvFile); + + } /*lint !e429 : pbBuffer not freed or returned */ + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read hardware identification +* \param ptDevInstance Device Instance +* \param pfnRecvPktCallback Callback for unexpected packets +* \param pvUser Callback user parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXReadHardwareIdent( PDEVICEINSTANCE ptDevInstance, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptSystemdevice = &ptDevInstance->tSystemDevice; + + HIL_HW_IDENTIFY_REQ_T tSendPkt; + CIFX_PACKET tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + /* Read firmware information */ + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tSendPkt.tHead.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_HW_IDENTIFY_REQ); + tSendPkt.tHead.ulLen = 0; + + /* Transfer packet */ + lRet = DEV_TransferPacket( ptSystemdevice, + (CIFX_PACKET*)&tSendPkt, + &tRecvPkt, + sizeof(tRecvPkt), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(tRecvPkt.tHeader.ulState))) ) + { + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "Error querying hardware information! (lRet=0x%08X)", + lRet); + } + } else + { + HIL_HW_IDENTIFY_CNF_T* ptData = (HIL_HW_IDENTIFY_CNF_T*)&tRecvPkt; + + ptDevInstance->eChipType = (CIFX_TOOLKIT_CHIPTYPE_E)LE32_TO_HOST(ptData->tData.ulChipTyp); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Read firmware identification +* \param ptDevInstance Device Instance +* \param ulChannel Channel number +* \param pfnRecvPktCallback Callback for unexpected packets +* \param pvUser Callback user parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXReadFirmwareIdent( PDEVICEINSTANCE ptDevInstance, uint32_t ulChannel, + PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + PCHANNELINSTANCE ptChannelInst = ptDevInstance->pptCommChannels[ulChannel]; + + HIL_FIRMWARE_IDENTIFY_REQ_T tSendPkt; + CIFX_PACKET tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + /* Read firmware information */ + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_DEFAULT_CHANNEL); + tSendPkt.tHead.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_FIRMWARE_IDENTIFY_REQ); + tSendPkt.tHead.ulLen = HOST_TO_LE32(sizeof(tSendPkt.tData)); + tSendPkt.tData.ulChannelId = HOST_TO_LE32(ulChannel); + + /* Transfer packet */ + lRet = DEV_TransferPacket( ptChannelInst, + (CIFX_PACKET*)&tSendPkt, + &tRecvPkt, + sizeof(tRecvPkt), + CIFX_TO_SEND_PACKET, + pfnRecvPktCallback, + pvUser); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(tRecvPkt.tHeader.ulState))) ) + { + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "Error querying firmware information! (lRet=0x%08X)", + lRet); + } + } else + { + HIL_FIRMWARE_IDENTIFY_CNF_T* ptData = (HIL_FIRMWARE_IDENTIFY_CNF_T*)&tRecvPkt; + + OS_Memcpy( &ptChannelInst->tFirmwareIdent, + &ptData->tData.tFirmwareIdentification, + sizeof(ptChannelInst->tFirmwareIdent)); + + (void)cifXConvertEndianess(0, + &ptChannelInst->tFirmwareIdent, + sizeof(ptChannelInst->tFirmwareIdent), + s_atFWIdentifyConv, + sizeof(s_atFWIdentifyConv) / sizeof(s_atFWIdentifyConv[0])); + } + + return lRet; +} + + +/*****************************************************************************/ +/*! Start a downloaded module +* \param ptDevInstance Instance to download the files to +* \param ulChannelNumber Channel number +* \param pszModuleName Module name +* \param ulFileSize Length of the file data +* \param pfnRecvPktCallback Callback for unexpected packets +* \param pvUser Callback user parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXStartModule( PDEVICEINSTANCE ptDevInstance, uint32_t ulChannelNumber, char* pszModuleName, + uint32_t ulFileSize, PFN_RECV_PKT_CALLBACK pfnRecvPktCallback, void* pvUser) +{ + int32_t lRet = CIFX_NO_ERROR; + union + { + CIFX_PACKET tPacket; + HIL_MODLOAD_LOAD_AND_RUN_MODULE_REQ_T tLoadAndRunReq; + HIL_MODLOAD_RUN_MODULE_REQ_T tRunReq; + } uSendPacket; + + HIL_PACKET_HEADER_T tRecvPacket; + uint32_t ulNameLength = 0; + char* pbCopyPtr = NULL; + uint32_t ulCopySize = 0; + + OS_Memset(&uSendPacket, 0, sizeof(uSendPacket)); + OS_Memset(&tRecvPacket, 0, sizeof(tRecvPacket)); + + ulNameLength = OS_Strlen(pszModuleName) + 1; + + if( eCIFX_DEVICE_FLASH_BASED == ptDevInstance->eDeviceType) + { + /* comX Modules are stored in the FLASH file system and must be started by a modul LOAD_AND_RUN command */ + + /* Create start command */ + uSendPacket.tPacket.tHeader.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + uSendPacket.tPacket.tHeader.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_DEFAULT_CHANNEL); + uSendPacket.tPacket.tHeader.ulCmd = HOST_TO_LE32(HIL_MODLOAD_CMD_LOAD_AND_RUN_MODULE_REQ); + uSendPacket.tPacket.tHeader.ulLen = 0; + uSendPacket.tPacket.tHeader.ulState = 0; + uSendPacket.tPacket.tHeader.ulExt = 0; + + /* Add request specific data to the packet data area */ + uSendPacket.tLoadAndRunReq.tData.ulChannel = HOST_TO_LE32(ulChannelNumber); + + /* Adjust packet length */ + uSendPacket.tPacket.tHeader.ulLen = HOST_TO_LE32( (uint32_t)(sizeof(uSendPacket.tLoadAndRunReq.tData) + ulNameLength) ); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPacket.tPacket.abData[0])) + sizeof(uSendPacket.tLoadAndRunReq.tData); + ulCopySize = min( (sizeof(uSendPacket.tPacket.abData) - sizeof(uSendPacket.tLoadAndRunReq.tData)), ulNameLength); + + /* Insert file name */ + (void)OS_Strncpy( pbCopyPtr, pszModuleName, ulCopySize); + + } else + { + /* cifX card do not have a FLASH, modules are loaded into memory and will be started by a RUN_MODULE command */ + + /* Create start command */ + uSendPacket.tPacket.tHeader.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + uSendPacket.tPacket.tHeader.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_DEFAULT_CHANNEL); + uSendPacket.tPacket.tHeader.ulCmd = HOST_TO_LE32(HIL_MODLOAD_CMD_RUN_MODULE_REQ); + uSendPacket.tPacket.tHeader.ulLen = 0; + uSendPacket.tPacket.tHeader.ulState = 0; + uSendPacket.tPacket.tHeader.ulExt = 0; + + /* Add request specific data to the packet data area */ + uSendPacket.tRunReq.tData.ulChannel = HOST_TO_LE32(ulChannelNumber); + + /* Adjust packet length */ + uSendPacket.tPacket.tHeader.ulLen = HOST_TO_LE32( (uint32_t)(sizeof(uSendPacket.tRunReq.tData) + ulNameLength) ); + + /* Setup copy buffer and copy size */ + pbCopyPtr = ((char*)(&uSendPacket.tPacket.abData[0])) + sizeof(uSendPacket.tRunReq.tData); + ulCopySize = min( (sizeof(uSendPacket.tPacket.abData) - sizeof(uSendPacket.tRunReq.tData)), ulNameLength); + + /* Insert file name */ + (void)OS_Strncpy( pbCopyPtr, pszModuleName, ulCopySize); + + } + + /* Module loading will relocate the module with the last packet. + So the confirmation packet takes longer, depending on the + file size (and contained firmware). + Measurements showed that for every 100kB the module needs + one additional second for relocation */ + lRet = DEV_TransferPacket( &ptDevInstance->tSystemDevice, + &uSendPacket.tPacket, + (CIFX_PACKET*)&tRecvPacket, + sizeof(tRecvPacket), + (uint32_t)(CIFX_TO_FIRMWARE_START + (ulFileSize / (100 * 1024)) * 1000), + pfnRecvPktCallback, + pvUser); + + if ( ( CIFX_NO_ERROR != lRet) || + ( SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(tRecvPacket.ulSta))) ) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error starting module '%s' on Channel %d - (lRet=0x%08X)!", + pszModuleName, + ulChannelNumber, + lRet); + } + } else + { + /* Check if we have an instance for the channel! */ + /* Note: On a system start we probably have no channel because they are created after the start handling */ + uint32_t ulTimeout = 1000L; + + lRet = CIFX_DEV_NOT_READY; + + if( ulChannelNumber < ptDevInstance->ulCommChannelCount) + { + uint32_t ulDiffTime = 0L; + uint32_t lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* We should have such a communication channel */ + do + { + if (DEV_IsReady(ptDevInstance->pptCommChannels[ulChannelNumber])) + { + lRet = CIFX_NO_ERROR; + break; + } + + /* Check time */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + + /* Wait until firmware is down */ + OS_Sleep(1); + + } while (ulDiffTime < ulTimeout); + } else + { + /* We do not have a communication channel number, */ + /* probably the first start and channels created afterwards */ + OS_Sleep (ulTimeout); + + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Start firmware on RAM based devices +* \param ptDevInstance Instance to download the files to +* \param ptDevChannelCfg Device configuration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartRAMFirmware(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + /* On a RAM based device all modules are downloaded using HIL_FILE_XFERMODULE + so we need to start them using + 1. RUN_MODULE for .NXO files + 2. CHANNEL_INSTANTIATE_REQ for .NXF files + + If only a configuration was downloaded, we need to execute a CHANNEL_INIT + so the stack uses the new configuration */ + int32_t lRet = CIFX_NO_ERROR; + + /* ---------------------------------------------*/ + /* Check if we have to process loadable modules */ + /* ---------------------------------------------*/ + if( ptDevInstance->fModuleLoad) + { + /* We have loadable modules, the base OS is already running */ + /* We have not to process CNF files, because module load will also load the actual configuration */ + /* Start modules */ + uint32_t ulChNum = 0; + for ( ulChNum = 0; ulChNum < CIFX_MAX_NUMBER_OF_CHANNELS; ulChNum++) + { + if( ptDevChannelCfg->atChannelData[ulChNum].fModuleLoaded) + { + /* Start modules */ + (void)cifXStartModule( ptDevInstance, ulChNum, ptDevChannelCfg->atChannelData[ulChNum].szFileName, + ptDevChannelCfg->atChannelData[ulChNum].ulFileSize, NULL, NULL); + } + } + + /* ---------------------------------------------*/ + /* Check if we have a firmware loaded */ + /* ---------------------------------------------*/ + } else if(ptDevChannelCfg->fFWLoaded == 1) + { + /* We have to send a CHANNEL_INIT to start the firmware */ + uint32_t ulChannel = 0; + + /* We doing CHANNELINIT, only possible via a packet on the system channel */ + HIL_CHANNEL_INSTANTIATE_REQ_T tSendPkt; + HIL_CHANNEL_INSTANTIATE_CNF_T tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + /* Create start request */ + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tSendPkt.tHead.ulLen = HOST_TO_LE32(sizeof(HIL_CHANNEL_INSTANTIATE_REQ_DATA_T)); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_CHANNEL_INSTANTIATE_REQ); + tSendPkt.tData.ulChannelNo = HOST_TO_LE32(ulChannel); + + /* Transfer packet */ + lRet = DEV_TransferPacket( &ptDevInstance->tSystemDevice, + (CIFX_PACKET*)&tSendPkt, + (CIFX_PACKET*)&tRecvPkt, + sizeof(HIL_MODULE_INSTANTIATE_CNF_T), + CIFX_TO_SEND_PACKET, + NULL, + NULL); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != (lRet = LE32_TO_HOST(tRecvPkt.tHead.ulSta))) ) + { + /* Error starting the firmware */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error sending Start request for Firmware (lRet=0x%08X)!", + lRet); + } + } else + { + /*-------------------------------------------- + Wait until READY is gone!!!!!!!!!!!!!!!!!!! + --------------------------------------------*/ + if (!DEV_WaitForNotReady_Poll( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START)) + { + lRet = CIFX_DEV_RESET_TIMEOUT; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error waiting for firmware to leave reset state! (lRet=0x%08X)", + lRet); + } + + } else + { + /*-------------------------------------------- + Wait until READY is back + --------------------------------------------*/ + /* Check if firmware is READY because we need the DPM Layout */ + if (!DEV_WaitForReady_Poll( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START)) + { + lRet = CIFX_DEV_NOT_READY; + + /* READY state not reached */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error device does not reach READY state! (lRet=0x%08X)", + lRet); + } + } + } + } + } + + if (CIFX_NO_ERROR == lRet) + { + /* Display a system error if NSF_ERROR is set */ + if( ptDevInstance->tSystemDevice.usNetxFlags & NSF_ERROR) + { + /* Trace system error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + uint32_t ulError = 0; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysCh = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->tSystemDevice.pbDPMChannelStart; + + if(0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemError)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System error information, (SystemError=0x%08X)!", + ulError); + } + + if( 0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemStatus)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System state information, (SystemState=0x%08X)!", + ulError); + } + } + } + + /* Display channel READY reached */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "System channel is READY!"); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Start Firmware on flash based devices +* \param ptDevInstance Instance to download the files to +* \param ptDevChannelCfg Device configuration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartFlashFirmware(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + /* + LOADABLE MODULES (.NXO): + -------------------------------- + - We need a running Base O/S module. + - Modules must be loaded with LOAD_AND_RUN_MODULE_REQ + - Available configurations are automatically activated if a module is started + + FIRMWARE (NXF/NXM/MOD) download: + -------------------------------- + - The new firmware must be started by sending a SYSTEM_RESTART to the card + - The configuration will be automatically used by the FW + + CONFIGURATION download: + ----------------------- + - The new configuration must be activated by sending a CHANNEL_INIT to the card + */ + int32_t lRet = CIFX_NO_ERROR; + + /* Check if we have to process loadable modules */ + if( ptDevInstance->fModuleLoad) + { + /* We have loadable modules, the base OS is already running. A RESET is necessary if modules are started */ + /* We have not to process CNF files, because module load will also load the actual configuration */ + int fSystemStartDone = 0; + + /* Start modules */ + uint32_t ulChNum = 0; + for ( ulChNum = 0; ulChNum < CIFX_MAX_NUMBER_OF_CHANNELS; ulChNum++) + { + if( ptDevChannelCfg->atChannelData[ulChNum].fModuleLoaded) + { + if( 0 == fSystemStartDone) + { + /* We have to do a SYSTEMSTART before loading a Module again! Maybe it is already running */ + if ( CIFX_NO_ERROR != (lRet = DEV_DoSystemStart( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START, 0))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error during system start! (lRet=0x%08X)", + lRet); + } + break; /* No more starts possible */ + } + fSystemStartDone = 1; /* No more starts necessary */ + } + + /* Start modules */ + (void)cifXStartModule( ptDevInstance, ulChNum, ptDevChannelCfg->atChannelData[ulChNum].szFileName, + ptDevChannelCfg->atChannelData[ulChNum].ulFileSize, NULL, NULL); + } + } + } else + { + /* Check if we have a firmware loaded */ + if(ptDevChannelCfg->fFWLoaded == 1) + { + /* We have to do a SYSTEMSTART */ + if ( CIFX_NO_ERROR != (lRet = DEV_DoSystemStart( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START, 0))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error during system start! (lRet=0x%08X)", + lRet); + } + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "System start done!", + lRet); + } + } + } + } + + if (CIFX_NO_ERROR == lRet) + { + /* Display a system error if NSF_ERROR is set */ + if( ptDevInstance->tSystemDevice.usNetxFlags & NSF_ERROR) + { + /* Trace system error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + uint32_t ulError = 0; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysCh = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->tSystemDevice.pbDPMChannelStart; + + if(0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemError)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System error information, (SystemError=0x%08X)!", + ulError); + } + + if( 0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemStatus)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System state information, (SystemState=0x%08X)!", + ulError); + } + } + } + + /* Display channel READY reached */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "System channel is READY!"); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Perform a CHANNEL_INIT on all channels that received a new configuration +* on flash based devices +* \param ptDevInstance Device instance +* \param ptDevChannelCfg Device configuration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartFlashConfiguration(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + if(!ptDevChannelCfg->fFWLoaded) + { + /* Only activate configuration if no firmware has been loaded on a flash based + device, as the systemstart after FW Download will automatically load database */ + + /* Process all channels and send a CHANNEL_INIT to each one */ + uint32_t ulChannel = 0; + for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ++ulChannel) + { + int32_t lChannelRet = CIFX_NO_ERROR; + + if ( ptDevChannelCfg->atChannelData[ulChannel].fCNFLoaded) + { + lChannelRet = DEV_DoChannelInit(ptDevInstance->pptCommChannels[ulChannel], CIFX_TO_SEND_PACKET); + + if(CIFX_NO_ERROR == lChannelRet) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Successfully performed channel init on channel #%d!", + ulChannel); + } + } else + { + /* Error performing channel init */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error performing channel init on channel #%d (lRet=0x%08X)!", + ulChannel, + lChannelRet); + } + } + } + } + } + + /* Always return OK here, so the user is able to access the device later on. + Any error during channel init is not fatal (e.g. maybe a missing master license) */ + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Starts a device from ground up +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXCreateSystemDevice(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet = CIFX_NO_ERROR; + + /* Initialize System Channel which must be present */ + uint8_t* pbDpm = ptDevInstance->pbDPM; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)pbDpm; + HIL_DPM_SYSTEM_CHANNEL_INFO_T* ptSysChannelInfo = (HIL_DPM_SYSTEM_CHANNEL_INFO_T*)&ptSysChannel->atChannelInfo[HIL_DPM_SYSTEM_CHANNEL_INDEX]; + PCHANNELINSTANCE ptSystemDevice = &ptDevInstance->tSystemDevice; + + uint32_t ulMBXSize = 0; + CIFX_DEVICE_INFORMATION tDevInfo; + uint32_t ulDeviceIdx = 0; + uint32_t ulSysChannelSize = 0; + void* pvSendMBXMutex = NULL; + void* pvRecvMBXMutex = NULL; + void* pvInitMutex = NULL; + void* pvLock = NULL; + + if (NULL == (pvSendMBXMutex = OS_CreateMutex()) || + NULL == (pvRecvMBXMutex = OS_CreateMutex()) || + NULL == (pvInitMutex = OS_CreateMutex()) || + NULL == (pvLock = OS_CreateLock()) ) + { + lRet = CIFX_INVALID_POINTER; + + OS_DeleteMutex(pvSendMBXMutex); + OS_DeleteMutex(pvRecvMBXMutex); + OS_DeleteMutex(pvInitMutex); + OS_DeleteLock(pvLock); + pvSendMBXMutex = NULL; + pvRecvMBXMutex = NULL; + pvInitMutex = NULL; + pvLock = NULL; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating buffers for system device!"); + } + + } else + { + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + ulMBXSize = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptSysChannelInfo->usSizeOfMailbox)) / 2; + ulSysChannelSize = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannelInfo->ulSizeOfChannel)); + + /* Setup pointer to global netX register block */ + ptDevInstance->ptGlobalRegisters = (PNETX_GLOBAL_REG_BLOCK)(ptDevInstance->pbDPM + + ptDevInstance->ulDPMSize - + sizeof(NETX_GLOBAL_REG_BLOCK)); + + /* Initialize DEVICEINSTANCE */ + ptDevInstance->ulDeviceNumber = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemInfo.ulDeviceNumber)); + ptDevInstance->ulSerialNumber = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannel->tSystemInfo.ulSerialNumber)); + ptDevInstance->ulSlotNumber = HWIF_READ8(ptDevInstance, ptSysChannel->tSystemInfo.bDevIdNumber); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Info:"); + + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + " - Device Number : %u", + ptDevInstance->ulDeviceNumber); + + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + " - Serial Number : %u", + ptDevInstance->ulSerialNumber); + + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + " - Slot Number : %u", + ptDevInstance->ulSlotNumber); + } + + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Get the user alias name */ + USER_GetAliasName(&tDevInfo, sizeof(ptDevInstance->szAlias), ptDevInstance->szAlias); + + /* Check if alias is unique */ + if(OS_Strlen(ptDevInstance->szAlias) > 0) + { + OS_EnterLock(g_pvTkitLock); + + for(ulDeviceIdx = 0; ulDeviceIdx < g_ulDeviceCount; ++ulDeviceIdx) + { + if(OS_Strcmp(g_pptDevices[ulDeviceIdx]->szAlias, + ptDevInstance->szAlias) == 0) + { + /* Duplicate alias found */ + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "Duplicate alias '%s' passed (DevNr=%u, SerNr=%u), Alias will be removed!", + ptDevInstance->szAlias, + ptDevInstance->ulDeviceNumber, + ptDevInstance->ulSerialNumber); + } + + OS_Memset(ptDevInstance->szAlias, 0, sizeof(ptDevInstance->szAlias)); + } + } + OS_LeaveLock(g_pvTkitLock); + } + + /* TODO: Systemchannel Handshake Flags may be inside Systemchannel in the future */ + ptDevInstance->pbHandshakeBlock = &pbDpm[ulSysChannelSize]; + ptSystemDevice->ptHandshakeCell = (HIL_DPM_HANDSHAKE_CELL_T*)ptDevInstance->pbHandshakeBlock; + + ptSystemDevice->pbDPMChannelStart = pbDpm; + ptSystemDevice->bHandshakeWidth = HIL_HANDSHAKE_SIZE_8BIT; + + /* Create send mailbox */ + ptSystemDevice->tSendMbx.pvSendMBXMutex = pvSendMBXMutex; + ptSystemDevice->tSendMbx.bSendCMDBitoffset = HSF_SEND_MBX_CMD_BIT_NO; + ptSystemDevice->tSendMbx.ulSendCMDBitmask = 1 << HSF_SEND_MBX_CMD_BIT_NO; + ptSystemDevice->tSendMbx.ptSendMailboxStart = (HIL_DPM_SEND_MAILBOX_BLOCK_T*) + (pbDpm + LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptSysChannelInfo->usMailboxStartOffset))); + + ptSystemDevice->tSendMbx.ulSendMailboxLength = ulMBXSize - + (uint32_t)(sizeof(*(ptSystemDevice->tSendMbx.ptSendMailboxStart)) - + sizeof(ptSystemDevice->tSendMbx.ptSendMailboxStart->abSendMailbox)); + + /* Create receive mailbox */ + ptSystemDevice->tRecvMbx.pvRecvMBXMutex = pvRecvMBXMutex; + ptSystemDevice->tRecvMbx.bRecvACKBitoffset = HSF_RECV_MBX_ACK_BIT_NO; + ptSystemDevice->tRecvMbx.ulRecvACKBitmask = (1 << HSF_RECV_MBX_ACK_BIT_NO); + ptSystemDevice->tRecvMbx.ptRecvMailboxStart = (HIL_DPM_RECV_MAILBOX_BLOCK_T*)( (uint8_t*)(ptSystemDevice->tSendMbx.ptSendMailboxStart) + ulMBXSize); + + ptSystemDevice->tRecvMbx.ulRecvMailboxLength = ulMBXSize - + (uint32_t)(sizeof(*(ptSystemDevice->tRecvMbx.ptRecvMailboxStart)) - + sizeof(ptSystemDevice->tRecvMbx.ptRecvMailboxStart->abRecvMailbox)); + + ptSystemDevice->ulDPMChannelLength = ulSysChannelSize; + + ptSystemDevice->pvLock = pvLock; + ptSystemDevice->pvInitMutex = pvInitMutex; + + ptSystemDevice->pvDeviceInstance = (void*)ptDevInstance; + + ptSystemDevice->fIsSysDevice = 1; + + /* Read actual Host state, in case they differ from 0 */ + DEV_ReadHostFlags(&ptDevInstance->tSystemDevice, 1); + DEV_ReadHandshakeFlags(&ptDevInstance->tSystemDevice, 1, 0); + + + /*-------------------------------------------- + Check if READY is available + --------------------------------------------*/ + /* Check if system channel is READY before exceuting additional functions on it */ + if (!DEV_WaitForReady_Poll( &ptDevInstance->tSystemDevice, CIFX_TO_FIRMWARE_START)) + { + lRet = CIFX_DEV_NOT_READY; + + /* READY state not reached */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error device does not reach READY state! (lRet=0x%08X)", + lRet); + } + } + + /* Display actual system state if available */ + if( ptDevInstance->tSystemDevice.usNetxFlags & NSF_ERROR) + { + /* Trace system error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + uint32_t ulError = 0; + HIL_DPM_SYSTEM_CHANNEL_T* ptSysCh = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->tSystemDevice.pbDPMChannelStart; + + if(0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemError)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System error information, (SystemError=0x%08X)!", + ulError); + } + + if( 0 != (ulError = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysCh->tSystemState.ulSystemStatus)))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "System state information, (SystemState=0x%08X)!", + ulError); + } + } + } + } + + return lRet; /*lint !e438 : Last value assigned not used */ +} + +/*****************************************************************************/ +/*! Reads the channel layouts and the according subblock layouts +* \param ptDevInstance Instance to configure the layout for +* \param ptChannel Instance to channel, the layout it saved to +* \param ulNumOfBlocks Number of blocks to read from this channel +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXReadChannelLayout(PDEVICEINSTANCE ptDevInstance, PCHANNELINSTANCE ptChannel, uint32_t ulNumOfBlocks) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulIdx = 0; + uint32_t ulPacketIdx = 0; + + HIL_DPM_GET_BLOCK_INFO_REQ_T tSendPkt; + HIL_DPM_GET_BLOCK_INFO_CNF_T tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Reading Channel Info on Channel#%d (DPM Start Offset=0x%08X Length=0x%08X)", + ptChannel->ulChannelNumber, + (uint32_t)(ptChannel->pbDPMChannelStart - ptDevInstance->pbDPM), + ptChannel->ulDPMChannelLength); + + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "-------------------------------------------------------------------------"); + } + + /* Read the information for the given block ID */ + /* Create subblock read request packet */ + tSendPkt.tHead.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tSendPkt.tHead.ulLen = HOST_TO_LE32(sizeof(tSendPkt.tData)); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_DPM_GET_BLOCK_INFO_REQ); + + /* Read subblock information */ + for ( ulIdx = 0; ulIdx < ulNumOfBlocks; ulIdx++) + { + /* Insert subblock request packet data */ + ++ulPacketIdx; + tSendPkt.tHead.ulId = HOST_TO_LE32(ulPacketIdx); /* Insert Packet number */ + + /* Insert subblock request packet data */ + tSendPkt.tData.ulAreaIndex = HOST_TO_LE32(ptChannel->ulBlockID); + tSendPkt.tData.ulSubblockIndex = HOST_TO_LE32(ulIdx); /* Insert Block index into packet */ + + /* Transfer request */ + if ( (lRet = DEV_TransferPacket( &ptDevInstance->tSystemDevice, + (CIFX_PACKET*)&tSendPkt, + (CIFX_PACKET*)&tRecvPkt, + sizeof(HIL_DPM_GET_BLOCK_INFO_CNF_T), + CIFX_TO_SEND_PACKET, + NULL, + NULL)) != CIFX_NO_ERROR) + { + /* Display errors */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading subblock information, Error: 0x%08X (AreaIndex=%d, SubblockIndex=%d)", + lRet, + LE32_TO_HOST(tSendPkt.tData.ulAreaIndex), + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex)); + } + } else if ( SUCCESS_HIL_OK != LE32_TO_HOST(tRecvPkt.tHead.ulSta)) + { + /* Display errors */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading subblock information, error firmware answer, Error: 0x%08X (AreaIndex=%d, SubblockIndex=%d)", + LE32_TO_HOST(tRecvPkt.tHead.ulSta), + LE32_TO_HOST(tSendPkt.tData.ulAreaIndex), + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex)); + } + } else + { + /*--------------------------------------------------------*/ + /* Check block information and create corresponding areas */ + /*--------------------------------------------------------*/ + switch(LE32_TO_HOST(tRecvPkt.tData.ulType) & HIL_BLOCK_MASK) + { + /*---------------------------*/ + /* Block types not supported */ + /*---------------------------*/ + case HIL_BLOCK_UNDEFINED: + case HIL_BLOCK_UNKNOWN: + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Undefined/Unknown subblock type (Channel=%d, Block=%d, Type=0x%08X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulType)); + } + break; + + /*---------------------------*/ + /* Create DATA image block */ + /*---------------------------*/ + case HIL_BLOCK_DATA_IMAGE: + case HIL_BLOCK_DATA_IMAGE_HI_PRIO: + { + switch(LE16_TO_HOST(tRecvPkt.tData.usFlags) & HIL_DIRECTION_MASK) + { + /* Output Data image */ + case HIL_DIRECTION_OUT: + { + PIOINSTANCE ptIOOutputInstance = (PIOINSTANCE)OS_Memalloc(sizeof(*ptIOOutputInstance)); + void* pvMutex = NULL; + + if (NULL == ptIOOutputInstance || + NULL == (pvMutex = OS_CreateMutex()) ) + { + lRet = CIFX_INVALID_POINTER; + + OS_Memfree(ptIOOutputInstance); + OS_DeleteMutex(pvMutex); + ptIOOutputInstance = NULL; + pvMutex = NULL; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating IO output instance buffer!"); + } + + } else + { + OS_Memset(ptIOOutputInstance, 0, sizeof(*ptIOOutputInstance)); + + ptIOOutputInstance->pbDPMAreaStart = ptChannel->pbDPMChannelStart + LE32_TO_HOST(tRecvPkt.tData.ulOffset); + ptIOOutputInstance->ulDPMAreaLength = LE32_TO_HOST(tRecvPkt.tData.ulSize); + ptIOOutputInstance->bHandshakeBit = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptIOOutputInstance->usHandshakeMode = LE16_TO_HOST(tRecvPkt.tData.usHandshakeMode); + + if((LE32_TO_HOST(tRecvPkt.tData.ulType) & HIL_BLOCK_MASK) == HIL_BLOCK_DATA_IMAGE) + ptIOOutputInstance->ulNotifyEvent = CIFX_NOTIFY_PD0_OUT; + else + ptIOOutputInstance->ulNotifyEvent = CIFX_NOTIFY_PD1_OUT; + + /* Create area mutex object */ + ptIOOutputInstance->pvMutex = pvMutex; + + switch(ptIOOutputInstance->usHandshakeMode) + { + case HIL_IO_MODE_BUFF_DEV_CTRL: + ptIOOutputInstance->bHandshakeBitState = HIL_FLAGS_NOT_EQUAL; + break; + + case HIL_IO_MODE_BUFF_HST_CTRL: + ptIOOutputInstance->bHandshakeBitState = HIL_FLAGS_EQUAL; + break; + + default: + /* Unknown or non handshake */ + ptIOOutputInstance->bHandshakeBitState = HIL_FLAGS_NONE; + break; + } + + ++ptChannel->ulIOOutputAreas; + ptChannel->pptIOOutputAreas = (PIOINSTANCE*)OS_Memrealloc(ptChannel->pptIOOutputAreas, + ptChannel->ulIOOutputAreas * (uint32_t)sizeof(ptIOOutputInstance)); + + if (NULL == ptChannel->pptIOOutputAreas) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating IO output area buffer!"); + } + + } else + { + ptChannel->pptIOOutputAreas[ptChannel->ulIOOutputAreas - 1] = ptIOOutputInstance; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "I/O Output Subblock found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + } + } /*lint !e438 !e593 : Last value assigned not used / ptIOOutputInstance not freed */ + break; + + /* Input Data image */ + case HIL_DIRECTION_IN: + { + PIOINSTANCE ptIOInputInstance = (PIOINSTANCE)OS_Memalloc(sizeof(*ptIOInputInstance)); + void* pvMutex = NULL; + + if (NULL == ptIOInputInstance || + NULL == (pvMutex = OS_CreateMutex()) ) + { + lRet = CIFX_INVALID_POINTER; + + OS_Memfree(ptIOInputInstance); + OS_DeleteMutex(pvMutex); + ptIOInputInstance = NULL; + pvMutex = NULL; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating IO input instance buffer!"); + } + + } else + { + OS_Memset(ptIOInputInstance, 0, sizeof(*ptIOInputInstance)); + + ptIOInputInstance->pbDPMAreaStart = ptChannel->pbDPMChannelStart + LE32_TO_HOST(tRecvPkt.tData.ulOffset); + ptIOInputInstance->ulDPMAreaLength = LE32_TO_HOST(tRecvPkt.tData.ulSize); + ptIOInputInstance->bHandshakeBit = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptIOInputInstance->usHandshakeMode = LE16_TO_HOST(tRecvPkt.tData.usHandshakeMode); + + if((LE32_TO_HOST(tRecvPkt.tData.ulType) & HIL_BLOCK_MASK) == HIL_BLOCK_DATA_IMAGE) + ptIOInputInstance->ulNotifyEvent = CIFX_NOTIFY_PD0_IN; + else + ptIOInputInstance->ulNotifyEvent = CIFX_NOTIFY_PD1_IN; + + /* Create area mutex object */ + ptIOInputInstance->pvMutex = pvMutex; + + switch(ptIOInputInstance->usHandshakeMode) + { + case HIL_IO_MODE_BUFF_DEV_CTRL: + ptIOInputInstance->bHandshakeBitState = HIL_FLAGS_NOT_EQUAL; + break; + + case HIL_IO_MODE_BUFF_HST_CTRL: + ptIOInputInstance->bHandshakeBitState = HIL_FLAGS_EQUAL; + break; + + default: + /* Unknown or non handshake */ + ptIOInputInstance->bHandshakeBitState = HIL_FLAGS_NONE; + break; + } + + ++ptChannel->ulIOInputAreas; + ptChannel->pptIOInputAreas = (PIOINSTANCE*)OS_Memrealloc(ptChannel->pptIOInputAreas, + ptChannel->ulIOInputAreas * (uint32_t)sizeof(ptIOInputInstance)); + + if (NULL == ptChannel->pptIOInputAreas) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating IO input area buffer!"); + } + + } else + { + ptChannel->pptIOInputAreas[ptChannel->ulIOInputAreas- 1] = ptIOInputInstance; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "I/O Input Subblock found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + } + } /*lint !e438 !e593 : Last value assigned not used / ptIOOutputInstance not freed */ + break; + + default: + /* Firmware returned an invalid IO subblock info (neither IN, nor OUT), + This should never happen */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Invalid I/O direction found! (Channel=%d, Block=%d,Dir=0x%08X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE16_TO_HOST(tRecvPkt.tData.usFlags) & HIL_DIRECTION_MASK); + } + break; + } /* end creating IO data block */ + } /* end IO sub block handling */ + break; + + /*---------------------------*/ + /* Create MAILBOX block */ + /*---------------------------*/ + case HIL_BLOCK_MAILBOX: + { + switch(LE16_TO_HOST(tRecvPkt.tData.usFlags) & HIL_DIRECTION_MASK) + { + /* Create output mailbox */ + case HIL_DIRECTION_OUT: + { + /* Create mailbox synchronisation object */ + if (NULL == (ptChannel->tSendMbx.pvSendMBXMutex = OS_CreateMutex())) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating output mailbox buffer!"); + } + } else + { + /* Create mailbox */ + ptChannel->tSendMbx.ptSendMailboxStart = (HIL_DPM_SEND_MAILBOX_BLOCK_T*)( ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset)); + ptChannel->tSendMbx.ulSendMailboxLength = LE32_TO_HOST(tRecvPkt.tData.ulSize) - + (uint32_t)(sizeof(*(ptChannel->tSendMbx.ptSendMailboxStart)) - + sizeof(ptChannel->tSendMbx.ptSendMailboxStart->abSendMailbox)); + + ptChannel->tSendMbx.bSendCMDBitoffset = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptChannel->tSendMbx.ulSendCMDBitmask = (1 << ptChannel->tSendMbx.bSendCMDBitoffset); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Output Mailbox found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + } + break; + + /* Create input mailbox */ + case HIL_DIRECTION_IN: + { + /* Create mailbox synchronisation object */ + if (NULL == (ptChannel->tRecvMbx.pvRecvMBXMutex = OS_CreateMutex())) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating input mailbox buffer!"); + } + + } else + { + /* Create receive mailbox */ + ptChannel->tRecvMbx.ptRecvMailboxStart = (HIL_DPM_RECV_MAILBOX_BLOCK_T*)( ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset)); + ptChannel->tRecvMbx.ulRecvMailboxLength = LE32_TO_HOST(tRecvPkt.tData.ulSize) - + (uint32_t)(sizeof(*(ptChannel->tRecvMbx.ptRecvMailboxStart)) - + sizeof(ptChannel->tRecvMbx.ptRecvMailboxStart->abRecvMailbox)); + ptChannel->tRecvMbx.bRecvACKBitoffset = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptChannel->tRecvMbx.ulRecvACKBitmask = (1 << ptChannel->tRecvMbx.bRecvACKBitoffset); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Input Mailbox found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + } + break; + + default: + /* Firmware returned an invalid mailbox subblock info (neither IN, nor OUT) */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Invalid mailbox direction found! (Channel=%d, Block=%d,Dir=0x%08X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE16_TO_HOST(tRecvPkt.tData.usFlags) & HIL_DIRECTION_MASK); + } + break; + } /* end creating Send/Receive MAILBOX block */ + } /* end MAILBOX sub block handling */ + break; + + /*-------------------------------*/ + /* Create CONTROL/PARAMTER block */ + /*-------------------------------*/ + case HIL_BLOCK_CTRL_PARAM: + { + ptChannel->ptControlBlock = (HIL_DPM_CONTROL_BLOCK_T*)( ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset)); + ptChannel->bControlBlockBit = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptChannel->ulControlBlockSize = LE32_TO_HOST(tRecvPkt.tData.ulSize); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Control block found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + break; + + /*-------------------------------*/ + /* Create Common STATE block */ + /*-------------------------------*/ + case HIL_BLOCK_COMMON_STATE: + { + ptChannel->ptCommonStatusBlock = (HIL_DPM_COMMON_STATUS_BLOCK_T*)(ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset)); + ptChannel->bCommonStatusBit = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptChannel->ulCommonStatusSize = LE32_TO_HOST(tRecvPkt.tData.ulSize); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Common Status block found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + break; + + /*-------------------------------*/ + /* Create Extended STATE block */ + /*-------------------------------*/ + case HIL_BLOCK_EXTENDED_STATE: + { + ptChannel->ptExtendedStatusBlock = (HIL_DPM_EXTENDED_STATUS_BLOCK_T*)(ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset)); + ptChannel->bExtendedStatusBit = (uint8_t)LE16_TO_HOST(tRecvPkt.tData.usHandshakeBit); + ptChannel->ulExtendedStatusSize = LE32_TO_HOST(tRecvPkt.tData.ulSize); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Extended Status block found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + break; + + /*-------------------------------*/ + /* Create User block */ + /*-------------------------------*/ + case HIL_BLOCK_USER: + { + PUSERINSTANCE ptUserInstance = (PUSERINSTANCE)OS_Memalloc(sizeof(*ptUserInstance)); + + if (NULL == ptUserInstance) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating user block instance buffer!"); + } + + } else + { + OS_Memset(ptUserInstance, 0, sizeof(*ptUserInstance)); + + ptUserInstance->pbUserBlockStart = ptChannel->pbDPMChannelStart + + LE32_TO_HOST(tRecvPkt.tData.ulOffset); + ptUserInstance->ulUserBlockLength = LE32_TO_HOST(tRecvPkt.tData.ulSize); + + ++ptChannel->ulUserAreas; + ptChannel->pptUserAreas = (PUSERINSTANCE*)OS_Memrealloc(ptChannel->pptUserAreas, + ptChannel->ulUserAreas * (uint32_t)sizeof(ptUserInstance)); + + if (NULL == ptChannel->pptUserAreas) + { + lRet = CIFX_INVALID_POINTER; + + OS_Memfree(ptUserInstance); + ptUserInstance = NULL; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating user area buffer!"); + } + + } else + { + ptChannel->pptUserAreas[ptChannel->ulUserAreas- 1] = ptUserInstance; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "User block found (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize)); + } + } + } + } /*lint !e438 : Last value assigned not used */ + break; + + /*-------------------------------*/ + /* DEFAULT / Unknown */ + /*-------------------------------*/ + default: + /* Unknown block type, this should never happen */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Invalid subblock information found! (Channel=%d, Block=%d, Offset=0x%08X, Len=0x%04X, Type=%u)", + ptChannel->ulChannelNumber, + LE32_TO_HOST(tSendPkt.tData.ulSubblockIndex), + LE32_TO_HOST(tRecvPkt.tData.ulOffset), + LE32_TO_HOST(tRecvPkt.tData.ulSize), + LE32_TO_HOST(tRecvPkt.tData.ulType) & HIL_BLOCK_MASK); + } + break; + } /* end process subblock information */ + } + } /* End enumerate subblocks */ + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "-------------------------------------------------------------------------"); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Handle WARMSTART parameter +* \param ptDevInstance Device instance +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXHandleWarmstartParameter(PDEVICEINSTANCE ptDevInstance) +{ + CIFX_PACKET tPacket; + CIFX_PACKET tRecvPacket; + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulBlockID = 0; + + OS_Memset(&tPacket, 0, sizeof(tPacket)); + OS_Memset(&tRecvPacket, 0, sizeof(tRecvPacket)); + + /*----------------------------------------------------------*/ + /* Process all available channels for warmstart parameters */ + /*----------------------------------------------------------*/ + for(ulBlockID = 0; ulBlockID < ptDevInstance->ulCommChannelCount; ++ulBlockID) + { + /* NOTE: only use a single packet here top save stack usage*/ + CIFX_DEVICE_INFORMATION tDevInfo; + + /* Get channel instance */ + PCHANNELINSTANCE ptChannelInst = (PCHANNELINSTANCE)ptDevInstance->pptCommChannels[ulBlockID]; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + /* Check for warm start data */ + tDevInfo.ulChannel = ptChannelInst->ulChannelNumber; + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ptDeviceInstance = ptDevInstance; + + OS_Memset( &tPacket, 0, sizeof(tPacket)); + + if ( !USER_GetWarmstartParameters( &tDevInfo, &tPacket)) + { + /* No warm start parameter available */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "No warm start parameter found or available!"); + } + } else + { + /* Send warm start parameter to hardware */ + int32_t lChannelError = DEV_TransferPacket( ptChannelInst, + &tPacket, + &tRecvPacket, + sizeof(tRecvPacket), + CIFX_TO_SEND_PACKET, + NULL, + NULL); + + if( (CIFX_NO_ERROR != lChannelError) || + (SUCCESS_HIL_OK != LE32_TO_HOST(tRecvPacket.tHeader.ulState)) ) + { + /* Error sending warm start parameter */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error sending warm start parameter to hardware! (lSendError=0x%08X,ulSta=0x%08X)", + lChannelError, + LE32_TO_HOST(tPacket.tHeader.ulState)); + } + } else + { + /*--------------------------------------------*/ + /* Wait until STACK is READY/RUNNING */ + /*--------------------------------------------*/ + if (DEV_WaitForRunning_Poll( ptChannelInst, CIFX_TO_FIRMWARE_START)) + { + /* Firmware started after warm start process */ + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Successfully sent warm start parameters to Channel #%d!", + ulBlockID); + } + } else + { + /* Firmware not started after warm start process */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Hardware not Ready/Running after channel warm start!"); + } + } + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Create all channel instances for the given device +* \param ptDevInstance Instance to start up +* \param ptDevChannelCfg Channel configuration data (downloaded files, etc.) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXCreateChannels(PDEVICEINSTANCE ptDevInstance, PDEVICE_CHANNEL_CONFIG ptDevChannelCfg) +{ + int32_t lRet = CIFX_NO_ERROR; + + /* Process the system channel and create devices */ + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->tSystemDevice.pbDPMChannelStart; + HIL_DPM_SYSTEM_CHANNEL_INFO_T* ptSysChannelInfo = (HIL_DPM_SYSTEM_CHANNEL_INFO_T*)&ptSysChannel->atChannelInfo[HIL_DPM_SYSTEM_CHANNEL_INDEX]; + HIL_DPM_HANDSHAKE_CHANNEL_INFO_T* ptHskBlockInfo = (HIL_DPM_HANDSHAKE_CHANNEL_INFO_T*)&ptSysChannel->atChannelInfo[HIL_DPM_HANDSHAKE_CHANNEL_INDEX]; + HIL_DPM_CHANNEL_INFO_BLOCK_T* ptChannel = NULL; + uint32_t ulChannelID = 0; /* The dedicated communication channel ID */ + uint32_t ulBlockID = 0; + HIL_DPM_HANDSHAKE_ARRAY_T* ptHskBlock = NULL; + + /* Calculate the start address in the DPM */ + uint32_t ulDPMChannelStartAddress = 0; + uint32_t ulDPMChannelStartIdx = HIL_DPM_SYSTEM_CHANNEL_INDEX; /* Start of the communication channel definitions */ + + ulDPMChannelStartAddress = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannelInfo->ulSizeOfChannel)); /* Start behind the system channel */ + ptHskBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)(ptDevInstance->pbDPM + + LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSysChannelInfo->ulSizeOfChannel))); + + /* Check if we have a following handshake channel. This will be always at position 1 in the + information structure */ + if(HWIF_READ8(ptDevInstance, ptHskBlockInfo->bChannelType) == HIL_CHANNEL_TYPE_HANDSHAKE) + { + /* There is a handshake block, add the size to the start address */ + ptDevInstance->pbHandshakeBlock = ptDevInstance->pbDPM + ulDPMChannelStartAddress; + ulDPMChannelStartAddress += LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptHskBlockInfo->ulSizeOfChannel)); + ulDPMChannelStartIdx = HIL_DPM_COM_CHANNEL_START_INDEX; + } + + /* Iterate over all block definitions. */ + ptChannel = &ptSysChannel->atChannelInfo[ulDPMChannelStartIdx]; + + /*---------------------------------------------------------*/ + /* Create communication channels depending on the */ + /* configuration information from the system channel */ + /*---------------------------------------------------------*/ + for(ulBlockID = ulDPMChannelStartIdx; ulBlockID < HIL_DPM_MAX_SUPPORTED_CHANNELS; ++ulBlockID) + { + int fCreateChannel = 0; + + /* Check Block types */ + switch(HWIF_READ8(ptDevInstance, ptChannel->tSystem.bChannelType)) + { + case HIL_CHANNEL_TYPE_COMMUNICATION: + case HIL_CHANNEL_TYPE_APPLICATION: + /* This is a communication or application channel, create a device for this block */ + fCreateChannel = 1; + break; + + case HIL_CHANNEL_TYPE_HANDSHAKE: + /* Handshake block start address must be remembered for PCI cards to + access bits in IRQ mode */ + ptDevInstance->pbHandshakeBlock = ptDevInstance->pbDPM + ulDPMChannelStartAddress; + break; + + case HIL_CHANNEL_TYPE_UNDEFINED: + case HIL_CHANNEL_TYPE_RESERVED: + case HIL_CHANNEL_TYPE_SYSTEM: + default: + /* Do not process these types */ + break; + + } /* end switch */ + + /* Check if we have to create a channel */ + if(fCreateChannel) + { + PCHANNELINSTANCE ptChannelInst = NULL; + void* pvInitMutex = NULL; + void* pvLock = NULL; + + /* Check the new channel is still inside the DPM, to prevent access errors */ + /* if the channel configuration does not match the maximum channel size */ + if( ptDevInstance->ulDPMSize < (LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->tCom.ulSizeOfChannel)) + ulDPMChannelStartAddress)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Channel (%u) size exceeds the maximum DPM size!", + ulChannelID); + } + + ptDevInstance->lInitError = CIFX_DEV_DPMSIZE_MISMATCH; + + break; /* Skip further channel creation */ + } + + /* Allocate a channel instance */ + ptChannelInst = (PCHANNELINSTANCE)OS_Memalloc(sizeof(*ptChannelInst)); + + if (NULL == ptChannelInst || + NULL == (pvInitMutex = OS_CreateMutex()) || + NULL == (pvLock = OS_CreateLock()) ) + { + lRet = CIFX_INVALID_POINTER; + + OS_Memfree(ptChannelInst); + OS_DeleteMutex(pvInitMutex); + OS_DeleteLock(pvLock); + ptChannelInst = NULL; + pvInitMutex = NULL; + pvLock = NULL; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating channel instance buffer!"); + } + + } else + { + OS_Memset(ptChannelInst, 0, sizeof(*ptChannelInst)); + + ptChannelInst->ulChannelNumber = ulChannelID; + ptChannelInst->ulBlockID = ulBlockID; + ptChannelInst->pbDPMChannelStart = ptDevInstance->pbDPM + ulDPMChannelStartAddress; + ptChannelInst->ulDPMChannelLength = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->tCom.ulSizeOfChannel)); + + /* These Locks/Mutexes are needed during initialization as we want to send packets, etc. + They need to be removed if the channel is not being created (e.g. wrong channel type) */ + ptChannelInst->pvLock = pvLock; + ptChannelInst->pvInitMutex = pvInitMutex; + ptChannelInst->pvDeviceInstance = (void*)ptDevInstance; + + ptChannelInst->ptHandshakeCell = (HIL_DPM_HANDSHAKE_CELL_T*)&ptHskBlock->atHsk[ulBlockID]; + if((HWIF_READ8(ptDevInstance, ptChannel->tCom.bSizePositionOfHandshake) & HIL_HANDSHAKE_POSITION_MASK) == HIL_HANDSHAKE_POSITION_BEGINNING) + ptChannelInst->ptHandshakeCell = (HIL_DPM_HANDSHAKE_CELL_T*)ptChannelInst->pbDPMChannelStart; + + ptChannelInst->bHandshakeWidth = HWIF_READ8(ptDevInstance, ptChannel->tCom.bSizePositionOfHandshake) & HIL_HANDSHAKE_SIZE_MASK; + + DEV_ReadHostFlags(ptChannelInst, 1); + DEV_ReadHandshakeFlags(ptChannelInst, 0, 0); + + /* Read channel layout */ + if (CIFX_NO_ERROR != (lRet = cifXReadChannelLayout(ptDevInstance, ptChannelInst, HWIF_READ8(ptDevInstance, ptSysChannel->atChannelInfo[ulBlockID].tCom.bNumberOfBlocks)))) + { + /* Could not read channel layout, delete the previous allocated channel instance. + * This will remove all allocated resources of the channel instance. */ + cifXDeleteChannelInstance(ptChannelInst); + + } else + { + /* Read the host flag once, to keep them in sync with the actual DPM state */ + DEV_ReadHostFlags(ptChannelInst, 1); + DEV_ReadHandshakeFlags(ptChannelInst, 0, 0); + + /* Check if we have an communication channel. Than we have to make sure, + all necessary block are availbale */ + + /* TODO: WHAT HAPPENS IF WE HAVE AN APPLICATION CHANNEL */ + if( HIL_CHANNEL_TYPE_COMMUNICATION != HWIF_READ8(ptDevInstance, ptChannel->tSystem.bChannelType)) + { + /* We only creating COMMUNICATION Channels at this point */ + fCreateChannel = 0; /* Skip further processing */ + } else + { + /* We have a Communication channel, check it */ + if( (NULL == ptChannelInst->ptCommonStatusBlock) || + (NULL == ptChannelInst->ptControlBlock) || + (NULL == ptChannelInst->tSendMbx.ptSendMailboxStart) || + (NULL == ptChannelInst->tRecvMbx.ptRecvMailboxStart) ) + { + /* Channel does not meet minimum system requirements and is ignored */ + fCreateChannel = 0; /* Skip further processing */ + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Channel (%u) does not meet minimum requirement and is ignored!", + ulBlockID); + } + } else + { + /* This is a real channel */ + ptChannelInst->fIsChannel = 1; + } + } + + /* Check if we have to creat a channel */ + if(fCreateChannel) + { + /* If a Firmware/Firmware module was loaded.we have to wait until the Stack is READY */ + /* This should prevent the timeout for waiting on CHANNEL-READY! if only a configuration is loaded */ + /* or a channel definition exists without a channel. */ + if( ptDevChannelCfg->fFWLoaded) + { + int fWait = 1; + if( (ptDevInstance->fModuleLoad) && + !(ptDevChannelCfg->atChannelData[ulChannelID].fModuleLoaded)) + { + fWait = 0; + } + + if( fWait) + { + /*--------------------------------------------------------*/ + /* We created a new channel, now read firmware information */ + /* Wait until STACK is READY before communicating with it */ + /*--------------------------------------------------------*/ + if (!DEV_WaitForReady_Poll(ptChannelInst, CIFX_TO_FIRMWARE_START)) + { + /* READY failed */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "Error channel not READY, channel = %d)", ulChannelID); + } + } else + { + /* We need the actual state of all channel flags, including our own one */ + DEV_ReadHostFlags( ptChannelInst, 1); + } + } + } + + ++ulChannelID; + ++ptDevInstance->ulCommChannelCount; + ptDevInstance->pptCommChannels = (PCHANNELINSTANCE*)OS_Memrealloc(ptDevInstance->pptCommChannels, ptDevInstance->ulCommChannelCount * (uint32_t)sizeof(*ptDevInstance->pptCommChannels)); + + if (NULL == ptDevInstance->pptCommChannels) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating communication channel buffer!"); + } + + } else + { + ptDevInstance->pptCommChannels[ptDevInstance->ulCommChannelCount - 1] = ptChannelInst; + + /* Check ready again including COS flag handling, because we have to handle the COS flags */ + /* If a module firmware was loaded we are waiting before on the channel ready. */ + /* If we have not downloaded a firmware / module we skipping the prior test but we have to */ + /* make sure the channel is READY and we have also to handle COS flags in this case! */ + if( DEV_WaitForReady_Poll(ptChannelInst, 20)) + { + int32_t lTempError = CIFX_NO_ERROR; + if ( CIFX_NO_ERROR != (lTempError = cifXReadFirmwareIdent( ptDevInstance, + ptChannelInst->ulChannelNumber, + NULL, + NULL))) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Failed to read firmware identification for channel = %d, error: 0x%08X", ptChannelInst->ulChannelNumber, lTempError); + } + } + + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Device successfully created for channel = %d", ptChannelInst->ulChannelNumber); + } + } + } + + } else if( NULL != ptChannelInst ) + { + /* We have not created a channel, delete the previous allocated channel instance */ + cifXDeleteChannelInstance(ptChannelInst); + } + } + } + } + + /* Next Block */ + ulDPMChannelStartAddress += LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->tCom.ulSizeOfChannel)); + ptChannel++; + } + + if( (g_ulTraceLevel & TRACE_LEVEL_INFO) && + (0 == ptDevInstance->ulCommChannelCount) ) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "NO CHANNEL INFORMATION FOUND, No devices created!"); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Check for IRQ enable +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXCheckIRQEnable(PDEVICEINSTANCE ptDevInstance) +{ + CIFX_DEVICE_INFORMATION tDevInfo; + int32_t lRet = CIFX_NO_ERROR; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + /* Initialize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Ask for interrupt handling */ + if(0 != (ptDevInstance->fIrqEnabled = USER_GetInterruptEnable(&tDevInfo))) + { + PCHANNELINSTANCE ptChannelInst = &ptDevInstance->tSystemDevice; + uint32_t ulChannel = 0; + uint32_t ulSync; + + /* create all synch events */ + for(ulSync = 0; ulSync < sizeof(ptDevInstance->tSyncData.ahSyncBitEvents) / sizeof(ptDevInstance->tSyncData.ahSyncBitEvents[0]); ++ulSync) + { + if (NULL == (ptDevInstance->tSyncData.ahSyncBitEvents[ulSync] = OS_CreateEvent())) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating sync event buffer!"); + } + + break; + } + } + + if (CIFX_NO_ERROR == lRet) + { + /* Create events for all channels */ + do + { + uint32_t ulHandshakeWidth = 8; + uint32_t ulIdx = 0; + + /* Create interrupt events if we are working in interrupt mode */ + if(ptChannelInst->bHandshakeWidth == HIL_HANDSHAKE_SIZE_16BIT) + { + ulHandshakeWidth = 16; + } + + for(ulIdx = 0; ulIdx < ulHandshakeWidth; ++ulIdx) + { + if (NULL == (ptChannelInst->ahHandshakeBitEvents[ulIdx] = OS_CreateEvent())) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating interrupt event buffer!"); + } + + break; + } + } + + /* Stop processing of further channels if lRet is set. */ + if (CIFX_NO_ERROR != lRet) + break; + + /* Check if we have such a channel */ + if(ulChannel < ptDevInstance->ulCommChannelCount) + ptChannelInst = ptDevInstance->pptCommChannels[ulChannel]; + + /* Note: Check for <= as we are additionally evaluating the system channel */ + } while(ulChannel++ < ptDevInstance->ulCommChannelCount); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Check for enable cached IO buffer access +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXCheckCachedBufferEnable(PDEVICEINSTANCE ptDevInstance) +{ + CIFX_DEVICE_INFORMATION tDevInfo; + int32_t lRet = CIFX_NO_ERROR; + int iCachedState = 0; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + /* Initialize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Ask for cached IO buffer access */ + iCachedState = USER_GetCachedIOBufferMode(&tDevInfo); + switch (iCachedState) + { + case eCACHED_MODE_ON: + case eCACHED_MODE_OFF: + /* Store the information in the device structure */ + ptDevInstance->fCachedMemAccess = iCachedState; + break; + + default: + lRet = CIFX_INVALID_PARAMETER; + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "USER_GetCachedIOBufferMode() returned invalid caching mode"); + } + break; + } + + return lRet; +} + +#ifdef CIFX_TOOLKIT_DMA +/*****************************************************************************/ +/*! Check for DMA enable +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXCheckDMAEnable(PDEVICEINSTANCE ptDevInstance) +{ + CIFX_DEVICE_INFORMATION tDevInfo; + int iDMAState = 0; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + /* If we don't have DMA buffers, we cannot enable them, + but we need to return OK, to let the toolkit continue + initialization */ + if(0 == ptDevInstance->ulDMABufferCount) + return CIFX_NO_ERROR; + + /* Initialize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + /* Ask for interrupt handling */ + iDMAState = USER_GetDMAMode(&tDevInfo); + switch(iDMAState) + { + case eDMA_MODE_LEAVE: + { + /* Check all channels if they have an active DMA flag and setup the DMA buffers for these cahnnels */ + uint32_t ulChannelIdx = ptDevInstance->ulCommChannelCount; + for( ulChannelIdx = 0; ulChannelIdx < ptDevInstance->ulCommChannelCount; ulChannelIdx++) + { + PCHANNELINSTANCE ptChannel = ptDevInstance->pptCommChannels[ulChannelIdx]; + if(ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /* This channel has DMA activated, setup DMA buffers */ + (void)DEV_SetupDMABuffers( ptChannel); + } + } + } + break; + + case eDMA_MODE_ON: + { + /* Switch ON DMA handling on all communication channels which supporting DMA */ + uint32_t ulTemp = 0; + uint32_t ulChannelIdx = ptDevInstance->ulCommChannelCount; + for( ulChannelIdx = 0; ulChannelIdx < ptDevInstance->ulCommChannelCount; ulChannelIdx++) + { + PCHANNELINSTANCE ptChannel = ptDevInstance->pptCommChannels[ulChannelIdx]; + + /* Check if channel supports DMA */ + /* TODO: Check DMA capability of the channel */ + + /* This channel has DMA activated, setup DMA buffers */ + (void)DEV_SetupDMABuffers( ptChannel); + + /* Activate DMA on all channels which are available */ + if ( CIFX_NO_ERROR != DEV_DMAState( ptChannel, CIFX_DMA_STATE_ON, &ulTemp)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Failed to activate DMA handling (Channel=%u)", + ulChannelIdx); + } + } + } + } + break; + + case eDMA_MODE_OFF: + { + /* Switch OFF DMA handling on all communication channels which enabled DMA */ + uint32_t ulTemp = 0; + uint32_t ulChannelIdx = ptDevInstance->ulCommChannelCount; + for( ulChannelIdx = 0; ulChannelIdx < ptDevInstance->ulCommChannelCount; ulChannelIdx++) + { + PCHANNELINSTANCE ptChannel = ptDevInstance->pptCommChannels[ulChannelIdx]; + if(ptChannel->ulDeviceCOSFlags & HIL_COMM_COS_DMA) + { + /* This channel has DMA active, switch OFF */ + (void)DEV_DMAState( ptChannel, CIFX_DMA_STATE_OFF, &ulTemp); + } + } + } + break; + + default: + break; + + } + + return CIFX_NO_ERROR; +} +#endif + +#ifdef CIFX_TOOLKIT_TIME +/*****************************************************************************/ +/*! Initialize RTC +* \param ptDevInstance Instance to start up */ +/*****************************************************************************/ +void cifXInitTime(PDEVICEINSTANCE ptDevInstance) +{ + HIL_DPM_SYSTEM_CHANNEL_T* ptSystemChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)(ptDevInstance->tSystemDevice.pbDPMChannelStart); + uint32_t ulRTCInfo = (HIL_SYSTEM_HW_RTC_MSK & LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSystemChannel->tSystemState.ulHWFeatures))); + + /* Check if RTC is available and not already set */ + if( 0 != (HIL_SYSTEM_HW_RTC_TYPE_MSK & ulRTCInfo)) + { + /* Check if it is already set */ + if( 0 == (HIL_SYSTEM_HW_RTC_STATE & ulRTCInfo)) + { + int32_t lRet = 0; + + /* Create a time request*/ + HIL_TIME_CMD_REQ_T tSendPkt; + CIFX_PACKET tRecvPkt; + + OS_Memset(&tSendPkt, 0, sizeof(tSendPkt)); + OS_Memset(&tRecvPkt, 0, sizeof(tRecvPkt)); + + /* Set the time on the device */ + tSendPkt.tHead.ulDest = HOST_TO_LE32(HIL_PACKET_DEST_SYSTEM); + tSendPkt.tHead.ulSrc = HOST_TO_LE32(ptDevInstance->ulPhysicalAddress); + tSendPkt.tHead.ulCmd = HOST_TO_LE32(HIL_TIME_COMMAND_REQ); + tSendPkt.tHead.ulLen = HOST_TO_LE32(sizeof(tSendPkt.tData)); + + tSendPkt.tData.ulTimeCmd = TIME_CMD_SETTIME; + /* Get actual system time */ + tSendPkt.tData.ulData = (uint32_t)OS_Time(NULL); + + /* Transfer packet */ + lRet = DEV_TransferPacket( &ptDevInstance->tSystemDevice, + (CIFX_PACKET*)&tSendPkt, + &tRecvPkt, + sizeof(tRecvPkt), + CIFX_TO_SEND_PACKET, + NULL, + NULL); + + if( (CIFX_NO_ERROR != lRet) || + (SUCCESS_HIL_OK != LE32_TO_HOST(tRecvPkt.tHeader.ulState)) ) + { + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_WARNING, + "Error setting device time! (lRet=0x%08X, ulState=0x%08X)", + lRet, + LE32_TO_HOST(tRecvPkt.tHeader.ulState)); + } + }else + { + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Setting RTC done: 0x%08X (%u)", + tSendPkt.tData.ulData, + tSendPkt.tData.ulData); + } + } + } + } +} +#endif + +/*****************************************************************************/ +/*! Check is BASE OS module running +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXIsBaseOSModule(PDEVICEINSTANCE ptDevInstance) +{ + HIL_DPM_SYSTEM_CHANNEL_T* ptSystemChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)(ptDevInstance->tSystemDevice.pbDPMChannelStart); + + ptDevInstance->fModuleLoad = 0; + if( 0 != (0x80000000 & LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSystemChannel->tSystemState.ulSystemStatus)))) + ptDevInstance->fModuleLoad = 1; + + return CIFX_NO_ERROR; +} + +/*****************************************************************************/ +/*! Evaluate device type +* \param ptDevInstance Instance to start up +* \return SUCCESS_HIL_OK if device type is OK */ +/*****************************************************************************/ +static int32_t cifXEvaluateDeviceType(PDEVICEINSTANCE ptDevInstance) +{ + /* Evaluate the defined device type to process basic hardware setup handling including + firmware / module / configuration file download and hardware startup. + + Possible device types: + + eCIFX_DEVICE_AUTODETECT: + Try to find out if a ROM loader or firmware is running + => Hardware defined as PCI hardware is generally a RAM based device + => A known cookie in the DPM tells us if a firmware is running and the device is FLASH based + => If the cookie is unknown and the DPM size is 64 KByte we expect a RAM based device + => If the DPM is smaller than 64 Kbyte, than the device detection fails + + eCIFX_DEVICE_RAM_BASED: + Configuration has defined a RAM based device + + eCIFX_DEVICE_FLASH_BASED: + Configuration has defined a FLASH based device + + eCIFX_DEVICE_DONT_TOUCH: + Evaluate the current state of the device without changing anything + + */ + + int32_t lRet = CIFX_INVALID_BOARD; + + /*-----------------------------------------------------------*/ + /* Check for FLASH based device */ + /* and */ + /* Check for DON'T TOUCH device */ + /*-----------------------------------------------------------*/ + if( (eCIFX_DEVICE_FLASH_BASED == ptDevInstance->eDeviceType) || + (eCIFX_DEVICE_DONT_TOUCH == ptDevInstance->eDeviceType)) + { + /* In both cases we expect to have a valid cookie on the beginning of the DPM */ + char szCookie[5]; + + OS_Memset(szCookie, 0, sizeof(szCookie)); + + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + if(eCIFX_DEVICE_FLASH_BASED == ptDevInstance->eDeviceType) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Type is fix defined to: eCIFX_DEVICE_FLASH_BASED"); + }else + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Type is fix defined to: eCIFX_DEVICE_DONT_TOUCH"); + } + } + + /* Check for a valid cookie */ + if( (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_BSL_STR)) || + (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_FW_STR)) ) + { + /* Return the configured device type device */ + lRet = CIFX_NO_ERROR; + }else + { + USER_Trace( ptDevInstance, + TRACE_LEVEL_ERROR, + "Detect device type, invalid cookie found! (cookie='%02X','%02X','%02X','%02X')", + szCookie[0], + szCookie[1], + szCookie[2], + szCookie[3]); + } + + /*-----------------------------------------------------------*/ + /* Check for RAM based device */ + /*-----------------------------------------------------------*/ + }else if( eCIFX_DEVICE_RAM_BASED == ptDevInstance->eDeviceType) + { + /* RAM based devices are always started by a hardware reset, followed by a BSL / FW download */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Type is fixed defined to: eCIFX_DEVICE_RAM_BASED"); + } + + /* Evaluation OK */ + lRet = CIFX_NO_ERROR; + + /*-----------------------------------------------------------*/ + /* Try to autodetect the device type */ + /*-----------------------------------------------------------*/ + }else if( eCIFX_DEVICE_AUTODETECT == ptDevInstance->eDeviceType) + { + /* Check for PCI hardware first */ + if(ptDevInstance->fPCICard) + { + /* All current PCI cards are RAM based, so default to RAM + NOTE: If the user builds a flash based PCI card, he must pass + eCIFX_DEVICE_AUTODETECT */ + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Type autodetection: RAM Based Device found!"); + } + + /* Evaluation OK */ + ptDevInstance->eDeviceType = eCIFX_DEVICE_RAM_BASED; + lRet = CIFX_NO_ERROR; + + /* Check for DPM hardware */ + } else + { + /* None PCI device depending on the DPM content + If we have a valid cookie, than we have a FLASH based device */ + char szCookie[5]; + + OS_Memset(szCookie, 0, sizeof(szCookie)); + + HWIF_READN(ptDevInstance, szCookie, ptDevInstance->pbDPM, 4); + + /* Check for a valid cookie */ + if( (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_BSL_STR)) || + (0 == OS_Strcmp( szCookie, CIFX_DPMSIGNATURE_FW_STR)) ) + { + /* We have a firmware or bootloader running, so we assume it is a flash based device */ + /* NOTE: If the driver is restarted and a RAM based FW was downloaded before this + will result in the device being handled as flash based. + Currently there is no way to detect this */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Device Type autodetection: Flash Based Device found!"); + } + + ptDevInstance->eDeviceType = eCIFX_DEVICE_FLASH_BASED; + lRet = CIFX_NO_ERROR; + + /* If it is not a PCI device and the cookie could not be evaluated + we try to check if we can handle it also as a RAM based device. */ + } else + { + /* If the DPM size is equal to 64 Kbyte we are able to access to the "netX Global Register Block" and we are not able + start a firmware via the DPM and we could try to handle the device as a RAM based device. + If the DPM size is less than 64 KByte we can't handle the device at all. */ + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Device Type autodetection: DPM device with unknown cookie detected, try to handle it as a RAM based device (cookie='%02X','%02X','%02X','%02X').", + szCookie[0], + szCookie[1], + szCookie[2], + szCookie[3]); + } + + /* Check DPM size */ + if(ptDevInstance->ulDPMSize < NETX_DPM_MEMORY_SIZE) + { + /* We don't have access to Global register block and no FW or Bootloader is running + and we are not able to execute a reset and to work with this card */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Device Type autodetection: Driver is unable to start a RAM based device with a DPM < 64kB."); + } + + } else + { + + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_INFO, + "Device Type autodetection: RAM based device forced (No FW / Bootloader active)! Card will be reset and all files downloaded!"); + } + + ptDevInstance->eDeviceType = eCIFX_DEVICE_RAM_BASED; + lRet = CIFX_NO_ERROR; + } + } + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Basic netX device start-up +* \param ptDevInstance Instance to start up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStartDevice(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet = CIFX_DRV_INIT_STATE_ERROR; + DEVICE_CHANNEL_CONFIG tDevChannelCfg; + + OS_Memset(&tDevChannelCfg, 0, sizeof(tDevChannelCfg)); + + ptDevInstance->lInitError = CIFX_NO_ERROR; + + /* Assume every card has the register block at the end of the DPM */ + ptDevInstance->ptGlobalRegisters = (PNETX_GLOBAL_REG_BLOCK)(ptDevInstance->pbDPM + + ptDevInstance->ulDPMSize - + sizeof(NETX_GLOBAL_REG_BLOCK)); + + /* Try to determine RAM or Flash based device configuration */ + if( CIFX_NO_ERROR == (lRet = cifXEvaluateDeviceType(ptDevInstance)) ) + { + + switch(ptDevInstance->eDeviceType) + { + case eCIFX_DEVICE_RAM_BASED: + /*-----------------------------------*/ + /* This is a RAM based device */ + /*-----------------------------------*/ + if( (CIFX_NO_ERROR == (lRet = cifXStartRAMDevice(ptDevInstance))) && + (CIFX_NO_ERROR == (lRet = cifXCreateSystemDevice( ptDevInstance))) ) + { + /* Just store error happening here into lInitError. This will make sure + that this device which already has a system channel, being handled by + Toolkit even if firmware startup fails (e.g. Wrong firmware for this card) */ + int32_t lTempResult; + + /* Check if we have a BASE OS system to download and to start*/ + lTempResult = cifXHandleRAMBaseOSModule( ptDevInstance); + if( CIFX_NO_ERROR == lTempResult) + { + /* Check if we have a BASE OS module running */ + (void)cifXIsBaseOSModule(ptDevInstance); + + /* Download firmware / module files */ + (void)cifXDownloadFWFiles(ptDevInstance, &tDevChannelCfg); + + /* Download configuration files */ + (void)cifXDownloadCNFFiles(ptDevInstance, &tDevChannelCfg); + + /* Start firmware / module files if necessary */ + lTempResult = cifXStartRAMFirmware(ptDevInstance, &tDevChannelCfg); + } + + /* Only enter our error if no function already inserted one. Readout of channel + Information may already have inserted an error */ + if(CIFX_NO_ERROR == ptDevInstance->lInitError) + ptDevInstance->lInitError = lTempResult; + } + break; + + case eCIFX_DEVICE_FLASH_BASED: + /*-----------------------------------*/ + /* This is a flash based device */ + /*-----------------------------------*/ + if( IsNetX4x00FLASH(ptDevInstance) || + IsNetX90FLASH(ptDevInstance) ) + { + /* netX90 and netX4000 devices should only be actively updated by user, + therefore no update handling is done in case user defines + eCIFX_DEVICE_FLASH_BASED */ + + if( (CIFX_NO_ERROR != (lRet = cifXStartFlashDevice( ptDevInstance))) || + (CIFX_NO_ERROR != (lRet = cifXCreateSystemDevice( ptDevInstance))) ) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Unable to access the hardware while device type is set to eCIFX_DEVICE_FLASH_BASED. Aborting device handling!"); + } + + } + else if( (CIFX_NO_ERROR == (lRet = cifXStartFlashDevice( ptDevInstance))) && + (CIFX_NO_ERROR == (lRet = cifXCreateSystemDevice( ptDevInstance))) ) + { + /* Just store error happening here into lInitError. This will make sure + that this device which already has a system channel, being handled by + Toolkit even if firmware startup fails (e.g. Wrong firmware for this card) */ + int32_t lTempResult; + + /* Check if we have a BASE OS system to download and to start*/ + lTempResult = cifXHandleFlashBaseOSModule( ptDevInstance); + if( CIFX_NO_ERROR == lTempResult) + { + /* Check if we have a BASE OS module running */ + (void)cifXIsBaseOSModule(ptDevInstance); + + /* Download firmware / module files */ + (void)cifXDownloadFWFiles(ptDevInstance, &tDevChannelCfg); + + /* Download configuration files */ + (void)cifXDownloadCNFFiles(ptDevInstance, &tDevChannelCfg); + + /* Start firmware / module files if necessary */ + lTempResult = cifXStartFlashFirmware(ptDevInstance, &tDevChannelCfg); + } + + /* Only enter our error if no function already inserted one. Readout of channel + Information may already have inserted an error */ + if(CIFX_NO_ERROR == ptDevInstance->lInitError) + ptDevInstance->lInitError = lTempResult; + } + break; + + case eCIFX_DEVICE_DONT_TOUCH: + /* Leave the device in the current state, don't execute a reset and expect it is running */ + + if( CIFX_NO_ERROR != (lRet = cifXCreateSystemDevice( ptDevInstance))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Unable to access the hardware while device type is set to eCIFX_DEVICE_DONT_TOUCH. Aborting device handling!"); + } + break; + + default: + /* This should never happen */ + break; + } + } + + if(CIFX_NO_ERROR == lRet) + { + /* Create sync resources */ + if (NULL == (ptDevInstance->tSyncData.pvLock = OS_CreateLock())) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating sync resources!"); + } + + } else + { + HIL_DPM_SYSTEM_CHANNEL_T* ptSysChannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptDevInstance->tSystemDevice.pbDPMChannelStart; + + /* NOTE: If the Slot Number is different after FW start (e.g. Firmware does not support + Slot Number), we overwrite it with the internal value to make sure the Slot Number + is identical between Bootloader and Firmware */ + if(ptDevInstance->ulSlotNumber != HWIF_READ8(ptDevInstance, ptSysChannel->tSystemInfo.bDevIdNumber)) + HWIF_WRITE8(ptDevInstance, ptSysChannel->tSystemInfo.bDevIdNumber, (uint8_t)HOST_TO_LE32(ptDevInstance->ulSlotNumber)); + + /* Check if we already have a netX Chip-Type information, */ + /* if not try to read them via a HIL_HW_IDENTFY_REQ. */ + /* If this does not work, use eCHIP_TYPE_UNKNOWN, like before. */ + if( eCHIP_TYPE_UNKNOWN == ptDevInstance->eChipType) + { + if( CIFX_NO_ERROR != cifXReadHardwareIdent( ptDevInstance, NULL, NULL)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error reading chip type!"); + } + } + } + + /* Read the channel layouts, and build the CHANNELINSTANCES for this device */ + lRet = cifXCreateChannels(ptDevInstance, &tDevChannelCfg); + } + } + +#ifdef CIFX_TOOLKIT_TIME + if(CIFX_NO_ERROR == lRet) + { + /* Update the system time of the target if a RTC is available */ + cifXInitTime(ptDevInstance); + } +#endif + + if(CIFX_NO_ERROR == lRet) + { + /* On Flash based devices we may need to perform a CHANNEL_INIT if we have + updated the configuration */ + if(eCIFX_DEVICE_FLASH_BASED == ptDevInstance->eDeviceType) + { + lRet = cifXStartFlashConfiguration(ptDevInstance, &tDevChannelCfg); + } + + /* Handle warmstart for all channels */ + if(CIFX_NO_ERROR == lRet) + lRet = cifXHandleWarmstartParameter(ptDevInstance); + } + +#ifdef CIFX_TOOLKIT_DMA + if(CIFX_NO_ERROR == lRet) + { + /* Check DMA enable */ + lRet = cifXCheckDMAEnable(ptDevInstance); + } +#endif + + if (CIFX_NO_ERROR == lRet) + { + /* Check for cached IO buffer handling */ + lRet = cifXCheckCachedBufferEnable(ptDevInstance); + } + + if(CIFX_NO_ERROR == lRet) + { + /* Check IRQ enable */ + lRet = cifXCheckIRQEnable(ptDevInstance); + } + + /* Store error in device instance */ + if(CIFX_NO_ERROR != lRet) + ptDevInstance->lInitError = lRet; + + return lRet; +} + +/*****************************************************************************/ +/*! Stops Handling the device and removes all associated memory +* ATTENTION: If any application has still opened a connection this will result +* in an access violation/undefined behavious +* \param ptDevInstance Instance to clean up +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXStopDevice(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulIdx = 0; + PCHANNELINSTANCE ptSystemDevice = &ptDevInstance->tSystemDevice; + + /* Process all created communication channels */ + for(ulIdx = 0; ulIdx < ptDevInstance->ulCommChannelCount; ++ulIdx) + { + PCHANNELINSTANCE ptChannelInst = ptDevInstance->pptCommChannels[ulIdx]; + + cifXDeleteChannelInstance(ptChannelInst); + } + + /*-------------------------------------------------*/ + /* Delete system channel objects */ + /*-------------------------------------------------*/ + /* Clean up all interrupt events */ + for( ulIdx = 0; ulIdx < sizeof(ptSystemDevice->ahHandshakeBitEvents) / sizeof(ptSystemDevice->ahHandshakeBitEvents[0]); ++ulIdx) + { + if(NULL != ptSystemDevice->ahHandshakeBitEvents[ulIdx]) + { + OS_DeleteEvent(ptSystemDevice->ahHandshakeBitEvents[ulIdx]); + ptSystemDevice->ahHandshakeBitEvents[ulIdx] = NULL; + } + } + + OS_DeleteLock(ptSystemDevice->pvLock); + ptSystemDevice->pvLock = NULL; + OS_DeleteMutex(ptSystemDevice->pvInitMutex); + ptSystemDevice->pvInitMutex = NULL; + OS_DeleteMutex(ptSystemDevice->tRecvMbx.pvRecvMBXMutex); + ptSystemDevice->tRecvMbx.pvRecvMBXMutex = NULL; + OS_DeleteMutex(ptSystemDevice->tSendMbx.pvSendMBXMutex); + ptSystemDevice->tSendMbx.pvSendMBXMutex = NULL; + + /*-------------------------------------------------*/ + /* Delete Communication channel array */ + /*-------------------------------------------------*/ + OS_Memfree(ptDevInstance->pptCommChannels); + ptDevInstance->pptCommChannels = NULL; + ptDevInstance->ulCommChannelCount = 0; + + /* Remove sync resources */ + for(ulIdx = 0; ulIdx < sizeof(ptDevInstance->tSyncData.ahSyncBitEvents) / sizeof(ptDevInstance->tSyncData.ahSyncBitEvents[0]); ++ulIdx) + { + if(NULL != ptDevInstance->tSyncData.ahSyncBitEvents[ulIdx]) + { + OS_DeleteEvent(ptDevInstance->tSyncData.ahSyncBitEvents[ulIdx]); + ptDevInstance->tSyncData.ahSyncBitEvents[ulIdx] = NULL; + } + } + OS_DeleteLock(ptDevInstance->tSyncData.pvLock); + ptDevInstance->tSyncData.pvLock = NULL; + + /*-------------------------------------------------*/ + /* Remove Device instance from active devices list */ + /*-------------------------------------------------*/ + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ++ulIdx) + { + if(g_pptDevices[ulIdx] == ptDevInstance) + { + OS_Memmove(&g_pptDevices[ulIdx], + &g_pptDevices[ulIdx + 1], + (g_ulDeviceCount - ulIdx - 1) * (uint32_t)sizeof(*g_pptDevices)); + --g_ulDeviceCount; + break; + } + } + + /*-------------------------------------------------*/ + /* Check if we have removed the last device */ + /*-------------------------------------------------*/ + if(0 == g_ulDeviceCount) + { + /* No more devices available */ + OS_Memfree(g_pptDevices); + g_pptDevices = NULL; + + } else + { + /* More device existing, shrink memory */ + g_pptDevices = (PDEVICEINSTANCE*)OS_Memrealloc(g_pptDevices, g_ulDeviceCount * (uint32_t)sizeof(*g_pptDevices)); + + if (NULL == g_pptDevices) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating device buffer!"); + } + } + } + + return lRet; +} + +#ifdef CIFX_TOOLKIT_DMA +/*****************************************************************************/ +/*! Check DMA buffer configuration. +* \param ptDevInstance Holding the DMA buffer configuration +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXTKitCheckDMABufferConfig(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulBufferIdx; + + /* If we don't have DMA buffers, user does not want DMA on this + device and xChannelDMAState, etc. will return an error, + but we need to return OK, to let the toolkit continue + initialization */ + if(0 == ptDevInstance->ulDMABufferCount) + return CIFX_NO_ERROR; + + /* Check DMA channel count */ + if( ptDevInstance->ulDMABufferCount < CIFX_DMA_BUFFER_COUNT) + return CIFX_DEV_DMA_INSUFF_BUFFER_COUNT; + + /* Check DMA buffer sizes */ + for( ulBufferIdx = 0; ulBufferIdx < ptDevInstance->ulDMABufferCount; ulBufferIdx++) + { + if( ptDevInstance->atDmaBuffers[ulBufferIdx].ulSize < CIFX_DMA_MODULO_SIZE) + lRet = CIFX_DEV_DMA_BUFFER_TOO_SMALL; + else if( ptDevInstance->atDmaBuffers[ulBufferIdx].ulSize > CIFX_DMA_MAX_BUFFER_SIZE) + lRet = CIFX_DEV_DMA_BUFFER_TOO_BIG; + else if( 0 != (ptDevInstance->atDmaBuffers[ulBufferIdx].ulSize % CIFX_DMA_MODULO_SIZE)) + lRet = CIFX_DEV_DMA_BUFFER_NOT_ALIGNED; + + if( CIFX_NO_ERROR != lRet) + break; + } + + return lRet; +} +#endif + +/*****************************************************************************/ +/*! Physically Enable Interrupts on hardware +* \param ptDevInstance Device instance */ +/*****************************************************************************/ +void cifXTKitEnableHWInterrupt(PDEVICEINSTANCE ptDevInstance) +{ + /* Set interrupt enable bits in PCI mode only if the complete 64KByte DPM is available */ + if( (ptDevInstance->fPCICard) || + (ptDevInstance->ulDPMSize >= NETX_DPM_MEMORY_SIZE) ) + { + /* Enable global and handshake interrupts */ + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQEnable_0, + HOST_TO_LE32((MSK_IRQ_EN0_INT_REQ | MSK_IRQ_EN0_HANDSHAKE) )); + + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQEnable_1, 0); + } +} + +/*****************************************************************************/ +/*! Physically Disable Interrupts on hardware +* \param ptDevInstance Device instance */ +/*****************************************************************************/ +void cifXTKitDisableHWInterrupt(PDEVICEINSTANCE ptDevInstance) +{ + /* Clear interrupt enable bits in PCI mode or if the complete 64Kb DPM is available */ + if( (ptDevInstance->fPCICard) || + (ptDevInstance->ulDPMSize == NETX_DPM_MEMORY_SIZE) ) + { + /* Disable all interrupts */ + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQEnable_0, 0); + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQEnable_1, 0); + } +} + +/*****************************************************************************/ +/*! Adds a newly found device to the list of handled device +* \param ptDevInstance Device to add (must at least include the pointer to +* the DPM) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXTKitAddDevice(PDEVICEINSTANCE ptDevInstance) +{ + int32_t lRet; + + /* Check if we have a pointer */ + if(NULL == ptDevInstance) + return CIFX_INVALID_POINTER; + + /* Disable interrupts during startup phase. Just in case the user has set this flag! */ + ptDevInstance->fIrqEnabled = 0; + +#ifdef CIFX_TOOLKIT_HWIF + /* Validate hardware access function pointers != NULL */ + if ( (ptDevInstance->pfnHwIfRead == NULL) || + (ptDevInstance->pfnHwIfWrite == NULL) ) + return CIFX_INVALID_PARAMETER; +#endif /* CIFX_TOOLKIT_HWIF */ + +#ifdef CIFX_TOOLKIT_DMA + /* Check DMA handling just for PCI hardware */ + if( ptDevInstance->fPCICard) + { + /* Check DMA buffer configuration */ + if(CIFX_NO_ERROR != (lRet = cifXTKitCheckDMABufferConfig( ptDevInstance))) + return lRet; + } +#endif + + /* Run the toolkit start device functions */ + lRet = cifXStartDevice(ptDevInstance); + if(CIFX_NO_ERROR == lRet) + { + /* Lock tkit global data access against reentrancy*/ + OS_EnterLock(g_pvTkitLock); + + /* Increment device count */ + ++g_ulDeviceCount; + + /* Create new list entry */ + g_pptDevices = (PDEVICEINSTANCE*)OS_Memrealloc(g_pptDevices, g_ulDeviceCount * (uint32_t)sizeof(*g_pptDevices)); + + if (NULL == g_pptDevices) + { + lRet = CIFX_INVALID_POINTER; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error creating device list buffer!"); + } + + } else + { + /* Add the new entry to the device list */ + g_pptDevices[g_ulDeviceCount - 1] = ptDevInstance; + + /* Setup interrupts if as given during cifXStartDevice() */ + if(0 != (ptDevInstance->fIrqEnabled)) + { + /* Perform a dummy interrupt cycle to get handshake flags in Sync for proper operation */ + if(CIFX_TKIT_IRQ_DSR_REQUESTED == cifXTKitISRHandler(ptDevInstance, 1)) + cifXTKitDSRHandler(ptDevInstance); + +#ifndef CIFX_TOOLKIT_MANUAL_IRQ_ENABLE + OS_EnableInterrupts(ptDevInstance->pvOSDependent); + cifXTKitEnableHWInterrupt(ptDevInstance); +#endif /* CIFX_TOOLKIT_MANUAL_IRQ_ENABLE */ + } + } + + /* Done with the initialisation */ + OS_LeaveLock(g_pvTkitLock); + } + + return lRet; +} + +/*****************************************************************************/ +/*! This functions removes a device from being handled by the toolkit. +* \param szBoard Name or Alias of the board to remove +* \param fForceRemove !=0 to force the release of the device, even if +* any references to the device are open +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXTKitRemoveDevice(char* szBoard, int fForceRemove) +{ + int32_t lRet = CIFX_INVALID_BOARD; + int fFound = 0; + uint32_t ulIdx = 0; + + OS_EnterLock(g_pvTkitLock); + + /* Check if a device with the given name still exists */ + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ++ulIdx) + { + if( (OS_Strcmp(g_pptDevices[ulIdx]->szName, szBoard) == 0) || + (OS_Strcmp(g_pptDevices[ulIdx]->szAlias, szBoard) == 0) ) + { + fFound = 1; + break; + } + } + + /* Remove only devices which are available */ + if(fFound) + { + PDEVICEINSTANCE ptDevInst = g_pptDevices[ulIdx]; + int fStop = 0; + int fIrqEnabled = ptDevInst->fIrqEnabled; + + if(ptDevInst->fIrqEnabled) + { +#ifndef CIFX_TOOLKIT_MANUAL_IRQ_ENABLE + cifXTKitDisableHWInterrupt(ptDevInst); + OS_DisableInterrupts(ptDevInst->pvOSDependent); +#endif /* CIFX_TOOLKIT_MANUAL_IRQ_ENABLE */ + + /* mark IRQ as disabled, as the device is now in polling mode */ + ptDevInst->fIrqEnabled = 0; + } + + if(fForceRemove) + { + /* user requested to force the remove, so don't check for open connections */ + fStop = 1; + } else + { + uint32_t ulChannel = 0; + + if(ptDevInst->tSystemDevice.ulOpenCount != 0) + { + /* system channel is in use, so deny device removal */ + lRet = CIFX_DEV_HW_PORT_IS_USED; + } else + { + fStop = 1; + /* we need to check if any channel has an open reference */ + for(ulChannel = 0; ulChannel < ptDevInst->ulCommChannelCount; ++ulChannel) + { + if(ptDevInst->pptCommChannels[ulChannel]->ulOpenCount > 0) + { + /* at least one channel has an open reference */ + fStop = 0; + lRet = CIFX_DEV_HW_PORT_IS_USED; + break; + } + } + } + } + + if(fStop) + lRet = cifXStopDevice(ptDevInst); + + /* Restore IRQ mode in case the user wants to reuse this device instance */ + ptDevInst->fIrqEnabled = fIrqEnabled; + } + + OS_LeaveLock(g_pvTkitLock); + + return lRet; +} + +/*****************************************************************************/ +/*! Initializes the cifX Toolkit +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXTKitInit( void) +{ + int32_t lRet = CIFX_NO_ERROR; + + /* Uninitialize toolkit, just in case it was not correctly closed before */ + cifXTKitDeinit(); + + /* Initialize OS functions */ + lRet = OS_Init(); + + /* Create toolkit lock, signal toolkit initialization */ + if(CIFX_NO_ERROR == lRet) + { + if( NULL == (g_pvTkitLock = OS_CreateLock()) ) + { + /* Signal initialization error */ + lRet = CIFX_INVALID_POINTER; + + /* Uninitialize OS functions */ + OS_Deinit(); + } else + { + /* Toolkit successfully initialized */ + g_tDriverInfo.fInitialized = 1; + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Un-Initializes the cifX Toolkit */ +/*****************************************************************************/ +void cifXTKitDeinit( void) +{ + uint32_t ulIdx = 0; + + if(g_pvTkitLock) + { + OS_EnterLock(g_pvTkitLock); + } + + for(ulIdx = 0; ulIdx < g_ulDeviceCount; ++ulIdx) + { + (void)cifXStopDevice(g_pptDevices[ulIdx]); + } + + if(g_pptDevices) + { + OS_Memfree(g_pptDevices); + g_pptDevices = NULL; + } + g_ulDeviceCount = 0; + + if(g_pvTkitLock) + { + OS_LeaveLock(g_pvTkitLock); + OS_DeleteLock(g_pvTkitLock); + g_pvTkitLock = NULL; + } + + /* Uninitialize OS functions */ + OS_Deinit(); + + g_tDriverInfo.fInitialized = 0; + g_tDriverInfo.ulOpenCount = 0; +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/Source/cifXInterrupt.c b/libcifx/Toolkit/Source/cifXInterrupt.c new file mode 100644 index 0000000..25a95e9 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXInterrupt.c @@ -0,0 +1,557 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXInterrupt.c 14244 2021-10-18 12:30:23Z RMayer $: + + Description: + cifX Toolkit Interrupt handling routines (ISR/DSR) + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-10-15 - Rework handling in DSR function, added ulHostCOSFlagsSaved variable + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +#include "cifXHWFunctions.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TOOLKIT_FUNCS cifX DPM Toolkit specific functions +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Low-Level interrupt handler +* \param ptDevInstance Instance that probably generated an IRQ (on PCI devices +* the routine decides if it was an IRQ for shared interrupt lines) +* \param fPCIIgnoreGlobalIntFlag Ignore the global interrupt flag on PCI cards, +* to detect shared interrupts. This might be necessary +* if the user has already filtered out all shared IRQs +* \return CIFX_TKIT_IRQ_DSR_REQUESTED/CIFX_TKIT_IRQ_HANDLED on success +* CIFX_TKIT_IRQ_OTHERDEVICE if the IRQ is not from the device */ +/*****************************************************************************/ +int cifXTKitISRHandler(PDEVICEINSTANCE ptDevInstance, int fPCIIgnoreGlobalIntFlag) +{ + int iRet; + + /* Check if DPM is available, if not, it cannot be our card, that caused the interrupt */ + if( HWIF_READ32(ptDevInstance, *(uint32_t*)ptDevInstance->pbDPM) == CIFX_DPM_INVALID_CONTENT) + return CIFX_TKIT_IRQ_OTHERDEVICE; + + if(!ptDevInstance->fIrqEnabled) + { + /* Irq is disabled on device, so we assume the user activated the interrupts, + but wants to poll the card. */ + + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "cifXTKitISRHandler() : We received an interrupt, but IRQs are disabled!"); + + iRet = CIFX_TKIT_IRQ_OTHERDEVICE; + + } else + { + /* We are working in interrupt mode */ + uint32_t ulChannel; + int iIrqToDsrBuffer = ptDevInstance->iIrqToDsrBuffer; + IRQ_TO_DSR_BUFFER_T* ptIsrToDsrBuffer = &ptDevInstance->atIrqToDsrBuffer[iIrqToDsrBuffer]; + HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBuffer = &ptIsrToDsrBuffer->tHandshakeBuffer; + + /* on a DPM module every handshake cell can be read individually, + on a PCI module the complete handshake register block must be read sequentially */ + if( (!ptDevInstance->fPCICard) || + (!ptDevInstance->pbHandshakeBlock) ) + { + /* DPM card */ + + ++ptDevInstance->ulIrqCounter; + ptIsrToDsrBuffer->fValid = 1; + + /* Check if we have a handshake block, if so, we read it completely on DPM hardwares + to make sure, illegally activated handshake cells, don't cause interrupts */ + if (NULL != ptDevInstance->pbHandshakeBlock) + { + HWIF_READN( ptDevInstance, + ptHandshakeBuffer, + ptDevInstance->pbHandshakeBlock, + sizeof(*ptHandshakeBuffer)); + } else + { + /* We do not have a handshake block, so we have to read them one by one */ + /* and only for the available channels */ + ptHandshakeBuffer->atHsk[0].ulValue = HWIF_READ32(ptDevInstance, ptDevInstance->tSystemDevice.ptHandshakeCell->ulValue); + + for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ++ulChannel) + { + PCHANNELINSTANCE ptChannel = (PCHANNELINSTANCE)ptDevInstance->pptCommChannels[ulChannel]; + uint32_t ulBlockID = ptChannel->ulBlockID; + + ptHandshakeBuffer->atHsk[ulBlockID].ulValue = HWIF_READ32(ptDevInstance, ptChannel->ptHandshakeCell->ulValue); + } + } + + /* we need to check in DSR which handshake bits have changed */ + iRet = CIFX_TKIT_IRQ_DSR_REQUESTED; + + } else + { + /* PCI card */ + + uint32_t ulIrqState0 = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_0)); + uint32_t ulIrqState1 = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_1)); + + /* First check if we have generated this interrupt by reading the global IRQ status bit */ + if( !fPCIIgnoreGlobalIntFlag && + (0 == (ulIrqState0 & MSK_IRQ_STA0_INT_REQ)) ) + { + /* we have not generated this interrupt, so it must be another device on shared IRQ */ + iRet = CIFX_TKIT_IRQ_OTHERDEVICE; + + } else + { + HIL_DPM_HANDSHAKE_ARRAY_T* ptHandshakeBlock = (HIL_DPM_HANDSHAKE_ARRAY_T*)ptDevInstance->pbHandshakeBlock; + + /* confirm all interrupts. + We can safely clear handshake interrupts here, as we are reading the handshake flags below, + so we won't miss an IRQ.*/ + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_0, HOST_TO_LE32(ulIrqState0)); + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulIRQState_1, HOST_TO_LE32(ulIrqState1)); + + ++ptDevInstance->ulIrqCounter; + ptIsrToDsrBuffer->fValid = 1; + + /* Only read first 8 Handshake cells, due to a netX hardware issue. Reading flags 8-15 may + also confirm IRQs for Handshake cell 0-7 due to an netX internal readahead buffer */ + ptHandshakeBuffer->atHsk[HIL_DPM_SYSTEM_CHANNEL_INDEX].ulValue = HWIF_READ32( ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_SYSTEM_CHANNEL_INDEX].ulValue); + ptHandshakeBuffer->atHsk[HIL_DPM_HANDSHAKE_CHANNEL_INDEX].ulValue = HWIF_READ32( ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_HANDSHAKE_CHANNEL_INDEX].ulValue); + + for(ulChannel = 0; ulChannel < ptDevInstance->ulCommChannelCount; ++ulChannel) + ptHandshakeBuffer->atHsk[HIL_DPM_COM_CHANNEL_START_INDEX + ulChannel].ulValue = HWIF_READ32(ptDevInstance, ptHandshakeBlock->atHsk[HIL_DPM_COM_CHANNEL_START_INDEX + ulChannel].ulValue); + + /* we need to check in DSR which handshake bits have changed */ + iRet = CIFX_TKIT_IRQ_DSR_REQUESTED; + } + } + } + + return iRet; +} + +/*****************************************************************************/ +/*! Process IO Areas for changes / callbacks +* \param ptChannel Channel Instance +* \param ptIoArea IO Area +* \param usChangedBits Bits that have changed since last IRQ +* \param usUnequalBits Bits that are unequal between host and netX +* \param fOutput !=0 if an output area is processed */ +/*****************************************************************************/ +static void ProcessIOArea(PCHANNELINSTANCE ptChannel, + PIOINSTANCE ptIoArea, + uint16_t usChangedBits, + uint16_t usUnequalBits, + int fOutput) +{ + uint16_t usBitMask = (uint16_t)(1 << ptIoArea->bHandshakeBit); + + if(usChangedBits & usBitMask) + { + PFN_NOTIFY_CALLBACK pfnCallback = NULL; + uint8_t bIOBitState = DEV_GetIOBitstate(ptChannel, ptIoArea, fOutput); + + switch(bIOBitState) + { + case HIL_FLAGS_EQUAL: + if(0 == (usUnequalBits & usBitMask)) + pfnCallback = ptIoArea->pfnCallback; + break; + + case HIL_FLAGS_NOT_EQUAL: + if(usUnequalBits & usBitMask) + pfnCallback = ptIoArea->pfnCallback; + break; + + case HIL_FLAGS_CLEAR: + if(0 == (ptChannel->usNetxFlags & usBitMask)) + pfnCallback = ptIoArea->pfnCallback; + break; + + case HIL_FLAGS_SET: + if(ptChannel->usNetxFlags & usBitMask) + pfnCallback = ptIoArea->pfnCallback; + break; + } + + if(pfnCallback) + pfnCallback(ptIoArea->ulNotifyEvent, 0, NULL, ptIoArea->pvUser); + + OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptIoArea->bHandshakeBit]); + } +} + +/*****************************************************************************/ +/*! Deferred interrupt handler +* \param ptDevInstance Instance the DSR is requested for */ +/*****************************************************************************/ +void cifXTKitDSRHandler(PDEVICEINSTANCE ptDevInstance) +{ + if(!ptDevInstance->fResetActive) + { + /* Get actual data buffer index */ + uint32_t ulChannel = 0; + PCHANNELINSTANCE ptChannel = &ptDevInstance->tSystemDevice; + int iIrqToDsrBuffer = 0; + IRQ_TO_DSR_BUFFER_T* ptIrqToDsrBuffer = NULL; + +#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK + /* Lock against ISR */ + OS_IrqLock(ptDevInstance->pvOSDependent); +#else + + /* ATTENTION: The IrqToDsr Buffer handling implies a "always" higher priority */ + /* of the ISR function. This does usually happens on physical ISR functions */ + /* but does not work if the ISR and DSR are handled as a threads! */ + +#endif + + iIrqToDsrBuffer = ptDevInstance->iIrqToDsrBuffer; + ptIrqToDsrBuffer = &ptDevInstance->atIrqToDsrBuffer[iIrqToDsrBuffer]; + + if(!ptIrqToDsrBuffer->fValid) + { + /* Interrupt did not provide data yet */ + +#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK + /* Release lock against ISR */ + OS_IrqUnlock(ptDevInstance->pvOSDependent); +#endif + + return; + } else + { + /* Flip data buffer so IRQ uses the other buffer */ + ptDevInstance->iIrqToDsrBuffer ^= 0x01; + + /* Invalidate the buffer, we are now handling */ + ptIrqToDsrBuffer->fValid = 0; + } + +#ifdef CIFX_TOOLKIT_ENABLE_DSR_LOCK + /* Release lock against ISR */ + OS_IrqUnlock(ptDevInstance->pvOSDependent); +#endif + + /* Only process rest of flags if NSF_READY is set. This must be done to prevent + confusion of the toolkit during a system start (xSysdeviceReset) */ + if(ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[0].t8Bit.bNetxFlags & NSF_READY) + { + /*--------------------------------------------------------------------*/ + /* Evaluate device synchronisation flags, the flags are fixed 16 Bit */ + /*--------------------------------------------------------------------*/ + uint16_t usChangedSyncBits; + uint16_t usOldNSyncFlags = ptDevInstance->tSyncData.usNSyncFlags; /* Remember last known netX flags */ + + /* Get pointer to the new flag data from ISR */ + HIL_DPM_HANDSHAKE_CELL_T* ptSyncCell = &ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[NETX_HSK_SYNCH_FLAG_POS]; + + /* Get the actual flags */ + ptDevInstance->tSyncData.usNSyncFlags = LE16_TO_HOST(ptSyncCell->t16Bit.usNetxFlags); + + /* Check if there are changed bits since last interrupt from netX side, */ + /* and only process sync if bits have chanded! */ + if ( 0 != (usChangedSyncBits = usOldNSyncFlags ^ ptDevInstance->tSyncData.usNSyncFlags)) + { + uint32_t ulBitPos; + uint16_t usUnequalSyncBits; + + /* Create unequal bit mask */ + usUnequalSyncBits = ptDevInstance->tSyncData.usNSyncFlags ^ ptDevInstance->tSyncData.usHSyncFlags; + + /* Signal sync events */ + for(ulBitPos = 0; ulBitPos < NETX_NUM_OF_SYNCH_FLAGS; ++ulBitPos) + { + /* There is a valid channel */ + uint16_t usBitMask = (uint16_t)(1 << ulBitPos); + PCHANNELINSTANCE ptSyncChannel = NULL; + + if (ulBitPos >= ptDevInstance->ulCommChannelCount) + break; + + ptSyncChannel = (PCHANNELINSTANCE)ptDevInstance->pptCommChannels[ulBitPos]; + + if ( usChangedSyncBits & usBitMask) + { + uint8_t bState = HIL_FLAGS_NOT_EQUAL; + int fProcess = 0; + + /* Handle Sync interrupts, read actual state and set bState accordingly */ + if( HIL_SYNC_MODE_HST_CTRL == HWIF_READ8(ptDevInstance, ptSyncChannel->ptCommonStatusBlock->bSyncHskMode)) + bState = HIL_FLAGS_EQUAL; + + /* Check which mode to handle */ + /* HIL_FLAGS_NOT_EQUAL corresponds to DEVICE_CONTROLLED */ + if( (bState == HIL_FLAGS_NOT_EQUAL) && + (usUnequalSyncBits & usBitMask) ) + { + fProcess = 1; + + } else if( (bState == HIL_FLAGS_EQUAL) && + (0 == (usUnequalSyncBits & usBitMask)) ) + { + fProcess = 1; + } + + if(fProcess) + { + /* There is a valid channel */ + /* Check if we have a callback assigned */ + if (ptSyncChannel->tSynch.pfnCallback) + ptSyncChannel->tSynch.pfnCallback( CIFX_NOTIFY_SYNC, 0, NULL, ptSyncChannel->tSynch.pvUser); + + /* Signal event to allow waiting for sync state without callback */ + if( ptDevInstance->tSyncData.ahSyncBitEvents[ulBitPos]) + OS_SetEvent(ptDevInstance->tSyncData.ahSyncBitEvents[ulBitPos]); + } + } + } + } + + /*-----------------------------------------------------*/ + /* Evaluate all changed handshake bits on all channels */ + /* Start with SYSTEM channel */ + do + { + uint16_t usChangedBits; + uint16_t usUnequalBits; + uint16_t usOldNetxFlags = ptChannel->usNetxFlags; /* Remember last known netX flags */ + uint32_t ulIdx; + + /* Address the handshake cell */ + HIL_DPM_HANDSHAKE_CELL_T* ptHskCell = &ptIrqToDsrBuffer->tHandshakeBuffer.atHsk[ptChannel->ulBlockID]; + + if(ptChannel->bHandshakeWidth == HIL_HANDSHAKE_SIZE_8BIT) + { + ptChannel->usNetxFlags = ptHskCell->t8Bit.bNetxFlags; + } else + { + ptChannel->usNetxFlags = LE16_TO_HOST(ptHskCell->t16Bit.usNetxFlags); + } + + /* Check which bits have changed since last interrupt from netX side */ + usChangedBits = usOldNetxFlags ^ ptChannel->usNetxFlags; + usUnequalBits = ptChannel->usNetxFlags ^ ptChannel->usHostFlags; + + /* Check if we have a valid channel (not for the bootloader) */ + if(ptChannel->fIsChannel) + { + /*------------------------------------------*/ + /* Process CHANNEL flags */ + /*------------------------------------------*/ + + /* -----------------------------------------*/ + /* Check COM Flag and I/O areas */ + /* -----------------------------------------*/ + if(usChangedBits & NCF_COMMUNICATING) + { + OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_COMMUNICATING_BIT_NO]); + + /* check if notification is registered */ + if (NULL != ptChannel->tComState.pfnCallback) + { + CIFX_NOTIFY_COM_STATE_T tData; + + tData.ulComState = (ptChannel->usNetxFlags & NCF_COMMUNICATING); + + ptChannel->tComState.pfnCallback( CIFX_NOTIFY_COM_STATE, + sizeof(tData), + &tData, + ptChannel->tComState.pvUser); + } + } + + /* Check IO - Input Areas */ + for(ulIdx = 0; ulIdx < ptChannel->ulIOInputAreas; ++ulIdx) + { + ProcessIOArea(ptChannel, + ptChannel->pptIOInputAreas[ulIdx], + usChangedBits, + usUnequalBits, + 0); + } + + /* Check IO - Output Areas */ + for(ulIdx = 0; ulIdx < ptChannel->ulIOOutputAreas; ++ulIdx) + { + ProcessIOArea(ptChannel, + ptChannel->pptIOOutputAreas[ulIdx], + usChangedBits, + usUnequalBits, + 1); + } + + /* -----------------------------------------*/ + /* Check COS Flags */ + /* -----------------------------------------*/ + /* Check netX for new COS flags */ + /* -----------------------------------------*/ + if( usUnequalBits & NCF_NETX_COS_CMD) + { + uint32_t ulNewCOSFlags = 0; + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read the flags and acknowledge them */ + ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptChannel->ptCommonStatusBlock->ulCommunicationCOS)); + + /* Check if they have changed */ + if(ptChannel->ulDeviceCOSFlags != ulNewCOSFlags) + { + ptChannel->ulDeviceCOSFlagsChanged = ptChannel->ulDeviceCOSFlags ^ ulNewCOSFlags; + ptChannel->ulDeviceCOSFlags = ulNewCOSFlags; + } + + DEV_ToggleBit(ptChannel, HCF_NETX_COS_ACK); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } + + /* Signal netX COS command flag change */ + if( usChangedBits & NCF_NETX_COS_CMD) + OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_NETX_COS_CMD_BIT_NO]); + + /* --------------------------------------------------*/ + /* Process our own COS flags (Write them to device) */ + /* --------------------------------------------------*/ + /* Check if we have new COS flags to write */ + if ( ptChannel->ulHostCOSFlagsSaved != ptChannel->ulHostCOSFlags) + { + /* Check if it is allowed to write new flags */ + if( !(usUnequalBits & NCF_HOST_COS_ACK)) + { + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Update COS flags */ + HWIF_WRITE32(ptDevInstance, ptChannel->ptControlBlock->ulApplicationCOS, HOST_TO_LE32(ptChannel->ulHostCOSFlags)); + + /* Store the written values */ + ptChannel->ulHostCOSFlagsSaved = ptChannel->ulHostCOSFlags; + + /* Signal new COS flags */ + DEV_ToggleBit(ptChannel, HCF_HOST_COS_CMD); + + /* Remove all enable flags from the local COS flags */ + ptChannel->ulHostCOSFlags &= ~(HIL_APP_COS_BUS_ON_ENABLE | HIL_APP_COS_INITIALIZATION_ENABLE | HIL_APP_COS_LOCK_CONFIGURATION_ENABLE); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } + } + + /* Signal host COS acknowledge flag change */ + if( usChangedBits & NCF_HOST_COS_ACK) + OS_SetEvent(ptChannel->ahHandshakeBitEvents[NCF_HOST_COS_ACK_BIT_NO]); + + } else + { + /*------------------------------------------*/ + /* Process SYSTEM DEVICE Hardware COS flags */ + /*------------------------------------------*/ + /*----------------------------------------------------*/ + /* Check if the hardware signals new system COS flags */ + /*----------------------------------------------------*/ + if( usUnequalBits & NSF_NETX_COS_CMD) + { + /* Read the flags and acknowledge them */ + HIL_DPM_SYSTEM_CHANNEL_T* ptSyschannel = (HIL_DPM_SYSTEM_CHANNEL_T*)ptChannel->pbDPMChannelStart; + uint32_t ulNewCOSFlags = 0; + + /* Lock flag access */ + OS_EnterLock(ptChannel->pvLock); + + /* Read the actual "System COS" flags */ + ulNewCOSFlags = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptSyschannel->tSystemState.ulSystemCOS)); + + /* Read the flags and acknowledge them */ + if(ptChannel->ulDeviceCOSFlags != ulNewCOSFlags) + { + ptChannel->ulDeviceCOSFlagsChanged = ptChannel->ulDeviceCOSFlags ^ ulNewCOSFlags; + ptChannel->ulDeviceCOSFlags = ulNewCOSFlags; + } + + DEV_ToggleBit(ptChannel, HSF_NETX_COS_ACK); + + /* Unlock flag access */ + OS_LeaveLock(ptChannel->pvLock); + } + + /* Signal COS CMD bits */ + if(usChangedBits & NSF_NETX_COS_CMD) + OS_SetEvent(ptChannel->ahHandshakeBitEvents[NSF_NETX_COS_CMD_BIT_NO]); + + /* Signal COS ACK bits */ + if(usChangedBits & NSF_HOST_COS_ACK) + OS_SetEvent(ptChannel->ahHandshakeBitEvents[NSF_HOST_COS_ACK_BIT_NO]); + } + + /*------------------------------------------*/ + /* Process the send receive MBX flags */ + /*------------------------------------------*/ + /* Check Receive Mailbox */ + if( usChangedBits & ptChannel->tRecvMbx.ulRecvACKBitmask) + { + if( (usUnequalBits & ptChannel->tRecvMbx.ulRecvACKBitmask) && + (NULL != ptChannel->tRecvMbx.pfnCallback) ) + { + CIFX_NOTIFY_RX_MBX_FULL_DATA_T tRxData; + + tRxData.ulRecvCount = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptChannel->tRecvMbx.ptRecvMailboxStart->usWaitingPackages)); + + ptChannel->tRecvMbx.pfnCallback(CIFX_NOTIFY_RX_MBX_FULL, + sizeof(tRxData), + &tRxData, + ptChannel->tRecvMbx.pvUser); + } + OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptChannel->tRecvMbx.bRecvACKBitoffset]); + } + + /* Check Send Mailbox */ + if( usChangedBits & ptChannel->tSendMbx.ulSendCMDBitmask) + { + if( (0 == (usUnequalBits & ptChannel->tSendMbx.ulSendCMDBitmask)) && + (NULL != ptChannel->tSendMbx.pfnCallback) ) + { + CIFX_NOTIFY_TX_MBX_EMPTY_DATA_T tTxData; + + tTxData.ulMaxSendCount = LE16_TO_HOST(HWIF_READ16(ptDevInstance, ptChannel->tSendMbx.ptSendMailboxStart->usPackagesAccepted)); + + ptChannel->tSendMbx.pfnCallback(CIFX_NOTIFY_TX_MBX_EMPTY, + sizeof(tTxData), + &tTxData, + ptChannel->tSendMbx.pvUser); + } + OS_SetEvent(ptChannel->ahHandshakeBitEvents[ptChannel->tSendMbx.bSendCMDBitoffset]); + } + + /* Next channel */ + if(ulChannel < ptDevInstance->ulCommChannelCount) + ptChannel = ptDevInstance->pptCommChannels[ulChannel]; + + ulChannel++; + + } while(ulChannel <= ptDevInstance->ulCommChannelCount); + } + } +} + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/Source/cifXToolkit.h b/libcifx/Toolkit/Source/cifXToolkit.h new file mode 100644 index 0000000..fa8d7d7 --- /dev/null +++ b/libcifx/Toolkit/Source/cifXToolkit.h @@ -0,0 +1,165 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: cifXToolkit.h 14803 2023-05-10 09:50:40Z RMayer $: + + Description: + cifX toolkit function declaration. + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2023-04-26 - Moved DEV function definitions to cifXHWFunctions.h + - Check parameter macros from cifXFunctions.c moved here + 2021-06-14 - Added new user function USER_GetCachedIOBufferMode() + 2018-10-10 - Updated header and definitions to new Hilscher defines + - Added chip type definitions for netX90/netX4000 (eCHIP_TYPE_NETX90 / eCHIP_TYPE_NETX4000) + - Derived from cifX Toolkit V1.6.0.0 + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file * +* cifX toolkit function declaration */ +/*****************************************************************************/ + +#ifndef CIFX_TOOLKIT__H +#define CIFX_TOOLKIT__H + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include "cifXHWFunctions.h" +#include "Hil_FileHeaderV3.h" + +#ifndef min + #define min(a,b) ((a > b)? b : a) +#endif + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_GLOBAL_API Toolkit global API functions */ +/*! \{ */ +/*****************************************************************************/ + +#define TOOLKIT_VERSION "cifX Toolkit 2.8.0.1" + +/* Toolkit Global Functions */ +int32_t cifXTKitInit (void); +void cifXTKitDeinit (void); +int32_t cifXTKitAddDevice (PDEVICEINSTANCE ptDevInstance); +int32_t cifXTKitRemoveDevice (char* szBoard, int fForceRemove); + +void cifXTKitDisableHWInterrupt(PDEVICEINSTANCE ptDevInstance); +void cifXTKitEnableHWInterrupt(PDEVICEINSTANCE ptDevInstance); + +void cifXTKitCyclicTimer (void); + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_STRUCTURE Toolkit Structure Definitions +* \{ */ +/*****************************************************************************/ +typedef struct DEVICE_CHANNEL_DATAtag +{ + int fModuleLoaded; /* Module loaded */ + int fCNFLoaded; /* CNF file loaded */ + char szFileName[16]; /* Module short file name 8.3 */ + uint32_t ulFileSize; +} DEVICE_CHANNEL_DATA; + +typedef struct DEVICE_CHANNEL_CONFIGtag +{ + int fFWLoaded; /* FW file loaded */ + DEVICE_CHANNEL_DATA atChannelData[CIFX_MAX_NUMBER_OF_CHANNELS]; +} DEVICE_CHANNEL_CONFIG, *PDEVICE_CHANNEL_CONFIG; + +#define CIFXTKIT_DOWNLOAD_NONE 0x00 /*!< Set when file download was skipped. Only valid if CIFX_NO_ERROR is returned */ +#define CIFXTKIT_DOWNLOAD_FIRMWARE 0x01 /*!< Successfully downloaded a firmware */ +#define CIFXTKIT_DOWNLOAD_MODULE 0x02 /*!< Successfully downloaded a firmware */ +#define CIFXTKIT_DOWNLOAD_EXECUTED 0x80 /*!< Download was executed */ + +/*****************************************************************************/ +/*! Global driver information structure used internally in the toolkit */ +/*****************************************************************************/ +typedef struct TKIT_DRIVER_INFORMATIONtag +{ + uint32_t ulOpenCount; /*!< Number of xDriverOpen calls */ + int fInitialized; /*!< !=1 if the toolkit was initialized successfully */ + +} TKIT_DRIVER_INFORMATION; + +/*****************************************************************************/ +/*! Structure passed to USER implemented function, for reading device * +* specific configuration options */ +/*****************************************************************************/ +typedef struct CIFX_DEVICE_INFORMATIONtag +{ + uint32_t ulDeviceNumber; /*!< Device number of the cifX card */ + uint32_t ulSerialNumber; /*!< Serial number */ + uint32_t ulChannel; /*!< Channel number (0..6) */ + PDEVICEINSTANCE ptDeviceInstance; /*!< Pointer to device instance */ + +} CIFX_DEVICE_INFORMATION, *PCIFX_DEVICE_INFORMATION; + +/*****************************************************************************/ +/*! Structure passed to USER implemented function, for getting device * +* specific configuration files */ +/*****************************************************************************/ +typedef struct CIFX_FILE_INFORMATIONtag +{ + char szShortFileName[16]; /*!< Short filename (8.3) of the file */ + char szFullFileName[CIFX_MAX_FILE_NAME_LENGTH]; /*!< Full filename (including path) to file */ +} CIFX_FILE_INFORMATION, *PCIFX_FILE_INFORMATION; + +#ifdef CIFX_TOOLKIT_PARAMETER_CHECK + #define CHECK_POINTER(param) if ((void*)NULL == param) return CIFX_INVALID_POINTER; + #define CHECK_DRIVERHANDLE(handle) if (&g_tDriverInfo != handle) return CIFX_INVALID_HANDLE; + #define CHECK_SYSDEVICEHANDLE(handle) if (CIFX_NO_ERROR != CheckSysdeviceHandle(handle)) return CIFX_INVALID_HANDLE; + #define CHECK_CHANNELHANDLE(handle) if (CIFX_NO_ERROR != CheckChannelHandle(handle)) return CIFX_INVALID_HANDLE; +#else + #define CHECK_POINTER(param) + #define CHECK_DRIVERHANDLE(handle) UNREFERENCED_PARAMETER(handle) + #define CHECK_SYSDEVICEHANDLE(handle) + #define CHECK_CHANNELHANDLE(handle) +#endif + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ + +/****************************************************************************** +* Functions to be implemented by USER * +******************************************************************************/ + +void USER_GetBootloaderFile (PDEVICEINSTANCE ptDevInstance, PCIFX_FILE_INFORMATION ptFileInfo); +int USER_GetOSFile (PCIFX_DEVICE_INFORMATION ptDevInfo, PCIFX_FILE_INFORMATION ptFileInfo); + +uint32_t USER_GetFirmwareFileCount (PCIFX_DEVICE_INFORMATION ptDevInfo); +int USER_GetFirmwareFile (PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo); +uint32_t USER_GetConfigurationFileCount(PCIFX_DEVICE_INFORMATION ptDevInfo); +int USER_GetConfigurationFile (PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo); + +int USER_GetWarmstartParameters (PCIFX_DEVICE_INFORMATION ptDevInfo, CIFX_PACKET* ptPacket); +void USER_GetAliasName (PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulMaxLen, char* szAlias); +int USER_GetInterruptEnable (PCIFX_DEVICE_INFORMATION ptDevInfo); +int USER_GetDMAMode (PCIFX_DEVICE_INFORMATION ptDevInfo); +int USER_GetCachedIOBufferMode (PCIFX_DEVICE_INFORMATION ptDevInfo); + +void USER_Trace (PDEVICEINSTANCE ptDevInstance, uint32_t ulTraceLevel, const char* szFormat, ...); + +extern uint32_t g_ulTraceLevel; + + +#ifdef __cplusplus +} +#endif + +#endif /* CIFX_TOOLKIT__H */ diff --git a/libcifx/Toolkit/Source/netX5x_hboot.c b/libcifx/Toolkit/Source/netX5x_hboot.c new file mode 100644 index 0000000..2ebd339 --- /dev/null +++ b/libcifx/Toolkit/Source/netX5x_hboot.c @@ -0,0 +1,458 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: $: + + Description: + cifX Toolkit implementation of the netX50/51 boot functions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-08-31 IsNetX51or52ROM() sets now eChipType in device instance after checking + 2018-09-24 moved hboot functions to separate module + + +**************************************************************************************/ + +#include "cifXToolkit.h" +#include "NetX_ROMLoader.h" +#include "netx50_romloader_dpm.h" +#include "netx51_romloader_dpm.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +/*****************************************************************************/ +/*! Structure describing a single HBOOT DPM mailbox */ +/*****************************************************************************/ +typedef struct HBOOT_MBX_DATA_Ttag +{ + uint8_t bHskMask; /*!< Handshake bit to toggle for this mailbox */ + uint32_t ulSize; /*!< Total size of mailbox */ + void* pvData; /*!< Data area of mailbox */ + volatile uint32_t* pulDataLen; /*!< Used size of mailbox */ +} HBOOT_MBX_DATA_T; + +/*****************************************************************************/ +/*! Structure describing HBOOT DPM */ +/*****************************************************************************/ +typedef struct HBOOT_DATA_Ttag +{ + HBOOT_HSREGISTER_T* ptHsk; /*!< Handshake cell */ + HBOOT_MBX_DATA_T tToNetXMailbox; /*!< Mailbox information Host-->netX */ + HBOOT_MBX_DATA_T tToHostMailbox; /*!< Mailbox information netX-->Host */ + +} HBOOT_DATA_T; + +/*****************************************************************************/ +/*! Detect a running netX51/52 ROMLoader via DPM +* \param ptDevInstance Instance to reset +* \return !=0 if netX51/52 has been detected */ +/*****************************************************************************/ +int IsNetX51or52ROM(PDEVICEINSTANCE ptDevInstance) +{ + int iRet = 0; + NETX51_DPM_CONFIG_AREA_T* ptDpmCfg = (NETX51_DPM_CONFIG_AREA_T*)ptDevInstance->pbDPM; + + if( (HWIF_READ8(ptDevInstance, ptDevInstance->pbDPM[NETX51_DETECT_OFFSET1]) == NETX51_DETECT_VALUE1) && + (HWIF_READ8(ptDevInstance, ptDevInstance->pbDPM[NETX51_DETECT_OFFSET2]) == NETX51_DETECT_VALUE2) && + (HWIF_READ32(ptDevInstance, ptDpmCfg->aulReserved1[0]) == 0) && + (HWIF_READ32(ptDevInstance, ptDpmCfg->aulReserved1[1]) == 0) ) + { + /* We found a valid entry */ + /* Check for netX51 or netX52 */ + uint32_t ulDpmNetxVersion = (MSK_NX56_dpm_netx_version_valid | MSK_NX56_dpm_netx_version_chiptype) & + HWIF_READ32(ptDevInstance, ptDpmCfg->ulDpmNetxVersion); + + if ( (MSK_NX56_dpm_netx_version_valid | ( 2 << SRT_NX56_dpm_netx_version_chiptype)) == ulDpmNetxVersion ) + { + /* This is a netX52 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX52; + } else + { + /* This is a netX51 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX51; + } + + iRet = 1; + } + + return iRet; +} + +/*****************************************************************************/ +/*! Wait for bitstate in netX50/51 ROMloader (hboot) DPM +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param ptHbootData Romloader boot data structure +* \param ulBitMask Bitmask to check +* \param bState Required state (HIL_FLAGS_EQUAL/NOT_EQUAL are supported +* \param ulTimeout Timeout in ms to wait for packet +* \return !=0 on success */ +/*****************************************************************************/ +static int hboot_waitforbitstate(PDEVICEINSTANCE ptDevInstance, + HBOOT_DATA_T* ptHbootData, + uint32_t ulBitMask, + uint8_t bState, + uint32_t ulTimeout) +{ + int iRet = 0; + int32_t lStartTime = 0; + HBOOT_HSREGISTER_T* ptHsk = ptHbootData->ptHsk; + uint8_t bActualState = 0; + uint8_t bHostFlags = 0; + + UNREFERENCED_PARAMETER(ptDevInstance); + + bHostFlags = HWIF_READ8(ptDevInstance, ptHsk->t8Bit.bHostFlags); + if((bHostFlags ^ HWIF_READ8(ptDevInstance, ptHsk->t8Bit.bNetXFlags)) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + /* The desired state is already there, so just return true */ + if(bActualState == bState) + return 1; + + /* If no timeout is given, don't try to wait for the Bit change */ + if(0 == ulTimeout) + return 0; + + lStartTime = (int32_t)OS_GetMilliSecCounter(); + + /* Poll for desired bit state */ + while(bActualState != bState) + { + uint32_t ulDiffTime = 0L; + + bHostFlags = HWIF_READ8(ptDevInstance, ptHsk->t8Bit.bHostFlags); + if((bHostFlags ^ HWIF_READ8(ptDevInstance, ptHsk->t8Bit.bNetXFlags)) & ulBitMask) + bActualState = HIL_FLAGS_NOT_EQUAL; + else + bActualState = HIL_FLAGS_EQUAL; + + /* Check for timeout */ + ulDiffTime = OS_GetMilliSecCounter() - lStartTime; + if ( ulDiffTime > ulTimeout) + { + break; + } + + OS_Sleep(0); + } + + if(bActualState == bState) + iRet = 1; + + return iRet; +} + +/*****************************************************************************/ +/*! Send a packet to the netX50/51 romloader (hboot) +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param ptHbootData Romloader boot data structure +* \param pbData Send data buffer +* \param ulDataLen Length of send data +* \param ulTimeout Timeout in ms to wait for packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t hboot_send_packet(PDEVICEINSTANCE ptDevInstance, + HBOOT_DATA_T* ptHbootData, + uint8_t* pbData, + uint32_t ulDataLen, + uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + HBOOT_HSREGISTER_T* ptHsk = ptHbootData->ptHsk; + uint8_t bToNetXMask = ptHbootData->tToNetXMailbox.bHskMask; + uint32_t ulMailboxSize = ptHbootData->tToNetXMailbox.ulSize; + void* pvMailbox = ptHbootData->tToNetXMailbox.pvData; + volatile uint32_t* pulMbxDataLen = ptHbootData->tToNetXMailbox.pulDataLen; + + if(ulDataLen > ulMailboxSize) + return CIFX_INVALID_BUFFERSIZE; + + if(!hboot_waitforbitstate(ptDevInstance, + ptHbootData, + bToNetXMask, + HIL_FLAGS_EQUAL, + ulTimeout)) + { + /* The mailbox is busy */ + lRet = CIFX_DEV_PUT_TIMEOUT; + + } else + { + uint8_t bHostFlags = 0; + + /* The mailbox is free */ + HWIF_WRITEN(ptDevInstance, + pvMailbox, + pbData, + ulDataLen); + + HWIF_WRITE32(ptDevInstance, pulMbxDataLen[0], HOST_TO_LE32(ulDataLen)); + + bHostFlags = HWIF_READ8(ptDevInstance, ptHsk->t8Bit.bHostFlags); + HWIF_WRITE8(ptDevInstance, ptHsk->t8Bit.bHostFlags, (bHostFlags ^ bToNetXMask)); + + lRet = CIFX_NO_ERROR; + } + + return lRet; +} + +/*****************************************************************************/ +/*! Get a packet from the netX50/51 romloader (hboot) +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param ptHBootData Romloader boot data structure +* \param pbResult Buffer for romloader error +* \param ulTimeout Timeout in ms to wait for packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t hboot_get_packet(PDEVICEINSTANCE ptDevInstance, + HBOOT_DATA_T* ptHBootData, + uint8_t* pbResult, + uint32_t ulTimeout) +{ + int32_t lRet = CIFX_DEV_GET_NO_PACKET; + + if(hboot_waitforbitstate(ptDevInstance, + ptHBootData, + NETX50_DPM_TOHOSTMBX_MSK, + HIL_FLAGS_NOT_EQUAL, + ulTimeout)) + { + HBOOT_HSREGISTER_T* ptHskReg = ptHBootData->ptHsk; + volatile uint8_t* pbMailbox = (volatile uint8_t*)ptHBootData->tToHostMailbox.pvData; + volatile uint32_t* pulMbxDataLen = ptHBootData->tToHostMailbox.pulDataLen; + uint8_t bToHostMask = ptHBootData->tToHostMailbox.bHskMask; + uint8_t bHostFlags = 0; + + lRet = CIFX_NO_ERROR; + + if( LE32_TO_HOST(HWIF_READ32(ptDevInstance, pulMbxDataLen[0])) != 1) + { + lRet = CIFX_DRV_INIT_STATE_ERROR; + + } else + { + *pbResult = HWIF_READ8(ptDevInstance, pbMailbox[0]); + } + + bHostFlags = HWIF_READ8(ptDevInstance, ptHskReg->t8Bit.bHostFlags); + if((bHostFlags ^ HWIF_READ8(ptDevInstance, ptHskReg->t8Bit.bNetXFlags)) & bToHostMask) + { + HWIF_WRITE8(ptDevInstance, ptHskReg->t8Bit.bHostFlags, (bHostFlags ^ bToHostMask)); + } + } + + return lRet; +} + +/*****************************************************************************/ +/*! Exchanges a packet with the netX50/51 romloader (hboot) +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param ptHBootData Romloader boot data structure +* \param pbSendData Send data buffer +* \param ulSendDataLen Send data length +* \param pbResult Buffer for romloader error +* \param ulTimeout Timeout in ms to wait for packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t hboot_transfer_packet(PDEVICEINSTANCE ptDevInstance, + HBOOT_DATA_T* ptHBootData, + uint8_t* pbSendData, + uint32_t ulSendDataLen, + uint8_t* pbResult, + uint32_t ulTimeout) +{ + int32_t lRet = CIFX_NO_ERROR; + + if(CIFX_NO_ERROR == (lRet = hboot_send_packet(ptDevInstance, ptHBootData, pbSendData, ulSendDataLen, ulTimeout))) + { + lRet = hboot_get_packet(ptDevInstance, ptHBootData, pbResult, ulTimeout); + } + + return lRet; +} + +/*****************************************************************************/ +/*! Downloads and starts the bootloader on netX50/51 (hboot) +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param pbFileData Pointer to bootloader file data +* \param ulFileDataLen Length of bootloader file +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXStartBootloader_hboot(PDEVICEINSTANCE ptDevInstance, + uint8_t* pbFileData, + uint32_t ulFileDataLen) +{ + int32_t lRet = CIFX_NO_ERROR; + uint32_t ulCopyLen = 0; + HBOOT_DATA_T tHBoot; + + OS_Memset(&tHBoot, 0, sizeof(tHBoot)); + + /* Check for chip type and initialize boot data structure */ + if((eCHIP_TYPE_NETX51 == ptDevInstance->eChipType) || (eCHIP_TYPE_NETX52 == ptDevInstance->eChipType)) + { + PNETX51_ROMLOADER_DPM ptDpm = (PNETX51_ROMLOADER_DPM)ptDevInstance->pbDPM; + + tHBoot.ptHsk = (HBOOT_HSREGISTER_T*)&ptDpm->tHandshake.ulHandshakeFlag; + + tHBoot.tToHostMailbox.bHskMask = NETX51_DPM_TOHOSTMBX_MSK; + tHBoot.tToHostMailbox.pulDataLen = &ptDpm->tHBootConfig.ulNetXToHostDataSize; + tHBoot.tToHostMailbox.pvData = (void*)ptDpm->abNetxToHostData; + tHBoot.tToHostMailbox.ulSize = sizeof(ptDpm->abNetxToHostData); + + tHBoot.tToNetXMailbox.bHskMask = NETX51_DPM_TONETXMBX_MSK; + tHBoot.tToNetXMailbox.pulDataLen = &ptDpm->tHBootConfig.ulHostToNetxDataSize; + tHBoot.tToNetXMailbox.pvData = (void*)ptDpm->abHostToNetxData; + tHBoot.tToNetXMailbox.ulSize = sizeof(ptDpm->abHostToNetxData); + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Found netX51 ROMloader"); + } + } else + { + PNETX50_ROMLOADER_DPM ptDpm = (PNETX50_ROMLOADER_DPM)ptDevInstance->pbDPM; + + tHBoot.ptHsk = &ptDpm->atHandshakeRegs[NETX50_DPM_HANDSHAKE_OFFSET]; + + tHBoot.tToHostMailbox.bHskMask = NETX50_DPM_TOHOSTMBX_MSK; + tHBoot.tToHostMailbox.pulDataLen = &ptDpm->ulNetxToHostDataSize; + tHBoot.tToHostMailbox.pvData = (void*)ptDpm->abNetxToHostData; + tHBoot.tToHostMailbox.ulSize = sizeof(ptDpm->abNetxToHostData); + + tHBoot.tToNetXMailbox.bHskMask = NETX50_DPM_TONETXMBX_MSK; + tHBoot.tToNetXMailbox.pulDataLen = &ptDpm->ulHostToNetxDataSize; + tHBoot.tToNetXMailbox.pvData = (void*)ptDpm->abHostToNetxData; + tHBoot.tToNetXMailbox.ulSize = sizeof(ptDpm->abHostToNetxData); + + /* Read romloader version */ + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + uint32_t ulLayout = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDpm->aulDpmHsRegs[NETX50_DPM_BLLAYOUT_OFFSET])); + ulLayout = (ulLayout & MSK_NETX50_DPM_BLLAYOUT) >> SRT_NETX50_DPM_BLLAYOUT; + + USER_Trace(ptDevInstance, + TRACE_LEVEL_DEBUG, + "Found netX50 ROMloader, DPM layout type 0x%08X", + ulLayout); + } + } + + ulCopyLen = tHBoot.tToNetXMailbox.ulSize; + + if(ulFileDataLen < sizeof(NETX_BOOTBLOCK_T)) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Invalid Bootloader file. File must be larger than 64 Bytes. (Detected Size:%u)", + ulFileDataLen); + lRet = CIFX_FILE_TYPE_INVALID; + } + + if(CIFX_NO_ERROR == lRet) + { + uint8_t bResult = 0; + int fLastPacketReceived = 0; + + /* Send Bootblock to device */ + if(CIFX_NO_ERROR != (lRet = hboot_transfer_packet(ptDevInstance, + &tHBoot, + pbFileData, + sizeof(NETX_BOOTBLOCK_T), + &bResult, + CIFX_TO_SEND_PACKET))) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error transfering bootheader to netX50 Bootloader (lRet = 0x%08X)", + lRet); + + } else if(0 != bResult) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "netX50 ROMloader rejected bootblock (bResult = %u)", + bResult); + lRet = CIFX_DRV_DOWNLOAD_FAILED; + + } else + { + /* Everything ok. start with rest of file */ + pbFileData += (uint32_t)sizeof(NETX_BOOTBLOCK_T); + ulFileDataLen -= (uint32_t)sizeof(NETX_BOOTBLOCK_T); + } + + /* Download whole file and abort if something went wrong during download */ + while( (ulFileDataLen > 0) && + (lRet == CIFX_NO_ERROR) ) + { + /* Last fragment may be shorter */ + if(ulFileDataLen < ulCopyLen) + ulCopyLen = ulFileDataLen; + + /* Place message in mailbox and wait until message has been processed */ + lRet = hboot_send_packet(ptDevInstance, &tHBoot, pbFileData, ulCopyLen, CIFX_TO_SEND_PACKET); + + if(CIFX_NO_ERROR != lRet) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error transferring data packet from/to netX50 Bootloader (lRet = 0x%08X)", + lRet); + + } else if(CIFX_NO_ERROR == (hboot_get_packet(ptDevInstance, &tHBoot, &bResult, 0))) + { + /* Download is finished or has been aborted. Check will be done below */ + fLastPacketReceived = 1; + break; + } + + pbFileData += ulCopyLen; + ulFileDataLen -= ulCopyLen; + } + + if(CIFX_NO_ERROR == lRet) + { + if(!fLastPacketReceived && + (CIFX_NO_ERROR != (lRet = hboot_get_packet(ptDevInstance, &tHBoot, &bResult, CIFX_TO_SEND_PACKET))) ) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error getting final packet from netX50 ROM Loader. lRet=0x%08X", + lRet); + } + + } else if( 0 != bResult) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "netX50 ROM Loader download error. bResult=%u", + bResult); + } + lRet = CIFX_DRV_DOWNLOAD_FAILED; + + } + } + } + + return lRet; +} diff --git a/libcifx/Toolkit/Source/netX5xx_hboot.c b/libcifx/Toolkit/Source/netX5xx_hboot.c new file mode 100644 index 0000000..ae8916e --- /dev/null +++ b/libcifx/Toolkit/Source/netX5xx_hboot.c @@ -0,0 +1,90 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: $: + + Description: + cifX Toolkit implementation of the netX100/500 boot functions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2018-09-24 moved hboot functions to separate module + + +**************************************************************************************/ + +#include "cifXToolkit.h" +#include "NetX_ROMLoader.h" +#include "cifXErrors.h" +#include "cifXEndianess.h" + +/*****************************************************************************/ +/*! Downloads and starts the bootloader on netX100 +* \param ptDevInstance Instance to download the bootloader to (needs a reset +* before downloading) +* \param pbFileData Pointer to bootloader file data +* \param ulFileDataLen Length of bootloader file +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXStartBootloader_netX100( PDEVICEINSTANCE ptDevInstance, + uint8_t* pbFileData, + uint32_t ulFileDataLen) +{ + int32_t lRet = CIFX_DRV_INIT_STATE_ERROR; + uint8_t* pbTmp = (uint8_t*)OS_Memalloc(ulFileDataLen); + + if(NULL == pbTmp) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error allocating memory for bootloader verification!"); + } + lRet = CIFX_FILE_LOAD_INSUFF_MEM; + } else + { + /* Startup 2nd stage Loader */ + HWIF_WRITEN(ptDevInstance, ptDevInstance->pbDPM, pbFileData, ulFileDataLen); + + HWIF_READN(ptDevInstance, pbTmp, ptDevInstance->pbDPM, ulFileDataLen); + + if(OS_Memcmp(pbTmp, pbFileData, ulFileDataLen) != 0) + { + lRet = CIFX_DRV_DOWNLOAD_FAILED; + + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Downloading of bootloader to DPM failed!"); + } + + } else + { + /* Toggle Start bit to let the second stage loader get started by netX ROMloader + Set bit 7 (Host) equal to Bit 3 (netX) */ + uint32_t ulState = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulSystemState)); + + if( ulState & MSK_SYSSTA_BOOT_ACTIVE) + /* Bit 3 is set, set Bit 7 */ + ulState |= (uint32_t)MSK_SYSSTA_BOOT_START; + else + /* Bit 3 is 0, clear Bit 7 */ + ulState &= (uint32_t)~MSK_SYSSTA_BOOT_START; + + HWIF_WRITE32(ptDevInstance, ptDevInstance->ptGlobalRegisters->ulSystemState, HOST_TO_LE32(ulState)); + + /* We are done with starting the netX */ + lRet = CIFX_NO_ERROR; + } + + OS_Memfree(pbTmp); + } + + return lRet; +} \ No newline at end of file diff --git a/libcifx/Toolkit/Source/netX90_netX4x00.c b/libcifx/Toolkit/Source/netX90_netX4x00.c new file mode 100644 index 0000000..7285f4e --- /dev/null +++ b/libcifx/Toolkit/Source/netX90_netX4x00.c @@ -0,0 +1,153 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netX90_netX4x00.c 14189 2021-08-31 10:49:31Z RMayer $: + + Description: + cifX Toolkit implementation of the netX90 and netX4000 detection functions + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-08-31 - Added separate functions for FLASH and ROM chip detection + - Fixed typo in function headers + 2018-11-30 created + +**************************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXEndianess.h" +#include "netx90_4x00_romloader_dpm.h" + + +/*****************************************************************************/ +/*! Detect a running netX4000 firmware via DPM mapped config registers +* In case of successful detection, device instance member eChipType is set. +* +* \param ptDevInstance Current device instance +* \return !=0 if netX4x00 has been detected */ +/*****************************************************************************/ +int IsNetX4x00FLASH(PDEVICEINSTANCE ptDevInstance) +{ + int iRet = 0; + uint32_t ulDpmNetxVersion = 0; + + /* Use the netX global register block to detect the netX chip */ + /* Note: the pointer to the global register block is set in cifXStartDevice() */ + + /* ulDpm_netx_version in register block (end of DPM memory) */ + ulDpmNetxVersion = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->reserved6)); + + /* Check for known version/cookie */ + if( HBOOT_DPM_NETX4000_COOKIE == ulDpmNetxVersion) + { + /* This is a netX4000 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX4000; + iRet = 1; + } else if( HBOOT_DPM_NETX4100_COOKIE == ulDpmNetxVersion) + { + /* This is a netX4100 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX4100; + iRet = 1; + } + + return iRet; +} + +/*****************************************************************************/ +/*! Detect a running netX4000 ROM code via DPM mapped config registers +* In case of successful detection, device instance member eChipType is set. +* +* \param ptDevInstance Current device instance +* \return !=0 if netX4x00 has been detected */ +/*****************************************************************************/ +int IsNetX4x00ROM(PDEVICEINSTANCE ptDevInstance) +{ + int iRet = 0; + uint32_t ulDpmNetxVersion = 0; + + /* Use the netX global register block to detect the netX chip */ + HBOOT_V2_DPM_CFG_AREA_T* ptDpmCfg = (HBOOT_V2_DPM_CFG_AREA_T*)ptDevInstance->pbDPM; + ulDpmNetxVersion = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDpmCfg->ulDpm_netx_version)); + + if( HBOOT_DPM_NETX4000_COOKIE == ulDpmNetxVersion ) + { + /* This is a netX4000 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX4000; + iRet = 1; + } else if( HBOOT_DPM_NETX4100_COOKIE == ulDpmNetxVersion ) + { + /* This is a netX4100 */ + ptDevInstance->eChipType = eCHIP_TYPE_NETX4100; + iRet = 1; + } + return iRet; +} + + +/*****************************************************************************/ +/*! Detect a running netX90 firmware via DPM mapped config registers +* In case of successful detection, device instance member eChipType is set. +* +* \param ptDevInstance Current device instance +* \return !=0 if netX90 has been detected */ +/*****************************************************************************/ +int IsNetX90FLASH(PDEVICEINSTANCE ptDevInstance) +{ + int iRet = 0; + uint32_t ulDpmNetxVersion = 0; + + /* Mask out netX90 specific differentiation */ + uint32_t ulMsk = ~((uint32_t)MSK_HBOOT_DPM_NETX90_TYPE | MSK_HBOOT_DPM_NETX90_ROMSTEP); + + /* Use the netX global register block to detect the netX chip */ + /* Note: the pointer to the global register block is set in cifXStartDevice() */ + + /* ulDpm_netx_version in register block (end of DPM memory) */ + ulDpmNetxVersion = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDevInstance->ptGlobalRegisters->reserved6)); + + /* Check for known version/cookie */ + if( HBOOT_DPM_NETX90_COOKIE == (ulMsk & ulDpmNetxVersion)) + { + ptDevInstance->eChipType = eCHIP_TYPE_NETX90; + iRet = 1; + } + + return iRet; +} + +/*****************************************************************************/ +/*! Detect a running netX90 ROM code via DPM mapped config registers +* In case of successful detection, device instance member eChipType is set. +* +* \param ptDevInstance Current device instance +* \return !=0 if netX90 has been detected */ +/*****************************************************************************/ +int IsNetX90ROM(PDEVICEINSTANCE ptDevInstance) +{ + int iRet = 0; + uint32_t ulDpmNetxVersion = 0; + + /* Mask out netX90 specific differentiation */ + uint32_t ulMsk = ~((uint32_t)MSK_HBOOT_DPM_NETX90_TYPE | MSK_HBOOT_DPM_NETX90_ROMSTEP); + + /* When checking at DPM start, also look for ROMcode cookie 'NXBL' at Offset 0x100 */ + uint32_t ulCookie = 0; + HBOOT_V2_DPM_CFG_AREA_T* ptDpmCfg = (HBOOT_V2_DPM_CFG_AREA_T*)ptDevInstance->pbDPM; + + ulDpmNetxVersion = LE32_TO_HOST(HWIF_READ32(ptDevInstance, ptDpmCfg->ulDpm_netx_version)); + + HWIF_READN(ptDevInstance, &ulCookie, (ptDevInstance->pbDPM + HBOOT_V2_DPM_ID_ADR), sizeof(ulCookie)); + + if((HBOOT_DPM_NETX90_COOKIE == (ulMsk & ulDpmNetxVersion)) && + (HOST_TO_LE32(HBOOT_V2_DPM_ID) == ulCookie) ) + { + ptDevInstance->eChipType = eCHIP_TYPE_NETX90; + iRet = 1; + } + + return iRet; +} \ No newline at end of file diff --git a/libcifx/Toolkit/Source/netx50_romloader_dpm.h b/libcifx/Toolkit/Source/netx50_romloader_dpm.h new file mode 100644 index 0000000..b13de2d --- /dev/null +++ b/libcifx/Toolkit/Source/netx50_romloader_dpm.h @@ -0,0 +1,63 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netx50_romloader_dpm.h 6598 2014-10-02 08:57:18Z stephans $: + + Description: + netX50 ROM Loader DPM layout + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2009-01-22 initial version + +**************************************************************************************/ + +#ifndef __NETX50_ROMLOADER_DPM__H +#define __NETX50_ROMLOADER_DPM__H + +#define NETX50_BOOTID_DPM 0x4C42584E /*!< 'NXBL' DPM boot identifier ('NXBL') */ +#define NETX50_BOOTID_DPM_STRING "NXBL" /*!< 'NXBL' DPM boot identifier ('NXBL') */ + +#define NETX50_DPM_TONETXMBX_MSK 0x01 +#define NETX50_DPM_TOHOSTMBX_MSK 0x02 + +#define NETX50_DPM_HANDSHAKE_OFFSET 63 /*!< Offset of the command handshake flags */ + +#define NETX50_DPM_BLLAYOUT_OFFSET 118 /*!< Offset of the bootloader DPM layout in aulDpmHsRegs */ +#define MSK_NETX50_DPM_BLLAYOUT 0xFF00 +#define SRT_NETX50_DPM_BLLAYOUT 8 + +typedef union HBOOT_HSREGISTER_Ttag +{ + struct + { + uint16_t usReserved; + volatile uint8_t bNetXFlags; /*!< Flags signalled by netX50/51 */ + volatile uint8_t bHostFlags; /*!< Flags signalled by Host */ + } t8Bit; + uint32_t ulVal; + +} HBOOT_HSREGISTER_T; + +typedef struct NETX50_ROMLOADER_DPMtag +{ + volatile uint32_t ulDpmBootId; + volatile uint32_t ulDpmByteSize; + volatile uint32_t ulSdramGeneralCtrl; + volatile uint32_t ulSdramTimingCtrl; + volatile uint32_t ulSdramByteSize; + volatile uint32_t aulReserved14[249]; + volatile uint32_t ulHostToNetxDataSize; + volatile uint32_t ulNetxToHostDataSize; + volatile uint8_t abHostToNetxData[4096]; + volatile uint8_t abNetxToHostData[2048]; + HBOOT_HSREGISTER_T atHandshakeRegs[128]; + volatile uint32_t aulDpmHsRegs[128]; + +} NETX50_ROMLOADER_DPM, *PNETX50_ROMLOADER_DPM; + +#endif /* __NETX50_ROMLOADER_DPM__H */ diff --git a/libcifx/Toolkit/Source/netx51_romloader_dpm.h b/libcifx/Toolkit/Source/netx51_romloader_dpm.h new file mode 100644 index 0000000..c8b3386 --- /dev/null +++ b/libcifx/Toolkit/Source/netx51_romloader_dpm.h @@ -0,0 +1,134 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netx51_romloader_dpm.h 6614 2014-10-08 13:24:44Z stephans $: + + Description: + netX51 ROM Loader DPM layout + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2014-01-10 initial version + +**************************************************************************************/ + +#ifndef __NETX51_ROMLOADER_DPM__H +#define __NETX51_ROMLOADER_DPM__H + +#define NETX51_DETECT_OFFSET1 (0xD9) +#define NETX51_DETECT_VALUE1 (0xF2) +#define NETX51_DETECT_OFFSET2 (0xCC) +#define NETX51_DETECT_VALUE2 (0xF2) + +#define NETX51_BOOTID_OFFSET (0x100) +#define NETX51_BOOTID_DPM 0x4C42584E /*!< 'NXBL' DPM boot identifier ('NXBL') */ +#define NETX51_BOOTID_DPM_STRING "NXBL" /*!< 'NXBL' DPM boot identifier ('NXBL') */ + +#define NETX51_DPM_TONETXMBX_MSK 0x01 +#define NETX51_DPM_TOHOSTMBX_MSK 0x02 + +typedef struct NETX51_HBOOT_HSK_AREA_Ttag +{ + volatile uint32_t ulHandshakeFlag; + uint32_t aulReserved[31]; +} NETX51_HBOOT_HSK_AREA_T; + +typedef struct NETX51_HBOOT_CFG_AREA_Ttag +{ + volatile uint32_t ulDpmBootId; + volatile uint32_t ulDpmByteSize; + volatile uint32_t ulSdramGeneralCtrl; + volatile uint32_t ulSdramTimingCtrl; + volatile uint32_t ulSdramByteSize; + volatile uint32_t aulReserved[25]; + volatile uint32_t ulNetXToHostDataSize; + volatile uint32_t ulHostToNetxDataSize; +} NETX51_HBOOT_CFG_AREA_T; + +#define MSK_NX56_dpm_rdy_cfg_rdy_pol (0x00000001) +#define SRT_NX56_dpm_rdy_cfg_rdy_drv_mode (1) + +#define MSK_NX56_dpm_netx_version_step (0x000000FF) +#define SRT_NX56_dpm_netx_version_step (0) +#define MSK_NX56_dpm_netx_version_license (0x00000100) +#define SRT_NX56_dpm_netx_version_license (8) +#define MSK_NX56_dpm_netx_version_valid (0x00000200) +#define SRT_NX56_dpm_netx_version_valid (9) +#define MSK_NX56_dpm_netx_version_chiptype (0x00000c00) +#define SRT_NX56_dpm_netx_version_chiptype (10) + +typedef struct NETX51_DPM_CONFIG_AREA_Ttag +{ + volatile uint32_t ulDpmCfg0x0; + volatile uint32_t ulDpmIfCfg; + volatile uint32_t ulDpmPioCfg0; + volatile uint32_t ulDpmPioCfg1; + volatile uint32_t ulDpmAddrCfg; + volatile uint32_t ulDpmTimingCfg; + volatile uint32_t ulDpmRdyCfg; + volatile uint32_t ulDpmStatus; + volatile uint32_t ulDpmStatusErrReset; + volatile uint32_t ulDpmStatusErrAddr; + volatile uint32_t ulDpmMiscCfg; + volatile uint32_t ulDpmIoCfgMisc; + uint32_t aulReserved1[2]; + volatile uint32_t ulDpmTunnelCfg; + volatile uint32_t ulDpmItbaddr; + volatile uint32_t ulDpmWin1End; + volatile uint32_t ulDpmWin1Map; + volatile uint32_t ulDpmWin2End; + volatile uint32_t ulDpmWin2Map; + volatile uint32_t ulDpmWin3End; + volatile uint32_t ulDpmWin3Map; + volatile uint32_t ulDpmWin4End; + volatile uint32_t ulDpmWin4Map; + uint32_t aulReserved2[8]; + volatile uint32_t ulDpmIrqRaw; + volatile uint32_t ulDpmIrqArmMaskSet; + volatile uint32_t ulDpmIrqArmMaskReset; + volatile uint32_t ulDpmIrqArmMasked; + volatile uint32_t ulDpmIrqXpicMaskSet; + volatile uint32_t ulDpmIrqXpicMaskReset; + volatile uint32_t ulDpmIrqXpicMasked; + volatile uint32_t ulDpmIrqFiqMaskSet; + volatile uint32_t ulDpmIrqFiqMaskReset; + volatile uint32_t ulDpmIrqFiqMasked; + volatile uint32_t ulDpmIrqIrqMaskSet; + volatile uint32_t ulDpmIrqIrqMaskReset; + volatile uint32_t ulDpmIrqIrqMasked; + uint32_t ulReserved3; + volatile uint32_t ulDpmSwIrq; + uint32_t ulReserved4; + volatile uint32_t ulDpmReservedNetx50WgdHostTimeout; + volatile uint32_t ulDpmReservedNetx50WgdHostTrigger; + volatile uint32_t ulDpmReservedNetx50WgdNetxTimeout; + volatile uint32_t ulDpmSysStaBigend16; + volatile uint32_t ulDpmReservedNetx50TimerCtrl; + volatile uint32_t ulDpmReservedNetx50TimerStartVal; + volatile uint32_t ulDpmSysSta; + volatile uint32_t ulDpmResetRequest; + volatile uint32_t ulDpmFirmwareIrqRaw; + uint32_t ulReserved5; + volatile uint32_t ulDpmFirmwareIrqRaw2; + uint32_t ulReserved6; + volatile uint32_t ulDpmFirmwareIrqMask; + volatile uint32_t ulDpmNetxVersionBigend16; + volatile uint32_t ulDpmFirmwareIrqMask2; + volatile uint32_t ulDpmNetxVersion; +}NETX51_DPM_CONFIG_AREA_T; + +typedef struct NETX51_ROMLOADER_DPMtag +{ + NETX51_DPM_CONFIG_AREA_T tDpmConfig; + NETX51_HBOOT_CFG_AREA_T tHBootConfig; + NETX51_HBOOT_HSK_AREA_T tHandshake; + volatile uint8_t abNetxToHostData[512]; + volatile uint8_t abHostToNetxData[1024]; + +} NETX51_ROMLOADER_DPM, *PNETX51_ROMLOADER_DPM; + +#endif /* __NETX51_ROMLOADER_DPM__H */ diff --git a/libcifx/Toolkit/Source/netx90_4x00_romloader_dpm.h b/libcifx/Toolkit/Source/netx90_4x00_romloader_dpm.h new file mode 100644 index 0000000..9694349 --- /dev/null +++ b/libcifx/Toolkit/Source/netx90_4x00_romloader_dpm.h @@ -0,0 +1,103 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: netx90_4x00_romloader_dpm.h 14189 2021-08-31 10:49:31Z RMayer $: + + Description: + netX90 and netX4000 ROM Loader DPM layout + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2021-08-31 added some comments + 2018-11-30 initial version + +**************************************************************************************/ + +#ifndef __NETX90_4X00_ROMLOADER_DPM_H__ +#define __NETX90_4X00_ROMLOADER_DPM_H__ + +/*-----------------------------------------------*/ +/* netX90 chip identifier definitions */ +/*-----------------------------------------------*/ +#define HBOOT_DPM_NETX90_COOKIE 0x0900000D + +#define MSK_HBOOT_DPM_NETX90_TYPE 0x00FF0000 +#define MSK_HBOOT_DPM_NETX90_ROMSTEP 0x0000FF00 + +/*-----------------------------------------------*/ +/* netX4000 chip identifier definitions */ +/*-----------------------------------------------*/ +#define HBOOT_DPM_NETX4000_COOKIE 0x84524C0B +#define HBOOT_DPM_NETX4100_COOKIE 0x93615B0B + +/*-----------------------------------------------*/ +/* netX ROM code definitions */ +/*-----------------------------------------------*/ +/* The 'NXBL' DPM boot identifier ('NXBL') is shown when the ROM code is running. */ +#define HBOOT_V2_DPM_ID 0x4c42584e +#define HBOOT_V2_DPM_ID_ADR 0x100 + +/* Definition of the ROM code DPM layout and functions */ +#define HBOOT_V2_DPM_NETX_TO_HOST_BUFFERSIZE 0x0200 +#define HBOOT_V2_DPM_HOST_TO_NETX_BUFFERSIZE 0x0400 + +#define HBOOT_V2_DPM_BITFLIP_BUFFERSIZE 0xf800 + +#define DPM_BOOT_NETX_RECEIVED_CMD 0x01 +#define DPM_BOOT_NETX_SEND_CMD 0x02 + +#define DPM_BOOT_HOST_SEND_CMD 0x01 +#define DPM_BOOT_HOST_RECEIVED_CMD 0x02 + +#define SRT_HANDSHAKE_REG_ARM_DATA 16 +#define SRT_HANDSHAKE_REG_PC_DATA 24 + +#define HBOOT_MSK_SYS_STA_BITFLIP 0x80 + +#define MSK_HBOOT_dpm_sys_sta_NETX_STA_CODE_ro 0x00ff0000U +#define SRT_HBOOT_dpm_sys_sta_NETX_STA_CODE_ro 8 + +#define MSK_HBOOT_dpm_status_unlocked 0x00000001U +#define SRT_HBOOT_dpm_status_unlocked 0 + + +typedef struct HBOOT_V2_DPM_CFG_AREA_STRUCT +{ + volatile uint32_t aulReserved0[7]; + volatile uint32_t ulDpm_status; + volatile uint32_t aulReserved1[46]; + volatile uint32_t ulDpm_sys_sta; + volatile uint32_t ulDpm_reset_request; + volatile uint32_t aulReserved5[7]; + volatile uint32_t ulDpm_netx_version; +} HBOOT_V2_DPM_CFG_AREA_T; + + + +typedef struct HBOOT_V2_DPM_BLOCKS_STRUCTURE +{ + volatile uint32_t ulDpmBootId; + volatile uint32_t ulDpmByteSize; + volatile uint32_t aulReserved_08[28]; + volatile uint32_t ulNetxToHostDataSize; + volatile uint32_t ulHostToNetxDataSize; + volatile uint32_t ulHandshake; + volatile uint32_t aulReserved_84[31]; + volatile uint8_t aucNetxToHostData[HBOOT_V2_DPM_NETX_TO_HOST_BUFFERSIZE]; + volatile uint8_t aucHostToNetxData[HBOOT_V2_DPM_HOST_TO_NETX_BUFFERSIZE]; +} HBOOT_V2_DPM_BLOCKS_T; + + +typedef struct HBOOT_V2_DPM_AREA_STRUCTURE +{ + HBOOT_V2_DPM_CFG_AREA_T tConfigurationRegisters; + HBOOT_V2_DPM_BLOCKS_T tDpmBlocks; + volatile uint8_t aucBitflipArea[HBOOT_V2_DPM_BITFLIP_BUFFERSIZE]; +} HBOOT_V2_DPM_AREA_T; + + +#endif /* __NETX90_4X00_ROMLOADER_DPM_H__ */ diff --git a/libcifx/Toolkit/User/TKitUser_Custom.c b/libcifx/Toolkit/User/TKitUser_Custom.c new file mode 100644 index 0000000..1051e69 --- /dev/null +++ b/libcifx/Toolkit/User/TKitUser_Custom.c @@ -0,0 +1,186 @@ +/************************************************************************************** + +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + +*************************************************************************************** + + $Id: TKitUser_Custom.c 14564 2022-07-26 13:28:44Z RMayer $: + + Description: + USER implemented functions called by the cifX Toolkit. + + Changes: + Date Description + ----------------------------------------------------------------------------------- + 2022-06-14 Added USER_GetCachedIOBufferMode() function template + 2021-08-13 Add a new line handling to USER_Trace() if necessary + 2006-08-07 initial version + +**************************************************************************************/ + +/*****************************************************************************/ +/*! \file TKitUser_Custom.c * +* USER implemented functions called by the cifX Toolkit */ +/*****************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXErrors.h" + +#error "Implement target system specifc user functions in this file" + +/*****************************************************************************/ +/*! \addtogroup CIFX_TK_USER User specific implementation +* \{ */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! Returns OS file information for the given device/channel and Idx +* passed as argument. This is needed for module downloading +* \param ptDevInfo DeviceInfo for which the +* firmware file should be delivered +* \param ptFileInfo Short and full file name of the firmware. Used in +* calls to OS_OpenFile() +* \return != 0 on success */ +/*****************************************************************************/ +int USER_GetOSFile(PCIFX_DEVICE_INFORMATION ptDevInfo, PCIFX_FILE_INFORMATION ptFileInfo) +{ +} + +/*****************************************************************************/ +/*! Returns the number of firmware files associated with the card/channel, +* passed as argument. +* \param ptDevInfo DeviceInfo including channel number, for which the +* firmware file count should be read +* \return number for firmware files, to download. The returned value will +* be used as maximum value for ulIdx in calls to +* USER_GetFirmwareFile */ +/*****************************************************************************/ +uint32_t USER_GetFirmwareFileCount(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ +} + +/*****************************************************************************/ +/*! Returns firmware file information for the given device/channel and Idx +* passed as argument. +* \param ptDevInfo DeviceInfo including channel number, for which the +* firmware file should be delivered +* \param ulIdx Index of the returned file +* (0..USER_GetFirmwareFileCount() - 1) +* \param ptFileInfo Short and full file name of the firmware. Used in +* calls to OS_OpenFile() +* \return !=0 on success */ +/*****************************************************************************/ +int USER_GetFirmwareFile(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo) +{ +} + +/*****************************************************************************/ +/*! Returns the number of configuration files associated with the card/ +* channel, passed as argument. +* \param ptDevInfo DeviceInfo including channel number, for which the +* configuration file count should be read +* \return number for configuration files, to download. The returned value +* will be used as maximum value for ulIdx in calls to +* USER_GetConfgirationFile */ +/*****************************************************************************/ +uint32_t USER_GetConfigurationFileCount(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ +} + +/*****************************************************************************/ +/*! Returns configuration file information for the given device/channel and +* Idx passed as argument. +* \param ptDevInfo DeviceInfo including channel number, for which the +* configuration file should be delivered +* \param ulIdx Index of the returned file +* (0..USER_GetConfigurationFileCount() - 1) +* \param ptFileInfo Short and full file name of the configuration. Used in +* calls to OS_OpenFile() +* \return !=0 on success */ +/*****************************************************************************/ +int USER_GetConfigurationFile(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo) +{ +} + +/*****************************************************************************/ +/*! Retrieve the full file name of the cifX ROM loader binary image +* \param ptDevInstance Pointer to the device instance +* \param ptFileInfo Short and full file name of the bootloader. Used in +* calls to OS_OpenFile() */ +/*****************************************************************************/ +void USER_GetBootloaderFile(PDEVICEINSTANCE ptDevInstance, PCIFX_FILE_INFORMATION ptFileInfo) +{ +} + +/*****************************************************************************/ +/*! Read the warmstart data from a given warmstart file +* \param ptDevInfo Device- and Serial number of the card +* \param ptPacket Buffer for the warmstart packet +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int USER_GetWarmstartParameters(PCIFX_DEVICE_INFORMATION ptDevInfo, CIFX_PACKET* ptPacket) +{ +} + +/*****************************************************************************/ +/*! Retrieve the alias name of a cifX Board depending on the Device and +* Serialnumber passed during this call +* \param ptDevInfo Device- and Serial number of the card +* \param ulMaxLen Maximum length of alias +* \param szAlias Buffer to copy alias to. A string of length 0 means +* no alias */ +/*****************************************************************************/ +void USER_GetAliasName(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulMaxLen, char* szAlias) +{ +} + +/*****************************************************************************/ +/*! Check if interrupts should be enabled for this device +* \param ptDevInfo Device Information +* \return !=0 to enable interrupts */ +/*****************************************************************************/ +int USER_GetInterruptEnable(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ +} + +/*****************************************************************************/ +/*! Get actual I/O buffer caching mode for the given device +* \param ptDevInfo Device Information +* \return eCACHED_MODE_ON to enable caching */ +/*****************************************************************************/ +int USER_GetCachedIOBufferMode(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ +} + +#ifdef CIFX_TOOLKIT_DMA +/*****************************************************************************/ +/*! Check if dma should be enabled for this device +* \param ptDevInfo Device Information +* \return CIFX_DMA_STATE_ON/CIFX_DMA_STATE_OFF */ +/*****************************************************************************/ +int USER_GetDMAMode(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + /* we cannot handle dma in win32 user mode */ + UNREFERENCED_PARAMETER(ptDevInfo); + + return CIFX_DMA_STATE_OFF; +} +#endif + +/*****************************************************************************/ +/*! User trace function +* right while cifXTKitAddDevice is being processed +* \param ptDevInstance Device instance +* \param ulTraceLevel Trace level +* \param szFormat Format string */ +/*****************************************************************************/ +void USER_Trace(PDEVICEINSTANCE ptDevInstance, uint32_t ulTraceLevel, const char* szFormat, ...) +{ + /* Add an new line on the end of the trace strings if necessary */ + /* e.g. printf("\r\n\"); */ +} + + +/*****************************************************************************/ +/*! \} */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/doxygen.h b/libcifx/Toolkit/doxygen.h new file mode 100644 index 0000000..42f30d6 --- /dev/null +++ b/libcifx/Toolkit/doxygen.h @@ -0,0 +1,98 @@ +/*****************************************************************************/ +/*! \defgroup CIFX_TOOLKIT cifX DPM Toolkit +* +* The cifX DPM Toolkit allows users to write their own drivers +* accessing the dualport directly. +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_TK_STRUCTURE Toolkit Structure Definitions +* \ingroup CIFX_TOOLKIT +* +* Defines Device instance/ChannelInstance structures and internal data +* storage +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_TOOLKIT_FUNCS cifX DPM Toolkit specific functions +* \ingroup CIFX_TOOLKIT +* +* Defines cifX DPM Toolkit specific functions, e.g. Initialize Toolkit, +* or add cards to toolkit management +* +* Example for Toolkit initialization +* \code +* long lRet = cifXTKitInit(); +* +* if(CIFX_NO_ERROR == lRet) +* { +* PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)OS_Memalloc(sizeof(*ptDevInstance)); +* OS_Memset(ptDevInstance, 0, sizeof(*ptDevInstance)); +* ptDevInstance->fPCICard = 0; +* ptDevInstance->pvOSDependent = NULL; +* ptDevInstance->pbDPM = ; +* ptDevInstance->ulDPMSize = ; +* OS_Strncpy(ptDevInstance->szName, +* "cifX0", +* sizeof(ptDevInstance->szName)); +* +* // Add the device to the toolkits handled device list +* lRet = cifXTKitAddDevice(ptDevInstance); +* +* // If it succeeded do device tests +* if(CIFX_NO_ERROR == lRet) +* { +* // Work with the device +* } +* } +* cifXTKitDeinit(); +* \endcode */ +/*****************************************************************************/ + + +/*****************************************************************************/ +/*! \defgroup CIFX_TK_DPMSTRUCTURE DPM Structure Definition +* \ingroup CIFX_TOOLKIT +* +* Defines dualport structures, flags +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_TK_HARDWARE Hardware Access +* \ingroup CIFX_TOOLKIT +* +* The hardware access functions service the dualport flags, +* memory areas. +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_DRIVER_API cifX Driver API implementation +* \ingroup CIFX_TOOLKIT +* +* The API implementation services the hardware access functions according +* to the function definition +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_TK_OS_ABSTRACTION Operating System Abstraction +* \ingroup CIFX_TOOLKIT +* +* Abstracts the O/S dependent functions to be used by the toolkit. +* This part needs to be implemented by the user, according to his O/S. +* */ +/*****************************************************************************/ + +/*****************************************************************************/ +/*! \defgroup CIFX_TK_USER User specific implementation +* \ingroup CIFX_TOOLKIT +* +* User specific implementation of storing/resolving card configuration +* files, etc. These functions are called in the toolkit and MUST be +* implemented by the user. +* */ +/*****************************************************************************/ diff --git a/libcifx/Toolkit/doxygen/Hilscher.css b/libcifx/Toolkit/doxygen/Hilscher.css new file mode 100644 index 0000000..efecbf8 --- /dev/null +++ b/libcifx/Toolkit/doxygen/Hilscher.css @@ -0,0 +1,414 @@ +BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { + font-family: Geneva, Arial, Helvetica, sans-serif; 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Hilscher Homepage + +
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Copyright Hilscher Gesellschaft fr Systemautomation mbH.
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+ diff --git a/libcifx/Toolkit/doxygen/header.html b/libcifx/Toolkit/doxygen/header.html new file mode 100644 index 0000000..2657006 --- /dev/null +++ b/libcifx/Toolkit/doxygen/header.html @@ -0,0 +1,26 @@ + + + cifX DPM Toolkit: Documentation (Hilscher GmbH) + + + +
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cifX Toolkit Documentation

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diff --git a/libcifx/Toolkit/doxygen/header.tex b/libcifx/Toolkit/doxygen/header.tex new file mode 100644 index 0000000..69c6865 --- /dev/null +++ b/libcifx/Toolkit/doxygen/header.tex @@ -0,0 +1,71 @@ +\documentclass[a4paper]{article} +\usepackage{a4wide} +\usepackage{makeidx} +\usepackage{fancyhdr} +\usepackage{graphicx} +\usepackage{multicol} +\usepackage{float} +\usepackage{textcomp} +\usepackage{alltt} +\usepackage[latin1]{inputenc} +\usepackage{hyperref} +\usepackage{bookman} +\usepackage{helvet} +\usepackage{doxygen} +\makeindex +\setcounter{tocdepth}{3} +\renewcommand{\footrulewidth}{0.4pt} + +\makeatletter + +\renewcommand\section{\newpage\@startsection {section}{1}{\z@}% + {-3.5ex \@plus -1ex \@minus -.2ex}% + {2.3ex \@plus.2ex}% + {\normalfont\Large\bfseries}} + +\renewcommand*\l@section{\@dottedtocline{1}{0em}{2.0em}} +\renewcommand*\l@subsection{\@dottedtocline{2}{2.5em}{3.5em}} +\renewcommand*\l@subsubsection{\@dottedtocline{3}{5.0em}{4.0em}} +\renewcommand*\l@paragraph{\@dottedtocline{4}{7.5em}{3.5em}} +\renewcommand*\l@subparagraph{\@dottedtocline{5}{10.0em}{3.5em}} +\makeatother + +\setlength{\headheight}{1.75cm} +\setlength{\topmargin}{0.0cm} +\setcounter{tocdepth}{3} + +\lhead{\includegraphics*[height=1.5cm]{images/hilscher_logo}} +\chead{\fancyplain{}{$projectname}} +\rhead{\fancyplain{}{Page \bfseries\thepage}} + +\lfoot{Hilscher Gesellschaft fr Systemautomation mbH} +\cfoot{} +\rfoot{Internal project documentation} + +\begin{document} + +\begin{titlepage} + +\begin{flushright} +\includegraphics[width=8cm]{images/Hilscher_logo} \\ +\vspace*{7.5cm} +\large Project source code documentation \\ +$projectname \\ +\Large FOR INTERNAL USE ONLY \\ +\normalsize +\vspace*{5.5cm} +Hilscher Gesellschaft fr Systemautomation mbH \\ +65795 Hattersheim \\ +Rheinstra{\ss}e 15 \\ +Tel. 06190/9907-0 \\ +Fax. 06190/9907-50 \\ +\end{flushright} + +\end{titlepage} + +\pagenumbering{roman} +\tableofcontents + +\newpage +\setcounter{page}{1} +\pagenumbering{arabic} diff --git a/libcifx/Toolkit/doxygen/hilscher_logo.jpg b/libcifx/Toolkit/doxygen/hilscher_logo.jpg new file mode 100644 index 0000000..3572a33 Binary files /dev/null and b/libcifx/Toolkit/doxygen/hilscher_logo.jpg differ diff --git a/libcifx/Toolkit/doxygen/hilscher_logo.png b/libcifx/Toolkit/doxygen/hilscher_logo.png new file mode 100644 index 0000000..51ee307 Binary files /dev/null and b/libcifx/Toolkit/doxygen/hilscher_logo.png differ diff --git a/libcifx/Toolkit/version_history.txt b/libcifx/Toolkit/version_history.txt new file mode 100644 index 0000000..dbd18c8 --- /dev/null +++ b/libcifx/Toolkit/version_history.txt @@ -0,0 +1,554 @@ +cifX-Toolkit Version History: +============================= + + V2.8.0.1 +----------------- + - Added missng ulOption parameter in SerialDPM example functions (Read_NXxx / Write_NXxx) + + V2.8.0.0 +----------------- + - Added chip-type verfication for firmware download + - Added new compile time option CIFX_TOOLKIT_USE_CUSTOM_DRV_FUNCS + - Added license information + - Update HILDEF headers to version 20230403-00 + - Fixed error/rejection during NXS firmware download + - Fixed issue which only allowed a COLDSTART when APP-CPU and IDPM was used + - Fixed file upload for empty files (file size = 0) + - Fixed issue regarding unaligned access to the DPM + + V2.7.3.0 +----------------- + - Added new option and functions to enable cached I/O buffer access for PLC functions + Modified and extended OS functions: + OS_MapUserPointer()/OS_FlushCacheMemory_ToDevice()/OS_InvalidateCacheMemory_FromDevice() + Modified and extended USER and CIFX API functions: + USER_GetCachedIOBufferMode() / xChannelPLCMemoryPtr() + - Updated 2nd Stage Loader to V1.8.0.0 + + V2.7.2.0 +----------------- + - Fixed xSysdeviceResetEx() to allow passing of additional flags to underlying functions + + V2.7.1.0 +----------------- + - Fixed reset parameter and flag masking, before writing them to the ulSystemControl value in the DPM + - Update HilscherDefinitions to version 20220112-00 + + V2.7.0.0 +----------------- + - Fixed missing return of ulState packet errors in cifXReadFirmwareIdent() + - Removed "\r\n" from trace strings + - Fix netX51 detection during startup + - Make CRC32 function public + - Unify OS_* functions in API header and supplied template implementation + - Change prototype of OS_Time() to support 64bit time values + - Update HilscherDefinitions to version 20211110-00 + - Update cifXAPI to version 20210908-00 + - Fixed GCC compiler warnings (unaligned pointer value from packed member address of a struct or union) + - Optimize DSR function by minimizing hardware accesses + + V2.6.0.0 +----------------- + - Changed type of bIrqNumber from uint8_t to uint32_t + + V2.5.1.0 +----------------- + - Fixed reset handling to update handshake flag state when device is in interrupt mode + - Update HilscherDefinitions to version 20200514-01 + + V2.5.0.0 +----------------- + - xDriverEnumBoards() now returns CIFX_NO_MORE_ENTRIES, if actual board count is exceeded + - Fix CIFX_DMA_STATE_GETSTATE define in DEV_DMAState() + + V2.4.0.0 +----------------- + - Fixed Firmware update via xSysdeviceResetEx() if executed on APP CPU + - Big Endian fixes including possible unexpected values when performing write + access using xChannelControlBlock(). xChannelCommonStatusBlock() and xChannelControlBlock() + shall only be called with offset '0' on big endian targets + - Increase timeout during updatestart handling for jump to firmware (netX90/netX4000) + - Simultanious access to handshake flags may lead to loss of latest Change-Of-State flags + - Update HilscherDefinitions to version 20191108-00 + - Update cifX API headers to version 20191108-00 + - Updated 2nd Stage Loader to V1.6.0.1 + + V2.3.0.0 +----------------- + - Update PCI IDs for CIFX M2 devices + + V2.2.0.0 +----------------- + - Detection of newer netX90 chip revisions fails + - xSysdeviceFindFirstFile() does not check for last packet or packet length=0 + - Missing HWIF function around mailbox counter access in xChannelRegisterNotification() + - SerialDPM initialization fails if the first detected interface is SERDPM_UNKNOWN + + V2.1.0.0 +----------------- + - Add DEV function for ResetEx modes + - Prevent DPM access during resets for netX4000 based PCI devices + + V2.0.1.0 +----------------- + - Using hilscher standard definition files + - netX90 / netX4000 device support added (flash based devices) + - Support download of netX90/netX4000 firmware (update) files + - Rework chip type detection + - Add new API function xSysdeviceResetEx() + + V1.6.0.0 +----------------- + - Fixed ulCopySize calculation in DEV_CheckForDownload() + + V1.5.0.0 +----------------- + - Updated 2nd Stage Loader to V1.6.0.0 + - Fixed delete of existing files in all channels if a new firmware is loaded (DEV_RemoveChannelFiles() was only called with channel 0) + - Fixed DEV_RemoveChannelFiles() "Find First File" iteration does not reset the internal data on each new iteration + - Fixed LINT warning in toolkit c modules + - Fixed USER_xxx function prototypes in cifXToolkit.h to match implementation + - Extended template file TKitUser_Custom.c by missing USER_GetDMAMode() function + - Fixed warnings when compiling the toolkit with gcc compiler + - Added "const" keyword to CrC32Table[] definition in cifXDownload.c, so the table can be stored in .rodata when used in an emdedded system + - Changed SPM / HWIF example implementation to use the DEVICEINSTANCE pointer instead of the pvOSDependent pointer + - Added OS_SpiInit() OS_SPILock() and OS_SPIUnlock() functions to SPM function interface + - Added locking mechanism for SPM read/write functions to prevent overlapped fucntion calls + - Changed the default firmware startup timeout definition CIFX_TO_FIRMWARE_START from 10 to 20 seconds + - Improved return value checking (e.g. malloc) during hardware initiaization in cifXInit() + - xChannelBusState() / CIFX_BUS_STATE_GETSTATE now updates the COS flags to be able to call the function in a loop and to get an updated state + - Fixed internal check handle functions CheckSysdeviceHandle()/CheckChannelHandle() to be usable also during system start + - Added more error descriptions for xDriverErrorDescripton() + - Added additional check for system channel READY before accessing it + +V1.4.0.0 +----------------- + - Improved ISR handler by reading only necessary handshake registers on PCI cards + - Fixed LINT warning in DEV_DoSystemStart(), multiple definition of ptSysChannel + - Fixed LINT warning by adding type casts + - Fixed xSysdeviceInfo()/CIFX_INFO_CMD_SYSTEM_CHANNEL_BLOCK for use with SPM, removed access via the "DPM pointer" + - Fixed xSysdeviceExtendedMemory() missing convert/HWIF function when reading tSystemState + - Renamed "md5" files to "Hilmd5" preventing conflicts with custom components using same file name + - xChannelIORead()/xChannelIOWrite() does not return COM flag state in "uncontrolled mode" + - DEV_IsCommunicating() removed re-read of NCF_Handshake flags for SPM speed improvment + +V1.3.0.0 +----------------- + - Fixed DSR Handler channel loop counting preventing one additional iteration + - Fixed compiler warnings created by implicit data conversion on 64bit systems + - Fixed Lint warnings in cifXInit.c + - Fixed notification call "post reset event" (eCIFX_TOOLKIT_EVENT_POSTRESET) done to late + - Added system state trace log information (e.g. DPM cookie) during start-up + - Added include in cifXUser.h surrounding <#if _MSC_VER> allowing none Microsoft compiler using -wundef + +V1.2.0.1 +----------------- + - Remove single line comment (not allowed in ANSI-C) + +V1.2.0.0 +----------------- + - Changed function interface of the hardware read/write functions (PFN_HWIF_MEMCPY). Using void pointer instead of uint32_t + for address parameter, skips address calculation for memory mapped devices on 64bit systems. + - xChannelSyncState() may not work on flash-based devices (if no reset is done during initialization) + or after xSysdeviceReset() + - Added target independent protocol implementation for serial DPM handling + - xChannelRegisterNotification/CIFX_NOTIFY_COM_STATE now calls always the user callback to signal the actual COM flag state + - Interrupt mode with shared PCI interrupts may result in invalid flags being handled in seldom cases + - Added support for IAR C/C++ Compiler (ARM Cores only) + - Added support for armcc Compiler (previously known as ARM RealView) + - Always check cookie before evaluation of READY flag to prevent misinterpretation of invalid DPM content + - Updated 2nd Stage Loader to V1.4.17.0 + - Introduced eCHIP_TYPE_NETX52 to distinguish between netX51 and netX52 + - Introduced initial wait for bootloader startup before invoking POST_BOOTLOADER event + - Mailbox notification may cause illegal memory access due to missing hardware interface abstraction and endianness conversion + - DMA mode does not work properly on big endian machines due to missing endianness conversion + +V1.1.5.0 +----------------- + - DEV_TransferPacket() may drop unexpected packets + - DEV_WaitForBitstate_Poll / DEV_WaitForSynchState_Poll may wait one additional cycle before returning + - netX51/52 RAM Based device support + ATTENTION: DPM Timings might need to be adjusted in eCIFX_TOOLKIT_EVENT_PRE_BOOTLOADER notification callback, + as RDY signal is not activated by ROM loader. If the host has strict timings (e.g. NXPCA-PCI), the + DPM won't be readable. + + Sample code: + case eCIFX_TOOLKIT_EVENT_PRE_BOOTLOADER: + if(eCHIP_TYPE_NETX51 == ptDevInst->eChipType) + { + /* netX51 has a timing configuration without rdy/busy, so we need to adjust it here, to be able to access + memory starting at offset 0x100 */ + NETX51_DPM_CONFIG_AREA_T* ptDpmConfig = (NETX51_DPM_CONFIG_AREA_T*)ptDevInst->pbDPM; + + ptDpmConfig->ulDpmRdyCfg = MSK_NX56_dpm_rdy_cfg_rdy_pol | /* DPM is ready when external RDY-signal is high. */ + (1 << SRT_NX56_dpm_rdy_cfg_rdy_drv_mode); /* Push-Pull Mode */ + ptDpmConfig->ulDpmTimingCfg = 0; /* Disable setup times and filter. */ + } + break; + - Updated 2nd Stage Loader to V1.4.16.0 + +V1.1.4.0 +----------------- + - Fixed memory leak when using netX100 RAM based devices (e.g. cifX) + - Fixed memory leak if unsupported DPM channel was found + - Updated 2nd Stage Loader to V1.4.12.0 + +V1.1.3.0 +----------------- + - Added Lint fixes and re-ordered handling in DSR function + - Added excplicit casts to allow compiling using C++ compiler (Tested using Visual Studio) + - Suppress checking of sync handshake flags in DEV_IsReady/IsRunning and DEV_GetHandshakeBitState for performance reasons on slow busses + - Updated 2nd Stage Loader to V1.4.10.0 + +V1.1.2.0 +----------------- + - Added notification callback for COM flag state + +V1.1.1.0 +----------------- + - Added command packet to set the device time during hardware startup, if a RTC is aveilable + - Added MRAM API functions + +V1.1.0.0 +----------------- + - Fix: Lock DEV_DoSystemStart() againt DSR to prevent writes to handshake flags while in reset, if an IRQ occurs + - Fix: DEV_DoSystemStart() now clears internal COS Flags in Interrupt mode + - Updated unsigned long data types to uint32_t + - New header file added to separate declarations for cifX hardware functions from cifXToolkit.h + - Added Hardware interface layer (supports serial DPM access e.g. via SPI, RDY/BSY DPM workaround) + - Added optional validation of pointers and handles passed to toolkit functions (CIFX_TOOLKIT_PARAMETER_CHECK) + - Added Debug Trace output of device information (DevNr/SerialNr/SlotNr) + - Added eCIFX_DEVICE_DONT_TOUCH device type to use cards without any changes + - Added xSysdeviceBootstart() / DEV_DoSystemBootstart() function to switch into bootloader mode + +V1.0.4.0 +----------------- + - Starting automatically downloaded configuration database may fail for flash based devices + +V1.0.3.0 +----------------- + - Handshake Flags may get out of synch when doing a system start in interrupt mode, if + firmware asserts interrupt at unexpected time + - Module downloading to flash / starting from flash may timeout when for large modules + +V1.0.2.0 +----------------- + - xChannelDMAState() comments fixed + - netJACK 100 added to PCI definitions header file + - ChannelDemo() / xChannelIOWrite() uses now abSendData[] instead of abRecvData[] + - cifXCreateChannels(), fixed memory leak if channel was not created + - xSysdeviceReset() / xChannelReset(CIFX_SYSTEMSTART) may leave COS flags in invalid + state in interrupt mode (influences loadable modules) + +V1.0.1.0 +----------------- + - DSR Handler crashes due to invalid access on a communication channel instance + - xSysdeviceReset is now locked against ISR/DSR or Cyclic Thread. Earlier versions + may write invalid handshake flags during a system start if the cyclic thread or IRQ + accesses the flags during this time. + - Downloading loadable modules (.NXO) may fail on larger files due to the last + confirmation packet taking longer than expected + +V1.0.0.0 +----------------- + - xChannelSyncState parameters updated (added Timeout) + - SyncState Error codes added + - Loadable modules may not work (depends on implementation of OS_Strncpy) + - Fixed GCC compiler warning (deferencing pointer breaks strict-aliasing rules) + - If start of Firmware fails (e.g. wrong HW options) the card will not + be rejected by toolkit. It will be used as a card with a system device only. + - xChannelPLCMemoryPointer may not working correctly due to an invalid parameter + passed to OS_MapUserPointer / UnmapUserPointer + - GetMDRequest may fail depending on the implementation of OS_Strncpy + - xChannelPLCActivateRead / Write did not lock access to handshake flags + - cifXHandleWarmstart() using same buffer for send/receive in TransferPacket() fixed + - DEV_DeleteFile(), OS_Strncpy() size of copied data must include the necessary 0 character + - DEV_Download() uses twice the packet timeout (=10s) for the last packet if modules are loaded + +V0.10.1.0 +-------------------------- + - Interrupt mode may miss first interrupt after initialization, due to readout + of sync handshake flags + +V0.10.0.0 +-------------------------- + - Functions for SyncMode added + - Interrupt Handling changed to support notification callbacks for user (xChannelRegisterNotification) + +V0.9.9.0 +-------------------------- + - 64-Bit Support added (ISO-C99 header file "stdint.h" is now needed to provide + fixed-width data types) + +B0.953 +-------------------------- +09.02.2010 + - ISA card handling improved by adding an aditional DEV_ReadHandshakeFlags() + in cifXCreateChannels() + +B0.952 +-------------------------- +25.01.2010 + - cifXEndianess.h. added additional braces into the conversion macros + +B0.951 +-------------------------- +03.12.2009 + - DEV_GetMBXState(), receive count handling fixed + +B0.950 +-------------------------- +06.11.2009 + - DMA support added + - Slot number handling added + +B0.946 +-------------------------- +01.10.2009 + - DEV_ReadHostState extended by fReadHostCOS to prevent the read back of the + host COS flags when they are not changed by the hardware + - Handling of COS flags improved (BUS_STATE / CONFIG_LOCK / INITIALIZE) and handled now + in DEV_DoHostCOSChange() + - DEV_DoChannelInit() now checks if the READY flag is gone and than waits until it is back + +B0.945 +-------------------------- +31.08.2009 + - cifXStartModule() fixed if no channel is available during first start + - HilPCIDefs.h included + - cifXHWFunctions(), TRUE/FALSE definition replaced with 1/0 + - cifXDownload(), CIFX_BUFFER_TOO_SHORT fixed by using now the max. packet size for confirmation packets + +B0.944 +-------------------------- +07.07.2009 + - Interrupt handling in ISR and DPC fixed/improved + - xChannelBusState(), COM_FLAG handling in conjunction with + timeout settings fixed/improved + - xChannelBusState() handling moved to DEV_HostState() function to be callable as a low level function + timeout settings fixed/improved + +B0.943 +-------------------------- +28.04.2009 + - Module download improved for comX + +B0.942 +-------------------------- +13.02.2009 + - DEV_CheckCOSFlags is now locked against DEV_DoChannelInit, + to prevent COS Flag evaluation while a channel init is running + +B0.941 +-------------------------- +30.01.2009 + - Big Endian Host support added via CIFX_TOOLKIT_BIGENDIAN define + - New parameter (eDeviceType) added to device instance to allow + DPM cards (e.g. NXHX500/50) to only use RAM (like cifX does). + Previous versions always expected a serial flash on DPM based devices + - New parameter (eChipType) added to device instance, so functions like + USER_GetBootloader can check if a bootloader for a netX50 or netX100/500 + is requested. + - netX50 support added + +20.01.2009 + - "Loadable Modules" support for comX included + +B0.940 +-------------------------- +12.12.2008 + - PRLIMINARY support for "Loadable Modules" included + + +V0.931 (under Development) +-------------------------- +10.12.2008 + - cifXCreateChannels() + answer to warmstart commands now excepted with size != 0 preventing error 0x800A0012 + +27.11.2008 + - IO mode RCX_IO_MODE_BUFF_DEV_CTRL included + +24.11.2008 + - cifXTKitISRHandler() extended by new parameter fPCIIgnoreGlobalIntFlag + - Filename cases corrected to support case sensitive operating systems + +17.06.2008 + - While loops extended by Sleep(0) + +B0.930 (under Development) +-------------------------- +16.05.2008 + - xChannelOpen() error return extended CIFX_INVALID_CHANNEL + - OS_MapUserPointer() and OS_UnmapUserPointer() now have a new parameter pvOSDependent + +07.05.2008 + - Signalling interrupts from DSR changed, so that systems + that may get interrupted during DSR are working + - DSRhandler changed to signal netX Handshake bit changes (since previous irq) + instead of Host/Netx flag differences. This allows DEV_WaitForBitstate_Irq + +06.05.2008 + - xDriverErrorDescripton did not return error description, + due to internal array size miscalculation29.04.2008 + - DOWNLOAD_MODE_LICENSECODE added +28.04.2008 + - PLC Functions did not return NO_COMFLAG error + +B0.923 (under Development) +-------------------------- +02.04.2008 + - Wait functions in cifXHWFunctions reviewed + - xChannelReset(CIFX_CHANNEL_INIT) will only check if the + channel becomes READY. Checking for RUNNING removed. + - cifXStopDevice(), deletion of the system device interrupt events included +21.02.2008 + - Error return in xDriverMemoryPointer() and xChannelPLCMemoryPtr() fixed + +V0.922 (under Development) +-------------------------- +04.09.2007 + - Setup program: + - Bug fix, which solves the Warmstart.dat files deletion if more than + two cards are using it, included (this fix was lost in V0.921) + - Firmware name and version now shows "-- not available --" for .mod files + PROFINET slave parameters: + - Input/output size changed to 1024 Byte + - Device type string limited to 25 characters + - Test program: + - Scroll bar for the receive packet text control included, to allow viewing of packets, + which are bigger than the control. + - All version information changed to V0.922 + +V0.921 (under Development) +-------------------------- +26.07.2007 + - Download now supports downloading to serial flash on target (if available) + Filename passed to download function will be used to identify target (e.g. "SYSFLASH") +10.07.2007 + - cifX Test crashed, if no device was selected in dialog +03.05.2007 + - On DPM based devices a the driver always creates a communication channel. Even without a firmware. + This can lead into blue screen if such a channel is access from a user application. +26.04.2007 + - Function xChannelBusState() now checks the + COMMUNICATION-Flag if a timeout is given. + Without a timeout, only BUS ON /OFF is processed +25.04.2007 + - Reading security FLASH and placing data into the + DPM (bootloader and firmware) + - File header handling included + - Prevent multiple firmware files (only the first one + is usable) included + - Test of DPM and PCI hardware +19.04.2007 + - MD5 checking for files included (calculated on hardware and firmware) + - Download for DPM based hardware reworked and + files are only be downloaded if they are not existing + or different + - Download mode now choosen by the file extension + - New 2nd stage bootloader detection and handling included +18.04.2007 + - API functions for + * xSysdeviceUpload/Download, xSysdeviceFileFindFirst/FindNext + * xChannelUpload/Download, xChannelFileFindFirst/FindNext + extended by two new parameters, to be able to deliver unhandled + receive packets during these functions + - Definitions for CIFX_COLDSTART and CIFX_WARMSTART changed + to CIFX_SYSTEMSTART and CIFX_CHANNELINIT + - New COS-Flag handling included + - Function xChannelBusState() included + +V0.920 (under Development) +-------------------------- +11.04.2007 + - C++ style comments removed, missing comment end cifXHWFunctions() fixed +10.04.2007 + - Prepared interrupt handling (provided in cifXInterrupt.c) + - Update DEVICEINSTANCE structure to provide infos needed for IRQ handling + - Added OS Dependent functions for Enabling/Disabling device interrupt (needed in OS Abstraction layer) + - Added CIFx Device Driver dependent include files into OS_Includes.h + - Added the following functions to cifX API + * xChannelIOInfo + * xSysdeviceReset + * xChannelFindFirstFile + * xChannelFindNextFile + * xChannelUpload + * xSysdeviceFindFirstFile + * xSysdeviceFindNextFile + * xSysdeviceUpload + - Added cifXTkitCyclic timer to Toolkit API, used to poll the COS flags on a polled cifX device. + Needs to be called by user cyclically (recommended time is approx. 500ms) + - Added Device Functions used by new API functions + * DEV_Upload function + * DEV_DoWarmstart + * DEV_DoColdStart + - Prepared interrupt handling via 2 functions needing to be called by user it IRQ is needed + * cifXTKitISRHandler + * cifXTKitDSRHandler + - Renamed USER_ErrorTrace to USER_Trace and changed signature to provide more flexibility. + Toolkit now uses a global variable g_ulTraceLevel to adjust the amount of trace messages. + - Some hardware dependent functions did poll the Handshake flags if interrupt is enabled + - DEV_ReadHandshakeFlag did check the COS flags wrong + - DEV_TriggerWatchdog illegally returned CIFX_DEV_NOT_RUNNING even if the device was running + - DEV_IsCommunicating did not set CIFX_DEV_NO_COMFLAG correctly + - USER_GetInterruptsEnable added, to give the user the possibility to enable interrupts on a + per device base + + +V0.912 (09.01.2007) +------------------- + - Function bodies for + xChannelGetSendPacket + xChannelConfigLock + xChannelReset + included +- Internal version number set to V0.912 + +V0.911 (26.10.2006) +------------------- + - UNREFERENCED_PARAMETER macro fixed + +V0.910 (19.10.2006) +------------------- + - Compiler Warning fixes for GNU compiler + - VxWorks combatible HANDLE now used (HANDLE-->CIFXHANDLE, API change) + - CifxErrors.h now uses C-Style comments + - Structure Packing fixed for MidSys_Public.h + - Some toolkit functions now static, as they are only used internally + +V0.903 (13.10.2006) +------------------- +- DEV_WaitForBitState_Poll's timeout changed. + - Starttime was read inside poll loop + - Starttime read into unsigned long, for overflow detection + a long variable is needed + +- DEV_ReadHandshakeFlags() wrong HCF_NETX_COS_ACK flag fixed + +- Fixed bit state waiting timeout for timer overflows + +- Warmstart handling included + +- OS_MapUserPointer/OS_UnmapUserPointer added for DPM mapping to application + + +V0.902 (06.10.2006) +------------------- +- Put/GetPacket now checks for Ready flag + +- Fixed size calculation for OS_MemRealloc calls + +- Host Handshake Flags did not update COS flags + +- Host Handshake Flags are now read earlier, to + allow Ready check on Firmware read packets + +- Calculation of the mailbox size for system channel + and communication channel fixed (sizeof......) + + +V0.900 BETA (10.08.2006) +------------------------ +- first version + diff --git a/libcifx/cifx.pc.in b/libcifx/cifx.pc.in new file mode 100644 index 0000000..a89841e --- /dev/null +++ b/libcifx/cifx.pc.in @@ -0,0 +1,11 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: libcifx +Description: Hilscher cifX user space library +Requires: @REQUIRED_PACKAGES@ +Version: @DRVVERSION@ +Libs: -L@libdir@ -lcifx -lpthread +Cflags: -I@includedir@/cifx diff --git a/libcifx/cifxlinux.c b/libcifx/cifxlinux.c new file mode 100644 index 0000000..d1fd7f4 --- /dev/null +++ b/libcifx/cifxlinux.c @@ -0,0 +1,1687 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Linux specific driver / toolkit initialization + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include "cifXToolkit.h" +#include "cifXHWFunctions.h" +#include "cifxlinux.h" +#include "cifXUser.h" +#include "cifxlinux_internal.h" +#include "HilPCIDefs.h" +#ifdef CIFXETHERNET +#include "netx_tap.h" +#endif + +#ifdef CIFX_PLUGIN_SUPPORT +#include +#include +#endif + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +extern char* g_szDriverBaseDir; +extern void* g_pvTkitLock; +extern unsigned long g_ulDeviceCount; +extern PDEVICEINSTANCE* g_pptDevices; +#ifdef CIFXETHERNET +extern void* g_eth_list_lock; +#endif +FILE* g_logfd = 0; + +#ifdef CIFX_PLUGIN_SUPPORT +struct CIFX_PLUGIN_T +{ + SLIST_ENTRY(CIFX_PLUGIN_T) tList; + void* hPluginFile; + uint32_t ulDeviceCount; + struct CIFX_DEVICE_T** aptDevices; +}; + +static SLIST_HEAD(PLUGIN_LIST, CIFX_PLUGIN_T) s_tPluginList = SLIST_HEAD_INITIALIZER(PLUGIN_LIST); + +#endif + +#define COS_THREAD_STACK_MIN 0x1000 /* Stack size needed by Thread for + handling Toolkit's cyclic actions */ + +/*****************************************************************************/ +/*! \file cifxlinux.c +* Linux specific initialization of toolkit / driver */ +/*****************************************************************************/ + +static void __init() __attribute__((__constructor__)); +static void __deinit() __attribute__((__destructor__)); + +static void* cifXPollingThread(void *arg); +static int polling_thread_running = 0; +static pthread_t polling_thread = {0}; +static pthread_attr_t polling_thread_attr = {{0}}; +static unsigned short polling_thread_stop = 0; + +#ifdef CIFX_DRV_HWIF + void* HWIFDPMRead ( uint32_t ulOpt, void* pvDevInstance, void* pvDpmAddr, void* pvDst, uint32_t ulLen); + void* HWIFDPMWrite( uint32_t ulOpt, void* pvDevInstance, void* pvDpmAddr, void* pvSrc, uint32_t ulLen); +#endif + +/*****************************************************************************/ +/*! Initialization function called on load of libcifx_tk.so */ +/*****************************************************************************/ +static void __init() +{ + //cifXTKitInit(); +} + +/*****************************************************************************/ +/*! De-Initialization function called on unload of libcifx_tk.so */ +/*****************************************************************************/ +static void __deinit() +{ + cifXDriverDeinit(); +} + +/*****************************************************************************/ +/*! Helper function to open a uio device +* \param uio_num Number of uio device +* \param fCheckAccess If != 0 the driver denies access if card is already +* accesed +* \return fd of uio, -1 on error */ +/*****************************************************************************/ +int cifx_uio_open(int uio_num, int fCheckAccess) +{ + char dev_name[16]; + int fd; + int iRet; + + sprintf(dev_name, "/dev/uio%d", uio_num); + fd = open(dev_name,O_RDWR); + + /* if fCheckAccess is true lock access to the device */ + if (1 == fCheckAccess) + { + /* lock file access (non blocking) */ + if (0 != (iRet = flock( fd, LOCK_EX | LOCK_NB))) + { + if (errno == EWOULDBLOCK) + { + fprintf( stderr, "cifX%d may be opened by another process!\n", uio_num); + } + close(fd); + fd = -1; + } + } + + return fd; +} + +/*****************************************************************************/ +/*! Helper function to open a ISA device +* \return fd -1 on error */ +/*****************************************************************************/ +int cifx_ISA_open(void) +{ + char dev_name[16]; + int fd; + + sprintf(dev_name, "/dev/mem"); + fd = open(dev_name,O_RDWR, O_SYNC); + + return fd; +} + +/*****************************************************************************/ +/*! Helper function to close a ISA device */ +/*****************************************************************************/ +void cifx_ISA_close(int isa_fd) +{ + close( isa_fd); +} + +/*****************************************************************************/ +/*! Checks if mapping matches specific type (dpm, extmem, dma) +* \param uio_num number of the uio device +* \param mapno Mapping number to validate +* \param tMemtype Memory type to be checked +* \return CIFX_NO_ERROR if memtype matches */ +/*****************************************************************************/ +int32_t validate_memtype( int uio_num, int mapno, CIFX_MEM_TYPE_E tMemtype) +{ + int32_t ret = CIFX_DEV_FUNCTION_FAILED; + FILE* file; + char memtype[64]; + char filename[64]; + + sprintf(filename, "/sys/class/uio/uio%d/maps/map%d/name", uio_num, mapno); + + if ((file = fopen(filename,"r")) && (1==fscanf(file,"%s",memtype))) + { + switch (tMemtype) + { + case eMEM_DPM: + ret = ( 0 == strncmp("dpm", memtype, strlen("dpm")))? CIFX_NO_ERROR: CIFX_DEV_FUNCTION_FAILED; + break; + case eMEM_EXTMEM: + ret = ( 0 == strncmp("extmem", memtype, strlen("extmem")))? CIFX_NO_ERROR: CIFX_DEV_FUNCTION_FAILED; + break; + case eMEM_DMA: + ret = ( 0 == strncmp("dma", memtype, strlen("dma")))? CIFX_NO_ERROR: CIFX_DEV_FUNCTION_FAILED; + break; + default: + ret = CIFX_INVALID_PARAMETER; + break; + } + } else + { + /* no name specified -> old uio_netx driver */ + /* name file does not exist -> old uio driver */ + if ((NULL != file) || (errno == ENOENT)) + { + /* memory type validation via requested mapno (to be downwards compatible) */ + switch (tMemtype) + { + case eMEM_DPM: /* first mapno is DPM */ + ret = (0 == mapno) ? CIFX_NO_ERROR : CIFX_DEV_FUNCTION_FAILED; + break; + case eMEM_EXTMEM:/* second mapno is ext mem */ + ret = (1 == mapno) ? CIFX_NO_ERROR : CIFX_DEV_FUNCTION_FAILED; + break; + case eMEM_DMA:/* dma was not supported */ + default: + ret = CIFX_INVALID_PARAMETER; + break; + } + } + } + if (NULL != file) + fclose(file); + + return ret; +} + +/*****************************************************************************/ +/*! Iterates over mapping dir, searching for a specific memtype +* \param uio_num number of the uio device +* \param memtype to search for +* \param bar BAR to mapping file +* \return CIFX_NO_ERROR if memtype is found */ +/*****************************************************************************/ +int32_t find_memtype( int uio_num, CIFX_MEM_TYPE_E tMemtype, int *bar) +{ + char addr_file[64]; + struct dirent** namelist; + int32_t ret = CIFX_NO_MORE_ENTRIES; + int num_map; + int found = 0; + + if (!bar) + return CIFX_INVALID_PARAMETER; + + sprintf(addr_file, "/sys/class/uio/uio%d/maps/", uio_num); + num_map = scandir(addr_file, &namelist, 0, alphasort); + if(num_map > 0) + { + int currfile = 0; + for(;currfile < num_map; ++currfile) + { + if ((0 == found) && (CIFX_NO_ERROR == validate_memtype( uio_num, currfile, tMemtype))) + { + *bar = currfile; + found = 1; + } + free(namelist[currfile]); + } + free(namelist); + if (found) + ret = CIFX_NO_ERROR; + } + return ret; +} + +/*****************************************************************************/ +/*! Returns the memory size of a uio memory bar +* \param uio_num Number of uio device +* \param bar BAR to read memory size from +* \return size of the bar in bytes */ +/*****************************************************************************/ +unsigned long cifx_uio_get_mem_size(int uio_num, int bar) +{ + unsigned long ret = ~0; + char filename[64]; + FILE* file; + + sprintf(filename, "/sys/class/uio/uio%d/maps/map%d/size", + uio_num, bar); + + file = fopen(filename,"r"); + if(file) + { + if (1!=fscanf(file, "0x%lx", &ret)) + ret = ~0; + fclose(file); + } + + return ret; +} + +/*****************************************************************************/ +/*! Returns the physical address uio memory bar +* \param uio_num Number of uio device +* \param bar BAR to read memory size from +* \return physical address of bar */ +/*****************************************************************************/ +unsigned long cifx_uio_get_mem_addr(int uio_num, int bar) +{ + unsigned long ret = ~0; + char filename[64]; + FILE* file; + + sprintf(filename, "/sys/class/uio/uio%d/maps/map%d/addr", + uio_num, bar); + + file = fopen(filename,"r"); + if(file) + { + if (1!=fscanf(file,"0x%lx",&ret)) + ret = ~0; + fclose(file); + } + return ret; +} + +/*****************************************************************************/ +/*! Returns the alias given via device-tree +* \param uio_num Number of uio device +* \return pointer to buffer - needs to be freed after usage */ +/*****************************************************************************/ +char* cifx_uio_get_device_alias(int uio_num) +{ + char filename[64]; + char ret[64]; + char* alias = NULL; + FILE* file; + + sprintf(filename, "/sys/class/uio/uio%d/name",uio_num); + + file = fopen(filename,"r"); + if(file) + { + if (1==fscanf(file,"%s",ret)) { + char* buf = strstr(ret, ","); + if ((buf != NULL) && ((buf+1-ret)name=dma) +* \param device uio device +* \return !=0 if mapping succeeded */ +/*****************************************************************************/ +void cifx_uio_map_dma_buffer(struct CIFX_DEVICE_T *device) +{ + char addr_file[64]; + struct dirent **namelist; + int num_map; + + sprintf(addr_file, "/sys/class/uio/uio%d/maps/", device->uio_num); + num_map = scandir(addr_file, &namelist, 0, alphasort); + if(num_map > 0) + { + int currfile = 0; + device->dma_buffer_cnt = 0; + + for(;(device->dma_buffer_cnt < CIFX_DMA_BUFFER_COUNT) && (currfile < num_map); ++currfile) + { + if (CIFX_NO_ERROR == validate_memtype( device->uio_num, currfile, eMEM_DMA)) + { + void *membase = NULL; + unsigned long memaddr; + unsigned long memlen; + if (cifx_uio_map_mem(device->uio_fd, device->uio_num, + currfile, &membase, + &memaddr, + &memlen, + 0)) + { + int DMACounter = 0; + if ((DMACounter = memlen/(CIFX_DEFAULT_DMA_BUFFER_SIZE))) + { + while(DMACounter) + { + device->dma_buffer[device->dma_buffer_cnt].ulSize = CIFX_DEFAULT_DMA_BUFFER_SIZE; + device->dma_buffer[device->dma_buffer_cnt].ulPhysicalAddress = memaddr; + device->dma_buffer[device->dma_buffer_cnt].pvBuffer = membase; + device->dma_buffer_cnt++; + memaddr += CIFX_DEFAULT_DMA_BUFFER_SIZE; + membase += CIFX_DEFAULT_DMA_BUFFER_SIZE; +#ifdef VERBOSE + printf("DMA buffer %d found at 0x%p / size=%d\n", device->dma_buffer_cnt, membase, ulSize); +#endif + DMACounter--; + } + } + } else + { + perror("Error mapping DMA buffer!\n"); + } + } + } + while(num_map-->0) { + free(namelist[num_map]); + } + free(namelist); +#ifdef VERBOSE + if (device->dma_buffer_cnt == 0) { + printf("\nThe uio_netx driver does not provide memory for DMA support!\n"); + printf("If DMA is required, the uio_netx driver needs to be build with DMA support!\n\n"); + } +#endif + } +} + +/*****************************************************************************/ +/*! Unmap the DMA memory of a uio device + * \param device uio device */ +/*****************************************************************************/ +void cifx_uio_unmap_dma_buffer(struct CIFX_DEVICE_T *device) { + char addr_file[64]; + struct dirent **namelist; + int num_map; + + sprintf(addr_file, "/sys/class/uio/uio%d/maps/", device->uio_num); + num_map = scandir(addr_file, &namelist, 0, alphasort); + if(num_map > 0) { + int currfile = 0; + for(;(device->dma_buffer_cnt > 0) && (currfile < num_map); ++currfile) { + if (CIFX_NO_ERROR == validate_memtype( device->uio_num, currfile, eMEM_DMA)) { + uint32_t no_of_buffers = cifx_uio_get_mem_size(device->uio_num, currfile) / (CIFX_DEFAULT_DMA_BUFFER_SIZE); + + if ((no_of_buffers > 0) && (device->dma_buffer[CIFX_DMA_BUFFER_COUNT - device->dma_buffer_cnt].pvBuffer != NULL)) { + munmap( device->dma_buffer[CIFX_DMA_BUFFER_COUNT - device->dma_buffer_cnt].pvBuffer, cifx_uio_get_mem_size(device->uio_num, currfile)); + } + + if (no_of_buffers >= device->dma_buffer_cnt) + device->dma_buffer_cnt = 0; + else + device->dma_buffer_cnt -= no_of_buffers; + } + } + while(num_map-->0) { + free(namelist[num_map]); + } + free(namelist); + } +} +#endif + +/*****************************************************************************/ +/*! Map the memory (DPM) of a ISA device +* \param uio_fd fd returned by cifX_ISA_open -> open /dev/mem +* \param dpmbase Pointer to returned virtual base address of memory area +* \param dpmaddr physical address of memory area +* \param dpmlen length of memory area +* \return !=0 if mapping succeeded */ +/*****************************************************************************/ +int cifx_ISA_map_dpm(int fd, + void** dpmbase, + int dpmaddr, + int dpmlen) +{ + int ret = 0; + + *dpmbase = mmap(NULL, dpmlen, + PROT_READ|PROT_WRITE, + MAP_SHARED|MAP_LOCKED|MAP_POPULATE, + fd, dpmaddr); + + if(*dpmbase != (void*)-1) + ret =1; + + return ret; +} + +/*****************************************************************************/ +/*! Unmap the memory (DPM) of a ISA device +* \param dpmbase Pointer to returned virtual base address of memory area +* \param dpmlen length of memory area */ +/*****************************************************************************/ +void cifx_ISA_unmap_dpm( void* dpmaddr, int dpmlen) +{ + munmap( dpmaddr, dpmlen); +} + +#ifndef CIFX_TOOLKIT_DISABLEPCI + /*****************************************************************************/ + /*! Try to find a matching PCI card by verifying the physical BAR addresses + * \param dev_instance Device to search for. PCI data will be inserted into + O/S dependent part + * \return !=0 if a matching PCI card was found */ + /*****************************************************************************/ + static int match_pci_card(PDEVICEINSTANCE dev_instance, unsigned long ulPys_Addr) + { + struct pci_device_iterator *pci_dev_it; + struct pci_device *dev; + int ret = 0; + + static const struct pci_id_match id_match = + { + .vendor_id = PCI_MATCH_ANY, + .device_id = PCI_MATCH_ANY, + .subvendor_id = PCI_MATCH_ANY, + .subdevice_id = PCI_MATCH_ANY, + }; + + pci_dev_it = pci_id_match_iterator_create(&id_match); + + while( NULL != (dev = pci_device_next(pci_dev_it)) ) + { + int bar; + + pci_device_probe(dev); + + for(bar = 0; bar < sizeof(dev->regions) / sizeof(dev->regions[0]); ++bar) + { + if(dev->regions[bar].base_addr == (pciaddr_t)ulPys_Addr) + { + PCIFX_DEVICE_INTERNAL_T internal = (PCIFX_DEVICE_INTERNAL_T)dev_instance->pvOSDependent; + #ifdef VERBOSE + printf("matched pci card @ bus=%d,dev=%d,func=%d,vendor=0x%x,device=0x%x,subvendor=0x%x,subdevice=0x%x \n", + dev->bus, dev->dev, dev->func, + dev->vendor_id, dev->device_id, dev->subvendor_id, dev->subdevice_id); + #endif + /* detect flash based card by device- and sub_device id */ + if ( (dev->vendor_id == HILSCHER_PCI_VENDOR_ID) && + ( + ((dev->device_id == NETPLC100C_PCI_DEVICE_ID) && (dev->subdevice_id == NETPLC100C_PCI_SUBYSTEM_ID_FLASH)) || + ((dev->device_id == NETJACK100_PCI_DEVICE_ID) && (dev->subdevice_id == NETJACK100_PCI_SUBYSTEM_ID_FLASH)) || + (dev->device_id == CIFX4000_PCI_DEVICE_ID) + ) + ) + { + dev_instance->eDeviceType = eCIFX_DEVICE_FLASH_BASED; + } + + internal->pci = *dev; + ret = 1; + break; + } + } + } + + pci_iterator_destroy(pci_dev_it); + + return ret; + } +#endif /* CIFX_TOOLKIT_DISABLEPCI */ + +/*****************************************************************************/ +/*! Thread for cyclic Toolkit timer, which handles polling of COS bits on +* non-irq cards +* \param arg Pollinterval in ms +* \return NULL on termination */ +/*****************************************************************************/ +static void* cifXPollingThread(void *arg) +{ + unsigned long pollinterval = (unsigned long)arg; + struct timespec polling_sleep; + + polling_sleep.tv_sec = 0; + polling_sleep.tv_nsec = pollinterval * 1000 * 1000; + + while( 0 == polling_thread_stop ) + { + cifXTKitCyclicTimer(); + nanosleep(&polling_sleep, NULL); + } + return NULL; +} + + +/*****************************************************************************/ +/*! Wraps the cifX Toolkit callback to the user's known parameters +* The user does not need to know about our device instance, as he only +* provided a CIFX_DEVICE_T structure +* \param pvDeviceInstance Device the callback was made for +* \param eEvent Signalled event */ +/*****************************************************************************/ +static void cifXWrapEvent(void* pvDeviceInstance, CIFX_TOOLKIT_NOTIFY_E eEvent) +{ + PDEVICEINSTANCE ptDevInstance = (PDEVICEINSTANCE)pvDeviceInstance; + PCIFX_DEVICE_INTERNAL_T ptInternal = (PCIFX_DEVICE_INTERNAL_T)ptDevInstance->pvOSDependent; + struct CIFX_DEVICE_T* ptDevice = ptInternal->userdevice; + + ptDevice->notify(ptDevice, eEvent); +} + +/*****************************************************************************/ +/*! Internal function for adding device to toolkit control +* \param ptDevice Device to add +* \param num Number to use for identifier ("cifX") +* \param user_card !=0 if card was given through user parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifXDriverAddDevice(struct CIFX_DEVICE_T* ptDevice, unsigned int num, int user_card) +{ + PDEVICEINSTANCE ptDevInstance = NULL; + PCIFX_DEVICE_INTERNAL_T ptInternalDev = NULL; + int32_t ret = CIFX_FUNCTION_FAILED; + +#ifdef CIFX_DRV_HWIF + if ( ((ptDevice->hwif_read) && (NULL == ptDevice->hwif_write)) || + ((ptDevice->hwif_write) && (NULL == ptDevice->hwif_read))) { + fprintf(stderr, "Error initializing device! Misconfigured HW-Function Interface (read- or write-function is not defined)!"); + return CIFX_INVALID_PARAMETER; + } +#endif + if(NULL == (ptInternalDev = (PCIFX_DEVICE_INTERNAL_T)malloc(sizeof(*ptInternalDev)))) + { + fprintf(stderr,"Error allocating internal device structures"); + } else if(NULL == (ptDevInstance = (PDEVICEINSTANCE)malloc(sizeof(*ptDevInstance)))) + { + fprintf(stderr, "Error allocating internal device structures"); + free(ptInternalDev); + ptInternalDev = NULL; + } else + { + memset(ptDevInstance, 0, sizeof(*ptDevInstance)); + memset(ptInternalDev, 0, sizeof(*ptInternalDev)); + + ptInternalDev->userdevice = ptDevice; + ptInternalDev->devinstance = ptDevInstance; + ptInternalDev->user_card = user_card; + + ptDevInstance->pvOSDependent = (void*)ptInternalDev; + ptDevInstance->pbDPM = (unsigned char*)ptDevice->dpm; + ptDevInstance->ulDPMSize = ptDevice->dpmlen; + ptDevInstance->ulPhysicalAddress = ptDevice->dpmaddr; + + ptDevInstance->pbExtendedMemory = (uint8_t*)ptDevice->extmem; + ptDevInstance->ulExtendedMemorySize = ptDevice->extmemlen; + +#ifdef CIFX_DRV_HWIF + /* set to the linux default read/write function, to be able to handle all devices (also memory mapped) */ + ptDevInstance->pfnHwIfRead = HWIFDPMRead; + ptDevInstance->pfnHwIfWrite = HWIFDPMWrite; +#endif + +#ifdef CIFX_TOOLKIT_DMA + if (ptDevice->dma_buffer_cnt) + { + int i = 0; + ptDevInstance->ulDMABufferCount = ptDevice->dma_buffer_cnt; + for (i=0;idma_buffer_cnt;i++) + { + ptDevInstance->atDmaBuffers[i].ulSize = ptDevice->dma_buffer[i].ulSize; + ptDevInstance->atDmaBuffers[i].ulPhysicalAddress = ptDevice->dma_buffer[i].ulPhysicalAddress; + ptDevInstance->atDmaBuffers[i].pvBuffer = ptDevice->dma_buffer[i].pvBuffer; + ptDevInstance->atDmaBuffers[i].pvUser = NULL; + } + } +#endif + if(ptDevice->notify) + { + ptDevInstance->pfnNotify = cifXWrapEvent; + } + + snprintf(ptDevInstance->szName, + sizeof(ptDevInstance->szName), + "cifX%u", + num); + + if (ptDevice->uio_num>=0) { + /* extract alias from uio device name (can be used via device-tree) */ + char* szAlias = cifx_uio_get_device_alias(ptDevice->uio_num); + if (szAlias != NULL) { + snprintf(ptDevInstance->szAlias, + sizeof(ptDevInstance->szName), + "%s", + szAlias); + free(szAlias); + } + } + + /* Default to no logfile */ + ptInternalDev->log_file = NULL; + + /* Create log file if neccessary */ + if(g_ulTraceLevel > 0) + { + size_t pathlen = strlen(g_szDriverBaseDir) + sizeof(ptDevInstance->szName) + 2 + 4; /* +2 for 1x NUL and 1 additional '/' + +4 for extension ".log" */ + char* logfilepath = malloc(pathlen); + + snprintf(logfilepath, pathlen, "%s/%s.log", g_szDriverBaseDir, ptDevInstance->szName); + + if (g_logfd == 0) { + ptInternalDev->log_file = fopen(logfilepath, "w+"); + } else { + ptInternalDev->log_file = g_logfd; + } + if( NULL == ptInternalDev->log_file) + { + perror("Error opening logfile. Traces will be printed to console!"); + } else + { + DRIVER_INFORMATION tDriverInfo; + CIFXHANDLE hDrv; + + /* Insert header into log file */ + USER_Trace(ptDevInstance, 0, "----- cifX Driver Log started ---------------------"); + if (xDriverOpen(&hDrv)) { + USER_Trace(ptDevInstance, 0, " %s / Error retrieving Toolkit version", LINUXCIFXDRV_VERSION); + } else { + xDriverGetInformation( hDrv, sizeof(tDriverInfo), &tDriverInfo); + xDriverClose(hDrv); + USER_Trace(ptDevInstance, 0, " %s / Toolkit %s", LINUXCIFXDRV_VERSION, tDriverInfo.abDriverVersion); + } + USER_Trace(ptDevInstance, 0, " Name : %s", ptDevInstance->szName); + USER_Trace(ptDevInstance, 0, " DPM : 0x%lx, len=%lu", ptDevInstance->ulPhysicalAddress, ptDevInstance->ulDPMSize); + USER_Trace(ptDevInstance, 0, "---------------------------------------------------"); + } + + free(logfilepath); + } + + if(ptDevice->force_ram) + { + ptDevInstance->eDeviceType = eCIFX_DEVICE_RAM_BASED; + } else + { + if (ptDevice->uio_num>=0) { + /* in case of uio device device-type can be given (device-tree) */ + ptDevInstance->eDeviceType = cifx_uio_get_device_startuptype(ptDevice->uio_num); + } else { + ptDevInstance->eDeviceType = eCIFX_DEVICE_AUTODETECT; + } + } + + if(ptDevice->pci_card != 0) + { +#ifndef CIFX_TOOLKIT_DISABLEPCI + /* Try to find the card on the PCI bus. If it is not found, deny to work with this card */ + if(!match_pci_card(ptDevInstance, ptDevice->dpmaddr)) + { + /* Don't add this device */ + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Error finding pci device (Phys. Addr 0x%lx) on PCI bus", + ptDevice->dpmaddr); + } + } else + { + ptDevInstance->fPCICard = 1; + ret = CIFX_NO_ERROR; + } +#else + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "cifX Driver was compiled without PCI support. Unable to handle requested PCI card @0x%lx!", + ptDevice->dpmaddr); + } +#endif + } else + { + ptDevInstance->fPCICard = 0; + ret = CIFX_NO_ERROR; + } +#ifdef CIFX_DRV_HWIF + /* initialize the hardware function interface */ + if (ptDevice->hwif_init) { + if (CIFX_NO_ERROR != (ret = ptDevice->hwif_init( ptDevice))) { + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + char szError[1024] ={0}; + USER_Trace(ptDevInstance, + TRACE_LEVEL_ERROR, + "Failed to initialize custom hardware interface. 'hwif_init' returns 0x%lx - %s! Skip adding custom device to toolkit!", + (unsigned int)ret, + ((CIFX_NO_ERROR == xDriverGetErrorDescription( ret, szError, sizeof(szError))) ? szError : "Unknown error")); + } + } + } +#endif + /* Add the device to the toolkits handled device list */ + if(CIFX_NO_ERROR == ret) { + if ((ret = cifXTKitAddDevice(ptDevInstance))) { + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + char szError[1024] ={0}; + xDriverGetErrorDescription( ret, szError, sizeof(szError)); + USER_Trace(ptDevInstance, 0, "Error: 0x%X, <%s>\n", (unsigned int)ret, szError); + } +#ifdef CIFX_DRV_HWIF + /* de-initialize the hardware function interface */ + if (ptDevice->hwif_deinit) + ptDevice->hwif_deinit( ptDevice); +#endif + } + } + } + + if(CIFX_NO_ERROR != ret) + { + free(ptDevInstance); + free(ptInternalDev); +#ifdef CIFXETHERNET + } else + { + CIFX_DEVICE_INFORMATION tDevInfo; + + OS_Memset(&tDevInfo, 0, sizeof(tDevInfo)); + + /* Initalize file information structure */ + tDevInfo.ulDeviceNumber = ptDevInstance->ulDeviceNumber; + tDevInfo.ulSerialNumber = ptDevInstance->ulSerialNumber; + tDevInfo.ulChannel = CIFX_SYSTEM_DEVICE; + tDevInfo.ptDeviceInstance = ptDevInstance; + + if (0 != USER_GetEthernet( &tDevInfo)) + { + NETX_ETH_DEV_CFG_T config; + + sprintf( config.cifx_name, "%s", ptDevInstance->szName); + if (NULL != cifxeth_create_device( &config)) + { + ptInternalDev->eth_support = 1; + if (g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInstance, 0, "Successfully created ethernet interface on %s", ptDevInstance->szName); + } + } + } +#endif + } + + return ret; +} + +/*****************************************************************************/ +/*! Linux driver initialization function +* \param init_params Initialization parameters +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXDriverInit(const struct CIFX_LINUX_INIT* init_params) +{ + int32_t lRet = cifXTKitInit(); + unsigned int num = 0; + unsigned int temp; + +#ifdef CIFXETHERNET + /* in case of unordinary shutdown of the application the devices may still */ + /* exist (since we create the net devices persistent) so we clean up here */ + cifxeth_sys_cleanup(); + + g_eth_list_lock = OS_CreateLock(); +#endif + if (init_params == NULL) + return CIFX_INVALID_PARAMETER; + + g_ulTraceLevel = init_params->trace_level; + + if(CIFX_NO_ERROR == lRet) + { + unsigned long poll_interval = init_params->poll_interval; + size_t tStackSize = init_params->poll_StackSize; + + polling_thread_running = 0; + + if(poll_interval != CIFX_POLLINTERVAL_DISABLETHREAD) + { + struct sched_param sched_param = {0}; + sched_param.sched_priority = init_params->poll_priority; + int ret = 0; + + /* Default to 500ms poll interval */ + if(poll_interval == 0) + poll_interval = 500; + + if ( tStackSize == 0) + tStackSize = COS_THREAD_STACK_MIN; + + /* Create COS flag polling thread for non-irq devices */ + polling_thread_stop = 0; + + if( (ret = pthread_attr_init(&polling_thread_attr)) != 0 ) + { + fprintf( stderr, "cifXDriverInit: Failed to initialize attributes for polling thread (pthread_attr_init=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + + } else if (init_params->poll_priority && ( (ret = pthread_attr_setinheritsched( &polling_thread_attr, PTHREAD_EXPLICIT_SCHED)) != 0)) + { + fprintf( stderr, "cifXDriverInit: Failed to set the polling thread attributes (pthread_attr_setinheritsched=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + + } else if (init_params->poll_priority && ( (ret = pthread_attr_setschedpolicy(&polling_thread_attr, init_params->poll_schedpolicy)) != 0)) + { + fprintf( stderr, "cifXDriverInit: Failed to set scheduler policy of polling thread (pthread_attr_setschedpolicy=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + + /* Setup Stack size to minimum */ + } else if( (ret = pthread_attr_setstacksize(&polling_thread_attr, PTHREAD_STACK_MIN + tStackSize)) != 0) + { + fprintf( stderr, "cifXDriverInit: Failed to set stack size of polling thread (pthread_attr_setstacksize=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + + /* Set polling thread priority */ + } else if(init_params->poll_priority && ((ret = pthread_attr_setschedparam(&polling_thread_attr, &sched_param) != 0))) + { + fprintf( stderr, "cifXDriverInit: Failed to set priority of polling thread (pthread_attr_setschedparam=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + } else if( (ret = pthread_create(&polling_thread, &polling_thread_attr, cifXPollingThread, (void*)poll_interval)) != 0 ) + { + fprintf( stderr, "cifXDriverInit: Could not create polling thread (pthread_create=%d)", ret); + lRet = CIFX_DRV_INIT_STATE_ERROR; + } + polling_thread_running = 1; + } + + if(CIFX_NO_ERROR == lRet) + { + if (init_params->logfd != 0) { + g_logfd = init_params->logfd; + } + /* Set driver base directory */ + if(NULL == init_params->base_dir) + { + g_szDriverBaseDir = strdup("/opt/cifx"); + } else + { + g_szDriverBaseDir = strdup(init_params->base_dir); + } + + if(CIFX_DRIVER_INIT_CARDNUMBER == init_params->init_options) + { + struct CIFX_DEVICE_T* ptDevice; + int iDevice = init_params->iCardNumber; + + if(NULL == (ptDevice = cifXFindDevice( iDevice, init_params->fEnableCardLocking))) + { + fprintf(stderr, "Error opening device with number %u\n", iDevice); + lRet = CIFX_INVALID_BOARD; + } else + { + lRet = cifXDriverAddDevice(ptDevice, 0, 0); + if(CIFX_NO_ERROR != lRet) + { + fprintf(stderr, "Error adding automatically found cifX device @ Phys. Addr 0x%lX. (Status=0x%08X)\n", ptDevice->dpmaddr, lRet); + } + } + /* Automatically scan for uio devices */ + } else if(CIFX_DRIVER_INIT_AUTOSCAN == init_params->init_options) + { + int iDevice; + struct CIFX_DEVICE_T* ptDevice; + int iCardCount = cifXGetDeviceCount(); + + for(iDevice = 0; iDevice < iCardCount; ++iDevice) + { + if(NULL == (ptDevice = cifXFindDevice( iDevice, init_params->fEnableCardLocking))) + { + fprintf(stderr, "Error opening device with number %u\n", iDevice); + } else + { + uint32_t lTemp = cifXDriverAddDevice(ptDevice, num, 0); + if(CIFX_NO_ERROR != lTemp) + { + fprintf(stderr, "Error adding automatically found cifX device @ Phys. Addr 0x%lX. (Status=0x%08X)\n", ptDevice->dpmaddr, lTemp); + } else + { + num++; + } + } + } +#ifdef CIFX_PLUGIN_SUPPORT + char szPath[CIFX_MAX_FILE_NAME_LENGTH+5]; + DIR* dir; + + snprintf(szPath, CIFX_MAX_FILE_NAME_LENGTH, + "%s/plugins/", + g_szDriverBaseDir); + + /* Iterate over plugins in ${basedir}/plugins folder */ + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if(0 == strncasecmp(szExt, ".so", 3)) + { + snprintf(szPath, sizeof(szPath), + "%s/plugins/%s", + g_szDriverBaseDir, dirent->d_name); + + void* hFile = dlopen(szPath, RTLD_NOW | RTLD_LOCAL); + if(NULL == hFile) + { + fprintf(stderr, "Error loading plugin library %s with error=%s)\n", dirent->d_name, dlerror()); + } else + { + PFN_CIFX_PLUGIN_GET_DEVICE_COUNT pfnCount; + PFN_CIFX_PLUGIN_ALLOC_DEVICE pfnAlloc; + + if( (NULL == (pfnCount = dlsym(hFile, CIFX_PLUGIN_GET_DEVICE_COUNT))) || + (NULL == (pfnAlloc = dlsym(hFile, CIFX_PLUGIN_ALLOC_DEVICE))) || + (NULL == dlsym(hFile, CIFX_PLUGIN_FREE_DEVICE)) ) + { + fprintf(stderr, "Error loading plugin library %s, as it does not contain required exports\n", dirent->d_name); + dlclose(hFile); + } else + { + struct CIFX_PLUGIN_T* plugin = calloc(1, sizeof(*plugin)); + uint32_t i; + + plugin->hPluginFile = hFile; + plugin->ulDeviceCount = pfnCount(); + plugin->aptDevices = calloc(plugin->ulDeviceCount, sizeof(*plugin->aptDevices)); + + SLIST_INSERT_HEAD(&s_tPluginList, plugin, tList); + + for(i = 0; i < plugin->ulDeviceCount; i++) + { + uint32_t lTemp; + + plugin->aptDevices[i] = pfnAlloc(i); + + if(NULL == plugin->aptDevices[i]) + { + fprintf(stderr, "Error: Plugin (%s) return no device for idx=%i\n", + dirent->d_name, i); + } else + { + lTemp = cifXDriverAddDevice(plugin->aptDevices[i], num, 1); + if(CIFX_NO_ERROR != lTemp) + { + fprintf(stderr, "Error adding plugin (%s) device %u@0x%lX. (Status=0x%08X)\n", + dirent->d_name, i, plugin->aptDevices[i]->dpmaddr, lTemp); + } else + { + num++; + } + } + } + } + } + } + } + } + closedir(dir); + } +#endif + } + if (CIFX_NO_ERROR == lRet) + { + /* Add all user specified cards */ + for(temp = 0; temp < init_params->user_card_cnt; ++temp) + { + if(cifXDriverAddDevice(&init_params->user_cards[temp], num, 1) != CIFX_NO_ERROR ) + { + fprintf(stderr, "Adding user device #%d failed \n", temp); + } else + { + ++num; + } + } + } + } + } + + return lRet; +} + + +/*****************************************************************************/ +/*! cifX driver restart function +* \param hDriver Handle to the driver +* \param szBoardName Identifier for the Board +* \param pvData For further extensions can be NULL +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ + int32_t xDriverRestartDevice ( CIFXHANDLE hDriver, char* szBoardName, void* pvData) + { + int32_t lRet = CIFX_INVALID_BOARD; + uint32_t ulIdx = 0; + + UNREFERENCED_PARAMETER(pvData); + + OS_EnterLock(g_pvTkitLock); + + /* Seach the device with the given name */ + for (ulIdx = 0; ulIdx < g_ulDeviceCount; ulIdx++) + { + /* Compare the device name */ + PDEVICEINSTANCE ptDev = g_pptDevices[ulIdx]; + + if( (OS_Strcmp( ptDev->szName, szBoardName) == 0) || + (OS_Strcmp( ptDev->szAlias, szBoardName) == 0) ) + { +#if CIFXETHERNET || CIFX_DRV_HWIF + PCIFX_DEVICE_INTERNAL_T dev_intern = (PCIFX_DEVICE_INTERNAL_T)ptDev->pvOSDependent; +#endif + + if (g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( ptDev, + TRACE_LEVEL_DEBUG, + "RESTART DEVICE requested for device: %s", + szBoardName); + } + /* Remove a device */ +#ifdef CIFXETHERNET + if (1 == dev_intern->eth_support) + { + NETX_ETH_DEV_CFG_T config; + + sprintf( config.cifx_name, "%s", ptDev->szName); + cifxeth_remove_device( NULL, &config); + } +#endif + if ( CIFX_NO_ERROR == (lRet = cifXTKitRemoveDevice(ptDev->szName, 1))) + { +#ifdef CIFX_DRV_HWIF + /* de-initialize hardware interface */ + if (dev_intern->userdevice->hwif_deinit) + dev_intern->userdevice->hwif_deinit( dev_intern->userdevice); + + /* re-initialize hardware interface */ + if (dev_intern->userdevice->hwif_init) { + lRet = dev_intern->userdevice->hwif_init( dev_intern->userdevice); + if (CIFX_NO_ERROR != lRet) { + if (g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + char szError[1024] ={0}; + USER_Trace(ptDev, + TRACE_LEVEL_ERROR, + "Failed to initialize custom hardware interface. 'hwif_init' returns 0x%lx - %s! Skip adding custom device to toolkit!", + (unsigned int)lRet, + ((CIFX_NO_ERROR == xDriverGetErrorDescription( lRet, szError, sizeof(szError))) ? szError : "Unknown error")); + } + } + } +#endif + /* Re-insert a device */ + if ((lRet == CIFX_NO_ERROR) && (CIFX_NO_ERROR == (lRet = cifXTKitAddDevice( ptDev)))) + { +#ifdef CIFXETHERNET + if (1 == dev_intern->eth_support) + { + NETX_ETH_DEV_CFG_T config; + + sprintf( config.cifx_name, "%s", ptDev->szName); + cifxeth_create_device( &config); + } +#endif + } else + { +#ifdef CIFX_DRV_HWIF + /* de-initialize hardware interface */ + if (dev_intern->userdevice->hwif_deinit) + dev_intern->userdevice->hwif_deinit( dev_intern->userdevice); +#endif + } + } + if (g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace(ptDev, + TRACE_LEVEL_DEBUG, + "RESTART DEVICE done, (Status: 0x%08X)\n", + lRet); + } + break; + } + } + + OS_LeaveLock(g_pvTkitLock); + + return lRet; +} + +/*****************************************************************************/ +/*! Linux driver de-initialization */ +/*****************************************************************************/ +void cifXDriverDeinit() +{ + /* Stop polling thread if it was enabled */ + if(polling_thread_running) + { + polling_thread_stop = 1; + pthread_join(polling_thread, NULL); + pthread_attr_destroy(&polling_thread_attr); + polling_thread_running = 0; + } + + if (NULL == g_pvTkitLock) /* toolkit is already de-initialized */ + return; + + OS_EnterLock(g_pvTkitLock); + + /* Remove all internal device structures */ + while(g_ulDeviceCount > 0) + { + PDEVICEINSTANCE devinstance = g_pptDevices[0]; + PCIFX_DEVICE_INTERNAL_T dev_intern = (PCIFX_DEVICE_INTERNAL_T)devinstance->pvOSDependent; +#ifdef CIFXETHERNET + if (1 == dev_intern->eth_support) + { + NETX_ETH_DEV_CFG_T config; + + sprintf( config.cifx_name, "%s", devinstance->szName); + cifxeth_remove_device( NULL, &config); + } +#endif + cifXTKitRemoveDevice(devinstance->szName , 1); + + if( NULL != dev_intern->log_file) + { + USER_Trace(devinstance, 0, "----- cifX Driver Log stopped ---------------------"); + + if (g_logfd == 0) { + /* log file is under our control so close it */ + fclose(dev_intern->log_file); + } + dev_intern->log_file = NULL; + } +#ifdef CIFX_DRV_HWIF + /* de-initialize hardware interface */ + if (dev_intern->userdevice->hwif_deinit) + dev_intern->userdevice->hwif_deinit( dev_intern->userdevice); +#endif + /* Only process non-user card device structures */ + if(!dev_intern->user_card) + { + cifXDeleteDevice(dev_intern->userdevice); + dev_intern->userdevice = NULL; + } + + free(dev_intern); + free(devinstance); + } + + OS_LeaveLock(g_pvTkitLock); + +#ifdef CIFX_PLUGIN_SUPPORT + struct CIFX_PLUGIN_T* plugin; + + while(NULL != (plugin = SLIST_FIRST(&s_tPluginList))) + { + uint32_t i; + + for(i = 0; i < plugin->ulDeviceCount; i++) + { + PFN_CIFX_PLUGIN_FREE_DEVICE pfnFree = dlsym(plugin->hPluginFile, CIFX_PLUGIN_FREE_DEVICE); + + if( (NULL != pfnFree) && + (NULL != plugin->aptDevices[i]) ) + { + pfnFree(plugin->aptDevices[i]); + } + } + + free(plugin->aptDevices); + dlclose(plugin->hPluginFile); + SLIST_REMOVE(&s_tPluginList, plugin, CIFX_PLUGIN_T, tList); + free(plugin); + } +#endif + +#ifdef CIFXETHERNET + if (NULL != g_eth_list_lock) { + OS_DeleteLock( g_eth_list_lock); + g_eth_list_lock = NULL; + } +#endif + + if (NULL != g_szDriverBaseDir) { + free(g_szDriverBaseDir); + g_szDriverBaseDir = NULL; + } + cifXTKitDeinit(); +} + + +/*****************************************************************************/ +/*! Query Driver Version +* \param ulSize Size of the passed string +* \param szVersion Pointer to returned data (string) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifXGetDriverVersion(uint32_t ulSize, char* szVersion) +{ + if(ulSize < OS_Strlen(LINUXCIFXDRV_VERSION)) + return CIFX_INVALID_BUFFERSIZE; + + OS_Strncpy(szVersion, LINUXCIFXDRV_VERSION, OS_Strlen(LINUXCIFXDRV_VERSION)); + + return CIFX_NO_ERROR; +} + + +/*****************************************************************************/ +/*! Retrieve the number of automatically detectable cifX Devices. +* \return Number found netX/cifX uio devices */ +/*****************************************************************************/ +int cifXGetDeviceCount(void) +{ + struct dirent** namelist; + int num_uios; + int ret = 0; + + num_uios = scandir("/sys/class/uio", &namelist, 0, alphasort); + if(num_uios > 0) + { + int currentuio; + + for(currentuio = 0; currentuio < num_uios; ++currentuio) + { + int uio_num; + + if(0 == sscanf(namelist[currentuio]->d_name, + "uio%u", + &uio_num)) + { + /* Error extracting uio number */ + + } else if( cifx_uio_validate_name(uio_num, CIFX_UIO_CARD_NAME) || + cifx_uio_validate_name(uio_num, CIFX_UIO_PLX_CARD_NAME) || + cifx_uio_validate_name(uio_num, CIFX_UIO_NETPLC_CARD_NAME) || + cifx_uio_validate_name(uio_num, CIFX_UIO_NETJACK_CARD_NAME)|| + cifx_uio_validate_name(uio_num, CIFX_UIO_CUSTOM_CARD_NAME) ) + { + /* device is not a netX device */ + ++ret; + } + free(namelist[currentuio]); + } + free(namelist); + } + + return ret; +} + +/*****************************************************************************/ +/*! Scan for cifX Devices via uio driver +* \param iNum Number of card to detect (0..num_of_cards) +* \param fCheckAccess If !=0, function denies access if device is +* already used by another application +* \return NULL if no device with this number was found */ +/*****************************************************************************/ +struct CIFX_DEVICE_T* cifXFindDevice(int iNum, int fCheckAccess) +{ + struct dirent** namelist; + int num_uios; + struct CIFX_DEVICE_T* device = NULL; + + num_uios = scandir("/sys/class/uio", &namelist, 0, alphasort); + if(num_uios > 0) + { + int netx_uios = 0; + int currentuio; + int founddevice = 0; + + for(currentuio = 0; currentuio < num_uios; ++currentuio) + { + int uio_num; + + if(founddevice) + { + /* we already found the device, so skip it. + we need to handle all data from name list, so we need to + cycle through whole list */ + } else if(0 == sscanf(namelist[currentuio]->d_name, + "uio%u", + &uio_num)) + { + /* Error extracting uio number */ + + } else if( !cifx_uio_validate_name(uio_num, CIFX_UIO_CARD_NAME) && + !cifx_uio_validate_name(uio_num, CIFX_UIO_PLX_CARD_NAME) && + !cifx_uio_validate_name(uio_num, CIFX_UIO_NETPLC_CARD_NAME) && + !cifx_uio_validate_name(uio_num, CIFX_UIO_NETJACK_CARD_NAME) && + !cifx_uio_validate_name(uio_num, CIFX_UIO_CUSTOM_CARD_NAME) ) + { + /* device is not a netX device */ + + } else if(netx_uios++ != iNum) + { + /* not the device we are looking for, so skip it */ + + } else + { + void* dpmbase = NULL; + void* extmembase = NULL; + unsigned long dpmaddr, dpmlen, extmemaddr, extmemlen;; + int uio_fd; + + if(-1 == (uio_fd = cifx_uio_open( uio_num, fCheckAccess))) + { + perror("Error opening uio"); + } else if(!cifx_uio_map_dpm(uio_fd, uio_num, &dpmbase, &dpmaddr, &dpmlen)) + { + perror("Error mapping dpm"); + } else + { + /* try to map extended memory */ + if (cifx_uio_map_ext_mem(uio_fd, uio_num, &extmembase, &extmemaddr, &extmemlen)) + { +#ifdef VERBOSE + printf("Extended memory found at (0x%X - 0x%X)\n", (unsigned int)extmemaddr, (unsigned int)(extmemaddr + extmemlen)); +#endif + } + + /* Build device structure */ + device = malloc(sizeof(*device)); + memset(device, 0, sizeof(*device)); + device->uio_num = uio_num; + device->uio_fd = uio_fd; + + if( cifx_uio_validate_name(uio_num, CIFX_UIO_PLX_CARD_NAME) ) + device->pci_card = 0; + else if ( cifx_uio_validate_name(uio_num, CIFX_UIO_CUSTOM_CARD_NAME) ) + device->pci_card = 0; + else + device->pci_card = 1; + + device->dpm = dpmbase; + device->dpmaddr = dpmaddr; + device->dpmlen = dpmlen; + /* optional extended memory */ + device->extmem = extmembase; + device->extmemaddr = extmemaddr; + device->extmemlen = extmemlen; +#ifdef CIFX_TOOLKIT_DMA + cifx_uio_map_dma_buffer( device); +#endif + } + founddevice = 1; + } + free(namelist[currentuio]); + } + free(namelist); + } + + return device; +} + +/*****************************************************************************/ +/*! Delete a previously via cifXFindDevice found device. Unmaps DPM and closes +* all open file handles to the uio driver. Also frees the pointer. +* \param device Device to delete */ +/*****************************************************************************/ +void cifXDeleteDevice(struct CIFX_DEVICE_T* device) +{ + if(device->uio_fd != -1) + { +#ifdef CIFX_TOOLKIT_DMA + if (device->dma_buffer_cnt) + cifx_uio_unmap_dma_buffer(device); +#endif + /* Unmap DPM */ + munmap(device->dpm, device->dpmlen); + if (device->extmem) + munmap(device->extmem, device->extmemlen); + /* close uio_fd */ + flock( device->uio_fd, LOCK_UN); + close(device->uio_fd); + } + free(device); +} + +#ifdef CIFX_DRV_HWIF +/*****************************************************************************/ +/*! Read a number of bytes from hardware interface + * If no hw-functions are defined DPM is accessed via simple memcpy +* \param ulDpmAddr Address offset in DPM to read data from +* \param pvDst Buffer to store read data +* \param pvDst Number of bytes to read */ +/*****************************************************************************/ +void* HWIFDPMRead( uint32_t ulOpt, void* pvDevInstance, void* pvDpmAddr, void* pvDst, uint32_t ulLen) +{ + PDEVICEINSTANCE pDev = (PDEVICEINSTANCE)pvDevInstance; + PCIFX_DEVICE_INTERNAL_T ptInternalDev = (PCIFX_DEVICE_INTERNAL_T)pDev->pvOSDependent; + struct CIFX_DEVICE_T* ptDevice = ptInternalDev->userdevice; + (void) ulOpt; + + if (ptDevice->hwif_read)/* call the custom defined hw-read function */ + pvDst = ptDevice->hwif_read( ptDevice, pvDpmAddr, pvDst, ulLen); + else /* if function is not defined, its a memory mapped DPM */ + OS_Memcpy( pvDst, pvDpmAddr, ulLen); + + return pvDst; +} + +/*****************************************************************************/ +/*! Write a number of bytes to hardware interface + * If no hw-functions are defined DPM is accessed via simple memcpy +* \param ulDpmAddr Address offset in DPM to read data from +* \param pvDst Buffer to store read data +* \param pvDst Number of bytes to read */ +/*****************************************************************************/ +void* HWIFDPMWrite( uint32_t ulOpt, void* pvDevInstance, void* pvDpmAddr, void* pvSrc, uint32_t ulLen) +{ + PDEVICEINSTANCE pDev = (PDEVICEINSTANCE)pvDevInstance; + PCIFX_DEVICE_INTERNAL_T ptInternalDev = (PCIFX_DEVICE_INTERNAL_T)pDev->pvOSDependent; + struct CIFX_DEVICE_T* ptDevice = ptInternalDev->userdevice; + (void) ulOpt; + + if (ptDevice->hwif_write)/* call the custom defined hw-write function */ + pvDpmAddr = ptDevice->hwif_write( ptDevice, pvDpmAddr, pvSrc, ulLen); + else /* if function is not defined, its a memory mapped DPM */ + OS_Memcpy( pvDpmAddr, pvSrc, ulLen); + + return pvDpmAddr; +} +#endif diff --git a/libcifx/cifxlinux.h b/libcifx/cifxlinux.h new file mode 100644 index 0000000..45ff30d --- /dev/null +++ b/libcifx/cifxlinux.h @@ -0,0 +1,181 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Header file of Linux specific driver / toolkit initialization. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __CIFX_LINUX__H +#define __CIFX_LINUX__H + +#ifdef __cplusplus +extern "C" +{ +#endif + +#include + +#define LIBRARYNAME "LinuxCIFXDrv " +#define LINUXCIFXDRV_VERSION LIBRARYNAME VERSION_INFO + +#define APIENTRY +#ifdef CIFX_TOOLKIT_HWIF +#include "cifXHWFunctions.h" +#endif +#include "cifXUser.h" +#include "cifXErrors.h" + +#define CIFX_DRIVER_INIT_NOSCAN 0 /*!< Don't automatically scan and add found devices */ +#define CIFX_DRIVER_INIT_AUTOSCAN 1 /*!< Scan automatically for devices and add them to toolkit control */ +#define CIFX_DRIVER_INIT_CARDNUMBER 2 /*!< Initialize specific card */ + +#define CIFX_POLLINTERVAL_DISABLETHREAD (~0) /*!< Disable polling completely */ +#define DMA_BUFFER_COUNT 8 + +/*****************************************************************************/ +/*! Driver initialization structure */ +/*****************************************************************************/ +struct CIFX_LINUX_INIT +{ + int init_options; /*!< see CIFX_DRIVER_INIT_XXX defines */ + + const char* base_dir; /*!< base directory for device configuration */ + unsigned long poll_interval; /*!< Poll interval in ms for non-irq cards */ + int poll_priority; /*!< Poll thread priority */ + unsigned long trace_level; /*!< see TRACE_LVL_XXX defines */ + int user_card_cnt; /*!< Number of user defined cards */ + struct CIFX_DEVICE_T* user_cards; /*!< Pointer to Array of user cards (must be user_card_cnt long) */ + + int iCardNumber; + int fEnableCardLocking; + int poll_StackSize; /*!< Stack size of polling thread */ + int poll_schedpolicy; /*!< Schedule policy of poll thread */ + FILE* logfd; +}; + +int32_t cifXDriverInit(const struct CIFX_LINUX_INIT* init_params); +void cifXDriverDeinit(); +int32_t cifXGetDriverVersion(uint32_t ulSize, char* szVersion); + +typedef int32_t (*PFN_DRV_HWIF_INIT) ( struct CIFX_DEVICE_T* ptDevice); +typedef void (*PFN_DRV_HWIF_EXIT) ( struct CIFX_DEVICE_T* ptDevice); +typedef void* (*PFN_DRV_HWIF_MEMCPY) ( struct CIFX_DEVICE_T* ptDevice, void* pvAddr, void* pvData, uint32_t ulLen); + +/*****************************************************************************/ +/*! Notification events */ +/*****************************************************************************/ +typedef enum CIFX_NOTIFY_Etag +{ + eCIFX_EVENT_PRERESET = 0, /*!< Event signalled, before device is reset (HW Reset) */ + eCIFX_EVENT_POSTRESET, /*!< Called after HW reset has been executed */ + eCIFX_EVENT_PRE_BOOTLOADER, /*!< Called before bootloader is downloaded */ + eCIFX_EVENT_POST_BOOTLOADER, /*!< Called after bootloader was downloaded and started */ + +} CIFX_NOTIFY_E; + +typedef void(*PFN_CIFX_NOTIFY_EVENT)(struct CIFX_DEVICE_T* ptDevice, CIFX_NOTIFY_E eEvent); + +/*****************************************************************************/ +/*! Memory types */ +/*****************************************************************************/ +typedef enum CIFX_MEM_TYPE_Etag +{ + eMEM_DPM, + eMEM_EXTMEM, + eMEM_DMA +} CIFX_MEM_TYPE_E; + +/*****************************************************************************/ +/*! DMA memory information */ +/*****************************************************************************/ +typedef struct DMABUFFER_Ttag +{ + uint32_t ulSize; /*!< DMA buffer size */ + uint32_t ulPhysicalAddress; /*!< Physical address of the buffer */ + void* pvBuffer; /*!< Pointer to the buffer */ +} DMABUFFER_T; + +/*****************************************************************************/ +/*! Device structure for manually adding devices */ +/*****************************************************************************/ +struct CIFX_DEVICE_T +{ + unsigned char* dpm; /*!< virtual pointer to DPM */ + unsigned long dpmaddr; /*!< physical address to DPM, this parameter will be used for PCI cards to detect bus address */ + unsigned long dpmlen; /*!< Length of DPM in bytes */ + + int uio_num; /*!< uio number, -1 for non-uio devices */ + int uio_fd; /*!< uio file handle, -1 for non-uio devices */ + + int pci_card; /*!< !=0 if device is a pci card */ + int force_ram; /*!< Force usage of RAM instead of flash. Card will always be reset and all + files are downloaded again */ + + PFN_CIFX_NOTIFY_EVENT notify; /*!< Function to call, after the card has passed several stages (usually needed on RAM based + devices, that change DPM configuration during initialization) */ + + void* userparam; /*!< User specific parameter (e.g. identifier for manual added devices */ + + unsigned char* extmem; /*!< virtual pointer to extended memory */ + unsigned long extmemaddr; /*!< physical address to extended memory */ + unsigned long extmemlen; /*!< Length of extended memory in bytes */ + + /* DMA Buffer Structure */ + uint32_t dma_buffer_cnt; /*!< Number of available DMA buffers */ + DMABUFFER_T dma_buffer[DMA_BUFFER_COUNT]; /*!< DMA buffer definition for the device */ + + /* function interface required when using the toolkit's hardware functions */ + PFN_DRV_HWIF_INIT hwif_init; /*!< Function initializes custom hw-function interface */ + PFN_DRV_HWIF_EXIT hwif_deinit; /*!< Function de-initializes custom hw-function interface */ + PFN_DRV_HWIF_MEMCPY hwif_read; /*!< Function provides read access to the DPM via custom hardware interface */ + PFN_DRV_HWIF_MEMCPY hwif_write; /*!< Function provides write access to the DPM via custom hardware interface */ +}; + +int cifXGetDeviceCount(void); +struct CIFX_DEVICE_T* cifXFindDevice(int iNum, int fForceOpenDevice); +void cifXDeleteDevice(struct CIFX_DEVICE_T* device); + +#define CIFX_UIO_MAP_NO_FOR_DPM 0 /*!< Offset of uio driver to mmap */ + +#define CIFX_UIO_PLX_CARD_NAME "netx_plx" /*!< uio name of a NXSB-PCA or NXPCA-PCI card */ +#define CIFX_UIO_CARD_NAME "netx" /*!< uio name of a cifX PCI card */ +#define CIFX_UIO_NETPLC_CARD_NAME "netplc" /*!< uio name of a netPLC PCI card */ +#define CIFX_UIO_NETJACK_CARD_NAME "netjack" /*!< uio name of a netJACK PCI card */ +#define CIFX_UIO_CUSTOM_CARD_NAME "netx_custom" /*!< name of user defined cards */ + +#define UIO_NETX_START_TYPE_AUTO "auto" +#define UIO_NETX_START_TYPE_RAM "ram" +#define UIO_NETX_START_TYPE_FLASH "flash" +#define UIO_NETX_START_TYPE_DONTTOUCH "donttouch" + +/* UIO helper functions to allow users, to find own uio devices, without the need to reimplement the uio access functions */ +int cifx_uio_open(int uio_num, int fForceOpenDevice); +int cifx_ISA_open(void); +void cifx_ISA_close(int isa_fd); +unsigned long cifx_uio_get_mem_size(int uio_num, int bar); +unsigned long cifx_uio_get_mem_addr(int uio_num, int bar); +int cifx_uio_validate_name(int uio_num, const char* name); +int cifx_uio_map_dpm(int uio_fd, int uio_num, void** dpmbase, unsigned long* dpmaddr, unsigned long* dpmlen); +int cifx_ISA_map_dpm(int fd, void** dpmbase, int dpmaddr, int dpmlen); +void cifx_ISA_unmap_dpm(void* dpmbase, int dpmlen); + +#define CIFX_PLUGIN_GET_DEVICE_COUNT "cifx_device_count" +typedef uint32_t(*PFN_CIFX_PLUGIN_GET_DEVICE_COUNT)(void); +#define CIFX_PLUGIN_ALLOC_DEVICE "cifx_alloc_device" +typedef struct CIFX_DEVICE_T*(*PFN_CIFX_PLUGIN_ALLOC_DEVICE)(uint32_t num); +#define CIFX_PLUGIN_FREE_DEVICE "cifx_free_device" +typedef void(*PFN_CIFX_PLUGIN_FREE_DEVICE)(struct CIFX_DEVICE_T*); + +#ifdef __cplusplus +} +#endif + +#endif /* __CIFX_LINUX__H */ diff --git a/libcifx/cifxlinux_internal.h b/libcifx/cifxlinux_internal.h new file mode 100644 index 0000000..24cbb26 --- /dev/null +++ b/libcifx/cifxlinux_internal.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Linux driver specific internal structures. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __CIFX_LINUX_INTERNAL__H +#define __CIFX_LINUX_INTERNAL__H + +#include "cifxlinux.h" + +#ifndef CIFX_TOOLKIT_DISABLEPCI + #include "pciaccess.h" +#endif + +#include +#include +#include "cifXToolkit.h" + +extern void* g_eth_list_lock; + +typedef struct CIFX_DEVICE_INTERNAL_Ttag +{ + struct CIFX_DEVICE_T* userdevice; /*!< Device description passed by user */ + + int set_irq_prio; /*!< Flag if custom IRQ priority should be set */ + int irq_prio; /*!< Custom IRQ thread priority */ + + int set_irq_scheduler_algo; /*!< Use Custom scheduling algorithm for IRQ thread */ + int irq_scheduler_algo; /*!< Scheduling algorithm to use for IRQ thread (only + valid if set_irq_scheduler_algo is set) */ + + pthread_attr_t irq_thread_attr; /*!< Interrupt thread attributes */ + pthread_t irq_thread; /*!< Interrupt thread handle */ + int irq_stop; /*!< flag to signal IRQ handler to stop */ + + int user_card; /*!< !=0 if user specified card. This card will not be deleted on exit */ + FILE *log_file; /*!< Handle to logfile if any */ + + +#ifndef CIFX_TOOLKIT_DISABLEPCI + struct pci_device pci; /*!< pci device information if it is a pci device */ +#endif + + PDEVICEINSTANCE devinstance; /*!< Toolkit device instance */ + int eth_support; + +} CIFX_DEVICE_INTERNAL_T, *PCIFX_DEVICE_INTERNAL_T; + +#ifdef CIFXETHERNET +int USER_GetEthernet(PCIFX_DEVICE_INFORMATION ptDevInfo); +#endif + +#endif /* __CIFX_LINUX_INTERNAL__H */ diff --git a/libcifx/netx_tap/DrvEth_GCI_API.h b/libcifx/netx_tap/DrvEth_GCI_API.h new file mode 100644 index 0000000..b024e6b --- /dev/null +++ b/libcifx/netx_tap/DrvEth_GCI_API.h @@ -0,0 +1,296 @@ +/************************************************************************************** +Copyright (c) Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. +*************************************************************************************** + $Id: $: *//*! + + \file DrvEth_GCI_API.h + DrvEth GCI Application Programming Interface + +Changes: + Date Description + ----------------------------------------------------------------------------------- + 2018-08-8 created +**************************************************************************************/ + +#ifndef __DRVETH_GCI_API_H +#define __DRVETH_GCI_API_H + +#include +#include "Hil_Compiler.h" +#include "Hil_Packet.h" + +/*! \defgroup drveth_gci_public_api Raw Ethernet Public API + * + * This section describes the Packet API between the host application and + * DrvEth GCI Adapter. + * @{ + */ + +/*! Packet Command Codes */ +typedef enum DRVETH_GCI_CMD_Etag +{ + /*! Event indication */ + DRVETH_GCI_CMD_EVENT_IND = 0x00003B20, + /*! Event response */ + DRVETH_GCI_CMD_EVENT_RSP = 0x00003B21, + + /*! Send ethernet frame request */ + DRVETH_GCI_CMD_SEND_ETH_FRAME_REQ = 0x00003B22, + /*! Send ethernet frame confirmation */ + DRVETH_GCI_CMD_SEND_ETH_FRAME_CNF = 0x00003B23, + + /*! Received ethernet frame indication */ + DRVETH_GCI_CMD_RECV_ETH_FRAME_IND = 0x00003B24, + /*! Received ethernet frame response */ + DRVETH_GCI_CMD_RECV_ETH_FRAME_RSP = 0x00003B25, + + /*! Register for multicast reception for certain group address request */ + DRVETH_GCI_CMD_SET_MULTICAST_SINGLE_REQ = 0x00003B26, + /*! Register for multicast reception for certain group address confirmation */ + DRVETH_GCI_CMD_SET_MULTICAST_SINGLE_CNF = 0x00003B27, + + /*! Unregister for multicast reception for certain group address request */ + DRVETH_GCI_CMD_CLR_MULTICAST_SINGLE_REQ = 0x00003B28, + /*! Unregister for multicast reception for certain group address confirmation */ + DRVETH_GCI_CMD_CLR_MULTICAST_SINGLE_CNF = 0x00003B29, +} DRVETH_GCI_CMD_E; + + +/*! Size of an ethernet mac address */ +#define DRVETH_GCI_ETH_ADDR_SIZE (6) + +/*! Extended Status Area content. */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_EXTENDED_STATE_Ttag +{ + /*!The mac address of the ethernet interface + * This is set to zero if ethernet mac is not available. */ + uint8_t abMacAddress[DRVETH_GCI_ETH_ADDR_SIZE]; + /*! The current mau type according IANA */ + uint8_t bMautype; + /*! alignment */ + uint8_t bPadding; + /*! Reserved. */ + uint32_t ulReserved0; + /*! Reserved. */ + uint32_t ulReserved1; + /*! Reserved. */ + uint32_t ulReserved2; + /*! The number of received packets passed to the host. */ + uint64_t ullIfInPkts; + /*! The number of received packets not passed to the host because of + * packet queue overflow. */ + uint64_t ullIfInDiscards; + /*! The number of sent ethernet frames. */ + uint64_t ullIfOutPkts; + /*! The number of ethernet frames dropped because of no + * ethernet frame buffer available. */ + uint64_t ullIfOutDiscards; + /*! The number of bytes received. */ + uint64_t ullIfInBytes; + /*! The number of bytes transmitted. */ + uint64_t ullIfOutBytes; +} __HIL_PACKED_POST DRVETH_GCI_EXTENDED_STATE_T; + + +/*! Minimum Ethernet Frame length (without FCS). */ +#define DRVETH_GCI_MIN_ETH_FRAME_SIZE (60) +/*! Maximum Ethernet Frame length (without FCS). */ +#define DRVETH_GCI_MAX_ETH_FRAME_SIZE (1518) + +/*! Ethernet frame data type */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_ETH_FRAME_Ttag +{ + /*! Destination Mac Address */ + uint8_t abDestMacAddr[DRVETH_GCI_ETH_ADDR_SIZE]; + /*! Source Mac Address */ + uint8_t abSrcMacAddr[DRVETH_GCI_ETH_ADDR_SIZE]; + /*! Remaining Data */ + uint8_t abData[DRVETH_GCI_MAX_ETH_FRAME_SIZE - 2 * DRVETH_GCI_ETH_ADDR_SIZE]; +} __HIL_PACKED_POST DRVETH_GCI_ETH_FRAME_T; + + +/*! \defgroup drveth_gci_service_sendframe Send Ethernet Frame Service + * + * This service shall be used by the Host Application to send an ethernet + * frame. + * + * @{ + */ + +/*! Send Ethernet frame request packet */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_SEND_ETH_FRAME_REQ_Ttag +{ + /*! Packet header */ + HIL_PACKET_HEADER_T tHead; + /*! Packet data */ + DRVETH_GCI_ETH_FRAME_T tData; +} __HIL_PACKED_POST DRVETH_GCI_SEND_ETH_FRAME_REQ_T; + +/*! Send Ethernet frame confirmation packet */ +typedef HIL_EMPTY_PACKET_T DRVETH_GCI_SEND_ETH_FRAME_CNF_T; + +/*! Send Ethernet frame packet union */ +typedef union DRVETH_GCI_SEND_ETH_FRAME_PCK_Ttag +{ + /*! Request */ + DRVETH_GCI_SEND_ETH_FRAME_REQ_T tReq; + /*! Confirmation */ + DRVETH_GCI_SEND_ETH_FRAME_CNF_T tCnf; +} DRVETH_GCI_SEND_ETH_FRAME_PCK_T; + +/*! @} */ + +/*! \defgroup drveth_gci_service_recvframe Receive Ethernet Frame Service + * + * This service is used by the DrvEth GCI Adapter to indicate + * reception of an Ethernet Frame to the Host application. The + * Host application must use the HIL_REGISTER_APP_REQ before this + * service is enabled. + * @{ + */ + +/*! Received Ethernet frame indication packet */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_RECV_ETH_FRAME_IND_Ttag +{ + /*! Packet header */ + HIL_PACKET_HEADER_T tHead; + /*! Packet data */ + DRVETH_GCI_ETH_FRAME_T tData; +} __HIL_PACKED_POST DRVETH_GCI_RECV_ETH_FRAME_IND_T; + +/*! Send Ethernet frame confirmation packet */ +typedef HIL_EMPTY_PACKET_T DRVETH_GCI_RECV_ETH_FRAME_RSP_T; + +/*! Receive Ethernet frame packet union */ +typedef union DRVETH_GCI_RECV_ETH_FRAME_PCK_Ttag +{ + /*! Indication */ + DRVETH_GCI_RECV_ETH_FRAME_IND_T tInd; + /*! Response */ + DRVETH_GCI_RECV_ETH_FRAME_RSP_T tRsp; +} DRVETH_GCI_RECV_ETH_FRAME_PCK_T; + +/*! @} */ + + +/*! \defgroup drveth_gci_service_event Event service + * + * This service is used by the DrvEth GCI Adapter to + * notify the Host Application about occurring events. The + * service will be enabled after the Host Application used + * the HIL_REGISTER_APP_REQ. + * + * The service uses a locking mechanism to avoid flooding the + * host application with events. After an event indication + * has been generated, the DrvEth GCI Adapter will count + * any subsequent events instead of sending a new packet. After + * the host returned the event response back, a new event + * indication will be generated if necessary. + * + * @{ + */ + +/*! Event counter enumeration */ +typedef enum DRVETH_GCI_EVENT_Etag +{ + /*! Linkstatus changed event. */ + DRVETH_GCI_EVENT_LINKCHANGED = 0, + /*! Maximum number of event types. */ + DRVETH_GCI_EVENT_MAX +} DRVETH_GCI_EVENT_E; + +/*! Event Data */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_EVENT_DATA_Ttag +{ + /*! Array of Counters counting the events defined by + * DRVETH_GCI_EVENT_E */ + uint16_t uiEventCnt[DRVETH_GCI_EVENT_MAX]; +} __HIL_PACKED_POST DRVETH_GCI_EVENT_DATA_T; + +/*! Event occurred indication packet */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_EVENT_IND_Ttag +{ + /*! Packet header */ + HIL_PACKET_HEADER_T tHead; + /*! Packet data */ + DRVETH_GCI_EVENT_DATA_T tData; +} __HIL_PACKED_POST DRVETH_GCI_EVENT_IND_T; + +/*! Event occurred response packet */ +typedef HIL_EMPTY_PACKET_T DRVETH_GCI_EVENT_RSP_T; + +/*! Event service packet union */ +typedef union DRVETH_GCI_EVENT_PCK_Ttag +{ + /*! Indication */ + DRVETH_GCI_EVENT_IND_T tInd; + /*! Response */ + DRVETH_GCI_EVENT_RSP_T tRsp; +} DRVETH_GCI_EVENT_PCK_T; +/*! @} */ + +/*! \defgroup drveth_gci_service_setmulticast Set Multicast Single Service + * + * This service shall be used to receive traffic from a specific IPv4 + * multicast group. + * + * @{ + */ + +/*! Register multicast group request packet */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_SET_MULTICAST_SINGLE_REQ_Ttag +{ + /*! Packet header */ + HIL_PACKET_HEADER_T tHead; + /*! Packet data */ + uint8_t abMacAddr[DRVETH_GCI_ETH_ADDR_SIZE]; +} __HIL_PACKED_POST DRVETH_GCI_SET_MULTICAST_SINGLE_REQ_T; + +/*! Register multicast group confirmation packet */ +typedef HIL_EMPTY_PACKET_T DRVETH_GCI_SET_MULTICAST_SINGLE_CNF_T; + +/*! Register multicast group reception packet union */ +typedef union DRVETH_GCI_SET_MULTICAST_SINGLE_PCK_Ttag +{ + /*! Request */ + DRVETH_GCI_SET_MULTICAST_SINGLE_REQ_T tReq; + /*! Confirmation */ + DRVETH_GCI_SET_MULTICAST_SINGLE_CNF_T tCnf; +} DRVETH_GCI_SET_MULTICAST_SINGLE_PCK_T; + +/*! @} */ + +/*! \defgroup drveth_gci_service_clearmulticast Clear Multicast Single Service + * + * This service shall be used to stop receiving traffic from a specific IPv4 + * multicast group. + * + * @{ + */ + +/*! Clear multicast group request packet */ +typedef __HIL_PACKED_PRE struct DRVETH_GCI_CLR_MULTICAST_SINGLE_REQ_Ttag +{ + /*! Packet header */ + HIL_PACKET_HEADER_T tHead; + /*! Packet data */ + uint8_t abMacAddr[DRVETH_GCI_ETH_ADDR_SIZE]; +} __HIL_PACKED_POST DRVETH_GCI_CLR_MULTICAST_SINGLE_REQ_T; + +/*! Clear multicast group confirmation packet */ +typedef HIL_EMPTY_PACKET_T DRVETH_GCI_CLR_MULTICAST_SINGLE_CNF_T; + +/*! Unregister multicast group reception packet union */ +typedef union DRVETH_GCI_CLR_MULTICAST_SINGLE_PCK_Ttag +{ + /*! Request */ + DRVETH_GCI_CLR_MULTICAST_SINGLE_REQ_T tReq; + /*! Confirmation */ + DRVETH_GCI_CLR_MULTICAST_SINGLE_CNF_T tCnf; +} DRVETH_GCI_CLR_MULTICAST_SINGLE_PCK_T; + +/*! @} */ + +/*! @} */ + +#endif /* #ifndef __DRVETH_GCI_API_H */ diff --git a/libcifx/netx_tap/netx_tap.c b/libcifx/netx_tap/netx_tap.c new file mode 100644 index 0000000..023551c --- /dev/null +++ b/libcifx/netx_tap/netx_tap.c @@ -0,0 +1,1384 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Implementation of the netX virtual network interface. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifdef CIFXETHERNET + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "Hil_Packet.h" +#include "Hil_Results.h" +#include "Hil_ApplicationCmd.h" +#include "DrvEth_GCI_API.h" +#include "cifXUser.h" +#include "cifXErrors.h" +#include "cifXHWFunctions.h" +#include "netx_tap.h" + +#define TUNTAP_DEVICEPATH "/dev/net/tun" + +#define SEND_RETRIES 0 + +#define LINK_STATE_POLL_INTERVAL 5 /* in seconds */ + +void* g_eth_list_lock; + +typedef struct NETX_ETH_DEV_Ttag +{ + TAILQ_ENTRY(NETX_ETH_DEV_Ttag) lentry; + int eth_fd; + char cifxeth_name[CIFX_MAX_FILE_NAME_LENGTH]; + char event_path[CIFX_MAX_FILE_NAME_LENGTH]; + NETX_ETH_DEV_CFG_T config; + CIFXHANDLE cifx_driver; + CIFXHANDLE cifx_channel; + PDEVICEINSTANCE devinst; + uint32_t channel_no; + pthread_t eth_to_cifx_thread; + pthread_t cifx_to_eth_thread; + int stop_to_eth; + int stop_to_cifx; + void* com_lock; + void* send_event; + uint32_t active_sends; + uint32_t send_packets; + uint32_t recv_packets; + int link_up; + void* link_event; + +} NETX_ETH_DEV_T; + +static TAILQ_HEAD(, NETX_ETH_DEV_Ttag) s_DeviceList = TAILQ_HEAD_INITIALIZER( s_DeviceList); + +static int32_t cifxeth_search_eth_channel ( char* szDeviceName, uint32_t ulSearchIdx, uint32_t* pulChannelNumber); +static int cifxeth_allocate_tap ( NETX_ETH_DEV_T* internal_dev, char* prefix); +static void cifxeth_free_tap ( NETX_ETH_DEV_T* internal_dev, char* name); +static void cifxeth_delete_device ( NETX_ETH_DEV_T* internal_dev); +static int32_t cifxeth_register_app ( NETX_ETH_DEV_T* internal_dev, int fRegister); +static int cifxeth_create_com_thread ( NETX_ETH_DEV_T* internal_dev); +static int cifxeth_create_cifx_thread ( NETX_ETH_DEV_T* internal_dev); +static int32_t cifxeth_update_device_config ( NETX_ETH_DEV_T* internal_dev); +static int32_t cifxeth_update_link_state ( NETX_ETH_DEV_T* internal_dev); +static int32_t cifxeth_get_extended_info ( NETX_ETH_DEV_T* internal_dev, uint32_t ulInformationRequest, void* pvBuffer, uint32_t ulBufLen); +static void* eth_to_cifx_thread ( void* arg); +static void* cifx_to_eth_thread ( void* arg); +static NETX_ETH_DEV_T* find_device ( char* name); + +struct nl_link_arg { + struct rtnl_link *change; + struct nl_sock *sock; + NETX_ETH_DEV_T* priv; +}; + +static void set_cb(struct nl_object *obj, void *arg) +{ + struct rtnl_link *link = nl_object_priv(obj); + struct nl_link_arg *link_arg = arg; + + if (rtnl_link_change(link_arg->sock, link, link_arg->change, 0)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( link_arg->priv->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Link-update failed for %s", link_arg->priv->cifxeth_name); + } + } +} + +void nl_signal_link_change( NETX_ETH_DEV_T* internal_dev, int state) { + struct nl_sock *sock; + struct nl_cache *link_cache; + struct rtnl_link *link, *change; + struct nl_link_arg link_arg; + + if (NULL == (sock = nl_cli_alloc_socket())) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Link-update failed - failed to allocate socket", internal_dev->cifxeth_name); + } + return; + } + if (0 == nl_cli_connect(sock, NETLINK_ROUTE)) + { + link_cache = nl_cli_link_alloc_cache(sock); + link = nl_cli_link_alloc(); + change = nl_cli_link_alloc(); + + nl_cli_link_parse_name(link, internal_dev->cifxeth_name); + if (state != 0) { + rtnl_link_set_flags(change, IFF_UP); + } else { + rtnl_link_unset_flags(change, IFF_UP); + } + + link_arg.sock = sock; + link_arg.change = change; + link_arg.priv = internal_dev; + nl_cache_foreach_filter(link_cache, OBJ_CAST(link), set_cb, &link_arg); + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Link-update failed - failed to connect socket", internal_dev->cifxeth_name); + } + } +} + +/*****************************************************************************/ +/*! This function creates a netX based ethernet interface +* \param config pointer to configuration structure +* \return != NULL on success */ +/*****************************************************************************/ +void* cifxeth_create_device(NETX_ETH_DEV_CFG_T* config) +{ + NETX_ETH_DEV_T* internal_dev = NULL; + void* ret = NULL; + int32_t cifx_error = CIFX_NO_ERROR; + int32_t search_error = CIFX_NO_ERROR; + uint32_t channel_no = 0; + uint32_t eth_no = 0; + int err = 0; + + if (NULL == config) + goto exit; + + if (NULL != find_device( config->cifx_name)) + return NULL; + + /* try to find a channel providing an ethernet interface */ + while (CIFX_NO_ERROR == (search_error = cifxeth_search_eth_channel( config->cifx_name, channel_no, &channel_no))) + { + if(NULL != (internal_dev = (NETX_ETH_DEV_T*)OS_Memalloc( sizeof(*internal_dev)))) + { + OS_Memset( internal_dev, 0, sizeof(NETX_ETH_DEV_T)); + if (NULL == (internal_dev->com_lock = OS_CreateLock())) + { + OS_Memfree( internal_dev); + goto exit; + + } else if (NULL == (internal_dev->send_event = OS_CreateEvent())) + { + OS_DeleteLock( internal_dev->com_lock); + OS_Memfree( internal_dev); + goto exit; + + } else if (NULL == (internal_dev->link_event = OS_CreateEvent())) + { + OS_DeleteEvent( internal_dev->send_event); + OS_DeleteLock( internal_dev->com_lock); + OS_Memfree( internal_dev); + goto exit; + } + internal_dev->channel_no = channel_no; + + if(CIFX_NO_ERROR != (cifx_error = xDriverOpen( &internal_dev->cifx_driver))) + { + fprintf(stderr, "Ethernet-IF Error: %s: Error opening cifX Device Driver (Ret=0x%08X)\n", __TIME__, cifx_error); + + } else if(CIFX_NO_ERROR == (cifx_error = xChannelOpen(internal_dev->cifx_driver, + config->cifx_name, + internal_dev->channel_no, + &internal_dev->cifx_channel))) + { + char prefix[CIFX_MAX_FILE_NAME_LENGTH]; + CIFX_PACKET tDummy; + uint32_t i = 0; + PCHANNELINSTANCE ptdevice = (PCHANNELINSTANCE)internal_dev->cifx_channel; + internal_dev->devinst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + + /* in case there are remaining packages try to empty mailbox */ + for(i=0;i<16;i++) { + if(CIFX_NO_ERROR != xChannelGetPacket(internal_dev->cifx_channel, sizeof(tDummy), &tDummy, 50)) + break; + } + + OS_Memcpy( &internal_dev->config, config, sizeof(internal_dev->config)); + strcpy( internal_dev->config.cifx_name, config->cifx_name); + strcpy( prefix, config->cifx_name); + for (i=0; icifx_name); i++) + prefix[i] = tolower(prefix[i]); + + internal_dev->eth_fd = -1; + if( (internal_dev->eth_fd = cifxeth_allocate_tap( internal_dev, prefix)) < 0) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error allocating tap device for '%s'. Error=%d", config->cifx_name, internal_dev->eth_fd); + } + } else + { + /* signal link down since TAP device is up by default */ + nl_signal_link_change( internal_dev, 0); + eth_no++; + strcpy( config->eth_dev_name, internal_dev->cifxeth_name); + + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_INFO, "Ethernet-IF Info: Successfully created '%s' at channel %d on device '%s'", internal_dev->cifxeth_name, channel_no, config->cifx_name); + } + /* de-register application since may not be de-registered */ + cifxeth_register_app( internal_dev, 0); + /* Register for ethernet service on device */ + if (CIFX_NO_ERROR == (cifxeth_register_app( internal_dev, 1))) + { + /* Create threads for packet exchange */ + if(cifxeth_create_cifx_thread( internal_dev) != 0) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error creating cifX ethernet channel thread for %s.", internal_dev->cifxeth_name); + } + } else + { + /* Set device MAC address from response packet */ + //cifxeth_update_device_config( internal_dev); + + /* Device successfully created */ + OS_EnterLock( g_eth_list_lock); + if ((internal_dev = OS_Memalloc( sizeof(internal_dev))) != NULL) + { + TAILQ_INSERT_TAIL( &s_DeviceList, internal_dev, lentry); + ret = internal_dev; + } + OS_LeaveLock( g_eth_list_lock); + if(NULL == ret) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Not enough memory to create cifx virtual ethernet interface!"); + } + } + } + } + } + } else + { + fprintf(stderr, "Ethernet-IF Error: %s: Error opening cifX Ethernet Channel (Board=%s, Channel=%u, Errror=0x%08X)\n", __TIME__, + config->cifx_name, internal_dev->channel_no, cifx_error); + } + if(NULL == ret) + { + cifxeth_delete_device( internal_dev); + } + } + channel_no++; + } +exit: + return ret; +} + +/*****************************************************************************/ +/*! This removes a previously with cifxeth_create_device() created netX based ethernet interface + * The function requires either a handle or config structure containing the name of the cifX device +* \param devicehandle pointer to handle returned by cifxeth_create_device() +* \param config pointer to configuration structure +* \return != NULL on success */ +/*****************************************************************************/ +void cifxeth_remove_device( void* devicehandle, NETX_ETH_DEV_CFG_T* config) +{ + NETX_ETH_DEV_T* internal_dev = (NETX_ETH_DEV_T*)devicehandle; + + if ((NULL == internal_dev) && (NULL == config)) + return; + + if ((NULL != internal_dev) || (NULL != (internal_dev = find_device( config->cifx_name)))) + { + cifxeth_delete_device( internal_dev); + } +} + +/*****************************************************************************/ +/*! This function empties mailbox +* \param internal_dev pointer to internal netx-ethernet device */ +/*****************************************************************************/ +void empty_mailbox( NETX_ETH_DEV_T* internal_dev) { + uint32_t ulRecvPktCount = 0; + uint32_t ulSendPktCount = 0; + int32_t lRet = 0; + + if ((internal_dev == NULL) || (internal_dev->cifx_channel == NULL)) + return; + + lRet = xChannelGetMBXState( internal_dev->cifx_channel, &ulRecvPktCount, &ulSendPktCount); + while((lRet == CIFX_NO_ERROR) && (ulRecvPktCount > 0)) { + CIFX_PACKET cifx_packet; + + lRet = xChannelGetPacket( internal_dev->cifx_channel, sizeof(cifx_packet), &cifx_packet, CIFX_TO_CONT_PACKET); + if (lRet == CIFX_NO_ERROR) + lRet = xChannelGetMBXState( internal_dev->cifx_channel, &ulRecvPktCount, &ulSendPktCount); + } +} + +/*****************************************************************************/ +/*! This function deletes netX based ethernet interface +* \param internal_dev pointer to internal netx-ethernet device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static void cifxeth_delete_device( NETX_ETH_DEV_T* internal_dev) +{ + if(NULL != internal_dev) + { + if (0 != internal_dev->eth_to_cifx_thread) { + internal_dev->stop_to_cifx = 1; + pthread_join( internal_dev->eth_to_cifx_thread, NULL); + } + + if (0 != internal_dev->cifx_to_eth_thread) { + internal_dev->stop_to_eth = 1; + pthread_join( internal_dev->cifx_to_eth_thread, NULL); + } + + if (internal_dev->cifx_channel != NULL) + cifxeth_register_app( internal_dev, 0); + + /* remove any pending packets */ + empty_mailbox( internal_dev); + + cifxeth_free_tap(internal_dev,internal_dev->cifxeth_name); + + if (NULL != internal_dev->link_event) + OS_DeleteEvent( internal_dev->link_event); + + if (NULL != internal_dev->com_lock) + OS_DeleteLock( internal_dev->com_lock); + + if (NULL != internal_dev->send_event) + OS_DeleteEvent( internal_dev->send_event); + + if(NULL != internal_dev->cifx_channel) + xChannelClose(internal_dev->cifx_channel); + + if(NULL != internal_dev->cifx_driver) + xDriverClose(internal_dev->cifx_driver); + + OS_EnterLock( g_eth_list_lock); + if (!TAILQ_EMPTY( &s_DeviceList)) { + TAILQ_REMOVE( &s_DeviceList, internal_dev, lentry); + OS_Memfree(internal_dev); + } + OS_LeaveLock( g_eth_list_lock); + } +} + +/*****************************************************************************/ +/*! removes all cifx tap devices reside in /sys/class/net */ +/*****************************************************************************/ +void cifxeth_sys_cleanup(void) { + struct dirent** namelist; + int num_virt_eth; + + num_virt_eth = scandir("/sys/class/net/", &namelist, 0, alphasort); + if(num_virt_eth > 0) + { + int currenteth; + for(currenteth = 0; currenteth < num_virt_eth; ++currenteth) + { + if (0 == strncmp("cifx",namelist[currenteth]->d_name,4)) { + cifxeth_free_tap(NULL,namelist[currenteth]->d_name); + } + free(namelist[currenteth]); + } + free(namelist); + } +} + +static int is_ethernet_channel(HIL_DPM_CHANNEL_INFO_BLOCK_T* ptChannel) { + int ret = 0; + + if (HIL_COMM_CLASS_MESSAGING == ptChannel->tCom.usCommunicationClass) { + if (HIL_PROT_CLASS_ETHERNET == ptChannel->tCom.usProtocolClass) { + /* old identification */ + ret = 1; + } else if( (HIL_PROT_CLASS_NETWORK_SERVICES == ptChannel->tCom.usProtocolClass) && + (ptChannel->tCom.usProtocolConformanceClass & HIL_CONF_CLASS_FLAG_NDIS_AWARE) ) { + /* new identification */ + ret = 1; + } + } + + return ret; +} + +/*****************************************************************************/ +/*! This function searches a cifx device for an existing Ethernet channel +* \param szDeviceName name of the cifX device +* \param ulSearchIdx Start index for channel information search +* \param ulSearchIdx pointer to channel providing ethernet interface +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t cifxeth_search_eth_channel( char* szDeviceName, + uint32_t ulSearchIdx, + uint32_t* pulChannelNumber) +{ + int32_t lRet = CIFX_NO_ERROR; + CIFXHANDLE hSysdevice = NULL; + CIFXHANDLE hDriver = NULL; + PCHANNELINSTANCE ptdevice = NULL; + PDEVICEINSTANCE ptDevInst = NULL; + + if (ulSearchIdx>=CIFX_MAX_NUMBER_OF_CHANNELS) + return CIFX_INVALID_PARAMETER; + + if (CIFX_NO_ERROR != xDriverOpen(&hDriver)) + { + fprintf( stderr, "Ethernet-IF Error: %s: Error opening driver to for ethernet interface (lRet=0x%08X)\n",__TIME__,lRet); + /* Check if we have a channel that might be used for Ethernet / NDIS */ + } else if(CIFX_NO_ERROR != (lRet = xSysdeviceOpen( hDriver, + szDeviceName, + &hSysdevice))) + { + fprintf( stderr, "Ethernet-IF Error: %s: Error opening system device to read channel info block to detect channels usable for ethernet interface (lRet=0x%08X). - %s\n",__TIME__,lRet, szDeviceName); + } else + { + /* Read channel information block */ + SYSTEM_CHANNEL_CHANNEL_INFO_BLOCK tChannelInfoBlock = {{{0}}}; + + ptdevice = (PCHANNELINSTANCE)hSysdevice; + ptDevInst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + + if(CIFX_NO_ERROR != (lRet = xSysdeviceInfo( hSysdevice, + CIFX_INFO_CMD_SYSTEM_CHANNEL_BLOCK, + sizeof(tChannelInfoBlock), + &tChannelInfoBlock))) + { + /* Error reading system info block */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInst, + TRACE_LEVEL_ERROR, + "Ethernet-IF Error: Error reading channel info block to detect channels usable for ethernet interface (lRet=0x%08X).", + lRet); + } + + } else + { + uint32_t ulStartIndex = 0; + int fComChannelFound = 0; + + if (ulSearchIdx>=ptDevInst->ulCommChannelCount) + return CIFX_INVALID_PARAMETER; + + for( ; ulStartIndex < CIFX_MAX_NUMBER_OF_CHANNELS; ++ulStartIndex) + { + HIL_DPM_CHANNEL_INFO_BLOCK_T* ptChannel = (HIL_DPM_CHANNEL_INFO_BLOCK_T*)&tChannelInfoBlock.abInfoBlock[ulStartIndex][0]; + + if( (HIL_CHANNEL_TYPE_COMMUNICATION == ptChannel->tHandshake.bChannelType)) + { + if (DEV_IsReady( ptDevInst->pptCommChannels[ulSearchIdx])) + { + fComChannelFound = 1; + lRet = CIFX_NO_ERROR; + break; + } else + { + lRet = CIFX_DEV_NOT_READY; + } + } + } + lRet = CIFX_INVALID_BOARD; + /* Check system info block entries */ + for( ; (fComChannelFound && ((ulSearchIdx + ulStartIndex) < CIFX_MAX_NUMBER_OF_CHANNELS)); ++ulSearchIdx) + { + HIL_DPM_CHANNEL_INFO_BLOCK_T* ptChannel = (HIL_DPM_CHANNEL_INFO_BLOCK_T*)&tChannelInfoBlock.abInfoBlock[ulSearchIdx + ulStartIndex][0]; + + if(is_ethernet_channel(ptChannel)) + { + /* only create a NDIS interface if the interface is not created already */ + if (NULL != pulChannelNumber) + *pulChannelNumber = ulSearchIdx; + + lRet = CIFX_NO_ERROR; + break; + } + } + } + /* Close system device */ + xSysdeviceClose(hSysdevice); + } + xDriverClose(hDriver); + + return lRet; +} + +/*****************************************************************************/ +/*! This function allocates and initializes a tap device +* \param internal_dev pointer to internal netx-ethernet device +* \param prefix prefix of the device (e.g. "cifX" -> cifX[x]) +* \param dev returns the name of created device (-> cifX[x]) +* \return a valid file descriptor to the device - on success (>=0) */ +/*****************************************************************************/ +static int cifxeth_allocate_tap( NETX_ETH_DEV_T* internal_dev, char* prefix) +{ + struct ifreq ifr; + int ret; + + if( (ret = open( TUNTAP_DEVICEPATH, O_RDWR)) >= 0 ) + { + int err; + + memset(&ifr, 0, sizeof(ifr)); + ifr.ifr_flags = (IFF_TAP | IFF_NO_PI); + + if(prefix) + strncpy( ifr.ifr_name, prefix, IFNAMSIZ); + + if( (err = ioctl(ret, TUNSETIFF, (void *) &ifr)) < 0 ) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error creating tap device (TUNSETIFF) '%s'. Error=%d", prefix, errno); + } + close(ret); + ret = err; + + } else + { + strcpy( internal_dev->cifxeth_name, prefix); + sprintf(internal_dev->event_path,"/sys/class/net/%s/uevent",prefix); + internal_dev->eth_fd = ret; /* set temp. since cifxeth_update_device_config() deals with that handle */ + cifxeth_update_device_config(internal_dev); + } + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error opening tun interface '%s'. Error=%d", TUNTAP_DEVICEPATH, errno); + } + ret = -errno; + } + return ret; +} + +/*****************************************************************************/ +/*! This function frees a tap device + * \param internal_dev pointer to internal netx-ethernet device + * \param name name of device in case device is already closed (->link down) */ +/*****************************************************************************/ +void cifxeth_free_tap(NETX_ETH_DEV_T* internal_dev, char* name) { + + if (NULL != internal_dev) { + if (internal_dev->eth_fd>=0) { + ioctl(internal_dev->eth_fd, TUNSETPERSIST, 0); + close(internal_dev->eth_fd); + internal_dev->eth_fd = -1; + } + } + /* we have also check the name, in case of link down the handle is '-1' */ + if (name != NULL) { + struct ifreq ifr; + int ret; + + if ((ret = open( TUNTAP_DEVICEPATH, O_RDWR))) { + memset(&ifr, 0, sizeof(ifr)); + ifr.ifr_flags = (IFF_TAP | IFF_NO_PI); + strncpy( ifr.ifr_name, name, IFNAMSIZ); + ioctl(ret, TUNSETIFF, (void *) &ifr); + ioctl(ret, TUNSETPERSIST, 0); + close(ret); + } + } +} + +/*****************************************************************************/ +/*! This function creates send/receivce thread + * \param internal_dev pointer to internal cifx eth channel + * \return >0 on success */ +/*****************************************************************************/ +static int cifxeth_create_cifx_thread(NETX_ETH_DEV_T* internal_dev) +{ + int ret = -1; + pthread_attr_t attr; + + internal_dev->stop_to_eth = 0; + if(0 == (ret = pthread_attr_init(&attr))) + { + ret = pthread_create(&internal_dev->cifx_to_eth_thread, + &attr, + cifx_to_eth_thread, + internal_dev); + } + return ret; +} + +/*****************************************************************************/ +/*! This function creates send/receivce thread +* \param internal_dev pointer to internal netx-ethernet device +* \return >0 on success */ +/*****************************************************************************/ +static int cifxeth_create_com_thread(NETX_ETH_DEV_T* internal_dev) +{ + int ret = -1; + pthread_attr_t attr; + + internal_dev->stop_to_cifx = 0; + if(0 == (ret = pthread_attr_init(&attr))) + { + ret = pthread_create(&internal_dev->eth_to_cifx_thread, + &attr, + eth_to_cifx_thread, + internal_dev); + } + + return ret; +} + +/*****************************************************************************/ +/*! Send thread: processes eth packets from tapX to cifX device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static void* eth_to_cifx_thread(void* arg) +{ + NETX_ETH_DEV_T* internal_dev = (NETX_ETH_DEV_T*)arg; + int fd = internal_dev->eth_fd; + char buffer[1514]; + DRVETH_GCI_SEND_ETH_FRAME_PCK_T cifx_packet; + int select_ret = 0; + + memset(&cifx_packet.tReq.tHead, 0, sizeof(cifx_packet.tReq.tHead)); + + cifx_packet.tReq.tHead.ulCmd = DRVETH_GCI_CMD_SEND_ETH_FRAME_REQ; + cifx_packet.tReq.tHead.ulDest = HIL_PACKET_DEST_DEFAULT_CHANNEL; + + while(1) + { + fd_set readfds, exceptfds; + struct timeval timeout = {0}; + timeout.tv_sec = 0; + timeout.tv_usec = 500 * 1000; /* Default wait timeout = 500ms */ + + FD_ZERO(&readfds); + FD_ZERO(&exceptfds); + FD_SET(fd, &readfds); + FD_SET(fd, &exceptfds); + + /* check link state */ + while (0 == internal_dev->link_up) + { + OS_WaitEvent( internal_dev->link_event, 10); + if (internal_dev->stop_to_cifx == 1) + break; + } + + if((select_ret = select( fd+1, &readfds, NULL, &exceptfds, &timeout)) > 0) + { + if(FD_ISSET(fd, &exceptfds)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Exception on Ethernet Device file descriptor, exiting thread"); + } + break; + } + + if(FD_ISSET(fd, &readfds)) + { + int32_t cifx_error; + ssize_t recv_len; + int retry = 0; + + recv_len = read(fd, buffer, sizeof(buffer)); + + while (internal_dev->active_sends>0x08) + { + OS_WaitEvent( internal_dev->send_event, 10); + if (internal_dev->stop_to_cifx == 1) + break; + } + if (internal_dev->stop_to_cifx == 1) + break; + + if(recv_len > 0) + { + memcpy( &cifx_packet.tReq.tData, buffer, recv_len); + cifx_packet.tReq.tHead.ulLen = recv_len; + if (recv_len<60) + { + memset( (cifx_packet.tReq.tData.abData + recv_len), 0, (60 - recv_len)); + cifx_packet.tReq.tHead.ulLen = 60; + } + retry = SEND_RETRIES; + do { + cifx_error = xChannelPutPacket( internal_dev->cifx_channel, (CIFX_PACKET*)&cifx_packet, CIFX_TO_CONT_PACKET); + if (cifx_error == CIFX_NO_ERROR) { + OS_EnterLock( internal_dev->com_lock); + internal_dev->active_sends++; + OS_LeaveLock( internal_dev->com_lock); + } + } while ((cifx_error == CIFX_DEV_MAILBOX_FULL) && (retry-->0)); + + if ((g_ulTraceLevel & TRACE_LEVEL_DEBUG) && ((SEND_RETRIES-retry) != SEND_RETRIES)) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_DEBUG, "Ethernet-IF Error: Sending a packet took %d-%dms)!", (SEND_RETRIES-retry+1)*CIFX_TO_CONT_PACKET, (SEND_RETRIES-retry)*CIFX_TO_CONT_PACKET); + } + if (CIFX_NO_ERROR != cifx_error) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error sending packet to cifX Device. (Error=0x%08X)", cifx_error); + } + } + } + } + } else if (0 == select_ret) + { + //continue; + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error on select/or stop requested for Ethernet Device file descriptor, exiting thread"); + } + break; + } + if (internal_dev->stop_to_cifx == 1) + break; + } + + return NULL; +} + +/*****************************************************************************/ +/*! send confirmation of the packet + * \param internal_dev Pointer to internal device + * \param ptPacket Pointer to packet to handle + * \param ulTimeout timeout + * \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t send_confirmation( NETX_ETH_DEV_T* internal_dev, CIFX_PACKET* ptPacket, uint32_t ulState, uint32_t ulTimeout) { + int32_t ret = CIFX_NO_ERROR; + + if (ptPacket == NULL) + return CIFX_NO_ERROR; + + if ((ptPacket->tHeader.ulCmd & CIFX_MSK_PACKET_ANSWER) == 0) { + uint8_t bRetry = 3; + + ptPacket->tHeader.ulCmd |= CIFX_MSK_PACKET_ANSWER; + ptPacket->tHeader.ulState = ulState; + ptPacket->tHeader.ulLen = 0; + + do { + ret = xChannelPutPacket(internal_dev->cifx_channel, ptPacket, ulTimeout); + } while((ret != CIFX_NO_ERROR) && (bRetry-- > 0)); + if ((ret != CIFX_NO_ERROR) && (g_ulTraceLevel & TRACE_LEVEL_ERROR)) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Failed to send confirmation - Error=0x%X (ulCmd=0x%X / ulState=0x%X)!\n", + ret, + ptPacket->tHeader.ulCmd, + ptPacket->tHeader.ulState); + } + } + return ret; +} + +/*****************************************************************************/ +/*! handles incoming packets + * \param internal_dev Pointer to internal device + * \param ptPacket Pointer to packet to handle + * \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +void handle_incoming_packet( NETX_ETH_DEV_T* internal_dev, CIFX_PACKET* ptPacket) { + uint32_t ulState = 0; + + switch(ptPacket->tHeader.ulCmd) { + case DRVETH_GCI_CMD_SEND_ETH_FRAME_CNF: + /* Send response */ + OS_EnterLock( internal_dev->com_lock); + internal_dev->active_sends--; + OS_SetEvent(internal_dev->send_event); + OS_LeaveLock( internal_dev->com_lock); + + if (ptPacket->tHeader.ulState != CIFX_NO_ERROR) { + if(g_ulTraceLevel & TRACE_LEVEL_WARNING) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_WARNING, "Ethernet-IF Error: Error signaled by confirmation packet (0x%X)\n", ptPacket->tHeader.ulState); + } + } + break; + + case DRVETH_GCI_CMD_RECV_ETH_FRAME_IND: + { + if (internal_dev->link_up) { + uint32_t data_len = ptPacket->tHeader.ulLen; + ssize_t send_res = data_len; + int ret = 0; + + /* New RX packet */ + if(send_res != (ret = write(internal_dev->eth_fd, ptPacket->abData, data_len))) { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error sending incoming data to ethernet device (%d)\n", ret); + } + } + } + } + break; + + case DRVETH_GCI_CMD_EVENT_IND: + { + /* ignore package since we poll the link state */ + } + break; + + default: + { + ulState = ERR_HIL_UNKNOWN_COMMAND; + if(g_ulTraceLevel & TRACE_LEVEL_INFO) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_INFO, "Ethernet-IF Error: Error receiving unknown packet cmd=0x%X\n", ptPacket->tHeader.ulCmd); + } + } + break; + } + send_confirmation( internal_dev, ptPacket, ulState, CIFX_TO_CONT_PACKET); +} + +/*****************************************************************************/ +/*! Receiver thread: processes eth packets from cifX to tapX device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static void* cifx_to_eth_thread(void* arg) +{ + NETX_ETH_DEV_T* internal_dev = (NETX_ETH_DEV_T*)arg; + CIFX_PACKET cifx_packet; + uint32_t ulRecvPktCount = 0; + uint32_t ulSendPktCount = 0; + time_t last_update = 0; + int32_t lRet; + + while(1) + { + if (internal_dev->stop_to_eth == 1) + break; + + ulRecvPktCount = 1; + while(ulRecvPktCount > 0) { + if (CIFX_NO_ERROR == (lRet = xChannelGetPacket( internal_dev->cifx_channel, sizeof(cifx_packet), &cifx_packet, CIFX_TO_CONT_PACKET))) { + handle_incoming_packet( internal_dev, &cifx_packet); + } + if (lRet == CIFX_DEV_GET_NO_PACKET) { + /* in some case the firmware may deliver wrong mailbox state. */ + /* In case of false state, break here to update link state or */ + /* to be able to interrupt/stop the running thread. */ + break; + } + if (CIFX_NO_ERROR != (lRet = xChannelGetMBXState( internal_dev->cifx_channel, &ulRecvPktCount, &ulSendPktCount))) { + break; + } + } + if (difftime( time(NULL), last_update) > LINK_STATE_POLL_INTERVAL) { + cifxeth_update_link_state( internal_dev); + last_update = time(NULL); + } + } + return NULL; +} + +/*! ************************************************************************** +* Function retrieves the device link state and updates the corresponding +* tap device +* \param internal_dev Pointer to internal device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifxeth_update_link_state( NETX_ETH_DEV_T* internal_dev) +{ + LINK_STATE_T tLinkState = {0}; + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = cifxeth_get_extended_info( internal_dev, EXT_INFO_LINKSTATE, &tLinkState, sizeof(tLinkState)))) + { + int fSkipUpdate = 0; + if ((internal_dev->link_up > 0) && (tLinkState.bLinkState)) { + /* device is already online */ + fSkipUpdate = 1; + } + if ((internal_dev->link_up <= 0) && (tLinkState.bLinkState == 0)) { + /* already offline... skip handling */ + fSkipUpdate = 1; + } + if (fSkipUpdate == 0) { + if (tLinkState.bLinkState) + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_DEBUG, "Link up on '%s'", internal_dev->cifxeth_name); + } + /* notify link state change */ + internal_dev->link_up = 1; + OS_SetEvent( internal_dev->link_event); + + if (cifxeth_create_com_thread( internal_dev) != 0) { + lRet = CIFX_FUNCTION_FAILED; + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error creating cifX Ethernet communication thread for %s.",internal_dev->cifxeth_name); + } + } else { + FILE *file = NULL; + + nl_signal_link_change( internal_dev, 1); + + /* notify link up via uevent */ + if (NULL != (file = fopen(internal_dev->event_path,"r+"))) { + fprintf(file, "online"); + fclose(file); + } else { + lRet = CIFX_FUNCTION_FAILED; + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error opening event path of cifX Ethernet IF %s (online event).",internal_dev->cifxeth_name); + } + } + } + } else + { + FILE *file = NULL; + internal_dev->link_up = 0; + + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_DEBUG, "Link down on '%s'", internal_dev->cifxeth_name); + } + + /* stop eth-if to cifx communication since we we will remove the handle */ + internal_dev->stop_to_cifx = 1; + + if (internal_dev->eth_to_cifx_thread != 0) { + pthread_join( internal_dev->eth_to_cifx_thread, 0); + internal_dev->eth_to_cifx_thread = 0; + } + + nl_signal_link_change( internal_dev, 0); + + /* notify link down via uevent */ + if (NULL != (file = fopen(internal_dev->event_path,"r+"))) { + fprintf(file, "offline"); + fclose(file); + } else { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Error opening event path of cifX Ethernet IF %s (offline event).",internal_dev->cifxeth_name); + } + lRet = CIFX_FUNCTION_FAILED; + } + } + } + } + return lRet; +} + +/*! ************************************************************************** +* Function retrieves the device configuration and initialize the corresponding +* tap device +* \param internal_dev Pointer to internal device +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifxeth_update_device_config( NETX_ETH_DEV_T* internal_dev) +{ + IFCONFIG_T tExtInfo = {0}; + int32_t lRet = CIFX_NO_ERROR; + + if (CIFX_NO_ERROR == (lRet = cifxeth_get_extended_info( internal_dev, EXT_INFO_INTF_CONFIG, &tExtInfo, sizeof(tExtInfo)))) + { + struct ifreq ifr; + memset( &ifr, 0, sizeof(ifr)); + + memcpy( ifr.ifr_hwaddr.sa_data, tExtInfo.abEthernetMACAddr, 6); + ifr.ifr_hwaddr.sa_family = 1; + + if( (ioctl( internal_dev->eth_fd, SIOCSIFHWADDR, (void *) &ifr)) < 0 ) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Failed to set MAC address %02x:%02x:%02x:%02x:%02x:%02x of %s (%d)", + tExtInfo.abEthernetMACAddr[0], tExtInfo.abEthernetMACAddr[1], tExtInfo.abEthernetMACAddr[2], + tExtInfo.abEthernetMACAddr[3], tExtInfo.abEthernetMACAddr[4], tExtInfo.abEthernetMACAddr[5], + internal_dev->cifxeth_name, errno); + } + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_DEBUG) + { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_DEBUG, "Ethernet-IF: Successfully set MAC address to %02x:%02x:%02x:%02x:%02x:%02x on %s", + tExtInfo.abEthernetMACAddr[0], tExtInfo.abEthernetMACAddr[1], tExtInfo.abEthernetMACAddr[2], + tExtInfo.abEthernetMACAddr[3], tExtInfo.abEthernetMACAddr[4], tExtInfo.abEthernetMACAddr[5], + internal_dev->cifxeth_name); + } + } + } + return lRet; +} + +/*! ************************************************************************* + * Receive callback function. requried to handle incoming packets during admin + * communication + * \param ptRecvPkt + * \param pvUser */ +/****************************************************************************/ +void PacketRecvCallBack( CIFX_PACKET* ptRecvPkt, void* pvUser) +{ + NETX_ETH_DEV_T* internal_dev = (NETX_ETH_DEV_T*)pvUser; + + handle_incoming_packet( internal_dev, ptRecvPkt); +} + +/*! ************************************************************************* +* Register an application, so the Ethernet Stack will send indications +* \param internal_dev Pointer to internal device +* \param fRegister 1= register, 0 = unregister application */ +/****************************************************************************/ +static int32_t cifxeth_register_app( NETX_ETH_DEV_T* internal_dev, int fRegister) +{ + uint32_t lRet = CIFX_NO_ERROR; + CIFXHANDLE hChannel = internal_dev->cifx_channel; + HIL_REGISTER_APP_REQ_T tSendPkt = {{0}}; + CIFX_PACKET tRecvPkt = {{0}}; + + tSendPkt.tHead.ulDest = HIL_PACKET_DEST_DEFAULT_CHANNEL; /* Destination of packet, process queue */ + tSendPkt.tHead.ulSrc = 0; /* Source of packet, process queue */ + tSendPkt.tHead.ulLen = 0; + tSendPkt.tHead.ulId = 0x00; /* Identification handle of sender */ + + if (fRegister) + { + tSendPkt.tHead.ulCmd = HIL_REGISTER_APP_REQ; /* Packet command */ + }else + { + tSendPkt.tHead.ulCmd = HIL_UNREGISTER_APP_REQ; /* Packet command */ + } + + lRet = DEV_TransferPacket( hChannel, + (CIFX_PACKET*)&tSendPkt, + &tRecvPkt, + sizeof(tRecvPkt), + CIFX_TO_SEND_PACKET, + PacketRecvCallBack, internal_dev); + if( CIFX_NO_ERROR != lRet) + { + /* This is a transport error */ + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + /* This is a transport error */ + USER_Trace(internal_dev->devinst, + TRACE_LEVEL_ERROR, + "Ethernet-IF Error: Error in cifXEthTransferPacket()(lRet=0x%08X).", + lRet); + } + } else + { + /* in case of de-register ignore return value since we might not be registered */ + if (fRegister) { + /* Check if we have a state error from the stack */ + if(SUCCESS_HIL_OK != (lRet = tRecvPkt.tHeader.ulState)) { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) { + USER_Trace(internal_dev->devinst, + TRACE_LEVEL_ERROR, + "Ethernet-IF Error: Error sending Register-Application-Request (lRet=0x%08X).", + lRet); + } + } + } + } + return lRet; +} + +/*! ************************************************************************** +* Function reads extended status block an returns requested information +* \param internal_dev Pointer to internal device +* \param ulInformationRequest Command which information is retrieved +* \param pvBuffer Pointer to information buffer +* \param ulBufLen Size of pvBuffer +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +static int32_t cifxeth_get_extended_info( NETX_ETH_DEV_T* internal_dev, uint32_t ulInformationRequest, void* pvBuffer, uint32_t ulBufLen) +{ + int32_t lRet = CIFX_NO_ERROR; + CIFXHANDLE hChannel = internal_dev->cifx_channel; + DRVETH_GCI_EXTENDED_STATE_T tExtStatusInfo; + + /* check parameter */ + if ((pvBuffer == NULL) || (ulBufLen == 0)) + return CIFX_INVALID_PARAMETER; + + lRet = xChannelExtendedStatusBlock( hChannel, CIFX_CMD_READ_DATA, 0, sizeof(tExtStatusInfo), &tExtStatusInfo); + if( CIFX_NO_ERROR == lRet) + { + /* check which information is requested */ + switch (ulInformationRequest) + { + /* return MAC address */ + case EXT_INFO_INTF_CONFIG: + { + if ( sizeof(IFCONFIG_T) != ulBufLen) { + lRet = CIFX_INVALID_BUFFERSIZE; + } else { + PIFCONFIG_T ptIPconfig = (PIFCONFIG_T)pvBuffer; + + OS_Memcpy( (void*)ptIPconfig->abEthernetMACAddr, (void*)tExtStatusInfo.abMacAddress, DRVETH_GCI_ETH_ADDR_SIZE); + + lRet = CIFX_NO_ERROR; + } + } + break; + + /* return Link State */ + case EXT_INFO_LINKSTATE: + { + if ( sizeof(LINK_STATE_T) != ulBufLen) { + lRet = CIFX_INVALID_BUFFERSIZE; + } else { + PLINK_STATE_T ptLinkState = (PLINK_STATE_T)pvBuffer; + + ptLinkState->bLinkState = tExtStatusInfo.bMautype; + + lRet = CIFX_NO_ERROR; + } + } + break; + + case EXT_STATISTICS: + { + if ( sizeof(STATISTIC_T) != ulBufLen) { + lRet = CIFX_INVALID_BUFFERSIZE; + } else { + STATISTIC_T* ptStatistic = (STATISTIC_T*)pvBuffer; + + ptStatistic->ullIfInPkts = tExtStatusInfo.ullIfInPkts; + ptStatistic->ullIfInDiscards = tExtStatusInfo.ullIfInDiscards; + ptStatistic->ullIfOutPkts = tExtStatusInfo.ullIfOutPkts; + ptStatistic->ullIfOutDiscards = tExtStatusInfo.ullIfOutDiscards; + ptStatistic->ullIfInBytes = tExtStatusInfo.ullIfInBytes; + ptStatistic->ullIfOutBytes = tExtStatusInfo.ullIfOutBytes; + + lRet = CIFX_NO_ERROR; + } + } + break; + + case EXT_INFO_MACADDR: + case EXT_INFO_IPADDR: + case EXT_INFO_NETMASK: + case EXT_INFO_GATEWAY: + case EXT_INFO_NO_RECVPKT: + case EXT_INFO_NO_RCVPKT_DROP: + case EXT_INFO_NO_SENDPKT: + case EXT_INFO_NO_SENDPKT_DROP: + default: + lRet = CIFX_INVALID_COMMAND; + break; + } + } + if (CIFX_NO_ERROR != lRet) { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) { + USER_Trace( internal_dev->devinst, TRACE_LEVEL_ERROR, "Ethernet-IF Error: Failed to retrieve extended info of %s (0x%X)", internal_dev->cifxeth_name, lRet); + } + } + return lRet; +} + +/*****************************************************************************/ +/*! Searchs for internal device structure of the device given by name +* \param name Name of the requested cifX device +* \return pointer to internal device (!= NULL on success) */ +/*****************************************************************************/ +static NETX_ETH_DEV_T* find_device(char* name) +{ + NETX_ETH_DEV_T* internal_dev = NULL; + + OS_EnterLock( g_eth_list_lock); + if (!TAILQ_EMPTY( &s_DeviceList)) + { + NETX_ETH_DEV_T* item; + TAILQ_FOREACH( item, &s_DeviceList, lentry) { + if (0 == strcmp( item->config.cifx_name, name)) + { + internal_dev = item; + break; + } + } + } + OS_LeaveLock( g_eth_list_lock); + + return internal_dev; +} + +/*****************************************************************************/ +/*! NOTE: xSysdeviceReset() is a cifx toolkit function. In case of an ethernet + * interface a function wrapper is required since xSysdeviceReset() will reset + * the whole device including the raw ethernet channel. So we need a wrap + * around to remove all previously registered ethernet interfaces. */ +/*****************************************************************************/ +extern int32_t APIENTRY xSysdeviceResetTK( CIFXHANDLE hSysdevice, uint32_t ulTimeout); +/*****************************************************************************/ +/*! Hard resets a complete device via system channel +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceReset( CIFXHANDLE hSysdevice, uint32_t ulTimeout) +{ + int32_t ret = CIFX_NO_ERROR; + PCHANNELINSTANCE ptdevice = (PCHANNELINSTANCE)hSysdevice; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + NETX_ETH_DEV_T* internal_dev = find_device( ptDevInst->szName); + NETX_ETH_DEV_CFG_T config = {{0}}; + int ethdevice = 0; + + if (NULL != internal_dev) + { + ethdevice = 1; + strcpy( config.cifx_name, internal_dev->config.cifx_name); + cifxeth_delete_device( internal_dev); + } + + if (CIFX_NO_ERROR == (ret = xSysdeviceResetTK( hSysdevice, ulTimeout))) + { + if (1 == ethdevice) + cifxeth_create_device( &config); + } + return ret; +} + +extern int32_t APIENTRY xSysdeviceResetExTK(CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode); +/*****************************************************************************/ +/*! Hard resets a complete device via system channel with reset parameter +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \param ulMode Reset mode with parameter +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceResetEx(CIFXHANDLE hSysdevice, uint32_t ulTimeout, uint32_t ulMode) +{ + int32_t ret = CIFX_NO_ERROR; + PCHANNELINSTANCE ptdevice = (PCHANNELINSTANCE)hSysdevice; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + NETX_ETH_DEV_T* internal_dev = find_device( ptDevInst->szName); + NETX_ETH_DEV_CFG_T config = {{0}}; + int ethdevice = 0; + + switch(ulMode) + { + case CIFX_RESETEX_SYSTEMSTART: + case CIFX_RESETEX_BOOTSTART: + case CIFX_RESETEX_UPDATESTART: + { + if (NULL != internal_dev) + { + ethdevice = 1; + strcpy( config.cifx_name, internal_dev->config.cifx_name); + cifxeth_delete_device( internal_dev); + } + if (CIFX_NO_ERROR == (ret = xSysdeviceResetExTK( hSysdevice, ulTimeout, ulMode))) + { + if ((1 == ethdevice) && (ulMode != CIFX_RESETEX_BOOTSTART)) + cifxeth_create_device( &config); + } + } + break; + default: + { + ret = CIFX_INVALID_PARAMETER; + } + break; + } + return ret; +} + +extern int32_t APIENTRY xSysdeviceBootstartTK(CIFXHANDLE hSysdevice, uint32_t ulTimeout); +/*****************************************************************************/ +/*! Boot start reset to via system channel +* \param hSysdevice Handle to system device +* \param ulTimeout Timeout to wait for card to finish reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xSysdeviceBootstart(CIFXHANDLE hSysdevice, uint32_t ulTimeout) +{ + int32_t ret = CIFX_NO_ERROR; + PCHANNELINSTANCE ptdevice = (PCHANNELINSTANCE)hSysdevice; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + NETX_ETH_DEV_T* internal_dev = find_device( ptDevInst->szName); + NETX_ETH_DEV_CFG_T config = {{0}}; + + if (NULL != internal_dev) + { + strcpy( config.cifx_name, internal_dev->config.cifx_name); + cifxeth_delete_device( internal_dev); + } + return xSysdeviceBootstartTK( hSysdevice, ulTimeout); +} + +/*****************************************************************************/ +/*! NOTE: xChannelReset() is a cifx toolkit function. In case of an ethernet + * interface a function wrapper is required since xChannelReset() (with mode set + * to CIFX_SYSTEMSTART) will reset the whole device including the raw ethernet + * channel. So we need a wrap around to remove all previously registered ethernet + * interfaces. */ +/*****************************************************************************/ +extern int32_t APIENTRY xChannelResetTK( CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout); +/*****************************************************************************/ +/*! Hard resets a complete device via system channel +* \param hChannel Handle to system device +* \param ulResetMode Reset Mode +* \param ulTimeout Timeout to wait for card to finish reset +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t APIENTRY xChannelReset(CIFXHANDLE hChannel, uint32_t ulResetMode, uint32_t ulTimeout) +{ + int32_t ret = CIFX_NO_ERROR; + PCHANNELINSTANCE ptdevice = (PCHANNELINSTANCE)hChannel; + PDEVICEINSTANCE ptDevInst = (PDEVICEINSTANCE)ptdevice->pvDeviceInstance; + NETX_ETH_DEV_T* internal_dev = find_device( ptDevInst->szName); + NETX_ETH_DEV_CFG_T config = {{0}}; + int ethdevice = 0; + + switch(ulResetMode) + { + case CIFX_SYSTEMSTART: + { + if (NULL != internal_dev) + { + ethdevice = 1; + strcpy( config.cifx_name, internal_dev->config.cifx_name); + cifxeth_delete_device( internal_dev); + } + + if (CIFX_NO_ERROR == (ret = xChannelResetTK( hChannel, ulResetMode, ulTimeout))) + { + if (1 == ethdevice) + cifxeth_create_device( &config); + } + } + break; + default: + { + ret = xChannelResetTK( hChannel, ulResetMode, ulTimeout); + } + break; + } + return ret; +} + +#endif //CIFXETHERNET diff --git a/libcifx/netx_tap/netx_tap.h b/libcifx/netx_tap/netx_tap.h new file mode 100644 index 0000000..6111eb6 --- /dev/null +++ b/libcifx/netx_tap/netx_tap.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: MIT */ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Header file of the netX virtual network interface. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#ifndef __NETX_TAP__H +#define __NETX_TAP__H + +#ifdef CIFXETHERNET + +#include +#include +#include +#include + +#include + +#define DEFAULT_POLL_TIMEOUT 10 /* polling interval of receiver thread in ms */ + +/* symbols used when requesting information of the extended status block (->cifXEthGetExentedStatusInformation()) */ +#define EXT_INFO_INTF_CONFIG 1 /* request for interface configuration (returns EXT_INFO_MACADDR, EXT_INFO_IPADDR, EXT_INFO_NETMASK, EXT_INFO_GATEWAY) */ +#define EXT_INFO_LINKSTATE 2 +#define EXT_INFO_MACADDR 3 +#define EXT_INFO_IPADDR 4 +#define EXT_INFO_NETMASK 5 +#define EXT_INFO_GATEWAY 6 +#define EXT_INFO_NO_RECVPKT 7 +#define EXT_INFO_NO_RCVPKT_DROP 8 +#define EXT_INFO_NO_SENDPKT 9 +#define EXT_INFO_NO_SENDPKT_DROP 10 +#define EXT_STATISTICS 11 + +typedef struct NETX_ETH_DEV_CFG_Ttag +{ + char cifx_name[16]; + char eth_dev_name[IFNAMSIZ]; + +} NETX_ETH_DEV_CFG_T; + +#pragma pack(1) +typedef struct IFCONFIG_Ttag /* configuration of the hardware, indicated by the ETH_INTF_RECV_IP_CONFIG_IND packet */ +{ + uint8_t abEthernetMACAddr[6]; + +} IFCONFIG_T, *PIFCONFIG_T; +#pragma pack() + +typedef struct STATISTIC_Ttag /* ethernet statistic information structure (located in the extended information field) */ +{ + uint64_t ullIfInPkts; /* the number of packets received */ + uint64_t ullIfInDiscards; /* The number of received packets not passed to the host because of packet queue overflow */ + uint64_t ullIfOutPkts; /* The number of sent ethernet frames */ + uint64_t ullIfOutDiscards; /* The number of ethernet frames dropped because of no ethernet frame buffer available */ + uint64_t ullIfInBytes; /* the number of bytes received */ + uint64_t ullIfOutBytes; /* the number of bytes transmitted */ + +} STATISTIC_T, *PSTATISTIC_T; + +typedef struct LINK_STATE_Ttag +{ + uint8_t bLinkState; +} LINK_STATE_T, *PLINK_STATE_T; + +void* cifxeth_create_device( NETX_ETH_DEV_CFG_T* config); +void cifxeth_remove_device( void* handle, NETX_ETH_DEV_CFG_T* config); +void cifxeth_sys_cleanup(void); + +#endif //CIFXETHERNET + +#endif /* __NETX_TAP__H */ diff --git a/libcifx/os_linux.c b/libcifx/os_linux.c new file mode 100644 index 0000000..2985a4f --- /dev/null +++ b/libcifx/os_linux.c @@ -0,0 +1,1134 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Linux specific abstraction of the toolkit. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include +#include +#include +#include +#include +#include /* for PTHREAD_STACK_MIN */ +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef CIFX_TOOLKIT_DISABLEPCI + #include +#endif + +#include "cifXErrors.h" +#include "OS_Dependent.h" + +#include "cifxlinux.h" +#include "cifxlinux_internal.h" +#include "cifXEndianess.h" + +#define IRQ_CFG_REG_OFFSET 0xfff0 +#define IRQ_ENABLE_MASK 0x80000000 + +#define IRQ_STACK_MIN_SIZE 0x1000 /* Stack size needed by IRQ Thread + calling Toolkit's ISR/DSR Handler*/ + +#define BLOCK64 sizeof(uint64_t) +#define BLOCK32 sizeof(uint32_t) + +/*****************************************************************************/ +/*! O/S Specific initialization (initializes libpciaccess) +* \return CIFX_NO_ERROR on success */ +/*****************************************************************************/ +int32_t OS_Init(void) +{ + int32_t ret = CIFX_NO_ERROR; + int err = 0; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + +#ifndef CIFX_TOOLKIT_DISABLEPCI + if(0 != (err = pci_system_init())) + { + fprintf( stderr, "Error initializing PCI access subsystem (pci_system_init=%d)", err); + ret = CIFX_FUNCTION_FAILED; + } +#endif + + return ret; +} + +/*****************************************************************************/ +/*! O/S Specific de-initialization (de-initializes libpciaccess) */ +/*****************************************************************************/ +void OS_Deinit(void) +{ +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + +#ifndef CIFX_TOOLKIT_DISABLEPCI + pci_system_cleanup(); +#endif +} + +/*****************************************************************************/ +/*! Memory allocation wrapper (standard malloc) +* \param ulSize Size of block to allocate +* \return NULL on failure */ +/*****************************************************************************/ +void* OS_Memalloc(uint32_t ulSize) { + void *mem_ptr; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + mem_ptr = malloc(ulSize); + + if( mem_ptr == NULL ) + perror("Memalloc failed"); + + return mem_ptr; +} + +/*****************************************************************************/ +/*! Memory de-allocation wrapper (standard free) +* \param pvMem Block to free */ +/*****************************************************************************/ +void OS_Memfree(void* pvMem) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + free(pvMem); +} + +/*****************************************************************************/ +/*! Memory resize wrapper (standard realloc) +* \param pvMem Block to resize +* \param ulNewSize New size of the block +* \return NULL on error */ +/*****************************************************************************/ +void* OS_Memrealloc(void* pvMem, uint32_t ulNewSize) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + pvMem = realloc(pvMem, ulNewSize); + + if( (pvMem == NULL) && (ulNewSize != 0) ) + perror("Memrealloc failed"); + + return pvMem; +} + +/*****************************************************************************/ +/*! Memset wrapper +* \param pvMem Memory to set +* \param bFill Fill byte +* \param ulSize Size of the fill block */ +/*****************************************************************************/ +void OS_Memset(void* pvMem, unsigned char bFill, uint32_t ulSize) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + memset(pvMem, bFill, ulSize); +} + +/*****************************************************************************/ +/*! Memcopy wrapper +* \param pvDest Destination pointer +* \param pvSrc Source pointer +* \param ulSize Size to copy */ +/*****************************************************************************/ +void OS_Memcpy(void* pvDest, void* pvSrc, uint32_t ulSize) { + uint32_t ulDestAlignment = (uint32_t)(unsigned long)pvDest & 0x03; + uint32_t ulSrcAlignment = (uint32_t)(unsigned long)pvSrc & 0x03; +#ifdef VERBOSE_1 + /* printf("%s() called\n", __FUNCTION__); */ +#endif + uint8_t *pDest8 = (uint8_t*)pvDest; + uint8_t *pSrc8 = (uint8_t*)pvSrc; + if ( (ulDestAlignment == 0) && + (ulSrcAlignment == 0) ) + { + uint32_t *pDest32 = (uint32_t*)pvDest; + uint32_t *pSrc32 = (uint32_t*)pvSrc; + + while(ulSize>=BLOCK64) { + *(pDest32)++ = *(pSrc32)++; + *(pDest32)++ = *(pSrc32)++; + ulSize-=BLOCK64; + } + while(ulSize>=BLOCK32) { + *(pDest32)++ = *(pSrc32)++; + ulSize-=BLOCK32; + } + pDest8 = (uint8_t*)pDest32; + pSrc8 = (uint8_t*)pSrc32; + } + while(ulSize--) + *(pDest8++) = *(pSrc8++); +} + +/*****************************************************************************/ +/*! Memcompare wrapper +* \param pvBuf1 First compare buffer +* \param pvBuf2 Second compare buffer +* \param ulSize Size to compare +* \return 0 if blocks are equal */ +/*****************************************************************************/ +int OS_Memcmp(void* pvBuf1, void* pvBuf2, uint32_t ulSize) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return memcmp(pvBuf1, pvBuf2, ulSize); +} + +/*****************************************************************************/ +/*! Memmove wrapper (Overlapping memory copy) +* \param pvDest Destination buffer +* \param pvSrc Source buffer +* \param ulSize Size to move */ +/*****************************************************************************/ +void OS_Memmove(void* pvDest, void* pvSrc, uint32_t ulSize) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + pvDest = memmove(pvDest, pvSrc, ulSize); +} + +/*****************************************************************************/ +/*! Read PCI configuration area of specified card +* \param pvOSDependent OS Dependent parameter to identify card +* \return Pointer to configuration data (passed to WritePCIConfig) */ +/*****************************************************************************/ +void* OS_ReadPCIConfig(void* pvOSDependent) { +#ifndef CIFX_TOOLKIT_DISABLEPCI + PCIFX_DEVICE_INTERNAL_T info = (PCIFX_DEVICE_INTERNAL_T)pvOSDependent; + + int pci_ret; + void *pci_buf; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + if(!pvOSDependent) + return NULL; + + pci_buf = malloc(256); + if(!pci_buf) + { + perror("pci_buf malloc failed"); + return NULL; + } + + if ((pci_ret = pci_device_cfg_read(&info->pci, pci_buf, 0, 256, NULL)) ) + { +#ifdef VERBOSE + printf("libnetx: pci_read_block() returns %d\n", pci_ret); +#endif + free( pci_buf); + pci_buf = NULL; + } + return pci_buf; +#else + return NULL; +#endif /* CIFX_TOOLKIT_DISABLEPCI */ +} + +/*****************************************************************************/ +/*! Restore PCI configuration +* \param pvOSDependent OS Dependent parameter to identify card +* \param pvPCIConfig Pointer returned from ReadPCIConfig */ +/*****************************************************************************/ +void OS_WritePCIConfig(void* pvOSDependent, void* pvPCIConfig) { + +#ifndef CIFX_TOOLKIT_DISABLEPCI + int pci_ret; + PCIFX_DEVICE_INTERNAL_T info = (PCIFX_DEVICE_INTERNAL_T)pvOSDependent; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if ((pci_ret = pci_device_cfg_write(&info->pci, pvPCIConfig, 0, 256, NULL)) ) + { +#ifdef VERBOSE + printf("libnetx: pci_write_block() returns %d\n", pci_ret); +#endif + } + free(pvPCIConfig); +#endif +} + +/*****************************************************************************/ +/*! Checks if irq occurred for an uio device +* \param info Pointer to internal device structure +* \param timeout timeout in ms to wait +* \return 1 if irq occurred / 0 if not / < 0 in case of an error */ +/*****************************************************************************/ +int check_uio_irq( PCIFX_DEVICE_INTERNAL_T info, int32_t timeout) { + int ret = 0; + int nfds = info->userdevice->uio_fd + 1; + struct timeval sel_timeout; + fd_set readfd; + + FD_ZERO(&readfd); + FD_SET(info->userdevice->uio_fd, &readfd); + + sel_timeout.tv_sec = 0; + sel_timeout.tv_usec = timeout * 1000; /* Default wait timeout = 500ms */ + + if ( ((ret = select(nfds, &readfd, NULL, NULL, &sel_timeout))>0) && FD_ISSET( info->userdevice->uio_fd, &readfd)) { + uint32_t buf; + if ((ret = read( info->userdevice->uio_fd, &buf, sizeof(buf)))>0) + return 1; + } + return ret; +} + +/*****************************************************************************/ +/*! Checks if irq occurred for a gpio +* \param info Pointer to internal device structure +* \param timeout timeout in ms to wait +* \return 1 if irq occurred / 0 if not / < 0 in case of an error */ +/*****************************************************************************/ +int check_gpio_irq( PCIFX_DEVICE_INTERNAL_T info, uint32_t timeout) { + int ret = 0; + uint8_t bVal = 0; + int nfds = info->userdevice->uio_fd + 1; + struct timeval sel_timeout; + fd_set exceptfd; + + FD_ZERO(&exceptfd); + FD_SET(info->userdevice->uio_fd, &exceptfd); + + sel_timeout.tv_sec = 0; + sel_timeout.tv_usec = timeout * 1000; /* Default wait timeout = 500ms */ + + /* set to beginning to be able to read first, see NOTE */ + lseek( info->userdevice->uio_fd, 0, SEEK_SET); + /* NOTE: Since netx does level sensitive irqs and linux gpio only recongnize edge */ + /* we always need to check current level to make sure not to miss an irq. */ + if ( !( ((ret = read( info->userdevice->uio_fd, &bVal, sizeof(bVal))) > 0) && (bVal == '1') ) ) { + /* wait for irq */ + ret = select(nfds, NULL, NULL, &exceptfd, &sel_timeout); + } + return ret; +} + +/*****************************************************************************/ +/*! Interrupt Service Thread +* \param ptr Pointer to internal device structure +* \return NULL */ +/*****************************************************************************/ +static void *netx_irq_thread(void *ptr) { + PCIFX_DEVICE_INTERNAL_T info = (PCIFX_DEVICE_INTERNAL_T)ptr; + int ret = 0; + int uio_irq = 1; + uint32_t timeout = 500; + + if(!info) + return (void *) -1; + + /* check if it's an uio device or a custom */ + if ((info->userdevice != NULL) && (info->userdevice->uio_num < 0)) + uio_irq = 0; + + while( info->irq_stop == 0 ) + { + if (uio_irq) { + ret = check_uio_irq( info, timeout); + } else { + ret = check_gpio_irq( info, timeout); + } + if (ret == 1) { + uint32_t ulVal = 0; +#ifdef VERBOSE_1 + printf("IRQ @status_thread\n"); +#endif + ret = cifXTKitISRHandler(info->devinstance, 1); + + switch(ret) + { + case CIFX_TKIT_IRQ_DSR_REQUESTED: + cifXTKitDSRHandler(info->devinstance); + break; + + case CIFX_TKIT_IRQ_HANDLED: + /* Everything was done by ISR, no need to call DSR */ + break; + + case CIFX_TKIT_IRQ_OTHERDEVICE: + default: + /* This should never happen, as the uio driver already filters our IRQs */ + break; + } + if (uio_irq) { + if(info->devinstance->ulDPMSize >= NETX_DPM_MEMORY_SIZE) { + /* if it's open for writing enable irq again (currently function not implemented in uio_netx) */ + //write(info->userdevice->uio_fd, &bVal, 1); + HWIF_READN(info->devinstance, &ulVal, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, sizeof(ulVal)); + ulVal |= HOST_TO_LE32(IRQ_ENABLE_MASK); + HWIF_WRITEN(info->devinstance, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, (void*)&ulVal, sizeof(ulVal)); + } + } + } + } + return NULL; +} + +/*****************************************************************************/ +/*! Enable interrupts on the given device +* \param pvOSDependent Pointer to internal device structure */ +/*****************************************************************************/ +void OS_EnableInterrupts(void* pvOSDependent) { + PCIFX_DEVICE_INTERNAL_T info = (PCIFX_DEVICE_INTERNAL_T)pvOSDependent; + int ret = 0; + uint32_t ulVal; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + pthread_attr_init(&info->irq_thread_attr); + pthread_attr_setstacksize(&info->irq_thread_attr, PTHREAD_STACK_MIN + IRQ_STACK_MIN_SIZE); + + if(info->set_irq_scheduler_algo) + { + pthread_attr_setinheritsched( &info->irq_thread_attr, PTHREAD_EXPLICIT_SCHED); + if( (ret = pthread_attr_setschedpolicy(&info->irq_thread_attr, info->irq_scheduler_algo)) != 0) + { + fprintf( stderr, "Error setting custom thread scheduling algorithm for IRQ thread (pthread_attr_setschedpolicy=%d)", ret); + } + } + + if(info->set_irq_prio) + { + struct sched_param sched_param = {0}; + sched_param.sched_priority = info->irq_prio; + + pthread_attr_setinheritsched( &info->irq_thread_attr, PTHREAD_EXPLICIT_SCHED); + if( (ret = pthread_attr_setschedparam(&info->irq_thread_attr, &sched_param)) != 0) + { + fprintf( stderr, "Error setting custom thread priority in IRQ thread (pthread_attr_setschedparam=%d)", ret); + } + } + + if( (ret = pthread_create( &info->irq_thread, &info->irq_thread_attr, netx_irq_thread, + (void*)info )) != 0 ) + { + fprintf( stderr, "Enabling Interrupts (pthread_create=%d)", ret); + } else + { + info->irq_stop = 0; + if(info->devinstance->ulDPMSize >= NETX_DPM_MEMORY_SIZE) { + HWIF_READN(info->devinstance, &ulVal, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, sizeof(ulVal)); + ulVal |= HOST_TO_LE32(IRQ_ENABLE_MASK); + HWIF_WRITEN(info->devinstance, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, (void*)&ulVal, sizeof(ulVal)); + } + } +} + +/*****************************************************************************/ +/*! Disable interrupts on the given device +* \param pvOSDependent Pointer to internal device structure */ +/*****************************************************************************/ +void OS_DisableInterrupts(void* pvOSDependent) { + PCIFX_DEVICE_INTERNAL_T info = (PCIFX_DEVICE_INTERNAL_T)pvOSDependent; + uint32_t ulVal; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + info->irq_stop = 1; + pthread_join(info->irq_thread, NULL); + + if(info->devinstance->ulDPMSize >= NETX_DPM_MEMORY_SIZE) { + HWIF_READN(info->devinstance, &ulVal, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, sizeof(ulVal)); + ulVal &= HOST_TO_LE32(~IRQ_ENABLE_MASK); + HWIF_WRITEN(info->devinstance, info->devinstance->pbDPM+IRQ_CFG_REG_OFFSET, (void*)&ulVal, sizeof(ulVal)); + } + + pthread_attr_destroy(&info->irq_thread_attr); +} + +/*****************************************************************************/ +/*! Open file for reading +* \param szFilename File to open (including path) +* \param pulFileSize Returned size of the file in bytes +* \return Handle to the file, NULL on failure */ +/*****************************************************************************/ +void* OS_FileOpen(char* szFilename, uint32_t * pulFileSize) { + int fd; + struct stat buf; +#ifdef VERBOSE_1 + printf("%s(%s) called\n", __FUNCTION__, szFilename); +#endif + fd = open(szFilename, O_RDONLY); + if( fd == -1 ) + { + return NULL; + } + + if( fstat(fd, &buf) != 0 ) + { + perror("fstat failed"); + return NULL; + } + + *pulFileSize = buf.st_size; +#ifdef VERBOSE + printf("opened: %s (%u bytes)\n", szFilename, *pulFileSize); +#endif + + return fdopen(fd, "r"); +} + +/*****************************************************************************/ +/*! Read data from file +* \param pvFile Handle to the file (acquired by OS_FileOpen) +* \param ulOffset Offset to read from +* \param ulSize Size to read +* \param pvBuffer Buffer to read data into +* \return number of bytes read */ +/*****************************************************************************/ +uint32_t OS_FileRead(void* pvFile, uint32_t ulOffset, + uint32_t ulSize, void* pvBuffer) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return fread(pvBuffer, 1, ulSize, pvFile); +} + +/*****************************************************************************/ +/*! Close open file +* \param pvFile Handle to the file (acquired by OS_FileOpen) */ +/*****************************************************************************/ +void OS_FileClose(void* pvFile) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + if( fclose(pvFile) != 0 ) + perror("FileClose failed"); +} + +/*****************************************************************************/ +/*! Get Millisecond counter value (used for timeout handling) +* \return Counter value with a resolution of 1ms */ +/*****************************************************************************/ +uint32_t OS_GetMilliSecCounter(void) { + struct timespec ts_get_milli; + unsigned int msec_count; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + if( clock_gettime( CLOCK_MONOTONIC, &ts_get_milli ) != 0 ) + { + perror("gettime failed"); + return 0; + } + msec_count = ts_get_milli.tv_sec * 1000; + msec_count += ts_get_milli.tv_nsec / 1000 / 1000; + + return msec_count; +} + +/*****************************************************************************/ +/*! Sleep for the given time +* \param ulSleepTimeMs Time in ms to sleep (0 will sleep for 50us) */ +/*****************************************************************************/ +void OS_Sleep(uint32_t ulSleepTimeMs) { + struct timespec sleeptime; + struct timespec RemainingTime; + struct timespec *pRemainingTime = &RemainingTime; + int iRet; + int iTmpErrno; + + if(ulSleepTimeMs == 0) + { +#ifdef NO_MIN_SLEEP + /* do not sleep and return immediately */ + return; +#else + sleeptime.tv_sec = 0; + sleeptime.tv_nsec = 50000; // 50 usecs +#endif + } else + { + sleeptime.tv_sec = ulSleepTimeMs / 1000; + ulSleepTimeMs -= sleeptime.tv_sec * 1000; + sleeptime.tv_nsec = ulSleepTimeMs * 1000 * 1000; + } + + iTmpErrno = errno; + errno = 0; + while((iRet = nanosleep(&sleeptime, pRemainingTime))) + { + if ((errno == EINTR) && (pRemainingTime != NULL) ) + { + sleeptime.tv_sec = RemainingTime.tv_sec; + sleeptime.tv_nsec = RemainingTime.tv_nsec; + } else + { + perror("OS_Sleep failed"); + } + } + errno = iTmpErrno; +} + +/*****************************************************************************/ +/*! Create mutex +* \return Handle to new created mutex */ +/*****************************************************************************/ +void* OS_CreateMutex(void) { + pthread_mutex_t *mut = malloc(sizeof(pthread_mutex_t)); + pthread_mutexattr_t attr; + int iRet; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( mut == NULL ) + { + perror("allocating memory for mutex failed"); + return NULL; + } + if( (iRet = pthread_mutexattr_init(&attr)) != 0 ) + { + fprintf( stderr, "Mutex init attr: %s\n", strerror(iRet)); + goto err_out; + } + if( (iRet = pthread_mutex_init(mut, &attr)) != 0 ) + { + fprintf( stderr, "Mutex init: %s\n", strerror(iRet)); + goto err_out; + } + return (void*) mut; + +err_out: + free(mut); + return NULL; +} + +/*****************************************************************************/ +/*! Add timeout (given in ms) to timespec struct. On success the new value is + * returned in time_val. +* \param time_val (in/out) time on which msec should be added +* \param msec time to add (ms) +* \return 0 on success */ +/*****************************************************************************/ +int add_msec_to_timespec( struct timespec* time_val, uint32_t msec) +{ + if (time_val == NULL) + return -1; + + time_val->tv_sec += msec / 1000; /* integer part in seconds */ + msec = (msec % 1000) * 1000 * 1000; /* reminder in nano seconds */ + + time_val->tv_nsec += msec; /* add nano seconds */ + if (time_val->tv_nsec >= 1000000000) + { + time_val->tv_sec++; + time_val->tv_nsec = time_val->tv_nsec - 1000000000; + } + return 0; +} + +/*****************************************************************************/ +/*! Try to acquire mutex with timeout +* \param pvMutex Handle to mutex +* \param ulTimeout Timeout in ms to wait for mutex +* \return !=0 if mutex was acquired */ +/*****************************************************************************/ +int OS_WaitMutex(void* pvMutex, uint32_t ulTimeout) { + struct timespec lock_ts; + pthread_mutex_t *mut = (pthread_mutex_t*) pvMutex; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + clock_gettime( CLOCK_REALTIME, &lock_ts ); + + if (add_msec_to_timespec( &lock_ts, ulTimeout)) + { + fprintf( stderr, "OS_WaitMutex(): Faild to calculate time to block\n"); + return 0; + } else + { + if( (iRet = pthread_mutex_timedlock(mut, &lock_ts)) != 0 ) + { + if (iRet != ETIMEDOUT) + fprintf( stderr, "Mutex wait: %s\n", strerror(iRet)); + + return 0; + } + } + return 1; +} + +/*****************************************************************************/ +/*! Release previously acquired mutex +* \param pvMutex Handle to mutex */ +/*****************************************************************************/ +void OS_ReleaseMutex(void* pvMutex) { + pthread_mutex_t *mut = (pthread_mutex_t*) pvMutex; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_mutex_unlock(mut)) != 0 ) + { + fprintf( stderr, "Mutex unlock: %s\n", strerror(iRet)); + } +} + +/*****************************************************************************/ +/*! Delete mutex +* \param pvMutex Handle to mutex */ +/*****************************************************************************/ +void OS_DeleteMutex(void* pvMutex) { + pthread_mutex_t *mut = (pthread_mutex_t*) pvMutex; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_mutex_destroy(mut)) != 0 ) + fprintf( stderr, "Delete mutex: %s\n", strerror(iRet)); + + free(mut); +} + +/*****************************************************************************/ +/*! Create Lock (Usually same as mutex, but does not support timed waiting) +* \return Handle to created lock */ +/*****************************************************************************/ +void* OS_CreateLock(void) { + pthread_mutexattr_t mta; + pthread_mutex_t *mutex; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + pthread_mutexattr_init(&mta); + if( (iRet = pthread_mutexattr_settype(&mta, PTHREAD_MUTEX_RECURSIVE)) != 0 ) + { + fprintf( stderr, "Mutex set attr: %s\n", strerror(iRet)); + return NULL; + } + mutex = malloc( sizeof(pthread_mutex_t) ); + if( mutex == NULL ) + { + perror("allocating memory for mutex"); + return NULL; + } + if( (iRet = pthread_mutex_init(mutex, &mta)) != 0 ) + { + fprintf( stderr, "Mutex init: %s\n", strerror(iRet)); + goto err_out; + } + return mutex; + +err_out: + free(mutex); + return NULL; +} + +/*****************************************************************************/ +/*! Acquire a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +void OS_EnterLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_mutex_lock(mutex)) != 0) + { + fprintf( stderr, "EnterLock failed: %s\n", strerror(iRet)); + } +} + +/*****************************************************************************/ +/*! Release a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +void OS_LeaveLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_mutex_unlock(mutex)) != 0) + { + fprintf( stderr, "Mutex unlock: %s\n", strerror(iRet)); + } +} + +/*****************************************************************************/ +/*! Delete a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +void OS_DeleteLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_mutex_destroy(mutex)) != 0 ) + fprintf( stderr, "Delete lock: %s\n", strerror(iRet)); + + free(mutex); +} + +/*****************************************************************************/ +/*! Compare strings +* \param pszBuf1 String buffer 1 +* \param pszBuf2 String buffer 2 +* \return 0 if strings are equal */ +/*****************************************************************************/ +int OS_Strcmp(const char* pszBuf1, const char* pszBuf2) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return strcmp(pszBuf1, pszBuf2); +} + +/*****************************************************************************/ +/*! Compare strings case insensitive +* \param pszBuf1 String buffer 1 +* \param pszBuf2 String buffer 2 +* \param ulLen Maximum length to compare +* \return 0 if strings are equal */ +/*****************************************************************************/ +int OS_Strnicmp(const char* pszBuf1, const char* pszBuf2, uint32_t ulLen) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return strncasecmp(pszBuf1, pszBuf2, ulLen); +} + +/*****************************************************************************/ +/*! Get length of string +* \param szText Text buffer +* \return Length of given string */ +/*****************************************************************************/ +int OS_Strlen(const char* szText) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return strlen(szText); +} + +/*****************************************************************************/ +/*! Copy string to destination buffer +* \param szText Destination string +* \param szSource Source string +* \param ulLen Maximum length to copy +* \return Pointer to szDest */ +/*****************************************************************************/ +char* OS_Strncpy(char* szDest, const char* szSource, uint32_t ulLen) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return strncpy(szDest, szSource, ulLen); +} + +/*****************************************************************************/ +/*! Map driver pointer to user space +* \param pvDriverMem Pointer to driver memory +* \param ulMemSize Size of the memory to map +* \param ppvMappedMem Returned mapped pointer +* \param os_dependent OS Dependent parameter in DEVICEINSTANCE +* \param fCached Caching option (0=do not use) -> currently ignored +* \return Handle to mapping, NULL on error */ +/*****************************************************************************/ +void* OS_MapUserPointer(void* pvDriverMem, uint32_t ulMemSize, + void** ppvMappedMem, void *os_dependent, unsigned char fCached) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + /* We don't need to do any mapping, as we are already in user space */ + *ppvMappedMem = pvDriverMem; + + return pvDriverMem; +} + +/*****************************************************************************/ +/*! Unmap previously mapped user space pointer +* \param phMapping Handle returned from OS_MapUserPointer +* \param os_dependent OS Dependent parameter in DEVICEINSTANCE +* \return 0 on error */ +/*****************************************************************************/ +int OS_UnmapUserPointer(void* phMapping, void *os_dependent) { +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + return 1; +} + +/*****************************************************************************/ +/*! This function invalidates a cache buffer to be refreshed by +* the physical memory. +* \param pvMem Pointer to the cached memory +* \param ulMemSize Length of the cached memory area */ +/*****************************************************************************/ +void OS_InvalidateCacheMemory_FromDevice(void* pvCachedMemPtr, unsigned long ulMemSize) { + /* not implemented yet */ +} + +/*****************************************************************************/ +/*! This function flushes a cached memory area to the device buffer +* \param pvMem Pointer to the cached memory +* \param ulMemSize Length of the cached memory area */ +/*****************************************************************************/ +void OS_FlushCacheMemory_ToDevice(void* pvMem, unsigned long ulMemSize) +{ + /* not implemented yet */ +} + +/*****************************************************************************/ +/*! Structure for event handling */ +/*****************************************************************************/ +struct os_event { + pthread_mutex_t mutex; /*!< Mutex to lock access to set, waiting_threads + and cond */ + int set; /*!< Protected by mutex. !=0 if event is set */ + int waiting_threads; /*!< Number of waiting threads on this event */ + pthread_cond_t cond; /*!< Condition to signal, if event state has changed, + and a thread is waiting */ +}; + +/*****************************************************************************/ +/*! Create event +* \return Handle to created event */ +/*****************************************************************************/ +void* OS_CreateEvent(void) { + struct os_event *ev = malloc( sizeof(*ev) ); + pthread_condattr_t ev_attr; + pthread_mutexattr_t ev_mutattr; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( ev == NULL ) + { + perror("allocating memory for OS_Event"); + return NULL; + } + + if( (iRet = pthread_condattr_init( &ev_attr )) != 0 ) + { + fprintf( stderr, "Cond init attr: %s\n", strerror(iRet)); + goto free_out; + } + + pthread_condattr_setclock(&ev_attr, CLOCK_MONOTONIC); + + if( (iRet = pthread_cond_init( &(ev->cond), &ev_attr )) != 0 ) + { + fprintf( stderr, "Cond init: %s\n", strerror(iRet)); + goto free_out; + } + if( (iRet = pthread_mutexattr_init(&ev_mutattr)) != 0 ) + { + fprintf( stderr, "Mutex init attr: %s\n", strerror(iRet)); + goto free_out; + } + if( (iRet = pthread_mutexattr_setprotocol(&ev_mutattr, PTHREAD_PRIO_INHERIT)) != 0 ) + { + fprintf( stderr, "Mutex set attr: %s\n", strerror(iRet)); + goto free_out; + } + if( (iRet = pthread_mutex_init(&(ev->mutex), &ev_mutattr)) != 0 ) + { + fprintf( stderr, "Mutex init: %s\n", strerror(iRet)); + goto free_out; + } + + ev->set = 0; + ev->waiting_threads = 0; + + return ev; + +free_out: + free(ev); + return NULL; +} + +/*****************************************************************************/ +/*! Signal event +* \param pvEvent Handle to event */ +/*****************************************************************************/ +void OS_SetEvent(void* pvEvent) { + struct os_event *ev = (struct os_event *) pvEvent; + int iRet; + +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( ev == NULL ) + { + fprintf(stderr, "SetEvent, no event given\n"); + } else + { + pthread_mutex_lock(&ev->mutex); + + if (!ev->set) + { + ev->set = 1; + + /* Check if there are any waiters, and release them appropriately */ + if(ev->waiting_threads > 0) + { + if( (iRet = pthread_cond_signal(&(ev->cond))) != 0 ) + fprintf( stderr, "SetEvent: %s\n", strerror(iRet)); + + } + } + + pthread_mutex_unlock(&ev->mutex); + } +} + +/*****************************************************************************/ +/*! Reset event +* \param pvEvent Handle to event */ +/*****************************************************************************/ +void OS_ResetEvent(void* pvEvent) { + struct os_event *ev = (struct os_event *) pvEvent; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + if( ev == NULL ) + { + fprintf(stderr, "ResetEvent, no event given\n"); + } else + { + pthread_mutex_lock(&ev->mutex); + + ev->set = 0; + + pthread_mutex_unlock(&ev->mutex); + } +} + +/*****************************************************************************/ +/*! Delete event +* \param pvEvent Handle to event */ +/*****************************************************************************/ +void OS_DeleteEvent(void* pvEvent) { + struct os_event *ev = (struct os_event *) pvEvent; + int iRet; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( (iRet = pthread_cond_destroy(&(ev->cond)) ) != 0 ) + fprintf( stderr, "Delete event cond: %s\n", strerror(iRet)); + + if( (iRet = pthread_mutex_destroy(&(ev->mutex)) ) != 0 ) + fprintf( stderr, "Delete mutex: %s\n", strerror(iRet)); + + free(ev); +} + +/*****************************************************************************/ +/*! Wait for event +* \param pvEvent Handle to event +* \param ulTimeout Timeout in ms to wait for event +* \return CIFX_EVENT_SIGNALLED if event was set, CIFX_EVENT_TIMEOUT otherwise */ +/*****************************************************************************/ +uint32_t OS_WaitEvent(void* pvEvent, uint32_t ulTimeout) { + struct os_event *ev = (struct os_event *) pvEvent; + struct timespec timeout; + unsigned long ret = CIFX_EVENT_TIMEOUT; +#ifdef VERBOSE_1 + printf("%s() called\n", __FUNCTION__); +#endif + + if( clock_gettime(CLOCK_MONOTONIC, &timeout) != 0 ) + { + perror("WaitEvent gettime failed"); + } else + { + if (add_msec_to_timespec( &timeout, ulTimeout)) + { + fprintf( stderr, "OS_WaitEvent(): Faild to calculate time to block\n"); + return ret; + } + + pthread_mutex_lock(&ev->mutex); + + if(!ev->set) + { + /* We need to wait for event */ + ++ev->waiting_threads; + + pthread_cond_timedwait(&ev->cond, &ev->mutex, &timeout); + + --ev->waiting_threads; + } + + if(ev->set) + { + /* We got the event, now reset it */ + ev->set = 0; + ret = CIFX_EVENT_SIGNALLED; + } + + pthread_mutex_unlock(&ev->mutex); + } + + return ret; +} + +#ifdef CIFX_TOOLKIT_TIME +/*****************************************************************************/ +/*! Get the system time since 1970/01/01 +* \param ptTime Pointer to store the time value +* \return actual time vlaue */ +/*****************************************************************************/ +uint32_t OS_Time( uint32_t *ptTime) +{ + struct timeval tCurrentTime = {0}; + time_t tSecSince1970 = 0; + + /* get local time */ + if (0 == gettimeofday( &tCurrentTime, NULL)) + tSecSince1970 = tCurrentTime.tv_sec; + + if (ptTime) + *ptTime = (uint32_t)tSecSince1970; + + return (uint32_t)tSecSince1970; +} +#endif diff --git a/libcifx/toolchain-xx.cmake b/libcifx/toolchain-xx.cmake new file mode 100644 index 0000000..4efbd88 --- /dev/null +++ b/libcifx/toolchain-xx.cmake @@ -0,0 +1,9 @@ + +# TODO: specify target system +SET(CMAKE_SYSTEM_NAME Linux) + +# TODO: specify the cross compiler +# e.g. SET(CMAKE_C_COMPILER /opt/mycrosscompiler/gcc) +SET(CMAKE_C_COMPILER ) +SET(CMAKE_CXX_COMPILER ) + diff --git a/libcifx/user_linux.c b/libcifx/user_linux.c new file mode 100644 index 0000000..8ab1c14 --- /dev/null +++ b/libcifx/user_linux.c @@ -0,0 +1,883 @@ +// SPDX-License-Identifier: MIT +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: Linux specific implementation for finding firmware files, etc. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include "cifXToolkit.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "WarmstartFile.h" +#include "cifxlinux_internal.h" + +char* g_szDriverBaseDir = NULL; /*!< Global base path to driver/cifX configuration data */ + +static const char* DEVICE_CONF_ALIAS_KEY = "alias="; +static const char* DEVICE_CONF_IRQ_KEY = "irq="; +static const char* DEVICE_CONF_IRQPRIO_KEY = "irqprio="; +static const char* DEVICE_CONF_IRQSCHED_KEY = "irqsched="; +#ifdef CIFX_TOOLKIT_DMA +static const char* DEVICE_CONF_DMA = "dma="; +#endif +#ifdef CIFXETHERNET +static const char* DEVICE_CONF_ETH = "eth="; +#endif + +uint8_t severity_mapping[] = { + 0xff, /* not used */ + 1, /* TRACE_LEVEL_DEBUG */ + 2, /* TRACE_LEVEL_INFO */ + 0xff, /* not used */ + 4, /* TRACE_LEVEL_WARNING */ + 0xff, /* not used */ + 0xff, /* not used */ + 0xff, /* not used */ + 8, /* TRACE_LEVEL_ERROR */ +}; + +/*****************************************************************************/ +/*! Print a trace message from cifX toolkit +* \param ptDevInstance Device instance the trace is coming from +* \param ulTraceLevel see TRACE_LVL_XXX defines +* \param szFormat printf style format string +* \param ... printf arguments */ +/*****************************************************************************/ +void USER_Trace(PDEVICEINSTANCE ptDevInstance, uint32_t ulTraceLevel, const char* szFormat, ...) +{ + PCIFX_DEVICE_INTERNAL_T internaldev = (PCIFX_DEVICE_INTERNAL_T)ptDevInstance->pvOSDependent; + va_list vaList; + struct timeval time; + struct tm *local_tm; + + gettimeofday(&time, NULL); + local_tm = localtime(&time.tv_sec); + + va_start(vaList, szFormat); + + if(NULL != internaldev->log_file) + { + fprintf(internaldev->log_file, + "<%u> %.2d.%.2d.%.4d %.2d:%.2d:%.2d.%.3ld.%.3ld: ", + severity_mapping[ulTraceLevel], + local_tm->tm_mday, local_tm->tm_mon + 1, local_tm->tm_year + 1900, + local_tm->tm_hour, local_tm->tm_min, local_tm->tm_sec, + time.tv_usec / 1000, time.tv_usec % 1000); + + /* log file is given, so add this trace to our logfile */ + vfprintf(internaldev->log_file, szFormat, vaList); + fprintf(internaldev->log_file, "\n"); + fflush(internaldev->log_file); + + } else + { + printf("<%u> %.2d.%.2d.%.4d %.2d:%.2d:%.2d.%.3ld.%3ld: ", + severity_mapping[ulTraceLevel], + local_tm->tm_mday, local_tm->tm_mon + 1, local_tm->tm_year + 1900, + local_tm->tm_hour, local_tm->tm_min, local_tm->tm_sec, + time.tv_usec / 1000, time.tv_usec % 1000); + /* No logfile, so print to console */ + vprintf(szFormat, vaList); + printf("\n"); + } + + UNREFERENCED_PARAMETER(ulTraceLevel); +} + +#define PARSER_BUFFER_SIZE 1024 + +char* ToLowerCase( char* str, int len) { + int i = 0; + if (str != NULL) { + while ((str[i] != 0) && (iptDeviceInstance->ulSlotNumber; + /* if the rotary switch is set != 0 */ + if (ulSlotNr) + { + snprintf(szPath, iPathLen, + "%s/deviceconfig/Slot_%d/channel%d/", + g_szDriverBaseDir, + (unsigned int)ulSlotNr, + (unsigned int)ptDevInfo->ulChannel); + if (path_exists(szPath)==0) + goto exit; + } + + snprintf(szPath, iPathLen, + "%s/deviceconfig/%d/%d/channel%d/", + g_szDriverBaseDir, + (unsigned int)ptDevInfo->ulDeviceNumber, + (unsigned int)ptDevInfo->ulSerialNumber, + (unsigned int)ptDevInfo->ulChannel); + + if (path_exists(szPath)==0) + goto exit; + + snprintf(szPath, iPathLen, + "%s/deviceconfig/%s/channel%d/", + g_szDriverBaseDir, + ptDevInfo->ptDeviceInstance->szName, + (unsigned int)ptDevInfo->ulChannel); + + if (path_exists(szPath)==0) + goto exit; + + snprintf(szPath, iPathLen, + "%s/deviceconfig/FW/channel%d/", + g_szDriverBaseDir, + (unsigned int)ptDevInfo->ulChannel); + +exit: + return; +} + +/*****************************************************************************/ +/*! Internal helper function returning the path to a channel directory +* on the given device (e.g. /opt/cifx/deviceconfig/1250100/20004/) +* \param szPath Pointer to returned path +* \param iPathLen Length of the buffer passed in szPath +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr)*/ +/*****************************************************************************/ +static void GetDeviceDir(char* szPath, size_t iPathLen,PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + uint32_t ulSlotNr = ptDevInfo->ptDeviceInstance->ulSlotNumber; + /* if the rotary switch is set != 0 */ + if (ulSlotNr) + { + snprintf(szPath, iPathLen, + "%s/deviceconfig/Slot_%d/", + g_szDriverBaseDir, + (unsigned int)ulSlotNr); + + if (path_exists(szPath)==0) + goto exit; + } + snprintf(szPath, iPathLen, + "%s/deviceconfig/%d/%d/", + g_szDriverBaseDir, + (unsigned int)ptDevInfo->ulDeviceNumber, + (unsigned int)ptDevInfo->ulSerialNumber); + + if (path_exists(szPath)==0) + goto exit; + + snprintf(szPath, iPathLen, + "%s/deviceconfig/%s/", + g_szDriverBaseDir, + ptDevInfo->ptDeviceInstance->szName); + + if (path_exists(szPath)==0) + goto exit; + + snprintf(szPath, iPathLen, + "%s/deviceconfig/FW/", + g_szDriverBaseDir); + +exit: + return; +} + +/*****************************************************************************/ +/*! Returns the number of firmware files to be downloaded on the given +* device/channel +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr) +* \return Number of files (used for USER_GetFirmwareFile() */ +/*****************************************************************************/ +uint32_t USER_GetFirmwareFileCount(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + char szPath[CIFX_MAX_FILE_NAME_LENGTH]; + unsigned long ulRet = 0; + DIR* dir; + + GetChannelDir(szPath, sizeof(szPath), ptDevInfo); + + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if( (0 == strncasecmp(szExt, HIL_FILE_EXTENSION_FIRMWARE, 4)) || + (0 == strncasecmp(szExt, HIL_FILE_EXTENSION_OPTION, 4)) ) + { + ++ulRet; + } + } + } + closedir(dir); + } + + return ulRet; +} + +/*****************************************************************************/ +/*! Returns filename of the file to be downloaded on the given device/channel +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr) +* \param ulIdx Number of the file (0..USER_GetFirmwareFileCount) +* \param ptFileInfo Full and short filename of the file +* \return !=0 on success */ +/*****************************************************************************/ +int USER_GetFirmwareFile(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo) +{ + char szPath[CIFX_MAX_FILE_NAME_LENGTH]; + int ret = 0; + DIR* dir; + + GetChannelDir(szPath, sizeof(szPath), ptDevInfo); + + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + unsigned long ulFile = 0; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if( (0 == strncasecmp(szExt, HIL_FILE_EXTENSION_FIRMWARE, 4)) || + (0 == strncasecmp(szExt, HIL_FILE_EXTENSION_OPTION, 4)) ) + { + if(ulFile++ == ulIdx) + { + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", szPath, dirent->d_name); + strncpy(ptFileInfo->szShortFileName, dirent->d_name, + sizeof(ptFileInfo->szShortFileName)); + ret = 1; + break; + } + } + } + } + closedir(dir); + } + + return ret; +} + +/*****************************************************************************/ +/*! Returns the number of configuration files to be downloaded on the given +* device/channel +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr) +* \return Number of files (used for USER_GetConfigurationFile() */ +/*****************************************************************************/ +uint32_t USER_GetConfigurationFileCount(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + char szPath[CIFX_MAX_FILE_NAME_LENGTH]; + unsigned long ulRet = 0; + DIR* dir; + + GetChannelDir(szPath, sizeof(szPath), ptDevInfo); + + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if(0 == strncasecmp(szExt, HIL_FILE_EXTENSION_DATABASE, 4)) + { + ++ulRet; + } + } + } + closedir(dir); + } + + return ulRet; +} + +/*****************************************************************************/ +/*! Returns filename of the file to be downloaded on the given device/channel +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr) +* \param ulIdx Number of the file (0..USER_GetConfigurationFileCount) +* \param ptFileInfo Full and short filename of the file +* \return !=0 on success */ +/*****************************************************************************/ +int USER_GetConfigurationFile(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulIdx, PCIFX_FILE_INFORMATION ptFileInfo) +{ + char szPath[CIFX_MAX_FILE_NAME_LENGTH]; + int ret = 0; + DIR* dir; + + GetChannelDir(szPath, sizeof(szPath), ptDevInfo); + + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + unsigned long ulFile = 0; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if(0 == strncasecmp(szExt, HIL_FILE_EXTENSION_DATABASE, 4)) + { + if(ulFile++ == ulIdx) + { + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", szPath, dirent->d_name); + strncpy(ptFileInfo->szShortFileName, dirent->d_name, + sizeof(ptFileInfo->szShortFileName)); + ret = 1; + break; + } + } + } + } + closedir(dir); + } + + return ret; +} + +/*****************************************************************************/ +/*! Get warmstart parameters (for slave devices to be configured at startup) +* This is usually done by the user application, and not the toolkit +* \param ptDevInfo Device information (DeviceNr, SerialNr, ChannelNr) +* \param ptPacket Packet to send after starting the firmware +* \return !=0 if a packet is available */ +/*****************************************************************************/ +int USER_GetWarmstartParameters(PCIFX_DEVICE_INFORMATION ptDevInfo, CIFX_PACKET* ptPacket) +{ + int ret = 0; + char szFile[CIFX_MAX_FILE_NAME_LENGTH]; + void* pvFile; + uint32_t ulFileLen; + + GetChannelDir(szFile, sizeof(szFile), ptDevInfo); + strcat(szFile, "warmstart.dat"); + + pvFile = OS_FileOpen(szFile, &ulFileLen); + + if ( (pvFile == NULL) || + (ulFileLen < sizeof(CIFX_WS_FILEHEADER)) ) + { + if (errno != ENOENT) /* do not print an error if file does not exists */ + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Error opening warm start file! %s", strerror(errno)); + } + } + } else + { + CIFX_WS_FILEHEADER tHeader = {0}; + + /* Read file header */ + if (OS_FileRead( pvFile, 0, sizeof(tHeader), &tHeader) != sizeof(tHeader)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Error reading from warm start file!"); + } + + } else if( tHeader.ulCookie != CIFX_WS_WARMSTART_FILE_COOKIE) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Invalid warm start file cookie!"); + } + } else if( tHeader.ulDataLen > sizeof(*ptPacket)) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Invalid warm start file length!"); + } + } else + { + /* Read file data */ + if (OS_FileRead( pvFile, sizeof(tHeader), tHeader.ulDataLen, (void*)ptPacket) != tHeader.ulDataLen) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Error reading user data from warm start file!"); + } + } else + { + ret = 1; + } + } + + if( NULL != pvFile) + OS_FileClose(pvFile); + } + + return ret; +} + +/*****************************************************************************/ +/*! Retrieve the full and short filename of a bootloader file to download to +* the given device +* \param ptDevInstance Device Instance containing all device data +* \param ptFileInfo Pointer to returned file information */ +/*****************************************************************************/ +void USER_GetBootloaderFile(PDEVICEINSTANCE ptDevInstance, PCIFX_FILE_INFORMATION ptFileInfo) +{ + switch(ptDevInstance->eChipType) + { + case eCHIP_TYPE_NETX500: + case eCHIP_TYPE_NETX100: + { + FILE* fd; + + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", + g_szDriverBaseDir, "NETX100-BSL.bin"); + + strncpy(ptFileInfo->szShortFileName, + "NETX100-BSL.bin", sizeof(ptFileInfo->szShortFileName)); + + if(NULL != (fd = fopen(ptFileInfo->szFullFileName, "r"))) + { + /* New bootloader found */ + fclose(fd); + + } else + { + /* new bootloader not found. Assume user still has the "old" cifX bootloader */ + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", + g_szDriverBaseDir, "NXCIF50-RTE.bin"); + + strncpy(ptFileInfo->szShortFileName, + "NXCIF50-RTE.bin", sizeof(ptFileInfo->szShortFileName)); + } + } + break; + + case eCHIP_TYPE_NETX52: + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", + g_szDriverBaseDir, "NETX52-BSL.bin"); + + strncpy(ptFileInfo->szShortFileName, + "NETX52-BSL.bin", sizeof(ptFileInfo->szShortFileName)); + break; + + case eCHIP_TYPE_NETX51: + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", + g_szDriverBaseDir, "NETX51-BSL.bin"); + + strncpy(ptFileInfo->szShortFileName, + "NETX51-BSL.bin", sizeof(ptFileInfo->szShortFileName)); + break; + + case eCHIP_TYPE_NETX50: + /* new bootloader for netX50 will default to NETX50-BSL.bin (which is the default toolkit delivery) */ + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", + g_szDriverBaseDir, "NETX50-BSL.bin"); + + strncpy(ptFileInfo->szShortFileName, + "NETX50-BSL.bin", sizeof(ptFileInfo->szShortFileName)); + break; + + default: + /* This should never happen */ + break; + } +} + +/*****************************************************************************/ +/*! Retrieve the alias name of a card. This name can be alternatively used +* by a application in a call to xChannelOpen. This name must be unique +* \param ptDevInfo Device information (DeviceNr, SerialNr) +* \param ulMaxLen Maximum Length of alias +* \param szAlias Pointer to returned alias name (empty = no alias) */ +/*****************************************************************************/ +void USER_GetAliasName(PCIFX_DEVICE_INFORMATION ptDevInfo, uint32_t ulMaxLen, char* szAlias) +{ + char szFile[CIFX_MAX_FILE_NAME_LENGTH]; + char* szTempAlias = NULL; + + GetDeviceDir(szFile, sizeof(szFile), ptDevInfo); + strcat(szFile, "/device.conf"); + + /* Read alias from file */ + if(GetDeviceConfigString(szFile, DEVICE_CONF_ALIAS_KEY, &szTempAlias)) + { + strncpy(szAlias, szTempAlias, ulMaxLen); + free(szTempAlias); + } +} + +/*****************************************************************************/ +/*! Returns OS file information for the given device/channel and Idx +* passed as argument. +* \param ptDevInfo DeviceInfo including channel number, for which the +* firmware file should be delivered +* \param ptFileInfo Short and full file name of the firmware. Used in +* calls to OS_OpenFile() +* \return != 0 on success */ +/*****************************************************************************/ +int USER_GetOSFile(PCIFX_DEVICE_INFORMATION ptDevInfo, PCIFX_FILE_INFORMATION ptFileInfo) +{ + char szPath[CIFX_MAX_FILE_NAME_LENGTH]; + int ret = 0; + DIR* dir; + + GetDeviceDir(szPath, sizeof(szPath), ptDevInfo); + + if(NULL != (dir = opendir(szPath))) + { + struct dirent* dirent; + + while(NULL != (dirent = readdir(dir))) + { + char* szExt = strstr(dirent->d_name, "."); + if(NULL != szExt) + { + if(0 == strncasecmp(szExt, HIL_FILE_EXTENSION_FIRMWARE, 4)) + { + snprintf(ptFileInfo->szFullFileName, sizeof(ptFileInfo->szFullFileName), + "%s/%s", szPath, dirent->d_name); + strncpy(ptFileInfo->szShortFileName, dirent->d_name, + sizeof(ptFileInfo->szShortFileName)); + ret = 1; + break; + } + } + } + closedir(dir); + } + + return ret; +} + + +/*****************************************************************************/ +/*! Check if the interrupts are to be enabled on this device +* \param ptDevInstance Device Instance containing all device data +* \return !=0 to enable IRQs */ +/*****************************************************************************/ +int USER_GetInterruptEnable(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + char szFile[CIFX_MAX_FILE_NAME_LENGTH]; + char* szTempIrq = NULL; + int ret = 0; + + GetDeviceDir(szFile, sizeof(szFile), ptDevInfo); + strcat(szFile, "/device.conf"); + + /* Read IRQ enable from file */ + if(GetDeviceConfigString(szFile, DEVICE_CONF_IRQ_KEY, &szTempIrq)) + { + if(0 == strcasecmp("yes", szTempIrq)) + { + PCIFX_DEVICE_INTERNAL_T internaldev = (PCIFX_DEVICE_INTERNAL_T)ptDevInfo->ptDeviceInstance->pvOSDependent; + + /* Check if we have a uio handle. If not, we cannot handle IRQs */ + if(-1 == internaldev->userdevice->uio_fd) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Trying to activate IRQ's on a device, that does not have a uio connection. Fallback to polling mode!"); + } + } else + { + char* szTempData = NULL; + uint32_t ulEnableInt = 0; + /* NOTE: We don't want do enable interrupts here! We just want to check if the device provides interrupt support! */ + /* ret = ENOSYS => !to be backwards compatible! - verification not provided but device supports interrupt */ + /* ret = EIO => interrupt not supported, the device did not register for any interrupt */ + /* NOTE: For SPIDEV devices, the IRQ trigger file is opened read only! In this case the uio_num is -1. */ + if ((internaldev->userdevice->uio_num >= 0) && ((ret=write(internaldev->userdevice->uio_fd, (void*)&ulEnableInt, sizeof(uint32_t))) < 0) && (errno != ENOSYS)) + { + ret = 0; + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "Error enabling interrupts (%s), fallback to polling mode!", + strerror(errno)); + if (errno == EIO) + { + if(g_ulTraceLevel & TRACE_LEVEL_ERROR) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_ERROR, + "No irq for device registered!"); + } + } + } + } else + { + /* Check for custom priority and set them in CIFX_DEVICE_INTERNAL_T to use them in OS_EnableInterrupts() */ + if(GetDeviceConfigString(szFile, DEVICE_CONF_IRQPRIO_KEY, &szTempData)) + { + internaldev->set_irq_prio = 1; + internaldev->irq_prio = atoi(szTempData); + + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_INFO, + "Using custom IRQ thread priority (%d).", + internaldev->irq_prio); + } + free(szTempData); + } else + { + internaldev->set_irq_prio = 0; + } + + /* Check for custom scheduling policy */ + if(GetDeviceConfigString(szFile, DEVICE_CONF_IRQSCHED_KEY, &szTempData)) + { + internaldev->set_irq_scheduler_algo = 1; + + if(strcasecmp("fifo", szTempData) == 0) + { + /* SCHED_FIFO */ + internaldev->irq_scheduler_algo = SCHED_FIFO; + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_INFO, + "Using custom IRQ thread scheduling algorithm (SCHED_FIFO)."); + } + + } else if(strcasecmp("rr", szTempData) == 0) + { + /* SCHED_RR */ + internaldev->irq_scheduler_algo = SCHED_RR; + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_INFO, + "Using custom IRQ thread scheduling algorithm (SCHED_RR)."); + } + + } else + { + internaldev->set_irq_scheduler_algo = 0; + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, + TRACE_LEVEL_INFO, + "Trying to override IRQ thread scheduling policy, but unknown policy was given (%s)", szTempData); + } + } + free(szTempData); + } else + { + internaldev->set_irq_scheduler_algo = 0; + } + ret = 1; + } + } + } + free(szTempIrq); + } + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace( ptDevInfo->ptDeviceInstance, TRACE_LEVEL_INFO, "%s", (ret)?"IRQ-Mode enabled!":"Polling Mode enabled!"); + } + + return ret; +} + +#ifdef CIFX_TOOLKIT_DMA +/*****************************************************************************/ +/*! Check if the DMA mode is enabled +* \param ptDevInstance Device Instance containing all device data +* \return CIFX_TOOLKIT_DMA_MODE_E +*/ +/*****************************************************************************/ +int USER_GetDMAMode(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + char szFile[CIFX_MAX_FILE_NAME_LENGTH]; + char* szTempDMA = NULL; + + GetDeviceDir(szFile, sizeof(szFile), ptDevInfo); + strcat(szFile, "/device.conf"); + + if(GetDeviceConfigString(szFile, DEVICE_CONF_DMA, &szTempDMA)) + { + if(0 == strcasecmp("yes", szTempDMA)) + { + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, 0, "DMA mode enabled!"); + } + return eDMA_MODE_ON; + } + free(szTempDMA); + } + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, 0, "No DMA support!"); + } + return eDMA_MODE_OFF; +} +#endif + +#ifdef CIFXETHERNET +/*****************************************************************************/ +/*! Check if the ethernet support is enabled +* \param ptDevInstance Device Instance containing all device data +* \return CIFX_TOOLKIT_DMA_MODE_E +*/ +/*****************************************************************************/ +int USER_GetEthernet(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + char szFile[CIFX_MAX_FILE_NAME_LENGTH]; + char* szTempEth = NULL; + int ret = 0; + + GetDeviceDir(szFile, sizeof(szFile), ptDevInfo); + strcat(szFile, "/device.conf"); + + if(GetDeviceConfigString(szFile, DEVICE_CONF_ETH, &szTempEth)) + { + if(0 == strcasecmp("yes", szTempEth)) + { + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, 0, "Ethernet support enabled!"); + } + ret = 1; + } + free(szTempEth); + } else + { + if(g_ulTraceLevel & TRACE_LEVEL_INFO) + { + USER_Trace(ptDevInfo->ptDeviceInstance, 0, "No ethernet support!"); + } + } + return ret; +} +#endif + +/*****************************************************************************/ +/*! Get actual I/O buffer caching mode for the given device +* \param ptDevInfo Device Information +* \return eCACHED_MODE_ON to enable caching */ +/*****************************************************************************/ +int USER_GetCachedIOBufferMode(PCIFX_DEVICE_INFORMATION ptDevInfo) +{ + return eCACHED_MODE_OFF; +} diff --git a/plugins/netx-spm/CMakeLists.txt b/plugins/netx-spm/CMakeLists.txt new file mode 100644 index 0000000..588e623 --- /dev/null +++ b/plugins/netx-spm/CMakeLists.txt @@ -0,0 +1,43 @@ + +cmake_minimum_required(VERSION 2.8.12) +# required to set project version +cmake_policy(SET CMP0048 NEW) + +set(LIB_MAJOR 1) +set(LIB_MINOR 0) +set(LIB_BUILD 0) +set(LIB_REVISION 0) +set(LIB_VERSION ${LIB_MAJOR}.${LIB_MINOR}.${LIB_REVISION}) + +project("libcifx SPM plugin" VERSION ${LIB_VERSION}) + +# shared library +add_library(netx-spm SHARED) + +add_definitions(-D_GNU_SOURCE) + +include_directories( ${CMAKE_CURRENT_LIST_DIR}) + +if(CIFX_HEADER) + include_directories( ${CIFX_HEADER}) +else(CIFX_HEADER) + include(FindPkgConfig) + pkg_check_modules(LIBCIFX REQUIRED cifx) + include_directories(${LIBCIFX_INCLUDE_DIRS}) +endif(CIFX_HEADER) + +file(GLOB SOURCES ${CMAKE_CURRENT_LIST_DIR}/*.c) +target_sources(netx-spm + PRIVATE + ${SOURCES} +) + +set_target_properties( netx-spm PROPERTIES PREFIX "") + +if(NOT PLUGINPATH) + set(PLUGINPATH "/opt/cifx/plugins/") +endif(NOT PLUGINPATH) + +# install resources +install(TARGETS netx-spm DESTINATION ${PLUGINPATH}) +install(FILES ${CMAKE_CURRENT_LIST_DIR}/config0 DESTINATION ${PLUGINPATH}/netx-spm/) diff --git a/plugins/netx-spm/cifx_plugin.c b/plugins/netx-spm/cifx_plugin.c new file mode 100644 index 0000000..4474921 --- /dev/null +++ b/plugins/netx-spm/cifx_plugin.c @@ -0,0 +1,256 @@ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: ciX plugin implementation offers a flexible interface for cifX access. + * For a sample implementation see libsdpm.c + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include "cifxlinux.h" +#include "libsdpm.h" + +#define MAX_STR 256 + +#define DEVICE_NAME "Device=" +#define DEVICE_SPEED "Speed=" +#define DEVICE_MODE "Mode=" +#define DEVICE_CSCHANGE "CSChange=" +#define DEVICE_CHUNK_SIZE "ChunkSize=" +#define DEVICE_IRQ "irq=" +#define SPI_DEVICE "spidev" + + +static int GetDeviceConfigString(const char* szFile, const char* szKey, char** szValue) +{ + int ret = 0; + FILE* fd = fopen(szFile, "r"); + + if(NULL != fd) + { + /* File is open */ + char* buffer = malloc(MAX_STR); + + /* Read file line by line */ + while(NULL != fgets(buffer, MAX_STR, fd)) + { + char* key; + + /* '#' marks a comment line in the device.conf file */ + if(buffer[0] == '#') + continue; + + /* Search for key in the input buffer */ + key = strcasestr(buffer, szKey); + + if(NULL != key) + { + /* We've found the key */ + int allocsize = strlen(key + strlen(szKey)) + 1; + int valuelen; + char* tempstring = (char*)malloc(allocsize); + + strcpy(tempstring, key + strlen(szKey)); + valuelen = strlen(tempstring); + + /* strip all trailing whitespaces */ + while( (tempstring[valuelen - 1] == '\n') || + (tempstring[valuelen - 1] == '\r') || + (tempstring[valuelen - 1] == ' ')) + { + tempstring[valuelen - 1] = '\0'; + --valuelen; + } + + *szValue = tempstring; + ret = 1; + break; + } + } + + free(buffer); + fclose(fd); + } + + return ret; +} + +int GetDeviceName(char** name, char* szFile) +{ + return GetDeviceConfigString( szFile, DEVICE_NAME, name); +} + +int GetSPISpeed(uint32_t* speed, char* szFile) +{ + char* szspeed = NULL; + int ret = 0; + + if (GetDeviceConfigString( szFile, DEVICE_SPEED, &szspeed)) { + sscanf(szspeed,"%d",speed); + free(szspeed); + ret = 1; + } + return ret; +} + +int GetSPIMode(int* mode, char* szFile) +{ + char* szmode = NULL; + int ret = 0; + if (GetDeviceConfigString( szFile, DEVICE_MODE, &szmode)) { + sscanf(szmode, "%d", mode); + free(szmode); + ret = 1; + } + return ret; +} + +int GetSPICSChange(uint8_t* pbCSChange, char* szFile) +{ + char* string = NULL; + int ret = 0; + int number = 0; + + if (pbCSChange == NULL) + return 0; + + *pbCSChange = 0; + ret = 1; + if (GetDeviceConfigString( szFile, DEVICE_CSCHANGE, &string)) { + sscanf(string, "%d", &number); + if (number != 0) + *pbCSChange = 1; + free(string); + } + return ret; +} + + +int GetIRQFile(char* irq, char* szFile) +{ + int ret = 0; + char* szirq = NULL; + if (GetDeviceConfigString( szFile, DEVICE_IRQ, &szirq)) { + sprintf(irq, "%s", szirq); + free(szirq); + ret = 1; + } + return ret; +} + +int CheckIsSPIDevice(char* szFile) +{ + char* name = NULL; + int ret = 0; + if (GetDeviceConfigString( szFile, DEVICE_NAME, &name)) { + if (0 == strncmp(name, SPI_DEVICE, strlen(SPI_DEVICE))) { + ret = 1; + } + free(name); + } + return ret; +} + +int GetSPIChunkSize(uint32_t* size, char* szFile) +{ + char* szsize = NULL; + int ret = 0; + *size = 0; + if (GetDeviceConfigString( szFile, DEVICE_CHUNK_SIZE, &szsize)) { + sscanf(szsize, "%d", size); + free(szsize); + ret = 1; + } + return ret; +} + +int file_exist (char *filename) +{ + struct stat buffer; + return (stat (filename, &buffer) == 0); +} + +void find_config_path(char* base_path) +{ + if (file_exist ("./config0")) + sprintf(base_path,"./"); + else + sprintf(base_path,"/opt/cifx/plugins/netx-spm/"); +} + +uint32_t cifx_device_count(void) +{ + char config[2*MAX_STR+20] = {0}; + char base_path[MAX_STR] = {0}; + uint32_t spi_dev = 0; + + /* read all configs or parser error or device is not a spidev device */ + find_config_path(base_path); + sprintf(config, "%sconfig0", base_path); + while ((file_exist(config)) && (CheckIsSPIDevice(config))) { + sprintf(config, "%sconfig%d",base_path,++spi_dev); + } + return spi_dev; +} + +struct CIFX_DEVICE_T* cifx_alloc_device(uint32_t num) +{ + char* devicename = NULL; + char dev[MAX_STR] = {0}; + char config[2*MAX_STR] = {0}; + char base_path[MAX_STR] = {0}; + uint32_t speed = 0; + int mode = 0; + uint32_t size = 0; + char irq_file[MAX_STR] = {0}; + char* irq = NULL; + uint8_t cs_change = 0; + + + find_config_path(base_path); + sprintf(config, "%sconfig%d", base_path, num); + if (0 == CheckIsSPIDevice(config)) { + return NULL; + } else if (0 == GetDeviceName( &devicename, config)) { + return NULL; + } else if (0 == GetSPISpeed( &speed, config)) { + free(devicename); + return NULL; + } else if (0 == GetSPIMode( &mode, config)) { + free(devicename); + return NULL; + } else { + if (0 != GetIRQFile( irq_file, config)) + irq = irq_file; + + GetSPICSChange( &cs_change, config); + GetSPIChunkSize( &size, config); + sprintf(dev, "/dev/%s",devicename); + free(devicename); + return SDPMInit(dev, /* device to use */ + mode, /* SPI mode */ + 8, /* number of bits */ + speed, /* frequency */ + irq, /* interrupt */ + size, + cs_change); + } +} + +void cifx_free_device(struct CIFX_DEVICE_T* device) +{ + SDPMDeInit(device); +} diff --git a/plugins/netx-spm/config0 b/plugins/netx-spm/config0 new file mode 100644 index 0000000..3d479c8 --- /dev/null +++ b/plugins/netx-spm/config0 @@ -0,0 +1,6 @@ +Device=spidev0.0 +Speed=25000000 +Mode=3 +ChunkSize=0 +CSChange=0 + diff --git a/plugins/netx-spm/libsdpm.c b/plugins/netx-spm/libsdpm.c new file mode 100644 index 0000000..b198af5 --- /dev/null +++ b/plugins/netx-spm/libsdpm.c @@ -0,0 +1,662 @@ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Description: This plugin library can be used to initialize and use a spidev as a "common" + * cifX device. The access is based on the cifX toolkit's 'HW-access' functions. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "cifxlinux.h" + +/******************************************************************************/ +/*** GLOBAL DEFINITIONS *******************************************************/ +/******************************************************************************/ +#if defined(VERBOSE) || defined(DEBUG) +#define DBG(fmt, ...) printf(fmt, ##__VA_ARGS__) +#else +#define DBG(fmt, ...) +#endif + +#define CHECK_STATE /* enable error message in case of dpm status changes to != 0x11 (printed to stderr) */ + +/******************************************************************************/ +/*** STRUCTURE DEFINITIONS ****************************************************/ +/******************************************************************************/ +/* states of the SPI interface */ +typedef enum ESPI_IF_STATE_E { + eNotInitialized, + eInitialized, +} ESPI_IF_STATE; + +/* Example structure containing information of the SPI interface (passed as user parameter -> see tSPIDev.userparam) */ +struct SPI_PARAM_T { + char szName[256]; /* Name of the SPI interface (e.g. /dev/spidev1.0) */ + int iSPIFD; /* File desc of the SPI interface */ + void* pvSerDPMLock; /* lock required to synchronize SPI access */ + int iError; /* Error status of SPI interface */ + ESPI_IF_STATE eState; /* Current interface status */ + /* The following parameter are related to the linux kernel 'spidev' interface */ + uint32_t ulUDelay; /* SPI param: If nonzero, how long to delay after the last bit transfer */ + /* before optionally deselecting the device before the next transfer */ + uint32_t ulSpeed; /* SPI param: see SPI_IOC_RD_MAX_SPEED_HZ, SPI_IOC_WR_MAX_SPEED_HZ */ + uint8_t bBits; /* SPI param: see SPI_IOC_RD_BITS_PER_WORD, SPI_IOC_WR_BITS_PER_WORD */ + uint8_t bMode; /* SPI param: see SPI_IOC_RD_MODE, SPI_IOC_WR_MODE */ + uint8_t* pabTXBuffer; + uint8_t* pabRXBuffer; + uint32_t ulChunkSize; + uint8_t bCSChange; +}; + +/* Internal structures required for read/write transactions */ +/* SPI Read Transfer Structure */ +struct SPI_RD_MSG_T { + uint8_t abSPIHeader[4]; + uint8_t abData[1]; +}; +/* SPI Write Transfer Structure */ +struct SPI_WR_MSG_T { + uint8_t abSPIHeader[3]; + uint8_t abData[1]; +}; + +/******************************************************************************/ +/*** Global variables *********************************************************/ +/******************************************************************************/ +#define DEFAULT_BUFFER_SIZE (8*1024) + +/*****************************************************************************/ +/*! Create a lock +* \return Lock Handle */ +/*****************************************************************************/ +static void* CreateLock(void) { + pthread_mutexattr_t mta; + pthread_mutex_t *mutex; + int iRet; + + pthread_mutexattr_init(&mta); + if( (iRet = pthread_mutexattr_settype(&mta, PTHREAD_MUTEX_RECURSIVE)) != 0 ) + return NULL; + + mutex = malloc( sizeof(pthread_mutex_t) ); + if( mutex == NULL ) + return NULL; + + if( (iRet = pthread_mutex_init(mutex, &mta)) != 0 ) + goto err_out; + + return mutex; + +err_out: + free(mutex); + return NULL; +} + +/*****************************************************************************/ +/*! Acquire a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +static void EnterLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + int iRet; + + if( (iRet = pthread_mutex_lock(mutex)) != 0) + { + fprintf( stderr, "Locking failed: %s\n", strerror(iRet)); + } +} + +/*****************************************************************************/ +/*! Release a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +static void LeaveLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + int iRet; + + if( (iRet = pthread_mutex_unlock(mutex)) != 0) + { + fprintf( stderr, "Unlock failed: %s\n", strerror(iRet)); + } +} + +/*****************************************************************************/ +/*! Delete a lock +* \param pvLock Handle to lock */ +/*****************************************************************************/ +static void DeleteLock(void* pvLock) { + pthread_mutex_t *mutex = (pthread_mutex_t *) pvLock; + + pthread_mutex_destroy(mutex); + free(mutex); +} + +/******************************************************************************/ +/*! Helper function, transfers SPI message. + * \param ptSPIParam Pointer to interface specific parameter + * \param pbData Pointer to SPI message + * \param pbData length of SPI message + * \param fCSChange */ +/******************************************************************************/ +static int SPITransferMessage(struct SPI_PARAM_T* ptSPIParam, uint8_t *pbData, uint32_t ulLen, uint8_t fCSChange) +{ + int ret = 0; + struct spi_ioc_transfer tSPITransfer = {0}; + + DBG("++SPITransferMessage\n"); + + tSPITransfer.tx_buf = (uint64_t)pbData; + tSPITransfer.rx_buf = (uint64_t)pbData; + tSPITransfer.len = ulLen; + tSPITransfer.cs_change = fCSChange; + + if(0 > (ret = ioctl( ptSPIParam->iSPIFD, SPI_IOC_MESSAGE(1), &tSPITransfer))) + fprintf(stderr, "SPITransferMessage: Failed to transfer message on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + +#ifdef CHECK_STATE + if (0x11 != pbData[0]) { + ret = -EAGAIN; + fprintf(stderr, "DPM status changed 0x%X (OK => 0x11)!\n", pbData[0]); + } +#endif + + DBG("--SPITransferMessage\n"); + + return ret; +} + +/******************************************************************************/ +/*! Helper function, reading data via SPI interface. + * Translate read request into SPI read message. + * \param ptSPIParam Pointer to interface specific parameter + * \param ulDpmAddr Address offset in DPM to read data from + * \param pbData Pointer to Buffer to store read data + * \param ulLen Number of bytes to read */ +/******************************************************************************/ +static void SPIReadChunk( struct SPI_PARAM_T* ptSPIParam, uint32_t ulDpmAddr, uint8_t *pbData, uint32_t ulLen) +{ + struct SPI_RD_MSG_T* ptSPIRDMsg = NULL; + int ret = 0; + + DBG("++SPIReadChunk\n"); + + /* Check buffer size */ + if(*(uint16_t*)ptSPIParam->pabRXBuffer < ulLen) { + fprintf(stderr, "SPIReadChunk: RX SPI buffer is too small\n"); + return; + } + + ptSPIRDMsg = (struct SPI_RD_MSG_T*)(ptSPIParam->pabRXBuffer+sizeof(uint16_t)); + + /* prepare SPI message */ + ptSPIRDMsg->abSPIHeader[0] = 0x80 + (uint8_t)((ulDpmAddr >> 16) & 0x0F); + ptSPIRDMsg->abSPIHeader[1] = (uint8_t)((ulDpmAddr >> 8) & 0xFF); + ptSPIRDMsg->abSPIHeader[2] = (uint8_t)((ulDpmAddr) & 0xFF); + ptSPIRDMsg->abSPIHeader[3] = 0x00; + + /* transfer message */ + + ret = SPITransferMessage(ptSPIParam, (uint8_t*)ptSPIRDMsg, ulLen+4, ptSPIParam->bCSChange); +#ifdef CHECK_STATE + if (0>ret) { + fprintf(stderr, "Error SPIReadChunk: DPM Addr=0x%X / Len=0x%X\n", ulDpmAddr, ulLen) ; + } +#endif + + /* return read data */ + memcpy(pbData, ptSPIRDMsg->abData, ulLen); + + DBG("--SPIReadChunk\n"); +} + +/******************************************************************************/ +/*! Helper function, writing data via SPI interface + * Translate write request into SPI write message + * \param ptSPIParam Pointer to interface specific parameter + * \param ulDpmAddr Offset in DPM where data to write to + * \param pbData Pointer to Buffer pointing to write data + * \param ulLen Number of bytes to write */ +/******************************************************************************/ +static void SPIWriteChunk(struct SPI_PARAM_T* ptSPIParam, uint32_t ulDpmAddr, uint8_t *pbData, uint32_t ulLen) +{ + struct SPI_WR_MSG_T* ptSPIWRMsg = NULL; + int ret = 0; + + DBG("++SPIWriteChunk\n"); + + /* Check buffer size */ + if(*(uint16_t*)ptSPIParam->pabTXBuffer < ulLen) { + fprintf(stderr, "SPIWriteChunk: TX SPI buffer is too small\n"); + return; + } + + ptSPIWRMsg = (struct SPI_WR_MSG_T*)(ptSPIParam->pabTXBuffer+sizeof(uint16_t)); + + /* prepare SPI message */ + ptSPIWRMsg->abSPIHeader[0] = (uint8_t)((ulDpmAddr >> 16) & 0x0F); + ptSPIWRMsg->abSPIHeader[1] = (uint8_t)((ulDpmAddr >> 8) & 0xFF); + ptSPIWRMsg->abSPIHeader[2] = (uint8_t)((ulDpmAddr) & 0xFF); + + memcpy(ptSPIWRMsg->abData, pbData, ulLen); + + /* transfer message */ + ret = SPITransferMessage(ptSPIParam, (uint8_t*)ptSPIWRMsg, ulLen+3, ptSPIParam->bCSChange); +#ifdef CHECK_STATE + if (0>ret) { + fprintf(stderr, "Error SPIWriteChunk: DPM Addr=0x%X / Len=0x%X\n", ulDpmAddr, ulLen) ; + } +#endif + + DBG("--SPIWriteChunk\n"); +} + +/******************************************************************************/ +/*! Read a number of bytes via the custom hardware interface function + * \param ptDevice Pointer to the custom device + * \param pvDpmAddr Address offset in DPM to read data from + * \param pvDst Buffer to store read data + * \param ulLen Number of bytes to read */ +/******************************************************************************/ +static void* SPIHWIFRead(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvDst, uint32_t ulLen) +{ + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + + DBG("++SPIHWIFRead\n"); + + /* check if interface is correctly configured */ + if ((NULL != ptSPIParam) && (ptSPIParam->eState == eInitialized)) { + /* enter SPI access lock */ + EnterLock(ptSPIParam->pvSerDPMLock); + /* read data from DPM */ + SPIReadChunk(ptSPIParam, (uint32_t)(uintptr_t)pvDpmAddr, (uint8_t*)pvDst, ulLen); + LeaveLock(ptSPIParam->pvSerDPMLock); + } + DBG("--SPIHWIFRead\n"); + return pvDst; +} + +static void* SPIHWIFRead_ext(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvDst, uint32_t ulLen) +{ + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + int reads = ulLen/ptSPIParam->ulChunkSize; + void* ret = NULL; + + while(reads>0) { + ret = SPIHWIFRead(ptDevice,pvDpmAddr,pvDst,ptSPIParam->ulChunkSize); + pvDpmAddr = (void*)((uintptr_t)pvDpmAddr + ptSPIParam->ulChunkSize); + pvDst = (void*)((uintptr_t)pvDst + ptSPIParam->ulChunkSize); + reads--; + } + if (ulLen%ptSPIParam->ulChunkSize) + ret = SPIHWIFRead(ptDevice,pvDpmAddr,pvDst,ulLen%ptSPIParam->ulChunkSize); + + return ret; +} + +/******************************************************************************/ +/*! Read a number of bytes via the custom hardware interface function + * \param ptDevice Pointer to the custom device + * \param pvDpmAddr Address offset in DPM to write data to + * \param pvSrc Buffer to data to be written + * \param ulLen Number of bytes to writ */ +/******************************************************************************/ +static void* SPIHWIFWrite(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvSrc, uint32_t ulLen) +{ + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + + DBG("++SPIHWIFWrite\n"); + + /* check if interface is correctly configured */ + if ((NULL != ptSPIParam) && (ptSPIParam->eState == eInitialized)) { + /* enter SPI access lock */ + EnterLock(ptSPIParam->pvSerDPMLock); + /* write data to DPM */ + SPIWriteChunk(ptSPIParam, (uint32_t)(uintptr_t)pvDpmAddr, (uint8_t*)pvSrc, ulLen); + LeaveLock(ptSPIParam->pvSerDPMLock); + } + DBG("--SPIHWIFWrite\n"); + return pvDpmAddr; +} + +/* */ +static void* SPIHWIFWrite_ext(struct CIFX_DEVICE_T* ptDevice, void* pvDpmAddr, void* pvSrc, uint32_t ulLen) +{ + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + int writes = ulLen/ptSPIParam->ulChunkSize; + void* ret = NULL; + + while(writes>0) { + ret = SPIHWIFWrite(ptDevice,pvDpmAddr,pvSrc,ptSPIParam->ulChunkSize); + pvDpmAddr = (void*)((uintptr_t)pvDpmAddr + ptSPIParam->ulChunkSize); + pvSrc = (void*)((uintptr_t)pvSrc + ptSPIParam->ulChunkSize); + writes--; + } + if (ulLen%ptSPIParam->ulChunkSize) + ret = SPIHWIFWrite(ptDevice,pvDpmAddr,pvSrc,ulLen%ptSPIParam->ulChunkSize); + + return ret; +} + +/******************************************************************************/ +/*! De-initializes SPI interface of device pointed by ptDevice. + * \param ptDevice Pointer to the custom device */ +/******************************************************************************/ +static void SPIHWIFDeInit(struct CIFX_DEVICE_T* ptDevice) +{ + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + + DBG("++SPIHWIFDeInit\n"); + if(ptSPIParam->pvSerDPMLock) { + DeleteLock(ptSPIParam->pvSerDPMLock); + ptSPIParam->pvSerDPMLock = NULL; + } + close(ptSPIParam->iSPIFD); + + ptSPIParam->eState = eNotInitialized; + DBG("--SPIHWIFDeInit\n"); +} + +int32_t DoDummyRead( struct SPI_PARAM_T* ptSPIParam) +{ + struct spi_ioc_transfer tSPITransfer = {0}; + uint8_t abData[8] = {0}; + uint8_t bRetry = 0; + int32_t lRet = 0; + + /* Do dummy read (required on netX51) */ + tSPITransfer.tx_buf = (unsigned long)abData; + tSPITransfer.rx_buf = (unsigned long)abData; + tSPITransfer.len = sizeof(abData); + tSPITransfer.cs_change = ptSPIParam->bCSChange; + + do { + memset(abData, 0, sizeof(abData)); + abData[0] = 0x80; /* set read request, cmd, A19:16 */ + abData[1] = 0xff; /* A15:8 */ + abData[2] = 0xfc; /* A7:0 */ + abData[3] = 0; /* length */ + + /* issue dummy transfer */ + if(0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_MESSAGE(1), &tSPITransfer))) { + fprintf( stderr, "SPIHWIFInit: Failed to send message on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + ptSPIParam->iError = errno; + } else { + if(bRetry == 0) { + /* skip first result since this is not valid on netX51 */ + DBG("SPI dummy read: Header(0x%02x 0x%02x 0x%02x 0x%02x) Data(0x%02x%02x%02x%02x)\n" + , abData[0], abData[1], abData[2], abData[3], abData[4], abData[5],abData[6], abData[7]); + } + else if(bRetry == 1) { + DBG("SPI read access: Header(0x%02x 0x%02x 0x%02x 0x%02x) Data(0x%02x%02x%02x%02x)\n" + , abData[0], abData[1], abData[2], abData[3], abData[4], abData[5],abData[6], abData[7]); + /* check if DPM is in the correct status (serial DPM enabled and unlocked) */ + if(abData[0] != 0x11) { + lRet = CIFX_FUNCTION_FAILED; + fprintf( stderr, "SPIHWIFInit: Failed to read from serial DPM. Incorrect DPM status of SPI device '%s' (0x%X).\n", ptSPIParam->szName, abData[0]); + fprintf( stderr, "SPIHWIFInit: Check the SPI connection and the serial DPM configuration of the device connected on '%s'.\n", ptSPIParam->szName); + } else { + ptSPIParam->ulUDelay = 0; + ptSPIParam->eState = eInitialized; + } + break; + } + bRetry++; + } + } while(0 <= lRet); + + return lRet; +} + +/******************************************************************************/ +/*! Initializes SPI interface of device pointed by ptDevice. + * \param ptDevice Pointer to the custom device */ +/******************************************************************************/ +static int32_t SPIHWIFInit(struct CIFX_DEVICE_T* ptDevice) +{ + int32_t lRet = 0; + struct SPI_PARAM_T* ptSPIParam = (struct SPI_PARAM_T*)ptDevice->userparam; + + DBG("++SPIHWIFInit\n"); + + if (NULL == ptSPIParam) { + fprintf(stderr, "SPIHWIFInit: Invalid initialization parameter for SPI device '%s'\n", ptSPIParam->szName); + DBG("--SPIHWIFInit\n"); + return CIFX_INVALID_PARAMETER; + } + + DBG("SPIHWIFInit: SPI Setup: %s, mode %d, %d bits/w, %d Hz\n",ptSPIParam->szName, ptSPIParam->bMode, ptSPIParam->bBits, ptSPIParam->ulSpeed); + + if (0 > (ptSPIParam->iSPIFD = open(ptSPIParam->szName, O_RDWR))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to open SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + DBG("--SPIHWIFInit\n"); + return CIFX_FILE_OPEN_FAILED; + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_MODE, &ptSPIParam->bMode))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_MODE' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_MODE, &ptSPIParam->bMode))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_MODE' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_BITS_PER_WORD, &ptSPIParam->bBits))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_BITS_PER_WORD' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_BITS_PER_WORD, &ptSPIParam->bBits))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_BITS_PER_WORD' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_WR_MAX_SPEED_HZ, &ptSPIParam->ulSpeed))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_WR_MAX_SPEED_HZ' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else if (0 > (lRet = ioctl(ptSPIParam->iSPIFD, SPI_IOC_RD_MAX_SPEED_HZ, &ptSPIParam->ulSpeed))) { + ptSPIParam->iError = errno; + fprintf( stderr, "SPIHWIFInit: Failed to set 'SPI_IOC_RD_MAX_SPEED_HZ' on SPI device '%s' - '%s'.\n", ptSPIParam->szName, strerror(errno)); + + } else {/* successfuly initialized SPI interface */ + /* create SPI access lock */ + if (NULL != (ptSPIParam->pvSerDPMLock = (void*)CreateLock())) { + /* Do dummy read (required on netX51) */ + lRet = DoDummyRead(ptSPIParam); + } + } + if(0 > lRet) + SPIHWIFDeInit(ptDevice); + + DBG("--SPIHWIFInit\n"); + + if(0 > lRet) { + return CIFX_FUNCTION_FAILED; + } + else { + ptSPIParam->iError = 0; + return CIFX_NO_ERROR; + } +} + +void StatusCB(struct CIFX_DEVICE_T* ptDevice, CIFX_NOTIFY_E eEvent) +{ + struct SPI_PARAM_T* ptSPIParam = ptDevice->userparam; + + if (eCIFX_EVENT_POSTRESET == eEvent) { + /* we have to do a dummy read since netX device was reset */ + DoDummyRead(ptSPIParam); + } +} + +void SDPMDeInit(struct CIFX_DEVICE_T* ptDevice) +{ + struct SPI_PARAM_T* ptSPIParam = ptDevice->userparam; + + free(ptSPIParam->pabTXBuffer); + free(ptSPIParam->pabRXBuffer); + free(ptSPIParam); + free(ptDevice); +} + +/******************************************************************************/ +/*! Initializes a cifX device for SDPM (usage of SPI). + * \param pszSPIDevice Name of spidev device file (optional) + * \param bMode SPI mode + * \param bBits Bits per SPI word + * \param ulFrequency SPI frequency + * \param pszIRQFile Name of IRQ trigger file (optional) + * \return Pointer to initialized cifX device on success + * NULL on error */ +/******************************************************************************/ +struct CIFX_DEVICE_T* SDPMInit(uint8_t *pszSPIDevice, uint8_t bMode, uint8_t bBits, uint32_t ulFrequency, uint8_t *pszIRQFile, uint32_t ulChunkSize, uint8_t bCSChange) +{ + struct CIFX_DEVICE_T* ptSPIDev = NULL; + struct SPI_PARAM_T* ptSPIParam = NULL; + uint8_t szSPIDevice[261]; + int32_t lFd; + + DBG("++SDPMInit\n"); + + DBG("Running SPI plugin on \"%s\" (mode=%d,bits=%d,freq=%u,chunk=%d,cs-change=%d)!\n", pszSPIDevice, bMode, bBits, ulFrequency, ulChunkSize, bCSChange); + + /* Allocate memory for the cifX device */ + ptSPIDev = calloc( 1, sizeof(*ptSPIDev)); + if(ptSPIDev == NULL) { + fprintf(stderr, "SDPMInit: Allocate memory for the cifX device\n"); + goto error_out; + } + + /* Allocate zero initialized memory for the SPI device */ + ptSPIParam = calloc(1, sizeof(*ptSPIParam)); + if(ptSPIParam == NULL) { + fprintf(stderr, "SDPMInit: Allocate memory for SPI parameters\n"); + goto error_out; + } + + /* Check for a valid SPI device */ + if(pszSPIDevice == NULL) { + struct dirent* entry; + DIR* dir = opendir("/sys/class/spidev"); + + if(NULL != dir) { + while((entry = readdir(dir)) != NULL) { + if((0 == strncmp(entry->d_name, "spidev", 6))) { + snprintf(szSPIDevice, sizeof(szSPIDevice), "/dev/%s", entry->d_name); + pszSPIDevice = szSPIDevice; + break; + } + } + } + } + lFd = open(pszSPIDevice, O_RDWR); + if (lFd < 0) { + fprintf(stderr, "SDPMInit: Invalid or missing SPI device(%s)\n", pszSPIDevice); + goto error_out; + } + close(lFd); + + /* Check for a valid SPI mode */ + if((bMode < SPI_MODE_0) || (SPI_MODE_3 < bMode)) { + fprintf(stderr, "SDPMInit: Invalid SPI mode (%d <= x <= %u)\n", SPI_MODE_0, SPI_MODE_3); + goto error_out; + } + + /* Check for a valid IRQ file (optional) */ + lFd = -1; + if(pszIRQFile != NULL) { + lFd = open(pszIRQFile, O_RDWR|O_NONBLOCK); + if(lFd < 0) { + fprintf(stderr, "SDPMInit: Invalid SPI IRQ file (%s). Fallback to polling!\n", pszIRQFile); + } + } + + /* Configure the SPI device parameter */ + strncpy(ptSPIParam->szName, pszSPIDevice, sizeof(ptSPIParam->szName)); + ptSPIParam->ulUDelay = 0; + ptSPIParam->bMode = bMode; + ptSPIParam->bBits = bBits; + ptSPIParam->ulSpeed = ulFrequency; + ptSPIParam->ulChunkSize = ulChunkSize; + ptSPIParam->bCSChange = bCSChange; + + /* Configuration of a SPI device */ + ptSPIDev->dpm = NULL; /*!< set to 'NULL' since the SPI device is not memory mapped */ + ptSPIDev->dpmaddr = 0x0; /*!< set to '0x00' since there is no direct address to the physical DPM */ + ptSPIDev->dpmlen = 0x10000; /*!< set to length of dpm (depends on the device) */ + + /* Since device is not a uio device and no pci card invalidate all parameter */ + ptSPIDev->uio_num = -1; /*!< set to '-1' since it is no 'uio-devices' */ + ptSPIDev->uio_fd = (lFd >= 0) ? lFd : -1; /*!< set to '-1' since it is no 'uio-devices' */ + ptSPIDev->pci_card = 0; /*!< set to 0 since it is no pci card */ + ptSPIDev->force_ram = 0; /*!< Force usage of RAM instead of flash. Card will always be reset and all + files are downloaded again (0 => autodetect) */ + + /* In this example we are not interrested in any configuration state, so set parameter to NULL */ + ptSPIDev->notify = StatusCB; /*!< Function to call, after the card has passed several stages (usually needed on RAM based + devices, that change DPM configuration during initialization) */ + /* Append any custom parameter */ + ptSPIDev->userparam = ptSPIParam; /*!< Use this parameter to pass SPI interface specific information */ + + /* There is no extra memory */ + ptSPIDev->extmem = NULL; /*!< virtual pointer to extended memory */ + ptSPIDev->extmemaddr = 0x00; /*!< physical address to extended memory */ + ptSPIDev->extmemlen = 0; /*!< Length of extended memory in bytes */ + + /* NOTE: The following parameter are SPI specific */ + + /* Hardware access functions, required to read or write to the hardware */ + ptSPIDev->hwif_init = SPIHWIFInit; /*!< Function initializes SPI hw-function interface (need to be implemented) */ + ptSPIDev->hwif_deinit = SPIHWIFDeInit; /*!< Function de-initializes SPI hw-function interface (need to be implemented) */ + if (0 != ptSPIParam->ulChunkSize) { + ptSPIDev->hwif_read = SPIHWIFRead_ext; /*!< Function realize DPM read access via SPI transfers (need to be implemented) */ + ptSPIDev->hwif_write = SPIHWIFWrite_ext; /*!< Function realize DPM write access via SPI transfers (need to be implemented) */ + } else { + ptSPIDev->hwif_read = SPIHWIFRead; /*!< Function realize DPM read access via SPI transfers (need to be implemented) */ + ptSPIDev->hwif_write = SPIHWIFWrite; /*!< Function realize DPM write access via SPI transfers (need to be implemented) */ + } + /* Allocate buffer for TX SPI-transfers */ + ptSPIParam->pabTXBuffer = malloc(2+DEFAULT_BUFFER_SIZE+3); /* Length field (required by SPIWriteChunk) and SPI header are included */ + if(ptSPIParam->pabTXBuffer == NULL) { + fprintf(stderr, "SDPMInit: Allocate memory for the TX buffer\n"); + goto error_out; + } + *(uint16_t*)ptSPIParam->pabTXBuffer = DEFAULT_BUFFER_SIZE; /* store buffer length */ + + /* Allocate buffer for RX SPI-transfers */ + ptSPIParam->pabRXBuffer = malloc(2+DEFAULT_BUFFER_SIZE+4); /* Length field (required by SPIReadChunk) and SPI header are included */ + if(ptSPIParam->pabRXBuffer == NULL) { + fprintf(stderr, "SDPMInit: Allocate memory for the RX buffer\n"); + goto error_out; + } + *(uint16_t*)ptSPIParam->pabRXBuffer = DEFAULT_BUFFER_SIZE; /* store buffer length */ + + DBG("--SDPMInit\n"); + return ptSPIDev; + +error_out: + if (ptSPIParam) { + free(ptSPIParam->pabTXBuffer); + free(ptSPIParam->pabRXBuffer); + } + free(ptSPIParam); + free(ptSPIDev); + close(lFd); + DBG("--SDPMInit\n"); + return NULL; +} + diff --git a/plugins/netx-spm/libsdpm.h b/plugins/netx-spm/libsdpm.h new file mode 100644 index 0000000..647175d --- /dev/null +++ b/plugins/netx-spm/libsdpm.h @@ -0,0 +1,24 @@ +/************************************************************************************** + * + * Copyright (c) 2024, Hilscher Gesellschaft fuer Systemautomation mbH. All Rights Reserved. + * + * Changes: + * + * Version Date Author Description + * ---------------------------------------------------------------------------------- + * 1 02.01.24 SD changed licensing terms + * + **************************************************************************************/ + +/******************************************************************************/ +/*! Initializes a cifX device for SDPM (usage of SPI). + * \param pszSPIDevice Name of spidev device file (optional) + * \param bMode SPI mode + * \param bBits Bits per SPI word + * \param ulFrequency SPI frequency + * \param pszIRQFile Name of IRQ trigger file (optional) + * \return Pointer to initialized cifX device on success + * NULL on error */ +/******************************************************************************/ +struct CIFX_DEVICE_T* SDPMInit(uint8_t *pszSPIDevice, uint8_t bMode, uint8_t bBits, uint32_t ulFrequency, uint8_t *pszIRQFile, uint32_t ulChunkSize, uint8_t bCSChange); +void SDPMDeInit( struct CIFX_DEVICE_T* ptDevice); diff --git a/plugins/readme.md b/plugins/readme.md new file mode 100644 index 0000000..c5ec94a --- /dev/null +++ b/plugins/readme.md @@ -0,0 +1,30 @@ + +## Linux cifX plugin interface + +The libcifx plugins allow an interface independant access to netX devices. It is based on the cifX toolkit HW function interface. + +Currently a SPI sample interface is provided, which is able to work with Linux SPI devices. + +The easiest way is to build the driver with SPI plugin support enabled (manual way -> build option: SPM_PLUGIN). + +The driver's installation process will automatically create a plugin directory in the driver's configuration path (default: "/opt/cifx/plugins"). + +After the installation adapt the SPI plugin configuration (/opt/cifx/plugins/netx-spm/config0) according to your needs and run the application to access a SPI device. + +| parameter | | +| -------------- |:-------------:| +| Device | Name of the SPI device to open (e.g. /dev/spidev0.0 -> Device=spidev0.0) +| Speed | Maximum speed to configure the driver (e.g. 25Mhz -> Speed=25000000) +| Mode | SPI mode 0 to 3 +| ChunkSize | Chunk size (maximum size of transfer after which a new transfer will be automatically setup in bytes). If set to 0, no transfer splitting will be executed. e.g. Split transfers in case it is larger than 250 byte => ChunkSize=250 +| Irq | Path to irq file, e.g. /sys/class/gpio/gpio1/value + +## IRQ configuration + +If using GPIO-based IRQ, only edge may be available while the netX works level oriented. +Therefore, the driver internal compensates this but requires the following GPIO settings: +``` +direction=in +edge=rising +active_low=1 +``` \ No newline at end of file diff --git a/readme.md b/readme.md new file mode 100644 index 0000000..d267fd7 --- /dev/null +++ b/readme.md @@ -0,0 +1,191 @@ +# Overview + +![](doc/drv_overview.png) + +The Linux cifX driver provides support of multiple devices of the [cifX product portfolio](https://www.hilscher.com/products/pc-cards-for-industrial-ethernet-fieldbus). +The driver consists of a user space and a kernel space component. Depending on your hardware both or only the user space component will be required. + +| hardware | libcifx | uio_netx +| ------------------------------ |:-------------:|:-------------:| +| PCI based host interface | (x) | (x) +| SPI based host interface | (x) | (-) +| ISA or other memory mapped | (x) | (optional) + +Note that this documentation currently provides only a short overview. It will be updated step by step. Transitionally refer to the [superseded driver's documentation](doc/OBSOLETE-cifX-Device-Driver-Linux-DRV-15-EN.pdf). Commands mentioned here +may not work 1:1 since the driver's folder structure changed but it provides background information and still some valid hints. + +Note: When the PCI interface is not required remember to disable it. Only then the libcifx's dependency to libpciaccess-dev library will be removed (see "DISABLE_PCI", Manual driver installation). + +For SPI support use the driver's SPM plugin. It provides an easy integration for SPI devices. The plugin need to be enabled during build, since it's disabled by default. +
+
+
+
+# Requirements + + - CMake (min 2.8.12) + - Linux kernel header (only required when building the kernel module uio_netx) + - libpciaccess-dev (only required for PCI devices) + - libpthread, librt + - libnl-3/libnl-cli-3 (only required when VIRTETH is enabled) + +``` +sudo apt-get install cmake +``` +``` +sudo apt-get install linux-headers-$(uname -r) +``` +``` +sudo apt-get install libpciaccess-dev +``` +``` +sudo apt-get install libnl-3-dev libnl-cli-3-dev +``` +
+
+
+
+# Simple driver installation in one step + +You can run the driver installation by simply executing the script 'build_and_install_driver'. + +Enter the directory containing the script 'build_and_install_driver' execute it and follow the instructions (root during installation requested) +``` +./build_install_driver +``` + +In case a more advanced setup is required or any installation trouble run the setup step by step. +
+
+
+
+# Manual driver installation + +## Build of the user space library libcifx + +1. create a build folder and enter it +``` +mkdir drv_build; cd drv_build +``` +2. Prepare the build environment via cmake call and pass the path to the driver's lists file (CMakelists.txt within libcifx folder). +Run the preparation with your required options e.g. enable debug messages: +``` +cmake ../ -DDEBUG=ON +``` + +All possible options are listed here: + +| parameter | description | +| ------------------------------ |:-------------:| +| DEBUG | Build with debug messages enabled. +| DISABLE_PCI | Disable PCI support. This will remove all links to libpciaccess. +| DMA | Enables DMA support. +| HWIF | Enables support for custom hardware interface. +| NO_MINSLEEP | Disables minimum sleep time. If “on” the driver may “wait active” (no call to pthread_yield()). +| SPM_PLUGIN | Enables support for SPI devices (spidev framework). +| TIME | Enables toolkit function, setting the device time during device start-up. +| VIRTETH | Enables support for the netX based virtual Ethernet interface. Note: This feature requires dedicated hardware and firmware. + +3. build and install the driver +``` +make; sudo make install +``` +
+
+
+## Build of the kernel space driver uio_netx + +1. Enter the module's source folder uio_netx and run make. +``` +make +``` +2. Then install the module according to your system's setup and update the module dependencies e.g: +``` +sudo cp uio_netx.ko /lib/modules/$(uname -r)/kernel/drivers/uio/ +sudo depmod +``` +
+
+
+
+# System and hardware setup + +## System configuration +Depending on your system's setup only privileged users may be allowed to access the hardware. + +### PCI host interface + +To be able to access the a PCI card as an unprivileged user use the provided udev rule (templates/udev/80-udev-netx.rules). +Make sure to load the kernel module before running the test application. Otherwise no hardware will be created an therefore the access fail. +In case your kernel provides already the mainline uio_netx module. Make sure to unload this before to run latest version of it. +To load the kernel module run the following line. +``` +sudo modprobe uio_netx +``` + +To unload the kernel module run the following line. +``` +sudo modprobe -r uio_netx +``` + +
+
+
+### SPI host interface + +To be able to access a SPI device make sure to allow read/write access to the SPI interface (e.g. /dev/spidev0.0). +The SPI plugin default configuration is stored under "/opt/cifx/plugins/netx-spm/config0". Make sure to update the configuration as required. + +| parameter | | +| -------------- |:-------------:| +| Device | Name of the SPI device to open (e.g. /dev/spidev0.0 -> Device=spidev0.0) +| Speed | Maximum speed to configure the driver (e.g. 25Mhz -> Speed=25000000) +| Mode | SPI mode 0 to 3 + +
+
+
+## Hardware configuration +Depending on the hardware we need to prepare the host system to be able to access the hardware. Flash based devices may not require any system setup to run a simple demo application. +In contrast to that a RAM based device like the common cifX PCIe hardware, the driver need to download at least a second stage loader to run a simple test application. +For more advanced API tests a firmware and dedicated firmware configuration file is required. + +The driver uses a simple folder structure to store the bootloader and firmware for each hardware. The driver supports four different methods of how to identify the devices and handling their firmware and configuration assignments. +In the following the most simple (at the expense of the support of multiple devices at a time) called "single directory" is explained. + +![](doc/drv_config.png) + +This folder structure can be created by using the provided script. The script also installs the required boot loader. +Enter the script folder and install the boot loader and create the required folder structure. +``` +./install_firmware install +./install_firmware create_single_dir +``` + +The script should have now created the base directory "/opt/cifx/" with the subfolders "deviceconfig", "deviceconfig/FW" and "deviceconfig/FW/channel0". Further it should have installed the boot loader within the base directory. + +When running now an example application a small set of tests will work. For an advanced test copy the correct firmware and it's configuration into the 'channel0' folder within the configuration directory. + +
+
+
+
+# Build of the provided example applications +1. create a build folder and enter it +``` +mkdir demo_build; cd demo_build +``` +2. Prepare the build environment via cmake call and pass the path to the examples lists (CMakelists.txt within examples folder) file. +Run the preparation with your required options e.g.: +``` +cmake ../examples/ -DDEBUG=ON +``` +3. Build the examples. And run a demo application. Note that you may need root rights. This depends on your system setup. For more information see "System and hardware setup". +``` +make +./cifxapi +``` + + + + diff --git a/scripts/device.conf b/scripts/device.conf new file mode 100644 index 0000000..a85e881 --- /dev/null +++ b/scripts/device.conf @@ -0,0 +1,3 @@ +alias=MyAlias +irq=no +dma=no \ No newline at end of file diff --git a/scripts/install_firmware b/scripts/install_firmware new file mode 100755 index 0000000..ef322b8 --- /dev/null +++ b/scripts/install_firmware @@ -0,0 +1,103 @@ +#!/bin/bash + +default_path=$(dirname $(realpath $0))"/../BSL/" + +case "$1" in + "install") + + if [ -n "$2" ]; then + default_path=$2 + fi + + if + [ -e "$default_path/NETX100-BSL.bin" ]; then + echo "Creating directory /opt/cifx/deviceconfig/"; + sudo mkdir -p /opt/cifx/ + sudo mkdir -p /opt/cifx/deviceconfig/ + if [ "$?" = "0" ]; then + echo "Copying bootloader files to /opt/cifx/" + sudo cp "${default_path}/"* /opt/cifx/ + fi + else + echo "Searching in $default_path! No bootloader files found!" + fi + ;; + + "add_device") + if [ -n "$2" ]; then + device_num=$2 + + if [ -n "$3" ]; then + serial_num=$3 + echo "Creating directory /opt/cifx/deviceconfig/$device_num/$serial_num/channel0"; + sudo mkdir -p /opt/cifx/deviceconfig/$device_num/ + sudo mkdir -p /opt/cifx/deviceconfig/$device_num/$serial_num/ + sudo mkdir -p /opt/cifx/deviceconfig/$device_num/$serial_num/channel0 + + if [ "$?" = "0" ]; then + echo "Copying default config"; + sudo cp ./device.conf /opt/cifx/deviceconfig/$device_num/$serial_num/ + fi + else + echo "Serial number required! Run \"install_firmware help\"" + fi + else + echo "Device number required! Run \"install_firmware help\"" + fi + + ;; + "create_single_dir") + echo "Creating directory /opt/cifx/deviceconfig/FW/channel0"; + sudo mkdir -p /opt/cifx/deviceconfig/FW/ + sudo mkdir -p /opt/cifx/deviceconfig/FW/channel0 + + if [ "$?" = "0" ]; then + echo "Copying default config"; + sudo cp ./device.conf /opt/cifx/deviceconfig/FW/ + fi + + ;; + + "add_slot_dir") + if [ -n "$2" ]; then + slot_num=$2 + if [ $slot_num -ge 1 ] && [ $slot_num -le 9 ]; then + echo "Creating directory /opt/cifx/deviceconfig/Slot_$slot_num/channel0"; + sudo mkdir -p /opt/cifx/deviceconfig/Slot_$slot_num/ + sudo mkdir -p /opt/cifx/deviceconfig/Slot_$slot_num/channel0 + + if [ "$?" = "0" ]; then + echo "Copying default config"; + sudo cp ./device.conf /opt/cifx/deviceconfig/Slot_$slot_num/ + fi + else + echo "Enter slot number between 1..9!"; + fi + else + echo "Slot number required! Run \"install_firmware help\"" + fi + ;; + + *) echo "Unknown parameter!" + echo "Options:" + echo "install:" + echo "-> Creates directory \"/opt/cifx/deviceconfig/\" and installs bootloader" + echo "\nadd_device [device number] [serial number]:" + echo "-> Creates configuration directory for device with" + echo " [device number] and [serial number] and adds default" + echo " configuration file \"device.conf\"" + echo " e.g. \"install_firmware add_device 1250400 20087\"" + echo " results in" + echo " \"/opt/cifx/deviceconfig/1250400/20087/channel0/\"" + echo "\ncreate_single_dir:" + echo "-> Creates directory /opt/cifx/FW and adds default" + echo " configuration file \"device.conf\"" + echo "\nadd_slot_dir [1..9]:" + echo "-> Creates directory /opt/cifx/Slot_[Slotnumber] and adds default" + echo " configuration file \"device.conf\"" + echo " e.g. \"install_firmware add_slot_dir 1\"" + echo " results in" + echo " \"/opt/cifx/deviceconfig/Slot_1/channel0/\"" + echo "\nFor more information of the device configuration directories" + echo "see Linux cifX Driver manual." +esac diff --git a/scripts/install_libcifx b/scripts/install_libcifx new file mode 100755 index 0000000..6aaed9b --- /dev/null +++ b/scripts/install_libcifx @@ -0,0 +1,58 @@ +#!/bin/bash -e + +drv_dir=$(dirname $(realpath $0))"/../libcifx/" +buildfolder="${drv_dir}" + +if (( "$#" >= "1" )); then + if [ -d $1 ]; then + buildfolder=$(realpath $1) + fi +fi + + # build and install user space library + echo "To enable build of debug symbols type 'y' else 'n':" + read debug_enable + if [ "$debug_enable" == "y" ]; then + options="$options -DDEBUG=ON" + else + options="$options -DDEBUG=OFF" + fi + echo "To enable dma support type 'y' else 'n':" + echo "NOTE: This feature requires to build uio_netx also with dma support!" + read debug_enable + if [ "$debug_enable" == "y" ]; then + options="$options -DDMA=ON" + else + options="$options -DDMA=OFF" + fi + echo "To enable ethernet support type 'y' else 'n':" + echo "NOTE: This feature requires dedicated hardware and firmware!" + read ethernet_enable + if [ "$ethernet_enable" == "y" ]; then + options="$options -DVIRTETH=ON" + else + options="$options -DVIRTETH=OFF" + fi + echo "To enable SPI plugin support type 'y' else 'n':" + read spi_plugin_enable + if [ "$spi_plugin_enable" == "y" ]; then + options="$options -DSPM_PLUGIN=ON" + else + options="$options -DSPM_PLUGIN=OFF" + fi + tmp_dir=$pwd + cd "${buildfolder}" + if ! cmake "${drv_dir}" ${options}; then + echo "Error preparing environment!" + elif ! make clean; then + echo "Error clean up library libcifx!" + elif ! make ; then + echo "Error building user space library libcifx!" + else + if ! sudo make install; then + echo "Error installing userspace driver!" + else + echo "cifX driver successfully installed!" + fi + fi + cd "${tmp_dir}" diff --git a/scripts/install_uio_netx b/scripts/install_uio_netx new file mode 100755 index 0000000..38d8b34 --- /dev/null +++ b/scripts/install_uio_netx @@ -0,0 +1,75 @@ +#!/bin/bash + +kernel_dir=/lib/modules/$(uname -r)/build/ + +# do not change +default_path=$(dirname $(realpath $0))"/../uio_netx/" +cur_dir=$PWD + +buildfolder="${default_path}" +if (( "$#" >= "2" )); then + if [ -d $2 ]; then + buildfolder=$(realpath $2) + cp -r "${default_path}/"* "${buildfolder}" + fi +fi + +case "$1" in + "build") + if [ -e "${buildfolder}/uio_netx.c" ]; then + echo "To enable DMA support type 'y' else 'n':" + read dma_enable + if [ "$dma_enable" != "y" ]; then + echo "Compile kernel module uio_netx.ko (DMA disabled)" + cd "${buildfolder}" && make clean; make KDIR=$kernel_dir DMA_DISABLE=1 + else + echo "Compile kernel modules uio.ko/uio_netx.ko (DMA enabled)" + cd "${buildfolder}" && make clean; make KDIR=$kernel_dir + fi + else + echo "Searching in $buildfolder! uio_netx.c not found!" + fi + cd "${cur_dir}" + ;; + + "install") + if + [ -e "${buildfolder}/uio_netx.ko" ]; then + echo "Copying kernel module uio_netx.ko to '/lib/modules/$(uname -r)/kernel/drivers/uio/'" + sudo cp "${buildfolder}/uio_netx.ko" /lib/modules/$(uname -r)/kernel/drivers/uio/ + else + echo "Searching in ${buildfolder}! uio_netx.ko not found!" + echo "A prior call \"install_uio_netx install\" fix this problem!" + fi + ;; + + "update") + echo "Updating kernel module dependencies." + sudo depmod + ;; + + "load") + if + [ -e "/lib/modules/$(uname -r)/kernel/drivers/uio/uio_netx.ko" ]; then + echo "Loading kernel module uio_netx.ko." + sudo modprobe uio_netx + else + echo "Kernel module uio_netx.ko currently not installed!" + echo "First call \"install_uio_netx install\"" + echo "Then call \"install_uio_netx update\" to fix this problem!" + fi + ;; + + "unload") + echo "Unload kernel module uio_netx!" + sudo modprobe -r uio_netx + ;; + + *) echo "Unknown parameter!" + echo "Valid options:" + echo "-> build : Builds kernel module uio_netx.ko." + echo "-> install: Copies the kernel modules into the target directory." + echo "-> update : Updates the kernel module dependencies." + echo "-> load : Loads the kernel module." + echo "-> unload : Unloads the kernel module." +esac \ No newline at end of file diff --git a/templates/cifx/device.conf b/templates/cifx/device.conf new file mode 100644 index 0000000..a85e881 --- /dev/null +++ b/templates/cifx/device.conf @@ -0,0 +1,3 @@ +alias=MyAlias +irq=no +dma=no \ No newline at end of file diff --git a/templates/netx.dtsi b/templates/netx.dtsi new file mode 100644 index 0000000..ba1921c --- /dev/null +++ b/templates/netx.dtsi @@ -0,0 +1,14 @@ +#include + +/ { + netX0: netX@f8034000 { + status = "ok"; + compatible = "hilscher,uio-netx"; + reg = <0xf8034000 0x10000>; // can be multiple (1. DPM 2... extended memory) + interrupt-names = "card"; // only "card" supported + interrupts = <168 IRQ_TYPE_LEVEL_HIGH>; + dma = <1>; // enable / disable + startuptype = "auto"; // specifies startup behaviour: flash,ram,auto,donttouch + alias = "custom-device"; // device name + }; +}; \ No newline at end of file diff --git a/templates/plugins/netx-spm/config0 b/templates/plugins/netx-spm/config0 new file mode 100644 index 0000000..4fe5580 --- /dev/null +++ b/templates/plugins/netx-spm/config0 @@ -0,0 +1,5 @@ +Device=spidev0.0 +Speed=25000000 +Mode=3 +ChunkSize=0 +CSChange=0 diff --git a/templates/udev/80-udev-cifxeth.rules b/templates/udev/80-udev-cifxeth.rules new file mode 100644 index 0000000..83b2712 --- /dev/null +++ b/templates/udev/80-udev-cifxeth.rules @@ -0,0 +1,2 @@ +SUBSYSTEMS=="net",ACTION=="add",KERNEL=="cifx*",PROGRAM="/bin/bash -c '/etc/init.d/cifxeth start cifx%n'" +SUBSYSTEMS=="net",ACTION=="remove",KERNEL=="cifx*",PROGRAM="/bin/bash -c '/etc/init.d/cifxeth stop cifx%n'" diff --git a/templates/udev/80-udev-netx.rules b/templates/udev/80-udev-netx.rules new file mode 100644 index 0000000..d769532 --- /dev/null +++ b/templates/udev/80-udev-netx.rules @@ -0,0 +1 @@ +SUBSYSTEMS=="pci",ATTRS{vendor}=="0x15cf",ATTRS{device}=="0x0000",MODE="0666",PROGRAM="/bin/bash -c 'chmod 0666 /sys/class/uio/uio%n/device/config'" diff --git a/templates/udev/cifxeth b/templates/udev/cifxeth new file mode 100755 index 0000000..f8f1cff --- /dev/null +++ b/templates/udev/cifxeth @@ -0,0 +1,36 @@ +#!/bin/sh -e +### BEGIN INIT INFO +# Provides: netX based virtual ethernet interfaces +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: +# Default-Stop: +# Short-Description: Raise and configure the netX based virtual ethernet interfaces +### END INIT INFO + +case "$1" in +start) + ifconfig $2 up + # default to dhcp + dhclient $2 + ;; + +stop) + ifconfig $2 down + ;; + +force-reload|restart) + ifconfig $2 down + ifconfig $2 up + dhclient $2 + ;; + +*) + echo "Usage: /etc/init.d/cifxeth {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/uio_netx/Makefile b/uio_netx/Makefile new file mode 100644 index 0000000..2914bd2 --- /dev/null +++ b/uio_netx/Makefile @@ -0,0 +1,37 @@ +obj-m := uio_netx.o + +TMPKDIR := /lib/modules/$(shell uname -r)/build +TMPINSTALLPATH := kernel/drivers/uio/ +TMPSYMVERS := /lib/modules/$(shell uname -r)/build/Module.symvers + +ifdef KDIR + ifneq ($KDIR, "") + TMPKDIR=$(KDIR) + endif +endif + +ifdef SYMVERS + ifneq ($SYMVERS, "") + TMPSYMVERS := "$(SYMVERS)" + endif +endif + +ifdef INSTALL_PATH + ifneq ($INSTALL_PATH, "") + TMPINSTALLPATH := $(INSTALL_PATH) + endif +endif + +ifndef DMA_DISABLE + ccflags-y += -DDMA_SUPPORT +endif + +PWD := $(shell pwd) +default: + $(MAKE) -C $(TMPKDIR) M=$(PWD) modules + +clean: + rm -f *.o *.ko *.order *.mod* Module.symvers + +modules_install: + $(MAKE) INSTALL_MOD_DIR=$(TMPINSTALLPATH) -C $(TMPKDIR) M=$(PWD) modules_install \ No newline at end of file diff --git a/uio_netx/readme.md b/uio_netx/readme.md new file mode 100644 index 0000000..9f8f9d0 --- /dev/null +++ b/uio_netx/readme.md @@ -0,0 +1,13 @@ + +## Overview uio_netx kernel module + +The module provides the automatic mapping of Hilscher netX PCI device to user space, which then will be handled by the user space library libcifx. +It provides as well mapping of non-PCI devices by passing the device memory information. + +Example for an ISA device at physical address 0xD0000 and DPM length of 0x4000 and irq line 5. + +``` +modprobe uio_netx custom_dpm_addr=0xD0000 custom_dpm_len=0x4000 custom_irq=5 +``` + +Set to custom_irq to "0" if polling not connected or polling is to be used. diff --git a/uio_netx/uio_netx.c b/uio_netx/uio_netx.c new file mode 100644 index 0000000..5f7e9bc --- /dev/null +++ b/uio_netx/uio_netx.c @@ -0,0 +1,929 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UIO Hilscher netX card driver + * + * (C) 2007 Hans J. Koch + * (C) 2013 Sebastian Doell Added DMA Support + * (C) 2014 Sebastian Doell Added support for memory mapped + * devices given by user via command line (e.g. ISA) + * (C) 2017 Sebastian Doell Added device-tree support + * (C) 2019 Sebastian Doell Added netx4000 support + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_OF + #include + #include + #include +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) + #define ioremap_nocache ioremap +#endif + +#define MAX_USER_CARDS 10 + +#define UIO_NETX_VERSION "2.2.0" + +int addr_cnt = 0; +unsigned long custom_dpm_len[MAX_USER_CARDS] = {0}; +int len_cnt = 0; +int custom_irq[MAX_USER_CARDS] = {0}; +int irq_cnt = 0; + +#ifdef CONFIG_64BIT + phys_addr_t custom_dpm_addr[MAX_USER_CARDS] = {0}; + module_param_array(custom_dpm_addr, ullong, &addr_cnt, S_IRUGO); +#else + unsigned long custom_dpm_addr[MAX_USER_CARDS] = {0}; + module_param_array(custom_dpm_addr, ulong, &addr_cnt, S_IRUGO); +#endif +MODULE_PARM_DESC(custom_dpm_addr, "Start address of DPM (array)"); +module_param_array(custom_dpm_len, ulong, &len_cnt, S_IRUGO); +MODULE_PARM_DESC(custom_dpm_len, "Length of DPM (array)"); +module_param_array(custom_irq, int, &irq_cnt, S_IRUGO); +MODULE_PARM_DESC(custom_irq, "IRQ number (array)"); + +#ifdef DMA_SUPPORT +#define DMA_BUFFER_COUNT 1 +#define DMA_BUFFER_SIZE 8*8*1024 + +unsigned long dma_disable = 0; +unsigned long dma_buffer_count = DMA_BUFFER_COUNT; +unsigned long dma_buffer_size = DMA_BUFFER_SIZE; + +module_param(dma_disable, ulong, S_IRUGO); +MODULE_PARM_DESC(dma_disable, "Disable DMA buffer allocation."); +module_param(dma_buffer_count, ulong, S_IRUGO); +MODULE_PARM_DESC(dma_buffer_count, "Number of DMA-buffers to use."); +module_param(dma_buffer_size, ulong, S_IRUGO); +MODULE_PARM_DESC(dma_buffer_size, "Size of a DMA-buffer."); +#endif + +#define PCI_VENDOR_ID_HILSCHER 0x15CF +#define PCI_DEVICE_ID_HILSCHER_NETX 0x0000 +#define PCI_DEVICE_ID_HILSCHER_NETPLC 0x0010 +#define PCI_DEVICE_ID_HILSCHER_NETJACK 0x0020 +#define PCI_DEVICE_ID_HILSCHER_NETX4000 0x4000 +#define PCI_SUBDEVICE_ID_NXSB_PCA 0x3235 +#define PCI_SUBDEVICE_ID_NXPCA 0x3335 +#define PCI_SUBDEVICE_ID_NETPLC_RAM 0x0000 +#define PCI_SUBDEVICE_ID_NETPLC_FLASH 0x0001 +#define PCI_SUBDEVICE_ID_NETJACK_RAM 0x0000 +#define PCI_SUBDEVICE_ID_NETJACK_FLASH 0x0001 + +#define DPM_HOST_INT_EN0 0xfff0 +#define DPM_HOST_INT_STAT0 0xffe0 +#define PLX_GPIO_OFFSET 0x15 +#define PLX_TIMING_OFFSET 0x0a + +#define DPM_HOST_INT_MASK 0xe600ffff +#define DPM_HOST_INT_GLOBAL_EN 0x80000000 +#define PLX_GPIO_DATA0_MASK 0x00000004 +#define PLX_GPIO_DATA1_MASK 0x00000020 + +#define NX_PCA_PCI_8_BIT_DPM_MODE 0x5431F962 +#define NX_PCA_PCI_16_BIT_DPM_MODE 0x4073F8E2 +#define NX_PCA_PCI_32_BIT_DPM_MODE 0x40824122 + +#define NETX_DPM_SIZE_64K 0x10000 + +/* number of bar */ +#define DPM_BAR 0 /* points to the DPM -> netX, netPLC, netJACK */ +#define EXT_MEM_BAR 1 /* points to the optional extended memory */ +#define PLX_DPM_BAR 2 /* points to the DPM -> netXPLX */ +#define PXA_PLX_BAR 0 /* timing config register */ + +/* index of uio_info structure's memory array */ +#define DPM_INDEX 0 /* first mapping describes DPM */ +#define EXT_MEM_INDEX 1 /* second mapping describes extended memory */ + +#define DPM_MEM_NAME "dpm" +#define EXT_MEM_NAME "extmem" +#define DMA_MEM_NAME "dma" + +DEFINE_MUTEX(custom_list_lock); +uint8_t card_count = 0; + +struct pxa_dev_info { + uint32_t __iomem *plx; + uint8_t dpm_mode; + uint32_t plx_timing; +}; + +struct uio_netx_priv { + int32_t dmacount; + int32_t memcount; + struct pxa_dev_info *pxa_info; + int8_t no_irq_stat; +}; + + +#define NETX_NAME_LEN_MAX 64 +struct netx_custom_dev { + struct list_head list; + struct miscdevice* misc; + struct uio_info* info; + struct device* dev; +#ifdef DMA_SUPPORT + int dma_enable; +#endif + char device_name[NETX_NAME_LEN_MAX]; + phys_addr_t* dpm_addr; + unsigned long* dpm_len; + int* irq; +}; + +static LIST_HEAD(custom_list); + +static int netx_enable_irq(struct uio_info *dev_info, s32 irq_on) +{ + if (dev_info->irq == 0) + return -EPERM; /* Not supported! -> there is no interrupt registered */ + + return 0; +} + +static irqreturn_t netx_handler(int irq, struct uio_info *dev_info) +{ + if(((struct uio_netx_priv*)dev_info->priv)->pxa_info != NULL) + { + /* This is a PLX device and cannot produce an IRQ */ + return IRQ_NONE; + } else + { + /* check if the device provides a global interrupt status reg */ + if (!((struct uio_netx_priv*)dev_info->priv)->no_irq_stat) { + + void __iomem *int_enable_reg = dev_info->mem[0].internal_addr + + DPM_HOST_INT_EN0; + void __iomem *int_status_reg = dev_info->mem[0].internal_addr + + DPM_HOST_INT_STAT0; + + /* Is one of our interrupts enabled and active ? */ + if (!(ioread32(int_enable_reg) & ioread32(int_status_reg) + & DPM_HOST_INT_MASK)) + return IRQ_NONE; + + /* Disable interrupt */ + iowrite32(ioread32(int_enable_reg) & ~DPM_HOST_INT_GLOBAL_EN, + int_enable_reg); + } + return IRQ_HANDLED; + } +} + +static int netx_pxa_set_plx_timing(struct uio_info *info) +{ + struct uio_netx_priv *priv = (struct uio_netx_priv *) info->priv; + uint32_t __iomem *plx_timing; + if (!priv->pxa_info) + return -ENODEV; + plx_timing = priv->pxa_info->plx + PLX_TIMING_OFFSET; + *plx_timing = priv->pxa_info->plx_timing; + return 0; +} + +static int netx_pxa_get_plx_timing(struct uio_info *info) +{ + struct uio_netx_priv *priv = (struct uio_netx_priv *) info->priv; + if (!priv->pxa_info) + return -ENODEV; + switch (priv->pxa_info->dpm_mode) { + case 8: + priv->pxa_info->plx_timing = NX_PCA_PCI_8_BIT_DPM_MODE; + break; + case 16: + priv->pxa_info->plx_timing = NX_PCA_PCI_16_BIT_DPM_MODE; + break; + case 32: + priv->pxa_info->plx_timing = NX_PCA_PCI_32_BIT_DPM_MODE; + break; + default: + return -EINVAL; + } + return 0; +} + +static int netx_pxa_get_dpm_mode(struct uio_info *info) +{ + struct uio_netx_priv *priv = (struct uio_netx_priv *) info->priv; + uint32_t __iomem *plx_gpio; + if (!priv->pxa_info) + return -ENODEV; + plx_gpio = priv->pxa_info->plx + PLX_GPIO_OFFSET; + if ((*plx_gpio & PLX_GPIO_DATA0_MASK) && + ~(*plx_gpio & PLX_GPIO_DATA1_MASK)) + priv->pxa_info->dpm_mode = 8; + else if (~(*plx_gpio & PLX_GPIO_DATA0_MASK) && + (*plx_gpio & PLX_GPIO_DATA1_MASK)) + priv->pxa_info->dpm_mode = 32; + else if (~(*plx_gpio & PLX_GPIO_DATA0_MASK) && + ~(*plx_gpio & PLX_GPIO_DATA1_MASK)) + priv->pxa_info->dpm_mode = 16; + else + return -EINVAL; + return 0; +} + +#ifdef DMA_SUPPORT +int create_dma_buffer(struct device *dev, struct uio_info *info, struct uio_mem *dma_mem) +{ + void __iomem *addr; + dma_addr_t busaddr; + + /* Allocate DMA-capable buffer */ + addr = dma_alloc_coherent(dev, dma_buffer_size, + &busaddr, + GFP_KERNEL); + if (!addr) { + dev_warn(dev, "Unable to allocate requested DMA-capable" + " block of size 0x%lx during mmap in uio.\n", + dma_buffer_size); + return -ENOMEM; + } + + /* Store the physical address and index as the + * first two long words for userspace access */ + memset(addr ,0 ,dma_buffer_size); + dma_mem->addr = busaddr; + dma_mem->internal_addr = addr; + dma_mem->size = dma_buffer_size; + dma_mem->name = DMA_MEM_NAME; + dma_mem->memtype = UIO_MEM_PHYS; + return 0; +} + +int release_dma_mem(struct device *dev, struct uio_info *info) +{ + struct uio_netx_priv *priv = info->priv; + + while(priv->dmacount-->0) { + priv->memcount--; + dma_free_coherent(dev, + info->mem[priv->memcount].size, + (void*)(info->mem[priv->memcount].internal_addr), + (dma_addr_t) info->mem[priv->memcount].addr); + info->mem[priv->memcount].addr = 0; + info->mem[priv->memcount].size = 0; + info->mem[priv->memcount].internal_addr = 0; + } + return 0; +} + +static int add_dma(struct device *dev, struct uio_info *info) +{ + struct uio_netx_priv *priv = info->priv; + int i = 0; + int ret = 0; + + if (MAX_UIO_MAPS<(priv->memcount+dma_buffer_count)) { + dev_info(dev, "Base uio driver does not serve enough memory\n" + "regions for dma allocation (see MAX_UIO_MAPS)!\n"); + return -ENOMEM; + } + for (;imem[i+priv->memcount]))) + goto err_dma; + dev_info(dev, "DMA buffer allocated (addr/size:0x%llX/0x%lX)\n", + info->mem[i+priv->memcount].addr, + (long unsigned int)info->mem[i+priv->memcount].size); + priv->dmacount++; + } + priv->memcount+=dma_buffer_count; + return 0; +err_dma: + release_dma_mem(dev, info); + return ret; +} +#endif + +#ifndef __devinit + #define __devinit +#endif + +static int __devinit netx_pci_probe(struct pci_dev *dev, + const struct pci_device_id *id) +{ + struct uio_info *info; + int bar; + info = kzalloc(sizeof(struct uio_info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->version = UIO_NETX_VERSION; + if (!(info->priv = (struct uio_netx_priv *) kzalloc(sizeof(struct uio_netx_priv), GFP_KERNEL))) + goto out_priv; + if (pci_enable_device(dev)) + goto out_free; + if (pci_request_regions(dev, "netx")) + goto out_disable; + switch (id->device) { + case PCI_DEVICE_ID_HILSCHER_NETX: + bar = DPM_BAR; + info->name = "netx"; + break; + case PCI_DEVICE_ID_HILSCHER_NETPLC: + bar = DPM_BAR; + info->name = "netplc"; + break; + case PCI_DEVICE_ID_HILSCHER_NETJACK: + bar = DPM_BAR; + info->name = "netjack"; + break; + case PCI_DEVICE_ID_HILSCHER_NETX4000: + bar = DPM_BAR; + info->name = "netx"; + break; + default: + bar = PLX_DPM_BAR; + info->name = "netx_plx"; + } + /* BAR 0 or 2 points to the card's dual port memory */ + info->mem[DPM_INDEX].addr = pci_resource_start(dev, bar); + if (!info->mem[DPM_INDEX].addr) { + dev_err( &dev->dev, "Error retrieving the memory address of the device!\n"); + goto out_release; + } + + info->mem[DPM_INDEX].internal_addr = ioremap_nocache( + pci_resource_start(dev, bar), + pci_resource_len(dev, bar)); + + if (!info->mem[DPM_INDEX].internal_addr) { + dev_err( &dev->dev, "Error mapping the DPM of the device!\n"); + goto out_release; + } + + dev_info(&dev->dev, "DPM at 0x%llX\n", info->mem[DPM_INDEX].addr); + info->mem[DPM_INDEX].size = pci_resource_len(dev, bar); + info->mem[DPM_INDEX].memtype = UIO_MEM_PHYS; + info->mem[DPM_INDEX].name = DPM_MEM_NAME; + ((struct uio_netx_priv*)(info->priv))->memcount = 1; + + /* map extended mem (BAR 1 points to the extended memory) */ + info->mem[EXT_MEM_INDEX].addr = pci_resource_start(dev, EXT_MEM_BAR); + + /* extended memory is optional, so don't care if it is not present */ + if (info->mem[EXT_MEM_INDEX].addr) { + info->mem[EXT_MEM_INDEX].internal_addr = ioremap_nocache( + pci_resource_start(dev, EXT_MEM_BAR), + pci_resource_len(dev, EXT_MEM_BAR)); + + if (!info->mem[EXT_MEM_INDEX].internal_addr) + goto out_unmap; + + dev_info(&dev->dev, "extended memory at 0x%llX\n", info->mem[EXT_MEM_INDEX].addr); + info->mem[EXT_MEM_INDEX].size = pci_resource_len(dev, EXT_MEM_BAR); + info->mem[EXT_MEM_INDEX].memtype = UIO_MEM_PHYS; + info->mem[EXT_MEM_INDEX].name = EXT_MEM_NAME; + ((struct uio_netx_priv*)(info->priv))->memcount++; + } + + info->irq = dev->irq; +# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) + info->irq_flags = IRQF_DISABLED | IRQF_SHARED; +# else + info->irq_flags = IRQF_SHARED; +# endif + info->handler = netx_handler; + info->irqcontrol = netx_enable_irq; + + if ((id->device == PCI_DEVICE_ID_HILSCHER_NETX) || + (id->device == PCI_DEVICE_ID_HILSCHER_NETPLC) || + (id->device == PCI_DEVICE_ID_HILSCHER_NETJACK) || + (id->device == PCI_DEVICE_ID_HILSCHER_NETX4000)) { + /* make sure all interrupts are disabled */ + iowrite32(0, info->mem[DPM_INDEX].internal_addr + DPM_HOST_INT_EN0); + ((struct uio_netx_priv*)(info->priv))->pxa_info = NULL; + } else if (id->subdevice == PCI_SUBDEVICE_ID_NXPCA) { + /* map PLX registers */ + struct pxa_dev_info *pxa_info = (struct pxa_dev_info *) + kzalloc(sizeof(struct pxa_dev_info), GFP_KERNEL); + if (!pxa_info) + goto out_unmap; + ((struct uio_netx_priv*)(info->priv))->pxa_info = pxa_info; + /* set PXA PLX Timings */ + pxa_info->plx = ioremap_nocache( + pci_resource_start(dev, PXA_PLX_BAR), + pci_resource_len(dev, PXA_PLX_BAR)); + if (!pxa_info->plx) + goto out_unmap; + if (netx_pxa_get_dpm_mode(info)) + goto out_unmap_plx; + if (netx_pxa_get_plx_timing(info)) + goto out_unmap_plx; + if (netx_pxa_set_plx_timing(info)) + goto out_unmap_plx; + } else { + struct pxa_dev_info *pxa_info = (struct pxa_dev_info *) + kzalloc(sizeof(struct pxa_dev_info), GFP_KERNEL); + if (!pxa_info) + goto out_free_pxa; + pxa_info->plx = NULL; + pxa_info->plx_timing = 0; + pxa_info->dpm_mode = 0; + ((struct uio_netx_priv*)info->priv)->pxa_info = pxa_info; + } +#ifdef DMA_SUPPORT + if ((!dma_disable) && (add_dma(&dev->dev, info))) + dev_warn( &dev->dev, "Error reserving memory for dma!\n"); +#endif + if (uio_register_device(&dev->dev, info)) { + if (id->subdevice != PCI_SUBDEVICE_ID_NXPCA) + goto out_unmap; + else + goto out_unmap_plx; + } + pci_set_drvdata(dev, info); + if ((id->device == PCI_DEVICE_ID_HILSCHER_NETX) || (id->device == PCI_DEVICE_ID_HILSCHER_NETX4000)) + dev_info(&dev->dev, + "registered CifX card\n"); + else if (id->device == PCI_DEVICE_ID_HILSCHER_NETPLC) + dev_info(&dev->dev, + "registered netPLC card\n"); + else if (id->device == PCI_DEVICE_ID_HILSCHER_NETJACK) + dev_info(&dev->dev, "registered netJACK card\n"); + else if (id->subdevice == PCI_SUBDEVICE_ID_NXSB_PCA) + dev_info(&dev->dev, + "registered NXSB-PCA adapter card\n"); + else { + struct pxa_dev_info *pxa_info = (struct pxa_dev_info *) + ((struct uio_netx_priv*)info->priv)->pxa_info; + dev_info(&dev->dev, + "registered NXPCA-PCI adapter card in %d bit mode\n", + pxa_info->dpm_mode); + } + return 0; +out_unmap_plx: + iounmap(((struct uio_netx_priv*)(info->priv))->pxa_info->plx); +out_free_pxa: + kfree(((struct uio_netx_priv*)info->priv)->pxa_info); +out_unmap: +#ifdef DMA_SUPPORT + release_dma_mem(&dev->dev, info); +#endif + iounmap(info->mem[DPM_INDEX].internal_addr); + if (info->mem[EXT_MEM_INDEX].internal_addr) + iounmap(info->mem[EXT_MEM_INDEX].internal_addr); +out_release: + pci_release_regions(dev); +out_disable: + pci_disable_device(dev); +out_priv: + kfree(info->priv); +out_free: + kfree(info); + return -ENODEV; +} + +static void netx_pci_remove(struct pci_dev *dev) +{ + struct uio_info *info = pci_get_drvdata(dev); + struct pxa_dev_info *pxa_info = ((struct uio_netx_priv*)info->priv)->pxa_info; + if (pxa_info) { + if ( pxa_info->plx) + iounmap(pxa_info->plx); + + kfree(pxa_info); + } else { + /* Disable all interrupts (interrupt is only enabled for none-PCA devices) */ + iowrite32(0, info->mem[DPM_INDEX].internal_addr + DPM_HOST_INT_EN0); + } + uio_unregister_device(info); +#ifdef DMA_SUPPORT + release_dma_mem(&dev->dev, info); +#endif + pci_release_regions(dev); + pci_disable_device(dev); + pci_set_drvdata(dev, NULL); + iounmap(info->mem[DPM_INDEX].internal_addr); + if (info->mem[EXT_MEM_INDEX].internal_addr) + iounmap(info->mem[EXT_MEM_INDEX].internal_addr); + kfree(info->priv); + kfree(info); +} + +static struct pci_device_id netx_pci_ids[] = { + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETX, + .subvendor = 0, + .subdevice = 0, + }, + { + .vendor = PCI_VENDOR_ID_PLX, + .device = PCI_DEVICE_ID_PLX_9030, + .subvendor = PCI_VENDOR_ID_PLX, + .subdevice = PCI_SUBDEVICE_ID_NXSB_PCA, + }, + { + .vendor = PCI_VENDOR_ID_PLX, + .device = PCI_DEVICE_ID_PLX_9030, + .subvendor = PCI_VENDOR_ID_PLX, + .subdevice = PCI_SUBDEVICE_ID_NXPCA, + }, + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETPLC, + .subvendor = PCI_VENDOR_ID_HILSCHER, + .subdevice = PCI_SUBDEVICE_ID_NETPLC_RAM, + }, + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETPLC, + .subvendor = PCI_VENDOR_ID_HILSCHER, + .subdevice = PCI_SUBDEVICE_ID_NETPLC_FLASH, + }, + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETJACK, + .subvendor = PCI_VENDOR_ID_HILSCHER, + .subdevice = PCI_SUBDEVICE_ID_NETJACK_RAM, + }, + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETJACK, + .subvendor = PCI_VENDOR_ID_HILSCHER, + .subdevice = PCI_SUBDEVICE_ID_NETJACK_FLASH, + }, + { + .vendor = PCI_VENDOR_ID_HILSCHER, + .device = PCI_DEVICE_ID_HILSCHER_NETX4000, + .subvendor = 0, + .subdevice = 0, + }, + { 0, } +}; + +static struct pci_driver netx_pci_driver = { + .name = "netx", + .id_table = netx_pci_ids, + .probe = netx_pci_probe, + .remove = netx_pci_remove, +}; + +static int misc_counter = 0; +static int create_misc_device(struct netx_custom_dev* custom) +{ + int ret = 0; + + if (custom->dev == NULL) { + char* name = kzalloc(16, GFP_KERNEL); + if (name == NULL) { + printk("uio_netx - custom card(%d): "\ + "Error allocating memory for custom netx device!\n", card_count); + return -ENOMEM; + } + if ((custom->misc = kzalloc(sizeof(struct miscdevice), GFP_KERNEL)) != NULL) { + sprintf(name, "netx_custom%d", misc_counter++); + custom->misc->minor = MISC_DYNAMIC_MINOR; + custom->misc->name = name; + if ((ret = misc_register( custom->misc))) { + kfree( custom->misc->name); + kfree( custom->misc); + printk("uio_netx - custom card(%d): "\ + "Error creating misc-device (ret=%d)!\n", card_count, ret); + return -ENOMEM; + } + custom->dev = custom->misc->this_device; +#ifdef DMA_SUPPORT + /* this device is passed via command line so use command line DMA settings */ + custom->dma_enable = !(dma_disable); +#endif + } else { + printk("uio_netx - custom card(%d): "\ + "Error allocating memory for custom netx device!\n", card_count); + kfree(name); + return -ENOMEM; + } + } + return 0; +} + +void delete_misc_device(struct miscdevice* misc) +{ + if (misc) { + misc_deregister( misc); + kfree( misc->name); + kfree( misc); + } +} + +void free_netx_custom_dev(struct netx_custom_dev* custom) +{ + if (custom) { + if (custom->misc) { + delete_misc_device(custom->misc); + } + if (custom->dpm_addr) + kfree(custom->dpm_addr); + if (custom->dpm_len) + kfree(custom->dpm_len); + if (custom->irq) + kfree(custom->irq); + kfree(custom); + } +} + +struct netx_custom_dev* alloc_netx_custom_dev(struct device* dev){ + struct netx_custom_dev* custom = kzalloc(sizeof(struct netx_custom_dev), GFP_KERNEL); + + if (custom == NULL) { + printk("uio_netx - custom card: "\ + "Error allocating memory for custom netx device!\n"); + return NULL; + } else { + sprintf( custom->device_name, "netx_custom"); + if (dev == NULL) { + if (create_misc_device(custom)) + kfree(custom); + } else { + custom->dev = dev; + } + } + return custom; +} + +static int map_custom_card( struct netx_custom_dev* custom, int no_of_maps) +{ + int ret,i = 0; + struct uio_info* info = NULL; + + if (no_of_maps == 0) + return -EINVAL; + + info = kzalloc(sizeof(struct uio_info), GFP_KERNEL); + if ((!info) || (!(info->priv = kzalloc(sizeof(struct uio_netx_priv), GFP_KERNEL)))) { + dev_info(custom->dev, "uio_netx - custom card(%d): "\ + "Error allocating memory for custom netx device!\n", card_count); + + if (info) kfree( info); + return -ENOMEM; + } + info->version = UIO_NETX_VERSION; + info->name = custom->device_name; + ret = 0; + for (i=0;(imem[DPM_INDEX+i].addr = custom->dpm_addr[i]; + info->mem[DPM_INDEX+i].internal_addr = ioremap_nocache(custom->dpm_addr[i], custom->dpm_len[i]); + info->mem[DPM_INDEX+i].size = custom->dpm_len[i]; + info->mem[DPM_INDEX+i].memtype = UIO_MEM_PHYS; + info->mem[DPM_INDEX+i].name = (i == 0) ? DPM_MEM_NAME : EXT_MEM_NAME; + ((struct uio_netx_priv*)(info->priv))->memcount++; + + if (info->mem[DPM_INDEX+i].internal_addr == NULL) + ret = -1; + } + /* check if everthing is mapped */ + if (ret != 0) { + while(--i>0) { + iounmap(custom->info->mem[i].internal_addr); + } + kfree( info->priv); + kfree( info); + return -ENOMEM; + } + /* check if device provides global interrupt status reg */ + if (custom->dpm_len[0]priv))->no_irq_stat = 1; + + info->irq = custom->irq[0]; +# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) + info->irq_flags = IRQF_DISABLED; +# else + info->irq_flags = 0; +# endif + info->handler = netx_handler; + info->irqcontrol = netx_enable_irq; +#ifdef DMA_SUPPORT + if ((custom->dma_enable) && (add_dma( custom->dev, info))) + dev_info(custom->dev, "uio_netx - custom card(%d): "\ + "Error reserving memory for DMA!\n", card_count); +#endif + if ((ret = uio_register_device( custom->dev, info))) { + dev_info(custom->dev, "uio_netx - custom card(%d): "\ + "Error registering custom netx device (ret=%d)!\n", card_count, ret); + kfree( info->priv); + kfree( info); + return -ENOMEM; + } else { + custom->info = info; + mutex_lock( &custom_list_lock); + list_add(&custom->list, &custom_list); + card_count++; + mutex_unlock( &custom_list_lock); + dev_info(custom->dev, "uio_netx - custom card(%d): "\ + "Successfuly registered custom netx device (DPM at 0x%llX)!\n", card_count-1, custom->dpm_addr[0]); + } + return 0; +} + +void unmap_custom_cards(struct device* dev) +{ + struct list_head *pos; + struct list_head *next; + + mutex_lock( &custom_list_lock); + list_for_each_safe( pos, next, &custom_list) { + struct netx_custom_dev* custom = list_entry( pos, struct netx_custom_dev, list); + /* in case dev is given delete only this element */ + if (dev != NULL) { + if (custom->dev != dev) { + custom = NULL; + } + } + if (custom != NULL) { + struct uio_netx_priv* priv = (struct uio_netx_priv*)custom->info->priv; + uio_unregister_device(custom->info); + + while(priv->memcount-->0) { + if (NULL != custom->info->mem[priv->memcount].internal_addr) + iounmap(custom->info->mem[priv->memcount].internal_addr); + } +#ifdef DMA_SUPPORT + release_dma_mem(custom->dev, custom->info); +#endif + kfree( custom->info->priv); + kfree( custom->info); + + list_del( pos); + card_count--; + free_netx_custom_dev( custom); + /* in case dev is given we are done here */ + if (dev != NULL) { + break; + } + } + } + mutex_unlock( &custom_list_lock); +} + +#ifdef CONFIG_OF +int get_dt_parameter(struct platform_device *pd, struct netx_custom_dev* custom) +{ + const void* ptr = NULL; + struct resource res; + int mappings = 0; + int ret = 0; + + while ((ret = of_address_to_resource(custom->dev->of_node, mappings, &res)) == 0) { + mappings++; + } + dev_info( custom->dev, "uio_netx - get_dt_parameter: found %d mappings!\n",mappings); + if (mappings == 0) + return -ENODATA; + + custom->dpm_addr = kzalloc((mappings)*sizeof(phys_addr_t), GFP_KERNEL); + custom->dpm_len = kzalloc((mappings)*sizeof(unsigned long), GFP_KERNEL); + custom->irq = kzalloc((mappings)*sizeof(int), GFP_KERNEL); + + if (!(custom->dpm_addr) || !(custom->dpm_len) || !(custom->irq)) { + dev_err( custom->dev, "uio_netx - get_dt_parameter: failed to allocate memory for device mapping-parameter!\n"); + return -ENOMEM; + } + while ((mappings>0) && (ret = of_address_to_resource(custom->dev->of_node, --mappings, &res)) == 0) { + custom->dpm_addr[mappings] = res.start; + custom->dpm_len[mappings] = resource_size(&res); + custom->irq[mappings] = 0; + } + /* set irq information */ + custom->irq[0] = platform_get_irq_byname(pd, "card"); + + /* build device name (/sys/class/uio[x]/name) */ + if (NULL != (ptr = of_get_property(custom->dev->of_node, "startuptype", NULL))) { + snprintf( custom->device_name, NETX_NAME_LEN_MAX, "netx_custom,%s,", (char*)ptr); + } else { + sprintf( custom->device_name, "netx_custom,-,"); + } + if (NULL != (ptr = of_get_property(custom->dev->of_node, "alias", NULL))) { + snprintf( custom->device_name+(strlen(custom->device_name)),NETX_NAME_LEN_MAX-strlen(custom->device_name), "%s", (char*)ptr); + } else { + snprintf( custom->device_name+(strlen(custom->device_name)),NETX_NAME_LEN_MAX-strlen(custom->device_name), "-"); + } +#if defined DMA_SUPPORT + ptr = of_get_property(custom->dev->of_node, "dma", NULL); + custom->dma_enable = !!!(*(uint32_t*)ptr) ? 1 : 0; +#endif + return mappings; +} + +static int __devinit netx_dt_probe(struct platform_device *pd) +{ + int ret = -ENOMEM; + struct netx_custom_dev* custom = alloc_netx_custom_dev(&pd->dev); + + if (custom != NULL) { + /* try to get required information */ + if ((ret = get_dt_parameter(pd, custom))>0) { + dev_info( custom->dev, "uio_netx - netx_dt_probe: device DPM @0x%llX ...+0x%lX (@irq=%d)\n", custom->dpm_addr[0], (unsigned int)custom->dpm_len[0], custom->irq[0]); + ret = map_custom_card( custom, ret); + } else { + dev_err( custom->dev, "uio_netx - netx_dt_probe: failed to request resources (%d)\n", ret); + } + if (ret<0) + free_netx_custom_dev(custom); + } + return ret; +} + +static int netx_dt_remove(struct platform_device *pd) +{ + unmap_custom_cards( &pd->dev); + return 0; +} + +/**************************************************** + *** netX0: netX@f8034000 { + *** status = "ok"; + *** compatible = "hilscher,uio-netx"; + *** reg = <0xf8034000 0x10000>; // can be multiple (1. DPM 2... extended memory) + *** interrupt-names = "card"; // only "card" supported + *** interrupts = <168 IRQ_TYPE_LEVEL_HIGH>; + *** dma = <1>; // enable / disable + *** startuptype = "auto"; // specifies startup behaviour: flash,ram,auto,donttouch + *** alias = "custom-device"; // device name + *** } + ***************************************************/ + +static struct of_device_id const uio_netx_of_match[] __refconst = { + { .compatible = "hilscher,uio-netx", }, + {} +}; + +MODULE_DEVICE_TABLE(of, uio_netx_of_match); + +static struct platform_driver uio_netx_platform_driver = { + .probe = netx_dt_probe, + .remove = netx_dt_remove, + .driver = { + .name = "uio-netx", + .owner = THIS_MODULE, + .of_match_table = uio_netx_of_match, + }, +}; +#endif //CONFIG_OF + +static int __init netx_init_module(void) +{ + INIT_LIST_HEAD(&custom_list); + mutex_init( &custom_list_lock); + + /* parameter are given via command line */ + if (addr_cnt) {/* custom card definition given via command line (e.g. ISA) */ + if ((addr_cnt == len_cnt) && (addr_cnt == irq_cnt)) { + int max = addr_cnt; + while(addr_cnt>0) { + struct netx_custom_dev* custom = alloc_netx_custom_dev(NULL); + if (custom != NULL) { + if ((custom->dpm_addr = kzalloc(sizeof(phys_addr_t),GFP_KERNEL))) + *custom->dpm_addr = custom_dpm_addr[max - addr_cnt]; + if ((custom->dpm_len = kzalloc(sizeof(unsigned long),GFP_KERNEL))) + *custom->dpm_len = custom_dpm_len[max - addr_cnt]; + if ((custom->irq = kzalloc(sizeof(int),GFP_KERNEL))) + *custom->irq = custom_irq[max - addr_cnt]; + + if (map_custom_card( custom, 1)) { + /* failure during mapping custom device */ + free_netx_custom_dev(custom); + } + } + addr_cnt--; + } + } else { + printk("uio_netx - Error registering passed user card. Invalid number of arguments!"); + } + } +#ifdef CONFIG_OF + /* register driver for device tree */ + platform_driver_register(&uio_netx_platform_driver); +#endif + /* and pci */ + return pci_register_driver(&netx_pci_driver); +} + +static void __exit netx_exit_module(void) +{ + pci_unregister_driver(&netx_pci_driver); +#ifdef CONFIG_OF + platform_driver_unregister(&uio_netx_platform_driver); +#endif + unmap_custom_cards(NULL); +} + +module_init(netx_init_module); +module_exit(netx_exit_module); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Hans J. Koch, Manuel Traut, Sebastian Doell"); +MODULE_DESCRIPTION("Device driver for netX hardware\n\t\tHilscher Gesellschaft fuer Systemautomation mbH");