diff --git a/scchip/constants.py b/scchip/constants.py index 7a227ca..7c80f1f 100644 --- a/scchip/constants.py +++ b/scchip/constants.py @@ -3,7 +3,7 @@ __author__ = "Gregory Maynard-Hoare" __copyright__ = "Copyright (C) 2024 Gregory Maynard-Hoare" __license__ = "GNU Affero General Public License v3.0" -__version__ = "1.4.3" +__version__ = "1.4.4" # App identification APP_NAME = "SuperChocChip Emulator" diff --git a/scchip/cpu.py b/scchip/cpu.py index e1017e1..f2f32be 100644 --- a/scchip/cpu.py +++ b/scchip/cpu.py @@ -90,24 +90,28 @@ def __init__(self, arch, ram, stack, framebuffer, inputs, audio, debugger, clock # kk = Byte # nnn = address # x/y = register (0-15) + + # Initial lookup for instructions' first nibble + self.instruction_nibble = [ + self._0nnn, # Alias for bitmask 0xFFFF + self._1nnn, + self._2nnn, + self._3xkk, + self._4xkk, + self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F + self._6xkk, + self._7xkk, + self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F + self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F + self._Annn, + self._Bnnn, + self._Cxkk, + self._Dxyn, + self._Ennn_Fnnn, # Alias for bitmask 0xF0FF + self._Ennn_Fnnn, # Alias for bitmask 0xF0FF + ] + self.instructions = { - # Initial lookup for instructions' first nibble - 0x0: self._0nnn, # Alias for bitmask 0xFFFF - 0x1: self._1nnn, - 0x2: self._2nnn, - 0x3: self._3xkk, - 0x4: self._4xkk, - 0x5: self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F - 0x6: self._6xkk, - 0x7: self._7xkk, - 0x8: self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F - 0x9: self._5nnn_8nnn_9nnn, # Alias for bitmask 0xF00F - 0xA: self._Annn, - 0xB: self._Bnnn, - 0xC: self._Cxkk, - 0xD: self._Dxyn, - 0xE: self._Ennn_Fnnn, # Alias for bitmask 0xF0FF - 0xF: self._Ennn_Fnnn, # Alias for bitmask 0xF0FF # Instructions beginning with nibble 0x0, bitmask 0xFFFF (i.e., exact match) 0x00E0: self._00E0, 0x00EE: self._00EE, @@ -310,7 +314,7 @@ def _call_masked_instruction(self, masked_opcode): instruction() def decode_exec(self): - self._call_masked_instruction((0xF000 & self.opcode) >> 12) + self.instruction_nibble[self.opcode >> 12]() def refresh_framebuffer(self): # Render pending delta screen updates. Should be called whenever there @@ -362,13 +366,7 @@ def debug(self, instruction): self.debugger.output(self, instruction) def _0nnn(self): - opcode = self.opcode - - if opcode < 0x10: - # Let's use opcodes 0x0 - 0xF internally for indexing, since they're not used on any CHIP-8 variant - self._opcode_unsupported() - - self._call_masked_instruction(opcode) + self._call_masked_instruction(self.opcode) def _5nnn_8nnn_9nnn(self): self._call_masked_instruction(self.opcode & 0xF00F) diff --git a/superchocchip.py b/superchocchip.py index 7d66cf2..789fd65 100755 --- a/superchocchip.py +++ b/superchocchip.py @@ -3,7 +3,7 @@ __author__ = "Gregory Maynard-Hoare" __copyright__ = "Copyright (C) 2024 Gregory Maynard-Hoare" __license__ = "GNU Affero General Public License v3.0" -__version__ = "1.4.3" +__version__ = "1.4.4" from argparse import ArgumentParser from scchip import main