DE1_TOP.sta.rpt

TimeQuest Timing Analyzer report for DE1_TOP
Tue Jun 19 02:42:13 2018
Quartus II 64-Bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow Model Fmax Summary
  7. Slow Model Setup Summary
  8. Slow Model Hold Summary
  9. Slow Model Recovery Summary
 10. Slow Model Removal Summary
 11. Slow Model Minimum Pulse Width Summary
 12. Slow Model Setup: 'PLL_inst|altpll_component|pll|clk[0]'
 13. Slow Model Hold: 'PLL_inst|altpll_component|pll|clk[0]'
 14. Slow Model Minimum Pulse Width: 'PLL_inst|altpll_component|pll|clk[0]'
 15. Slow Model Minimum Pulse Width: 'CLOCK_27_0'
 16. Slow Model Minimum Pulse Width: 'altera_reserved_tck'
 17. Setup Times
 18. Hold Times
 19. Clock to Output Times
 20. Minimum Clock to Output Times
 21. Fast Model Setup Summary
 22. Fast Model Hold Summary
 23. Fast Model Recovery Summary
 24. Fast Model Removal Summary
 25. Fast Model Minimum Pulse Width Summary
 26. Fast Model Setup: 'PLL_inst|altpll_component|pll|clk[0]'
 27. Fast Model Hold: 'PLL_inst|altpll_component|pll|clk[0]'
 28. Fast Model Minimum Pulse Width: 'PLL_inst|altpll_component|pll|clk[0]'
 29. Fast Model Minimum Pulse Width: 'CLOCK_27_0'
 30. Fast Model Minimum Pulse Width: 'altera_reserved_tck'
 31. Setup Times
 32. Hold Times
 33. Clock to Output Times
 34. Minimum Clock to Output Times
 35. Multicorner Timing Analysis Summary
 36. Setup Times
 37. Hold Times
 38. Clock to Output Times
 39. Minimum Clock to Output Times
 40. Setup Transfers
 41. Hold Transfers
 42. Report TCCS
 43. Report RSKM
 44. Unconstrained Paths
 45. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; DE1_TOP                                                           ;
; Device Family      ; Cyclone II                                                        ;
; Device Name        ; EP2C20F484C7                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Unavailable                                                       ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 8           ;
; Maximum allowed            ; 4           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 1           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processors 2-8         ;   0.0%      ;
+----------------------------+-------------+


+---------------------------------------------------------+
; SDC File List                                           ;
+---------------------+--------+--------------------------+
; SDC File Path       ; Status ; Read at                  ;
+---------------------+--------+--------------------------+
; de1_constraints.sdc ; OK     ; Tue Jun 19 02:42:12 2018 ;
+---------------------+--------+--------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                  ;
+--------------------------------------+-------------------+---------+-----------+--------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------------------------------------+----------------------------------------+------------------------------------------+
; Clock Name                           ; Type              ; Period  ; Frequency ; Rise   ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                               ; Source                                 ; Targets                                  ;
+--------------------------------------+-------------------+---------+-----------+--------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------------------------------------+----------------------------------------+------------------------------------------+
; altera_reserved_tck                  ; Base              ; 100.000 ; 10.0 MHz  ; 0.000  ; 50.000 ;            ;           ;             ;       ;        ;           ;            ;          ;                                      ;                                        ; { altera_reserved_tck }                  ;
; CLOCK_27_0                           ; Base              ; 37.037  ; 27.0 MHz  ; 0.000  ; 18.518 ;            ;           ;             ;       ;        ;           ;            ;          ;                                      ;                                        ; { CLOCK_27[0] }                          ;
; PLL_inst|altpll_component|pll|clk[0] ; Generated         ; 13.468  ; 74.25 MHz ; 0.000  ; 6.734  ; 50.00      ; 4         ; 11          ;       ;        ;           ;            ; false    ; CLOCK_27_0                           ; PLL_inst|altpll_component|pll|inclk[0] ; { PLL_inst|altpll_component|pll|clk[0] } ;
; PLL_inst|altpll_component|pll|clk[1] ; Generated         ; 13.468  ; 74.25 MHz ; -1.683 ; 5.051  ; 50.00      ; 4         ; 11          ; -45.0 ;        ;           ;            ; false    ; CLOCK_27_0                           ; PLL_inst|altpll_component|pll|inclk[0] ; { PLL_inst|altpll_component|pll|clk[1] } ;
; sdr_clk                              ; Virtual Generated ; 13.468  ; 74.25 MHz ; 11.785 ; 18.519 ;            ; 1         ; 1           ;       ;        ;           ;            ; false    ; PLL_inst|altpll_component|pll|clk[1] ; DRAM_CLK                               ; { }                                      ;
+--------------------------------------+-------------------+---------+-----------+--------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------------------------------------+----------------------------------------+------------------------------------------+


+---------------------------------------------------------------------------+
; Slow Model Fmax Summary                                                   ;
+-----------+-----------------+--------------------------------------+------+
; Fmax      ; Restricted Fmax ; Clock Name                           ; Note ;
+-----------+-----------------+--------------------------------------+------+
; 36.44 MHz ; 36.44 MHz       ; PLL_inst|altpll_component|pll|clk[0] ;      ;
+-----------+-----------------+--------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------+
; Slow Model Setup Summary                                      ;
+--------------------------------------+--------+---------------+
; Clock                                ; Slack  ; End Point TNS ;
+--------------------------------------+--------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; -6.989 ; -177.093      ;
+--------------------------------------+--------+---------------+


+--------------------------------------------------------------+
; Slow Model Hold Summary                                      ;
+--------------------------------------+-------+---------------+
; Clock                                ; Slack ; End Point TNS ;
+--------------------------------------+-------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; 0.445 ; 0.000         ;
+--------------------------------------+-------+---------------+


-------------------------------
; Slow Model Recovery Summary ;
-------------------------------
No paths to report.


------------------------------
; Slow Model Removal Summary ;
------------------------------
No paths to report.


+---------------------------------------------------------------+
; Slow Model Minimum Pulse Width Summary                        ;
+--------------------------------------+--------+---------------+
; Clock                                ; Slack  ; End Point TNS ;
+--------------------------------------+--------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; 4.170  ; 0.000         ;
; CLOCK_27_0                           ; 18.518 ; 0.000         ;
; altera_reserved_tck                  ; 97.531 ; 0.000         ;
+--------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                                                                    ;
+--------+-----------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                             ; To Node                                                                                                                             ; Launch Clock                         ; Latch Clock                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; -6.989 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.764     ;
; -6.985 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.765     ;
; -6.974 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.754     ;
; -6.963 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.742     ;
; -6.949 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.726     ;
; -6.945 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.722     ;
; -6.889 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.669     ;
; -6.878 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.657     ;
; -6.867 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.644     ;
; -6.826 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.601     ;
; -6.822 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.602     ;
; -6.811 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.591     ;
; -6.800 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.579     ;
; -6.788 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.563     ;
; -6.786 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.563     ;
; -6.784 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.564     ;
; -6.782 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.559     ;
; -6.773 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.553     ;
; -6.762 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.541     ;
; -6.748 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.525     ;
; -6.744 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.521     ;
; -6.726 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.506     ;
; -6.715 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.494     ;
; -6.704 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.481     ;
; -6.688 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.468     ;
; -6.677 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.456     ;
; -6.666 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.443     ;
; -6.630 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.409     ;
; -6.607 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.382     ;
; -6.593 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.368     ;
; -6.589 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.369     ;
; -6.581 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.361     ;
; -6.579 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.354     ;
; -6.578 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.358     ;
; -6.575 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.355     ;
; -6.567 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.346     ;
; -6.564 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.344     ;
; -6.553 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.328     ;
; -6.553 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.332     ;
; -6.553 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.332     ;
; -6.553 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.330     ;
; -6.549 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.326     ;
; -6.548 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.323     ;
; -6.544 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.324     ;
; -6.539 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.316     ;
; -6.535 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.312     ;
; -6.533 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.313     ;
; -6.522 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.301     ;
; -6.518 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.293     ;
; -6.508 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.285     ;
; -6.504 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.281     ;
; -6.493 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.273     ;
; -6.482 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.261     ;
; -6.479 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.259     ;
; -6.471 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.248     ;
; -6.471 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.080      ; 13.245     ;
; -6.468 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.247     ;
; -6.467 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.246     ;
; -6.467 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.246     ;
; -6.457 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.234     ;
; -6.456 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.235     ;
; -6.453 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.228     ;
; -6.449 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.229     ;
; -6.448 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.228     ;
; -6.445 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.084      ; 13.223     ;
; -6.444 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.219     ;
; -6.441 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.216     ;
; -6.438 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.218     ;
; -6.437 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.216     ;
; -6.437 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.217     ;
; -6.431 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.082      ; 13.207     ;
; -6.429 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.208     ;
; -6.427 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.206     ;
; -6.427 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.082      ; 13.203     ;
; -6.426 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.203     ;
; -6.426 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.206     ;
; -6.418 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.198     ;
; -6.415 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.194     ;
; -6.413 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.190     ;
; -6.409 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.186     ;
; -6.406 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.181     ;
; -6.401 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.178     ;
; -6.397 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.083      ; 13.174     ;
; -6.390 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.165     ;
; -6.390 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.169     ;
; -6.384 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.159     ;
; -6.380 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.160     ;
; -6.380 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.160     ;
; -6.371 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.150     ;
; -6.369 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.149     ;
; -6.360 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.084      ; 13.138     ;
; -6.358 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.137     ;
; -6.355 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.130     ;
; -6.354 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.129     ;
; -6.354 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[3] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.082      ; 13.130     ;
; -6.353 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.133     ;
; -6.352 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.081      ; 13.127     ;
; -6.352 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.085      ; 13.131     ;
; -6.350 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[9] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.086      ; 13.130     ;
; -6.350 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[3] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.087      ; 13.131     ;
+--------+-----------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                  ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                   ; To Node                                                                     ; Launch Clock                         ; Latch Clock                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; 0.445 ; CLK_DIV[0]                                                                  ; CLK_DIV[0]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.731      ;
; 0.445 ; CLK_DIV[1]                                                                  ; CLK_DIV[1]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.731      ;
; 0.445 ; CLK_DIV[2]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.731      ;
; 0.445 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.731      ;
; 0.445 ; OSD:OSD_inst|charbit                                                        ; OSD:OSD_inst|charbit                                                        ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.731      ;
; 0.610 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|hn_out   ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_hs_n                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.896      ;
; 0.613 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|vn_out   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.899      ;
; 0.613 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[5]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.899      ;
; 0.613 ; CLK_DIV[1]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.899      ;
; 0.620 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|vn_out   ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_vs_n                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.906      ;
; 0.626 ; OSD:OSD_inst|osd_frame_out                                                  ; OSD:OSD_inst|charbit                                                        ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.912      ;
; 0.628 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.914      ;
; 0.920 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.205      ;
; 0.968 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.254      ;
; 0.975 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[1]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.261      ;
; 0.976 ; CLK_DIV[0]                                                                  ; CLK_DIV[1]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.262      ;
; 0.976 ; CLK_DIV[0]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.262      ;
; 0.985 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.271      ;
; 0.988 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[2]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.274      ;
; 0.989 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.275      ;
; 0.990 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.276      ;
; 0.992 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.278      ;
; 0.992 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.278      ;
; 0.993 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.279      ;
; 0.996 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.282      ;
; 0.998 ; OSD:OSD_inst|char_pixel[7]                                                  ; OSD:OSD_inst|char_pixel[7]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.284      ;
; 1.002 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.288      ;
; 1.005 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.291      ;
; 1.006 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.292      ;
; 1.011 ; OSD:OSD_inst|char_pixel[3]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.297      ;
; 1.024 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.310      ;
; 1.025 ; OSD:OSD_inst|char_pixel[5]                                                  ; OSD:OSD_inst|char_pixel[5]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.311      ;
; 1.025 ; OSD:OSD_inst|char_pixel[8]                                                  ; OSD:OSD_inst|char_pixel[8]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.311      ;
; 1.026 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.312      ;
; 1.028 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.314      ;
; 1.029 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.314      ;
; 1.031 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.317      ;
; 1.031 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.317      ;
; 1.035 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.321      ;
; 1.036 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.322      ;
; 1.037 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.323      ;
; 1.040 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.326      ;
; 1.043 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.329      ;
; 1.043 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.329      ;
; 1.177 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[13]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 1.456      ;
; 1.180 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[6]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.460      ;
; 1.181 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|hn_out   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.008     ; 1.459      ;
; 1.200 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]       ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.009      ; 1.495      ;
; 1.213 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.499      ;
; 1.220 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.506      ;
; 1.228 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]       ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[6] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.010     ; 1.504      ;
; 1.243 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[21]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 1.522      ;
; 1.243 ; OSD:OSD_inst|char_pixel[0]                                                  ; OSD:OSD_inst|char_pixel[0]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.529      ;
; 1.248 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.534      ;
; 1.248 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]       ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[5] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.010     ; 1.524      ;
; 1.258 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.544      ;
; 1.303 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[7] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[23]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.583      ;
; 1.313 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[7] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[7]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.593      ;
; 1.314 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[14]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.594      ;
; 1.318 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[22]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 1.597      ;
; 1.318 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[4] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[12]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.598      ;
; 1.323 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[4] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[4]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 1.603      ;
; 1.345 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[0]       ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.009      ; 1.640      ;
; 1.374 ; OSD:OSD_inst|osd_frame                                                      ; OSD:OSD_inst|osd_frame_out                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.006      ; 1.666      ;
; 1.384 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7]       ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[7] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.010     ; 1.660      ;
; 1.399 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.684      ;
; 1.400 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.686      ;
; 1.407 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[2]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.693      ;
; 1.412 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[6] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.697      ;
; 1.412 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[6] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.697      ;
; 1.416 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[4] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.701      ;
; 1.417 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[5]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.703      ;
; 1.419 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[5] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.704      ;
; 1.420 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.706      ;
; 1.421 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.707      ;
; 1.422 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.708      ;
; 1.424 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[7] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.709      ;
; 1.424 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[5] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.709      ;
; 1.424 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.710      ;
; 1.424 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.710      ;
; 1.425 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.711      ;
; 1.426 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[4] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.001     ; 1.711      ;
; 1.437 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.723      ;
; 1.438 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.724      ;
; 1.444 ; OSD:OSD_inst|char_pixel[3]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.730      ;
; 1.457 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.743      ;
; 1.458 ; OSD:OSD_inst|char_pixel[5]                                                  ; OSD:OSD_inst|char_pixel[6]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.744      ;
; 1.459 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.745      ;
; 1.461 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.747      ;
; 1.464 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.750      ;
; 1.468 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.754      ;
; 1.469 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.755      ;
; 1.470 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.756      ;
; 1.473 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.759      ;
; 1.476 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.762      ;
; 1.476 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.762      ;
; 1.480 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.766      ;
; 1.487 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.773      ;
; 1.497 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[6]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.783      ;
; 1.500 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 1.786      ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                             ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                ; Clock Edge ; Target                                                                                                                              ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+
; 4.170 ; 6.734        ; 2.564          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg0  ;
; 4.170 ; 6.734        ; 2.564          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg0  ;
; 4.170 ; 6.734        ; 2.564          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg1  ;
; 4.170 ; 6.734        ; 2.564          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg1  ;
; 4.170 ; 6.734        ; 2.564          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg2  ;
; 4.170 ; 6.734        ; 2.564          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg2  ;
; 4.170 ; 6.734        ; 2.564          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg3  ;
; 4.170 ; 6.734        ; 2.564          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg3  ;
; 4.170 ; 6.734        ; 2.564          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg4  ;
; 4.170 ; 6.734        ; 2.564          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg0  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg1  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg2  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg3  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg6  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg7  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg8  ;
; 4.420 ; 6.734        ; 2.314          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg9  ;
; 4.420 ; 6.734        ; 2.314          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg9  ;
; 5.623 ; 6.734        ; 1.111          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Rise       ; CLK_DIV[0]                                                                                                                          ;
; 5.623 ; 6.734        ; 1.111          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Rise       ; CLK_DIV[0]                                                                                                                          ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'CLOCK_27_0'                                                                                 ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock      ; Clock Edge ; Target                                 ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]|combout                    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[0]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]|combout                    ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[0]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|inclk[0] ;
; 34.406 ; 37.037       ; 2.631          ; Port Rate        ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]                            ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'altera_reserved_tck'                                                       ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+
; Slack  ; Actual Width ; Required Width ; Type      ; Clock               ; Clock Edge ; Target              ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+
; 97.531 ; 100.000      ; 2.469          ; Port Rate ; altera_reserved_tck ; Rise       ; altera_reserved_tck ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+


+-----------------------------------------------------------------------------------------------+
; Setup Times                                                                                   ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; 7.640 ; 7.640 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; 7.582 ; 7.582 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; 7.422 ; 7.422 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; 7.316 ; 7.316 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; 7.057 ; 7.057 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; 7.449 ; 7.449 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; 7.437 ; 7.437 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; 7.435 ; 7.435 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; 7.311 ; 7.311 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; 7.378 ; 7.378 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; 7.122 ; 7.122 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; 7.640 ; 7.640 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; 7.546 ; 7.546 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+-------+-------+------------+--------------------------------------+


+-------------------------------------------------------------------------------------------------+
; Hold Times                                                                                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; -6.809 ; -6.809 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; -7.334 ; -7.334 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; -7.174 ; -7.174 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; -7.068 ; -7.068 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; -6.809 ; -6.809 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; -7.201 ; -7.201 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; -7.189 ; -7.189 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; -7.187 ; -7.187 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; -7.063 ; -7.063 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; -7.130 ; -7.130 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; -6.874 ; -6.874 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; -7.392 ; -7.392 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; -7.298 ; -7.298 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+--------+--------+------------+--------------------------------------+


+--------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                      ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 4.475 ; 4.475 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 4.756 ; 4.756 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 6.276 ; 6.276 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 5.973 ; 5.973 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 6.214 ; 6.214 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 6.276 ; 6.276 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 6.245 ; 6.245 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 6.445 ; 6.445 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 6.445 ; 6.445 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 6.290 ; 6.290 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 5.999 ; 5.999 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 5.960 ; 5.960 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 6.297 ; 6.297 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 5.788 ; 5.788 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 6.256 ; 6.256 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 6.297 ; 6.297 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 6.217 ; 6.217 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; 1.185 ;       ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;       ; 1.185 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+-------+-------+------------+--------------------------------------+


+--------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                              ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 4.475 ; 4.475 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 4.756 ; 4.756 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 4.800 ; 4.800 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 4.800 ; 4.800 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 5.694 ; 5.694 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 5.103 ; 5.103 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 5.077 ; 5.077 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 4.808 ; 4.808 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 5.277 ; 5.277 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 5.097 ; 5.097 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 4.808 ; 4.808 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 5.403 ; 5.403 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 5.046 ; 5.046 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 5.267 ; 5.267 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 5.064 ; 5.064 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 5.107 ; 5.107 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 5.046 ; 5.046 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; 1.185 ;       ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;       ; 1.185 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+-------+-------+------------+--------------------------------------+


+--------------------------------------------------------------+
; Fast Model Setup Summary                                     ;
+--------------------------------------+-------+---------------+
; Clock                                ; Slack ; End Point TNS ;
+--------------------------------------+-------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; 1.730 ; 0.000         ;
+--------------------------------------+-------+---------------+


+--------------------------------------------------------------+
; Fast Model Hold Summary                                      ;
+--------------------------------------+-------+---------------+
; Clock                                ; Slack ; End Point TNS ;
+--------------------------------------+-------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; 0.215 ; 0.000         ;
+--------------------------------------+-------+---------------+


-------------------------------
; Fast Model Recovery Summary ;
-------------------------------
No paths to report.


------------------------------
; Fast Model Removal Summary ;
------------------------------
No paths to report.


+---------------------------------------------------------------+
; Fast Model Minimum Pulse Width Summary                        ;
+--------------------------------------+--------+---------------+
; Clock                                ; Slack  ; End Point TNS ;
+--------------------------------------+--------+---------------+
; PLL_inst|altpll_component|pll|clk[0] ; 4.607  ; 0.000         ;
; CLOCK_27_0                           ; 18.518 ; 0.000         ;
; altera_reserved_tck                  ; 97.778 ; 0.000         ;
+--------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                                                                    ;
+-------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                              ; To Node                                                                                                                             ; Launch Clock                         ; Latch Clock                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; 1.730 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 5.072      ;
; 1.736 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 5.070      ;
; 1.748 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 5.055      ;
; 1.779 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 5.027      ;
; 1.790 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 5.015      ;
; 1.803 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 5.000      ;
; 1.807 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.995      ;
; 1.813 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.993      ;
; 1.824 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.982      ;
; 1.825 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.978      ;
; 1.832 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.970      ;
; 1.835 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.970      ;
; 1.838 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.968      ;
; 1.846 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.957      ;
; 1.849 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.953      ;
; 1.850 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.953      ;
; 1.855 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.951      ;
; 1.856 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.950      ;
; 1.867 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.936      ;
; 1.867 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.938      ;
; 1.873 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.932      ;
; 1.878 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.924      ;
; 1.880 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.922      ;
; 1.880 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.923      ;
; 1.881 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.925      ;
; 1.884 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.922      ;
; 1.886 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.920      ;
; 1.892 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.913      ;
; 1.896 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.907      ;
; 1.897 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.909      ;
; 1.898 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.905      ;
; 1.898 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.908      ;
; 1.901 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.905      ;
; 1.905 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.898      ;
; 1.909 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.896      ;
; 1.912 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.893      ;
; 1.914 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.068      ; 4.887      ;
; 1.917 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.885      ;
; 1.919 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.886      ;
; 1.920 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.885      ;
; 1.921 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.881      ;
; 1.922 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.881      ;
; 1.923 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.880      ;
; 1.923 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.883      ;
; 1.926 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.880      ;
; 1.927 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.879      ;
; 1.929 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.877      ;
; 1.931 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[1]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.068      ; 4.870      ;
; 1.932 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.870      ;
; 1.932 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.870      ;
; 1.935 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.868      ;
; 1.937 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.868      ;
; 1.937 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[1]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.868      ;
; 1.938 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.867      ;
; 1.940 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.865      ;
; 1.943 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.863      ;
; 1.948 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.855      ;
; 1.949 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.853      ;
; 1.949 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[1]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.853      ;
; 1.950 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.855      ;
; 1.951 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.852      ;
; 1.953 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.850      ;
; 1.954 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.851      ;
; 1.955 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.851      ;
; 1.963 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.842      ;
; 1.965 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.838      ;
; 1.966 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.840      ;
; 1.967 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.836      ;
; 1.969 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.068      ; 4.832      ;
; 1.972 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.834      ;
; 1.974 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.832      ;
; 1.974 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.071      ; 4.830      ;
; 1.974 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.832      ;
; 1.975 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.830      ;
; 1.975 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.830      ;
; 1.977 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.828      ;
; 1.978 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[8]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.824      ;
; 1.980 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[1]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.825      ;
; 1.981 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.821      ;
; 1.982 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.068      ; 4.819      ;
; 1.983 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.822      ;
; 1.985 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.820      ;
; 1.985 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[3]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.818      ;
; 1.987 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.819      ;
; 1.987 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.815      ;
; 1.987 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.815      ;
; 1.988 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.817      ;
; 1.990 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.813      ;
; 1.991 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[1]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.071      ; 4.813      ;
; 1.991 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[3]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.074      ; 4.816      ;
; 1.992 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.813      ;
; 1.994 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[4]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.809      ;
; 1.996 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[6]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.807      ;
; 1.996 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.072      ; 4.809      ;
; 1.997 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.805      ;
; 1.998 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[7]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.808      ;
; 1.998 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.804      ;
; 1.999 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[0]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.070      ; 4.804      ;
; 1.999 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[9]  ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.073      ; 4.807      ;
; 2.000 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|y_out[10] ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 6.734        ; 0.069      ; 4.802      ;
+-------+------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                  ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                   ; To Node                                                                     ; Launch Clock                         ; Latch Clock                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+
; 0.215 ; CLK_DIV[0]                                                                  ; CLK_DIV[0]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; CLK_DIV[1]                                                                  ; CLK_DIV[1]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; CLK_DIV[2]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; OSD:OSD_inst|charbit                                                        ; OSD:OSD_inst|charbit                                                        ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.237 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|vn_out   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.389      ;
; 0.237 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[5]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.389      ;
; 0.237 ; CLK_DIV[1]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.389      ;
; 0.242 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.394      ;
; 0.244 ; OSD:OSD_inst|osd_frame_out                                                  ; OSD:OSD_inst|charbit                                                        ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.396      ;
; 0.255 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|hn_out   ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_hs_n                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.407      ;
; 0.263 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|vn_out   ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_vs_n                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.415      ;
; 0.356 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.508      ;
; 0.359 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[1]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.511      ;
; 0.360 ; CLK_DIV[0]                                                                  ; CLK_DIV[1]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.512      ;
; 0.361 ; CLK_DIV[0]                                                                  ; CLK_DIV[2]                                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.513      ;
; 0.365 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.517      ;
; 0.367 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[2]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.519      ;
; 0.369 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.521      ;
; 0.369 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.521      ;
; 0.370 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.522      ;
; 0.371 ; OSD:OSD_inst|char_pixel[3]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.523      ;
; 0.371 ; OSD:OSD_inst|char_pixel[7]                                                  ; OSD:OSD_inst|char_pixel[7]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.523      ;
; 0.373 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.525      ;
; 0.374 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.526      ;
; 0.374 ; OSD:OSD_inst|char_pixel[5]                                                  ; OSD:OSD_inst|char_pixel[5]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.526      ;
; 0.375 ; OSD:OSD_inst|char_pixel[8]                                                  ; OSD:OSD_inst|char_pixel[8]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.527      ;
; 0.376 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.528      ;
; 0.376 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.528      ;
; 0.377 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.529      ;
; 0.377 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.529      ;
; 0.378 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.530      ;
; 0.380 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.532      ;
; 0.380 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.532      ;
; 0.381 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.533      ;
; 0.382 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.534      ;
; 0.384 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.536      ;
; 0.385 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.537      ;
; 0.386 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.538      ;
; 0.387 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.539      ;
; 0.387 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.539      ;
; 0.447 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|hs_out         ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|hn_out   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.006     ; 0.593      ;
; 0.447 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.001      ; 0.600      ;
; 0.451 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.603      ;
; 0.453 ; OSD:OSD_inst|char_pixel[0]                                                  ; OSD:OSD_inst|char_pixel[0]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.605      ;
; 0.456 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[13]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 0.601      ;
; 0.457 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.609      ;
; 0.458 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[6]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.605      ;
; 0.459 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|vs_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.001      ; 0.612      ;
; 0.474 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[2]       ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.009      ; 0.635      ;
; 0.476 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[6]       ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[6] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.009     ; 0.619      ;
; 0.490 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[5]       ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[5] ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.009     ; 0.633      ;
; 0.494 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.646      ;
; 0.497 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[2]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.649      ;
; 0.503 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[5]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.655      ;
; 0.505 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.505 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.505 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.507 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.659      ;
; 0.507 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.659      ;
; 0.508 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.660      ;
; 0.511 ; OSD:OSD_inst|char_pixel[3]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.663      ;
; 0.514 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.666      ;
; 0.514 ; OSD:OSD_inst|char_pixel[5]                                                  ; OSD:OSD_inst|char_pixel[6]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.666      ;
; 0.515 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.667      ;
; 0.516 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[10]    ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.668      ;
; 0.517 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[7]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.669      ;
; 0.518 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.670      ;
; 0.520 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[5] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[21]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 0.665      ;
; 0.520 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.672      ;
; 0.521 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.673      ;
; 0.522 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[6]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.674      ;
; 0.524 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.676      ;
; 0.525 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|de_out         ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.677      ;
; 0.525 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.677      ;
; 0.526 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.678      ;
; 0.527 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.679      ;
; 0.529 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[9]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[11]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.681      ;
; 0.532 ; OSD:OSD_inst|char_pixel[1]                                                  ; OSD:OSD_inst|char_pixel[3]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.684      ;
; 0.536 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[7] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[23]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.683      ;
; 0.538 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[7] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[7]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.685      ;
; 0.538 ; OSD:OSD_inst|char_pixel[4]                                                  ; OSD:OSD_inst|char_pixel[6]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.690      ;
; 0.540 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.692      ;
; 0.540 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[1]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.692      ;
; 0.540 ; OSD:OSD_inst|char_pixel[2]                                                  ; OSD:OSD_inst|char_pixel[4]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.692      ;
; 0.541 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|x_out[0]       ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.009      ; 0.702      ;
; 0.541 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[14]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.688      ;
; 0.542 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|g_out[4] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[12]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.689      ;
; 0.542 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[8]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[10]    ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.694      ;
; 0.543 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[3]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|v_count[5]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.695      ;
; 0.544 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|r_out[6] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[22]                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.007     ; 0.689      ;
; 0.545 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|pattern_vg:pattern_vg|b_out[4] ; top_sync_vg_pattern:top_sync_vg_pattern_inst|adv7513_d[4]                   ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; -0.005     ; 0.692      ;
; 0.546 ; OSD:OSD_inst|char_pixel[3]                                                  ; OSD:OSD_inst|char_pixel[5]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.698      ;
; 0.549 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[4]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.701      ;
; 0.549 ; OSD:OSD_inst|char_pixel[5]                                                  ; OSD:OSD_inst|char_pixel[7]                                                  ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.701      ;
; 0.550 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[0]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[2]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.702      ;
; 0.552 ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[6]     ; top_sync_vg_pattern:top_sync_vg_pattern_inst|sync_vg:sync_vg|h_count[8]     ; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.704      ;
+-------+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'PLL_inst|altpll_component|pll|clk[0]'                                                                                                                                                                             ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                ; Clock Edge ; Target                                                                                                                              ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+
; 4.607 ; 6.734        ; 2.127          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg0  ;
; 4.607 ; 6.734        ; 2.127          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg0  ;
; 4.607 ; 6.734        ; 2.127          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg1  ;
; 4.607 ; 6.734        ; 2.127          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg1  ;
; 4.607 ; 6.734        ; 2.127          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg2  ;
; 4.607 ; 6.734        ; 2.127          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg2  ;
; 4.607 ; 6.734        ; 2.127          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg3  ;
; 4.607 ; 6.734        ; 2.127          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg3  ;
; 4.607 ; 6.734        ; 2.127          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg4  ;
; 4.607 ; 6.734        ; 2.127          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|char_ram:char_ram_inst|altsyncram:altsyncram_component|altsyncram_vrr1:auto_generated|ram_block1a0~portb_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a0~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a1~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a4~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg0  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg1  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg10 ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg2  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg3  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg4  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg5  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg6  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg7  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg8  ;
; 4.811 ; 6.734        ; 1.923          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg9  ;
; 4.811 ; 6.734        ; 1.923          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Fall       ; OSD:OSD_inst|font_rom:font_rom_inst|altsyncram:altsyncram_component|altsyncram_8681:auto_generated|ram_block1a5~porta_address_reg9  ;
; 5.734 ; 6.734        ; 1.000          ; High Pulse Width ; PLL_inst|altpll_component|pll|clk[0] ; Rise       ; CLK_DIV[0]                                                                                                                          ;
; 5.734 ; 6.734        ; 1.000          ; Low Pulse Width  ; PLL_inst|altpll_component|pll|clk[0] ; Rise       ; CLK_DIV[0]                                                                                                                          ;
+-------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'CLOCK_27_0'                                                                                 ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock      ; Clock Edge ; Target                                 ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]|combout                    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[0]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]|combout                    ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[0]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27_0 ; Rise       ; PLL_inst|altpll_component|pll|inclk[0] ;
; 34.657 ; 37.037       ; 2.380          ; Port Rate        ; CLOCK_27_0 ; Rise       ; CLOCK_27[0]                            ;
+--------+--------------+----------------+------------------+------------+------------+----------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'altera_reserved_tck'                                                       ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+
; Slack  ; Actual Width ; Required Width ; Type      ; Clock               ; Clock Edge ; Target              ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+
; 97.778 ; 100.000      ; 2.222          ; Port Rate ; altera_reserved_tck ; Rise       ; altera_reserved_tck ;
+--------+--------------+----------------+-----------+---------------------+------------+---------------------+


+-----------------------------------------------------------------------------------------------+
; Setup Times                                                                                   ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; 4.325 ; 4.325 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; 4.325 ; 4.325 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; 4.240 ; 4.240 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; 4.193 ; 4.193 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; 4.095 ; 4.095 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; 4.258 ; 4.258 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; 4.252 ; 4.252 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; 4.238 ; 4.238 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; 4.173 ; 4.173 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; 4.203 ; 4.203 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; 4.146 ; 4.146 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; 4.300 ; 4.300 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; 4.299 ; 4.299 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+-------+-------+------------+--------------------------------------+


+-------------------------------------------------------------------------------------------------+
; Hold Times                                                                                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; -3.975 ; -3.975 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; -4.205 ; -4.205 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; -4.120 ; -4.120 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; -4.073 ; -4.073 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; -3.975 ; -3.975 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; -4.138 ; -4.138 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; -4.132 ; -4.132 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; -4.118 ; -4.118 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; -4.053 ; -4.053 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; -4.083 ; -4.083 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; -4.026 ; -4.026 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; -4.180 ; -4.180 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; -4.179 ; -4.179 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+--------+--------+------------+--------------------------------------+


+----------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                        ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 1.835  ; 1.835  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 1.932  ; 1.932  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 2.516  ; 2.516  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 2.396  ; 2.396  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 2.511  ; 2.511  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 2.516  ; 2.516  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 2.478  ; 2.478  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 2.622  ; 2.622  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 2.622  ; 2.622  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 2.518  ; 2.518  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 2.409  ; 2.409  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 2.371  ; 2.371  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 2.526  ; 2.526  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 2.348  ; 2.348  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 2.496  ; 2.496  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 2.526  ; 2.526  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 2.467  ; 2.467  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; -0.614 ;        ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;        ; -0.614 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+--------+--------+------------+--------------------------------------+


+----------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 1.835  ; 1.835  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 1.932  ; 1.932  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 1.995  ; 1.995  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 1.995  ; 1.995  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 2.369  ; 2.369  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 2.111  ; 2.111  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 2.079  ; 2.079  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 1.996  ; 1.996  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 2.223  ; 2.223  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 2.103  ; 2.103  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 1.996  ; 1.996  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 2.220  ; 2.220  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 2.067  ; 2.067  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 2.205  ; 2.205  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 2.081  ; 2.081  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 2.113  ; 2.113  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 2.067  ; 2.067  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; -0.614 ;        ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;        ; -0.614 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+--------+--------+------------+--------------------------------------+


+-----------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                 ;
+---------------------------------------+----------+-------+----------+---------+---------------------+
; Clock                                 ; Setup    ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------+----------+-------+----------+---------+---------------------+
; Worst-case Slack                      ; -6.989   ; 0.215 ; N/A      ; N/A     ; 4.170               ;
;  CLOCK_27_0                           ; N/A      ; N/A   ; N/A      ; N/A     ; 18.518              ;
;  PLL_inst|altpll_component|pll|clk[0] ; -6.989   ; 0.215 ; N/A      ; N/A     ; 4.170               ;
;  altera_reserved_tck                  ; N/A      ; N/A   ; N/A      ; N/A     ; 97.531              ;
; Design-wide TNS                       ; -177.093 ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  CLOCK_27_0                           ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  PLL_inst|altpll_component|pll|clk[0] ; -177.093 ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  altera_reserved_tck                  ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
+---------------------------------------+----------+-------+----------+---------+---------------------+


+-----------------------------------------------------------------------------------------------+
; Setup Times                                                                                   ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+--------------+------------+-------+-------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; 7.640 ; 7.640 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; 7.582 ; 7.582 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; 7.422 ; 7.422 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; 7.316 ; 7.316 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; 7.057 ; 7.057 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; 7.449 ; 7.449 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; 7.437 ; 7.437 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; 7.435 ; 7.435 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; 7.311 ; 7.311 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; 7.378 ; 7.378 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; 7.122 ; 7.122 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; 7.640 ; 7.640 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; 7.546 ; 7.546 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+-------+-------+------------+--------------------------------------+


+-------------------------------------------------------------------------------------------------+
; Hold Times                                                                                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+--------------+------------+--------+--------+------------+--------------------------------------+
; SRAM_DQ[*]   ; CLOCK_27_0 ; -3.975 ; -3.975 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[1]  ; CLOCK_27_0 ; -4.205 ; -4.205 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[2]  ; CLOCK_27_0 ; -4.120 ; -4.120 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[3]  ; CLOCK_27_0 ; -4.073 ; -4.073 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[4]  ; CLOCK_27_0 ; -3.975 ; -3.975 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[6]  ; CLOCK_27_0 ; -4.138 ; -4.138 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[7]  ; CLOCK_27_0 ; -4.132 ; -4.132 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[8]  ; CLOCK_27_0 ; -4.118 ; -4.118 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[9]  ; CLOCK_27_0 ; -4.053 ; -4.053 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[11] ; CLOCK_27_0 ; -4.083 ; -4.083 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[12] ; CLOCK_27_0 ; -4.026 ; -4.026 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[13] ; CLOCK_27_0 ; -4.180 ; -4.180 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  SRAM_DQ[14] ; CLOCK_27_0 ; -4.179 ; -4.179 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
+--------------+------------+--------+--------+------------+--------------------------------------+


+--------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                      ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                      ;
+-----------+------------+-------+-------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 4.475 ; 4.475 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 4.756 ; 4.756 ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 6.276 ; 6.276 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 5.973 ; 5.973 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 6.214 ; 6.214 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 6.276 ; 6.276 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 6.245 ; 6.245 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 6.445 ; 6.445 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 6.445 ; 6.445 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 6.290 ; 6.290 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 5.999 ; 5.999 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 5.960 ; 5.960 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 6.297 ; 6.297 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 5.788 ; 5.788 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 6.256 ; 6.256 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 6.297 ; 6.297 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 6.217 ; 6.217 ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; 1.185 ;       ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;       ; 1.185 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+-------+-------+------------+--------------------------------------+


+----------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; Data Port ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                      ;
+-----------+------------+--------+--------+------------+--------------------------------------+
; VGA_HS    ; CLOCK_27_0 ; 1.835  ; 1.835  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_VS    ; CLOCK_27_0 ; 1.932  ; 1.932  ; Rise       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_B[*]  ; CLOCK_27_0 ; 1.995  ; 1.995  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[0] ; CLOCK_27_0 ; 1.995  ; 1.995  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[1] ; CLOCK_27_0 ; 2.369  ; 2.369  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[2] ; CLOCK_27_0 ; 2.111  ; 2.111  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_B[3] ; CLOCK_27_0 ; 2.079  ; 2.079  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_G[*]  ; CLOCK_27_0 ; 1.996  ; 1.996  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[0] ; CLOCK_27_0 ; 2.223  ; 2.223  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[1] ; CLOCK_27_0 ; 2.103  ; 2.103  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[2] ; CLOCK_27_0 ; 1.996  ; 1.996  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_G[3] ; CLOCK_27_0 ; 2.220  ; 2.220  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; VGA_R[*]  ; CLOCK_27_0 ; 2.067  ; 2.067  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[0] ; CLOCK_27_0 ; 2.205  ; 2.205  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[1] ; CLOCK_27_0 ; 2.081  ; 2.081  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[2] ; CLOCK_27_0 ; 2.113  ; 2.113  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
;  VGA_R[3] ; CLOCK_27_0 ; 2.067  ; 2.067  ; Fall       ; PLL_inst|altpll_component|pll|clk[0] ;
; DRAM_CLK  ; CLOCK_27_0 ; -0.614 ;        ; Rise       ; PLL_inst|altpll_component|pll|clk[1] ;
; DRAM_CLK  ; CLOCK_27_0 ;        ; -0.614 ; Fall       ; PLL_inst|altpll_component|pll|clk[1] ;
+-----------+------------+--------+--------+------------+--------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                         ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
; From Clock                           ; To Clock                             ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 851      ; 0        ; 55380    ; 9468     ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                          ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
; From Clock                           ; To Clock                             ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
; PLL_inst|altpll_component|pll|clk[0] ; PLL_inst|altpll_component|pll|clk[0] ; 851      ; 0        ; 55380    ; 9468     ;
+--------------------------------------+--------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 2     ; 2    ;
; Unconstrained Input Ports       ; 18    ; 18   ;
; Unconstrained Input Port Paths  ; 193   ; 193  ;
; Unconstrained Output Ports      ; 63    ; 63   ;
; Unconstrained Output Port Paths ; 1632  ; 1632 ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Jun 19 02:42:11 2018
Info: Command: quartus_sta DE1_TOP -c DE1_TOP
Info: qsta_default_script.tcl version: #1
Critical Warning (138069): Setting INCREMENTAL_COMPILATION to "OFF" is no longer supported. Assignment is ignored. To disable partitions, set the IGNORE_PARTITIONS global assignment to "ON" instead.
Info (11104): Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332164): Evaluating HDL-embedded SDC commands
    Info (332165): Entity sld_jtag_hub
        Info (332166): create_clock -name altera_reserved_tck [get_ports {altera_reserved_tck}] -period 10MHz   
        Info (332166): set_clock_groups -asynchronous -group {altera_reserved_tck}
Info (332104): Reading SDC File: 'de1_constraints.sdc'
Warning (332174): Ignored filter at de1_constraints.sdc(1): CLOCK_24[0] could not be matched with a port
Warning (332049): Ignored create_clock at de1_constraints.sdc(1): Argument <targets> is an empty collection
    Info (332050): create_clock -name CLOCK_24_0 -period 41.666 [get_ports CLOCK_24[0]]
Warning (332174): Ignored filter at de1_constraints.sdc(2): CLOCK_24[1] could not be matched with a port
Warning (332049): Ignored create_clock at de1_constraints.sdc(2): Argument <targets> is an empty collection
    Info (332050): create_clock -name CLOCK_24_1 -period 41.666 [get_ports CLOCK_24[1]]
Warning (332174): Ignored filter at de1_constraints.sdc(4): CLOCK_27[1] could not be matched with a port
Warning (332049): Ignored create_clock at de1_constraints.sdc(4): Argument <targets> is an empty collection
    Info (332050): create_clock -name CLOCK_27_1 -period 37.037 [get_ports CLOCK_27[1]]
Warning (332174): Ignored filter at de1_constraints.sdc(5): CLOCK_50 could not be matched with a port
Warning (332049): Ignored create_clock at de1_constraints.sdc(5): Argument <targets> is an empty collection
    Info (332050): create_clock -name CLOCK_50 -period 20.000 [get_ports CLOCK_50]
Warning (332174): Ignored filter at de1_constraints.sdc(7): SYS_CLK could not be matched with a clock
Warning (332049): Ignored set_input_delay at de1_constraints.sdc(7): Argument -clock is not an object ID
    Info (332050): set_input_delay -max -clock SYS_CLK -1.5 [get_ports SRAM_DQ*]
Warning (332049): Ignored set_input_delay at de1_constraints.sdc(8): Argument -clock is not an object ID
    Info (332050): set_input_delay -min -clock SYS_CLK -1.5 [get_ports SRAM_DQ*]
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332145): Command "set_instance_assignment" found in SDC file is not a proper SDC command and is being ignored
Warning (332174): Ignored filter at de1_constraints.sdc(52): SYS_CLK could not be matched with a port
Warning (332049): Ignored create_clock at de1_constraints.sdc(52): Argument <targets> is an empty collection
    Info (332050): create_clock -name SYS_CLK -period 20.000 [get_ports SYS_CLK]
Warning (332043): Overwriting existing clock: sdr_clk
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {PLL_inst|altpll_component|pll|inclk[0]} -divide_by 4 -multiply_by 11 -duty_cycle 50.00 -name {PLL_inst|altpll_component|pll|clk[0]} {PLL_inst|altpll_component|pll|clk[0]}
    Info (332110): create_generated_clock -source {PLL_inst|altpll_component|pll|inclk[0]} -divide_by 4 -multiply_by 11 -phase -45.00 -duty_cycle 50.00 -name {PLL_inst|altpll_component|pll|clk[1]} {PLL_inst|altpll_component|pll|clk[1]}
Warning (332153): Family doesn't support jitter analysis.
Warning (332060): Node: CLK_DIV[2] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: CLK_DIV[0] was determined to be a clock but was found without an associated clock assignment.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow Model
Critical Warning (332148): Timing requirements not met
Info (332146): Worst-case setup slack is -6.989
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -6.989      -177.093 PLL_inst|altpll_component|pll|clk[0] 
Info (332146): Worst-case hold slack is 0.445
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.445         0.000 PLL_inst|altpll_component|pll|clk[0] 
Info (332140): No Recovery paths to report
Info (332140): No Removal paths to report
Info (332146): Worst-case minimum pulse width slack is 4.170
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.170         0.000 PLL_inst|altpll_component|pll|clk[0] 
    Info (332119):    18.518         0.000 CLOCK_27_0 
    Info (332119):    97.531         0.000 altera_reserved_tck 
Info (332001): The selected device family is not supported by the report_metastability command.
Info: Analyzing Fast Model
Warning (332060): Node: CLK_DIV[2] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: CLK_DIV[0] was determined to be a clock but was found without an associated clock assignment.
Info (332146): Worst-case setup slack is 1.730
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.730         0.000 PLL_inst|altpll_component|pll|clk[0] 
Info (332146): Worst-case hold slack is 0.215
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.215         0.000 PLL_inst|altpll_component|pll|clk[0] 
Info (332140): No Recovery paths to report
Info (332140): No Removal paths to report
Info (332146): Worst-case minimum pulse width slack is 4.607
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.607         0.000 PLL_inst|altpll_component|pll|clk[0] 
    Info (332119):    18.518         0.000 CLOCK_27_0 
    Info (332119):    97.778         0.000 altera_reserved_tck 
Info (332001): The selected device family is not supported by the report_metastability command.
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 60 warnings
    Info: Peak virtual memory: 582 megabytes
    Info: Processing ended: Tue Jun 19 02:42:13 2018
    Info: Elapsed time: 00:00:02
    Info: Total CPU time (on all processors): 00:00:02