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Here with I have attached dsl files, which holds the sampling of 50Mhz SPI CLK signal with setting of 16M samples @100MHz, 200MHz and 400MHz, its quite interesting to know that each file measures different SPI clock rate but at least @200mhz works fine but even then it varies in duty cycle from 50% to 75%, its weird behaviour.
I feel the hardware is stable enough till 25MHz signal beyond that its not promising, if you have different opinion, kindly share.
For the sake of attachment I have renamed the file to png, kindly save and rename it to .dsl
Is it a firmware issue or software issue?
The text was updated successfully, but these errors were encountered:
Here with I have attached dsl files, which holds the sampling of 50Mhz SPI CLK signal with setting of 16M samples @100MHz, 200MHz and 400MHz, its quite interesting to know that each file measures different SPI clock rate but at least @200mhz works fine but even then it varies in duty cycle from 50% to 75%, its weird behaviour.
I feel the hardware is stable enough till 25MHz signal beyond that its not promising, if you have different opinion, kindly share.
For the sake of attachment I have renamed the file to png, kindly save and rename it to .dsl
Is it a firmware issue or software issue?
The text was updated successfully, but these errors were encountered: