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Compile errors coming up... #342
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What if you go back a bit to Warning level 3 (though I cannot see some of your error codes even at level 4). |
I'm still rather new at this compiling and hacking of code, so I'm unfamiliar with what you're referring to, with regard to Warning levels... Is that a general term, across all compiling methods, or just with Virtual Studio??? I guess I could also google it... |
Additionally, I would love to compile it with either Virtual Studio 2022, set to AVX2, or even better with MSYS2 UCRT, using -march=znver2 -O3 -mtune=znver2 -O3. |
Well, I got it to compile, rather than run code analysis. It was successful, though it did tell me the following... [86/148] Building CXX object avs_core\CMakeFiles\AvsCore.dir\convert\intel\convert_bits_avx2.cpp.obj |
How are you launching the build process? Are you launching the MSys2 environment directly, or are you trying to launch it from within the MSVC Command Prompt? Because those are GCC-style configuration flags, and MSVC (which it is trying to use, because Even though the build instructions (which are very likely in need of an overhaul) make reference to launching MSys2 from within the MSVC Prompt, that method tends to be really frail or just not work anymore, especially with the march of compiler versions over the years. Either use the MSVC Prompt directly to run the CMake configuration and then use CMake's internal build command ( |
Well, I tried MSYS2, first, and didn't succeed. I did succeed in compiling with Visual Studio 2022. I have a question, though, regarding compiling this, an other avisynth filters... Is SSE2 the default, for a reason? Thus far, I've assumed it was because a-one-size-fits-all approach didn't work, and therefore, overriding it to your hardware's capabilities was best. Is using AVX, or AVX2, slower? Additionally, are they less accurate than SSE or SSE2? Thanks, in advance... Another question... Is compiling with MSYS2 build it better than MSVC 2022? |
When I try to compile with MSYS2 UCRT, the following is the result... I'll include my toolchain file contents, first...
SET(CMAKE_CXX_FLAGS "-march=znver2 -O3 -mtune=znver2 -O3 -pipe") SET(CMAKE_C_FLAGS_RELEASE "-march=znver2 -O3 -mtune=znver2 -O3 -pipe")
newca@NEW_BEGINNINGS UCRT64 ~ newca@NEW_BEGINNINGS UCRT64 /z/AviSynthPlus-3.7.2/avisynth-build newca@NEW_BEGINNINGS UCRT64 /z/AviSynthPlus-3.7.2/avisynth-build newca@NEW_BEGINNINGS UCRT64 /z/AviSynthPlus-3.7.2/avisynth-build |
Setting the target to avx2 may result in slower code actually. Things which needed sse4 avx avx2 optimization are written manually. Try it yourself. It would depend on which internal filter are you heavily using. |
Check the .rst (or at github io) doc as well on how to build them, I admit msys2 part needs polishing but I just updated the build docs for Intel 2023 compiler, for example. |
" Is SSE2 the default, for a reason? Thus far, I've assumed it was because a-one-size-fits-all approach didn't work, and therefore, overriding it to your hardware's capabilities was best. Is using AVX, or AVX2, slower? Additionally, are they less accurate than SSE or SSE2? Thanks, in advance..." Typical minimum target build architecture of 201x and may be newer compilers is x86 or x64 general purpose IA chip +FPU +SSE(2) SIMD coprocessors. So compiler can use FPU and SSE for scalar operations (scalar float SSE may be faster in compare with FPU float) and also registerfile of coprocessors to pass functions agruments or simply store temporal values and so on. 32bit and 64bit chip modes have different avaialble size of SIMD coprocessor registerfile (or may be limitation of instructions addressing in 32 and 64bit modes). Typically compilers are not any smart to make significantly good SIMD version of C-functions so typically only benefit you can get from targeting to AVX2 or AVX512 architectures build is having more registerfile size for holding some temporals and not disturb cache (it several times slower and writing to cache cause large disturbance on all multiprocessor cache coherency domain because of broadcasting data changes in common memory address space). Also if compiler interesting in such storage and smart enough. Also if you use intel compiler it can optimize for intel chips families directly (need to add command line switches specific to your target intel chip). So typically builds for >SSE2 and running on >SSE2 architectures can sometime have some performance benefit (may be 1..5%). But because of emitting >SSE2 instructions they can only run on target or higher architecture because typical compilers not make separate versions and autoswitching so user will got invalid opcode crash on lower architecture. Also if you want to build for very old x86+FPU or x64+FPU (if possible ?) architectures you need to disable SSE too. |
mingwXX/ucrt64 `vfw.h` has already defined these. Fixes #242 and #342 (comment).
C26495
C26491
C4244
C6297
C26817
C6385
C26439
C2447
C2548
See these a lot in visual studio 2022. Anyone else getting these errors?
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